Memory management method, terminal device, chip, and computer-readable storage medium

Abstract

Embodiments of the present application relate to the technical field of memory management, and in particular to a memory management method, a terminal device, a chip, and a computer-readable storage medium. The method comprises: when a first process is started, applying for a process virtual memory for the first process; when a first thread of the first process is created, determining a memory estimation value of the first thread during running, wherein the first thread is a first thread created for the first process; on the basis of the memory estimation value, determining a first virtual memory for the first thread from the process virtual memory; and establishing a mapping relationship between the first virtual memory and a first physical memory, wherein the first physical memory comprises K physical huge pages, and K is greater than or equal to 1 and is an integer. The technical solution provided in the embodiments of the present application can reduce page faults occurring during running of the first process, reducing the number of times an electronic device applies for a physical memory when trapping to a kernel mode from a user mode, thereby reducing the memory allocation latency, and improving user experience.

Description

Memory management method, terminal device, chip and computer-readable storage medium

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on March 19, 2024, with application number 202410317369.9 and application name “Memory Management Method, Terminal Device, Chip and Computer-Readable Storage Medium”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The embodiments of the present application relate to the field of memory management technology, and in particular to a memory management method, terminal device, chip, and computer-readable storage medium. Background Art

[0003] Virtual memory (VM) is a memory management technology used by computer operating systems. Through virtual memory, the operating system allocates a contiguous virtual address space to each application (app) process, allowing each process to believe it has continuous, available memory. However, the operating system does not immediately allocate the corresponding physical memory space to this virtual address space. Instead, it allocates the corresponding physical memory (PM) address only when a virtual memory address is accessed and a page fault occurs. Similarly, the operating system releases physical memory based on the needs of the process. This shows that virtual memory technology can improve the efficiency of physical memory usage.

[0004] With the advancement of computer technology, applications have become increasingly versatile, and the need for physical memory allocation during process execution has become increasingly frequent. However, the current physical memory allocation process is complex, with long single allocation and release call paths and the consumption of numerous instructions, resulting in slower physical memory allocation. Furthermore, frequent allocation and release can lead to severe physical memory fragmentation, causing terminals to slow down with increased use and a higher probability of lag. Summary of the Invention

[0005] The present application provides a memory management method, terminal device, chip and computer-readable storage medium, which are used to solve the problems in the prior art of slow memory allocation and severe physical memory fragmentation, which lead to terminal lag.

[0006] To achieve the above objectives, this application adopts the following technical solutions:

[0007] In a first aspect, an embodiment of the present application provides a memory management method, which is applied to an electronic device, and specifically includes: when a first process is started, applying for process virtual memory for the first process; when a first thread of the first process is created, determining a memory estimation value when the first thread is running, where the first thread is the first thread created by the first process; based on the memory estimation value, determining a first virtual memory for the first thread from the process virtual memory; establishing a mapping relationship between the first virtual memory and the first physical memory, wherein the first physical memory includes K physical large pages, K ≥ 1 and is an integer.

[0008] It should be noted that the memory estimation value of the first thread is also called a memory portrait, which is used to indicate the memory size required by the first thread during its execution, such as 32M, 128M, etc.

[0009] Through the method provided in the embodiment of the present application, the electronic device can apply for a large amount of first physical memory for the first thread in advance in combination with the memory estimation value of the first thread when the first process initially creates a thread, that is, when the first thread is created, for subsequent use. Based on this, on the one hand, the method can ensure that the applied first physical memory basically meets the operating requirements of the first thread, and can also avoid applying for a large amount of memory that may be idle later, thereby reducing the waste of physical memory. On the other hand, since the first thread can directly access the first physical memory during subsequent operation, the method can reduce the occurrence of page fault exceptions during the operation of the first thread, reduce the number of times the electronic device falls from user mode to kernel mode to apply for physical memory, and thus reduce the memory allocation delay of the first thread.

[0010] It can be understood that since the initial stage of the first process usually only includes the first thread, this method can also improve the page fault exception situation that occurs during the operation of the first process, thereby reducing the memory allocation delay of the first process, improving the operating speed of the electronic device, reducing application lag, and providing a better user experience.

[0011] In some embodiments, after establishing a mapping relationship between the first virtual memory and the first physical memory, the method further includes: creating at least one second thread of the first process, the second thread sharing the first virtual memory with the first thread.

[0012] Through the method provided in the embodiment of the present application, one or more second threads created by the first process after the first thread can also use the first physical memory pre-applied in advance, thereby reducing the memory allocation delay of each second thread, improving the overall running speed of the first process, and improving the user experience.

[0013] In some embodiments, the method further includes: determining the usage ratio of the first virtual memory. When the usage ratio is greater than or equal to a ratio threshold, adding a first memory amount to the first virtual memory; establishing a mapping relationship between the virtual memory and the physical memory corresponding to the first memory amount, and the physical memory corresponding to the first memory amount includes at least one physical large page. When the usage ratio is less than the ratio threshold, and there is at least one unused physical large page in the first physical memory, reducing the second memory amount to the first virtual memory; releasing the mapping relationship between the virtual memory and the physical memory corresponding to the second memory amount, and the physical memory corresponding to the second memory amount includes at least one physical large page; wherein the first memory amount is the same as or different from the second memory amount.

[0014] Exemplarily, the ratio threshold may be a preset value, such as 85%, 90%, 95%, etc.

[0015] Through the method provided in this embodiment, an electronic device can dynamically adjust the physical memory currently occupied by each thread in the first process in the form of physical huge pages, so that the proportion of physical memory usage remains near a ratio threshold. This method can reduce the waste of physical memory, increase the granularity of physical memory management, reduce the computing power overhead of frequently requesting and releasing physical memory, and reduce the memory allocation latency of each thread, thereby increasing the running speed of the first process, reducing terminal lag, and improving the user experience.

[0016] In some embodiments, the method further includes: determining the number of times M, where M ≥ 0 and is an integer, that at least one thread in the first process causes the electronic device to fall into kernel mode due to memory application within a preset time; if M ≥ 1, adding a first amount of memory to the first virtual memory; and establishing a mapping relationship between the virtual memory corresponding to the first amount of memory and the physical memory, wherein the physical memory corresponding to the first amount of memory includes at least one physical large page. If M = 0 and there is at least one unused physical large page in the first physical memory, reducing a second amount of memory from the first virtual memory, wherein the first amount of memory is the same as or different from the second amount of memory; and releasing the mapping relationship between the virtual memory corresponding to the second amount of memory and the physical memory, wherein the physical memory corresponding to the second amount of memory includes at least one unused physical large page.

[0017] Through the method provided in this embodiment, the electronic device can dynamically adjust the size of the first physical memory accessible to each thread in the form of physical large pages according to the number of times M that the operating system falls into kernel state, which can reduce the waste of physical memory, increase the granularity of physical memory management, reduce the computing power overhead of frequent memory application and release, and reduce memory application delay, thereby increasing the running speed of the first process, reducing terminal lag, and improving user experience.

[0018] In some embodiments, before adding the first memory amount to the first virtual memory, the method also includes: determining the first memory amount based on M, the first memory amount is equal to the memory amount of one or more physical large pages; wherein there is a preset mapping relationship between M and the first memory amount.

[0019] Through the method provided in this embodiment, the electronic device can dynamically adjust the amount of the first physical memory that needs to be increased based on the number of times M that the first process falls into kernel mode due to memory application, thereby quickly increasing the size of the first physical memory, which not only enables the first physical memory to meet the usage requirements of the first process, but also reduces the waste of physical memory.

[0020] In some embodiments, after increasing the first memory size to the first virtual memory, the method further includes determining a ratio of estimated memory values ​​for each thread currently running in the first process; and allocating virtual memory corresponding to the first memory size to each thread based on the ratio. This method allows the electronic device to reasonably allocate the newly added memory space based on the running requirements of each thread.

[0021] In some embodiments, the memory estimation value of the first thread is determined based on the application type of the application corresponding to the first thread, wherein a predetermined correspondence exists between the application type and the memory estimation value. Using this method, the electronic device can determine the memory estimation value of the first thread based on the application type, making the determination process relatively simple.

[0022] In some embodiments, the memory estimation value of the first thread is determined based on the thread type of the first thread, wherein a predetermined correspondence exists between the thread type and the memory estimation value. By using this method, the electronic device can more accurately determine the memory estimation value of the first thread.

[0023] In some embodiments, the specifications (ie, size) of the physical huge page include 2M or 1G. The electronic device can select a physical huge page of a certain specification according to the size of the physical memory to be applied for.

[0024] In some embodiments, the first virtual memory includes a first memory area, which is used to store objects of a first size class. Based on this, the method also includes: when the usage ratio of the first memory area is greater than or equal to a ratio threshold, increasing the first memory area; when the usage ratio of the first memory area is less than the ratio threshold, reducing the first memory area.

[0025] Through the method provided in this embodiment, the electronic device can dynamically adjust the size of the first memory area according to the usage ratio of the first memory area, thereby achieving optimal memory allocation and reducing waste of physical memory.

[0026] In some embodiments, the first virtual memory includes a first memory area, which is used to store objects of a first size class. Based on this, the method also includes: determining the number N of times the electronic device falls into kernel mode within a preset time because objects of the first size class apply for physical memory, where N ≥ 0 and is an integer; when N ≥ 1, increasing the first memory area; when N = 0, reducing the first memory area.

[0027] Through the method provided in this embodiment, the electronic device can dynamically adjust the size of the first memory area according to the number N times the electronic device falls into kernel mode due to applying for physical memory by objects of the first size class, thereby achieving extreme memory allocation and reducing waste of physical memory.

[0028] In a second aspect, an embodiment of the present application provides a terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, the method shown in the first aspect above is implemented.

[0029] In a third aspect, an embodiment of the present application provides a chip comprising a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method shown in the first aspect above is implemented.

[0030] In a fourth aspect, an embodiment of the present application provides a computer-readable storage medium, in which instructions are stored. When the instructions are executed on a computer, the computer executes the method shown in the first aspect above.

[0031] In a fifth aspect, an embodiment of the present application provides a computer program product, which includes a computer program. When the computer program runs on a processor, it can implement the method shown in the first aspect above.

[0032] It can be understood that the beneficial effects of the second to fifth aspects mentioned above can be found in the relevant description of the first aspect mentioned above, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] FIG1 is a schematic structural diagram of an electronic device provided in an embodiment of the present application;

[0034] FIG2 is a schematic diagram of a virtual memory technology provided by an embodiment of the present application;

[0035] FIG3 is a schematic diagram of a mapping relationship between virtual pages and physical pages provided in an embodiment of the present application;

[0036] FIG4 is a schematic flow chart of a memory management method provided by an embodiment of the present application;

[0037] FIG5 is a schematic diagram of a first virtual memory and a first physical memory provided in an embodiment of the present application;

[0038] FIG6 is a schematic diagram of the memory size required during thread execution according to an embodiment of the present application;

[0039] FIG7 is a schematic flow chart of a memory management method provided in another embodiment of the present application;

[0040] FIG8 is a schematic flow chart of a virtual memory management method provided in yet another embodiment of the present application;

[0041] FIG9 is a schematic diagram of memory areas of different size classes provided in an embodiment of the present application;

[0042] FIG10 is a schematic diagram of the use of different size classes by the rendering service provided in an embodiment of the present application;

[0043] FIG11 is a schematic diagram of the structure of a memory management device provided in an embodiment of the present application;

[0044] FIG12 is a schematic structural diagram of a chip provided in an embodiment of the present application. DETAILED DESCRIPTION

[0045] It should be understood that in the description of the embodiments of the present application, unless otherwise specified, " / " means or, for example, A / B can mean A or B; "and / or" in this article is merely a way to describe the association relationship of associated objects, indicating that three relationships can exist, for example, A and / or B can mean: A exists alone, A and B exist at the same time, and B exists alone.

[0046] In this embodiment, the terms "first" and "second" are used for descriptive purposes only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of this embodiment, unless otherwise specified, "plurality" means two or more.

[0047] First, the basic concepts involved in the embodiments of the present application are explained.

[0048] (1) Physical memory

[0049] In electronic devices, physical memory is the memory space obtained through physical memory modules. It is one of the most important resources on a computer, primarily used to provide temporary storage for the operating system and currently running programs, allowing the central processing unit (CPU) to access and perform calculations at any time. Currently, common physical memory specifications include 256MB, 512MB, 1GB, and 2GB. With the development of computer hardware, physical memory specifications of 4GB, 8GB, and even higher capacities have emerged.

[0050] (2) Virtual Memory

[0051] Virtual memory is a memory management technology used by computer operating systems. Through virtual memory technology, the operating system kernel can allocate a continuous virtual address space to each application process. The physical memory corresponding to this virtual address space is usually divided into multiple memory fragments, some of which may even be located on external disk storage. In other words, virtual memory technology allows applications to believe that they have continuous and available memory, making it easier to write apps and more efficient in using real physical memory. Furthermore, virtual memory technology allows multiple processes to share the same runtime library and improves system security by segmenting the memory space of different processes.

[0052] In some embodiments, the operating system can use virtual memory technology to temporarily store data in a portion of physical memory to disk, freeing up physical memory space for other programs to use. Accordingly, when a program needs to access the virtual memory corresponding to this portion of physical memory, the operating system will reload it into physical memory for the operating system to read.

[0053] The design of virtual memory usually has the following goals. (a) Efficiency: On the one hand, the design of virtual memory should not cause significant performance overhead during the operation of the application; on the other hand, the design of virtual memory should not occupy too many physical memory resources, thereby significantly reducing the effective utilization of physical memory. (b) Security: The design of virtual memory needs to isolate the memories of different applications from each other, that is, an application can only access its own physical memory area. (c) Transparency: The design of virtual memory needs to take into account transparency to the application, so that application developers do not need to consider the design of virtual memory when programming.

[0054] (3) Process and thread

[0055] A process is the smallest unit of resource allocation in the operating system. A process is the execution of a program. Each time a process is started, the operating system allocates a dedicated memory space to store resources such as the process control block (PCB), data segment, and program segment. Typically, each process occupies a dedicated virtual memory space.

[0056] A thread is the smallest unit of computation that an operating system can schedule. It is contained within a process and is the actual unit of operation within that process. A thread is a single, sequential flow of control within a process. A process can have multiple threads running concurrently, each executing different tasks in parallel. Typically, different threads within the same process share the same memory space; threads do not have separate address spaces.

[0057] (4) Kernel state and user state

[0058] Among all CPU instructions, some are particularly dangerous, such as those used to clear memory and modify the clock. Misuse of these instructions can cause the entire system to crash. If all program code could directly use these instructions, the operating system would frequently crash. Therefore, the CPU divides instructions into privileged instructions (which are more dangerous) and non-privileged instructions (which are relatively safe). Privileged instructions are only allowed to be called by the operating system itself and its associated modules; user-written applications can only use non-privileged instructions. The operating system uses privileged instructions in kernel mode and non-privileged instructions in user mode.

[0059] Kernel state: The CPU in kernel state can access any data, including peripheral devices, network cards, hard disks, etc. The CPU in kernel state can switch from one program to another.

[0060] User state: The CPU in user state can only access restricted resources and cannot directly access hardware devices such as memory. It must fall into kernel state through system calls before it can access these privileged resources.

[0061] It should be noted that switching between user mode and kernel mode requires a certain amount of time and resources, which will bring certain system overhead. If the operating system switches frequently, it may cause terminal devices to freeze.

[0062] (5) Virtual page (VP) and physical page (PP)

[0063] Paging is the process of dividing the entire virtual memory space and physical memory space into segments of fixed memory size. Such a continuous, fixed-size segment of memory space is called a page. In the Linux operating system, the size of each page is typically 4KB. Pages in the virtual memory space are called virtual pages, and their memory addresses are called virtual memory addresses (VMA). Pages in the physical memory space are called physical pages, and their memory addresses are called physical memory addresses (PMA). In memory paging technology, virtual memory addresses and physical memory addresses are mapped using a page table.

[0064] Memory fragmentation may occur during the memory allocation process, such as internal fragmentation and external fragmentation. Internal fragmentation refers to memory space that has been allocated but cannot be used. For example, the operating system allocates a first memory area to a first process, but the remaining memory in the first memory area (for example, 4 bytes) is insufficient to store the amount of data that the first process needs to store (for example, 8 bytes). This remaining memory is internal fragmentation. External fragmentation refers to memory that has not yet been allocated. This memory does not belong to any process and cannot be allocated to a new process that applies for memory space due to reasons such as the memory being too small or the address being discontinuous.

[0065] When allocating memory in pages, the operating system can divide the entire memory space into multiple pages because the page size is fixed, and each page can be allocated, so there is no external memory fragmentation problem. However, a small amount of internal fragmentation, also known as intra-page fragmentation, may occur during page use.

[0066] (6) Huge page

[0067] The mechanism of using memory pages larger than 4KB as memory mapping units is called huge pages, or simply huge pages. Currently, 2MB and 1GB are commonly used huge pages in the Linux operating system. Huge page technology allows multiple consecutive virtual pages to be mapped to multiple consecutive physical pages, thereby forming a single physical huge page. Furthermore, physical huge pages can reduce the mapping relationship between virtual and physical memory, reduce page table memory usage, and reduce the overhead of page table traversal and search, thereby improving the efficiency of memory allocation and management.

[0068] The technical solutions provided in the embodiments of the present application are described below with reference to the accompanying drawings.

[0069] FIG1 is a schematic diagram of the structure of an electronic device 100 provided in an embodiment of the present application. All functions involved in the embodiments of the present application can be implemented by the electronic device 100. For example, the electronic device 100 may include a processor 101, a communication bus 102, a first memory 103, and a second memory 104.

[0070] The processor 101 may be a general-purpose central processing unit, a network processor (NP), a microprocessor, or one or more integrated circuits for implementing the solution of the present application, such as an application-specific integrated circuit (ASIC), a programmable logic device (PLD), or a combination thereof. The above-mentioned PLD may be a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a generic array logic (GAL), or any combination thereof. The electronic device 100 may include one or more processors 101, each of which may be a single-core processor or a multi-core processor. The processor here may refer to one or more devices, circuits, and / or processing cores for processing data (such as computer program instructions).

[0071] The communication bus 102 is used to transmit information between the above components. The communication bus 102 can be divided into an address bus, a data bus, a control bus, etc. For ease of illustration, only one thick line is used in the figure, but this does not mean that there is only one bus or only one type of bus.

[0072] The first memory 103, also known as the main memory, may include or correspond to at least one of a random-access memory (RAM) (e.g., digital random-access memory (DRAM), static random-access memory (SRAM)), a cache memory, a register, and a read-only memory (ROM) (e.g., programmable read-only memory (PROM), erasable programmable read-only memory (EPROM)). The main memory can be directly accessed by the processor of the computer, especially the CPU. The first memory 103 is used to provide the electronic device 100 with a running memory for the program, and is also known as the physical memory of the electronic device 100. The first memory 103 may exist independently and be connected to the processor 101 via the communication bus 102. Alternatively, the first memory 103 may also be integrated with the processor 101.

[0073] The second memory 104 can be a hard disk, an optical disk (including a compact disc read-only memory (CD-ROM), a compressed optical disk, a laser disk, a digital versatile disk, a Blu-ray disk, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer.

[0074] In some embodiments, the electronic device 100 may further include a communication interface 105 , an output device 106 , and an input device 107 .

[0075] The communication interface 105 can use any transceiver-type device for communicating with other devices or communication networks. The communication interface 105 includes a wired communication interface and may also include a wireless communication interface. The wired communication interface may be an Ethernet interface. The Ethernet interface may be an optical interface, an electrical interface, or a combination thereof. The wireless communication interface may be a wireless local area network (WLAN) interface, a cellular network communication interface, or a combination thereof.

[0076] Output device 106 communicates with processor 101 and can display information in various ways. For example, output device 106 can be a liquid crystal display (LCD), a light emitting diode (LED) display device, a cathode ray tube (CRT) display device, or a projector. Input device 107 communicates with processor 101 and can receive user input in various ways. For example, input device 107 can be a mouse, keyboard, touch screen device, or sensor device.

[0077] In some embodiments, the first memory 103 is used to store program code 108 for executing the solution of the present application, and the processor 101 can execute the program code 108 stored in the first memory 103. The program code may include one or more software modules, and the electronic device 100 can implement the memory management method provided in each embodiment below through the processor 101 and the program code 108 in the memory 103.

[0078] In the embodiment of the present application, the electronic device 100 may be a mobile phone, a tablet computer (Pad), a smart TV, a projector, a wearable device (such as a smart watch), an in-vehicle device, an augmented reality (AR) / virtual reality (VR) device, an ultra-mobile personal computer (UMPC), a netbook, a personal digital assistant (PDA), an in-vehicle computer, or other electronic device equipped with an AI assistant. The embodiment of the present application does not limit the specific type of the electronic device 100.

[0079] In electronic device 100, after launching an application process, processor 101 needs to allocate process execution space in physical memory (i.e., first memory 103) for each application to store related execution data. However, physical memory in electronic devices is limited, and when multiple application processes are running simultaneously, the physical memory may be exhausted. To this end, virtual memory technology is commonly used in current electronic devices. Virtual memory technology allows application processes to not be completely located in physical memory, that is, it does not require that all virtual memory of an application process have corresponding physical memory. Specifically, when each application process is created, it is allocated a continuous virtual address space (which can be larger than the actual physical memory). When the application process is executed, the amount of physical memory allocated to it is based on the actual physical memory used. In addition, virtual memory technology allows multiple application processes to share physical memory, that is, a physical page can be mapped to the virtual memory addresses (VMAs) of multiple application processes. During memory allocation, a physical page can be exclusively used by a single application process, corresponding to a single VMA; or a page can be shared by multiple application processes, corresponding to multiple VMAs.

[0080] FIG2 is a schematic diagram of a virtual memory technology provided by an embodiment of the present application. The diagram illustrates the process of an application requesting virtual memory and using physical memory based on the virtual memory. The details are as follows.

[0081] When an application starts a process, it requests virtual memory from the processor's memory allocator through a memory allocation request. This memory allocation request is typically implemented as a memory allocation function, such as Allocator(), malloc(), realloc(), or calloc(). malloc() is a memory allocation function provided by the C language standard library and has two implementations: brk() and mmap(). brk() is used to request a small block of memory (i.e., memory ≤ 128KB) from the heap area of ​​virtual memory. Memory allocated by brk() is not returned to the operating system, thereby improving memory access efficiency. mmap() is used to request memory from a mapping area in virtual memory. The allocated memory is directly returned to the operating system upon release. mmap() is a system call function used to create a memory mapping. It maps files, devices, or anonymous memory into the virtual address space of a process. Through memory mapping, a process can directly access the contents of the mapped area through virtual addresses, thereby improving file access efficiency and simplifying data sharing. Accordingly, when the physical memory is no longer used (that is, the operating system no longer needs to access the memory mapping area), the application calls the munmap() function to release the memory mapping and release related resources.

[0082] It should be noted that after the memory allocator receives memory allocation requests from various processes, it allocates virtual memory to each process instead of physical memory. When the allocated virtual memory is first accessed by a process and causes a page fault, the operating system will establish a mapping between the virtual memory that caused the page fault and the available physical memory, so that the data of each process is stored in the physical memory mapped by the virtual memory.

[0083] Specifically, the memory allocator maintains a page table for each process of the application in the memory management unit (MMU). The page table is used to record the mapping relationship between virtual pages and physical pages. For example, as shown in Figure 3, in the page table of process A maintained by the MMU, virtual page 0 corresponds to physical page 6, virtual page 1 corresponds to physical page 2, virtual page 2 corresponds to physical page 7, virtual page 3 corresponds to physical page 0, and virtual page 4 corresponds to physical page 4. It can be seen that the virtual pages in the virtual memory space are continuous, while the physical pages are discrete. The MMU is used to perform address translation, that is, after receiving the virtual address sent by the CPU, it converts it into the corresponding physical address according to the page table and accesses the physical space actually corresponding to the physical address in order to read and write data.

[0084] For example, when the CPU generates a page fault exception due to accessing virtual addresses 1 to 10 located in virtual page 1, the MMU establishes a mapping relationship between virtual page 1 and physical memory, for example, a mapping relationship between virtual page 1 and physical page 2. After this mapping relationship is determined, the correspondence between each virtual memory address in virtual page 1 and each physical memory address in physical page 2 is determined. In addition, if the virtual memory accessed by the process happens to be in a virtual page for which a mapping relationship has been established, a page fault exception will not be generated. If the virtual memory has not been accessed, no mapping relationship is established between the corresponding virtual page and physical page.

[0085] It should be noted that after each page fault exception, the operating system needs to enter (or trap) kernel state from user state to allocate physical memory addresses, update the page table, and finally return to user state to resume process execution. Understandably, since processes frequently access virtual memory during execution, this will cause the operating system to frequently generate page fault exceptions and switch between user and kernel states, resulting in a significant delay in the access allocation process.

[0086] With the advancement of computer technology, electronic devices are experiencing extensive and frequent physical memory allocations in scenarios where user experience is highly conscious, such as application rotation and screen scrolling. As application developers develop more and more new features, the need for memory allocation becomes increasingly frequent. However, modern operating systems have complex memory allocators, resulting in long single memory allocation and release call paths and the consumption of numerous instructions, which slows down physical memory allocation. Furthermore, frequent memory allocations and releases lead to severe physical memory fragmentation, increasing the likelihood of device lag and slowdowns as devices are used. Furthermore, current memory allocator implementations adhere to the principle of minimizing physical memory fragmentation, resulting in relatively frequent memory allocations and failing to consider the actual performance requirements of mobile devices.

[0087] To this end, an embodiment of the present application provides a memory management method that, when an application process initially creates a thread, combines the memory portrait of the thread to pre-apply a larger physical memory for the thread running in the application process. The physical memory includes one or more physical large pages. This method can reduce page fault exceptions caused by memory access in each thread during subsequent operation, thereby reducing the number of times the operating system falls from user mode to kernel mode, reducing memory application latency, improving the effective utilization of physical memory, increasing thread execution speed, reducing terminal lag, and improving user experience.

[0088] The following takes the first process of the application as an example to specifically illustrate the memory management method provided in the embodiment of the present application.

[0089] It should be noted that the first process may include one or more threads, such as a first thread and a second thread, and these threads share the memory space (including virtual memory and physical memory) of the first process. Taking the first thread as the thread initially started by the first process as an example, the memory management method provided in this embodiment is as follows.

[0090] Figure 4 is a schematic flow chart of a memory management method provided in one embodiment of the present application. The method is applied to an electronic device and specifically includes the following steps S400 to S404.

[0091] S400: When the first process starts, apply for process virtual memory for the first process.

[0092] After starting a first process, the electronic device first allocates virtual memory for the first process, which in this embodiment is referred to as process virtual memory. This process virtual memory is a large, contiguous memory space that can be larger than the actual physical memory. For example, if the physical memory is 2GB, the process virtual memory of the first process can be 1GB, 2GB, or 4GB.

[0093] It should be noted that although the electronic device has applied for process virtual memory for the first process, it has not yet established a mapping relationship between the process virtual memory and the actual physical memory. In other words, the first process is currently unable to use the physical memory. The electronic device needs to further apply for physical memory based on the virtual memory usage of each thread in the first process. In other words, it needs to establish a mapping relationship between the required portion of virtual memory and the corresponding physical memory so that the first process can access this portion of physical memory based on the virtual memory.

[0094] This embodiment uses the memory estimate of the first thread started in the first process (e.g., the first thread) as a reference to pre-allocate a large amount of physical memory (including large physical pages) for use by each thread of the first process, thereby improving the memory management efficiency of the electronic device. The specific process is shown in S401 to S404.

[0095] S401 : When a first thread of a first process is created, determine a memory estimation value of the first thread.

[0096] In this embodiment, the memory estimate of the first thread, also referred to as a memory portrait, represents the amount of memory required during the execution of the first thread. This memory estimate can be determined based on empirical data or historical memory data for the first thread. This historical memory data refers to the amount of memory used by the first thread during its historical execution. For example, this memory estimate can be 32MB, 128MB, 256MB, or 1GB.

[0097] The electronic device can set the same memory estimation value for each thread of each application. Alternatively, the electronic device can set different memory estimation values ​​for threads of different types of applications. Alternatively, the electronic device can maintain an application whitelist and set a fixed memory estimation value for applications on the whitelist (such as system applications), while setting customized memory estimation values ​​for non-whitelist applications (such as third-party applications). Alternatively, the electronic device can set corresponding memory estimation values ​​for different threads of different applications. This embodiment does not limit the specific numerical value of the memory estimation value.

[0098] S402: Determine a first virtual memory from the process virtual memory according to the memory estimation value of the first thread.

[0099] In one possible implementation, the first virtual memory is close to the estimated memory value and is an integer multiple of the physical huge page size. The first virtual memory can be greater than, equal to, or less than the estimated memory value, and this embodiment does not limit this. The size of the physical huge page can be 2M, 1G, or other values, and this embodiment does not limit this.

[0100] For example, when the physical huge page size is 2MB and the estimated memory size of the first thread is 127.5MB, the electronic device can determine a first virtual memory from the process virtual memory that is an integer multiple of 2MB and close to 127.5MB, such as 126MB, 128MB, or 130MB. It should be noted that the virtual memory addresses of the first virtual memory are generally continuous so that a large continuous physical memory can be allocated.

[0101] S403: Determine a first physical memory according to the first virtual memory, where the first physical memory includes K physical huge pages, where K is greater than or equal to 1 and is an integer.

[0102] In this embodiment, the first virtual memory and the first physical memory have the same size, and the first physical memory includes K physical huge pages. Taking the physical huge page size of 2MB as an example, when the first virtual memory is 128MB, the first physical memory is also 128MB and includes 64 2MB physical huge pages.

[0103] Of course, in some special cases, such as insufficient physical memory or severe physical memory fragmentation, the memory allocator may not be able to allocate physical huge pages to the first physical memory, that is, the entire memory of the first physical memory is allocated in the form of physical pages. Alternatively, only some physical huge pages can be allocated to the first physical memory, while the rest of the physical memory is allocated in the form of physical pages.

[0104] S404: Establish a mapping relationship between the first virtual memory and the first physical memory.

[0105] In some embodiments, based on the first physical memory including K physical large pages, the operating system can divide the first virtual memory into K virtual memory areas, the size of each virtual memory area is the same as the size of a physical large page, and establish a mapping relationship between the K virtual memory areas and the K physical large pages, which is the mapping relationship between the first virtual memory and the first physical memory.

[0106] For example, as shown in Figure 5, the first physical memory is 128MB and includes 64 physical huge pages of 2MB each, namely physical huge page 0 to physical huge page 63. Based on this, the operating system can also divide the first virtual memory into 64 virtual memory areas, such as virtual memory area 0 to virtual memory area 63, each of which is 2MB. Then, the operating system can establish a one-to-one mapping relationship between physical huge pages 0 to physical huge page 63 and virtual memory areas 0 to virtual memory areas 63. This mapping relationship is the mapping relationship between the first virtual memory and the first physical memory.

[0107] After establishing the mapping relationship, the electronic device stores it in the MMU page table so that the first thread can access it during execution. It can be understood that since the first physical memory includes physical large pages, the mapping relationships in the page table can be reduced, reducing the occupation of the page table on the physical memory and saving physical memory space.

[0108] It should be noted that, during the execution of the first thread, the first process may also create other threads, such as one or more second threads. After the second threads are successfully created, they use the first virtual memory together with the first thread, that is, the first thread and the second thread share the first virtual memory.

[0109] When multiple threads of a first process share a first virtual memory, the memory allocator (such as TCMalloc) of the electronic device can allocate the first virtual memory to each thread according to a preset rule. For example, the ratio of the memory estimation values ​​of the multiple threads can be determined first, and the first virtual memory can be allocated to each thread according to the ratio. For example, if the first virtual memory of the first process includes 256M and the first process includes a first thread and a second thread, when the ratio of the memory estimation values ​​of the first thread and the second thread is 3:1, the memory allocator allocates 192M of virtual memory to the first thread and 64M of virtual memory to the second thread.

[0110] In summary, since the electronic device pre-allocated a large area of ​​first physical memory when the first process initially created a thread, each thread of the first process can, in most cases, directly access the first physical memory based on the mapping relationship between the first virtual memory and the first physical memory during subsequent operation. Therefore, this method can reduce the occurrence of page fault exceptions during the operation of each thread, reduce the number of times the electronic device falls from user mode to kernel mode to apply for physical memory, and thus reduce the memory allocation delay of each thread in the first process, thereby improving the operation speed of the electronic device, reducing application lag, and providing a better user experience.

[0111] In addition, the electronic device concentrates the memory application operations within the life cycle of each thread and directly applies for one or more physical large pages during the thread initialization phase, which can reduce memory fragmentation of the physical memory, make the physical address more continuous, and improve the read and write performance of the electronic device.

[0112] The amount of memory required by a thread at different stages of its operation is usually different, as shown in Figure 6. In addition, while the first thread is running, the electronic device can also create or terminate a second thread. Therefore, the first virtual memory requested by the electronic device during the thread initialization phase may be insufficient or may be sufficient. When memory is insufficient, the CPU needs to fall from user mode to kernel mode to request physical memory, resulting in a long memory allocation delay; when memory is sufficient, it will cause physical memory waste.

[0113] Therefore, to balance memory allocation latency and the physical memory usage of each thread, the CPU can dynamically adjust the size of the first virtual memory based on the usage of the first virtual memory by each thread. For example, the CPU can dynamically adjust the size of the first virtual memory based on the usage ratio of the first virtual memory by each currently running thread (such as the first thread and the second thread); or dynamically adjust the size of the first virtual memory based on the number of times M that the operating system enters kernel mode within a preset time period. The details are as follows.

[0114] (1) Dynamically adjusting the size of the first virtual memory according to the usage ratio of the first virtual memory

[0115] 7 is a schematic flow chart of a memory management method provided in another embodiment of the present application. The method is applied to an electronic device and specifically includes the following steps S701 to S704.

[0116] S701, determining the current usage ratio of the first virtual memory.

[0117] In this embodiment, the usage ratio of the first virtual memory is the ratio of the usage amount of the first virtual memory to the total amount. For example, if the first virtual memory is 128M and the usage amount is 64M, the usage ratio of the first virtual memory is 64M / 128M=50%.

[0118] S702: Determine whether the usage ratio is greater than or equal to a ratio threshold.

[0119] In this embodiment, the ratio threshold may be a preset value, such as 85%, 90%, 95%, etc., which is not specifically limited in this embodiment. It is understood that the higher the ratio threshold, the less physical memory each thread typically occupies, but the frequency of page fault exceptions typically increases. Conversely, the lower the ratio threshold, the more physical memory each thread typically occupies, but the frequency of page fault exceptions typically decreases.

[0120] S703: When the usage ratio is greater than or equal to the ratio threshold, add a first memory amount to the first virtual memory, and establish a mapping relationship between the virtual memory corresponding to the first memory amount and the physical memory.

[0121] When the usage ratio of the first virtual memory is greater than or equal to the ratio threshold, it indicates that the first virtual memory is heavily used, with little or no remaining memory. Consequently, the threads of the first process may frequently request memory during subsequent execution, causing the electronic device to frequently fall from user mode to kernel mode. To minimize this, the electronic device proactively increases physical memory for each thread in the form of physical huge pages when it detects that the usage ratio of the first virtual memory is greater than or equal to the ratio threshold.

[0122] Optionally, the second physical memory includes at least one physical huge page. It is understood that applying for additional physical memory in the form of physical huge pages can reduce the number of physical memory applications, thereby reducing the number of times the electronic device falls from user mode to kernel mode, reducing the overall memory allocation latency during the execution of each thread, improving the smoothness of application operation, and thus improving the user experience.

[0123] It should be noted that, for the increased first memory amount, the memory allocator of the electronic device allocates the corresponding virtual memory to each thread. Specifically, when the first process only includes the first thread, the entire virtual memory is allocated to the first thread. Alternatively, when the first process includes multiple threads at the same time, the increased virtual memory can be allocated to the multiple threads according to preset rules. For example, the memory allocator can first determine the ratio of the memory estimation values ​​of the multiple threads, and allocate the virtual memory to each thread according to the ratio. Taking the first memory amount as 8M, and the first process including the first thread and the second thread as an example, when the ratio of the memory estimation values ​​of the first thread and the second thread is 3:1, the memory allocator allocates 6M virtual memory to the first thread and 2M virtual memory to the second thread.

[0124] In addition, the first memory amount can be a preset value, such as 2M, corresponding to one physical large page. Alternatively, the first memory amount can be a dynamically changing value. For example, the operating system can determine the size of the first memory amount based on the number M of times the operating system falls into kernel mode due to memory application by at least one thread in the first process. There is a preset mapping relationship between M and the first memory amount. For example, when M is between 1 and 500, the first memory amount is 2M, including one physical large page; when M is between 501 and 1000, the first memory amount is 4M, including two physical large pages.

[0125] S704: When the usage ratio is less than the ratio threshold, reduce the second memory amount of the first virtual memory, and cancel the mapping relationship between the virtual memory corresponding to the second memory amount and the physical memory.

[0126] When the usage ratio of the first virtual memory is less than the ratio threshold, it means that the usage of the first virtual memory is small, the surplus is large, and the corresponding first physical memory is partially idle. In this case, the CPU can apply to release the unoccupied portion of the first physical memory to reduce the actual physical memory usage of each thread.

[0127] Optionally, when the usage ratio of the first virtual memory is less than the ratio threshold and there is at least one unused physical large page in the first physical memory, the second memory amount is reduced to the first virtual memory, and the mapping relationship between the virtual memory corresponding to the second memory amount and the physical memory (including at least one physical large page) is released.

[0128] In this embodiment, the first memory amount and the second memory amount may be the same or different in size. For example, if the first memory amount is 4MB, the corresponding physical memory includes two 2MB physical huge pages. If the second memory amount is 2MB, the corresponding physical memory includes one 2MB physical huge page.

[0129] Through steps S701 to S704, the electronic device dynamically adjusts the physical memory currently occupied by each thread in the first process using large physical pages, maintaining its usage ratio near a threshold. This method increases the granularity of memory management, reduces the computing power overhead of frequently requesting and releasing physical memory, and reduces the memory allocation latency of each thread. This can increase the running speed of the first process, reduce terminal lag, and enhance the user experience.

[0130] (2) Dynamically adjust the size of the first virtual memory according to the number of times the CPU falls into kernel state

[0131] 8 is a schematic flow chart of a virtual memory management method provided in another embodiment of the present application. The method is applied to an electronic device and specifically includes the following steps S801 to S804.

[0132] S801, in the process of each thread of the first process using the first virtual memory, determining the number M of times the operating system falls from the user state to the kernel state within a preset time, where M≥0 and is an integer.

[0133] Because the threads of the first process share the first virtual memory, when the operating system falls into kernel mode during the execution of the first process, it is usually because the first virtual memory is insufficient for each thread, resulting in a page fault exception. The more times the operating system falls into kernel mode, the more frequently the first virtual memory is insufficient. To this end, the electronic device can count the number of times the electronic device falls into kernel mode within a preset time (e.g., per second) and adjust the first virtual memory based on M.

[0134] S802: Determine whether M is equal to 0. In other words, determine whether a page fault exception occurs in the operating system.

[0135] S803: If M is not equal to 0, add a first memory amount to the first virtual memory and establish a mapping relationship between the virtual memory corresponding to the first memory amount and the physical memory. Optionally, the physical memory corresponding to the first memory amount includes at least one physical huge page.

[0136] Among them, S803 can refer to the relevant content in S703 and will not be repeated here.

[0137] S804: If M is equal to 0, reduce the second memory size from the first virtual memory and remove the mapping relationship between the virtual memory corresponding to the second memory size and the physical memory. Optionally, the physical memory corresponding to the second memory size includes at least one physical huge page.

[0138] Among them, S804 can refer to the relevant content in S704 and will not be repeated here.

[0139] Through the above steps S801 to S804, the electronic device dynamically adjusts the size of the physical memory accessible to each thread in the form of physical large pages according to the number of times M that the operating system falls into kernel mode, thereby increasing the granularity of physical memory management, reducing the computing power overhead of frequently requesting and releasing memory, reducing memory request latency, and improving the running speed of the first process.

[0140] In this embodiment, for the virtual memory allocated to each thread, the memory allocator usually divides each virtual page in the virtual memory into multiple different storage areas (such as Span) to store objects of different size classes.

[0141] A storage area (such as a Span) includes one or more virtual pages. Multiple virtual pages within the same Span can be continuous or discontinuous. A Span is used to store objects of a size class. For example, Span1 is used to store objects of size class 1, and Span2 is used to store objects of size class 2. By managing memory through Span, on the one hand, data can be stored across pages within the same Span, reducing internal memory fragmentation; on the other hand, data sets of the same size class can be stored together, reducing external memory fragmentation.

[0142] A size class is used to represent a group of objects of the same size level. For example, as shown in Table 1, size class 1 is used to represent objects that occupy 4 bytes. Size class 2 is used to represent objects that occupy 8 bytes. Size class 3 is used to represent objects that occupy 16 bytes. Size class 4 is used to represent objects that occupy 32 bytes, and so on. We will not explain them one by one here. The purpose of size class is to manage memory more efficiently. When the operating system needs to allocate an object of a specific size, the memory allocator will select the corresponding size class based on the size of the object, and then allocate memory from that size class. This can avoid memory fragmentation and improve memory utilization.

[0143] It should be noted that in an operating system, the number of size classes and the size of objects corresponding to each size class can be determined according to needs, and this embodiment does not limit this.

[0144] Table 1

[0145] Taking the example of the virtual pages in the first virtual memory including VP0~VPn, as shown in Figure 9, the memory allocator allocates VP0 as Span1 to size class1, allocates VP1~VP2 as Span2 to size class2, allocates VP3~VP4 as Span3 to size class3, allocates VP5~VP6 as Span4 to size class4, allocates VP7~VP10 as Span5 to size class5, and so on.

[0146] It should be noted that the allocation rule of the virtual memory of each thread by the memory allocator can be determined according to the memory portrait of each size class in the thread, or can be a preset rule, which is not limited in this embodiment.

[0147] The same thread's runtime requirements for different size classes often differ. For example, as shown in Figure 10, the thread corresponding to the render service accesses size class 5 (used to store 48-byte objects) the most. It also accesses size classes 4, 6, and 12 relatively frequently, while accessing data in other size classes is relatively rare.

[0148] It can be understood that during the operation of the first thread, the size classes corresponding to the memory requested and released at different times may be different. Therefore, some size class spans may have surplus memory, while some size class spans may have insufficient memory, thereby causing a page fault exception, causing the operating system of the electronic device to fall from user mode to kernel mode. In order to more accurately control the use of physical memory by each thread, the electronic device can adjust the size of the storage area (i.e., span) of each size class within each thread with each size class as the object. It should be noted that electronic devices usually adjust spans in units of pages, such as adding a virtual page to the span to be adjusted and establishing a mapping relationship between the virtual page and the physical page; or subtracting a virtual page, and when the physical page corresponding to the virtual page is idle, releasing the mapping relationship between the virtual page and the physical page to release the corresponding physical memory.

[0149] In one possible implementation, the memory allocator can count the usage ratio of the span corresponding to a certain size class (such as size class 4) of the thread and adjust the size of the span corresponding to the size class based on the usage ratio. For example, when the usage ratio is greater than a ratio threshold, the span corresponding to the size class is increased, and when the usage ratio is less than the ratio threshold, the span corresponding to the size class is decreased.

[0150] In another possible implementation, when a thread accesses a span corresponding to a certain size class (such as size class 4), if the memory space of the span is insufficient, the CPU will fall from user mode to kernel mode to apply for physical memory for the span. If the memory space of the span is sufficient, the user mode will be maintained when accessing the span. Based on this, the memory allocator can determine the number of times N that the electronic device falls into kernel mode due to application of physical memory for the first size class (such as size class 4) within a preset time, where N ≥ 0 and is an integer. If N is not equal to 0, that is, N ≥ 1, the span corresponding to the first size class is increased. If N = 0, the span corresponding to the first size class is reduced.

[0151] It is worth noting that the memory management method provided in the embodiments of the present application can not only improve the memory management rate, but also reduce the instruction overhead in the memory management process.

[0152] Tables 2 and 3 show the memory allocation and release status of each size class in a thread under the memory management method provided in this embodiment. The memory allocation status includes the allocation rate and the improvement ratio of the allocation rate compared to the existing technology. The memory release status includes the release rate and the improvement ratio of the release rate compared to the existing technology.

[0153] Table 2 Memory application status

[0154] Table 3 Memory release status

[0155] Tables 2 and 3 show that, compared to existing technologies, the memory management method provided in this embodiment significantly improves memory allocation and release rates for all size classes, with single-threaded allocation and release rates increasing by more than three times. This improvement in memory allocation and release rates can significantly reduce memory management latency, increase thread execution speed, and thus reduce application lag and improve user experience.

[0156] Table 4 shows the instruction overhead for memory management (including memory allocation and memory release) for the first process in the present application and the prior art. It can be seen that in the prior art, the number of instructions A2 for memory management of the first process accounts for 66.9% of the total number of instructions A1 of the first process, and the instruction overhead is very large. However, with the memory management method provided by the present application, the number of instructions A2 for memory management of the first process only accounts for 25.9% of the total number of instructions A1 of the first process. It can be seen that the memory management method provided by this embodiment can significantly reduce the instruction overhead in the memory management process and improve the running speed of the thread.

[0157] Table 4

[0158] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0159] Based on the same inventive concept, as an implementation of the above memory management method, this embodiment also provides the following technical solution.

[0160] FIG11 is a schematic diagram of a communication device 1100 according to an embodiment of the present application. The communication device 1100 includes a memory management module 1101 , a thread creation module 1102 , and a memory determination module 1103 .

[0161] The memory management module 1101 is used to apply for process virtual memory for the first process when the first process is started.

[0162] The thread creation module 1102 is configured to create a first thread of a first process.

[0163] The memory determination module 1103 is configured to determine the estimated memory value of the first thread when the first thread of the first process is created; wherein the first thread is the first thread created by the first process.

[0164] The memory management module 1101 is further configured to determine a first virtual memory for the first thread from the process virtual memory according to the memory estimation value, and establish a mapping relationship between the first virtual memory and the first physical memory, wherein the first physical memory includes K physical large pages, where K is greater than or equal to 1 and is an integer.

[0165] Optionally, the thread creation module 1102 is further configured to: create at least one second thread of the first process, where the second thread shares the first virtual memory with the first thread.

[0166] Optionally, the memory management module 1101 is further configured to: determine a usage ratio of the first virtual memory; if the usage ratio is greater than or equal to a ratio threshold, add a first memory amount to the first virtual memory; and establish a mapping relationship between the virtual memory corresponding to the first memory amount and the physical memory, where the physical memory corresponding to the first memory amount includes at least one physical huge page. If the usage ratio is less than the ratio threshold and there is at least one unused physical huge page in the first physical memory, reduce a second memory amount from the first virtual memory; and release the mapping relationship between the virtual memory corresponding to the second memory amount and the physical memory, where the physical memory corresponding to the second memory amount includes at least one physical huge page; wherein the first memory amount is the same as or different from the second memory amount.

[0167] Optionally, the memory management module 1101 is further configured to: determine the number of times M, where M ≥ 0 and is an integer, that at least one thread in the first process causes the electronic device to fall into kernel mode due to memory application within a preset time period; if M ≥ 1, increase the first memory amount to the first virtual memory; and establish a mapping relationship between the virtual memory corresponding to the first memory amount and the physical memory, wherein the physical memory corresponding to the first memory amount includes at least one physical large page. Furthermore, if M = 0 and there is at least one unused physical large page in the first physical memory, reduce the first virtual memory by a second memory amount, wherein the first memory amount is the same as or different from the second memory amount; and release the mapping relationship between the virtual memory corresponding to the second memory amount and the physical memory, wherein the physical memory corresponding to the second memory amount includes at least one unused physical large page.

[0168] Optionally, the memory management module 1101 is also used to: before adding a first memory amount to the first virtual memory, determine the first memory amount according to M, the first memory amount is equal to the memory amount of one or more physical large pages; there is a preset mapping relationship between M and the first memory amount.

[0169] Optionally, the memory management module 1101 is further used to: after adding the first memory amount to the first virtual memory, determine the ratio of the memory estimation values ​​of each thread currently running in the first process; and allocate virtual memory corresponding to the first memory amount to each thread according to the ratio.

[0170] In this embodiment, the first virtual memory includes a first memory area, and the first memory area is used to store objects of a first size class.

[0171] Optionally, the memory management module 1101 is further used to: when the usage ratio of the first memory area is greater than or equal to the ratio threshold, increase the first memory area; when the usage ratio of the first memory area is less than the ratio threshold, reduce the first memory area.

[0172] Optionally, the memory management module 1101 is further used to: determine the number N of times the electronic device falls into kernel mode within a preset time because an object of the first size class requests physical memory, where N ≥ 0 and is an integer; when N ≥ 1, increase the first memory area; when N = 0, reduce the first memory area.

[0173] An embodiment of the present application also provides a chip, as shown in Figure 12, which includes a processor and a memory. The memory stores a computer program, and when the computer program is executed by the processor, the memory management method in the above embodiments is implemented.

[0174] An embodiment of the present application further provides a computer-readable storage medium, which stores a computer program. When the computer program is executed by a processor, it implements the memory management method provided in the above embodiments.

[0175] An embodiment of the present application also provides a computer program product, which includes a computer program. When the computer program is executed by an electronic device, the electronic device implements the memory management method provided in the above embodiments.

[0176] It should be understood that the processor mentioned in the embodiments of the present application may be a central processing unit (CPU), or may be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0177] It should also be understood that the memory mentioned in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous link dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0178] In the embodiments provided in this application, the division of each framework or module is merely a logical function division. In actual implementation, there may be other division methods, for example, multiple frameworks or modules can be combined or integrated into another system, or some features can be ignored or not executed.

[0179] In addition, the functional modules in the various embodiments of the present application may be integrated into a processing module, or each module may exist physically separately, or two or more modules may be integrated into a single module. The above-mentioned integrated modules may be implemented in the form of hardware or software functional modules.

[0180] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0181] References to "one embodiment" or "some embodiments" in this specification mean that a particular feature, structure, or characteristic described in conjunction with that embodiment is included in one or more embodiments of the present application. Thus, phrases such as "in one embodiment," "in some embodiments," "in other embodiments," and "in other embodiments" appearing in various places in this specification do not necessarily refer to the same embodiment, but rather mean "one or more but not all embodiments," unless otherwise specifically emphasized. The terms "including," "comprising," "having," and variations thereof all mean "including but not limited to," unless otherwise specifically emphasized.

[0182] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the various embodiments of the present application, and should all be included in the scope of protection of the present application.

Claims

1. A memory management method, characterized in that: Applied to electronic equipment, the method includes: When the first process starts, applying for process virtual memory for the first process; When a first thread of the first process is created, determining an estimated memory value of the first thread when the first thread is running; wherein the first thread is the first thread created by the first process; determining a first virtual memory for the first thread from the process virtual memory based on the memory estimate; A mapping relationship between the first virtual memory and the first physical memory is established, wherein the first physical memory includes K physical large pages, where K is greater than or equal to 1 and is an integer.

2. The method according to claim 1, characterized in that After establishing a mapping relationship between the first virtual memory and the first physical memory, the method further includes: At least one second thread of the first process is created, where the second thread shares the first virtual memory with the first thread.

3. The method according to claim 1 or 2, characterized in that The method further comprises: Determining a usage ratio of the first virtual memory; When the usage ratio is greater than or equal to a ratio threshold, adding a first memory amount to the first virtual memory; A mapping relationship between the virtual memory and the physical memory corresponding to the first memory amount is established, where the physical memory corresponding to the first memory amount includes at least one physical large page.

4. The method according to claim 3, characterized in that The method further comprises: When the usage ratio is less than the ratio threshold and there is at least one unused physical huge page in the first physical memory, reducing a second memory amount from the first virtual memory; Unmapping the virtual memory and the physical memory corresponding to the second amount of memory, where the physical memory corresponding to the second amount of memory includes at least one physical huge page; The first memory amount is the same as or different from the second memory amount.

5. The method according to claim 1 or 2, characterized in that The method further comprises: Determine, within a preset time period, a number M of times the electronic device falls into kernel mode due to memory application by at least one thread in the first process, where M is an integer ≥ 0; In the case where M≥1, increasing a first memory amount to the first virtual memory; A mapping relationship between the virtual memory and the physical memory corresponding to the first memory amount is established, wherein the physical memory corresponding to the first memory amount includes at least one physical large page.

6. The method according to claim 5, characterized in that The method further comprises: When M=0 and there is at least one unused physical huge page in the first physical memory, reducing a second memory amount from the first virtual memory, where the first memory amount is the same as or different from the second memory amount; The mapping relationship between the virtual memory and the physical memory corresponding to the second memory amount is released, wherein the physical memory corresponding to the second memory amount includes at least one unused physical large page.

7. The method according to any one of claims 3 to 6, characterized in that Before increasing the first memory amount to the first virtual memory, the method further includes: Determine a first memory amount according to M, where the first memory amount is equal to a memory amount of one or more physical huge pages; There is a preset mapping relationship between M and the first memory amount; M is the number of times that at least one thread in the first process causes the electronic device to fall into kernel state due to memory application within a preset time.

8. The method according to any one of claims 3 to 7, characterized in that After increasing the first memory amount to the first virtual memory, the method further includes: determining a ratio of memory estimates of respective threads currently running in the first process; According to the ratio, virtual memory corresponding to the first memory amount is allocated to each thread.

9. The method according to any one of claims 1 to 8, characterized in that The memory estimation value of the first thread is determined according to an application type of an application corresponding to the first thread, wherein there is a preset corresponding relationship between the application type and the memory estimation value.

10. The method according to any one of claims 1 to 8, characterized in that The memory estimation value of the first thread is determined according to the thread type of the first thread, wherein there is a preset corresponding relationship between the thread type and the memory estimation value.

11. The method according to any one of claims 1 to 10, characterized in that The physical huge page is 2M or 1G.

12. The method according to any one of claims 1 to 11, characterized in that The first virtual memory includes a first memory area, the first memory area is used to store objects of a first size class, and the method further includes: When the usage ratio of the first memory area is greater than or equal to a ratio threshold, increasing the size of the first memory area; When the usage ratio of the first memory area is less than the ratio threshold, the first memory area is reduced.

13. The method according to any one of claims 1 to 12, characterized in that: The first virtual memory includes a first memory area, the first memory area is used to store objects of a first size class, and the method further includes: Determine a number N of times, within a preset time period, that the electronic device falls into kernel mode due to an object of the first size class requesting physical memory, where N is an integer and greater than or equal to 0; When N≥1, increasing the first memory area; When N=0, the first memory area is reduced.

14. A terminal device, characterized in that: The method comprises a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the method according to any one of claims 1 to 13 when executing the computer program.

15. A chip, characterized in that: The chip includes a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the method according to any one of claims 1 to 13 is implemented.

16. A computer-readable storage medium, characterized in that The computer-readable storage medium stores instructions, and when the instructions are executed on a computer, the computer is caused to execute the method according to any one of claims 1 to 13.

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