Light detection device and light detection system

Abstract

A light detection device according to one embodiment of the present disclosure comprises: a light receiving element capable of receiving light and outputting a current; a connection circuit connected between the light receiving element and a first potential line; and a control circuit capable of controlling the connection circuit. The control circuit can execute control in which, after the connection circuit is brought into a low resistance state, the connection circuit is put into a high resistance state if the voltage of the light receiving element reaches a reference value.

Description

Optical detection device and optical detection system

[0001] The present disclosure relates to optical detection devices and optical detection systems.

[0002] A distance measuring device has been proposed that includes a SPAD (Single Photon Avalanche Diode) element and a pulse output unit that has a passive circuit and an active circuit (Patent Document 1).

[0003] Japanese Patent Application Laid-Open No. 2020-143959

[0004] In devices that detect light, it is desirable to improve detection performance.

[0005] It is desirable to provide a light detection device with good detection performance.

[0006] A photodetector according to an embodiment of the present disclosure includes a light-receiving element capable of receiving light and outputting a current, a connection circuit connected between the light-receiving element and a first potential line, and a control circuit capable of controlling the connection circuit. The control circuit is capable of controlling the connection circuit to be in a low resistance state and then in a high resistance state when the voltage of the light-receiving element reaches a reference value. A photodetection system according to an embodiment of the present disclosure includes a light source capable of irradiating light onto an object, and a photodetector that receives light from the object. The photodetector includes a light-receiving element capable of receiving light and outputting a current, a connection circuit connected between the light-receiving element and a first potential line, and a control circuit capable of controlling the connection circuit. The control circuit is capable of controlling the connection circuit to be in a low resistance state and then in a high resistance state when the voltage of the light-receiving element reaches a reference value.

[0007] FIG. 1 is a block diagram illustrating an example of a schematic configuration of a photodetection system according to an embodiment of the present disclosure. FIG. 2 is a diagram illustrating an example of a configuration of a pixel of a photodetection device according to an embodiment of the present disclosure. FIG. 3 is a diagram illustrating an example of a configuration of a control circuit of a photodetection device according to an embodiment of the present disclosure. FIG. 4 is a timing chart illustrating an example of an operation of a photodetection device according to an embodiment of the present disclosure. FIG. 5 is a timing chart illustrating an example of an operation of a photodetection device according to an embodiment of the present disclosure. FIG. 6 is a diagram illustrating an example of a configuration of a pixel of a photodetection device according to Modification 1 of the present disclosure. FIG. 7 is a diagram illustrating an example of a configuration of a control circuit of a photodetection device according to Modification 1 of the present disclosure. FIG. 8 is a timing chart illustrating an example of an operation of a photodetection device according to Modification 1 of the present disclosure. FIG. 9 is a timing chart illustrating an example of an operation of a photodetection device according to Modification 1 of the present disclosure. FIG. 10 is a diagram illustrating an example of a configuration of a control circuit of a photodetection device according to Modification 2 of the present disclosure. FIG. 11 is a timing chart illustrating an example of an operation of a photodetection device according to Modification 2 of the present disclosure. FIG. 12 is a timing chart illustrating an example of an operation of a photodetection device according to Modification 2 of the present disclosure. FIG. 13 is a diagram for explaining an example configuration of a pixel of a photodetection device according to Modification 3 of the present disclosure. FIG. 14 is a diagram for explaining an example configuration of a control circuit of a photodetection device according to Modification 3 of the present disclosure. FIG. 15 is a timing chart showing an example operation of a photodetection device according to Modification 3 of the present disclosure. FIG. 16 is a timing chart showing an example operation of a photodetection device according to Modification 3 of the present disclosure. FIG. 17 is a diagram for explaining an example configuration of a pixel of a photodetection device according to Modification 4 of the present disclosure. FIG. 18 is a diagram for explaining an example configuration of a control circuit of a photodetection device according to Modification 4 of the present disclosure. FIG. 19 is a timing chart showing an example operation of a photodetection device according to Modification 4 of the present disclosure. FIG. 20 is a timing chart showing an example operation of a photodetection device according to Modification 4 of the present disclosure. FIG. 21 is a diagram for explaining an example configuration of a pixel of a photodetection device according to Modification 5 of the present disclosure. FIG. 22 is a diagram for explaining another example configuration of a pixel of a photodetection device according to Modification 5 of the present disclosure. FIG. 23 is a block diagram showing an example of a schematic configuration of a vehicle control system. FIG. 24 is an explanatory diagram showing an example of installation positions of an outside vehicle information detection unit and an imaging unit.

[0008] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order: 1. Embodiment 2. Modification 3. Usage example 4. Application example

[0009] 1 is a block diagram showing an example of a schematic configuration of a light detection system according to an embodiment of the present disclosure. The light detection system 200 includes a light detection device 1, a light source control unit 210, and a light source 220. The light detection device 1 is a device capable of detecting incident light. The light detection device 1 has a plurality of pixels P including light receiving elements, and is configured to receive incident light and generate a signal.

[0010] The light receiving element of the pixel P of the photodetector 1 is, for example, an APD (Avalanche Photo Diode) and is configured to receive light and output a current. The light receiving element (light receiving unit) of each pixel P can be configured to generate a signal in response to receiving photons. The photodetector 1 receives light that has passed through an optical system (not shown) including, for example, an optical lens, and generates a signal.

[0011] The photodetector 1 is configured using, for example, a semiconductor substrate (e.g., a silicon substrate) on which light-receiving elements of each pixel P are provided. The photodetector 1 has a region (pixel section 100) in which a plurality of pixels P are provided. As shown in the example of FIG. 1 , the photodetector 1 is provided with the pixel section 100 in which a plurality of pixels P are two-dimensionally arranged in a matrix. The pixel section 100 is a pixel array in which a plurality of pixels P are arranged.

[0012] The light-receiving element of each pixel P may be configured as a single-photon avalanche diode (SPAD). The photodetector 1 captures incident light from a measurement object via an optical system including an optical lens. The light-receiving element receives light from the measurement object (e.g., infrared light, visible light, etc.) and generates charges through photoelectric conversion, thereby generating a photocurrent.

[0013] The light detection device 1 can be configured as a distance measurement sensor, an image sensor, etc. The light detection device 1 is a device capable of performing distance measurement, and is configured to be able to perform distance measurement using a time-of-flight (TOF) method, for example. The light detection device 1 is applied, for example, as a distance measurement sensor capable of measuring distance using the TOF method.

[0014] The light source 220 is configured to be capable of generating light (optical signals). The light source 220 has, for example, one or more light-emitting elements and is configured to be capable of irradiating the measurement object with light. The light-emitting element is an LD (Laser Diode), an LED (Light Emitting Diode), or the like, and can output light (infrared light, visible light, etc.) to the outside.

[0015] The light source 220 (light source unit) may generate laser light and emit the laser light to the outside. The light source 220 may be configured using a semiconductor laser element, for example, a vertical cavity surface emitting laser (VCSEL).

[0016] The light source control unit 210 is configured to be able to control the light source 220. The light source control unit 210 is a drive unit (drive circuit) configured to drive the light source 220. The light source control unit 210 is configured by a plurality of circuits including, for example, a digital-to-analog converter (DAC), an amplifier circuit, etc., and can control the operation of the light source 220.

[0017] The light source control unit 210 is configured to be able to control, for example, the current and voltage to the light emitting elements of the light source 220. The light source control unit 210 supplies the light source 220 with the current and voltage for driving the light emitting elements of the light source 220, and can control the light emission by the light source 220 (for example, the light emission timing, the light emission duration, etc.).

[0018] The light source control unit 210 can also be said to be a light source driving unit configured to be able to drive the light source 220 (or the light emitting element of the light source 220). Note that the light source 220 and the light source control unit 210 may be partially or entirely configured as an integrated unit. For example, the light source 220 and the light source control unit 210 may be partially or entirely configured as a light source device (light source unit).

[0019] The light detection system 200 can irradiate a measurement object with light (e.g., laser light) using a light source 220 and receive the light reflected by the measurement object. In the light detection device 1, for example, reflected light (returned light) reflected by the measurement object is incident on the pixel unit 100, and an electrical signal corresponding to the reception of the reflected light is detected. The electrical signal generated by receiving the reflected light from the measurement object is a signal corresponding to the distance to the measurement object.

[0020] The light detection system 200 including the light detection device 1 can transmit and receive light and measure the distance to a measurement target. As an example, the light detection device 1 is configured to detect the distance to the object (subject) that is the measurement target for each pixel P and generate image data (distance image data) related to the distance to the object. The light detection device 1 can generate, for example, a depth map.

[0021] The light detection device 1 can also be applied as a sensor capable of detecting an event, for example, an event-driven sensor (also called an EVS (Event Vision Sensor), an EDS (Event Driven Sensor), or a DVS (Dynamic Vision Sensor)). The light detection device 1 and the light detection system 200 can be applied to various electronic devices.

[0022] 1 , the photodetector 1 includes a pixel unit 100, a pixel control unit 110, a signal processing unit 112, and a control unit 113. The photodetector 1 may also include a light source control unit 210. The light source 220 may be mounted on the photodetector 1 or may be provided outside the photodetector 1.

[0023] The pixel control unit 110 is configured to be able to control each pixel P of the pixel unit 100. The pixel control unit 110 is a control circuit and is configured by a plurality of circuits including, for example, a buffer, a shift register, an address decoder, etc. The pixel control unit 110 generates signals for controlling the pixels P and outputs them to each pixel P of the pixel unit 100. The pixel control unit 110 is controlled by the control unit 113 and controls the pixels P of the pixel unit 100.

[0024] The pixel control unit 110 generates signals for controlling the pixels P, such as signals for controlling a readout circuit of the pixels P, and supplies the signals to each pixel P. The pixel control unit 110 can control the reading out of pixel signals from each pixel P. The pixel control unit 110 can also be called a pixel driving unit (pixel driving circuit) configured to be able to drive each pixel P. The pixel control unit 110 and the control unit 113 can also be called a pixel control unit collectively.

[0025] The control unit 113 is configured to be able to control each unit of the photodetector 1. The control unit 113 receives an externally provided clock, data instructing an operation mode, and the like, and can also output data such as internal information of the photodetector 1. The control unit 113 is a control circuit, and has, for example, a timing generator configured to be able to generate various timing signals.

[0026] The control unit 113 controls the driving of the pixel control unit 110, the signal processing unit 112, etc. based on various timing signals (pulse signals, clock signals, etc.) generated by the timing generator. The control unit 113 may include circuits such as a PLL (Phase Locked Loop) and a DAC (Digital to Analog Converter).

[0027] The control unit 113 is also configured to supply a signal for controlling the light source control unit 210 to the light source control unit 210 and control the operation of the light source control unit 210. The control unit 113 can be configured to be able to control the generation process of pixel signals by the pixels P of the pixel unit 100, the timing of light irradiation by the light source 220, etc.

[0028] The signal processing unit 112 is a signal processing circuit configured to be able to perform signal processing. The signal processing unit 112 is configured with circuits that perform various types of signal processing on signals output from each pixel P. The signal processing unit 112 is configured to include an arithmetic circuit, a memory circuit, etc., and can perform various types of signal processing such as noise reduction processing, TD (Time to Digital) conversion processing, and counting (accumulation) processing.

[0029] The signal processing unit 112 is configured to acquire a signal from each pixel P and generate and output a signal related to the distance to the measurement target. The signal processing unit 112 may, for example, perform various signal processing on the signal from each pixel to generate and output distance image data representing the distance to the measurement target. The signal processing unit 112 and the control unit 113 may be configured integrally. The signal processing unit 112 and the control unit 113 may include a processor and a memory.

[0030] 1 , the signal processing unit 112 includes, for example, a conversion unit 120 and a calculation unit 130. The signal processing unit 112 may include a pulse shaping circuit configured to shape a pixel signal that becomes a pulse signal read out from the pixel P. The pulse shaping circuit may be provided for each pixel P or for each set of multiple pixels P, for example.

[0031] The conversion unit 120 is configured to be able to convert an input pixel signal into a digital signal related to the timing of light reception at the pixel P. The conversion unit 120 is configured, for example, by a TDC (Time to Digital Converter) circuit. The conversion unit 120 is configured, for example, to convert a pixel signal, which is a pulse signal generated by the pixel P, into a digital signal corresponding to the elapsed time from when light is emitted by the light source 220 to when light is received by the light receiving element of the pixel P.

[0032] The conversion unit 120 is configured using a flip-flop circuit, a delay circuit (e.g., a delay buffer), a counter circuit, etc. The conversion unit 120 is a TD conversion unit (TD conversion circuit) and is provided, for example, for each pixel P or for each set of pixels P. Pixel signals that become pulse signals sequentially read out from each pixel P are subjected to TD conversion processing by the conversion unit 120, for example, and converted into digital signals that indicate the timing of receiving reflected light from the measurement target.

[0033] The conversion unit 120 (conversion circuit) can output, as a converted pixel signal, a digital signal corresponding to the time from when light is emitted by the light source 220 to when reflected light (returned light) is received by the light receiving element. As an example, the conversion unit 120 converts the pixel signal, which is a pulse signal, into a digital signal with a predetermined number of bits and outputs it as a signal indicating the round-trip time of light (i.e., time of flight).

[0034] The conversion unit 120 may measure the time from the start of light irradiation by the light source 220 to the transition timing (rising edge or falling edge) of the pixel signal corresponding to the reception of reflected light, and generate a signal indicating a count value as the converted pixel signal. Based on the pulse signal output from the pixel P, the conversion unit 120 may output a signal indicating a count value corresponding to the period from the start of light irradiation of the measurement object to the reception of reflected light from the measurement object as the converted pixel signal.

[0035] In the light detection system 200, for example, the light source 220 repeatedly starts and stops emitting light, and the pixels P repeatedly detect reflected light (returned light). In the light detection device 1, pixel signals sequentially output from each pixel P by multiple distance measurements are converted into digital signals by conversion processing in the conversion unit 120.

[0036] The calculation unit 130 is configured to acquire pixel signals of the pixels P and perform signal processing. The calculation unit 130 is configured to generate a signal (distance signal) related to the distance to the measurement object based on the pixel signals converted by the conversion unit 120, for example. The calculation unit 130 can analyze the pixel signals of each pixel P to generate and output image data (distance image data) including the distance signal for each pixel P.

[0037] The calculation unit 130 has, for example, a histogram generation unit 135 and is configured to be able to generate a histogram of pixel signals. The histogram generation unit 135 (histogram generation circuit) is configured, for example, to generate, for each pixel P, a histogram of count values ​​corresponding to the signal values ​​of the pixel signals, i.e., the round-trip time of light.

[0038] The histogram generating unit 135 generates data relating to the correspondence between count values ​​corresponding to the round-trip time of light and the frequency (number) of count values ​​as histogram data, and can store the data in an internal memory or the like of the signal processing unit 112. For example, the histogram generating unit 135 classifies the count values ​​into predetermined intervals (ranges), i.e., into classes (BIN), and generates histogram data showing the distribution of count values ​​according to the distance to the measurement target.

[0039] The calculation unit 130 is configured to be able to calculate the distance to the measurement target based on a peak value (maximum value) in a histogram of pixel signal values. For example, the calculation unit 130 calculates (estimates) the difference between the start time of light irradiation and the time of arrival of reflected light, i.e., the round-trip time (time of flight) of light, based on the pixel signal value (count value) whose frequency in the histogram indicates a peak value.

[0040] The calculation unit 130 is configured to calculate the distance between the light detection device 1 and the measurement object using, for example, the calculated round-trip time. The calculation unit 130 calculates the distance to the object for each pixel P and generates a distance signal related to the distance to the object. The distance to the measurement object is determined based on the time it takes for light irradiated from the light source 220 to be reflected by the measurement object and reach the light detection device 1. The signal processing unit 112 can generate distance image data including the distance signal for each pixel P using the calculation unit 130 and output it to the outside of the light detection device 1.

[0041] The pixel unit 100, pixel control unit 110, signal processing unit 112, control unit 113, etc. may be provided on a single substrate or may be provided separately on multiple substrates. The photodetector 1 may have a structure (a stacked structure) formed by stacking multiple substrates. Some or all of the pixel control unit 110, signal processing unit 112, and control unit 113 may be integrally configured.

[0042] 2 is a diagram illustrating an example of the configuration of a pixel of a photodetector according to an embodiment. A pixel P of the photodetector 1 includes a light-receiving element 10 and a readout circuit 20. For example, the readout circuit 20 is provided for each light-receiving element 10. The light-receiving element 10 is configured to receive light and generate a signal.

[0043] The light receiving element 10 is, for example, a single photon avalanche diode (SPAD) and has a multiplication region (multiplication section) capable of avalanche multiplication. The light receiving element 10 converts incident photons into electric charges and outputs a signal P1, which is an electrical signal corresponding to the incident photons. The light receiving element 10 can also be referred to as a photoelectric conversion element (photoelectric conversion section) configured to be able to photoelectrically convert light.

[0044] The light receiving element 10 is electrically connected to, for example, a power supply line, an electrode, etc. that can supply a predetermined voltage. In the example shown in Fig. 2, one electrode of the light receiving element 10, that is, a cathode, is electrically connected to a current source 25 and a connection circuit 30. The other electrode of the light receiving element 10, that is, an anode, is connected to the reference potential line.

[0045] The anode of the light receiving element 10 is electrically connected to, for example, a wiring, electrode, or the like to which a relatively low power supply voltage is supplied. In the example shown in Fig. 2, a voltage VSP is applied to the anode of the light receiving element 10 from a power supply unit (voltage source) capable of supplying voltage via a potential line L2 serving as a power supply line. The voltage VSP is, for example, a negative voltage.

[0046] The readout circuit 20 is configured to be able to output a signal based on the current of the light receiving element 10. The readout circuit 20 includes circuits for reading out a signal based on the photocurrent flowing through the light receiving element 10, such as a current source 25, a connection circuit 30, an output circuit 40, and a control circuit 50.

[0047] 2, the readout circuit 20 of the pixel P includes a connection circuit 30, a control circuit 50, etc., and has a configuration compatible with the Active Recharge method. As will be described later, the readout circuit 20 of the pixel P can recharge the light receiving element 10 using the connection circuit 30, the control circuit 50, etc.

[0048] The current source 25 is configured to be able to supply current to the light receiving element 10. The current source 25 is electrically connected in series to the light receiving element 10. The current source 25 is electrically connected to a potential line L1 and is able to supply current to the light receiving element 10. The potential line L1 is a wiring to which a predetermined potential (voltage) is applied. In the example shown in FIG. 2 , the potential line L1 is a power supply line to which a power supply voltage VDD is applied.

[0049] The current source 25 is configured using, for example, a P-type transistor (e.g., a PMOS transistor), and is electrically connected in series between the light receiving element 10 and the potential line L1. For example, one of the source and drain of the transistor of the current source 25 is electrically connected to the potential line L1 to which the power supply voltage VDD is applied, and the other of the source and drain of the transistor is electrically connected to the light receiving element 10.

[0050] The transistor constituting the current source 25 generates a current corresponding to the signal level of a signal input to its gate, and can supply the generated current to the light receiving element 10. The current source 25 can also be considered a supply unit (supply circuit) configured to be able to supply current and voltage. Note that the current source 25 (supply circuit) may be configured using a resistive element.

[0051] The connection circuit 30 is connected between the light receiving element 10 and the potential line L1. The connection circuit 30 is controlled by a signal input from the control circuit 50. The connection circuit 30 is controlled to a low resistance state (i.e., a low impedance state) or a high resistance state (i.e., a high impedance state) according to the signal voltage input from the control circuit 50, for example. The connection circuit 30 can also be said to be a load circuit connected to the light receiving element 10.

[0052] The connection circuit 30 is configured using, for example, a switch, and is electrically connected in series between the light receiving element 10 and the potential line L1. The switch of the connection circuit 30 is on / off controlled by a control circuit 50. In the example shown in FIG. 2 , the connection circuit 30 is configured to electrically connect or disconnect the potential line L1 and the light receiving element 10 based on a signal XAR input from the control circuit 50.

[0053] The connection circuit 30 is controlled by the control circuit 50 and configured to be able to recharge the light receiving element 10. The connection circuit 30 is electrically connected to a potential line L1 to which a power supply voltage VDD is supplied, and can supply current and voltage to the light receiving element 10. In the example shown in Fig. 2, the connection circuit 30 is configured by a switch SW1 that electrically connects or disconnects the potential line L1 and the light receiving element 10. The switch SW1 is configured using, for example, a transistor.

[0054] The switch SW1 is configured using, for example, a P-type transistor (e.g., a PMOS transistor). One of the source and drain of the transistor configuring the switch SW1 is electrically connected to, for example, the potential line L1, and the other of the source and drain of the transistor is electrically connected to the light receiving element 10.

[0055] The control circuit 50 is configured to be able to control the connection circuit 30. The control circuit 50 includes, for example, a delay circuit, as will be described later. The control circuit 50 is configured, for example, using logic circuits such as a NAND circuit and a NOR circuit. The control circuit 50 is configured to be able to control the connection circuit 30 and recharge the light receiving element 10.

[0056] The control circuit 50 generates and outputs a signal XAR that controls the connection circuit 30 based on a signal corresponding to the voltage of the light receiving element 10, and controls the supply of current and voltage to the light receiving element 10. The control circuit 50 can output the signal XAR, which is, for example, a pulse signal, to the connection circuit 30 and control the timing of recharging the light receiving element 10.

[0057] For example, the control circuit 50 supplies a signal XAR generated based on the voltage of the light receiving element 10 to the switch SW1, turning the switch SW1 on (conducting state) or off (non-conducting state). The control circuit 50 can execute active recharging of the light receiving element 10 by controlling the connection circuit 30.

[0058] A voltage can be applied between the cathode and anode of the light receiving element 10, by the voltage supplied via the current source 25 or the connection circuit 30 and the voltage VSP supplied by the potential line L2, resulting in a potential difference greater than the breakdown voltage of the light receiving element 10. In other words, the potential difference across the light receiving element 10 can be set to a potential difference greater than the breakdown voltage.

[0059] When a reverse bias voltage greater than the breakdown voltage is applied to the light receiving element 10, the element 10 enters a state in which it can operate in Geiger mode. In Geiger mode, the light receiving element 10 may experience an avalanche multiplication phenomenon in response to incident photons, generating a pulsed current. In the pixel P, a signal P1 corresponding to the photocurrent flowing through the light receiving element 10 due to the incident photons is output to the output circuit 40.

[0060] After avalanche multiplication occurs and the potential difference between the electrodes of the light-receiving element 10 becomes smaller than the breakdown voltage, the connection circuit 30 turns on and recharges the light-receiving element 10, making it possible for the light-receiving element 10 to operate in Geiger mode again. The connection circuit 30 can recharge the light-receiving element 10 with electric charge and recharge the voltage of the light-receiving element 10.

[0061] The output circuit 40 is configured to generate a signal PFOUT based on the signal P1 generated by the light receiving element 10. The output circuit 40 can output the signal PFOUT as a voltage signal based on the current of the light receiving element 10. The output circuit 40 is configured, for example, by an inverter (INV).

[0062] The output circuit 40 has, for example, an input section 41 and an output section 42, and can output an inverted signal of an input signal. In the example shown in Fig. 2, the output circuit 40 is configured with an INV circuit 45 (inverter circuit). The INV circuit 45 is configured with, for example, a PMOS transistor and an NMOS transistor connected in series between the potential line L1 and a reference potential line. In the example shown in Fig. 2, the reference potential line is a ground line.

[0063] An input section 41 of the output circuit 40 is electrically connected to, for example, the cathode of the light receiving element 10, the current source 25, and the connection circuit 30. In the example shown in Figure 2, the input section 41 of the output circuit 40 (i.e., the INV circuit 45) is electrically connected to a node N1 that connects the light receiving element 10, the current source 25, and the connection circuit 30. An output section 42 of the output circuit 40 is electrically connected to the control circuit 50.

[0064] The output circuit 40 receives the signal P1 from the light-receiving element 10. The signal level of the signal P1, i.e., the voltage (potential) of the signal P1, varies depending on the current flowing through the light-receiving element 10. For example, when the voltage of the signal P1 is higher than a reference value (the threshold voltage of the INV circuit 45 in the example shown in FIG. 2 ), the output circuit 40 outputs a low-level signal PFOUT. When the voltage of the signal P1 is lower than the reference value, the output circuit 40 outputs a high-level signal PFOUT.

[0065] The output circuit 40 may output a signal PFOUT, which is a pulse signal based on the voltage of the signal P1, to the signal processing unit 112 (see FIG. 1 ). The signal PFOUT is also input from the output circuit 40 to the control circuit 50. The output circuit 40 may output the signal PFOUT, which corresponds to, for example, the voltage of the light receiving element 10 and a reference value (threshold value), to the signal processing unit 112 and the control circuit 50. The output circuit 40 may be configured by an AND circuit, a NAND circuit, an OR circuit, a NOR circuit, or the like.

[0066] 3 is a diagram showing an example of the configuration of a control circuit of a photodetector according to an embodiment. The control circuit 50 has an output circuit 60 and a delay circuit 70. For example, as shown in the example of FIG. 3, the output circuit 60 is configured by a NAND circuit. The output circuit 60 receives the signal PFOUT from the output circuit 40, the signal AR_EN which is an enable signal, and the signal FD_OUT. In the case of the active recharge method, the signal AR_EN is set to a high level.

[0067] The output circuit 60 is configured to be able to output a signal SOUT corresponding to the signals PFOUT and FD_OUT. For example, when the signals AR_EN and FD_OUT are both at a high level, a signal corresponding to the signal PFOUT is output as the signal SOUT to the delay circuit 70 via the output circuit 60.

[0068] The delay circuit 70 is configured to delay an input signal and output the delayed signal. The delay circuit 70 (delay unit) is configured to be able to change the amount of delay. The delay circuit 70 is configured using, for example, multiple stages of INV circuits (inverter circuits) or buffer circuits. In the example shown in FIG. 3 , the delay circuit 70 includes a delay circuit 71 and a delay circuit 72.

[0069] The delay circuit 71 receives the signal SOUT, which is the output signal of the output circuit 60. The delay circuit 71 is configured to output a signal obtained by delaying the signal SOUT input from the output circuit 60. The delay circuit 71 includes, for example, a plurality of INV circuits (INV circuits 81a, 81b, 81c, and 81d in FIG. 3). Each of the INV circuits 81a to 81d is configured using a PMOS transistor and an NMOS transistor connected in series.

[0070] The delay circuit 71 can delay the signal SOUT using the INV circuits 81a to 81d to generate and output the signal XAR. In the example shown in Fig. 3, the signal SOUT is input from the output circuit 60 to the INV circuit 81a in the initial stage (first stage) of the delay circuit 71. The INV circuit 81a outputs a signal S1, which is an inverted signal of the signal SOUT, to the INV circuit 81b.

[0071] The INV circuit 81b outputs a signal S2, which is an inverted version of the signal S1, to the INV circuit 81c. The INV circuit 81c outputs a signal S3, which is an inverted version of the signal S2, to the INV circuit 81d. The INV circuit 81d outputs a signal XAR, which is an inverted version of the signal S3. The delay circuit 71 can output the signal XAR from the final-stage INV circuit 81d to the connection circuit 30 and the delay circuit 72.

[0072] The delay circuit 71 has a delay control unit 83 and is configured to change the amount of delay. The delay control unit 83 is a delay control circuit and includes, for example, an INV circuit 81b and a current source 82. The delay control unit 83 is a circuit portion configured to change the amount of delay and can also be called a delay control stage (or delay adjustment stage). The current source 82 is configured to supply a current based on a voltage VBF as a control voltage.

[0073] 3, the current source 82 is configured with an NMOS transistor. The current source 82 generates a current according to the voltage VBF and supplies the generated current to the INV circuit 81b. By adjusting the value (level) of the voltage VBF, the current flowing through the INV circuit 81b is controlled, and the amount of delay in the delay control unit 83 is controlled. Note that the current source 82 may be configured with a PMOS transistor, if necessary.

[0074] For example, when the voltage VBF, which is the control voltage, decreases, the amount of current that can be supplied by the current source 82 decreases, and the amount of delay (i.e., delay time) in the delay circuit 71 including the delay control unit 83 increases. In the example shown in Figure 3, the fall time of the signal S2, which is the output signal of the INV circuit 81b, becomes longer. In other words, the transition time of the signal S2 from high level to low level becomes longer.

[0075] Furthermore, as the voltage VBF increases, the amount of current that can be supplied by the current source 82 increases, and the amount of delay in the delay circuit 71 including the delay control unit 83 decreases. In the example shown in Figure 3, the fall time of the signal S2 becomes shorter. In other words, the transition time from high level to low level of the signal S2 becomes shorter.

[0076] The pixel control unit 110 of the photodetector 1 (see FIG. 1 ) can change the amount of delay in the delay circuit 71 and change the output timing of the signal XAR, for example, by changing the voltage VBF supplied to the delay circuit 71. The pixel control unit 110 can adjust the transition time (e.g., fall time) of the signal S2 by controlling the voltage VBF, for example, and adjust the output timing of the low-level signal XAR.

[0077] The delay circuit 72 receives the signal XAR, which is the output signal of the delay circuit 71. The delay circuit 72 is configured to output a signal obtained by delaying the signal XAR. The delay circuit 72 includes, for example, a plurality of INV circuits (INV circuits 85a and 85b in FIG. 3). The INV circuit 85a and the INV circuit 85b are each configured using a PMOS transistor and an NMOS transistor connected in series.

[0078] The delay circuit 72 can delay the signal XAR using the INV circuits 85a and 85b to generate and output the signal FD_OUT. In the example shown in Figure 3, the signal XAR is input to the INV circuit 85a of the delay circuit 72 from the delay circuit 71. The INV circuit 85a outputs a signal S5, which is an inverted signal of the signal XAR, to the INV circuit 85b.

[0079] The INV circuit 85b outputs a signal FD_OUT that is an inverted signal of the signal S5. The delay circuit 72 can output the signal FD_OUT to the output circuit 60 by the INV circuit 85b. The delay circuit 72 also has a delay control unit 86, as in the example shown in FIG. 3, and is configured to be able to change the amount of delay.

[0080] The delay control unit 86 is a delay control circuit and includes, for example, an INV circuit 85b and a current source 87. The delay control unit 86 is a circuit portion configured to be able to change the amount of delay, and can also be called a delay control stage (or delay adjustment stage). The current source 87 is configured to supply a current based on the voltage VBR as a control voltage.

[0081] 3, the current source 87 is configured with an NMOS transistor. The current source 87 generates a current according to the voltage VBR and supplies the generated current to the INV circuit 85b. By adjusting the value (magnitude) of the voltage VBR, the current flowing through the INV circuit 85b is controlled, and the amount of delay in the delay control unit 86 is controlled. Note that the current source 87 may be configured with a PMOS transistor, if necessary.

[0082] For example, when the voltage VBR, which is the control voltage, decreases, the amount of current that can be supplied by the current source 87 decreases, and the amount of delay in the delay circuit 72 including the delay control unit 86 increases. In the example shown in Figure 3, the fall time of the signal FD_OUT, which is the output signal of the INV circuit 85b, becomes longer. In other words, the transition time of the signal FD_OUT from high level to low level becomes longer.

[0083] Furthermore, as the voltage VBR increases, the amount of current that can be supplied by the current source 87 increases, and the amount of delay in the delay circuit 72 including the delay control unit 86 decreases. In the example shown in FIG. 3 , the fall time of the signal FD_OUT decreases. That is, the transition time from high level to low level of the signal FD_OUT decreases.

[0084] The pixel control unit 110 can change the amount of delay in the delay circuit 72 and change the transition time (e.g., fall time) of the signal FD_OUT by changing the voltage VBR supplied to the delay circuit 72. The pixel control unit 110 can adjust the transition timing of the signal SOUT from a low level to a high level and change the pulse width of the signal XAR by adjusting, for example, the fall time of the signal FD_OUT.

[0085] A signal XAR is input from a delay circuit 71 of the control circuit 50 to a connection circuit 30 (see FIG. 2) of the readout circuit 20. The connection circuit 30 electrically connects or disconnects a potential line L1, to which a power supply voltage VDD is applied, and a node N1 in response to the signal XAR. A switch SW1 of the connection circuit 30 is turned on and off in response to the signal XAR, thereby controlling the recharging of the light receiving element 10.

[0086] 2 , the INV circuit 45, which is the output circuit 40, transitions the voltage of the signal PFOUT from low to high when the voltage of the signal P1 becomes smaller than the threshold voltage of the INV circuit 45 due to the reception of photons by the light receiving element 10. In this case, the control circuit 50 transitions the voltage of the signal XAR from high to low using the output circuit 60 and the delay circuit 70, transitioning the connection circuit 30 from a high resistance state to a low resistance state.

[0087] When the voltage of the signal P1 becomes greater than the threshold voltage of the INV circuit 45 as the light receiving element 10 is recharged by the connection circuit 30 and the current source 25, the output circuit 40 changes the voltage of the signal PFOUT from high to low. In this way, the output circuit 40 can output the signal PFOUT, which becomes a pulse signal, as a pixel signal to the signal processing unit 112 (see FIG. 1).

[0088] 4 is a timing chart showing an example of operation of the photodetector according to the embodiment. An example of operation of the photodetector 1 will be described with reference to the timing chart of FIG. 4. In FIG. 4, signals P1, PFOUT, SOUT, S1, S2, XAR, and FD_OUT are shown on the same time axis.

[0089] 4, the threshold voltage Vth1 of the output circuit 40 (INV circuit 45) to which the signal P1 is input, the threshold voltage Vth2 of the INV circuit 81c to which the signal S2 is input, and the threshold voltage Vth3 of the output circuit 60 (NAND circuit) to which the signal FD_OUT is input are each indicated by a dashed line. Furthermore, in FIG. 4, the timing of incidence of a photon on the light receiving element 10 is indicated by a hollow arrow.

[0090] At time t0, a photon is incident on the light receiving element 10, causing avalanche multiplication. Time t0 is the timing at which the light receiving element 10 receives light, and can also be said to be the timing at which the light receiving element 10 responds. Time t1, which follows time t0, is the timing at which the voltage of the signal P1 decreases and reaches the threshold voltage Vth1, and is the timing at which the signal PFOUT transitions from low level to high level.

[0091] When avalanche multiplication occurs in the light-receiving element 10, the current flowing through the light-receiving element 10 increases, reducing the potential difference between the cathode and anode of the light-receiving element 10. During the period from time t0 to time t2, the cathode voltage of the light-receiving element 10, i.e., the voltage of the signal P1, decreases.

[0092] During the period from time t0 to time t2, the potential difference between the electrodes of the light receiving element 10 becomes smaller than the breakdown voltage, thereby stopping (quenching) the avalanche multiplication. As the voltage of the signal P1 decreases, the output circuit 40 changes the voltage of the signal PFOUT from low to high.

[0093] The control circuit 50 changes the voltage of the signal SOUT from high to low in response to the voltage of the signal PFOUT, and changes the voltage of the signal S1 from low to high. In the delay circuit 70 of the control circuit 50, when the voltage of the signal S2 becomes equal to or lower than the threshold voltage Vth2 of the INV circuit 45, the signal XAR changes from high to low.

[0094] 4, after a delay time Ta has elapsed since time t1, the control circuit 50 changes the voltage of the signal XAR from high to low. At time t3, after the delay time Ta has elapsed since time t1, the signal XAR goes low, causing the connection circuit 30 to enter a low resistance state, i.e., an ON state.

[0095] When the connection circuit 30 is in a low resistance state (on state), the light receiving element 10 is recharged via the connection circuit 30. The delay time Ta is a time according to the amount of signal delay in the delay control unit 83 (delay control stage) described above, and corresponds to the fall time of the signal S2.

[0096] During the period from time t3 to time t4, when a current (recharge current) is supplied to the light receiving element 10 from the connection circuit 30, the potential difference between the electrodes of the light receiving element 10 increases. During the period from time t3 to time t4, the cathode voltage of the light receiving element 10, i.e., the voltage of the signal P1, rises.

[0097] When the potential difference between the electrodes of the light receiving element 10 becomes greater than the breakdown voltage, the light receiving element 10 is again able to operate in Geiger mode. As the voltage of the signal P1 increases, the output circuit 40 changes the voltage of the signal PFOUT from high to low. As shown in the example of FIG. 4, when the voltage of the signal P1 reaches the threshold voltage Vth1 of the output circuit 40, the signal PFOUT transitions from high to low.

[0098] The control circuit 50 changes the voltage of the signal SOUT from low to high in response to the voltage of the signal PFOUT, and transitions the voltage of the signal S1 from high to low. The signal XAR also transitions from low to high. The control circuit 50 transitions the voltage of the signal XAR from low to high after a delay time Tb from time t3, when the connection circuit 30 is placed in the low resistance state.

[0099] At time t4, which is a delay time Tb after time t3, signal XAR goes high, causing connection circuit 30 to enter a high resistance state, i.e., an OFF state. When connection circuit 30 enters the high resistance state (OFF state), recharging of light-receiving element 10 via connection circuit 30 is stopped. Note that delay time Tb is different from delay time Ta.

[0100] As described above, the control circuit 50 of the photodetector 1 is configured to be able to control the connection circuit 30 based on a signal corresponding to the voltage of the photodetector 10. For example, as shown in the example of Fig. 4, the control circuit 50 can execute control to put the connection circuit 30 into a high resistance state when the voltage of the signal P1, i.e., the cathode voltage of the photodetector 10, reaches a threshold voltage Vth1 serving as a reference value. This makes it possible to prevent deterioration of the detection performance of the photodetector 1.

[0101] In this embodiment, the control circuit 50 can detect the completion of recharging of the light receiving element 10 and turn off the connection circuit 30, thereby reducing the deterioration of dead time. This can prevent the dead time, i.e., the period during which the falling edge of the cathode voltage of the light receiving element 10 cannot be detected, from increasing. Even when light is incident on the light receiving element 10 immediately after recharging is completed, a pixel signal corresponding to the received photons can be obtained, making it possible to measure distances with high accuracy.

[0102] Furthermore, the control circuit 50 is configured to be able to control the delay times Ta and Tb by controlling the voltages VBF and VBR as described above. For example, the control circuit 50 can control the low-level pulse width of the signal XAR by adjusting the voltages VBF and VBR. This makes it possible to prevent an increase in dead time due to manufacturing variations. Appropriate active recharge can be performed, enabling accurate light detection.

[0103] 5 is a timing chart showing an example of operation of the photodetector according to the embodiment. The example of operation of the photodetector 1 will be further described with reference to the timing chart of FIG. 5. At time t10, a photon is incident on the photodetector 10, causing avalanche multiplication. The current flowing through the photodetector 10 increases, and the potential difference between the cathode and anode of the photodetector 10 decreases. During the period from time t10 to time t12, the cathode voltage of the photodetector 10, i.e., the voltage of the signal P1, decreases.

[0104] During the period from time t10 to time t12, the potential difference between the electrodes of the light receiving element 10 becomes smaller than the breakdown voltage, thereby stopping avalanche multiplication. As the voltage of the signal P1 decreases, the output circuit 40 transitions the voltage of the signal PFOUT from low to high. Time t11 is the timing when the signal PFOUT transitions from low to high.

[0105] The control circuit 50 changes the voltage of the signal SOUT from high to low in response to the voltage of the signal PFOUT, and changes the voltage of the signal S1 from low to high. At time t13, which is a delay time Ta after time t11, the voltage of the signal S2 drops to or below the threshold voltage Vth2, causing the signal XAR to change from high to low.

[0106] At time t13, signal XAR goes low, causing connection circuit 30 to enter a low resistance state, i.e., an ON state. Between time t13 and time t14, connection circuit 30 enters a low resistance state (conducting state). Also, between time t13 and time t14, photons are incident on light receiving element 10, causing a current to flow between connection circuit 30 and light receiving element 10, and the voltage of signal S1 becomes substantially constant, as shown in FIG.

[0107] In the delay circuit 70 of the control circuit 50, the signal SOUT transitions from low to high when the voltage of the signal FD_OUT becomes equal to or lower than the threshold voltage Vth3 of the output circuit 60. As shown in Figure 5, the control circuit 50 changes the voltage of the signal SOUT from low to high after a delay time Tb has elapsed since time t13. When the signal SOUT transitions to high, the signal XAR transitions to high.

[0108] At time t14, which is a delay time Tb after time t13, signal XAR goes high, causing connection circuit 30 to enter a high resistance state, i.e., an OFF state. This stops recharging light receiving element 10 via connection circuit 30. Note that delay time Tb is a time according to the amount of delay in delay control unit 86 described above, and corresponds to the fall time of signal FD_OUT.

[0109] In this embodiment, the control circuit 50 is configured to adjust the delay time Tb by controlling the voltage VBR as described above. This allows the time during which the signal XAR is at a low level, i.e., the time during which the connection circuit 30 is in a low resistance state, to be appropriately adjusted. This shortens the period during which the voltage of the signal S1 remains substantially constant due to the incidence of photons. This reduces the dead time and improves distance measurement accuracy.

[0110] [Operations and Effects] The photodetector (photodetector 1) according to this embodiment includes a light-receiving element (light-receiving element 10) that can receive light and output a current, a connection circuit (connection circuit 30) that is connected between the light-receiving element and a first potential line (e.g., potential line L1), and a control circuit (control circuit 50) that can control the connection circuit. The control circuit can execute control to set the connection circuit to a low resistance state and then set the connection circuit to a high resistance state when the voltage of the light-receiving element reaches a reference value.

[0111] In the photodetector 1 according to this embodiment, the control circuit 50 can execute control to set the connection circuit 30 to a low resistance state and then set the connection circuit 30 to a high resistance state when the voltage of the light receiving element 10 reaches a reference value (e.g., threshold voltage Vth1). This can prevent the dead time from worsening. This makes it possible to realize a photodetector with good performance.

[0112] Next, a modified example of the present disclosure will be described. In the following, the same components as those in the above embodiment will be denoted by the same reference numerals, and the description thereof will be omitted as appropriate.

[0113] 2. Modifications (2-1. Modification 1) FIG. 6 is a diagram illustrating an example configuration of a pixel of a photodetector according to Modification 1 of the present disclosure. FIG. 7 is a diagram illustrating an example configuration of a control circuit of the photodetector according to Modification 1. The photodetector 1 may have the configurations shown in FIGS. 6 and 7. As shown in FIG. 7, the control circuit 50 of the photodetector 1 has an output circuit 60, an output circuit 65, and a delay circuit 70.

[0114] The delay circuit 70 is configured to output a signal obtained by delaying the signal SOUT input from the output circuit 60. The delay circuit 70 has a delay control unit 83 and a delay control unit 86. In the example shown in FIG. 7 , the delay control unit 86 includes an INV circuit 81a and a current source 87. The current source 87 is provided for the INV circuit 81a and is electrically connected to the INV circuit 81a. The current source 87 is configured to generate a current based on the voltage VBR and to be able to supply the generated current to the INV circuit 81a.

[0115] The delay control unit 83 includes an INV circuit 81b and a current source 82. The current source 82 is provided for the INV circuit 81b and electrically connected to the INV circuit 81b. The current source 82 is configured to generate a current based on the voltage VBF and supply the generated current to the INV circuit 81b. The delay circuit 70 can delay the signal SOUT using the INV circuits 81a to 81c to generate and output the signal S3. The delay circuit 70 outputs the signal S3 to the output circuit 65 from the final-stage INV circuit 81c.

[0116] The output circuit 65 is configured by a NAND circuit, for example, as shown in the example of Fig. 7. One input section (input terminal) of the output circuit 65 is electrically connected to the output circuit 40 (see Fig. 6) without passing through the delay circuit 70. The signal PFOUT is input to one input section of the output circuit 65 from the output circuit 40, and the signal S3 is input to the other input section of the output circuit 65 from the delay circuit 70.

[0117] The output circuit 65 is configured to output a signal XAR corresponding to the signal PFOUT and the signal S3. The output circuit 65 can output the signal XAR to the connection circuit 30 and the output circuit 60. The signal XAR output by the output circuit 65 is also input to the switch SW2 of the delay circuit 70. The output circuit 65 may be configured using an AND circuit or other logic circuit.

[0118] The switch SW2 is electrically connected in series between the INV circuit 81a and the reference potential line. The switch SW2 is configured using, for example, a transistor. As an example, the switch SW2 is configured using an N-type transistor (e.g., an NMOS transistor). The on / off of the switch SW2 is controlled by the signal XAR.

[0119] 7, the switch SW2 is electrically connected to a node N2 that connects the INV circuit 81a and the current source 87. The switch SW2 electrically connects or disconnects the node N2 to or from a wiring (i.e., a ground line) to which a voltage VSS (e.g., 0 V) ​​is applied.

[0120] 8 and 9 are timing charts showing an example of the operation of the photodetector according to Modification 1. In each of FIGS. 8 and 9, signals P1, PFOUT, SOUT, S1, S2, and XAR are shown on the same time axis. During the period from time t0 to time t2, when a photon is incident on the light-receiving element 10 and avalanche multiplication occurs, the cathode voltage of the light-receiving element 10, i.e., the voltage of signal P1, decreases.

[0121] During the period from time t0 to time t2, the output circuit 40 transitions the voltage of the signal PFOUT from low to high as the voltage of the signal P1 decreases. The control circuit 50 transitions the voltage of the signal SOUT from high to low and the voltage of the signal S1 from low to high in accordance with the voltage of the signal PFOUT.

[0122] At time t3, which is a delay time Ta after time t1, the voltage of signal S2 drops to or below threshold voltage Vth2, causing signal XAR to transition from high to low. When signal XAR goes low, connection circuit 30 enters a low resistance state, i.e., an ON state.

[0123] During the period from time t3 to time t4, connection circuit 30 enters a low resistance state, causing recharging of light receiving element 10 via connection circuit 30. The cathode voltage of light receiving element 10, i.e., the voltage of signal P1, rises. As the voltage of signal P1 rises, output circuit 40 changes the voltage of signal PFOUT from high to low.

[0124] When the voltage of signal P1 reaches threshold voltage Vth1, signal PFOUT transitions from high to low. When signal PFOUT transitions to low, output circuit 65 transitions signal XAR from low to high. At time t4, which is a delay time Tb after time t3, signal XAR transitions to high, causing connection circuit 30 to enter a high resistance state, i.e., an off state.

[0125] In this modification, when the voltage of signal P1, i.e., the cathode voltage of light receiving element 10, reaches threshold voltage Vth1 as a reference value, low-level signal PFOUT is input to output circuit 65, and signal XAR goes high. Control circuit 50 can output low-level signal XAR to connection circuit 30 without passing through delay circuit 70, thereby executing control to place connection circuit 30 in a high-resistance state. This makes it possible to prevent the dead time from becoming worse.

[0126] The control circuit 50 is also configured to be able to control the delay times Ta and Tb shown in Figure 8 or 9 by controlling the voltages VBF and VBR. The control circuit 50 can control the low-level pulse width of the signal XAR, for example, by adjusting the voltages VBF and VBR. This makes it possible to prevent an increase in dead time due to manufacturing variations and to perform distance measurement with high accuracy.

[0127] (2-2. Modification 2) FIG. 10 is a diagram showing an example of the configuration of a control circuit of a photodetector according to Modification 2. FIGS. 11 and 12 are timing charts showing an example of the operation of the photodetector according to Modification 2. As in the example shown in FIG. 10, the output circuit 65 may have a delay control stage including a current source 87. The current source 87 is formed of, for example, a PMOS transistor. The output circuit 65 may be formed as a NAND circuit with a delay circuit.

[0128] The control circuit 50 is configured to be able to change the delay times Ta and Tb shown in FIG. 11 or 12 by controlling the voltages VBF and VBR. For example, the control circuit 50 can adjust the low-level pulse width of the signal XAR by adjusting the voltages VBF and VBR. This prevents the dead time from becoming longer, enabling accurate distance measurement.

[0129] In this modified example, the same effects as those of the above-described embodiment can be obtained. Furthermore, the number of elements can be reduced compared to when the output circuit 65 and the delay control stage including the current source 87 are provided separately. It is also possible to prevent an increase in the circuit area of ​​the control circuit 50, the readout circuit 20, etc.

[0130] (2-3. Modification 3) FIG. 13 is a diagram for explaining an example configuration of a pixel of a photodetector according to Modification 3. FIG. 14 is a diagram showing an example configuration of a control circuit of the photodetector according to Modification 3. Also, FIGS. 15 and 16 are timing charts showing an example operation of the photodetector. The control circuit 50 may be configured to control the connection circuit 30 based on a signal P1. In the example shown in FIG. 13, the control circuit 50 is electrically connected to a node N1.

[0131] A signal P1 corresponding to the voltage of the light receiving element 10 is input to the control circuit 50. An inverted signal of the signal P1 is input to the output circuit 60 of the control circuit 50 by an INV circuit 88. The control circuit 50 generates a signal XAR based on the signal P1 and outputs it to the connection circuit 30, thereby controlling the supply of current and voltage to the light receiving element 10. In the case of this modification, the same effects as those of the above-described embodiment can be obtained.

[0132] (2-4. Modification 4) FIG. 17 is a diagram for explaining an example of the configuration of a pixel of a photodetector according to Modification 4. FIG. 18 is a diagram showing an example of the configuration of a control circuit of a photodetector according to Modification 4. FIGS. 19 and 20 are timing charts showing an example of the operation of the photodetector. In the example shown in FIG. 17, the cathode of the photodetector 10 is electrically connected to the potential line L1. The anode of the photodetector 10 is electrically connected to a current source 25, a connection circuit 30, and an output circuit 40.

[0133] The connection circuit 30 is configured, for example, with an NMOS transistor, and is electrically connected in series between the light receiving element 10 and the potential line L2. An inverted signal of the signal PFOUT is input to the output circuit 60 of the control circuit 50 by an INV circuit 88. Furthermore, a signal AR, which is an inverted signal of the signal XAR, is input to the connection circuit 30 by an INV circuit 89. In the case of this modification, the same effects as those of the above-described embodiment can be obtained.

[0134] 18 , when the voltage of signal P1, i.e., the anode voltage of light receiving element 10, drops below threshold voltage Vth1 as a reference value, high-level signal PFOUT is input to control circuit 50, and signal AR goes low. Control circuit 50 can output low-level signal AR to connection circuit 30 without using delay circuit 70, thereby executing control to place connection circuit 30 in a high-resistance state. This makes it possible to prevent the dead time from becoming worse.

[0135] The control circuit 50 is also configured to be able to control the delay times Ta and Tb shown in Figure 19 or 20 by controlling the voltages VBF and VBR. The control circuit 50 can adjust the low-level pulse width of the signal AR, for example, by adjusting the voltages VBF and VBR. This makes it possible to prevent an increase in dead time due to manufacturing variations, and enables accurate distance measurement.

[0136] (2-5. Modification 5) In the above-described embodiment and modification, exemplary configurations of the photodetector 1 have been described, but these are merely examples, and the configuration of the photodetector 1 is not limited to the examples shown. For example, as shown in FIG. 21 , the current source 25 may be configured by a transistor (e.g., a PMOS transistor). Furthermore, the connection circuit 30 may be configured by a transistor, e.g., a PMOS transistor.

[0137] 22, the readout circuit 20 may have a current source 35 connected between the potential line L1 and the connection circuit 30. The current source 35 is electrically connected in series to, for example, a PMOS transistor that constitutes the connection circuit 30. Note that, as an example, the current source 35 may be constituted by a PMOS transistor.

[0138] The configurations and arrangements of the delay control unit 83 and the delay control unit 86 described above are not limited to the illustrated example and can be modified as appropriate. For example, the delay control unit 83 or the delay control unit 86 may be provided for an odd-numbered INV circuit among a plurality of INV circuits. The current source 82 of the delay control unit 83 or the current source 87 of the delay control unit 86 may be configured using a PMOS transistor.

[0139] At least one of the delay control unit 83 and the delay control unit 86 may be configured to change the delay amount using a resistive element or a capacitive element. As an example, the delay control unit 83 and the delay control unit 86 may each be configured to include at least one of a variable resistive unit and a variable capacitive unit.

[0140] 3. Usage Examples The above-described light detection device 1 and light detection system 200 can be used in various cases for sensing light such as visible light, infrared light, ultraviolet light, and X-rays, for example, as follows.・Devices for taking images for viewing purposes, such as digital cameras and mobile devices with camera functions. ・Devices for traffic purposes, such as in-vehicle sensors that take images of the front, rear, surroundings, and interior of a car for safe driving such as automatic stopping, and for recognizing the driver's state, surveillance cameras that monitor moving vehicles and roads, and distance measuring sensors that measure distances between vehicles. ・Devices for home appliances such as televisions, refrigerators, and air conditioners that take images of user gestures and operate the device according to those gestures. ・Devices for medical and healthcare purposes, such as endoscopes and devices that take images of blood vessels by receiving infrared light. ・Devices for security purposes, such as surveillance cameras for crime prevention and cameras for person authentication. ・Devices for beauty purposes, such as skin measuring devices that take images of the skin and microscopes that take images of the scalp. ・Devices for sports purposes, such as action cameras and wearable cameras for sports, etc. ・Devices for agricultural purposes, such as cameras to monitor the condition of fields and crops.

[0141] 4. Application Examples (Application Examples to Mobile Bodies) The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure may be realized as a device mounted on any type of mobile body, such as an automobile, an electric vehicle, a hybrid electric vehicle, a motorcycle, a bicycle, personal mobility, an airplane, a drone, a ship, or a robot.

[0142] FIG. 23 is a block diagram showing a schematic configuration example of a vehicle control system, which is an example of a mobile object control system to which the technology according to the present disclosure can be applied.

[0143] The vehicle control system 12000 includes a plurality of electronic control units connected via a communication network 12001. In the example shown in Fig. 23, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an outside-vehicle information detection unit 12030, an inside-vehicle information detection unit 12040, and an integrated control unit 12050. Also shown as functional components of the integrated control unit 12050 are a microcomputer 12051, an audio / video output unit 12052, and an in-vehicle network I / F (interface) 12053.

[0144] The drivetrain control unit 12010 controls the operation of devices related to the drivetrain of the vehicle in accordance with various programs. For example, the drivetrain control unit 12010 functions as a control device for a drive force generating device for generating a drive force of the vehicle, such as an internal combustion engine or a drive motor, a drive force transmission mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0145] The body system control unit 12020 controls the operation of various devices equipped in the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for a keyless entry system, a smart key system, a power window device, or various lamps such as headlamps, backup lamps, brake lamps, turn signals, and fog lamps. In this case, radio waves transmitted from a portable device that serves as a key or signals from various switches can be input to the body system control unit 12020. The body system control unit 12020 receives these radio waves or signals and controls the vehicle's door lock device, power window device, lamps, etc.

[0146] The outside-vehicle information detection unit 12030 detects information outside the vehicle equipped with the vehicle control system 12000. For example, an imaging unit 12031 is connected to the outside-vehicle information detection unit 12030. The outside-vehicle information detection unit 12030 causes the imaging unit 12031 to capture images outside the vehicle and receives the captured images. The outside-vehicle information detection unit 12030 may perform object detection processing or distance detection processing for people, cars, obstacles, signs, characters on the road surface, etc. based on the received images.

[0147] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image or as distance measurement information. The light received by the imaging unit 12031 may be visible light or invisible light such as infrared light.

[0148] The in-vehicle information detection unit 12040 detects information inside the vehicle. For example, a driver state detection unit 12041 that detects the state of the driver is connected to the in-vehicle information detection unit 12040. The driver state detection unit 12041 includes, for example, a camera that captures an image of the driver, and the in-vehicle information detection unit 12040 may calculate the degree of fatigue or concentration of the driver based on the detection information input from the driver state detection unit 12041, or may determine whether the driver is dozing off.

[0149] The microcomputer 12051 can calculate control target values ​​for the driving force generating device, steering mechanism, or braking device based on the information inside and outside the vehicle acquired by the outside-vehicle information detection unit 12030 or the inside-vehicle information detection unit 12040, and output control commands to the drive system control unit 12010. For example, the microcomputer 12051 can perform cooperative control aimed at realizing the functions of an ADAS (Advanced Driver Assistance System), including vehicle collision avoidance or impact mitigation, following driving based on the inter-vehicle distance, vehicle speed maintenance driving, vehicle collision warning, vehicle lane departure warning, etc.

[0150] In addition, the microcomputer 12051 can perform cooperative control for the purpose of autonomous driving, which allows the vehicle to travel autonomously without relying on driver operation, by controlling the driving force generating device, steering mechanism, braking device, etc. based on information about the surroundings of the vehicle obtained by the outside vehicle information detection unit 12030 or the inside vehicle information detection unit 12040.

[0151] Furthermore, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information outside the vehicle acquired by the outside information detection unit 12030. For example, the microcomputer 12051 can control the headlamps according to the position of a preceding vehicle or an oncoming vehicle detected by the outside information detection unit 12030, and perform cooperative control aimed at preventing glare, such as switching from high beams to low beams.

[0152] The audio / video output unit 12052 transmits at least one of audio and video output signals to an output device capable of visually or audibly notifying information to vehicle occupants or the outside of the vehicle. In the example of Fig. 23, the output devices are exemplified by an audio speaker 12061, a display unit 12062, and an instrument panel 12063. The display unit 12062 may include, for example, at least one of an on-board display and a head-up display.

[0153] FIG. 24 is a diagram showing an example of the installation position of the imaging unit 12031.

[0154] In FIG. 24 , the vehicle 12100 has imaging units 12101, 12102, 12103, 12104, and 12105 as the imaging unit 12031.

[0155] The imaging units 12101, 12102, 12103, 12104, and 12105 are provided, for example, at positions such as the front nose, side mirrors, rear bumper, back door, and the top of the windshield inside the vehicle cabin of the vehicle 12100. The imaging unit 12101 provided on the front nose and the imaging unit 12105 provided on the top of the windshield inside the vehicle cabin mainly acquire images of the front of the vehicle 12100. The imaging units 12102 and 12103 provided on the side mirrors mainly acquire images of the sides of the vehicle 12100. The imaging unit 12104 provided on the rear bumper or back door mainly acquires images of the rear of the vehicle 12100. The forward images acquired by the imaging units 12101 and 12105 are mainly used to detect preceding vehicles, pedestrians, obstacles, traffic lights, traffic signs, lanes, etc.

[0156] 24 shows an example of the imaging ranges of the imaging units 12101 to 12104. Imaging range 12111 indicates the imaging range of the imaging unit 12101 provided on the front nose, imaging ranges 12112 and 12113 indicate the imaging ranges of the imaging units 12102 and 12103 provided on the side mirrors, respectively, and imaging range 12114 indicates the imaging range of the imaging unit 12104 provided on the rear bumper or back door. For example, by overlaying the image data captured by the imaging units 12101 to 12104, an overhead image of the vehicle 12100 viewed from above can be obtained.

[0157] At least one of the image capturing units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the image capturing units 12101 to 12104 may be a stereo camera made up of multiple image capturing elements, or may be an image capturing element having pixels for phase difference detection.

[0158] For example, based on the distance information obtained from the imaging units 12101 to 12104, the microcomputer 12051 can calculate the distance to each three-dimensional object within the imaging ranges 12111 to 12114 and the change in this distance over time (relative speed with respect to the vehicle 12100), thereby extracting as a preceding vehicle, in particular, the three-dimensional object that is the closest three-dimensional object on the path of the vehicle 12100 and traveling in approximately the same direction as the vehicle 12100 at a predetermined speed (e.g., 0 km / h or higher). Furthermore, the microcomputer 12051 can set a vehicle-to-vehicle distance to be maintained in advance in front of the preceding vehicle, and perform automatic braking control (including follow-up stop control), automatic acceleration control (including follow-up start control), etc. In this way, cooperative control can be performed for the purpose of autonomous driving, which runs autonomously without relying on driver operation.

[0159] For example, the microcomputer 12051 classifies and extracts three-dimensional object data regarding three-dimensional objects into two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians, utility poles, and other three-dimensional objects based on distance information obtained from the imaging units 12101 to 12104, and can use the data for automatic obstacle avoidance. For example, the microcomputer 12051 distinguishes obstacles around the vehicle 12100 into obstacles that are visible to the driver of the vehicle 12100 and obstacles that are difficult to see. The microcomputer 12051 then determines a collision risk that indicates the risk of collision with each obstacle, and when the collision risk is equal to or greater than a set value and a collision is possible, the microcomputer 12051 can provide driving assistance for collision avoidance by outputting an alarm to the driver via the audio speaker 12061 or the display unit 12062, or by performing forced deceleration or avoidance steering via the drive system control unit 12010.

[0160] At least one of the image capturing units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 can recognize a pedestrian by determining whether a pedestrian is present in the images captured by the image capturing units 12101 to 12104. Such pedestrian recognition is performed, for example, by extracting feature points from the images captured by the image capturing units 12101 to 12104 as infrared cameras and performing pattern matching on a series of feature points that indicate the outline of an object to determine whether the object is a pedestrian. When the microcomputer 12051 determines that a pedestrian is present in the images captured by the image capturing units 12101 to 12104 and recognizes the pedestrian, the audio / image output unit 12052 controls the display unit 12062 to superimpose a rectangular outline on the recognized pedestrian for emphasis. The audio / image output unit 12052 may also control the display unit 12062 to display an icon or the like indicating the pedestrian at a desired position.

[0161] An example of a mobile object control system to which the technology according to the present disclosure can be applied has been described above. The technology according to the present disclosure can be applied to, for example, the image capturing unit 12031 of the above-described configuration. Specifically, for example, the light detection device 1 can be applied to the image capturing unit 12031. By applying the technology according to the present disclosure to the image capturing unit 12031, a high-resolution captured image can be obtained, and high-precision control using the captured image can be performed in the mobile object control system.

[0162] Although the present disclosure has been described above by giving embodiments, modifications, use examples, and application examples, the present technology is not limited to the above-described embodiments, etc., and various modifications are possible. For example, although the modifications described above have been described as modifications of the above-described embodiments, the configurations of the modifications can be combined as appropriate.

[0163] According to an embodiment of the present disclosure, a photodetector includes a light-receiving element, a connection circuit connected between the light-receiving element and a first potential line, and a control circuit capable of controlling the connection circuit. The control circuit can execute control to set the connection circuit to a low resistance state and then set the connection circuit to a high resistance state when the voltage of the light-receiving element reaches a reference value. This makes it possible to realize a photodetector with excellent performance.

[0164] According to an embodiment of the present disclosure, there is provided a light detection system including a light source capable of irradiating light onto an object and a light detection device configured to receive light from the object. The light detection device includes a light receiving element, a connection circuit connected between the light receiving element and a first potential line, and a control circuit configured to control the connection circuit. The control circuit is capable of first setting the connection circuit to a low resistance state, and then setting the connection circuit to a high resistance state when the voltage of the light receiving element reaches a reference value. This allows for the realization of a light detection system with excellent performance.

[0165] Note that the effects described in this specification are merely examples and are not limited to those described, and other effects may be present. The present disclosure may also have the following configurations: (1) A photodetector comprising: a light-receiving element capable of receiving light and outputting a current; a connection circuit connected between the light-receiving element and a first potential line; and a control circuit capable of controlling the connection circuit, wherein the control circuit is capable of executing control to set the connection circuit to a low resistance state and then set the connection circuit to a high resistance state when the voltage of the light-receiving element reaches a reference value. (2) The photodetector described in (1) above, further comprising: a current source capable of supplying a current to the light-receiving element. (3) The photodetector described in (1) or (2) above, wherein the control circuit is capable of controlling the connection circuit based on a voltage signal corresponding to the current of the light-receiving element. (4) The photodetector described in any one of (1) to (3) above, further comprising: an output circuit capable of outputting a first signal based on the current of the light-receiving element. (5) The photodetector according to (4), wherein the control circuit is capable of controlling the connection circuit to a low resistance state or a high resistance state based on the first signal as the voltage signal. (6) The photodetector according to (4) or (5), wherein the output circuit has an inverter, and the reference value is a threshold voltage of the inverter. (7) The photodetector according to any one of (1) to (6), wherein the connection circuit is controlled by a second signal, and the control circuit outputs the second signal, which changes in response to a rise or fall of the voltage of the light-receiving element, to the connection circuit, thereby causing the connection circuit to be in a high resistance state. (8) The photodetector according to any one of (1) to (7), wherein the control circuit has a delay circuit and is capable of controlling the connection circuit to be in a low resistance state after a first delay time from a transition timing of a voltage signal corresponding to a current of the light-receiving element. (9) The photodetector according to (8), wherein the control circuit is capable of controlling the connection circuit to be in a high resistance state after a second delay time from a timing of causing the connection circuit to be in a low resistance state. (10) The photodetector according to (9), wherein the length of the first delay time is different from the length of the second delay time.(11) The photodetector according to (9) or (10), wherein the control circuit is capable of changing the length of the first delay time. (12) The photodetector according to any one of (9) to (11), wherein the control circuit is capable of changing the length of the second delay time. (13) The photodetector according to any one of (9) to (12), wherein the control circuit includes, as the delay circuits, a first delay circuit capable of changing the length of the first delay time and a second delay circuit capable of changing the length of the second delay time. (14) The photodetector according to any one of (8) to (13), wherein the control circuit is capable of outputting a second signal for controlling the connection circuit without passing through the delay circuit, thereby placing the connection circuit in a high resistance state. (15) The photodetector according to any one of (1) to (14), wherein the connection circuit includes a switch electrically connected in series between the light-receiving element and the first potential line. (16) The photodetector according to (15), wherein the control circuit is capable of controlling the switch to an on state as a low resistance state or an off state as a high resistance state. (17) The photodetector according to any one of (1) to (16), wherein the first potential line is a power supply line or a ground line. (18) The photodetector according to any one of (1) to (17), wherein the first potential line is a power supply line, and wherein the control circuit is capable of executing control to set the connection circuit to a high resistance state when the voltage of the cathode of the light-receiving element reaches a reference value after setting the connection circuit to a low resistance state. (19) The photodetector according to any one of (1) to (18), wherein the light-receiving element is an avalanche photodiode. (20) A light detection system comprising: a light source capable of irradiating light onto an object; and a light detection device that receives light from the object, wherein the light detection device has: a light receiving element that can receive light and output a current; a connection circuit connected between the light receiving element and a first potential line; and a control circuit that can control the connection circuit, wherein the control circuit can execute control to set the connection circuit to a low resistance state and then set the connection circuit to a high resistance state when the voltage of the light receiving element reaches a reference value.

[0166] This application claims priority based on Japanese Patent Application No. 2024-058128, filed on March 29, 2024, in the Japan Patent Office, the entire contents of which are incorporated herein by reference.

[0167] Those skilled in the art will recognize that various modifications, combinations, subcombinations, and variations may occur depending on design requirements and other factors, and are intended to be within the scope of the appended claims and their equivalents.

Claims

1. A photodetector comprising: a light-receiving element capable of receiving light and outputting a current; a connection circuit connected between said light-receiving element and a first potential line; and a control circuit capable of controlling said connection circuit, wherein said control circuit is capable of executing control to set said connection circuit to a low resistance state and then to set said connection circuit to a high resistance state when the voltage of said light-receiving element reaches a reference value.

2. The photodetector according to claim 1, further comprising a current source capable of supplying a current to said light receiving element.

3. The photodetector according to claim 1, wherein the control circuit is capable of controlling the connection circuit based on a voltage signal corresponding to the current of the light receiving element.

4. The photodetector according to claim 3, further comprising an output circuit capable of outputting a first signal based on the current of said light receiving element.

5. The photodetector according to claim 4, wherein the control circuit is capable of controlling the connection circuit to a low resistance state or a high resistance state based on the first signal as the voltage signal.

6. The photodetector according to claim 4, wherein the output circuit has an inverter, and the reference value is a threshold voltage of the inverter.

7. The photodetector according to claim 1, wherein the connection circuit is controlled by a second signal, and the control circuit outputs the second signal, which changes in response to the rise or fall of the voltage of the light-receiving element, to the connection circuit, thereby placing the connection circuit in a high resistance state.

8. The photodetector according to claim 1, wherein the control circuit has a delay circuit and is capable of executing control to set the connection circuit to a low resistance state after a first delay time from the transition timing of a voltage signal corresponding to the current of the light receiving element.

9. The photodetector according to claim 8, wherein the control circuit is capable of executing control to change the connection circuit to a high resistance state after a second delay time has elapsed since the timing at which the connection circuit is changed to a low resistance state.

10. The photodetector according to claim 9, wherein the length of said first delay time is different from the length of said second delay time.

11. The photodetector according to claim 9, wherein the control circuit is capable of changing the length of the first delay time.

12. The photodetector according to claim 9, wherein the control circuit is capable of changing the length of the second delay time.

13. The photodetector according to claim 9, wherein the control circuit has, as the delay circuits, a first delay circuit capable of changing the length of the first delay time and a second delay circuit capable of changing the length of the second delay time.

14. The photodetector according to claim 8, wherein the control circuit is capable of outputting a second signal that controls the connection circuit without passing through the delay circuit, thereby putting the connection circuit into a high resistance state.

15. The photodetector according to claim 1, wherein the connection circuit includes a switch electrically connected in series between the light-receiving element and the first potential line.

16. The photodetector according to claim 15, wherein the control circuit is capable of controlling the switch to an ON state corresponding to a low resistance state or an OFF state corresponding to a high resistance state.

17. The photodetector according to claim 1, wherein the first potential line is a power supply line or a ground line.

18. The photodetector device according to claim 1, wherein the first potential line is a power supply line, and the control circuit is capable of executing control to set the connection circuit to a low resistance state and then set the connection circuit to a high resistance state when the voltage of the cathode of the light receiving element reaches a reference value.

19. The photodetector according to claim 1, wherein the light receiving element is an avalanche photodiode.

20. An optical detection system comprising: a light source capable of irradiating light onto an object; and an optical detection device that receives light from the object, wherein the optical detection device has: a light receiving element that can receive light and output a current; a connection circuit connected between the light receiving element and a first potential line; and a control circuit that can control the connection circuit, wherein the control circuit can execute control to set the connection circuit to a low resistance state and then set the connection circuit to a high resistance state when the voltage of the light receiving element reaches a reference value.

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