Substrate processing method and substrate processing apparatus

Abstract

A substrate processing method according to the present disclosure comprises: a silicidation step in which a processing gas is supplied to a substrate that is provided with a recess in which the bottom wall is formed of a silicon-containing layer and the side wall is formed of a silicon nitride film, and a metal silicide film is formed on the surface of the silicon-containing layer; a nitriding step in which a nitriding gas is supplied to the substrate so as to nitride the surface of the metal silicide film and a first metal film that is formed on the side wall of the recess so as to cover the silicon nitride film in the silicidation step; an etching step in which an etching gas is supplied to the substrate so as to remove the first metal film; and a film formation step in which a film formation gas is supplied to the substrate so as to fill the recess with a second metal film.

Description

Substrate processing method and substrate processing apparatus

[0001] The present disclosure relates to a substrate processing method and a substrate processing apparatus.

[0002] In manufacturing a semiconductor device, an insulating film provided on a substrate such as a semiconductor wafer (hereinafter referred to as a wafer) is etched to form a recess, and then a process of filling the recess with a metal film forming wiring is performed. Patent Document 1 describes a technique for filling a W (tungsten) film into a recess formed by an SiOx film, which is an insulating film, on the sidewall and a Si substrate surface layer, which is at the bottom. In the process of Patent Document 1, before filling with the W film, a Ti film is formed by plasma CVD to form a TiSi film at the bottom of the recess, and then the Ti film is nitrided. Thereafter, a TiN film is formed by thermal CVD so as to cover the entire surface of the recess, and then a WCl ５ The TiN film near the opening of the recess is removed by plasma etching using a fluorine-containing gas, and the opening of the recess is widened, and then the W film is filled in.

[0003] Japanese Patent Application Laid-Open No. 2021-150526

[0004] The present disclosure provides a technique that can suppress an increase in resistance between a wiring and a bottom wall of a recess formed in a substrate when the wiring is formed in the recess.

[0005] The substrate processing method of the present disclosure includes a silicidation step of supplying a processing gas to a substrate having a recessed portion whose bottom wall is formed of a silicon-containing layer and whose sidewall is formed of a silicon nitride film, thereby forming a metal silicide film on a surface of the silicon-containing layer; a nitridation step of supplying a nitriding gas to the substrate, thereby nitriding a first metal film formed on a surface of the metal silicide film and on a sidewall of the recessed portion so as to cover the silicon nitride film in the silicidation step; an etching step of supplying an etching gas to the substrate, thereby removing the first metal film; and a film formation step of supplying a film formation gas to the substrate, thereby filling the recessed portion with a second metal film.

[0006] The present disclosure makes it possible to suppress an increase in resistance between a wiring line and the bottom wall of a recess formed in a substrate when the wiring line is formed in the recess.

[0007] FIG. 1 is a longitudinal sectional side view of a substrate to which a process according to an embodiment of the present disclosure is applied; FIG. 2 is a longitudinal sectional side view of a substrate illustrating a process according to a comparative example and the embodiment; FIG. 3 is a longitudinal sectional side view of a substrate illustrating a process according to the comparative example; FIG. 4 is a longitudinal sectional side view of a substrate illustrating a process according to the comparative example; FIG. 5 is a longitudinal sectional side view of a substrate illustrating a process according to the embodiment; FIG. 6 is a longitudinal sectional side view of a substrate illustrating a process according to the embodiment; FIG. 7 is a longitudinal sectional side view of a substrate illustrating a process according to the embodiment; FIG. 8 is a longitudinal sectional side view of a substrate illustrating a process according to the embodiment; FIG. 9 is a plan view of a substrate processing apparatus for performing a process according to the embodiment; FIG. 10 is a longitudinal sectional side view of a process module provided in the substrate processing apparatus; and FIG. 11 is a graph showing results of an evaluation test.

[0008] An example of a wafer B, which is a substrate to which a processing method according to an embodiment of the present disclosure is applied, will be described with reference to the longitudinal side view of Figure 1. This wafer B is made of Si (silicon), and the Si layer of this wafer B is indicated as 11 in the figure. A SiOx (silicon oxide) film 12, which is an insulating film, is laminated on this Si layer 11. For convenience, the following description will be given assuming that the side on which the SiOx film 12 is laminated with respect to the Si layer 11 is the upper side. However, processing of the wafer B is not limited to being performed in such a state in which the wafer B is positioned so that the SiOx film 12 is on the upper side with respect to the Si layer 11.

[0009] Holes are formed in the SiOx film 12 in the thickness direction (vertical direction), and the lower ends of the holes formed in the SiOx film 12 reach the Si layer 11. A SiN film (silicon nitride) 13 is formed so as to cover the side surfaces of the silicon oxide film 12 that form the holes. By providing such a film structure, recesses 14 that form trenches or holes are formed in the wafer B.

[0010] To describe the recess 14 in more detail, the bottom wall of the recess 14 is formed of a Si layer 11. The side walls of the recess 14 are formed of a SiOx film 12 and a SiN film 13, and the SiN film 13 covers the side surface of the SiOx film 12, so that the surface of the side wall is composed of the SiN film 13. The surface of the Si layer 11 exposed in the recess 14 (i.e., the bottom surface of the recess 14) is naturally oxidized, so that a SiOx film 15 is formed.

[0011] For example, a W (tungsten) film 16 is buried in the recess 14 as a wiring metal film that forms contact between a metal film (not shown) formed on the SiOx film 12 and the Si layer 11. Before the W film 16 is buried, the SiOx film 15, which is a natural oxide film, is removed, and then the surface of the Si layer 11 is made into a TiSi (titanium silicide) film 17 in order to ensure good conductivity between the W film 16 and the Si layer 11. An unnecessary Ti (titanium) film 18, which is a first metal film and which was formed on the sidewall of the recess 14 during the formation of the TiSi film 17, is removed, and then the W film 16, which is a second metal film, is buried.

[0012] To facilitate understanding of the substrate processing method of this embodiment, a process in a comparative example will first be described with reference to Figures 2 to 5, which are schematic diagrams showing vertical cross sections of a wafer B. Each process is performed with the wafer B housed in a processing vessel that has been evacuated to create a vacuum atmosphere at a predetermined pressure.

[0013] First, H is applied to the wafer B described in FIG. ２ (hydrogen) gas is supplied, and this H ２ The gas is converted into plasma, thereby reducing the SiOx film 15 on the bottom of the recess 14 (step S1'). Note that the SiOx film 12 forming the sidewall of the recess 14 is covered with the SiN film 13, and is therefore prevented from being reduced by the plasma.

[0014] Subsequently, a Ti film 18 is formed on the surface of the wafer B by plasma CVD. Specifically, for example, TiCl ４ (Titanium tetrachloride) gas and H ２Gases are supplied to wafer B as process gases, and these gases are converted into plasma, depositing Ti on the surface of wafer B (step S2'). The Si layer 11 reacts with the Ti on the bottom wall of the recess 14, converting it into a silicide. Specifically, a TiSi film 17 is formed on the surface of the Si layer 11 as a metal silicide film, and this TiSi film 17 grows downward along the bottom wall of the recess 14, increasing its thickness. Meanwhile, a Ti film 18 is formed by the deposition of Ti in areas other than the bottom wall of the recess 14. Due to the action of the plasma, etching of this Ti film 18 proceeds in parallel with the deposition of Ti. Therefore, during the execution of step S2, the thickness of the Ti film 18 increases relatively slowly.

[0015] 2 shows wafer B just before the completion of step S2. As described above, due to the simultaneous deposition and etching of Ti, a thin Ti film 18 is formed on the portions other than the bottom wall of recess 14. Therefore, the SiN film 13 forming the side wall of recess 14 is covered with Ti film 18. However, FIG. 2 shows only the portion of Ti film 18 formed on the side wall of recess 14, and does not show the portion formed outside recess 14. Note that FIG. 2 also shows wafer B during processing in an embodiment described later.

[0016] Thereafter, for example, oxygen gas is supplied to wafer B, and this oxygen gas is converted into plasma, oxidizing the surface of wafer B (FIG. 3, step S3'). Specifically, the Ti film 18 described above becomes a TiO (titanium oxide) film 21. Also, the surface layer of TiSi film 17 is oxidized to become a TiSiO (titanium oxide silicide) film 22.

[0017] Then, for example, WCl is used as an etching gas. ５ (tungsten pentachloride) gas is supplied to wafer B (FIG. 4, step S4'). This etches the TiO film 21, exposing the SiN film 13 on the side surface of the recess 14. At this time, the TiSiO film 22 is also etched. Thereafter, for example, WF ６ (Tungsten hexafluoride) gas is supplied to wafer B. As a result, a W film 16 is formed on the surface of wafer B, and the W film 16 fills the recesses 14 (FIG. 5, step S5').

[0018] In the process of the comparative example described above, the Ti film 18 is removed before filling the recess 14 with the W film 16 because if the Ti film 18 remains formed on the sidewall of the recess 14 when filling it with the W film 16, W will be deposited on this Ti film 18, and the W film 16 will grow laterally toward the center of the recess 14 in a vertical cross-sectional view, blocking the opening of the recess 14. In other words, WF ６ The Ti film 18 is removed to prevent voids from being formed in the W film 16 due to the inability to supply gas. Furthermore, if the Ti film 18 remains formed in the recess 14, the volume of the recess 14 will be reduced by the volume of this Ti film 18. In other words, the volume of the W film 25 to be filled will be reduced. In this case, there is a risk that the contact resistance may not be sufficiently reduced, so the Ti film 18 is removed in order to prevent this problem.

[0019] However, by removing the Ti film 18 as described above, the thickness of the TiSi film 17 also decreases, and the amount of Ti on the bottom wall of the recess 14 decreases. This decrease in the amount of Ti may lead to an increase in resistance between the W film 16 and the Si layer 11. The process of this embodiment prevents such a problem from occurring.

[0020] The processing of this embodiment will be described below in order, focusing on the differences from the comparative example, with reference to the aforementioned FIGS. 1 and 2 and FIGS. 6 to 9 showing longitudinal cross sections of the wafer W. First, the wafer B shown in FIG. 1 is subjected to, for example, H ２ The SiOx film 15 is reduced by exposing it to the plasma of the gas (step S1). Then, similar to step S2' of the comparative example, the wafer B is subjected to a TiCl ４ Gas and H ２ The wafer B is exposed to a plasma of the gas to form a TiSi film 17 and a Ti film 18 by plasma CVD (step S2). Therefore, Fig. 2 shows the wafer B during processing in step S2' of the comparative example, and also shows the wafer B during processing in step S2 of the embodiment.

[0021] Thereafter, a nitriding gas is supplied to the wafer B to perform nitriding on the surface of the wafer B. For example, N ２ The gas is supplied to wafer B to generate plasma, and then NH 4 is supplied as a nitriding gas. ３ is supplied to the wafer B and turned into plasma, thereby performing nitriding treatment (FIG. 6, step S3). As a result, the surface of the Ti film 18 is nitrided to become a TiN film 23, and the surface of the TiSi film 17 is nitrided to become a TiSiN film 24.

[0022] Next, similarly to step S3' of the comparative example, wafer B is exposed to oxygen gas plasma, oxidizing the surface of wafer B (step S4 in FIG. 7 ). Nitriding makes the Ti-containing film less permeable to oxygen. Therefore, during step S4, oxygen penetration into TiSi film 17 at the bottom wall of recess 14 is prevented by TiSiN film 24, and the penetration is limited to the very surface layer of TiSiN film 24, which is oxidized to form oxide film 25. Meanwhile, as mentioned above, the thickness of Ti film 18 formed on the sidewall of recess 18 is relatively small, and the thickness of TiN film 23 formed from this Ti film 18 in step S3 is also relatively small. Therefore, oxygen penetrates TiN film 23 and reaches Ti film 18, where it is oxidized to form oxide films 26 and 27, respectively.

[0023] Thereafter, similarly to step S4' of the comparative example, WCl ５ Gas is supplied to wafer B (FIG. 8, step S5), which etches oxide films 25, 26, and 27. By removing oxide film 25, TiSiN film 24 is exposed on the bottom surface of recess 14. However, as will be shown in the evaluation test described later, WCl ５The TiSiN film 24 has a higher etching resistance to SiO 2 than the TiSi film 17. Therefore, by suppressing etching of the TiSiN film 24, a large amount of Ti remains on the bottom wall of the recess 14 as the TiSiN film 24 and the TiSi film 17 after step S5 is completed. On the other hand, the Ti film 18 formed on the side wall of the recess 14 in step S2 as described above is etched away as oxide films 26 and 27. As a result, as in the comparative example, the SiN film 13 is exposed on the side wall of the recess 14 after etching in step S5 is completed, and the volume inside the recess 14 becomes relatively large.

[0024] Thereafter, similarly to step S5' in the comparative example, WF ６ Gas is supplied to wafer B, and W film 16 is filled into recess 14 (FIG. 9, step S6). As described above, since Ti film 18 has been removed to form oxide films 26 and 27, the volume of W film 25 filled is relatively large, as in the comparative example. The process of the embodiment described above suppresses the reduction of Ti on the bottom wall of recess 14, thereby suppressing an increase in resistance between W film 16 and Si layer 11.

[0025] 6 shows that only a portion of the surface layer of the Ti film 18 is nitrided to become the TiN film 23, but as already mentioned, since the Ti film 18 is a thin layer, it is also possible that the entire Ti film 18 becomes the TiN film 23. Even in this case, in step S5, the oxide film 26 formed from this TiN film 23 is removed so that the SiN film 13 is exposed, and the volume of the recess 14 can be increased.

[0026] The oxidation treatment in step S4 is performed in order to shorten the etching time in step S5 and to ensure etching of the Ti film 18. However, the etching treatment in step S5 may be performed without performing the oxidation treatment in step S4. In other words, the etching treatment in step S5 may be performed immediately after the nitriding treatment in step S3. In the evaluation test, by performing the nitriding treatment on the Ti film formed on the Si film, the WCl ５It has been confirmed that the etching resistance to the gas is increased by the nitriding treatment. It has also been confirmed that the Ti film formed on the SiN film can be etched by setting the etching time sufficiently, regardless of whether or not the nitriding treatment is performed. That is, even if the etching in step S5 is performed without performing the oxidation treatment after the nitriding treatment in step S3, etching of the TiSiN film 24 is suppressed, leaving a large amount of Ti on the bottom wall of the recess 14, while the TiN film 23 and the Ti film 18 on the side wall of the recess 14 can be reliably etched.

[0027] Next, an example of an apparatus capable of performing steps S1 to S6 will be described. Fig. 10 shows a plan view of a substrate processing apparatus 3, which is such an apparatus. The substrate processing apparatus 3 includes a loader module 31, a load lock module 35, a first vacuum transfer module 41, a second vacuum transfer module 42, a connection module 43, and processing modules 51 to 56. In the following description, the first vacuum transfer module 41 and the second vacuum transfer module 42 may be collectively referred to as the vacuum transfer modules 41 and 42.

[0028] The loader module 31, the load lock module 35, the first vacuum transfer module 41, the connection module 43, and the second vacuum transfer module 42 are arranged in a straight line in the horizontal direction in this order. In the following description of the substrate processing apparatus 3, the side where the loader module 31 is located will be referred to as the front side, and the side where the second vacuum transfer module 42 is located will be referred to as the rear side.

[0029] The loader module 31 includes a housing whose interior is at atmospheric pressure, a transfer mechanism 32 for wafers B provided within the housing, and load ports 33. In this example, four load ports 33 are provided side by side on the front side of the housing. A transfer container 34 called a FOUP (Front Opening Unified Pod) for storing wafers B is placed on each load port 33. The transfer mechanism 32 is formed, for example, by an articulated arm that can move left and right, and is capable of transferring wafers B between the transfer container 34 on each load port 33 and each load lock module 35.

[0030] In this example, three load lock modules 35 are provided side by side. Each load lock module 35 has a housing, which is connected to the loader module 31 and the first vacuum transfer module 41 via gate valves G provided at the front and rear sides of the housing. The pressure inside the housing can be freely changed between atmospheric pressure and vacuum pressure when the gate valves G at the front and rear sides of the housing are closed. A stage (not shown) on which the wafer B is placed is provided inside the housing, and the stage is configured to be able to transfer the wafer B to and from the transfer mechanism 32 and the vacuum transfer mechanism 44 (described later), which access the load lock module 35.

[0031] The first vacuum transfer module 41 and the second vacuum transfer module 42 are configured similarly to each other and include housings 41A and 42A, respectively. The housings 41A and 42A are evacuated by an exhaust mechanism (not shown) to maintain a vacuum atmosphere. In this example, two connection modules 43 are provided side by side. The connection module 43 includes a housing 43A, which is connected to the housings 41A and 42A of the vacuum transfer modules 41 and 42. The exhaust mechanism evacuates the housing 43A of the connection module 43, creating a vacuum atmosphere with the same pressure as the housings 41A and 42A. A wafer B is placed inside the housing 43A, and a stage (not shown) is provided to allow the wafer B to be transferred between the housing 43A and the vacuum transfer mechanism 44 (described later).

[0032] Two processing modules are connected to each of the housing 41A of the first vacuum transfer module 41 and the housing 42B of the second vacuum transfer module 42, one on the left side and one on the right side, in a line up front and back. A gate valve G1 is interposed between the processing modules (51 to 56) and the first vacuum transfer module 41 or the second vacuum transfer module 42. In this example, processing modules 51 to 53 are connected to the first vacuum transfer module 41, and processing modules 54 to 56 are connected to the second vacuum transfer module 42.

[0033] Processing module 51 performs the reduction treatment in step S1, processing module 52 performs the plasma CVD in step S2, processing module 53 performs the nitridation treatment in step S3, processing module 54 performs the oxidation treatment in step S4, processing module 55 performs the etching treatment in step S5, and processing module 56 performs the film formation treatment in step S6. Each processing module can process wafer B in parallel with each other. Processing module 52 corresponds to a silicide formation processing unit, processing module 53 corresponds to a nitridation processing unit, processing module 55 corresponds to an etching processing unit, and processing module 56 corresponds to a film formation processing unit, respectively.

[0034] A vacuum transfer mechanism 44 is provided inside each of the housings 41A and 42A, and is configured, for example, by an articulated arm that can move back and forth. The vacuum transfer mechanism 44 inside the housing 41A transfers wafers B between the load lock module 35, the connection module 43, and each processing module connected to the housing 41A. The vacuum transfer mechanism 44 inside the housing 42A transfers wafers B between the connection module 43 and each processing module connected to the housing 42A.

[0035] The substrate processing apparatus 3 includes a control unit 30, which is a computer, and the control unit 30 includes a program. The program includes commands (steps) for processing and transporting the wafer B as described above. The program is stored on a storage medium, such as a compact disc, hard disk, or DVD, and is installed in the control unit 30. The control unit 30 outputs control signals to each component of the substrate processing apparatus 3 using the program to control the operation of each component. Specifically, the control unit 30 controls the operation of the processing modules 51-56, the opening and closing of the gate valves G and G1, the operation of the transport mechanism 32, the operation of each vacuum transport mechanism 44, and the switching of the pressure within the load lock module 35. The control of the operation of the processing modules 51-56 specifically includes, for example, controlling the temperature of the wafer B by supplying power to the heater 66 (described later), controlling the supply and cutoff of each gas into the processing chamber 61, forming plasma by turning on and off the high-frequency power supplies 73 and 60, and controlling the supply of power for bias application.

[0036] The transfer path of wafer B in substrate processing apparatus 3 will be described as follows: wafer B is first transferred from transfer container 34 to loader module 31 to load lock module 35 to first vacuum transfer module 41. Wafer B is then transferred sequentially through processing modules 51 to 56 via vacuum transfer modules 41 and 42. That is, once transferred to one of the processing modules, wafer B is returned to vacuum transfer module 41 or 42 and then transferred to the next processing module. After completing steps S1 to S6, wafer B is transferred from load lock module 35 to loader module 31 and then returned to transfer container 34.

[0037] An example of a processing module 53 that performs the nitriding treatment in step S3 will be described with reference to the vertical side view of Figure 11. The processing module 53 includes a grounded processing vessel 61, and a transfer port for wafer B formed in the side wall of the processing vessel 61 is opened and closed by the gate valve G1. One end of an exhaust pipe 62 opens into the wall of the processing vessel 61, and an exhaust mechanism 63 provided at the other end of the exhaust pipe 62 evacuates the interior of the processing vessel 61 to a vacuum atmosphere of a desired pressure, for example, 54 Pa to 106 Pa.

[0038] A stage 64 on which a wafer B is placed is provided within the processing vessel 61, and the wafer B is transferred between the stage 64 and the vacuum transfer mechanism 44 by means of lifting pins 65 configured to be freely projected and retracted on the stage 64. A heater 66 is embedded in the stage 64, and heats the wafer B to a predetermined temperature, for example, 350°C to 600°C, during processing. An electrode 67 is also embedded in the stage 64. In this configuration example, a high-frequency power supply 60 is connected to the electrode 67 via a matching box 69. The high-frequency power supplied from the high-frequency power supply 60 to the electrode 67 is high-frequency power for applying a bias to attract ions contained in the plasma formed on the stage 64 toward the stage 64.

[0039] A gas shower head 71 is provided on the ceiling of the processing vessel 61 via an insulating member 68. A high-frequency power supply 73 is connected to the gas shower head 71 via a matching box 72. The gas shower head 71 and an electrode 67 of the stage 64 are configured as parallel plate electrodes, and plasma can be formed between the gas shower head 71 and the stage 64 by supplying high-frequency power from the high-frequency power supply 73. When plasma is formed, the high-frequency power for applying the bias described above is supplied from the high-frequency power supply 60 to the electrode 67.

[0040] The downstream end of a gas supply line 74 is connected to the gas shower head 71. The upstream side of the gas supply line 74 branches into gas flow lines 75, 76, and 77. The upstream end of the gas flow line 75 is connected to a N ２ The upstream end of the gas flow passage 76 is connected to a gas supply source 75A. ３ The upstream end of the gas flow passage 77 is connected to a gas supply source 76A, and the upstream end of the gas flow passage 77 is connected to an Ar gas supply source 77A. Ar (argon) gas is a plasma forming gas, and N ２ Gas and NH ３ Gas supply equipment 78 including valves and mass flow controllers is installed in the gas flow paths 75 to 77, and the supply and cut-off of each gas to the downstream side is controlled in accordance with control signals from the control unit 30. ２ Gas, NH ３ The gas and Ar gas can be supplied into the processing chamber 61 independently.

[0041] When performing the above-mentioned step S3, N ２ A plasma is formed by supplying NH gas and Ar gas into the processing chamber 61. ３ A plasma is generated by supplying a nitriding gas and an Ar gas into the processing vessel 61. In step S3, it is sufficient to nitride each film, so N nitriding gas is used. ２ Gas and NH ３ The gases are not limited to being supplied in this order, but may be supplied in the reverse order or simultaneously. ２ Gas and NH ３Nitriding may be performed by supplying only one of the gases into the processing vessel 61 .

[0042] Alternatively, the apparatus may be configured so that high-frequency power for bias application is not supplied to the electrode 67 of the stage 64. However, in an evaluation test described below, it was found that for a Ti film formed on a SiN film, the etching rate was lower when the nitriding process was performed than when the nitriding process was not performed, depending on the etching time in step S5. Therefore, it can be said that it is preferable to perform nitriding on the bottom wall of the recess 14 to prevent a decrease in Ti, while suppressing nitriding on the side wall of the recess 14 to ensure the removal of the Ti film 18. Therefore, it is considered effective to supply high-frequency power for bias application as described above to attract ions in the plasma to the bottom wall of the recess 14, thereby promoting the nitriding of the TiSi film 17 on the bottom wall compared to the Ti film 18 on the side wall.

[0043] Detailed explanation of the configurations of the processing modules other than the processing module 53 will be omitted, but the processing modules that perform plasma processing may have the same configuration as the processing module 53 except for the difference in the gas supplied. For example, the processing module 52 that performs step S2 uses a film-forming gas, TiCl ４ Gas and H ２ The processing chamber 61 may be configured so that the gas and Ar gas for plasma generation are supplied into the processing chamber 61. The module for performing processing without generating plasma may have the same configuration as the processing module 53, except for the difference in the gas supplied and the absence of a high-frequency power supply.

[0044] The plasma generating module is not limited to generating the capacitively coupled plasma described above, and other plasmas such as inductively coupled plasma may be generated. Furthermore, so-called remote plasma processing may be performed, in which plasma generated outside the processing vessel 61 is introduced into the processing vessel 61 for processing. Even when performing plasma processing using a method different from the illustrated example, high-frequency power for bias application may be supplied to the electrode 67 of the stage 64 to attract ions.

[0045] Incidentally, a process described as a plasma process may be performed as a process without using plasma, and a process described as a process without using plasma may be performed as a plasma process. A film formation process described as a CVD process may be a film formation process by ALD. Furthermore, although one process module has been described as performing any one of steps S1 to S6, multiple consecutive steps may be performed in one process module. For example, steps S2 and S3 may be performed in the same process module.

[0046] Furthermore, although steps S1 to S6 are shown to be performed in one substrate processing apparatus 3, steps S1 to S6 may also be performed by transferring a transfer container 34 storing wafer B between multiple substrate processing apparatuses 3. Specifically, for example, after steps S1 to S3 are performed on wafer B in one substrate processing apparatus 3, wafer B may be transferred to another substrate processing apparatus 3 where steps S4 to S6 are performed.

[0047] Although oxygen gas is used as the oxidizing gas in step S3, other gases containing oxygen as a constituent element, such as ozone gas, may also be used. ５ Although gases are shown, for example, F ２ Other gases containing halogen as a constituent element, such as fluorine (HF), hydrogen fluoride (HF), or a CF-based gas consisting of carbon and fluorine, may also be used. ６ The gas is not limited to tungsten pentafluoride gas, tungsten dichloride gas, tungsten tetrachloride gas, etc. ６ Alternatively, a gas containing a halogen and tungsten other than the above may be used. Furthermore, instead of the W film 16, the metal film formed in the recess 14 may be a Ru (ruthenium) film, a Mo (molybdenum) film, or other metal film, and in step S6, a film-forming gas serving as a raw material for these films may be supplied to the wafer B.

[0048] The silicon-containing film to be metal silicided is the Si layer 11, but is not limited to the Si layer 11. Specifically, it may be, for example, a SiGe (silicon germanium) film. The silicon-containing film referred to here refers to a film composed of silicon itself (i.e., a Si film) or a film composed of multiple components, one of which is silicon, such as the SiGe film, and does not refer to a film containing silicon as an impurity. Although the Si layer 11 is shown as a layer composed of the wafer itself, the wafer itself is not limited to being a silicon-containing layer. For example, a Si film formed on the wafer may form the bottom wall of the recess 14 as a silicon-containing layer. The metal silicide formed is not limited to TiSi. Therefore, a process gas containing a metal other than Ti may be supplied to the wafer B in step S2.

[0049] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive, and various omissions, substitutions, modifications, and combinations may be made in the above-described embodiments without departing from the scope and spirit of the appended claims.

[0050] Evaluation Test An evaluation test related to the present technology will be described. In this evaluation test, first to fourth substrates were prepared. For the first substrate, a Ti film was formed on a Si film formed on the substrate, and this Ti film was nitrided. For the second substrate, a Ti film was formed on a Si film formed on the substrate, but this Ti film was not nitrided. For the third substrate, a Ti film was formed on a SiN film formed on the substrate, and this Ti film was nitrided. For the fourth substrate, a Ti film was formed on a SiN film formed on the substrate, but this Ti film was not nitrided. In accordance with the process of the embodiment and the process of the comparative example, the film thickness of the Ti film on the first and second substrates was greater than the film thickness of the Ti film on the third and fourth substrates.

[0051] For these first to fourth substrates, WCl ５Gas was supplied to etch the Ti film. After the etching process, XRF (X-ray Fluorescence) was performed to measure the depth of Ti remaining from the surface of the substrate. Figure 12 is a graph showing the measurement results. ５ The horizontal axis represents the etching time (unit: seconds) that is the time that the gas is supplied to the substrate, and the vertical axis represents the depth at which the Ti is detected as the residual Ti film thickness (unit: Å).

[0052] When comparing the first substrate and the second substrate, in which a Ti film is formed on a Si film, the residual Ti film thickness tends to decrease as the etching time increases in the second substrate, in which the Ti film is not nitrided. In the first substrate, in which the Ti film is nitrided, the residual Ti depth is roughly constant regardless of the etching time, and the residual Ti depth at each etching time is greater in the first substrate than in the second substrate. That is, it can be seen that etching resistance is increased by performing nitriding treatment on the TiSi film 17 on the bottom wall of the recess 14, as described in the embodiment.

[0053] Furthermore, for the third and fourth substrates in which a Ti film was formed on a SiN film, the residual Ti film thickness decreased as the etching time increased. Therefore, as explained in the embodiment, it is clear that the Ti film 18 formed on the SiN film on the sidewall of the recess 14 and the TiN film 22 generated from the Ti film 18 can be etched. In other words, it was shown that the nitriding process does not prevent the Ti film 18 from being etched.

[0054] The above evaluation test results confirmed that the method of the embodiment can etch the Ti film 18 while preventing the reduction of Ti on the bottom wall of the recess, confirming the effectiveness of the present technology. Note that when the amount of Ti remaining on the substrate is close to zero, the residual Ti film thickness obtained tends to deviate from the actual value due to the limits of detection accuracy. In other words, a value larger than the actual value is obtained. From the graph, it can be seen that when the etching time is relatively long for the third and fourth substrates, the residual Ti film thickness is extremely low, at 20 Å or less. However, this value reflects measurement error, and the actual value is even smaller. It is believed that all or almost all of the Ti film was removed. In other words, when the method of the embodiment is performed, desirable results are obtained that suggest that the Ti film 18 can be reliably removed from the sidewall of the recess 14, thereby increasing the volume of the recess 14.

[0055] B wafer 11 Si layer 13 SiN film 14 recess 16 W film 17 TiSi film 18 Ti film

Claims

1. A substrate processing method comprising: a silicidation step of supplying a processing gas to a substrate having a recess whose bottom wall is formed of a silicon-containing layer and whose sidewall is formed of a silicon nitride film, to form a metal silicide film on a surface of the silicon-containing layer; a nitridation step of supplying a nitriding gas to the substrate, to nitride a first metal film formed on the surface of the metal silicide film and on the sidewall of the recess so as to cover the silicon nitride film in the silicidation step; an etching step of supplying an etching gas to the substrate, to remove the first metal film; and a film formation step of supplying a film formation gas to the substrate, to fill the recess with a second metal film.

2. A substrate processing method according to claim 1, wherein the sidewall of the recess is formed by the silicon nitride film and a silicon oxide film covered by the silicon nitride film, and the silicon-containing layer is a silicon layer.

3. A substrate processing method according to claim 2, wherein said first metal film is a titanium film.

4. A substrate processing method according to claim 3, further comprising the step of supplying an oxidizing gas to the substrate in order to oxidize the first metal film after the nitriding step.

5. A substrate processing method according to claim 1, wherein the nitriding step comprises the steps of: supplying plasma of the nitriding gas into a processing vessel that stores the substrate; and applying bias power to an electrode provided on a mounting table provided in the processing vessel in order to attract ions contained in the plasma toward the substrate placed on the mounting table.

6. A substrate processing apparatus comprising: a silicide formation processing unit that supplies a processing gas to a substrate having a recess whose bottom wall is formed of a silicon-containing layer and whose sidewall is formed of a silicon nitride film, and forms a metal silicide film on a surface of the silicon-containing layer; a nitriding processing unit that supplies a nitriding gas to the substrate, and nitrides a first metal film that is formed on the surface of the metal silicide film and on the sidewall of the recess so as to cover the silicon nitride film by the supply of the processing gas; an etching processing unit that supplies an etching gas to the substrate, and removes the first metal film; and a film formation processing unit that supplies a film formation gas to the substrate, and fills the recess with a second metal film.

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