Chip screening specification determination method, storage medium and electronic device

By obtaining and comparing the sensitive parameter distribution characteristics of BI and ALT experiments and adjusting the chip screening specifications, the problem of misidentification of early failures in chip degradation scenarios was solved, the accuracy and reliability of chip screening were improved, and the cost was reduced.

WO2025209195A1PCT designated stage Publication Date: 2025-10-09SANECHIPS TECH CO LTD
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Patent Information

Application Number
PCT/CN2025/083817
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-04-01
Filing Date
2025-03-20
Publication Date
2025-10-09

AI Technical Summary

Technical Problem

Existing technologies have difficulty accurately identifying early failures in chip degradation scenarios, which can easily lead to neglect or misjudgment, affecting the hidden risks of early failures in chip performance degradation scenarios.

Method used

By obtaining the statistical distribution of sensitive parameters of the chips to be screened in the aging BI experiment and the accelerated life ALT experiment, the characteristic quantities are extracted, and the screening specifications are determined based on the comparison results. The chip screening specifications are adjusted based on the characteristic quantities of the BI and ALT experiments.

Benefits of technology

It achieves more accurate screening in chip degradation scenarios, reduces chip production costs, improves chip reliability and yield, and is suitable for automotive-grade chip products.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiments of the present disclosure provide a chip screening specification determination method, a storage medium and an electronic device. The method comprises: separately acquiring statistical distributions, in a burn-in (BI) test and an accelerated life test (ALT), of sensitive parameters of samples of chips to be screened; separately extracting characteristic quantities of the statistical distributions in the BI test and the ALT; and on the basis of a comparison result of the characteristic quantities in the BI test and the ALT, determining a screening specification for the chips to be screened.
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Description

Method, storage medium and electronic device for determining chip screening specifications

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] The present disclosure is based on Chinese patent application CN202410388830.X filed on April 1, 2024, entitled “A method, storage medium and electronic device for determining chip screening specifications”, and claims the priority of the patent application, and all the contents disclosed therein are incorporated into the present disclosure by reference. Technical Field

[0003] The embodiments of the present disclosure relate to the field of chips, and in particular, to a method for determining chip screening specifications, a storage medium, and an electronic device. Background Art

[0004] Early failure screening technology relies more on large-scale burn-in (BI) experiments combined with mass production final test (FT) screening chip tests for a posteriori judgment. By performing accelerated life tests (ALT) on some chips to prematurely age them to cover the early failure stage, it stimulates products (chips) with premature death defects, and then conducts secondary sorting through functional testing.

[0005] As chip scale and complexity increase, early failures may no longer manifest as a complete or partial loss of chip functionality, but rather a relatively large performance degradation. That is, the hidden dangers of early failures are hidden in the chip performance degradation scenario, and existing early failure screening technologies are easily overlooked or misjudged.

[0006] Regarding the problem of neglect or misjudgment in identifying early-failure chip products in chip degradation scenarios in related technologies, no solution has been proposed yet. Summary of the Invention

[0007] The embodiments of the present disclosure provide a method, storage medium, and electronic device for determining chip screening specifications to at least solve the problem of neglecting or misjudging the identification of early-failed chip products in chip degradation scenarios in related technologies.

[0008] According to one embodiment of the present disclosure, a method for determining chip screening specifications is provided, comprising:

[0009] Obtain statistical distributions of sensitive parameters of samples of the chip to be screened in the aging BI experiment and the accelerated life test ALT respectively;

[0010] Extracting characteristic quantities of the statistical distribution of the BI experiment and the ALT respectively;

[0011] The screening specifications of the chip to be screened are determined based on the comparison results of the BI experiment and the characteristic quantities of the ALT.

[0012] According to another embodiment of the present disclosure, a computer-readable storage medium is provided, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when running.

[0013] According to another embodiment of the present disclosure, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any one of the above method embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] FIG1 is a hardware structure block diagram of a computer terminal for a method for determining chip screening specifications according to an embodiment of the present disclosure;

[0015] FIG2 is a flow chart of a method for determining chip screening specifications according to an embodiment of the present disclosure;

[0016] FIG3 is a flow chart of obtaining statistical distributions of sensitive parameters of chip samples in BI experiments and ALT experiments respectively according to an embodiment of the present disclosure;

[0017] FIG4 is a first distribution diagram of sensitive parameters according to an embodiment of the present disclosure;

[0018] FIG5 is a second distribution diagram of sensitive parameters according to an embodiment of the present disclosure;

[0019] FIG6 is a specific flow chart of a method for determining chip screening specifications according to an embodiment of the present disclosure;

[0020] 7 is a flow chart of screening chips in a case where a BI experiment is included in the mass production screening stage according to an embodiment of the present disclosure;

[0021] FIG8 is a flow chart of screening chips without BI experiments in the mass production screening stage according to an embodiment of the present disclosure;

[0022] FIG9 is a third distribution diagram of sensitive parameters according to an embodiment of the present disclosure;

[0023] FIG10 is a fourth distribution diagram of sensitive parameters according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0024] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings and in conjunction with embodiments.

[0025] It should be noted that the terms "first", "second", etc. in the specification and claims of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0026] The method embodiments provided in the embodiments of the present disclosure can be executed in a computer terminal or a similar computing device. Taking operation on a computer terminal as an example, FIG1 is a hardware structure block diagram of a computer terminal for a method for determining chip screening specifications in an embodiment of the present disclosure. As shown in FIG1 , the computer terminal may include one or more (only one is shown in FIG1 ) processors 102 (the processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the above-mentioned computer terminal may also include a transmission device 106 and an input and output device 108 for communication functions. It can be understood by those skilled in the art that the structure shown in FIG1 is only for illustration, and it does not limit the structure of the above-mentioned computer terminal. For example, the computer terminal may also include more or fewer components than those shown in FIG1 , or have a configuration different from that shown in FIG1 .

[0027] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as a computer program corresponding to a method for determining chip screening specifications in an embodiment of the present disclosure. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, implementing the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some instances, the memory 104 may further include a memory remotely located relative to the processor 102, and these remote memories may be connected to the computer terminal via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0028] The transmission device 106 is used to receive or transmit data via a network. A specific example of the aforementioned network may include a wireless network provided by a computer terminal's communications provider. In one embodiment, the transmission device 106 includes a network interface controller (NIC), which can be connected to other network devices via a base station to enable communication with the Internet. In another embodiment, the transmission device 106 may be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0029] In this embodiment, a method for determining chip screening specifications running on the above-mentioned computer terminal is provided. FIG2 is a flow chart of the method for determining chip screening specifications according to an embodiment of the present disclosure. As shown in FIG2 , the flow chart includes the following steps:

[0030] Step S202, obtaining statistical distributions of sensitive parameters of samples of the chip to be screened in the aging BI experiment and the accelerated life test ALT respectively;

[0031] In one embodiment, before the above-mentioned step S202, the method may further include experimental condition preparation, including at least one of the following steps: chip design, chip testing, chip sample preparation, BI experimental condition preparation, ALT condition preparation, and experimental design (Design of Experiments, abbreviated as DOE) preparation.

[0032] In one embodiment, FIG3 is a flowchart of obtaining the statistical distribution of sensitive parameters of chip samples in BI experiments and ALT, respectively, according to an embodiment of the present disclosure. As shown in FIG3 , the above-mentioned step S202 may specifically include:

[0033] Step S302, performing the BI test and the ALT test on the sample respectively;

[0034] Performing ALT and BI experiments on chip samples accurately provides information about the distribution of sensitive parameters over both the long-term and early lifespan of the chip. The methods in this disclosed embodiment are compatible with variations in chips, reliability testing equipment, and reliability testing protocols. Regarding ALT and BI experimental conditions, the only requirement is consistency between the two experimental environments and sample sources; no other restrictions apply.

[0035] Step S304, collecting the sensitive parameters of the sample in the BI experiment and the ALT respectively;

[0036] In one embodiment, the sensitive parameter may include a test parameter characterizing the chip degradation process, which is specifically manifested in that the sensitive parameter increases with aging time.

[0037] In one embodiment, step S304 may specifically include selecting sensitive parameters and collecting values ​​of the sensitive parameters before, during, and after the BI and ALT experiments. The purpose and principle of selecting sensitive parameters is to ensure that the acquired test parameters effectively characterize the degradation path of the chip being screened.

[0038] For chips, 1. Under normal circumstances, the distribution boundary of sensitive parameters under long-term life is larger than the distribution boundary of sensitive parameters under early life. In this case, it can be considered that the degradation path of sensitive parameters under early life is normal, and the risk of early failure caused by defects is small; 2. Since the ALT samples exclude samples with early failure, it can be considered that ALT directly reflects the statistical characteristics of sensitive parameters under long-term life conditions dominated by the intrinsic failure mechanism of the product. If the distribution boundary of sensitive parameters under early life is larger than the distribution boundary of sensitive parameters under long-term life, it can be considered that the excess sample subset has the risk of early failure. In this embodiment, the samples subjected to ALT are samples that exclude early failure.

[0039] Step S306: Determine the statistical distribution of the sensitive parameters of the BI experiment and the ALT according to the sensitive parameters.

[0040] Based on the acquired sensitive parameters, the distribution of the sensitive parameters of the BI experiment and the ALT experiment were fitted respectively.

[0041] Step S204, extracting characteristic quantities of the statistical distribution of the BI experiment and the ALT respectively;

[0042] In one embodiment, the characteristic quantity may include at least one of the following: a maximum value and a 6 sigma value. The characteristic quantity may be selected based on the actual chip performance characterization requirements. The 6 sigma value represents the interval of six standard deviations from the mean in a statistical distribution.

[0043] Step S206 , determining the screening specifications of the chip to be screened based on the comparison results of the BI experiment and the characteristic quantities of the ALT.

[0044] Through the above steps S202 to S206, based on two different types of reliability tests, ALT and BI experiments, the statistical distribution of sensitive parameters of the chip under long-term life and early life are respectively obtained. By comparing the characteristic quantities of the statistical distributions of the two types of experiments, screening specifications that are more suitable for chips in chip degradation scenarios are obtained. This solves the problem of neglecting or misjudging chip products that fail early in chip degradation scenarios in related technologies, and can obtain more accurate chip screening specifications in degradation scenarios.

[0045] At the same time, since leakage due to early failure will cause yield loss in chip mass production, pushing up the overall cost of chip production to become unbearable, the solution of the embodiment of the present disclosure can obtain more accurate chip screening specifications, can provide early warning and identify chip products with potential early failure risks, can reduce the cost of chip production, and can ensure and improve the reliability of the chip.

[0046] Due to the diversity of early failure mechanisms, especially the neglect and misjudgment in degradation scenarios, the original chip mass production screening specifications or functional test specifications are no longer applicable and need to be adjusted and tightened. The solution of the embodiment of the present disclosure provides a chip screening specification in degradation scenarios and tightens the Sign Off standard.

[0047] The solution of the disclosed embodiment is applicable to the reliability screening of any chip product, and is particularly applicable to automotive-grade chip products that are sensitive to early failure.

[0048] In one embodiment, the above step S206 may specifically include: if the feature value of the BI experiment is less than or equal to the feature value of the ALT, using the feature value of the ALT as the screening specification.

[0049] When the distribution boundary of the sensitive parameters under long-term life is larger than the distribution boundary of the sensitive parameters under early life, it can be considered that there is no abnormality in the degradation path under early life and the risk of early failure caused by defects is small. At this time, the boundary of the sensitive parameters under long-term life is mainly considered as the new screening specification.

[0050] FIG4 is a distribution diagram 1 of sensitive parameters according to an embodiment of the present disclosure, wherein P_raw_spec is the initial screening specification of the sensitive parameter, ΔP is the difference between the screening specification P_BI_spec and P_raw_spec in the BI mass production experiment, and P_ALT_max is the characteristic quantity of ALT. As shown in FIG4 , when P_BI_max ≤ P_ALT_max, P_BI_spec, P_raw_spec, and ΔP satisfy the following formula:

[0051] P_BI_spec=P_raw_spec-ΔP;

[0052] ΔP = P_raw_spec - P_ALT_max;

[0053] In summary, when P_BI_max ≤ P_ALT_max, P_BI_spec = P_ALT_max. That is, when P_BI_max ≤ P_ALT_max, selecting P_ALT_max as the new P_BI_spec is sufficient to cover the screening of degenerative premature defects during BI mass production experiments.

[0054] In one embodiment, the above step S206 specifically further includes: when the characteristic value of the BI experiment is greater than the characteristic value of the ALT, determining an interval where early failure exists, and determining the screening specification in the interval.

[0055] Because the ALT sample excludes samples with early-life failures, it can be considered that the ALT directly reflects the characteristics of sensitive parameters under long-term life conditions dominated by the chip's intrinsic failure mechanism. If the distribution boundary of the sensitive parameter under early-life conditions is larger than the distribution boundary of the sensitive parameter under long-term life, it can be considered that the sample subset in the excess portion is at risk of early-life failure, and new screening specifications need to be determined for the excess portion.

[0056] FIG5 is a second distribution diagram of sensitive parameters according to an embodiment of the present disclosure. As shown in FIG5 , when P_BI_max>P_ALT_max, the sensitive parameters of the early failure samples may fall in the interval (P_ALT_max, P_BI_max). Therefore, it is necessary to determine a new screening specification in the interval (P_ALT_max, P_BI_max).

[0057] In one embodiment, determining the screening specification in the interval includes: when there are samples with early failure in the interval, using the numerical value of the sensitive parameter corresponding to the sample as the screening specification; when there are no samples with early failure in the interval, using the characteristic value of the BI experiment as the screening specification of the chip.

[0058] Specifically, failure analysis is performed on samples with sensitive parameters on (P_ALT_max, P_BI_max) to determine whether there is early failure. If so, the sensitive parameter corresponding to the sample is recorded as P_BI_threshold. At this time, P_BI_spec = P_BI_threshold; if not, that is, there is no sample with early failure on (P_ALT_max, P_BI_max), at this time, P_BI_spec = P_BI_max.

[0059] In summary, when P_BI_max>P_ALT_max,

[0060] In one embodiment, the above-mentioned step S206 may further specifically include: setting a variable value in the interval, integrating the density function of the sensitive parameter of the BI experiment in the interval from the variable value to the characteristic quantity of the BI experiment to obtain an integral function, calculating the variable value when the function value of the integral function is equal to a set threshold value, and using the variable value as the screening specification, wherein the set threshold value is a set early failure rate.

[0061] Specifically, define the variable value P_BI_threshold, set the Early Failure Ratio (EFR) EFR, integrate the density function f(p) of the sensitive parameter P of the BI experiment in the interval (P_BI_threshold, P_BI_max), where p is the value of the sensitive parameter P, and calculate P_BI_threshold when the function value of the integral function is equal to EFR, then P_BI_spec = P_BI_threshold.

[0062] FIG6 is a specific flow chart of a method for determining chip screening specifications according to an embodiment of the present disclosure. As shown in FIG6 , the process includes the following steps:

[0063] Step S601, preparing experimental conditions;

[0064] Step S602, performing ALT and BI tests respectively;

[0065] Step S603: sensitive parameter collection;

[0066] Reliability data before and after the ALT and BI tests were collected for subsequent characterization of the degradation path and statistical distribution of sensitive parameters.

[0067] Step S604, degradation distribution;

[0068] Based on the reliability test data, the sensitive parameter distributions of ALT and BI before and after aging were fitted respectively.

[0069] Step S605, comparison;

[0070] The sensitive parameter distributions under long-term and short-term lifespans obtained from ALT and BI tests are compared with each other to plan the BI screen specifications.

[0071] Step S606, modifying the specifications of the burn-in screen;

[0072] Based on step S605, an accurate threshold value (ie, BI screen sheet specification) is obtained.

[0073] Step S607, screening pieces in small batches;

[0074] The sieve plate test before formal mass production is implemented based on the BI sieve plate specifications formulated in steps S602-S605, simulating the product online use scenario and lasting for a period of time, and the number of samples is increased compared to the BI test in step S602.

[0075] Step S608, yield rate feedback;

[0076] If it is found that the yield rate result of the small batch of screen pieces implemented based on the screen piece specifications formulated in steps S602-S605 does not meet expectations, the process returns to step S606 for correction.

[0077] It should be noted that steps S607-S608 are for secondary fine-tuning of the Bi sieve specifications extracted in steps S604-S606 based on the product online usage data. If the mass production sieve in step S609 is not subjected to additional BI experimental screening, it can be omitted.

[0078] Step S609: mass-produce screen sheets.

[0079] In one embodiment, the method further comprises: when the mass production screening stage of the chip to be screened includes the BI experiment, screening the chip to be screened using the screening specification.

[0080] FIG7 is a flow chart of screening chips in a case where a BI experiment is included in the mass production screening stage according to an embodiment of the present disclosure. As shown in FIG7 , the flow includes:

[0081] Step S701, sample production;

[0082] Step S702, BI experiment;

[0083] Step S703, functional test;

[0084] Step S704, failure determination;

[0085] From the steps in the above method, it can be seen that

[0086] When P_BI_max≤P_ALT_max, P_BI_spec=P_ALT_max;

[0087] When P_BI_max>P_ALT_max, P_BI_spec=P_BI_threshold.

[0088] It should be noted that when the failure analysis method is used, under the condition of P_BI_max>P_ALT_max, there is a special case, that is, when there are no samples with early failure on (P_ALT_max, P_BI_max), P_BI_spec=P_BI_max.

[0089] The chip test results are screened using the above screening specification P_BI_spec. If the chip passes the screening, that is, the failure judgment is no, then go to step S705; otherwise, go to step S706;

[0090] Step S705, sample classification bin;

[0091] Chips that meet the above-mentioned screening specifications are judged to have no risk of early failure, and further evaluation is conducted to determine whether there are other performance defects and to classify them.

[0092] Step S706: The chip is online; the process ends.

[0093] If there are no other performance defects, the chip will be put online.

[0094] Step S707: invalidate and discard.

[0095] Chips that do not meet the above-mentioned screen specifications are judged as premature failures and are scrapped, and the process ends.

[0096] In one embodiment, the method further comprises:

[0097] When the mass production screening stage of the chip to be screened does not include the BI experiment, the difference is subtracted from the screening specification to obtain a revised value, the screening specification is updated using the revised value, and the chip to be screened is screened using the updated screening specification, wherein the difference is the difference between the sensitive parameters of the sample before and after the BI experiment.

[0098] FIG8 is a flow chart of screening chips in a mass production screening phase without BI experiments according to an embodiment of the present disclosure. As shown in FIG8 , the process includes:

[0099] Step S801, sample production;

[0100] Step S802, functional test;

[0101] Step S803, failure determination;

[0102] Compared with the above step S704, if the mass production screening stage does not include the BI experiment, the degradation amount Δp′ of the sensitive parameter after the BI test needs to be compensated in advance, where Δp′ is the difference between the numerical value P_BI of the sensitive parameter of the sample before the BI experiment and the numerical value P_BI′ of the sensitive parameter after the experiment, that is, Δp′=P_BI-P_BI′.

[0103] The above step S803 specifically includes: subtracting the difference from the screening specification to obtain a revised value, using the revised value to update the screening specification, if it passes the screening, that is, the failure judgment is no, then go to step S804; otherwise, go to step S806.

[0104] FIG9 is a third distribution diagram of sensitive parameters according to an embodiment of the present disclosure. As shown in FIG9 ,

[0105] If P_BI_max≤P_ALT_max, then P_BI_spec, ΔP, and Δp′ satisfy the following formula:

[0106] ΔP = P_raw_spec - P_ALT_max;

[0107] P_BI_spec=P_raw_spec-ΔP-Δp′;

[0108] It can be obtained that P_BI_spec = P_ALT_max - Δp′.

[0109] FIG10 is a fourth distribution diagram of sensitive parameters according to an embodiment of the present disclosure. As shown in FIG10 ,

[0110] If P_BI_max>P_ALT_max, then P_BI_spec, ΔP, and Δp′ satisfy the following formula:

[0111] ΔP=P_raw_spec-P_BI_theshold;

[0112] P_BI_spec=P_raw_spec-ΔP-Δp′;

[0113] It can be obtained that P_BI_spec=P_BI_theshold-Δp′.

[0114] In summary:

[0115] When P_BI_max≤P_ALT_max, P_BI_spec=P_ALT_max-Δp′;

[0116] When P_BI_max>P_ALT_max, P_BI_spec=P_BI_theshold-Δp′.

[0117] It should be noted that when the failure analysis method is used, under the condition of P_BI_max>P_ALT_max, there is a special case, that is, when there are no samples with early failure on (P_ALT_max, P_BI_max), P_BI_spec=P_BI_max-Δp′.

[0118] It can be obtained that P_BI_spec (the mass production screening stage does not include BI experiments) = P_BI_spec (the mass production screening stage includes BI experiments) - Δp′.

[0119] Step S804, sample binning;

[0120] Chips that meet the above-mentioned screen specifications are judged to have no risk of early failure, and further evaluation is performed to determine whether there are other performance defects or classification is performed.

[0121] Step S805: The chip is online; the process ends.

[0122] If there are no other performance defects, the chip will be put online.

[0123] Step S806: invalidate and discard.

[0124] Chips that do not meet the above-mentioned screen specifications are judged as premature failures and are scrapped, and the process ends.

[0125] The screening specifications provided in the embodiments of the present disclosure have no special requirements for whether BI experiments are included in the mass production stage, which provides a certain degree of flexibility for the overall BI screening solution and can reduce testing costs.

[0126] Through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus the necessary general hardware platform, and of course it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present disclosure is essentially or the part that contributes to the prior art can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk), including a number of instructions for enabling a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present disclosure.

[0127] An embodiment of the present disclosure further provides a computer-readable storage medium, in which a computer program is stored. The computer program is configured to execute the steps of any one of the above method embodiments when run.

[0128] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk, or an optical disk.

[0129] An embodiment of the present disclosure further provides an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to perform the steps in any of the above method embodiments.

[0130] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0131] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail here.

[0132] Obviously, those skilled in the art should understand that the modules or steps of the present disclosure described above can be implemented using a general-purpose computing device, they can be concentrated on a single computing device, or distributed across a network composed of multiple computing devices, they can be implemented using program code executable by the computing device, and thus, they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be performed in a different order than herein, or they can be fabricated into separate integrated circuit modules, or multiple modules or steps can be fabricated into a single integrated circuit module for implementation. Thus, the present disclosure is not limited to any particular combination of hardware and software.

[0133] The foregoing description is merely a preferred embodiment of the present disclosure and is not intended to limit the present disclosure. Those skilled in the art will readily appreciate that various modifications and variations of the present disclosure are possible. Any modifications, equivalent substitutions, or improvements made within the principles of the present disclosure shall be included within the scope of protection of the present disclosure.

Claims

1. A method for determining chip screening specifications, comprising: Obtain statistical distributions of sensitive parameters of samples of the chip to be screened in the aging BI experiment and the accelerated life test ALT respectively; Extracting characteristic quantities of the statistical distribution of the BI experiment and the ALT respectively; The screening specifications of the chip to be screened are determined based on the comparison results of the BI experiment and the characteristic quantities of the ALT.

2. The method according to claim 1, wherein Obtain statistical distributions of sensitive parameters of samples of the chip to be screened in the aging BI experiment and the accelerated life test ALT, including: Performing the BI test and the ALT test on the samples respectively; The sensitive parameters of the sample in the BI experiment and the ALT are collected respectively; The statistical distribution of the sensitive parameters of the BI experiment and the ALT is determined according to the sensitive parameters.

3. The method according to claim 1, wherein Determining the screening specifications of the chip to be screened based on the comparison results of the BI experiment and the characteristic quantities of the ALT, including: When the characteristic value of the BI experiment is less than or equal to the characteristic value of the ALT, the characteristic value of the ALT is used as the screening specification; When the characteristic value of the BI experiment is greater than the characteristic value of the ALT, an interval in which early failure exists is determined, and the screening specification is determined in the interval.

4. The method according to claim 3, wherein: Determining the screening specifications in the interval includes: In the case where there are samples with early failure in the interval, the values ​​of the sensitive parameters corresponding to the samples are used as the screening specifications; When there are no samples with early failure in the interval, the characteristic quantity of the BI experiment is used as the screening criterion.

5. The method according to claim 3, wherein: Determining the screening specifications in the interval includes: A variable value is set in the interval, a density function of the sensitive parameter of the BI experiment is integrated in the interval from the variable value to the characteristic quantity of the BI experiment to obtain an integral function, the variable value is calculated when the function value of the integral function is equal to a set threshold value, and the variable value is used as the screening specification, wherein the set threshold value is a set early failure rate.

6. The method according to any one of claims 1 to 5, wherein: The method further comprises: When the mass production screening stage of the chip to be screened includes the BI experiment, the chip to be screened is screened using the screening specifications.

7. The method according to any one of claims 1 to 5, wherein: The method further comprises: When the mass production screening stage of the chip to be screened does not include the BI experiment, the difference is subtracted from the screening specification to obtain a revised value, the screening specification is updated using the revised value, and the chip to be screened is screened using the updated screening specification, wherein the difference is the difference between the sensitive parameters of the sample before and after the BI experiment.

8. The method according to claim 1, wherein The sensitive parameters include test parameters that characterize the chip degradation process.

9. The method according to claim 1, wherein The characteristic quantity includes at least one of the following: a maximum value, a 6 sigma value.

10. A computer-readable storage medium having a computer program stored therein, wherein: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 9 are implemented.

11. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor implements the steps of the method according to any one of claims 1 to 9 when executing the computer program.

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