Method for providing electrical vias

Abstract

The invention relates to a method for producing a component comprising a via region extending along a vertical direction from a rear side to a front side of the component. Firstly, a substrate comprising an electrically conductive or semiconducting material is provided. The substrate is subdivided into two or more galvanically separated zones, wherein the subdivision is formed by a continuous separation of the substrate along the vertical direction and, after the separation, an empty region is present between the two or more zones. The empty region is at least partially filled with an insulating material. An electrical terminal contact is applied to the front side and the rear side of at least one zone such that the at least one zone functions as a via region. The invention furthermore relates to a component producible by the method according to the invention.

Description

[0001] METHOD FOR PROVIDING ELECTRICAL VIA CONTACTS

[0002] DESCRIPTION

[0003] The invention relates to a method for producing a component comprising a via region which extends along a vertical direction from a rear side to a front side of the component. In this case, a substrate comprising an electrically conductive or semiconducting material is first provided. The substrate is subdivided into two or more galvanically separated zones, wherein the subdivision is formed by a continuous separation of the substrate along the vertical direction and, after the separation, an empty region exists between the two or more zones. The empty region is at least partially filled with an insulating material. An electrical connection contact is applied to the front side and the rear side of at least one zone, such that the at least one zone functions as a via region.

[0004] Furthermore, the invention relates to a component that can be produced by the method according to the invention.

[0005] Background and state of the art

[0006] Vias (V / AS) refer to vertical electrical connections between conductor levels, as they are often found in semiconductor components. Vias are particularly common in integrated circuits and enable the transmission of current or electrical signals between different levels of a semiconductor component.

[0007] Since wafers or substrates containing silicon are often used in semiconductor technology, through-silicon vias (TSVs) are a common type of via. In particular, silicon vias can enable vertical electrical connections between stacked microchips in 3D integrated circuits. In particular, MEMS components can also be operated within or on a silicon substrate or wafer stack.

[0008] The review article Sordo et al. (2018) describes common processes in the state of the art for providing vias on a substrate. This usually begins with an etching of the substrate, which creates trenches on the substrate. The substrate is then coated with an insulating material. This insulates, in particular, the sidewalls of the trenches. After the insulating material has been coated, the insulating material on the surface of the substrate is often at least partially removed to smooth the surface. Furthermore, the trenches are filled with an electrically conductive material, which forms the via in the substrate. To transmit the electrical current, additional metal layers are applied to both sides of the electrically conductive filler material to provide an electrical connection.Depending on the application, the via may extend through the entire substrate or only partially through the substrate to a surface. Wang (2015) also provides an overview of options for forming vias, particularly with regard to 3D integration in wafer stacks. Wafer stacks consist of multiple wafers or substrates that encapsulate a MEMS component. At least two substrates are used for this purpose, which are also referred to as the bottom substrate and the cap substrate. For the electrical functionality of the MEMS component, it is usually necessary to form a via to the MEMS component of the wafer stack through the bottom substrate and / or the cap substrate, in particular for controlling and / or readout of the MEMS component. To encapsulate the MEMS component within the wafer stack, the bottom substrate and the cap substrate are bonded together.The via can be formed before or after bonding to the base substrate and / or cap substrate. Here, too, an etching is performed on the base substrate and / or cap substrate, passivation or insulation is performed by coating an insulating material, and then the trenches are filled with an electrically conductive material. Copper, tungsten, and / or platinum are known in the art as electrically conductive fill materials for forming the via.

[0009] A similar method is disclosed in DE 10 2011 080 774 B4 for producing a semiconductor structure. For this purpose, a substrate is provided, which comprises a carrier layer, an insulating layer, and a semiconductor layer located on the insulating layer. A dry etching process is performed to etch down to the insulating layer, forming trenches in the semiconductor layer. An oxide layer is then applied, thereby passivating the trenches. The trenches are then filled with polysilicon, which serves as an electrically conductive material for forming the via. The polysilicon is electrically contacted for an electrical connection.

[0010] US 9,459,224 B1 discloses a manufacturing method for a gas sensor. To provide through-holes in the gas sensor, trenches are introduced into a substrate. Initially, the trenches do not extend completely through the substrate. In a later process step, the semiconductor substrate is thinned to expose the trenches so that they completely separate the substrate. Furthermore, insulating structures are introduced into the trenches. Subsequently, a dielectric layer is applied to the substrate along the trenches, and a membrane film is applied to the dielectric layer. A heater is formed on the membrane film and electrically connected to the through-holes formed by portions of the semiconductor substrate.

[0011] US 2013 / 0147020 A1 relates to a method for providing vias. A highly doped semiconductor substrate is first provided. During front-side processing, a dielectric layer is first applied to the substrate surface. The dielectric layer is opened in the areas where electrical contact with the substrate is to be established. After the application of a conductor layer and further dielectric layers, a functional layer is applied, in which a micromechanical sensor structure is incorporated. A metallization serves as the bonding metal, onto which a cap wafer is applied. A dielectric intermediate layer is applied to the back of the substrate and opened in an area of ​​the via to be created. A trench or isolation trench extends across the entire thickness of the substrate into the dielectric layers.As a result, a connection region of the semiconductor substrate is electrically insulated from the adjacent substrate material and a via is formed in the semiconductor substrate, which is connected to the sensor structure via the conductor track.

[0012] The methods commonly used in the prior art are advantageous in that electrical functionality can be precisely specified through the geometric design and / or the selection of the electrically conductive filler material. However, a disadvantage in terms of the process is that a large number of steps must be performed, such as complex metal filling, to form the via. Another disadvantage is that a flat geometry of a substrate surface is often not achieved, since multiple connection components often have to be formed. Furthermore, it can happen that residues of insulating material remain on the surface of the substrate, which also have a detrimental effect on the provision of a smooth surface and can complicate integration into corresponding applications.

[0013] In light of the state of the art, there is therefore a need to provide an alternative method for manufacturing components with vias.

[0014] Object of the invention

[0015] The object of the invention is to eliminate the disadvantages of the prior art. In particular, one object of the invention is to provide a method that enables the simple production of a component with a through-hole connection with desired electrical properties, while preferably maintaining a flat substrate surface for subsequent integration.

[0016] Summary of the invention

[0017] The object of the invention is achieved by the independent claims. Advantageous embodiments of the invention are disclosed in the dependent claims.

[0018] In a first aspect, the invention relates to a method for producing a component comprising a via region which extends along a vertical direction from a rear side to a front side of the component, the method comprising the following steps: a) providing a substrate comprising an electrically conductive or semiconducting material, b) dividing the substrate into two or more galvanically separated zones, wherein the division is effected by a continuous separation of the substrate along the vertical direction and after the separation there is an empty region between the two or more zones, c) at least partially filling the empty region with an insulating material, d) applying an electrical connection contact on the front side and the rear side to at least one zone of the two or more zones, such that the at least one zone functions as a via region.The claimed method is advantageously characterized by particularly efficient process control. In contrast to prior art methods, it is particularly unnecessary, after process steps for removing a region of the substrate have been performed, to fill the removed regions with a conductive material to create the via region. In the prior art, metal filling is often performed for this purpose, but this is technically complex. The method according to the invention can advantageously completely dispense with this processing.

[0019] Instead, the inventive method utilizes the conductivity of the substrate itself to form via-hole regions. By appropriately separating the substrate, galvanically separated zones are created that serve as a power or signal line along a vertical direction and can thus function as via-hole regions. The simplification of the process steps allows for both time and cost savings, making the method particularly suitable for mass applications.

[0020] Another advantage is that by separating the substrate into galvanically separated zones, through-hole plating areas can be created, while simultaneously achieving a very flat or level geometry of the component's surface. This way, the flat surface of a substrate is advantageously not compromised by its separation into galvanically separated zones.

[0021] Furthermore, it is not necessary to form additional structures or components for an electrical connection on the substrate; instead, the zones can be contacted directly without unnecessarily disrupting the flat surface of the substrate.

[0022] The planar design of the component can lead to a number of advantages, particularly from an application perspective. Firstly, it facilitates the integration of the component into more complex structures. If the component is a sensor, the planar surface can also ensure reduced disturbance to the environment, which is advantageous for flow sensors or aeroacoustic sensors, for example.

[0023] A further advantage of the method according to the invention is that, by designing the zones, electrical properties, such as a resistance and / or an inductance, of the via region can be adjusted with high flexibility with regard to the desired application.

[0024] A particular advantage is that this allows a particularly low electrical resistance to be achieved for the via region. The electrical resistance of the via region depends, among other things, on the internal resistance or specific resistance, the height and the cross-section of the via region. In particular, the resistance is proportional to the vertical height and inversely proportional to the horizontal cross-section of the via region. The proportional relationship to the vertical height and the inversely proportional relationship to the cross-section of the via region can be described, without being limited to theory, by the relationship R = p * h / A, where R denotes the resistance, p the specific resistance, h the vertical height (or simply height) and A the (horizontal) cross-section of the via region.

[0025] The height preferably refers to the dimension of the via region from the back to the front. The horizontal cross-section of the via region is determined in particular by the (cross-sectional) area of ​​the respective zones. Since the substrate is divided into a corresponding number of zones to form the via regions, the cross-sectional area of ​​the zones can be selected to be high. The sum of the (horizontal) cross-sectional areas of all zones preferably essentially corresponds to the (horizontal) cross-sectional area of ​​the substrate.

[0026] Thus, in comparison to the introduction of relatively small, limited vias in the prior art (e.g., by filling vertical holes or trenches with a conductive material), an extremely low electrical resistance can be achieved. For example, when using gallium arsenide (preferably doped with silicon and / or tin) as the substrate material, a specific resistance p of 0.001 Ω cm can be assumed. With a height h of 400 pm for the via area and a cross-section A of 500 pm * 500 pm = 250,000 pm 2 the following resistance can be approximately obtained:

[0027] R = 0.001 Q 'cm * 400 pm / 250 000 pm 2 = 0.001Q'cm * 0.04cm / 0.0025cm 2 = 0.016 CI.

[0028] Such low electrical resistances reduce ohmic losses and increase the performance of the component, allowing particularly fast and interference-free signal transmission.

[0029] A further advantage of the method according to the invention is that by separating the substrate into galvanically separated zones, via-connection regions can be created that exhibit low (self-)inductance. Inductance is a particularly relevant parameter for signal lines or alternating currents, since alternating magnetic fields can interfere with the signal or current lines. Since the (self-)inductance also decreases with a larger cross-section of the via-connection region, by separating the substrate into galvanically separated zones, via-connection regions with not only good conductivity but also low inductance can be advantageously created.

[0030] In the context of the invention, it is preferred that the cross section of the via region is only slightly lower, equal to, or greater than the height of the via region. For example, it may be preferred that the ratio of a cross-sectional dimension of the via region (preferably the largest extent of the via region in a cross-sectional plane) to the height of the via region is at least approximately 0.5, 1, 2, 3, 5, 10, or more. In this respect, a low inductance for the component can be set by the geometric design of the via region. Such a ratio of cross section to height makes it possible to achieve both low resistance, low inductance, and low impedance. The component that can be produced using the method is therefore particularly well suited for applications with low impedances (low impedance devices).

[0031] Any detrimental formation of parasitic capacitances that may arise between the multiple zones or vias can be counteracted by at least partially filling the insulating material. This can be achieved, in particular, by selecting the insulating material, as will be described in more detail below.

[0032] For the purposes of the invention, a component that can be produced using the method according to the invention preferably refers to a component that is used for circuits in electrical engineering or electronics, in particular in connection with semiconductor materials. The average person skilled in the art knows that the term "component" can be interpreted broadly. For example, a component within the meaning of the invention can comprise an integrated circuit that has transistors and / or diodes or can itself form such a component. The integrated circuits are preferably manufactured on substrates that can in particular comprise a semiconductor material, but are not limited thereto. In addition, by processing the substrate, components such as transistors, diodes and / or capacitors can be produced using the substrate material itself.

[0033] A component can also include, for example, or be itself, a circuit board, multiple processors, semiconductor memories, microcontrollers, converters, microchips, etc. A component can preferably be a component for and / or from semiconductor technology and / or microsystem technology.

[0034] The component particularly comprises a via region. Within the meaning of the invention, a via region preferably refers to a vertical electrical connection through which current can be conducted (vertically) between different levels. The current flow serves, for example, for signal transmission. Depending on the intended use, the diameter and, if applicable, the shape of the via region can vary. This can be determined, in particular, by the design of the galvanically separated zones that function as via regions.

[0035] The via region runs vertically from the front side to the back side. The front side and the back side refer to two opposite sides of the substrate and thus also to the zones. The vertical direction preferably refers to the direction that extends along the front side and the back side. A cross-sectional dimension (e.g., width) of the via region preferably refers to a dimension perpendicular to the vertical direction. Current conduction and signal transmission, in particular, occur along the vertical direction. The continuous separation of the substrate to form the zones occurs, for example, starting from the front side, but can also occur starting from a back side.

[0036] For the method according to the invention, a substrate comprising an electrically conductive or semiconducting material is preferably first provided. A substrate can, for example, refer to a circular or square disk having a thickness in the millimeter or submillimeter range. Semiconductor substrates are typically produced from monocrystalline or polycrystalline (semiconductor) blanks, so-called ingots, and generally serve as a substrate for, for example, coatings or components, in particular MEMS components and / or electronic circuits. The use of the term "wafer" for the substrate is also known in the prior art, with the substrate preferably referring to the material to be treated. For the purposes of the invention, the terms "wafer" and "substrate" can be used synonymously.

[0037] The substrate comprises an electrically conductive or semiconducting material. The electrically conductive material preferably refers to an electrical conductor in the conventional sense. The semiconducting material preferably refers to a semiconductor.

[0038] An electrically conductive material preferably has an electrical conductivity of at least 10 4 S / cm (Siemens per centimeter) or higher. An electrically semiconducting material preferably has an electrical conductivity that lies between the electrical conductivity of an electrical conductor and an insulator (insulating material), ie preferably between 10 4 S / cm and 10' 8 S / cm. These values ​​are preferably based on room temperature (approx. 20°C).

[0039] The substrate is divided into two or more galvanically separated zones. Galvanic separation preferably means that there is such a separation between the zones that electrical insulation exists between the two or more zones. In particular, with galvanic separation of the zones, there is no direct electrical connection between the individual zones. Instead, there is an empty space between the zones, which can be at least partially filled with an ambient fluid, air, vacuum, and / or an insulating material, but in any case does not allow a direct electrical connection between separated zones of the substrate.

[0040] The insulating material prevents, in particular, an electrical current from spreading in the transverse direction, but instead flows essentially along the height of the via area. Non-conductive materials (preferably with an electrical conductivity of less than 10') are preferred as insulating materials. 8 S / cm) and / or materials with a high specific resistance, preferably of at least approx. 10 2 0 * cm, 10 3 0 * cm, 10 4 0 * cm, 10 5 0 * cm, 10 6 0 * cm, 10 7 0 * cm, 10 8 0 * cm, 10 9 0 * cm, 10 10 0 * cm, 10 11 0 * cm, 10 12 0 * cm or more.

[0041] The above-mentioned preferred resistivities for the insulating material advantageously enable reliable protection between the zones or vias during current transmission. This promotes the long-term functionality of the component for current transmission.

[0042] In particular, the galvanic separation of the zones already provides electrical insulation between the zones or vias. The insulation provided by the separation or galvanic separation of the zones can preferably be characterized by a resistance of more than 1 kOhm, preferably more than 1 MOhm or more. Separating the substrate to form the zones, in particular, prevents cross-conduction of a current between the galvanically separated zones.

[0043] The zones are preferably formed by a continuous separation of the substrate along the vertical direction. This preferably means that a separation is carried out through the substrate, wherein the separation preferably takes place from the front to the back or vice versa. With a continuous separation, preferably no area of ​​the substrate remains between the separated zones. Such a continuous separation can be carried out, for example, by reactive ion deep etching (DRIE, Bosch process) and is extremely simple and precise to carry out in terms of process technology. Further preferred methods for separating the substrate into zones can be selected from a group comprising wet-chemical etching methods and / or dry etching methods, preferably physical and / or chemical dry etching methods and / or reactive ion etching.

[0044] It may be preferred for the continuous separation to be carried out in a single method step. Furthermore, a continuous separation of the substrate can mean that the separation to form adjacent zones takes place in several method steps. For example, it may be preferred for a partial separation of the substrate to initially take place along its vertical direction. The separation of the substrate can then preferably be continued in order to make the separation continuous. Other method steps can preferably also be carried out between the partial and complete separation of the substrate. Furthermore, a partial and then a complete separation of the substrate can preferably take place starting from a single side of the substrate, for example only starting from the front side or from the back side.It may also be preferred that the preferably initially partial and then complete separation of the substrate occurs starting from a front side and a back side (or vice versa). A continuous separation of the substrate can also be achieved, for example, by a partial separation from one side and then a continuous separation from the correspondingly opposite side of the substrate by a grinding process. This also creates a void between two adjacent zones.

[0045] Accordingly, a void exists between the separated at least two zones. In other words, the zones are provided by forming a void that arises through or after the continuous separation of the substrate along the vertical direction. The void preferably refers to a section of space that exists between the two or more zones after the continuous separation has been performed. In this respect, the void can also be understood as a recess.

[0046] The empty space is preferably at least partially filled with an insulating material. By at least partially filling the insulating material, a mechanical hold is achieved between the zones, while at the same time galvanic separation is still ensured. While after the immediate continuous severance, the zones are galvanically separated from one another, for example by an empty space filled with (ambient) air, the integrity of the multi-part substrate consisting of separate zones would no longer be ensured. The two or more zones are therefore also mechanically connected to one another, in particular by the insulating material, but remain electrically insulated from one another. The at least partial filling preferably comprises a partial or complete filling of the empty space.Partial filling preferably means filling the empty space by a proportion of at least 10%, at least 20%, at least 30%, at least 40%, at least 50%, at least 60%, at least 70%, at least 80%, or at least 90% of the volume of the empty space. Complete filling preferably means filling the empty space by 95% - 100% of the volume. The insulating material preferably means an electrical insulating material, ie, in particular one or more dielectric materials, with preferred suitable materials being mentioned elsewhere herein.

[0047] Separating the substrate into zones preferably means that the resulting zones (or sections of the substrate) together form the entire substrate. This means that the substrate is preferably divided into zones for forming the via regions by the separation, so that after the separation of the substrate, all zones can preferably function as via regions.

[0048] To utilize the zones as vias, an electrical connection contact is preferably applied to the front and back of the respective zone. Thus, the current flows from the front to the back, or vice versa, between the electrical connection contacts through the via. An electrical connection contact preferably means an electrical connection to the zone or to the via. In particular, an electrical connection contact can enable the transfer or (vertical) forwarding of the electrical current to other areas of the component.

[0049] In a further preferred embodiment, the method is characterized in that the continuous separation of the substrate in a horizontal cross section of the substrate is non-rectilinear, so that preferably facing surfaces of the adjacent zones are characterized by a roughness which contributes to the mechanical stability of the component.

[0050] The horizontal cross-section preferably corresponds to a cross-section that is substantially perpendicular to the vertical direction along which the continuous separation of the substrate is carried out to form the zones. In other words, a continuous separation is preferably carried out substantially vertically, but the separation line along which the separation is carried out is preferably non-rectilinear in a horizontal cross-section of the substrate. The separation line preferably denotes a horizontal line along which the cut and thus the division of the substrate is carried out to form the zones. The separation line can preferably be curved, wavy, meandering and / or angular, for example zigzag-shaped, rectangular and / or square.As a result, the surfaces of the zones facing each other are rough, as the facing surfaces receive protrusions and / or indentations (in a horizontal plane perpendicular to the vertical direction) corresponding to the parting line. The facing surfaces of the zones are therefore uneven, wherein the unevenness can preferably be characterized by a roughness (synonymously also roughness). The preferred method advantageously allows the roughness of the facing surfaces of the zones to be adjusted. This can be determined, for example, by the design and / or dimensioning of the parting line along which the separation is carried out along the vertical direction in order to provide the zones from the substrate. Another advantage here is that the roughness of the facing surfaces of the zones supports mechanical stability between adjacent zones.Preferably, the mechanical connection between the facing surfaces of adjacent zones is achieved through a positive fit resulting from the non-linear separation of the substrate. The mechanical connection via the roughness or a positive fit advantageously ensures a stable and strong connection between the adjacent zones. Another advantage here is that a long-lasting connection between the adjacent zones can be ensured even under loads, for example, of a thermal and / or mechanical nature.

[0051] In a further preferred embodiment, the method is characterized in that adjacent zones in a horizontal cross-section comprise corrugations adapted to one another.

[0052] A corrugation preferably refers to an unevenness (e.g., a protrusion or indentation) of a surface of a zone facing an adjacent zone, wherein the unevenness preferably exists relative to a general surface profile of the surface. Thus, the corrugation can preferably represent a protrusion that is present along a substantially planar surface of the zone. Preferably, in particular due to the non-rectilinear separation of the substrate, multiple corrugations are present on facing surfaces of the zones. A corrugation can preferably also be an indentation along a substantially planar surface of the zone.

[0053] The corrugations are preferably shape-matched. This preferably means that the geometry of the facing surfaces of the corrugations is such that the corrugations of mutually facing surfaces of the zones interlock. In particular, shape-matched corrugations can refer to mutually congruent corrugations. The interlocking of the corrugations preferably results from the shape of the corrugations, which preferably establishes a positive connection perpendicular to a connecting surface of the adjacent zones.

[0054] In a preferred embodiment, the mutually adapted corrugations comprise tongues and corresponding grooves, which establish a positive connection perpendicular to a connecting surface of the adjacent zones.

[0055] Preferably, therefore, a tongue-and-groove connection is provided by the corrugations of the adjacent zones. A tongue-and-groove connection preferably refers to a plug-in connection in which a tongue is inserted into a groove to create a mechanical connection between the adjacent zones. In the method according to the invention, a tongue-and-groove connection is preferably present immediately after a (non-rectilinear) separation of the substrate into different zones. Advantageously, the tongue-and-groove connection blocks a possible direction of movement that is substantially perpendicular to a connecting surface of the zones. In the sense of the invention, the connecting surface preferably means the surface that is spanned between the mutually facing surfaces of adjacent zones and preferably corresponds to a projection of the empty area along its horizontal cross-section.The connecting surface therefore preferably has the length of the dividing line and a height corresponding to the height of the substrate (vertical extension from the back to the front).

[0056] Tongues and corresponding grooves, which establish a positive connection perpendicular to a connecting surface of the adjacent zones, can be formed in different ways. For example, it may be preferred for a tongue (preferably a protrusion from one of the mutually facing surfaces of the zones) to widen into a corresponding or complementary groove (analogous to a click-lock parquet). For example, the tongue can have a triangular or free-form shape in a horizontal cross-section, which widens or opens towards the adjacent zone. In particular, the tongue can also be designed wider in one area than at its base, so that this area hooks positively into a correspondingly complementarily shaped groove.

[0057] Similar to a puzzle piece, the shape-adapted corrugations preferably achieve an interlocking or wedging of the adjacent zones, thus achieving sufficient mechanical stability and preventing any displacement of the zones even under mechanical stress on the component. In addition to a positive fit along a direction of the parting line, which can essentially be achieved by any corrugation, including a rectangular shape, on the facing surfaces, a puzzle-like interlocking can also be advantageously achieved by appropriately designing the corrugations, which simultaneously allows a positive fit perpendicular to the connecting surface.

[0058] Advantageously, the geometric design of the substrate separation alone creates a component with extremely long-term stability in terms of functionality. In particular, the shape of the separation line or the provision of a tongue-and-groove connection between adjacent zones can achieve a very stable form fit both perpendicular to the connecting surface of adjacent zones and along the separation line of adjacent zones. The shape of the zones can thus particularly effectively withstand any stresses on the component in a horizontal plane. With regard to vertical forces, the introduction of the insulating material, as explained, can preferably help to achieve sufficient mechanical stability.

[0059] In a further preferred embodiment, the substrate is monolithic. A monolithic substrate preferably refers to a substrate consisting of a single, continuous piece of material. Preferably, in the monolithic substrate, the entire structure of the substrate is formed as a single, uninterrupted unit, without the need to connect different layers or components to one another to achieve functionality. Advantageously, the use of a monolithic substrate achieves a particularly pronounced degree of compactness. The integration options of the component producible by the method are thereby expanded and simplified. In a further preferred embodiment, the method is characterized in that the substrate comprises a semiconductor, preferably a doped semiconductor, and / or a conductor.

[0060] In preferred embodiments, the semiconductor is silicon, germanium and / or a III-V compound semiconductor.

[0061] Preferably, the 111 V semiconductor is selected from a group comprising gallium nitride, aluminum nitride, indium nitride, boron nitride, scandium nitride, gallium phosphide, aluminum phosphide, indium phosphide, indium gallium phosphide, boron phosphide, gallium arsenide, aluminum arsenide, indium arsenide, boron arsenide, gallium antimonide, aluminum antimonide and / or indium antimonide.

[0062] The preferred semiconductor materials mentioned preferably have sufficient electrical conductivity to form a conductive via region or to be converted into one through appropriate processing steps. The preferred materials mentioned are also advantageously inexpensive and easy to acquire. Furthermore, they can be advantageously processed using standardized processes from semiconductor and / or microsystems technology to make mechanical, electrical, and / or optical adjustments so that the formed zones exhibit desired properties.

[0063] In a further preferred embodiment, the method is characterized in that the substrate has an electrical conductivity of at least 10' 6 S / cm (Siemens per centimeter), preferably at least 10' 4 S / cm, particularly preferably at least 10' 2 S / cm or more.

[0064] Electrical conductivity preferably refers to a property that describes how well electrical current can be conducted through the substrate and thus also through the zones that function as vias. In particular, conductivity represents the suitability for signal transmission via an electrical current through the via.

[0065] In a further preferred embodiment, the substrate comprises a material having a resistivity of less than about 1 0 * cm, less than about 10 -1 0 * cm, less than approx. 10' 2 0 * cm, less than approx. 10' 3 0 * cm, less than approx. 10' 4 0 * cm, less than approx. 10' 5 0 * cm, less than approx. 10' 6 0 * cm or less.

[0066] The mentioned preferred values ​​for the specific resistance advantageously enable an optimal, essentially loss-free current transport through the zones of the substrate.

[0067] The aforementioned preferred electrical conductivities can be adjusted by appropriately selecting the materials for the substrate, with a wide range of materials available to those skilled in the art in semiconductor and / or microsystem technology. Preferably, the electrical conductivity of the substrate or of one or more zones can also be further influenced by doping, for example, in order to specifically provide one or more zones with increased conductivity. In a further preferred embodiment, the method is characterized in that at least one zone has a region that has increased conductivity compared to the substrate.

[0068] Preferably, the region with increased conductivity is formed by filling a previously removed substrate region with a conductive material, preferably metal. It may be preferable for a substrate region to be first removed and then filled with a conductive material, preferably a metal. The region therefore preferably has, in particular, increased conductivity compared to the surrounding substrate (material). The removal of the substrate region is preferably carried out using a preferred etching process. The filling with a conductive material can preferably be carried out using a coating process.

[0069] Preferably, the conductive material which is filled into the removed substrate region is selected from a group comprising copper, aluminum, iron, zinc, tin, tungsten, gold, their compounds and / or alloys.

[0070] The materials mentioned have proven to be good and reliable electrical conductor materials in the state of the art and are characterized by low specific resistance.

[0071] In further embodiments, an area within a zone with a higher conductivity than other areas of the zone can also be achieved by appropriate doping.

[0072] In a further preferred embodiment, the method is characterized in that the zones have a horizontal distance from one another of 1 - 30 pm, preferably of 1 - 20 pm, particularly preferably of 2 - 10 pm and / or the zones have a vertical height of 10 - 400 pm, preferably of 10 - 100 pm, particularly preferably of 20 - 50 pm.

[0073] The horizontal distance preferably refers to the distance between two opposite sides of adjacent zones. The horizontal distance preferably corresponds to a horizontal cross-sectional dimension of the empty area, i.e., preferably the dimension of the empty area perpendicular to the connecting surface of adjacent zones.

[0074] The aforementioned preferred horizontal spacings are advantageous from a process engineering perspective in that they allow the empty space to be at least partially filled with an insulating material particularly easily using the reliable coating methods known in the prior art. In particular, conformal deposition of the insulating material is advantageously possible, thus achieving mechanical stability between the zones while simultaneously maintaining electrical insulation between the zones. Furthermore, it is advantageous that the aforementioned preferred horizontal spacings ensure a particularly hermetic seal of the empty space.

[0075] Furthermore, the formation of parasitic capacitances can be stopped, preferably reduced, by the aforementioned preferred horizontal distances. As explained in more detail below, the formation of parasitic capacitances decreases with increasing horizontal distance. The vertical height of the zones preferably corresponds to the dimensioning of a zone from a rear side to the front side. Preferably, the vertical height of the zones which function as via-connection regions essentially corresponds to the height of the substrate which is provided at the beginning of the method. The vertical height of the zones particularly predetermines a path for the current or for a signal which is transmitted via the zone and thus via the via-connection region. The aforementioned preferred vertical heights are advantageous in that corresponding via-connection regions can be used for a wide variety of applications.

[0076] In a further preferred embodiment, the method is characterized in that the empty area is widened at least in sections along a horizontal direction, preferably by etching adjacent zones in a horizontal cross section.

[0077] In particular, it may be preferred for the empty region to be designed in such a way that it has a greater widening along a vertical height in one section than further sections of the empty region. The greater widening preferably extends along the directions that run towards the surfaces of the via region that are located opposite one another. The widening of the empty region can thus be aligned substantially perpendicularly along the vertical height. The widening of the empty region can preferably be present centrally along the vertical height. Narrower sections of the empty region, ie sections that are tapered compared to a preferred widening, can preferably form sections of the empty region that are directed towards the front and / or back of the substrate.In particular, along the vertical height, there may preferably be two tapered sections and one widened section, with the widened section being located between the two tapered sections. Viewed from a front side, the empty area preferably comprises a tapered section, a widened section, and a tapered section.

[0078] Preferably, a preferred widened section of the void area refers to a section created by etching adjacent zones along a horizontal direction. A preferred tapered section refers to a section that is not affected or only insignificantly affected by the etching of the adjacent zones. The widened section preferably comprises larger lateral dimensions than the tapered section, i.e., preferably larger dimensions in the horizontal direction.

[0079] It is preferred that the empty area in the region of the widened section is additionally widened laterally by at least 2 pm, preferably by at least 5 pm or even by at least 10 pm compared to the width of a tapered section, wherein it is preferred that the lateral widening is less than 20 pm, preferably less than 10 pm.

[0080] Furthermore, it is preferred that the tapered section has a depth or height of less than 5 pm and a width of less than 2 pm, and / or that the widened section has a width of at least 10 pm, preferably at least 20 pm. In preferred embodiments, the tapered section is characterized by a depth of at least 0.5 pm, preferably at least 1 pm, and a width of at least 0.1 pm, preferably at least 0.5 pm.

[0081] In other words, etching of adjacent zones in a horizontal cross-section results in a lateral widening of at least a portion (the widened portion) of the empty area.

[0082] The widening to a preferably widened section of the void area along the vertical height can preferably be carried out using an etching process. The etching process can be carried out, for example, by reactive ion etching and / or reactive ion deep etching (Bosch process).

[0083] The lateral widening increases, in particular, the width of the empty space. As a result, the horizontal distance between the zones is also increased at this vertical height. This advantageously reduces any parasitic capacitance that may arise between zones and impair signal transmission. At the same time, the tapered sections towards a front or back of the substrate, i.e. those sections of the empty space that have not been widened, can advantageously achieve a particularly stable mechanical connection and / or hermetic sealing. In particular, it is advantageously possible to reduce any parasitic capacitance that may arise in regions in which a preferentially widened section of the empty space is present along the vertical height.

[0084] As a first approximation, the parasitic capacitances that can arise can be described by a plate capacitor comprising two plates, wherein the two plates preferably correspond to the zones or via regions. The average person skilled in the art knows that the capacitance of a plate capacitor is inversely proportional to the distance between the two plates. Accordingly, increasing the distance reduces the capacitance. By horizontally widening the empty space between adjacent zones, the distance is increased and parasitic capacitances are reduced.

[0085] In a further preferred embodiment, the method is characterized in that the insulating material comprises a material selected from a group comprising silicon nitride, tetraethylorthosilicate, silicon oxynitride and / or silicon dioxide.

[0086] These materials are suitable for enabling high electrical insulation between the zones. Furthermore, their use can create a robust mechanical connection between the zones. Especially with horizontal distances, which are at least partially between adjacent zones, less than 5 μm, preferably less than 2 μm, the aforementioned materials achieve an extremely stable connection, ensuring a long product lifespan.

[0087] The preferred materials mentioned are also particularly easy and cost-effective to process and can be precisely introduced into the empty space using standardized coating technologies. The at least partial filling of the empty space preferably occurs using coating methods known in the art. For example, the coating can be carried out by a coating process within a coating system that is preferably designed to carry out a coating process selected from a group comprising physical vapor deposition, chemical vapor deposition, atomic layer deposition, doctor blade coating, powder coating, and / or injection molding.

[0088] In a further preferred embodiment, the method is characterized in that the insulating material comprises a low-k dielectric, which is preferably selected from a group comprising porous organic materials, porous carbon-doped silicon oxide, silica gel, silicatic aerogels, mesoporous organosilicates, porous hydrogen silsesquioxane, mesoporous silicate glasses, phosphor particles and / or aluminum oxide particles.

[0089] In semiconductor technology, a low-k dielectric is a material that has a substantially lower relative permittivity than silicon dioxide (SiO2), i.e. E r < 3.9.

[0090] The use of low-k dielectrics has proven particularly advantageous, as it significantly reduces parasitic capacitances.

[0091] When considering parasitic capacitances, the relative permittivity is a relevant parameter. The equation for a parallel plate capacitor

[0092] C = He Et) A| <ond / d , durch die in einer ersten Näherung die Entstehung von parasitären Kapazitäten modelliert werden kann, macht deutlich, dass die Verringerung des Abstandes d die Kapazität C erhöht. Um dies auszugleichen, kann die „Plattenfläche“ AKond, oder die relative Permittivität E r be reduced.

[0093] One way to reduce or minimize the relative permittivity is to lower the polarizability by using materials with low-polarity bonds. Common examples of such bonds are carbon-carbon (C-C), carbon-hydrogen (C-H), silicon-fluorine (Si-F), and / or silicon-carbon (Si-C) bonds. The materials mentioned above, among others, exhibit these bonds, so reducing the relative permittivity is advantageous to keep the value of parasitic capacitances as low as possible.

[0094] Another way to reduce the relative permittivity and thus the parasitic capacitances is to reduce the material density, or in particular the dipole density, by creating free volume. This can preferably be achieved by only partially filling the empty space with the insulating material. This can be achieved, for example, by lining the empty space with an insulating material, preferably a low-k dielectric. Complete filling of the empty space is not necessary, but can also be achieved in preferred embodiments.

[0095] Another way to create free volume to reduce the dipole density is to use porous dielectrics, especially porous low-k dielectrics, to fill the empty space. Partial filling can also involve almost complete filling with porous low-k dielectrics, whereby a free volume (not completely filled with a material) remains due to the presence of pores.

[0096] The component manufactured using this process is particularly well suited for the operation of devices with low impedance, where higher parasitic capacitances (parasitic couplings) may also be unproblematic.

[0097] A capacitive coupling or a capacitance as parasitic capacitance that would develop in this case can be calculated in a first approximation according to the above calculation example with a substrate in which silicon dioxide is used as the insulating material, as follows:

[0098] C = Eo * Er *Ai <ond / d = 8.85*10- 12 A*s / (V*m) * 3.9 * 500 pm * 400 pm / 2 pm

[0099] = 8.85*1 O' 12 A*s / (V*m) * 3.9 * 0.0005 m * 0.0004 / (2*10' 6 m) = 3.45 * 10' 12 F = 3.45 pF, where Eo = 8.85*10' 12 A*s / (V*m) is the electric field constant, E r = 3.9 is the relative permittivity of silicon dioxide and AKond = 500 pm * 400 pm is the area of ​​the via region 2 pm is the distance between two via regions, which can be modeled as capacitor areas to form a parasitic capacitance.

[0100] In a further preferred embodiment, the method is characterized in that the substrate is separated into 2, 3, 4, 5, 6, 7, 8, 9, 10 or more zones.

[0101] The advantage here is that a large number of zones can be formed from a single substrate. This opens up a wide range of applications, where multiple zones can be used for vias to ensure optimal power and thus signal transmission. In particular, a large number of electrical contacting options are offered, which is advantageous for the electrical integration of the component. For example, it is possible to mount a Wheatstone bridge circuit on four zones, with each zone serving as a via providing an electrical connection to a branch of the Wheatstone bridge circuit.

[0102] In a further preferred embodiment, the method is characterized in that the separation of the substrate is carried out by an etching process, wherein the etching process is preferably selected from a wet-chemical etching process and / or dry etching process, preferably by physical and / or chemical dry etching processes, particularly preferably by reactive ion etching and / or reactive ion deep etching (DRIE, Bosch process).

[0103] An etching process preferably refers to the removal of material from a surface. The term etching process can also be used synonymously. The removal can take the form of depressions, which, in the context of the invention, leave behind the empty space on the substrate.

[0104] In semiconductor technology and / or microsystems technology, dry etching refers to a group of abrasive microstructuring processes that are not based on wet chemical reactions (such as wet chemical etching or chemical-mechanical polishing). Material removal occurs either through accelerated particles or with the aid of plasma-activated gases. Depending on the process, both chemical and physical effects are utilized. In wet chemical etching, an etch-resistant mask is transferred to the substrate through a chemical removal process.

[0105] The aforementioned etching processes are known to those skilled in the art. Depending on the desired configuration of the empty region in the substrate, advantageous methods can be selected to ensure efficient implementation of the empty region on the substrate and thus the formation of the zones.

[0106] In a further preferred embodiment, the method is characterized in that the at least partial filling of the empty area with the insulating material is carried out by a coating method which is preferably selected from a group comprising physical vapor deposition, chemical vapor deposition, atomic layer deposition, doctor blade coating, powder coating and / or injection molding.

[0107] The aforementioned preferred methods are advantageous in that their use allows for rapid and reliable achievement of sufficient electrical insulation between individual zones. Furthermore, the aforementioned preferred methods are suitable for both partially filling the empty space and completely filling the empty space for electrical insulation.

[0108] In a further preferred embodiment, the method is characterized in that dicing is carried out on the two or more zones, wherein the dicing preferably comprises one or more steps selected from a group comprising mechanical sawing, laser cutting and / or breaking.

[0109] Dicing refers to a process step in which a subsection of the zones is separated. Dicing for separating a subsection of a zone can extend along a vertical direction in order to separate an area and adjust the horizontal cross-sectional area of ​​the zone. Dicing can also be carried out in a horizontal direction, for example, to adjust the height of the zones. Dicing can therefore advantageously be used to cut or dimension the zone(s) with a view to further applications. For example, installation in further applications and / or systems (e.g. sensor systems) can be facilitated by making the zones more compact and / or by simplifying the mechanical integration of the component.

[0110] The preferred process steps mentioned, comprising mechanical sawing, laser cutting and / or breaking, are known to the person skilled in the art and enable the cost-effective separation of a subsection of a zone.

[0111] In a further preferred embodiment, the method is characterized in that the connection contact is selected from a group comprising a connection pad, conductor tracks, bond wires, solder connections, an electrically conductive adhesive, and / or bumps. A connection pad preferably comprises an electrically conductive material, which is applied to a spatially restricted section of the sensor chip to enable electrical contact. In this case, an insulating material can preferably be applied first, which delimits a section to be contacted in such a way that a free area remains. The free area can then be filled with the electrically conductive material.

[0112] Conductor tracks (also called conductive paths or conductive lines) preferably refer to electrically conductive connections with a two-dimensional layout, i.e., along a plane, which can also be referred to as a conductor track or metallization plane. The connection between individual conductor tracks can preferably be provided by vias. To prevent short circuits or high leakage currents, high electrical insulation between conductor tracks is preferred.

[0113] Conductor tracks preferably have a greater length (along the current flow direction) than width (or diameter or cross-sectional dimension), for example by a factor of 2, 5, 10 or more, and can therefore also be referred to as track- or strip-shaped.

[0114] Bond wires refer to an electrical connection option that is particularly used when components have previously been bonded. Bond wires are characterized by their particularly thin nature. This enables easy contacting of component connection pins. A bond wire can preferably have a diameter of approximately 15-500 μm, preferably 15-100 μm, particularly preferably 15-50 μm or 100-500 μm. A bond wire can comprise a material selected from a group comprising gold, aluminum, copper, their compounds, and / or alloys.

[0115] A solder connection preferably refers to an electrical connection using a solderable material. The solderable material preferably refers to a material that melts after a certain temperature is applied, so that the melting process causes the material to spread and thus allows a specific area to be covered and / or filled with the material. A preferred solder material can be selected from a group comprising silver, copper, tin, zinc, and their compounds and / or alloys.

[0116] An electrically conductive adhesive is preferably characterized in that solidification and thus a solid electrical connection can be provided without the application of pressure and / or heat. Instead, solidification of the electrically conductive adhesive occurs after a specific time interval. An electrically conductive adhesive preferably comprises an adhesive and an electrically conductive filler. The adhesive can preferably be selected from a group comprising epoxy (resin), silicone, acrylic, and / or bismaleimide. The electrically conductive filler can preferably be selected from a group comprising gold, nickel, palladium, platinum, and / or silver.

[0117] A bump preferably refers to a substantially hump-shaped connecting element. The connecting element is particularly characterized by its hump-shaped configuration. This can be provided by an electrically conductive material, in particular also by an electrically conductive adhesive and / or a solder material. Preferably, a plurality of bumps are used. Bumps can preferably be applied to an underside of the sensor chip, for example, to enable electrical contact with at least one section of a base plate. Bumps can preferably be applied using thin-film technology, electroplating, or stencil printing.

[0118] The above-mentioned preferred options for forming the connection have proven advantageous in that they are reliable and robust and can be provided easily by a person skilled in the art using known means of the prior art.

[0119] In a further preferred embodiment, the method is characterized in that the zones are connected to a circuit carrier, preferably a printed circuit board.

[0120] A circuit carrier preferably refers to a component comprising an electrically insulating material on which electrically conductive connections (conductor tracks) and / or electronic components or assemblies are present. A circuit carrier therefore preferably refers to a carrier for electronic components or electrically conductive connections, which serves both for mechanical fastening and for electrical connection. Since electronic components are preferably present on or in the circuit carrier, electrical connections are particularly present on or in the circuit carrier, which are mediated, for example, by wire bonds, conductor tracks and / or conductor track strips. The circuit carrier therefore functions both as a mechanical carrier and for an electrical connection for implementing electrical functions. The electrical connections of the circuit carrier serve, in particular, for the electrical contacting of components.The insulating material of the circuit carrier preferably defines a basic shape of the circuit carrier, in particular to provide mechanical contact with the sensor chip. The circuit carrier can preferably have a substantially flat or planar profile. It may also be preferred for the circuit carrier to have a curved configuration.

[0121] A printed circuit board is preferably used as the circuit carrier. A printed circuit board preferably refers to the flat type of circuit carrier known in the art, which includes electrical connections and provides mechanical support for surface-mounted and / or socketed components. A printed circuit board preferably comprises fiberglass, an epoxy, and / or another composite material as the insulating material. A printed circuit board is characterized by its high stability, which is advantageous for a wide variety of applications of the component.

[0122] It may happen that gaps arise when connecting the zones to the circuit board. It is preferred that the gaps be filled with a filler material. This can advantageously ensure a more stable connection to the circuit board and reduce or eliminate the risk of foreign material entering the gaps and leading to a performance degradation of the component. The filler material is preferably selected from a group comprising an epoxy resin, polyester resin, phenolic resin, and / or aminoplasts. The aforementioned preferred materials for the filler material have proven advantageous for a strong connection and for hermetic encapsulation of the gaps.

[0123] In a further aspect, the invention relates to a component preferably producible by a method according to the above-described, comprising a via region which extends along a vertical direction from a rear side to a front side of the component, characterized in that the component has a substrate comprising an electrically conductive material, wherein the substrate is divided into two or more galvanically separated zones and wherein an electrical connection contact is present on the front side and the rear side on at least one zone of the two or more zones, so that the at least one zone functions as a via region.

[0124] The average person skilled in the art recognizes that technical features, definitions and advantages which have been described for the method according to the invention and its preferred embodiments for producing a component equally apply to the component which can be produced by the method, and vice versa.

[0125] The component utilizes the conductivity of the substrate itself, in which the vias are formed. The substrate is divided into galvanically separated zones, which serve as a power or signal line along a vertical direction and can thus function as a via. The galvanically separated zones are directly and clearly identifiable on the component. A person of ordinary skill in the art can recognize that they were created by severing the substrate.

[0126] Another advantage is that by separating the substrate into galvanically separated zones, through-hole plating areas can be achieved while simultaneously achieving a very flat or level geometry of the component's surface. Thus, the flat surface of a substrate is advantageously not compromised by its separation into galvanically separated zones.

[0127] Furthermore, it is not necessary to have additional structures or components applied to the substrate for electrical connection. Instead, the zones can be contacted directly without unnecessarily disrupting the flat surface of the substrate.

[0128] The planar design of the component can lead to a number of advantages, particularly from an application perspective. Firstly, it facilitates the integration of the component into more complex structures. If the component is a sensor, the planar surface can also ensure reduced disturbance to the environment, which is advantageous for flow sensors or aeroacoustic sensors, for example.

[0129] Depending on the desired application, the through-hole contact areas of the component allow the desired adjustment or setting of the resistance and / or inductance.

[0130] A particular advantage is that a particularly low electrical resistance can be achieved for the via region. In particular, the resistance is proportional to the vertical height and inversely proportional to the horizontal cross-section of the via region. The horizontal cross-section of the via region is determined in particular by the (cross-sectional) area of ​​the respective zones. Thus, compared to the introduction of relatively small, limited vias in the prior art (e.g., by filling vertical holes or trenches with a conductive material), an extremely low electrical resistance can be provided by the zones of the substrate that function as via regions.The reduced electrical resistance reduces ohmic losses and increases the performance of the component, so that the component can achieve particularly fast and interference-free signal transmission via the through-hole contact areas.

[0131] A further advantage of the method according to the invention is that by separating the substrate into galvanically separated zones, through-hole plating areas can be created, enabling signal conduction with low inductance. Thus, the inductance also preferably decreases with an increase in the cross-section, so that only reduced interference occurs when conducting variable currents or signals.

[0132] The separation of the substrate into galvanically separated zones can be determined on the component itself. By dividing the substrate, the number of galvanically separated zones and thus the number of vias on the component can be adjusted accordingly.

[0133] In preferred embodiments, the adjacent zones comprise corrugations that are shaped to match one another in a horizontal cross-section. In further preferred embodiments, the corrugations that are shaped to match one another comprise tongues and corresponding grooves, which establish a positive connection perpendicular to a connecting surface of the adjacent zones.

[0134] The preferred, mutually conforming corrugations, as well as the tongues and grooves encompassed by them, can be identified on the component. These can preferably be identified on a front and / or back of the component, since an interlocking structure of the adjacent zones can also be identified from a front and / or back of the component. Thus, a structure can be identified on a surface of the component, similar to a puzzle.

[0135] In a further preferred embodiment, the component is characterized in that the component has an electronic circuit and / or a MEMS component that is electrically connected to the via region.

[0136] Preferred electronic circuits include, without limitation, an integrated circuit (IC), an application-specific integrated circuit (ASIC), a programmable logic device (PLD), a field-programmable gate array (FPGA), a microprocessor, a microcomputer, a programmable logic controller, and / or another electronic, preferably programmable, circuit.

[0137] The electronic circuit can preferably be configured to receive and / or emit an electrical current or a signal that is conducted through the via region. The electronic circuit can thus be present as evaluation, readout, and / or control electronics. If an evaluation is performed, the electronic circuit can also be referred to as a computing unit.

[0138] The term "computing unit" preferably refers to any device or unit that can be configured to perform computing operations. The computing unit is preferably, for example, a processor, a processor chip, a microprocessor, and / or a microcontroller. The computing unit may also preferably be a programmable circuit board. The computing unit may also preferably comprise a computer-usable or computer-readable medium, such as a hard disk, random access memory (RAM), read-only memory (ROM), flash memory, etc.

[0139] Method steps for reading, controlling, and / or evaluating the signal to be transmitted through the via region are preferably performed by the electronic circuit or processing unit. The phrase "configured to do so" preferably means that computer code and / or software is installed on the electronic circuit or processing unit to perform one or more method steps for corresponding reading, controlling, and / or evaluating. The method steps can, for example, relate to controlling or evaluating measurement signals from a MEMS sensor, as explained in more detail here.

[0140] For the purposes of the invention, a MEMS component preferably refers to a component or part based on MEMS technology. MEMS stands for microelectromechanical system (abbreviated to "micromechanical system" in the text), i.e. a microsystem whereby a compact design (in the micrometer range) with simultaneous excellent functionality and ever-lower manufacturing costs is achieved. A MEMS component can, for example, be a MEMS sensor or a MEMS actuator. Many MEMS components are known in the prior art. Advantageously, the component according to the invention can be used to operate a wide variety of MEMS components by connecting it to the via region. A MEMS component preferably comprises a miniaturized device, an assembly and / or a component whose components have smallest dimensions in the pm range and interact as a system.

[0141] In a further preferred embodiment, the MEMS component is a MEMS sensor, wherein the MEMS sensor is preferably selected from a group comprising an acceleration sensor, a gyroscope, a pressure sensor and / or a flow sensor.

[0142] An acceleration sensor typically measures the displacement of a test mass using a position-measuring circuit. For further digital processing, the measured signal is converted into digital information, for example, using an A / D converter. Since the acceleration of the test mass is directly proportional to the force acting on the body, the acceleration can be measured indirectly via a force acting on one of the axes of the acceleration sensor. Acceleration sensors preferably comprise bores, cavities, springs, and channels manufactured using micromachining techniques known in the art. The acceleration forces can be measured based on the displacement of the test mass relative to fixed electrodes, whereby capacitance changes can preferably be recorded.

[0143] Gyroscopes (also called gyros for short) are components that measure or maintain rotational motion. They are compact, low-cost sensors that measure angular velocity. The units of angular velocity are measured in degrees per second (° / s) or revolutions per second (rps). Gyroscopes can be used to determine orientation and are found in most autonomous navigation systems. During rotation, a small proof mass is displaced as the angular velocity changes. This movement is converted into very weak electrical signals that can be amplified and read by a microcontroller, for example. The operating principle of many well-known gyroscopes is, analogous to accelerometers, preferably capacitive in nature.

[0144] Pressure sensors, for example, comprise capacitors mounted on a wafer or a microchip, which can be formed, for example, via the sensor structure. When pressure is applied, the spacing between the sensor structures and thus the capacitances change. This operating principle is also capacitive. However, pressure sensors can also be based on other physical principles. These include inductive pressure sensors, piezoresistive pressure sensors, or pressure sensors based on the Hall effect.

[0145] Flow sensors are used to measure the flow of fluids. Flow sensors can be based on thermal and non-thermal principles. The most common non-thermal flow sensors in the state of the art are so-called drag force sensors, pressure drop sensors, and Coriolis sensors. The thermal principle is based on the convective heat transfer from an electrically heated resistor to the flowing fluid, which leads to the cooling of the heater depending on the flow rate and can thus be measured electrically. Since the convective heat transfer is directly proportional to the mass flow, these sensors are mass flow sensors.

[0146] In a further preferred embodiment, the component is characterized in that the component has a membrane which extends over a cavity of the substrate and on the membrane there is an electronic circuit and / or a MEMS component.

[0147] For the purposes of the invention, a cavity preferably refers to a recess in the substrate. Advantageously, the presence of one or more cavities in the substrate can provide a suitable hollow space over which the MEMS component and / or the electronic circuit can be positioned.

[0148] The membrane denotes a preferred component of the component, which has a flat design and is preferably applied to the front side of the monolithic substrate and at least partially covers the flow channel. The flat design of the membrane preferably means that dimensions such as a length and / or width are many times greater than an orthogonal height or thickness of the membrane. Thus, the length and / or width can be greater than the thickness by a factor of 1.5, 2.5, 10, 100, 1,000, 10,000, or more. The thickness of the membrane is preferably between approximately 0.1 and 20 μm, more preferably between approximately 0.2 and 10 μm.

[0149] Terms such as substantially, approximately, about, approx., etc., preferably describe a tolerance range of less than ± 40%, preferably less than ± 20%, particularly preferably less than ± 10%, even more preferably less than ± 5%, and especially less than ± 1%, and always include the exact value. Partially, preferably, describes at least 5%, particularly preferably at least 10%, and especially at least 20%, in some cases at least 40%.

[0150] The membrane advantageously enables coverage above or over a cavity. The attachment or use of a cavity is advantageous in a variety of applications. For example, a flow sensor can be provided which is characterized by a particularly flat design due to a flat topology. In this case, a flow through the cavity can be used to take a measurement. The substrate can act as a support structure. The vias, which have resulted from the division of the substrate into galvanically separated zones, advantageously enable a simple electrical connection to the flow sensor, which can preferably be attached to the membrane. The advantageous electrical connection is also advantageously achieved with any electronic circuit on the substrate.Advantageously, it is not necessary to incorporate complex circuitry and / or vias into the substrate, as the vias themselves provide a contacting option. The flat design of the substrate also enables easy integration into a circuit board without requiring significant effort (see Fig. 4F). For a particularly robust connection, it may be preferable to use a filler material to connect the component to a circuit board. This advantageously achieves greater stability and long-lasting vibration resistance.

[0151] Figures

[0152] The aspects of the invention will be described below by way of example with reference to figures, without being limited to these descriptions and / or figures.

[0153] Short description of the characters

[0154] Fig. 1 AB Schematic representation of a preferred embodiment of the component according to the invention, in which a substrate was divided into galvanically separated zones.

[0155] Fig. 2A-B Schematic representation of a further preferred embodiment of the component according to the invention, wherein the galvanically separated zones serve as vias for a Wheaton bridge.

[0156] Fig. 3A-F Schematic representation of preferred method steps for producing a preferred embodiment of the component, wherein the galvanically separated zones serve as vias for a Wheaton bridge. Fig. 4A-F Schematic representation of further preferred method steps for producing a preferred embodiment of the component in which an electronic circuit and / or a MEMS component are positioned on a membrane.

[0157] Detailed description of the characters

[0158] Fig. 1 schematically shows a preferred embodiment of a component 1 according to the invention, in which a substrate has been divided into galvanically separated zones. Fig. 1A shows a plan view of the component 1 starting from a front side V. Fig. 1B shows a three-dimensional representation of the component 1. The component comprises a plurality of via regions 11 which extend along a vertical direction from a rear side R to a front side V of the component 1. The component 1 comprises a substrate comprising an electrically conductive material or semiconducting material. The substrate is divided into a plurality of, here: four, galvanically separated zones 7.

[0159] The component 1 utilizes the conductivity of the substrate 5 itself, in which the via-connection regions 11 are formed. The substrate 5 is divided into galvanically separated zones 7, which serve to conduct current or signal along a vertical direction and can thus function as a via-connection region 11. The galvanically separated zones 7 can be directly and clearly identified on the component 1. A person of ordinary skill in the art will recognize that they were created by a continuous separation of the substrate 5.

[0160] Furthermore, it is advantageous that by separating the substrate 5 into galvanically separated zones 7, through-plating areas 11 are obtained, which simultaneously achieve a very flat or planar geometry of the surface of the component 1. Thus, the planar surface of a substrate 5 is advantageously not impaired by its separation into galvanically separated zones 7.

[0161] Furthermore, it is not necessary to apply additional structures or components for electrical connection to the substrate. Instead, the zones can be contacted directly without unnecessarily disrupting the flat surface of the substrate 5.

[0162] The planar design of component 1 can lead to a number of advantages, particularly in terms of applications. Firstly, it facilitates the integration of the component into more complex structures. If component 1 is a sensor, the planar surface can also ensure reduced disturbance to the environment, which is advantageous for flow sensors or aeroacoustic sensors, for example.

[0163] Depending on the desired application, the through-hole contact areas 11 of the component 1 allow a desired setting or determination of the resistance and / or inductance.

[0164] It is particularly advantageous that a particularly low electrical resistance can be achieved for the via region 11. In particular, the resistance is proportional to the vertical height and inversely proportional to the horizontal cross-section of the via region 11. The horizontal cross-section of the via region 11 is determined in particular by the (cross-sectional) area of ​​the respective zones 7. Thus, in comparison to the introduction of relatively small, limited vias 11 in the prior art (e.g., by filling vertical holes or trenches with a conductive material), an extremely low electrical resistance can be provided by the zones 7 of the substrate 5, which function as via regions 11.Due to the reduced electrical resistance, ohmic losses are reduced and the performance of the component 1 is increased, so that the component 1 can achieve particularly fast and interference-free signal transmission via the through-plating areas 11.

[0165] A further advantage is that by separating the substrate 5 into galvanically separated zones 7, through-plating regions 11 can be provided, which enable a signal line with low inductance. The inductance preferably also decreases with an increase in the cross-section of the through-plating region 11.

[0166] The separation of the substrate 5 into galvanically separated zones 7 can be determined on the component 1 itself. By dividing the substrate 5, the number of galvanically separated zones 7 and thus also the number of through-plating areas 11 on the component 1 can be adjusted accordingly.

[0167] Adjacent zones 7 of the component 1 comprise mutually shaped corrugations 17 in a horizontal cross-section. The mutually shaped corrugations 17 comprise tongues and corresponding grooves, which establish a positive connection perpendicular to a connecting surface of the adjacent zones 7.

[0168] A corrugation 17 preferably denotes an unevenness (e.g., protrusion or indentation) of a surface of a zone 7 facing an adjacent zone 7, wherein the unevenness is present relative to a basic surface profile of the surface. Thus, the corrugation 17 can preferably represent a protrusion that is present along a substantially planar surface of the zone. Preferably, in particular, due to a non-rectilinear separation of the substrate, several corrugations 17 are present on facing surfaces of the zones. A corrugation 17 can preferably also be a notch along a substantially planar surface of the zone 7.

[0169] The corrugations 17 are, in particular, shape-matched. This preferably means that the geometry of the facing surfaces of the corrugations 17 is such that the corrugations 17 of mutually facing surfaces of the zones 7 interlock. In particular, shape-matched corrugations 17 can refer to mutually congruent corrugations 7. The interlocking of the corrugations 17 results from the shape of the corrugations 17, which establishes a positive connection perpendicular to a connecting surface of the adjacent zones 7.

[0170] In a preferred embodiment, the mutually shaped corrugations 17 comprise tongues and corresponding grooves, which establish a positive connection perpendicular to a connecting surface of the adjacent zones 7. Thus, the corrugations 17 of the adjacent zones 7 provide a tongue-and-groove connection. A tongue-and-groove connection preferably refers to a plug-in connection in which a tongue is inserted into a groove to create a mechanical connection between the adjacent zones 7. A tongue-and-groove connection can be present immediately after a (non-linear) separation of the substrate 5 into different zones. Advantageously, the tongue-and-groove connection blocks a possible direction of movement that is substantially perpendicular to a connecting surface of the zones 7.In the context of the invention, the connecting surface preferably refers to the area spanned between the mutually facing surfaces of adjacent zones 7 and preferably corresponds to a projection of the empty space along its horizontal cross-section. The connecting surface therefore preferably has the length of the dividing line and a height corresponding to the height of the substrate (vertical extension from the rear side R to the front side V).

[0171] The empty regions 9 resulting from the separation of the substrate 5 into zones are filled by at least partially filling an empty region 9 with an insulating material 13. By at least partially filling the insulating material 13, in particular, a mechanical hold is achieved between the zones 7, while at the same time galvanic separation is still ensured. While the zones 7 are galvanically separated from one another after the immediate, continuous separation (for example, by an empty region 9 filled with (ambient) air), the integrity of the multi-part substrate 5, comprising separate zones 7, might no longer be ensured under certain circumstances. The zones 7 are therefore also mechanically connected to one another, in particular by the insulating material 13, but remain electrically insulated from one another. The insulating material 13 preferably refers to an electrically insulating material.

[0172] Fig. 2 schematically shows a preferred embodiment of a component 1 according to the invention, wherein the galvanically separated zones serve as vias for a Wheaton bridge. Fig. 2A shows a plan view of the component 1, starting from a front side V. Fig. 2B shows a three-dimensional representation of the component 1.

[0173] The component 1 comprises a plurality of via regions 11 extending along a vertical direction from a rear side R to a front side V of the component 1. The substrate of the component 1 comprises an electrically conductive material or semiconducting material. The substrate is divided into two or more galvanically separated zones 7. An electrical connection contact can be present on the front side V and the rear side R of the zones 7, so that the zones 7 function as via regions 11.

[0174] The advantage here is that a large number of zones 7 can be formed from a single substrate s. This offers a wide range of applications in which multiple zones can be used for vias 11 to ensure optimal current and thus signal transmission. In particular, a large number of electrical contacting options are offered, which is particularly advantageous for the electrical integration of the component 1. For example, it is advantageously possible, as shown in Fig. 2, for a Wheatstone bridge circuit to be applied to four zones 7, with each zone 7 serving as a via 11 to provide an electrical connection to a branch of the Wheatstone bridge circuit. The component 1 has a membrane 19 which extends over a cavity of the substrate 5, and the Wheatstone bridge circuit is present as an electronic circuit on the membrane 19.3A-F show preferred method steps for producing a preferred embodiment of a component 1 (preferably the embodiment according to Fig. 2), wherein the galvanically separated zones serve as vias for a Wheaton bridge.

[0175] Fig. 3A shows a substrate 5 comprising an electrically conductive or semiconducting material. A membrane 19 is applied to the substrate 5. An electronic circuit 21 is present on the membrane 19. In Fig. 3B, a connection pad 23 is applied. In Fig. 3C, the substrate 5 is divided into galvanically separated zones 7. The division of the substrate 5 into the zones 7 is achieved by a continuous separation of the substrate 5 along the vertical direction. This creates an empty area 9 between the zones 7. The separation of the substrate 5 is carried out by an etching process. In Fig. 3D, the empty area 9 is filled with an insulating material 13. The insulating material provides electrical insulation between the zones 7. Furthermore, the influence of any resulting parasitic capacitances can advantageously be reduced by the selection of the insulating material 13. In Fig.3E, an additional connection pad 23 is applied to the back of zones 7, so that zones 7 function as through-hole contact areas 11. Dicing of the substrate 5 is shown in Fig. 3F. Dicing separates a portion of zones 7. This advantageously allows for optimizing the dimensioning of zone 7. This can also have a beneficial effect on the installation in other applications and / or systems (e.g., sensor systems), for example, by achieving greater compactness, which simplifies the mechanical integration of the component.

[0176] A particular advantage is that the method ensures efficient process control. In particular, the method according to the invention eliminates the process step known from the prior art of filling a remote region of a substrate 5 with a conductive material to provide the via region. Instead, the method utilizes the conductivity of the substrate 5. Zones 7 are provided from the substrate 5 itself, which function as via regions 11, so that current can flow across them in a vertical direction. This advantageously enables rapid production of the component, since a step for filling an electrical material is not carried out. Consequently, the method is also suitable for mass applications and also saves costs, thus achieving considerable economic efficiency.

[0177] Fig. 4A-F schematically shows further preferred method steps for producing a preferred embodiment of a component 1 according to the invention, in which an electronic circuit and / or a MEMS component is positioned on a membrane.

[0178] Fig. 4A shows that a substrate 5 comprising an electrically conductive or semiconducting material is provided. A membrane 19 is applied to the substrate 5. An electronic circuit 21 is present on the membrane 19. In Fig. 4B, a cavity 20 is formed on the component 1, over which the membrane 19 extends. Furthermore, Fig. 3B shows that the substrate 5 is divided into zones 7 by the formation of an empty area 9. Fig. 4C shows that the empty area 9 is filled with the insulating material 13. Fig. 3E shows dicing of the substrate so that the dimensioning of the component can be optimized. In Fig. 3F, the zones 7 are connected to a printed circuit board 29. The electrical connection is made via the connection pad 23, a solder connection 25 and a via 27. Furthermore, intermediate regions of the printed circuit board 29 are filled with a filling material 31.This advantageously ensures a more stable connection to the circuit board 29. Furthermore, it is advantageous that the risk of foreign material entering the intermediate areas, which could lead to performance degradation of the component, is reduced or eliminated.

[0179] The membrane 19 advantageously enables a covering above or over a cavity 20. The attachment or use of a cavity 20 is advantageous for a variety of applications. For example, a flow sensor can be provided which is characterized by a particularly planar design due to a flat topology. A flow through the cavity 20 can be used to perform a measurement. The substrate 5 can function as a support structure. The via regions 11, which have resulted from the division of the substrate 5 into galvanically separated zones 7, advantageously enable a simple electrical connection to the flow sensor, which can be attached to the membrane 19. This advantageous electrical connection is also possible with any electronic circuit on the substrate 5.Advantageously, it is not necessary to incorporate complex circuits and / or vias into the substrate 5, since the vias themselves provide a contacting option. The flat design of the substrate 5 further enables easy integration into a printed circuit board 29 without requiring significant effort (see Fig. 4F). For a particularly robust connection, it may be preferable to use a filler material 31 for connecting the component 1 to a printed circuit board 29. This advantageously achieves greater stability and long-lasting vibration resistance.

[0180] List of reference symbols

[0181] 1 component

[0182] 5 Substrat

[0183] 7 Zone

[0184] 9 Empty space

[0185] 11 Via area

[0186] 13 Insulating material

[0187] 15 Connection contact

[0188] 17 Corrugation

[0189] 19 Membran

[0190] 20 cavities

[0191] 21 Electronic circuit

[0192] 23 Connection pad

[0193] 25 solder connection

[0194] 27 Transit

[0195] 29 circuit board

[0196] 31 Filling material

[0197] V front

[0198] R back

[0199] Bibliography

[0200] Sordo, Guido, Daniel Nilsen Wright, and Sigurd T. Moe. "Through Silicon Vias in MEMS packaging, a review." (2019).

[0201] Xue, Xingjun, et al. "Silicon diode uncooled FPA with three-dimensional integrated CMOS readout circuits." IEEE Sensors Journal 19.2 (2018): 426-434.

Claims

PATENT CLAIMS 1. A method for producing a component (1) comprising a via region (11) which extends along a vertical direction from a rear side (R) to a front side (V) of the component (1), the method comprising the following steps: a) providing a substrate (5) comprising an electrically conductive or semiconducting material, b) dividing the substrate (5) into two or more galvanically separated zones (7), wherein the division is effected by a continuous separation of the substrate along the vertical direction and, after the separation, an empty region (9) is present between the two or more zones (7), c) at least partially filling the empty region (9) with an insulating material (13), d) applying an electrical connection contact (15) on the front side (V) and the rear side (R) on at least one zone (7) of the two or more zones, such that the at least one zone (7) functions as a via region (11).

2. Method according to the preceding claim, characterized in that the continuous separation of the substrate (5) in a horizontal cross-section of the substrate is non-rectilinear, so that preferably facing surfaces of the adjacent zones are characterized by a roughness which contributes to the mechanical stability of the component.

3. Method according to one or more of the preceding claims, characterized in that adjacent zones (7) comprise corrugations (17) which are adapted to one another in a horizontal cross section, wherein the corrugations (17) which are adapted to one another preferably comprise tongues and corresponding grooves which establish a positive connection perpendicular to a connecting surface of the adjacent zones (7).

4. Method according to one or more of the preceding claims, characterized in that the substrate (5) comprises a semiconductor, preferably a doped semiconductor, and / or a conductor, wherein the semiconductor is preferably silicon, germanium and / or a III-V compound semiconductor, wherein the III-V semiconductor is preferably selected from a group comprising gallium nitride, aluminum nitride, indium nitride, boron nitride, scandium nitride, gallium phosphide, aluminum phosphide, indium phosphide, indium gallium phosphide, boron phosphide, gallium arsenide, aluminum arsenide, indium arsenide, boron arsenide, gallium antimonide, aluminum antimonide and / or indium antimonide.

5. Method according to one or more of the preceding claims, characterized in that the substrate (5) has an electrical conductivity of at least 10' 6 S / cm, preferably at least 10' 4 , particularly preferably at least 10' 2 or more.

6. Method according to one or more of the preceding claims, characterized in that the zones (7) have a horizontal distance from one another of 1 - 30 pm, preferably of 1 - 20 pm, particularly preferably of 2 - 10 pm and / or the zones (7) have a vertical height of 10 - 400 pm, preferably of 10 - 100 pm, particularly 20 to 50 pm.

7. Method according to one or more of the preceding claims, characterized in that the empty region (9) is widened at least in sections along a horizontal direction, preferably by etching adjacent zones (7) in a horizontal cross-section.

8. Method according to one or more of the preceding claims, characterized in that the insulating material (13) comprises a material selected from a group comprising silicon nitride, tetraethyl orthosilicate, silicon oxynitride and / or silicon dioxide, wherein the insulating material preferably comprises a low-k dielectric, which is preferably selected from a group comprising porous organic materials, porous carbon-doped silicon oxide, silica gel, silicatic aerogels, mesoporous organosilicates, porous hydrogen silsesquioxane, mesoporous silicate glasses, phosphor particles and / or aluminum oxide particles.

9. Method according to one or more of the preceding claims, characterized in that the substrate (5) is separated into 2, 3, 4, 5, 6, 7, 8, 9, 10 or more zones (7).

10. Method according to one or more of the preceding claims, characterized in that the separation of the substrate (5) is carried out by an etching process, wherein the etching process is preferably selected from a wet-chemical etching process and / or dry etching process, preferably by physical and / or chemical dry etching processes, particularly preferably by reactive ion etching and / or reactive ion deep etching (DRIE, Bosch process). 11 . Method according to one or more of the preceding claims, characterized in that the at least partial filling of the empty area (9) with the insulating material (13) is carried out by a coating process which is preferably selected from a group comprising physical vapor deposition, chemical vapor deposition, atomic layer deposition, doctor blade coating, powder coating and injection molding.

12. Method according to one or more of the preceding claims, characterized in that dicing is carried out on the two or more zones (7), wherein the dicing preferably comprises one or more steps selected from a group comprising mechanical sawing, laser cutting and breaking.

13. Method according to one or more of the preceding claims, characterized in that the connection contact is selected from a group comprising a connection pad (23), conductor tracks, conductor track strips, bonding wires, solder connections (25), an electrically conductive adhesive, bumps and / or vias (27).

14. Method according to one or more of the preceding claims, characterized in that the zones (7) are connected to a circuit carrier, preferably a printed circuit board (29), wherein preferably intermediate regions of the circuit carrier, preferably the printed circuit board (29), are filled with a filling material (31), wherein preferably the filling material (31) is selected from a group comprising an epoxy resin, polyester resin, phenolic resin and / or aminoplasts.

15. Component (1) preferably producible by a method according to one or more of the preceding claims, comprising a via region (11) which extends along a vertical direction from a rear side (R) to a front side (V) of the component (1), characterized in that the component (1) has a substrate (5) comprising an electrically conductive material or semiconducting material, wherein the substrate (5) is divided into two or more galvanically separated zones (7) and wherein an electrical connection contact (15) is present on the front side (V) and the rear side (R) on at least one zone (7) of the two or more zones, so that the at least one zone (7) functions as a via region (11).

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