Control device, optical system and lithography apparatus

Abstract

The invention relates to a control device (100) for controlling at least one actuator (200) for actuating an optical element (310) of an optical system (300), comprising: an amplifier (110) which is designed to receive a provided supply voltage (V1) at an input node (K1) and to provide a control voltage (V2) for the actuator (200) at an output node (K2); a processing unit (130) which is designed to provide a compensation signal (K) for compensating for interference on the supply voltage (V1) according to the provided supply voltage (V1); and a combination unit (140) which is designed to combine a target signal (SS) for setting the control voltage (V2) with the provided compensation signal (K) for providing the control voltage (V3) for the amplifier (110).

Description

[0001] CONTROL DEVICE, OPTICAL SYSTEM AND LITHOGRAPHY SYSTEM

[0002] The present invention relates to a control device for controlling an actuator of an optical system, an optical system with such a control device and a lithography system with such an optical system.

[0003] The content of the priority application DE 10 2024 203 440.1 is incorporated in its entirety by reference.

[0004] Microlithography systems are known that feature actuatable optical elements, such as microlens arrays or micromirror arrays. Microlithography is used to manufacture microstructured components, such as integrated circuits. The microlithography process is carried out using a lithography system that features an illumination system and a projection system.

[0005] Driven by the pursuit of ever smaller structures in the production of integrated circuits, EUV lithography systems are currently being developed that use light with a wavelength in the range of 0.1 nm to 30 nm, particularly 13.5 nm. Since most materials absorb light at this wavelength, such EUV lithography systems must use reflective optics, i.e., mirrors, instead of the refractive optics, i.e., lenses, as was previously the case.

[0006] The image of a mask (reticle) illuminated by the illumination system is projected by the projection system onto a substrate coated with a light-sensitive layer (photoresist) and positioned in the image plane of the projection system, such as a silicon wafer, to transfer the mask structure to the highly sensitive coating of the substrate. Actuable optical elements can be used to improve the image of the mask on the substrate. For example, wavefront errors during exposure that lead to enlarged and / or blurred images can be compensated.

[0007] A MEMS actuator (MEMS; Microelectromechanical System) or a PMN actuator (PMN; Lead Magnesium Niobate), for example, can be used as an actuator. A PMN actuator enables distance positioning in the sub-micrometer or sub-nanometer range. When a DC voltage is applied, the actuator, whose actuator elements are stacked on top of one another, experiences a force that causes a specific linear expansion. The position set by the DC voltage can be negatively influenced by external electromechanical crosstalk at the inherently resulting resonance points of the actuator controlled by the DC voltage. MEMS mirrors and actuators suitable for controlling them are described, for example, in DE 10 2016 213 025 A1.

[0008] Lithography systems are highly complex systems in which the actuators must be controlled with great precision. Actuator control places the highest demands on the accuracy and stability of the power supply. The actuators are supplied with a high voltage, which contains a high degree of interference and noise. By using an amplifier, typically a Class A amplifier, which provides the voltage required by the actuators by amplifying an input voltage, the interference and noise components contained in the input voltage are further amplified. The amplified signal used to control the actuators therefore contains a high degree of interference and noise. This affects the accuracy of the actuator control.

[0009] Against this background, one object of the present invention is to improve the control of an actuator of an optical system.

[0010] According to a first aspect, a control device for controlling an actuator for actuating an optical element of an optical system is proposed. The control device comprises: an amplifier configured to receive a provided supply voltage at an input node and to provide a control voltage for the actuator at an output node; a processing unit configured to provide a compensation signal for compensating for disturbances on the supply voltage as a function of the provided supply voltage; and a combination unit configured to combine a desired signal for setting the control voltage with the provided compensation signal to provide the control voltage for the amplifier.

[0011] The supply voltage provided at the input node is, for example, 48 V, 100 V, or 140 V. The amplifier of the control device is configured to amplify this voltage to control the actuator. Amplification occurs, in particular, via the amplifier's quiescent current.

[0012] The compensation signal provided by the processing unit is configured to compensate for disturbances and / or noise in the provided supply voltage so that the amplifier can provide a disturbance-free drive voltage for driving the actuator.

[0013] The combination unit is configured to combine the provided compensation signal with a provided target signal and to output the combined signal from the target signal and the compensation signal as a control voltage to the amplifier.

[0014] By compensating for interference, or rather, noise on the supply voltage, with the generated compensation signal, the amplifier provides a noise-free control voltage for driving the actuators. The noise-free control voltage for driving the actuator improves the actuator's control behavior.

[0015] The actuator is, in particular, a MEMS actuator, a capacitive actuator, for example, a PMN actuator (PMN; lead magnesium niobate) or a PZT actuator (PZT; lead zirconate titanate) or a LiNbO3 actuator (lithium niobate). The actuator is, in particular, configured to actuate an optical element of the optical system. Examples of such an optical element include lenses, mirrors, and adaptive mirrors.

[0016] The optical system is preferably a projection optics system of the lithography system or a projection exposure system. However, the optical system can also be an illumination system. The projection exposure system can be an EUV lithography system. EUV stands for "Extreme Ultraviolet" and refers to a wavelength of the working light between 0.1 nm and 30 nm. The projection exposure system can also be a DUV lithography system. DUV stands for "Deep Ultraviolet" and refers to a wavelength of the working light between 30 nm and 250 nm.

[0017] Preferably, the amplifier is configured to receive the supply voltage provided at the input node and to provide an amplified drive voltage for the actuator using a quiescent current at the output node.

[0018] According to one embodiment, the amplifier comprises a voltage divider having a series circuit of a first resistor and a second resistor, wherein the first resistor is connected between the input node and the output node of the amplifier and the second resistor is connected between the output node of the amplifier and ground.

[0019] The voltage divider, consisting of the first and second resistors connected in series, allows the magnitude of the drive voltage provided at the output node for the actuator to be adjusted depending on the magnitudes of the first and second resistors. The gain depends on the first and second resistors as well as the supply voltage.

[0020] According to a further embodiment, the amplifier comprises a voltage-controlled current source with a transistor and an operational amplifier connected to a gate terminal of the transistor and controllable by the control voltage.

[0021] The amplifier can, in particular, have a voltage-controlled current source. The voltage-controlled current source comprises a transistor and an operational amplifier and is configured to provide a quiescent current as a function of an applied voltage, which in turn determines the control voltage for the actuator provided by the amplifier.

[0022] According to a further embodiment, the transistor of the voltage-controlled current source is a field-effect transistor whose gate terminal is connected to the output of the operational amplifier, whose drain terminal is connected to the output node of the amplifier and whose source terminal is connected to ground via the second resistor and via a feedback branch to the inverting input of the operational amplifier, wherein the non-inverting input of the operational amplifier is connected to the output of the combination unit for receiving the control voltage.

[0023] The transistor as an electronic component of the voltage-controlled current source can, in particular, be a field-effect transistor (FET). The gate terminal of the field-effect transistor is connected to the output of the operational amplifier, and the source terminal is connected to the inverting input of the operational amplifier via a feedback branch. The output of the combination unit is connected to the non-inverting input of the operational amplifier, with the combination unit providing the control voltage to the operational amplifier. The operational amplifier is configured to process the control voltage, which contains the compensation signal, to provide the drive voltage.

[0024] According to a further embodiment, the processing unit comprises a voltage divider connected between the input node of the amplifier and ground, the center tap of which is connected to the combination unit for providing the compensation signal.

[0025] The processing unit's voltage divider is configured to scale and filter the supply voltage applied to the processing unit. Based on this scaling and filtering, the compensation signal is provided at the center tap of the voltage divider.

[0026] According to a further embodiment, the processing unit further comprises: a voltage divider connected between the input node of the amplifier and ground for scavenging the supply voltage provided at the input node, and a buffer coupled between the center tap of the voltage divider and the combination unit, which buffer receives the scavenged supply voltage on the input side and, depending thereon, provides the compensation signal to the combination unit on the output side.

[0027] The voltage divider connected between the amplifier's input node and ground scales the supplied supply voltage and provides a scaled supply voltage at the voltage divider's center tap. The buffer is located at the voltage divider's center tap and further processes the supply voltage scaled by the voltage divider. The buffer is used as a stabilizing element to stabilize the supply voltage scaled by the voltage divider. This makes the compensation signal provided by the processing unit to the combination unit more stable, which in turn improves the compensation properties and thus the interference-free nature of the drive voltage for the actuator provided by the amplifier.According to a further embodiment, the combination unit is designed as a subtraction unit which is configured to provide the control voltage for the operational amplifier of the voltage-controlled current source by subtracting the compensation signal from the desired signal for setting the control voltage.

[0028] The control voltage for the amplifier is the difference between the compensation signal and the target signal. This provides the amplifier with a control voltage that takes into account the interference or noise on the supply voltage present at the input node. Consequently, the amplifier can provide a noise-reduced control voltage for the actuator at the output node.

[0029] The subtraction unit can, for example, be an analog subtraction amplifier. In some embodiments, the subtraction can also be performed entirely digitally. The compensation signal is digitized via an A / D converter, and a digital control unit can then subtract the compensation signal from the digital target signal. The resulting signal is then converted back into an analog signal via a D / A converter so that the amplifier can process the signal as a control voltage.

[0030] According to a further embodiment, the linking unit is designed as a linking node and the processing unit comprises a voltage divider with a third resistor and with a fourth resistor, wherein the third resistor is connected between the input node of the amplifier and the linking node and the fourth resistor is connected between an input node of the control device for receiving the desired signal and the linking node.

[0031] According to a further embodiment, the linking unit is designed as a linking node, and the processing unit has a voltage divider with a series circuit comprising a third resistor and a capacitor, and with a fourth resistor. The series circuit comprising the third resistor and the capacitor is connected between the linking node and the input node of the amplifier, and the fourth resistor is connected between an input node of the control device for receiving the desired signal and the linking node. The capacitor, which is connected in series with the third resistor in this embodiment, limits the bandwidth in which the compensation signal is effective. In particular, the capacitor only allows higher frequencies to pass through, with the DC voltage component being ignored.

[0032] According to a further embodiment, the first resistor of the amplifier connected between the input node of the amplifier and the output node of the amplifier and the third resistor of the processing unit have identical resistance values, and / or the second resistor of the amplifier and the fourth resistor of the processing unit have identical resistance values.

[0033] The choice of resistor values ​​in the control device influences the control voltage for the actuator. Selecting identical resistance values ​​for the first and third resistors, or for the second and fourth resistors, simplifies the adjustment of the control voltage for the actuator.

[0034] According to a further embodiment, the control device is configured to control a plurality N of actuators, wherein the respective actuator is configured to actuate an optical element associated with the actuator.

[0035] According to a further embodiment, the control device further comprises a plurality N of amplifiers, wherein each of the N amplifiers is assigned to an actuator and is configured to receive a provided supply voltage at an input node and to provide a control voltage for the assigned actuator at an output node, with N > 2, a single processing unit which is configured to provide a single compensation signal for the N amplifiers for compensating for disturbances on the supply voltage depending on the provided supply voltage, and a plurality of N combination units, wherein each of the N combination units is assigned to a respective amplifier and is configured toto link a desired signal for setting the drive voltage of the associated amplifier with the provided compensation signal for providing the drive voltage for the associated amplifier. Because a single processing unit can be used to provide the compensation signal for the N amplifiers, the space required by the control device is reduced. Since the processing unit has a high power consumption, it is advantageous to only have to provide the processing unit once in the control device for N actuators. Furthermore, this ensures that the N amplifiers are provided with the same compensation signal and that the N amplifiers can provide an interference-free drive voltage for each of the N actuators.

[0036] According to a further embodiment, the respective resistor can be designed as an active resistor and / or the respective capacitor can be designed as an active capacitor.

[0037] In another embodiment, the amplifier is a Class A amplifier. Class A amplifiers have low signal distortion and thus enable precise actuator control.

[0038] In another embodiment, the amplifier is a Class AB amplifier. The Class AB amplifier is a suitable alternative to the proposed Class A amplifier.

[0039] According to a second aspect, an optical system having a number of actuatable optical elements is proposed, wherein each of the actuatable optical elements of the number is assigned an actuator, wherein each actuator is assigned a control device for controlling the actuator according to the first aspect or according to one of the embodiments of the first aspect.

[0040] The optical system comprises in particular a micromirror array and / or a microlens array with a plurality of independently actuatable optical elements.

[0041] In embodiments, groups of actuators can be defined, with all actuators in a group being assigned the same control device.

[0042] In some embodiments, the optical system is designed as an illumination optics or as a projection optics of a lithography system. In some embodiments, the optical system comprises a vacuum housing in which the actuatable optical elements, the associated actuators, and the control device are arranged.

[0043] According to a third aspect, a lithography system is proposed which has an optical system according to the second aspect or according to one of the embodiments of the second aspect.

[0044] The lithography system is, for example, an EUV lithography system whose working light lies in a wavelength range from 0.1 nm to 30 nm, or a DUV lithography system whose working light lies in a wavelength range from 30 nm to 250 nm.

[0045] "One" in this case is not necessarily limited to a single element. Rather, multiple elements, such as two, three, or more, may also be included. Any other counting term used here should not be understood as implying a limitation to the exact number of elements mentioned. Rather, numerical deviations upwards and downwards are possible, unless otherwise stated.

[0046] Further possible implementations of the invention also include combinations of features or embodiments described above or below with respect to the exemplary embodiments that are not explicitly mentioned. In this case, the person skilled in the art will also add individual aspects as improvements or additions to the respective basic form of the invention.

[0047] Further advantageous embodiments and aspects of the invention are the subject of the dependent claims and the exemplary embodiments of the invention described below. The invention will be explained in more detail below using preferred embodiments with reference to the accompanying figures.

[0048] Fig. 1 shows a schematic meridional section of a projection exposure system for EUV projection lithography!

[0049] Fig. 2 shows a schematic representation of an embodiment of an optical system; Fig. 3 shows a schematic block diagram of a first embodiment of a control device for controlling an actuator for actuating an optical element of an optical system.

[0050] Fig. 4 shows a schematic block diagram of a second embodiment of a control device for controlling an actuator for actuating an optical element of an optical system!

[0051] Fig. 5 shows a schematic block diagram of a third embodiment of a control device for controlling an actuator for actuating an optical element of an optical system!

[0052] Fig. 6 shows a schematic block diagram of a fourth embodiment of a control device for controlling an actuator for actuating an optical element of an optical system!

[0053] Fig. 7 shows a schematic block diagram of a fifth embodiment of a control device for controlling a plurality of actuators for actuating a respective optical element of an optical system.

[0054] In the figures, identical or functionally equivalent elements are provided with the same reference numerals unless otherwise indicated. Furthermore, it should be noted that the representations in the figures are not necessarily to scale.

[0055] Fig. 1 shows an embodiment of a projection exposure system 1 (lithography system), in particular an EUV lithography system. One embodiment of an illumination system 2 of the projection exposure system 1 has, in addition to a light or radiation source 3, an illumination optics 4 for illuminating an object field 5 in an object plane 6. In an alternative embodiment, the light source 3 can also be provided as a separate module from the rest of the illumination system 2. In this case, the illumination system 2 does not include the light source 3.

[0056] A reticle 7 arranged in the object field 5 is exposed. The reticle 7 is held by a reticle holder 8. The reticle holder 8 can be displaced via a reticle displacement drive 9, in particular in a scanning direction.

[0057] For illustrative purposes, Fig. 1 shows a Cartesian coordinate system with an x-direction (x), a y-direction (y), and a z-direction (z). The x-direction (x) runs perpendicular to the drawing plane. The y-direction (y) runs horizontally, and the z-direction (z) runs vertically. The scanning direction in Fig. 1 runs along the y-direction (y). The z-direction (z) runs perpendicular to the object plane (6).

[0058] The projection exposure system 1 comprises a projection optics 10. The projection optics 10 serves to image the object field 5 into an image field 11 in an image plane 12. The image plane 12 runs parallel to the object plane 6. Alternatively, an angle different from 0° between the object plane 6 and the image plane 12 is also possible.

[0059] A structure on the reticle 7 is imaged onto a light-sensitive layer of a wafer 13 arranged in the image plane 12 in the region of the image field 11. The wafer 13 is held by a wafer holder 14. The wafer holder 14 can be displaced, in particular along the y-direction y, via a wafer displacement drive 15. The displacement of the reticle 7, on the one hand, via the reticle displacement drive 9, and the displacement of the wafer 13, on the other hand, via the wafer displacement drive 15, can be synchronized with each other.

[0060] The light source 3 is an EUV radiation source. The light source 3 emits, in particular, EUV radiation 16, which is also referred to below as useful radiation, illumination radiation, or illumination light. The useful radiation 16 has, in particular, a wavelength in the range between 5 nm and 30 nm. The light source 3 can be a plasma source, for example, an LPP source (Laser Produced Plasma, plasma generated with the aid of a laser) or a DPP source (Gas Discharged Produced Plasma, plasma generated by gas discharge). It can also be a synchrotron-based radiation source. The light source 3 can be a free-electron laser (FEL).

[0061] The illumination radiation 16 emanating from the light source 3 is focused by a collector 17. The collector 17 can be a collector with one or more ellipsoidal and / or hyperboloidal reflection surfaces. The at least one reflection surface of the collector 17 can be exposed to the illumination radiation 16 at grazing incidence (Gl), i.e., at angles of incidence greater than 45°, or at normal incidence (NI), i.e., at angles of incidence less than 45°. The collector 17 can be structured and / or coated, on the one hand, to optimize its reflectivity for the useful radiation and, on the other hand, to suppress stray light.

[0062] After the collector 17, the illumination radiation 16 propagates through an intermediate focus in an intermediate focal plane 18. The intermediate focal plane 18 can represent a separation between a radiation source module, comprising the light source 3 and the collector 17, and the illumination optics 4.

[0063] The illumination optics 4 comprises a deflecting mirror 19 and, downstream of this in the beam path, a first facet mirror 20. The deflecting mirror 19 can be a flat deflecting mirror or, alternatively, a mirror with a beam-influencing effect beyond the pure deflection effect. Alternatively or additionally, the deflecting mirror 19 can be designed as a spectral filter that separates a useful light wavelength of the illumination radiation 16 from stray light of a different wavelength. If the first facet mirror 20 is arranged in a plane of the illumination optics 4 that is optically conjugate to the object plane 6 as the field plane, it is also referred to as a field facet mirror. The first facet mirror 20 comprises a plurality of individual first facets 21, which can also be referred to as field facets. Only a few of these first facets 21 are shown in Fig. 1 as examples.

[0064] The first facets 21 can be designed as macroscopic facets, in particular as rectangular facets or as facets with an arcuate or partially circular edge contour. The first facets 21 can be designed as flat facets or, alternatively, as convexly or concavely curved facets.

[0065] As is known, for example, from DE 10 2008 009 600 A1, the first facets 21 themselves can also be composed of a plurality of individual mirrors, in particular a plurality of micromirrors. The first facet mirror 20 can, in particular, be designed as a microelectromechanical system (MEMS system). For details, reference is made to DE 10 2008 009 600 A1.

[0066] Between the collector 17 and the deflecting mirror 19, the illumination radiation 16 runs horizontally, i.e. along the y-direction y.

[0067] In the beam path of the illumination optics 4, a second facet mirror 22 is arranged downstream of the first facet mirror 20. If the second facet mirror 22 is arranged in a pupil plane of the illumination optics 4, it is also referred to as a pupil facet mirror. The second facet mirror 22 can also be arranged at a distance from a pupil plane of the illumination optics 4. In this case, the combination of the first facet mirror 20 and the second facet mirror 22 is also referred to as a specular reflector. Specular reflectors are known from US 2006 / 0132747 A1, EP 1 614 008 B1, and US Pat. No. 6,573,978.

[0068] The second facet mirror 22 comprises a plurality of second facets 23. In the case of a pupil facet mirror, the second facets 23 are also referred to as pupil facets.

[0069] The second facets 23 can also be macroscopic facets, which can, for example, be round, rectangular, or hexagonal, or alternatively, facets composed of micromirrors. Reference is also made to DE 10 2008 009 600 A1 in this regard.

[0070] The second facets 23 can have planar or alternatively convex or concave curved reflection surfaces.

[0071] The illumination optics 4 thus form a double-faceted system. This basic principle is also known as a fly's-eye integrator.

[0072] It may be advantageous to arrange the second facet mirror 22 not exactly in a plane that is optically conjugate to a pupil plane of the projection optics 10. In particular, the second facet mirror 22 can be arranged tilted relative to a pupil plane of the projection optics 10, as described, for example, in DE 10 2017 220 586 A1.

[0073] With the help of the second facet mirror 22, the individual first facets 21 are imaged into the object field 5. The second facet mirror 22 is the last beam-forming mirror or actually the last mirror for the illumination radiation 16 in the beam path before the object field 5.

[0074] In a further embodiment of the illumination optics 4 (not shown), a transmission optics can be arranged in the beam path between the second facet mirror 22 and the object field 5, which transmission optics contributes in particular to the imaging of the first facets 21 into the object field 5. The transmission optics can have exactly one mirror, but alternatively also two or more mirrors, which are arranged one behind the other in the beam path of the illumination optics 4. The transmission optics can in particular comprise one or two mirrors for normal incidence (Ni mirrors, normal incidence mirrors) and / or one or two mirrors for grazing incidence (Gl mirrors, grazing incidence mirrors).

[0075] In the embodiment shown in Fig. 1, the illumination optics 4 has exactly three mirrors after the collector 17, namely the deflection mirror 19, the first facet mirror 20 and the second facet mirror 22.

[0076] In a further embodiment of the illumination optics 4, the deflection mirror 19 can also be omitted, so that the illumination optics 4 can then have exactly two mirrors after the collector 17, namely the first facet mirror 20 and the second facet mirror 22.

[0077] The imaging of the first facets 21 by means of the second facets 23 or with the second facets 23 and a transmission optics into the object plane 6 is usually only an approximate imaging.

[0078] The projection optics 10 comprises a plurality of mirrors Mi, which are numbered according to their arrangement in the beam path of the projection exposure system 1.

[0079] In the example shown in Fig. 1, the projection optics 10 comprises six mirrors M1 to M6. Alternatives with four, eight, ten, twelve, or a different number of mirrors M1 are also possible. The projection optics 10 is a doubly obscured optics. The penultimate mirror M5 and the last mirror M6 each have a passage opening for the illumination radiation 16. The projection optics 10 has an image-side numerical aperture that is greater than 0.5 and can also be greater than 0.6, for example, 0.7 or 0.75.

[0080] Reflecting surfaces of the mirrors Mi can be designed as freeform surfaces without a rotational symmetry axis. Alternatively, the reflecting surfaces of the mirrors Mi can be designed as aspherical surfaces with exactly one rotational symmetry axis of the reflecting surface shape. The mirrors Mi, like the mirrors of the illumination optics 4, can have highly reflective coatings for the illumination radiation 16. These coatings can be designed as multilayer coatings, in particular with alternating layers of molybdenum and silicon. The projection optics 10 has a large object-image offset in the y-direction y between a y-coordinate of a center of the object field 5 and a y-coordinate of the center of the image field 11. This object-image offset in the y-direction y can be approximately as large as a z-distance between the object plane 6 and the image plane 12.

[0081] The projection optics 10 can, in particular, be anamorphic. It has, in particular, different image scales ßx, ßy in the x and y directions x, y. The two image scales ßx, ßy of the projection optics 10 are preferably (ßx, ßy) = (+ / - 0.25, / +- 0.125). A positive image scale ß means an image without image inversion. A negative sign for the image scale ß means an image with image inversion.

[0082] The projection optics 10 thus leads to a reduction in the ratio 4:1 in the x-direction x, i.e. in the direction perpendicular to the scanning direction.

[0083] The projection optics 10 leads to a reduction of 8:1 in the y-direction y, i.e. in the scanning direction.

[0084] Other magnifications are also possible. Magnifications with the same sign and absolutely identical in the x and y directions (x, y), for example, with absolute values ​​of 0.125 or 0.25, are also possible.

[0085] The number of intermediate image planes in the x- and y-directions x, y in the beam path between the object field 5 and the image field 11 can be the same or can be different, depending on the design of the projection optics 10. Examples of projection optics with different numbers of such intermediate images in the x- and y-directions x, y are known from US 2018 / 0074303 A1.

[0086] Each of the second facets 23 is assigned to exactly one of the first facets 21 to form a respective illumination channel for illuminating the object field 5. This can, in particular, result in illumination according to the Köhler principle. The far field is divided into a plurality of object fields 5 using the first facets 21. The first facets 21 generate a plurality of images of the intermediate focus on the second facets 23 assigned to them.

[0087] The first facets 21 are each imaged onto the reticle 7 by an associated second facet 23, superimposed on one another, to illuminate the object field 5. The illumination of the object field 5 is, in particular, as homogeneous as possible. It preferably has a uniformity error of less than 2%. Field uniformity can be achieved by superimposing different illumination channels.

[0088] By arranging the second facets 23, the illumination of the entrance pupil of the projection optics 10 can be geometrically defined. By selecting the illumination channels, in particular the subset of the second facets 23 that guide light, the intensity distribution in the entrance pupil of the projection optics 10 can be adjusted. This intensity distribution is also referred to as the illumination setting or illumination pupil fill.

[0089] A likewise preferred pupil uniformity in the area of ​​defined illuminated sections of an illumination pupil of the illumination optics 4 can be achieved by redistributing the illumination channels.

[0090] Further aspects and details of the illumination of the object field 5 and in particular of the entrance pupil of the projection optics 10 are described below.

[0091] The projection optics 10 can, in particular, have a homocentric entrance pupil. This can be accessible. It can also be inaccessible.

[0092] The entrance pupil of the projection optics 10 cannot usually be precisely illuminated with the second facet mirror 22. When imaging the projection optics 10, which images the center of the second facet mirror 22 telecentrically onto the wafer 13, the aperture rays often do not intersect at a single point. However, a surface can be found in which the pairwise determined distance of the aperture rays is minimized. This surface represents the entrance pupil or a surface conjugate to it in spatial space. In particular, this surface exhibits a finite curvature.

[0093] It is possible that the projection optics 10 have different entrance pupil positions for the tangential and sagittal beam paths. In this case, an imaging element, in particular an optical component of the transmission optics, should be provided between the second facet mirror 22 and the reticle 7. With the help of this optical element, the different positions of the tangential entrance pupil and the sagittal entrance pupil can be taken into account. In the arrangement of the components of the illumination optics 4 shown in Fig. 1, the second facet mirror 22 is arranged in a surface conjugated to the entrance pupil of the projection optics 10. The first facet mirror 20 is arranged tilted relative to the object plane 6. The first facet mirror 20 is arranged tilted relative to an arrangement plane defined by the deflection mirror 19.The first facet mirror 20 is arranged tilted to an arrangement plane which is defined by the second facet mirror 22.

[0094] Fig. 2 shows a schematic representation of an embodiment of an optical system 300 for a lithography system or projection exposure system 1, as shown, for example, in Fig. 1. Furthermore, the optical system 300 of Fig. 2 can also be used, for example, in a DUV lithography system.

[0095] The optical system 300 of Fig. 2 has a plurality of actuatable optical elements 310. The optical system 300 is embodied here as a micromirror array, wherein the optical elements 310 are micromirrors. Each micromirror 310 can be actuated by means of an associated actuator 200. For example, a respective micromirror 310 can be tilted about two axes and / or displaced in one, two, or three spatial axes by means of the associated actuator 200. For reasons of clarity, the reference numerals are shown only for the top row of these elements.

[0096] The control device 100 controls the respective actuator 200, for example, with a control voltage V2 (see Figs. 3 to 7). This adjusts a position of the respective micromirror 310. The control device 100 is described in particular with reference to Figs. 3 to 7.

[0097] Figure 3 shows a schematic block diagram of a first embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300. In the embodiments described below, the actuator 200 is a capacitive actuator and is depicted as a capacitor in Figures 3 to 7.

[0098] The control device 100 according to Fig. 3 comprises an amplifier 110, a processing unit 130 and a combination unit 140.

[0099] The amplifier 110 is configured to receive a supply voltage VI provided at an input node K1 and to provide an amplified drive voltage V2 for the actuator 200 using a quiescent current II at the output node K2.

[0100] Amplifier 110 includes a voltage divider. The voltage divider consists of a series circuit of a first resistor RI and a second resistor R2. The first resistor RI is connected to the input node K1 and the output node K2 of amplifier 110. The second resistor R2 is connected between amplifier 110 and ground GND.

[0101] Amplifier 110 can also be referred to as an amplifier circuit, amplifier stage, or output stage. Amplifier 110 of the first embodiment includes a voltage-controlled current source 120. In other embodiments, amplifier 110 is configured, for example, as a Class A amplifier. Alternatively to a Class A amplifier, amplifier 110 can also be configured as a Class AB amplifier.

[0102] The magnitude of the control voltage V2 is determined in the control device 100 according to Fig. 3 as a function of the sizes of the first resistor RI and the second resistor R2 of the voltage divider, the supply voltage VI and as a function of the quiescent current II of the amplifier.

[0103] The voltage-controlled current source 120 comprises a transistor 121 and an operational amplifier 122. The transistor 121 is, for example, a field-effect transistor (FET). Alternatively, the transistor 121 can also be designed as a bipolar transistor.

[0104] In this embodiment, transistor 121 of voltage-controlled current source 120 is embodied as a field-effect transistor (FET). It has a gate terminal G, a drain terminal D, and a source terminal S. Gate terminal G is connected to the output of operational amplifier 122 of voltage-controlled current source 120. Drain terminal D of transistor 121 of voltage-controlled current source 120 is coupled to output node K2 of amplifier 110. As already described above, source terminal S of transistor 121 is connected to ground GND via second resistor R2. Source terminal S is further connected to the inverting input of operational amplifier 122 via a feedback branch 123.The non-inverting input of operational amplifier 122 is, as described above, connected to the output of combination unit 140 and receives the control voltage V3 provided by combination unit 140. The operational amplifier 122 of voltage-controlled current source 120 is controllable by a control voltage V3 applied to the non-inverting input of operational amplifier 122. The output of operational amplifier 122 is connected to the gate terminal G of transistor 121 of voltage-controlled current source 120.

[0105] The processing unit 130 is configured to receive the supply voltage VI provided at the input node K1 and to provide a compensation signal K as a function of the supply voltage VI. The compensation signal K is provided to compensate for disturbances on the supply voltage VI.

[0106] For example, a supply voltage VI of 48 V can be provided at the input node K1. However, this provided supply voltage VI has disturbances, for example in the form of fluctuations, which cause the voltage to fluctuate around the set value of 48 V. Based thereon, the processing unit 130 is configured to provide a compensation signal K that compensates for these fluctuations.

[0107] In the embodiment of Fig. 3, the processing unit 130 has a voltage divider 131 connected between the input node K1 of the amplifier 110 and ground GND. The center tap M of the voltage divider 131 is connected to the combination unit 140 and provides the compensation signal K. The voltage divider 131 has a third resistor R3 and a fourth resistor R4. The third resistor R3 of the voltage divider 131 is arranged between the input node K1 and the center tap M. The fourth resistor R4 of the voltage divider 131 is connected between the center tap M and ground GND.

[0108] The combination unit 140 is configured to receive the compensation signal K provided by the processing unit 130 and a desired signal SS for setting the control voltage V2. To set the control voltage V2, the combination unit 140 is further configured to combine the compensation signal K with the desired signal SS. The provided control voltage V3 is then output to the non-inverting input of the operational amplifier 122 of the voltage-controlled current source 120. The control voltage V2 provided by the amplifier 110 has significantly less interference than the supply voltage V1. This allows for improved control of the actuator 200.

[0109] The resistance values ​​of the resistors RI, R2 provided in the control device 100 can be selected depending on the application. In particular, the values ​​of the resistors RI, R2 depend on the desired gain of the amplifier 110 for providing the control voltage V2 at the output node K2. In the present embodiment, the first resistor RI and the third resistor R3 have identical resistance values. The second resistor R2 and the fourth resistor R4 also have identical resistance values. In other embodiments, only the first resistor RI and the third resistor R3 have identical resistance values. Alternatively, only the second resistor R2 and the fourth resistor R4 can have identical resistance values.

[0110] Fig. 4 shows a schematic block diagram of a second embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300. The control device 100 of Fig. 4 also has an amplifier 110 with a voltage-controlled current source 120 and a combination unit 140, like the control device 100 of the first embodiment shown in Fig. 3. However, the control device 100 of the second embodiment differs from the control device 100 of the first embodiment in the structure of the processing unit 130.

[0111] The processing unit 130 of the control device 100 also has a voltage divider 131 connected between the input node K1 of the amplifier 110 and ground GND. The voltage divider 131, like the voltage divider 131 of the first embodiment, is configured to scale the supply voltage VI provided at the input node K1. The voltage divider 131 has a third resistor R3 and a fourth resistor R4. The third resistor R3 of the voltage divider 131 is arranged between the input node K1 and the center tap M. The fourth resistor R4 of the voltage divider 131 is connected between the center tap M and ground GND. The center tap M of the voltage divider 131 is connected to the input of a buffer 132. The output of the buffer 132 is connected to the logic unit 140.The buffer 132 receives on the input side the scaled supply voltage SV1 from the center tap M of the voltage divider 131 and provides the compensation signal K to the combination unit 140 as a function of the scaled supply voltage SV1 provided at the center tap M.

[0112] The combination unit 140 is embodied as a subtraction unit in the control device 100 shown in Fig. 4. The subtraction unit is configured to subtract the compensation signal K, which is provided by the processing unit 130, from the desired signal SS provided at the input node K3. The difference formed by the combination unit 140 is provided as control voltage V3 at the non-inverting input of the operational amplifier 122 of the voltage-controlled current source 130.

[0113] The amplifier 110 is configured to receive a supply voltage VI provided at an input node K1 and to provide an amplified drive voltage V2 for the actuator 200 using a quiescent current II at the output node K2.

[0114] Fig. 5 shows a schematic block diagram of a third embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300.

[0115] The control device 100 according to the third embodiment also includes an amplifier 110, a processing unit 130, and a combination unit 140. In this embodiment, the amplifier 110 also includes a voltage-controlled current source 120. In other embodiments, the amplifier 110 is, for example, a class A amplifier or a class AB amplifier.

[0116] The logic unit 140 is designed as a logic node in the third embodiment. The processing unit 130 of the third embodiment differs from the processing unit of the first and second embodiments. The processing unit 130 has a voltage divider 131. The voltage divider 131 comprises a third resistor R3 and a fourth resistor R4. The third resistor R3 is arranged between the input node K1 of the amplifier 110 and the logic node 140. The fourth resistor R4 is arranged between the input node K3 and the logic node 140. The desired signal SS for the fourth resistor R4 is provided at the input node K3. The amplifier 110 has identical components to the amplifier 110 of the first and second embodiments, in particular the voltage-controlled current source 120.The control voltage V3 provided at node 140 by the voltage divider 131 is applied to the non-inverting input of the operational amplifier 122. The control voltage V3 provided at node 140 enables the amplifier 110 to amplify using the supply voltage V1 without the noise contained therein. The control voltage V2 for the actuator 200, amplified by the amplifier 110, is thus noise-reduced. This improves the control behavior of the actuator 200.

[0117] Compared to the first and second embodiments, in which the combination unit 140 combines the compensation signal K provided by the voltage divider 131 at the center tap M with the desired signal SS, the arrangement of the third embodiment is particularly advantageous in that the space requirement of the control circuit 100 is reduced. Furthermore, the arrangement of Fig. 5 has the advantage that fewer circuit components are required. Therefore, in particular, heat losses in the control circuit 100 are reduced and efficiency is increased.

[0118] Fig. 6 shows a schematic block diagram of a fourth embodiment of a control device 100 for controlling an actuator 200 for actuating an optical element 310 of an optical system 300. The control device 100 of Fig. 6 also has an amplifier 110, a processing unit 130, and a combination unit 140, wherein the combination unit 140, as in the third embodiment of Fig.

[0119] 5, is designed as a connection node 140. As in the third embodiment, the amplifier 110 has a voltage-controlled current source 120. In further embodiments, the amplifier 110 can also be a Class A or Class AB amplifier.

[0120] The processing unit 130 has a voltage divider 131, which, like the voltage divider 131 of the third embodiment, also comprises a third resistor R3 and a fourth resistor R4. In the fourth embodiment, the third resistor R3 is connected in series with a capacitor C. The series circuit comprising capacitor C and the third resistor R3 is arranged between the input node K1 of the amplifier 110 and the connection node 140. The fourth resistor R4 is arranged between the input node K3 for receiving the desired signal SS and the connection node 140. In the series circuit of the capacitor C with the third resistor R3 in the voltage divider 131, the capacitor C limits the bandwidth in which the compensation signal acts. In particular, the capacitor C only allows higher frequencies to pass through, whereby the DC voltage component is not taken into account.As a result, the compensation signal K provided by the voltage divider 131 at the connection node 140 has improved compensation properties.

[0121] The control voltage V3 for the non-inverting input of the operational amplifier 122 of the voltage-controlled current source 120 of the amplifier 110 is provided from the connection node 140. As in the previously described embodiments, the amplifier 110 is configured to receive a supply voltage VI provided at an input node K1 and, using a quiescent current II at the output node K2, to provide an amplified drive voltage V2 for the actuator 200. The drive voltage V2 is interference-free, so that the actuator 200 is driven with a interference-free drive voltage V2, thereby improving the drive characteristics of the actuator 200.

[0122] Figure 7 shows a schematic block diagram of a fifth embodiment of a control device 100 for controlling a plurality of N (N>2) actuators 200 of an optical system 300. The respective actuator 200 is configured to actuate an optical element 310 of the optical system 300 associated with the actuator 200.

[0123] Figure 7 shows a parallel arrangement of a plurality of N amplifiers 110A-110Z. Each of the N amplifiers 110A-110Z is assigned an actuator 200. As in the previous embodiments, each of the N amplifiers 110A-110Z is configured to receive a supply voltage VI provided at its respective input node K1 and, using the quiescent current II at the associated output node K2, to provide an amplified and interference-free drive voltage V2 for the associated actuator 200.

[0124] As shown in Fig. 7, the control device 100 for controlling a plurality of N actuators 200 has only a single processing unit 130. The processing unit 130 is configured to provide a compensation signal K for the N amplifiers 110A-110Z. The compensation signal K is configured to compensate for disturbances on the supply voltage VI for the N amplifiers 110A-110Z.

[0125] The compensation signal K provided by the processing unit 130 is provided to the N combination units 140A-140Z. Each of the N combination units 140A-140Z is assigned to a respective one of the N amplifiers 110A-110Z. Each of the N combination units 140A-140Z is configured to combine the desired signal SS with the compensation signal K provided by the processing unit 130. The combined signal comprising the desired signal SS and the compensation signal K is provided as control voltage V3 to the N amplifiers 110A-110Z assigned to the respective one of the N combination units 140A-140Z.

[0126] As described in the other embodiments, the amplifiers 110A-110Z are configured to provide a noise-free drive voltage V2 to each of the N actuators 200. The noise-free amplification of the supply voltage VI by the N amplifiers 110A-110Z is possible by providing the control voltage V3.

[0127] Although the respective resistors were depicted as passive components in the embodiments described here, in further embodiments the respective resistors may be active components. The capacitor C, which was depicted as a passive component in the embodiments described above, may also be provided as an active component in further embodiments.

[0128] Although the present invention has been described using exemplary embodiments, it can be modified in many ways.

[0129] LIST OF REFERENCE SYMBOLS

[0130] 1 projection exposure system

[0131] 2 Lighting system

[0132] 3 Light source

[0133] 4 Lighting optics

[0134] 5 Object field

[0135] 6 Object level

[0136] 7 reticles

[0137] 8 reticle holders

[0138] 9 Reticle displacement drive

[0139] 10 Projection optics

[0140] 11 Image field

[0141] 12 Image plane

[0142] 13 wafers

[0143] 14 wafer holders

[0144] 15 Wafer relocation drive

[0145] 16 Lighting radiation

[0146] 17 Collector

[0147] 18 Intermediate focal plane

[0148] 19 Deflecting mirrors

[0149] 20 first facet mirror

[0150] 21 first facet

[0151] 22 second facet mirror

[0152] 23 second facet

[0153] 100 control device

[0154] 110 amplifiers

[0155] 120 voltage-controlled current source

[0156] 121 transistors

[0157] 122 operational amplifiers

[0158] 123 Feedback branch

[0159] 130 processing unit

[0160] 131 voltage divider

[0161] 132 buffers

[0162] 140 linking unit

[0163] 300 optical system

[0164] 310 optical element

[0165] C capacitor

[0166] D Drain terminal G Gate terminal

[0167] GND ground potential

[0168] Il Quiescent current

[0169] K compensation signal

[0170] Kl input node of the amplifier

[0171] K2 Output node of the amplifier

[0172] K3 Input node of the control device

[0173] M center tap

[0174] ml mirror

[0175] M2 mirror

[0176] M3 mirror

[0177] M4 mirror

[0178] M5 mirror

[0179] M6 mirror

[0180] RI first resistance

[0181] R2 second resistor

[0182] R3 third resistor

[0183] R4 fourth resistor

[0184] S Source connection

[0185] SS target signal

[0186] SV1 skaherte supply voltage

[0187] VI Supply voltage

[0188] V2 control voltage

[0189] V3 control voltage

Claims

PATENT CLAIMS 1. Control device (100) for controlling at least one actuator (200) for actuating an optical element (310) of an optical system (300), with : an amplifier (110) which is configured to receive a provided supply voltage (Vl) at an input node (Kl) and to provide a control voltage (V2) for the actuator (200) at an output node (K2), a processing unit (130) which is configured to provide a compensation signal (K) for compensating for disturbances on the supply voltage (Vl) as a function of the provided supply voltage (Vl), and a linking unit (140) which is configured to link a desired signal (SS) for setting the control voltage (V2) with the provided compensation signal (K) for providing the control voltage (V3) for the amplifier (110).

2. Control device according to claim 1, wherein the amplifier (110) has a voltage divider with a series circuit of a first resistor (Rl) and a second resistor (R2), wherein the first resistor (Rl) is connected between the input node (Kl) and the output node (K2) of the amplifier (110) and the second resistor (R2) is connected between the output node (K2) and ground (GND).

3. Control device according to claim 1 or 2, wherein the amplifier has a voltage-controlled current source (120) with a transistor (121) and an operational amplifier (122) connected to a gate terminal of the transistor (121) and controllable by the control voltage (V3).

4. Control device according to claim 3, wherein the transistor (121) of the voltage-controlled current source (120) is a field-effect transistor, the gate terminal (G) of which is connected to the output of the operational amplifier (122), the drain terminal (D) of which is connected to the output node (K2) of the amplifier (110) and the source terminal (S) of which is connected to ground (GND) via the second resistor (R2) and via a feedback branch (123) to the inverting input of the operational amplifier (122), the non-inverting input of the operational amplifier (122) is connected to the output of the logic unit (140) for receiving the control voltage (V3).

5. Control device according to one of claims 1 to 4, wherein the processing unit (130) has a voltage divider (131) connected between the input node (Kl) of the amplifier (110) and ground (GND), the center tap (M) of which is connected to the combination unit (140) for providing the compensation signal (K).

6. Control device according to one of claims 1 to 4, wherein the processing unit (130) comprises: a voltage divider (131) connected between the input node (Kl) of the amplifier (110) and ground (GND) for scaling the supply voltage (Vl) provided at the input node (Kl), and a buffer (132) coupled between the center tap (M) of the voltage divider (131) and the combination unit (140), which buffer receives the scaled supply voltage (SV1) on the input side and, depending thereon, provides the compensation signal (K) to the combination unit (140) on the output side.

7. Control device according to claim 5 or 6, wherein the linking unit (140) is designed as a subtraction unit which is configured to provide the control voltage (V3) for the operational amplifier (122) of the voltage-controlled current source (120) by subtracting the compensation signal (K) from the desired signal (SS) for setting the control voltage (V2).

8. Control device according to one of claims 1 to 4, wherein the linking unit (140) is designed as a linking node and the processing unit (130) comprises a voltage divider (131) with a third resistor (R3) and with a fourth resistor (R4), wherein the third resistor (R3) is connected between the input node (K1) of the amplifier (110) and the linking node (140) and the fourth resistor (R4) is connected between an input node (K3) of the control device (100) for receiving the desired signal (SS) and the linking node (140).

9. Control device according to one of claims 1 to 4, wherein the linking unit (140) is designed as a linking node and the processing unit (130) has a voltage divider (131) with a series circuit comprising a third resistor (R3) and a capacitor (C) and with a fourth resistor (R4), wherein the series circuit comprises the third resistor (R3) and the capacitor (C) is connected between the connection node (140) and the input node (K1) of the amplifier (110) and the fourth resistor (R4) is connected between an input node (K3) of the control device for receiving the desired signal (SS) and the connection node (140) 10. Control device according to claim 9, wherein the first resistor (Rl) of the amplifier (110) connected between the input node (Kl) of the amplifier (110) and the output node (K2) of the amplifier (110) and the third resistor (R3) of the processing unit (110) have identical resistance values, and / or the second resistor (R2) of the amplifier (110) and the fourth resistor (R4) of the processing unit (130) have identical resistance values.

11. Control device according to one of claims 1 to 10, wherein the control device (100) is configured to control a plurality N of actuators (200), wherein the respective actuator (200) is configured to actuate an optical element (310) associated with the actuator (200).

12. Control device according to claim 11, comprising: a plurality N (N > 2) of amplifiers (110A - 110Z), wherein each of the N amplifiers (110A - 110Z) is assigned to an actuator (200) and is configured to receive a provided supply voltage (V1) at an input node (K1) and to provide a control voltage (V2) for the assigned actuator (200) at an output node (K2), a single processing unit (130) configured to provide a single compensation signal (K) for the N amplifiers (110A- 110Z) for compensating for disturbances on the supply voltage (V1) as a function of the provided supply voltage (V1), and a plurality of N combination units (140A- 140Z), wherein each of the N combination units (140A 140Z) a respective amplifier (110A - 110Z) and is configured to link a desired signal (SS) for setting the control voltage (V2) of the associated amplifier (110A - 110Z) with the provided compensation signal (K) for providing the control voltage (V3) for the associated amplifier (110A - 110Z).

13. Control device according to one of claims 2 to 11, wherein the respective resistor (R1 - R4) is designed as an active resistor and / or the capacitor (C) is designed as an active capacitor.

14. Optical system (300) with a number of actuatable optical elements (310), wherein each of the actuatable optical elements (310) of the number is assigned an actuator (200), wherein each actuator (200) is assigned a control device (100) for controlling the actuator (200) according to one of claims 1 to 13.

15. Lithography system (1) with an optical system (300) according to claim 14.

Images