Photovoltaic modules and methods of making same

Abstract

A photovoltaic module includes a substrate structure having a dielectric layer and a patterned substrate conductor. First and second PV cells are provided over the substrate structure, which independently include i) a bottom electrode, ii) a photoactive layer overlaying the bottom electrode, and iii) a transparent top electrode overlaying the photoactive layer. A top via structure extends through the first PV cell and the dielectric layer to a first portion of the patterned substrate conductor and electrically connects the first portion of the patterned substrate conductor to the top electrode of the first PV cell. A bottom via structure extends through at least the dielectric layer to a second portion of the patterned substrate conductor, the second portion corresponding to the second PV cell, wherein the bottom via structure electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the second PV cell.

Description

[0001] PHOTOVOLTAIC MODULES AND METHODS OF MAKING SAME

[0002] CROSS-REFERENCE TO RELATED APPLICATIONS

[0003] This application claims priority to, and any other benefit of, U.S. Provisional Patent Application Serial No. 63 / 636,422 entitled PHOTOVOLTAIC MODULES AND METHODS OF MAKING SAME, filed April 19, 2024, and to U.S. Provisional Patent Application Serial No. 63 / 700,895 entitled PHOTOVOLTAIC MODULES AND METHODS OF MAKING SAME, filed September 30, 2024, the entire disclosures of which are fully incorporated by reference.

[0004] TECHNICAL FIELD

[0005] The present disclosure relates to photovoltaic modules, particularly those having one or more sets of photovoltaic cells connected in series, and to methods of making interconnections using via structures.

[0006] BACKGROUND

[0007] Since their first report in 2009, rapid improvements have enabled perovskite solar cells (PSCs) to become a promising technology for converting light to electricity as part of optoelectronic devices. To date, the power conversion efficiencies (PCEs) of solution-processed PSCs have been certified above 25 percent, which is higher than the current dominant photovoltaic technology based on multi -crystalline silicon. Whereas crystalline silicon is rigid, brittle, and requires costly, energy-intensive fabrication procedures, perovskites are flexible, easily processed at low temperatures, and up to a thousand times thinner. Furthermore, perovskites are solution- processable, which enables their manufacture with scalable, low-cost methods. These attributes open new opportunities to integrate solar power creatively and inexpensively into previously inaccessible markets, such as electric vehicles and buildings. PSCs also have the important advantage of maintaining acceptable PCE as the temperature increases, unlike silicon-based solar cells, which exhibit significant power loss in typical operating environments. The manufacturing and PCE advantages of PSCs have put them on the path to be the next generation technology for utility, commercial, and residential photovoltaic applications.

[0008] Commercial photovoltaic (PV) modules usually include a plurality of PV cells that are connected in series. Such series connection between cells is often referred to as the “interconnect”. In many cases, the PV module includes multiple sets of series-connected PV cells. In operation, the sets are typically connected in parallel and such a design can create a module that is more robust in operation, e.g., less sensitive to shadows or defective cells. Conventional interconnects are typically fabricated using a multi-scribe method using laser etching / ablation. Often three scribe steps are used to make an interconnect, commonly referred to as scribes Pl, P2, and P3 (“interconnect scribes”). The multiple sets of series-connected PV cells are typically made through another scribing step (often referred to in the art as a “P4 scribe”) that is generally orthogonal to the interconnect scribe direction. The P4 scribe isolates both the top and bottom electrodes by removing the entire device stack, and its function is to segment the device stack into one or more isolated “strings” of cells (sets of series-connected PV cells). The separate strings are later electrically connected in parallel to each other. The P4 scribes generally require less precision than conventional interconnect scribes.

[0009] While conventional scribing can be applied to flexible PV modules, e.g., those based on perovskite absorber layers, making the interconnects for flexible modules can be challenging. There are several drawbacks to the traditional 3 -scribe process. First, laser etching equipment can be very expensive. Along a manufacturing line three separate sets of laser equipment may be needed which is costly. Alternatively, structures may be returned to a common laser etcher after deposition of the absorber layer for P2 and again after deposition of the top electrode layer for P3. This can seriously impact manufacturing takt time which also adds cost. Further, the laser etching steps require careful alignment to make sure P2 is properly spaced from Pl and P3 is properly spaced from P2. The need for alignment and high precision can slow production, add cost, and introduce sources for defects.

[0010] In addition to the forgoing, the traditional 3 -scribe process may also result in a significant amount of “inactive area” width where the PV module does not produce electricity, thus reducing the areal power production of the module. Each laser etch step requires a certain level of manufacturing tolerance which limits how small this inactive area can be made. Typically, flexible modules cannot be held as flat as a plane of rigid glass which negatively impacts manufacturing tolerances for the interconnect scribes.

[0011] As another challenge, transparent electrodes (e.g., conductive metal oxides) typically have relatively high sheet resistance. Conventional interconnects formed using P1-P3 require current to flow from one end of a PV cell electrode to the other end adj acent to the next PV cell in series. Resistance can cause numerous problems including overall reduction in PCE. To improve conductivity, metal lines (e.g., made from silver) may be patterned in contact with the transparent conductive metal oxide. This can lower the effective sheet resistance, but the metal lines cause some efficiency loss by shading and add complexity to the manufacturing process. Despite research into various approaches, PVs based primarily on perovskites have yet to make a large market impact due at least in part to some of the unresolved problems noted above.

[0012] SUMMARY

[0013] There remains a desire for PSC devices that can be reliably manufactured at large scale at high speeds, at low cost, have high PCEs, and that can be made having large sizes or surface areas without unacceptable power loss.

[0014] In accordance with an embodiment of this disclosure, a photovoltaic module includes a substrate structure having a dielectric layer and a patterned substrate conductor provided in a plane beneath an upper surface of the dielectric layer. First and second PV cells are provided over the substrate structure, wherein each of the first and second PV cells independently include i) a bottom electrode, ii) a photoactive overlaying the bottom electrode, and iii) a transparent top electrode overlaying the photoactive layer. A top via structure extends through the first PV cell and the dielectric layer to a first portion of the patterned substrate conductor. The top via structure includes a top via conductor that electrically connects the first portion of the patterned substrate conductor to the top electrode of the first PV cell. The top via conductor is electrically isolated from the bottom electrode of the first PV cell. A bottom via structure extends through at least the dielectric layer to a second portion of the patterned substrate conductor, the second portion corresponding to the second PV cell. The bottom via structure includes a bottom via conductor that electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the second PV cell. The bottom via conductor is electrically isolated from the top electrode of the second PV cell.

[0015] In accordance with another embodiment, a PV module includes a substrate structure having a dielectric layer and a patterned substrate conductor provided in a plane beneath an upper surface of the dielectric layer. The patterned substrate conductor includes electrically isolated patterned substrate conductor elements including a first busbar, a second busbar, and a plurality of bridge conductors. The PV module further includes at least first and second sets of series-connected PV cells provided over the substrate structure. Each set includes a plurality of PV cells connected in series by a bridge conductor. The sets are connected in parallel at one end of the series by connection to the first busbar and at an opposite end of the series by connection to the second busbar. Each PV cell independently includes i) a bottom electrode, ii) a photoactive layer overlaying the bottom electrode, iii) a transparent top electrode overlaying the photoactive layer, iv) a top via structure extending through the PV cell and the dielectric layer to a first portion of the patterned substrate conductor, wherein the top via structure includes a top via conductor that electrically connects the first portion of the patterned substrate conductor to the top electrode of the PV cell, and wherein the top via conductor is electrically isolated from the bottom electrode and photoactive layer of the PV cell, and v) a bottom via structure extending through the PV cell and the dielectric layer to a second portion of the patterned substrate conductor, wherein the bottom via structure includes a bottom via conductor that electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the PV cell, and wherein the bottom via conductor is electrically isolated from the top electrode and photoactive layer of the PV cell.

[0016] In accordance with another embodiment, a method is provided for making a PV module having a plurality of sets of series-connected PV cells. The method includes forming a patterned conductive metal layer over a substrate, the patterned conductive metal layer corresponding to a patterned substrate conductor or a patterned substrate conductor precursor. A patterned dielectric layer is formed over the conductive metal layer, the patterned dielectric layer including bottom via tapered openings corresponding to bottom via contact areas. A bottom electrode layer is deposited over the patterned dielectric layer and into the bottom via tapered openings to make electrical contact between the bottom electrode layer and the underlying patterned conductive metal layer. A plurality of first top via scribes is formed, wherein each first top via scribe is formed by removing a portion of the bottom electrode layer along with a portion of the dielectric layer underneath the portion of the bottom electrode layer. A photoactive layer is next deposited over the structure, the photoactive layer including an absorber layer. A plurality of second top via scribes is formed in alignment with the first top via scribes, wherein each second top via scribe produces top via tapered openings extending to the underlying patterned conductive metal layer and corresponding to top via contact areas. A transparent top electrode layer is deposited over the structure and into the top via openings to make electrical contact between the transparent top electrode layer and the underlying patterned conductive metal layer. One or more first scribe structures and one or more second scribe structures are formed to produce two more sets of PV cells, each set including two or more PV cells, wherein adjacent cells in a set of PV cells are connected in series by a bridge conductor formed from the patterned conductive metal layer.

[0017] The present disclosure provides for PV modules and methods of their manufacture that may have one or more of the following advantages relative to conventional PV technology: improved manufacturing scalability, shorter manufacturing takt times, reduced manufacturing costs, simplified manufacturing processes; reduced manufacturing defects (higher yield); more reproducible manufacturing processes; reduced environmental impact; improved areal PCE; lower resistance electrodes; electrodes with higher optical transparency; increased physical durability or increased lifetime. BRIEF DESCRIPTION OF DRAWINGS

[0018] FIGS. 1A - ID arc various views of PV module according to some embodiments.

[0019] FIG. 2A is a top view illustrating a patterned substrate conductor provided over a substrate according to some embodiments.

[0020] FIG. 2B is a top view of a substrate structure.

[0021] FIG. 2C is a cross-sectional view of the substrate structure along cutline C-C of FIG. 2B.

[0022] FIGS. 2D - 2G are top views of some alternative patterns for the patterned substrate conductor.

[0023] FIG. 3 is a top view of a PV module at an intermediate stage of its fabrication.

[0024] FIG. 4 is a top view of the PV module at another intermediate stage of its fabrication, which may be referred to as a module precursor structure.

[0025] FIGS. 5 A - 5D are top views showing the fabrication of a top via structure according to some embodiments.

[0026] FIG. 5E is similar to FIG. 5C, but shows an alternative embodiment where the via hole is provided at a different location.

[0027] FIGS. 5F - 5H are top views showing the fabrication of a top via structure according to some other embodiments.

[0028] FIGS. 6 A - 6D are top views showing the fabrication of a bottom via structure according to some embodiments.

[0029] FIG. 6E illustrates an alternative embodiment where the bottom via structure does not use the patterned insulating material.

[0030] FIG. 7 is a cross-sectional view of another non-limiting example of a PV module according to some embodiments.

[0031] FIG. 8 A is a cross-sectional view of another non-limiting example of a substrate structure according to some embodiments.

[0032] FIG. 8B is a cross-sectional view of a portion of a PV module including a bottom via structure using the substrate structure from FIG. 8A.

[0033] FIG. 9 is a cross-sectional view of a non-limiting example of a perovskite PV structure according to some embodiments.

[0034] FIG. 10A is a cross-sectional view of non-limiting examples of metal lines according to some embodiments. FTG. 1 OB is a top view of a non-limiting example of a set of metal lines according to some embodiments.

[0035] FIG. IOC is a top view of a non-limiting example of a set of metal lines according to some other embodiments.

[0036] FIG. 11 is a flow diagram illustrating general steps for manufacturing a PV module according to some embodiments.

[0037] FIGS. 12A - 12M are cross-sectional views illustrating various non-limiting examples of top via structures and methods of their fabrication.

[0038] FIG. 13A is a top view of a non-limiting example of a patterned substrate conductor.

[0039] FIGS. 13B and 13C are top views of a non-limiting example of a portion of a PV module constructed from the patterned substrate conductor shown in FIG. 13 A.

[0040] FIG. 13D is a top view of a non-limiting example of a patterned substrate conductor.

[0041] FIGS. 14A - 14H are top views illustrating a non-limiting example of some general manufacturing steps that may be used to make a PV module

[0042] DETAILED DESCRIPTION

[0043] It is to be understood that the drawings are for purposes of illustrating the concepts of the disclosure and may not be to scale. Terms like “overlaying”, “over” or the like include, but do not necessarily require, direct contact (unless such direct contact is noted or clearly required for functionality). Additional details of certain features useful in certain embodiments of the present application may be found in U.S. Patent No. 11,108,007, U.S. Patent No. 11,342,130, U.S. Application Publication No. 2020 / 0377532, U.S. Application Publication No. 2022 / 0238866, PCT Application No. PCT / US2023 / 030527, PCT Application No. PCT / US2023 / 030576, PCT Application No. PCT / US2023 / 034120, PCT Application No. PCT / US2023 / 034146, PCT Application No. PCT / US2023 / 034137, and PCT Application No. PCT / US2023 / 078892, the entire contents of which are incorporated herein by reference for all uses.

[0044] A perovskite photovoltaic structure is intended to receive light (typically visible, IR, or UV light) and convert it into electricity. As such, various layers and features may need to be reasonably transparent to this light to ensure that an appropriate amount reaches the perovskite layer(s). Herein, unless otherwise noted, the terms “transparent”, “transparency”, “transmissivity” or the like, are generally relative to the target wavelength or wavelength range for conversion to electricity. This target wavelength or wavelength range may be different for different systems. In some embodiments, the target wavelength range may correspond to the solar radiation spectrum or a portion thereof. In some cases, the target wavelength range may correspond to the visible light spectrum or a portion thereof. In some cases, the target wavelength range may correspond to the infrared or UV spectrum, or a portion thereof. In some embodiments, the target wavelength range may be defined as a particular wavelength, e.g., 400 nm, 450 nm, 500 nm, 550 nm, 600 nm, 650 nm, 700 nm, or 750 nm, or any other wavelength of interest in the IR, visible, or UV portions of the spectrum intended for energy conversion. In some cases, a target wavelength range may be defined as an explicit range, e.g., 400 - 425 nm, 425 - 450 nm, 450 - 475 nm, 475 - 500 nm, 500 - 525 nm, 525 - 575 nm, 575 - 600 nm, 600 - 625 nm, 625 - 650 nm, 650 - 675 nm, 675 - 700 nm, 700 - 725 nm, 725 - 750 nm, or any combination of ranges thereof, or any other wavelength range of interest.

[0045] In some embodiments, something (e.g., a layer, a component, a structure, or the like) that is “transparent” transmits at least 50% of incident radiation within the target wavelength range, i.e., a transmittance (%T) of 50%>. Something that is considered light transmissive generally transmits at least 10% of incident radiation within the target wavelength range. Transmittivities in the range of 10% up to 50% may be considered partially transparent. A light-transmissive component, layer, or structure may be either transparent or partially transparent. A transmittance of less than 10% may generally be considered opaque.

[0046] Besides the light-absorbing properties of a layer, a component, a structure, or the like, its apparent transparency may in some cases be affected by refractive index mismatches, surface structures, or other factors that may result in reflective losses and / or light scattering. Another way to describe transparency is in terms of absorptance (%A). In some embodiments, something that is “transparent” may have an absorptance of 50% or less with respect to incident radiation within the target wavelength range. Something that is considered light transmissive may have an absorptance of 90% or less of incident radiation within the target wavelength range. Absorptances in a range of 50% up to 90% may be considered partially transparent. An absorptance of greater than 90% may generally be considered opaque.

[0047] FIGS. 1 A - ID are various views of a PV module according to some embodiments. In particular, FIG. 1 A is a top view of a PV module 100, FIG. IB is a cross-sectional view along cutline B-B from FIG. 1A, FIG. 1C is a cross-sectional view along cutline C-C of FIG. 1A, and FIG. ID is a cross-sectional view along cutline D-D of FIG. 1 A. For added perspective, XYZ coordinate axes arc also shown. The PV module may in some cases be based on a perovskite photovoltaic structure (where the photoactive layer includes a perovskite material absorber layer) but may alternatively be based on some other PV technology. For example, the photoactive layer may instead include an organic PV material absorbing layer, a CIGS (copper-indium-gallium- selenide) material absorbing layer, or a cadmium telluride material absorbing layer, optionally along with appropriate charge injecting layers and other materials suitable for these other systems.

[0048] PV module 100 may include two or more sets of PV cells (102-1, y and 102-2, y), such that each set is connected in series (102-x,l, 102-x,2, 102-x,3, and 102-x,4). For convenience, various cells may be referred to herein by their coordinates in the module using the nomenclature 102-x,y, where “x” represents the particular set of PV cells (i.e., which column) and “y” refers to which series position in the set (i.e., which row). This naming convention is completely arbitrary and nonlimiting. FIG. 1A illustrates two sets of series-connected PV cells, where each set includes four cells connected in series. Although only two sets are shown, the PV module may contain any number of such sets. Similarly, although four cells are shown connected in series for each set, there may be more or fewer such PV cells.

[0049] The PV cells are provided over substrate structure 170. Substrate structure 170 may in some cases include substrate 101, a patterned substrate conductor (including, for example, patterned substrate conductor elements 144, 140, 142), and an insulating layer 171. The patterned substrate conductor may be provided in a plane below insulating layer 171, in particular, below the general plane of the upper surface (away from the substrate) of the insulating layer 171.

[0050] Each PV cell may have a bottom electrode overlaying insulating layer 171, which insulating layer in some instances may also be referred to herein as a dielectric layer 171. The bottom electrode 162 may optionally be a composite electrode (as illustrated in FIGS. IB - ID) that includes a bottom (first) pattern of metal lines 103 on the dielectric layer 171 and a conducting layer 105 (e.g., a transparent conductive oxide) overlaying the metal lines and portions of the dielectric layer not covered by the metal lines. In FIGS. IB - ID, the cross-sections are such that the pattern of metal lines is not discerned, but this is discussed elsewhere herein. In some other embodiments, the bottom electrode may include a conducting layer without a pattern of metal lines. The bottom electrode may be transmissive or transparent to a target wavelength. In some alternative embodiments, the bottom electrode may instead be substantially opaque, e.g., the bottom electrode may include a metal layer (optionally a bilayer or multilayer stack of one or more metal sublayers and one or more conductive metal oxide sublayers) that may be continuous or alternatively patterned where the metal occupies more than about 90% of the electrode area.

[0051] A photoactive layer 106 is provided over the bottom electrode 162 and may include, e.g., a perovskite absorber layer. In some other cases, the photoactive layer may include an organic PV material absorber layer, a cadmium-telluride material absorber layer, or a CIGS (copper indium gallium selenide) material absorber layer. The photoactive layer may have a multilayer structure and include one or more carrier transport layers or other layers as described elsewhere herein, e.g., with respect to FIG. 9. In some embodiments, the photoactive layer may be 2 pm thick or less, alternatively 1 m thick or less. The PV stack may in some cases have a tandem structure that includes multiple absorber layers.

[0052] A transparent top electrode 166 overlays the photoactive layer. In some embodiments (as shown here), the transparent top electrode may be a composite electrode including a top conducting layer 107 over the photoactive layer 106 and a top (second) pattern of metal lines 109 provided on the conducting layer 107. As shown in FIG. 1 A, in some cases, the top pattern or set of metal lines 109 within a PV cell may include a plurality of lines in the “Y” axis direction, and in some cases, one or more lines provided in the “X” axis direction. In some cases, a single metal line may be provided at or near the geometric center of the PV cell to help collect current from the other metal lines. Composite electrodes and metal line patterns are discussed elsewhere herein. In some other embodiments, the top electrode may include a transparent conducting layer, e.g., a conductive metal oxide, without metal lines.

[0053] The PV cells in a series may be separated by a simple series scribe 132 (along the X-axis) that extends through the PV cell stack (i.e., through the top electrode, photoactive layer, and bottom electrode) to the dielectric layer 171. In some cases, the series scribe may extend partly or fully through the dielectric layer, but it should not cut through or functionally damage the patterned substrate conductor elements. Series scribe 132 may also be referred to herein as a first scribe structure. The different sets of PV cells may be separated by scribe 136 (along the Y-axis), which may be referred to as a P4 scribe, also extending through the PV cell stack. Scribe 136 may also be referred to herein as a second scribe structure. In some embodiments, the series scribe 132 and the P4 scribe 136 may have similar widths and may even be formed from similar or the same laser equipment. Unlike traditional P1-P3 interconnect scribes, series scribe 132 is relatively easy to make, docs not require high precision, and can be made on less expensive laser equipment.

[0054] At least a first PV cell includes a first via structure 151 that extends through the first PV cell and through the dielectric layer to a first portion of the patterned substrate conductor. The first via structure may also be referred to herein as a top via structure since it generally connects to a top electrode of a PV cell. There are a variety of ways for making a first via structure and the structure shown in FIG. IB is just one option. Some alternative methods and structures are discussed elsewhere herein. In some cases, the via hole used to make the top via structure may be formed, e.g., by laser etching / ablation. The top via structure 151 includes a top via conductor 153 that electrically connects the first portion of the patterned substrate conductor to the top electrode 166 of the first PV cell. In some embodiments, as described elsewhere, the top via conductor may include conductive material that is also used in the top electrode, and in some cases, may be formed in common step when depositing the top electrode. In some other embodiments, the top via conductor may include a different material or be provided in a separate step relative to the top electrode.

[0055] The top via conductor is electrically isolated from the bottom electrode 162 of the first PV cell and, optionally, may also be isolated from photoactive layer 106 (depending on the nature of the via structure and top via conductor material). In the present example, e.g., as shown in FIG. IB, both the bottom electrode and the photoactive layer are electrically isolated from the top via conductor by a patterned insulating material 152. In some cases, insulating material 152 may be provided by patterned printing, e.g., by inkjet, onto the sidewalls of the via hole prior to application of the top via conductor 153. In some cases, the top via conductor may be applied by patterned printing, e.g., by inkjet into the via hole and onto a portion of the top electrode. A portion of the patterned insulating material 152 provided on the top electrode 166 may optionally act as a wall or barrier to help contain conductive ink of the top via conductor. A portion of the patterned insulating material 152 may be used to prevent conductor 153 from coming in contact with the photoactive layer 106 to prevent interactions that may degrade either the photoactive layer 106 or the conductor 153. The conductive ink may include metal particles or a conductive carbon material or both. In some embodiments, at least some of the top via conductor is provided directly over at least one top electrode metal line 109 (if used). Although shown with vertical sidewalls, the top via structure / via hole may instead have tapered sidewalls. Top via structures are also discussed elsewhere herein. At least a second PV cell includes a second via structure 156 extending through the second PV cell and through the dielectric layer to a second portion of the patterned substrate conductor. The second via structure may also be referred to herein as a bottom via structure since it generally connects to a bottom electrode of a PV cell. There are a variety of ways for making a bottom via structure and the structure shown in FIG. IB is just one option. Some alternative methods and structures are discussed elsewhere. In some cases, the via hole used to make the bottom via structure may be formed, e.g., by laser etching / ablation. In some embodiments, the via hole may include an upper via hole portion that extends only through the top electrode and the photoactive layer to reveal the bottom electrode, and a lower via hole portion, narrower than the upper portion, that extends all the way through the insulating layer to the patterned substrate conductor. The bottom via structure 156 includes a bottom via conductor 158 that electrically connects the second portion of the patterned substrate conductor to the bottom electrode 162. In some embodiments, as described elsewhere, the bottom via conductor may include conductive material that is also used in the bottom electrode, and in some cases, may be formed in common step when depositing the bottom electrode. In some other embodiments, the bottom via conductor may include a different material or be provided in a separate step relative to the top electrode.

[0056] The bottom via conductor is electrically isolated from the top electrode 166 of the second PV cell and, optionally, isolated from photoactive layer 106 (depending on the nature of the via structure and bottom via conductor material). In the present example, e.g., as shown in FIG. IB, both the top electrode and the photoactive layer of the second PV cell are electrically isolated from the top via conductor 158, e.g., by a patterned insulating material 157. Alternatively a physical separation the bottom via conductor 1 8 may be pattern-deposited in a way that leaves a space between the photoactive layer and top electrode of the second PV cell and such space may later be fdled by a non-pattemed material, e.g., an encapsulation layer. In some cases, insulating material 157 may be provided by patterned printing, e.g., by inkjet, onto the sidewalls of the via hole prior to application of the bottom via conductor 158. In some cases, the bottom via conductor may be applied by patterned printing, e.g., by inkjet into the via. The conductive ink may include metal particles or a conductive carbon material or both. When the bottom electrode is a composite conductor, in some embodiments, at least some of the bottom via conductor is disposed directly over at least one bottom metal line 103. Although shown with vertical sidewalls, the top via structure / via hole may instead have tapered sidewalls. Bottom via structures are also discussed elsewhere herein.

[0057] Referring to FIG. IB, there is shown a series connection between a first PV cell 102-1,1 and a second PV cell 102-1,2. Here, the patterned substrate conductor element 144 is a bridge conductor where one end (first portion) connects to the top via structure 151 and the other end (second portion) connects to the bottom via structure 156. The top via conductor, the bridge conductor, and the bottom via conductor collectively form a series connection between the first and second PV cells.

[0058] As illustrated in FIG. 1A, each PV cell may include a top via structure and a bottom via structure. Although not shown in this embodiment, a PV cell may include multiple top via structures connected to a first portion of a patterned substrate conductor element and / or multiple bottom via structures connected to a second portion of the patterned substrate conductor element.

[0059] In some cases, rather than forming a cell-to-cell series connection, a via structure may connect to a conductive busbar that may be used to connect two or more sets of series-connected PV cells in parallel. Referring to FIGS. 1C and ID, there are shown two ends of such a set of series- connected PV cells. In FIG. 1C, a bottom via structure 156 connects to a first busbar 140. Note that the first busbar 140 may have an end portion 141 that is not covered which can be used to make further electrical contact. In some cases, bus tape or other electrical connectors may be applied over portion 141 to make a parallel connection between cells as shown in FIG. 1 A. Similarly, in FIG. ID, a top via structure 151 connects to a second busbar 142 that is electrically isolated from the first busbar. The second busbar may have an uncovered end portion 143 that can be used to make further electrical contact in a manner similar to end portion 141 of the first busbar 140. The busbars are each considered a type of patterned substrate conductor element. In some cases, a first PV cell may be adjacent to or overlaying the first busbar (a portion of the patterned substrate conductor) and connected to it, e.g., by a bottom via structure, and similarly, a last PV cell in the same series set may be adjacent to, or overlaying the second busbar (another portion of the patterned substrate conductor) and connected to it, e.g., by a top via structure.

[0060] FIG. 2A is a top view illustrating a patterned substrate conductor, including patterned substrate conductor elements 140, 142, 144 provided over a substrate 101 according to some embodiments. The patterned substrate conductor may include a first busbar 140, a second busbar 142, and one or more bridge conductors 144 for connecting adjacent cells in series. For example, and referring also to FIG. 1 A, bridge conductor 144-1,1 may connect PV cell 102-1,1 to PV cell 102-1,2, bridge conductor 144-1,2 may connect PV cell 102-1,2 to PV cell 102-1,3 and so forth. In some embodiments, the busbars may optionally have patterned extensions targeting areas for connection, e.g., extensions 140e-l and 140e-2 for busbar 140, and extensions 142e-l and 142e-2 for busbar 142. The design shown in FIG. 2A allows for the top and bottom via structures to both be provided near the center of a PV cell. This may in some cases provide advantages with respect to resistance and uniform current across the top and / or bottom electrodes. However, there is no particular limitation on the location within the PV cell of the via structures and they may optionally be closer to an edge than the middle. Various options for the design and layout of via structures and patterned substrate conductor elements are discussed elsewhere herein.

[0061] FIG. 2B is a top view of a non-limiting example of a substrate structure 170 now including insulating layer 171 applied over the patterned substrate conductor (140, 142, 144) and substrate 101. FIG. 2C is a cross-sectional view along cutline C-C of FIG. 2B. Suitable substrates 101 are discussed elsewhere herein. Although the substrate may in some cases be rigid, it preferably includes a flexible material such as PET or the like. The patterned substrate conductor elements may include any electrically conductive material. For example, the patterned substrate conductor elements may include a metal such as copper, silver, aluminum, or the like. Alternatively, the conductive material may include a conductive carbon material. The patterned substrate conductor elements may be printed from a conductive ink, e.g., by flexographic printing, inkjet printing, gravure printing, or some other printing technology. Alternatively, the patterned substrate conductor elements may be electroplated or pattern etched from a continuous layer of conductive material. In some embodiments, the patterned substrate conductor may be pattern-applied by vapor deposition through a shadow mask, e.g., aluminum onto PET. The patterned substrate conductor may include a multilayer stack of metals to impart various useful properties. For example, a thin metal layer (e.g., 0.5 - 10 nm) of chromium or molybdenum may assist a thicker primary conductive metal layer (e.g. copper) by promoting adhesion, providing corrosion resistance, or reducing ion migration into sensitive PV stack layers. In some case, the primary conductive metal layer is sandwiched between two thin metal layers. The conductive material of a busbar may be the same as or different than that of another busbar or of the bridge conductors. The patterned substrate conductor may in some cases be transparent or transmissive, but in order to achieve higher conductivity than the top or bottom electrodes, they are most commonly opaque (transmitting less than 10%) to target radiation. The patterned substrate conductor material may also be designed to be highly reflective, to scatter light back into the absorbing layer or to aid laser ablation processes such as top via formation.

[0062] The thickness (Z direction) of the patterned substrate conductor is not particularly limiting so long as the PV cell structure may be uniformly applied over the substrate structure. In some cases, the thickness of the patterned substrate conductor is 100 - 200 nm, 200 - 400 nm, 400 - 600 nm, 600 - 800 nm, 800 nm - 1.0 microns, 1.0 - 1.5 microns, 1.5 - 2.0 microns, 2 - 3 microns, 3 - 4 microns, 4 - 5 microns, 5 - 7 microns, 7 - 10 microns, 10 - 15 microns, 15 - 20 microns, or any combination of ranges thereof. In some cases, the thickness of insulating layer 171 relative to the patterned substrate conductor, especially bridge conductor 144, is in a range of 1 - 1 ,5x, 1.5 - 2x, 2

[0063] - 3x, 3 - 4x, 4 - 5x, 5 - 7x, 7 - lOx, 10 - 15x, 15 - 20x, or any combination of ranges thereof. In some cases, the thickness of one of patterned substrate conductor element may be different from another. For example, a bridge conductor may have a different thickness than a busbar or even another bridge conductor.

[0064] In some embodiments, substrate structure 170 may be well suited for bifacial PV modules that receive primary light from the top (through top electrode) and some light from the bottom (through the patterned substrate conductor and bottom electrode). In some embodiments for bifacial PV modules, the area of substrate 101 occupied by the patterned substrate conductor (140, 142, 144) is in a range of 1 - 2%, 2 - 3%, 3 - 5%, 5 - 7%, 7 - 10%, 10 - 15%, 15 - 20%, 20 - 30%, 30

[0065] - 40%, 40 - 50%, or any combination of ranges thereof. Such values may apply particularly to patterned substrate conductor elements that are substantially opaque. Alternatively, the occupied areas may be higher if the patterned substrate conductor elements are transparent or transmissive.

[0066] In some other embodiments, the substrate structure may be well suited for monofacial PV modules that are designed to receive light from the top (through the top electrode) and little or no light from the bottom, e.g., the overall transparency to target light from the back is less than 10% the transparency to target light from the top. Mono facial PV modules may in some cases use a substantially opaque substrate, a substantially opaque bottom electrode, or a substantially opaque patterned substrate conductor. In some cases, for monofacial PV modules, the area of the substrate occupied by the patterned substrate conductor is at least 50%, e.g., in a range of 50 - 60%, 60 - 70%, 70 - 80%, 80 - 90%, 90 - 95%, 95 - 99%, or any combination of ranges thereof.

[0067] Insulating layer 171 may include an electrically insulating (dielectric) polymeric material, an inorganic material (e.g., a glass, ceramic, or certain metal oxides), or a mixture. In some embodiments, the material of the dielectric layer has a resistivity of at least 105ohm-cm, or alternatively, at least IO10ohm-cm. In some embodiments, depending on the material, insulating layer 171 may, e.g., be extruded or coated from a fluid mixture. The insulating layer may in some cases be formed from a curable material, such as a UV-cured polymer or a thermally cured polymer. In some cases, insulating layer 171 may have a multilayer structure to tailor interfacial properties between it and the underlying substrate / patterned substrate conductor and the overlying bottom electrode of the PV cell structure. The surface of the insulating layer may also be modified to increase reflection back into the device, for example, using nanoimprinting methods to form nano- or micro- light trapping features (i.e. plasmonic or pyramidal). This may increase the total pathlength of light through the device, enabling high efficiencies or reduced absorber layer thickness and easier processability.

[0068] Insulating (dielectric) layer 171 may optionally be pattern applied (e.g., by printing) or patterned after application of a dielectric material layer (e.g., by laser ablation, photolithography, or the like). For example, it may be useful to pattern the dielectric layer so that it does not cover edge areas of the busbars. In some cases, insulating layer 171 may be formed from a photo-patternable material, e.g., a photopolymer that it may be coated, exposed with desired pattern, and chemically developed to form a desired pattern in the dielectric layer. In some embodiments, the insulating layer material may be selected or modified with dyes so that it absorbs radiation to aid in laser ablation, e.g., it may have functionally useful optical absorption at about 212 nm, 266 nm, 343 nm, 355 nm, 488 nm, 515 nm, 532 nm, 1030 nm, 1064 nm, or 1321 nm (or any other common laser wavelength). In some cases, the dielectric layer may absorb at least 10% of incident laser radiation at one or more of these wavelengths. Such laser radiation may, e.g., be used when forming the top vias, bottom vias, the first scribe structure, or second scribe structures. If the insulating layer is UV- curable, one may in some cases use a laser wavelength other than UV, since the dielectrics absorption properties in that range may vary with time, process, and formulation. If using a dye in the dielectric layer to improve laser ablation efficiency with a UV-cured dielectric layer, it may be desirable to use a dye having relatively low absorption in the UV-range (for example, with an absorption peak at 515 nm or in the infrared). This way, the laser absorption of the material can be liberally modified without concern for affecting the UV-cure depth or quality. If bifaciality is desired, the light absorption of the dielectric layer should also be selected for compatibility so that it does not absorb too much of the target radiation for photovoltaic energy conversion. As described elsewhere, in some embodiments, the insulating layer may be pattern applied to form a bottom via hole without the need for a laser ablation step.

[0069] The insulating (dielectric) layer may in some instances be applied in multiple coatings. For example, instead of applying a single 2 pm thick dielectric layer, two 1 pm layers (first and second dielectric sublayers) may instead be applied. Thin fluidic coatings may be susceptible to defects such as random voids that may produce shorts or other issues in the PV module that degrade performance or manufacturing yield. By coating multiple layers, the risks of voids may be substantially reduced since there is a lower probability that two such defects will overlap. In some cases, multiple thin layers may produce a more effective dielectric layer than a single coating of the same total thickness. That is, a single-step application may require a significantly higher thickness to meet the performance of multiple thin layers having a lower total thickness. Thinner dielectric layers have cost advantages and are generally better for laser ablation steps. In some cases, thinner dielectric layer may reduce the energy needed for ablation, e.g., during a via scribe step. Higher ablation energies, e.g., with thicker dielectric layers, may make it more difficult to avoid unwanted damage to underlying patterned conductive substrate elements, delamination of PV stack layers, and discontinuities along via sidewalls.

[0070] FIGS. 2D - 2G are top views of some alternative patterns for the patterned substrate conductor. In FIG. 2D, bridge conductors 144D are oriented approximately linearly and sequentially over substrate 101. Optional busbar extensions for busbars HOD and 142D are similarly part of the linear arrangement. In FIG. 2E, bridge conductors 144E are angled. In FIG. 2F, the bridge conductors 144F have a wider pad area at each end and a narrower connector between them. The optional busbar extensions may also have a wide pad area and a narrower connector leading to the main busbar. Embodiments shown in FIGS. 2 A - 2F are all suitable for bifacial PV module designs if so desired. FIG. 2G shows bridge conductors 144G that occupies most of the area of substrate 101. This arrangement is advantageous for monofacial PV modules where light is received only through the top electrode. The large size of the bridge conductors 144G and busbars 140G, 142G provide much more tolerance in aligning a via structure to the desired portion of the patterned substrate conductor. Further, since there is a greater area of material to conduct electricity, the resistance may be significantly lower than some of the other designs, and it potentially allows a much thinner conductive layer (e.g., a metal) to be used which may be less disruptive to the overall substrate structure flatness. FTG. 3 is a top view of a PV module at an intermediate stage of its fabrication. It shows a bottom electrode provided over substrate structure 170, c.g., from FIG. 2B. As mentioned, the bottom electrode 162 may optionally include a first / bottom pattern or set of metal lines 103 provided over the dielectric layer 171 and a conducting layer 105 provided over the metal lines and uncovered areas of dielectric layer 171. As described elsewhere, the metal lines of a composite conductor electrode can in some cases be printed from a metal ink, e.g., using flexography, gravure, screen printing, inkjet printing, etc. As illustrated, the pattern may be provided into separate patterns for each PV cell under construction. This avoids the need to laser ablate through metal lines when forming scribes 132 and 136. However, in some other embodiments (not shown here), the metal lines may include a continuous grid that is later patterned during the scribing steps. In other embodiments, there may be no metal grid and the bottom electrode may simply include a conductive layer of metal or conductive metal oxide, or a multilayer structure including both metal and a conductive metal oxide.

[0071] FIG. 4 is a top view of the PV module at another intermediate stage of its fabrication, which may be referred to herein as a module precursor structure 185. In particular, it shows the module after coating the photoactive layer and the top electrode 166 (optionally having conducting layer 107 and a top pattern of metal lines 109) over the bottom electrode shown in FIG. 3. The structure may be similar to FIG. 1A except that neither the scribes nor the via structures have yet been formed. As described elsewhere, the metal lines of a composite conductor electrode (if used) can in some cases be printed from a metal ink, e.g., using flexography, gravure, screen printing, inkjet printing, etc. As illustrated, the pattern may be provided into separate patterns for each PV cell under construction. This avoids the need to laser ablate through metal lines when forming scribes 132 and 136. However, in some other embodiments (not shown here), the metal lines may include a continuous grid that is later patterned during the scribing steps. Comparing FIG. 3 and 4, the metal patterns for the top and bottom electrodes may be different. For example, the bottom pattern of metal lines may include a higher density of lines than the top pattern of metal lines. As discussed elsewhere, in some cases, the bottom electrode metal lines may be shorter (in height) than the top electrode of metal lines, e.g., to ensure good coating of subsequent PV cell layers. In order to carry the desired amount of current, there may therefore need to be more metal lines in the bottom electrode. Further, in various embodiments herein, it is the top electrode that needs to be the most transparent for best power efficiency because the amount of light received from the top, which faces the sun, is much greater than the amount of light received from the bottom, which does not face the sun, and so they arc ideally spaced apart as far as possible without sacrificing overall conductivity. In certain embodiments, the top electrode metal lines can be made taller so each line can carry more current than the shorter lines of the bottom electrode.

[0072] FIGS. 5 A - 5D are top views showing the fabrication of a top via structure according to some embodiments. FIG. 5 A may be a zoomed-in portion from the structure of FIG. 4 illustrating the top electrode conducting layer 107 and top pattern of metal lines 109. In FIG. 5B, a via hole 150 has been formed through the PV cell layers, through the dielectric layer, and to a first portion of a bridge conductor 144. In FIG. 5C, patterned insulating material 152 has been applied to via hole sidewalls. In some cases (as shown), the pattern of insulating material may include a well structure 154 to contain conductive ink and prevent it from spreading too far from beyond the via structure area. The outer perimeter of the pattern may have a thicker deposit of the insulating material than the center line. FIG. 5D shows the finished top via structure 151 after deposition of the top via conductor 153. Top via structure 151 in this figure may correspond to the top via structures shown in FIGS. IB and ID. FIG. 5E is similar to FIG. 5C, but shows an alternative embodiment where the via hole was not provided through a metal line, but the well structure is positioned to ensure contact of via conductor material with a metal line 109. Although shown as rectangular, the via hole may be any shape. For example, a via hole may be any shape such as circular, oval, rectangular, triangular, pentagonal, hexagonal, polygonal, or irregular, and corners (if any) may be sharp or rounded. For efficient manufacturing purposes, a via formed by laser ablation may advantageously be formed by a single laser pulse (or pulse burst) and therefore will generally be circular. The profile of a laser- ablated via may be tuned using beam-shaping optics such as top hat or Bessel beam diffractive optical elements. These optics can modify the slope and continuity of the via sidewall, prevent delamination of target layers, and reduce undesirable damage to underlying structures, as well as reduce the laser energy required.

[0073] As viewed from the top (e.g., along the Z axis in the relevant figures), a via hole 150 may have a length, width, or diameter in a range of 5 - 10 pm, 10 - 20 pm, 20 - 40 pm, 40 - 60 pm, 60 - 80 pm, 80 - 100 pm, 100 - 120 pm, 120 - 150 pm, 150 - 200 pm, 200 - 300 pm, 300 - 500 pm, 500 - 700 pm, 700 - 1000 pm, or any combination of ranges thereof, or even greater than 1 mm in some cases. In some embodiments, via hole 150 may occupy an area in a range of 0.0004 - 0.001 mm2, 0.001 - 0.002 mm2, 0.002 - 0.005 mm2, 0.005 - 0.01 mm2, 0.01 - 0.02 mm2, 0.02 - 0.05 mm2, 0.05 - 0.1 mm2, 0.1 - 0.2 mm2, 0.2 - 0.5 mm2, 0.5 - 1 .0 mm2, or any combination of ranges thereof.

[0074] FIGS. 5F - 5H are top views showing the fabrication of a top via structure according to some other embodiments. Referring to FIG. 5F, a via hole 150 is provided that extends to bridge conductor 144. A ring scribe 138 is provided around a perimeter of via hole 150 which scribes through the PV cell layers, and like scribes 132 and 136, does not scribe down to the bridge conductor 144. In FIG. 5G, patterned insulating material is provided into the ring scribe and onto the top electrode to form a well structure 154 analogous to that of FIG. 5C. FIG 5H shows the finished top via structure 151H after deposition of the top via conductor 153. Although top via structure 151H may take an additional scribing step to make, there can be advantages with respect to ensuring that photoactive layer and bottom electrode are isolated from the top via conductor.

[0075] FIGS. 6A - 6D are top views showing the fabrication of a bottom via structure according to some embodiments. FIG. 6A may be a zoomed-in portion from the structure of FIG. 4 illustrating the top electrode conducting layer 107 and top pattern of metal lines 109. In FIG. 6B, an upper via hole 155 has been formed through the top electrode and the photoactive layer, but not through the bottom electrode 162 (optionally having a bottom pattern of metal lines 103 and bottom conducting layerl05). In FIG. 6C, a lower via hole 155’ is formed through the bottom electrode, through the dielectric layer, and to a second portion of bridge conductor 144. An optional patterned insulating material 157 may be provided along the sidewalls of the upper via hole 155 (either before or after forming the lower via hole 155’. FIG. 6D shows the finished bottom via structure 156 after deposition of the bottom via conductor 158. Bottom via structure 156 in this figure may correspond to the bottom via structures shown in FIGS. IB and 1C. In some embodiments, the upper via hole has a dimension that is at least as great as the spacing between the bottom electrode metal lines 103 (if used). This can reduce the need for high precision alignment since any such via will always allow contact between the via conductor and the metal line. In some embodiments, upper via hole 155 may have a length, width, or diameter in a range of 40 - 60 pm, 60 - 80 pm, 80 - 100 pm, 100 - 120 pm, 120 - 150 pm, 150 - 200 pm, 200 - 300 pm, 300 - 500 pm, 500 - 700 pm, 700 - 1000 pm, or any combination of ranges thereof, or even greater than 1 mm in some cases. In some embodiments, via hole 155 may occupy an area in a range of 0.001 - 0.002 mm2, 0.002 - 0.005 mm2, 0.005 - 0.01 mm2, 0.01 - 0.02 mm2, 0.02 - 0.05 mm2, 0.05 - 0.1 mm2, 0.1 - 0.2 mm2, 0.2 - 0.5 mm2, 0.5 - 1.0 mm2, 1.0 mm2- 1.5 mm2or any combination of ranges thereof. As viewed from the top, the lower via hole 155’ is generally smaller than the upper via hole with respect to length, width, or diameter, and may occupy an area that is, relative to the upper via hole 155, in a range of 1 - 2%, 2 - 5%, 5 - 10%, 10 - 20%, 20 - 30%, 30 - 50%, 50 - 70%, or 70 - 90%, or any combination of ranges thereof. The dimensions of lower via hole 155’ may in some embodiments be similar to that of via hole 150 for the top via structure.

[0076] FIG. 6E illustrates an alternative embodiment where bottom via structure 156E does not use the patterned insulating material 157, but instead includes via conductor 158E patterned with sufficient precision so that it does not touch the sidewalls of via hole 155.

[0077] In some cases, a laser etching system used for forming via holes may be in communication with a machine vision system to ensure alignment of via holes with the desired underlying patterned substrate conductor. A machine vision system may also be used to ensure alignment of via holes to a bottom pattern or top pattern of metal lines (if used). Due to the high density of vias that may in some cases be required over a large area, ultra-high speed scanners such as polygon scanners may be used with laser etching tools, instead of galvanometric scanners. Since the underlying substrate conductor may not be readily visible from the top, fiducial marks may optionally be added, e.g., near an edge of the substrate structure, that align with features of the patterned substrate conductor, the bottom pattern of metal lines, and or the top pattern of metal lines. In some cases, a machine vision system may be provided beneath the PV module during its fabrication to locate patterned substrate conductor areas. Eddy currents or other indirect methods of locating patterned substrate conductor areas may also be used.

[0078] Insulating material 152, 157 may in some cases be applied from an insulator ink applicator which may in part be housed in a processing station, optionally along with some or all of the laser etching equipment. Such processing station may further include sensors to ensure quality control, alignment, and proper application of insulating materials.

[0079] Some non-limiting examples of insulator inks and insulating materials may include polymers, ceramics, and graphitic materials. Some non-limiting examples of polymeric materials may include acrylics, epoxies, urethanes, silicones, polyamines, or polyimides. Some non-limiting examples of ceramic materials may include aluminum oxide, silicon dioxide, magnesium oxide, and titanium oxide. Some non-limiting examples of graphitic materials may include graphene oxide and carbon nitride. Additionally, such insulating materials may be dyed or selected to absorb light over a specific wavelength range, in order to facilitate via formation by laser ablation. Although described as formed from patterned deposition of a fluid material, which has highspeed manufacturing benefits, the patterned insulating materials may in some eases be formed using alternative methods such as vapor deposition of an appropriately insulating material, e.g., through a shadow mask. Alternatively, an insulating precursor material (a type of insulator ink) may be itself photo-pattemable so that it may be generally coated, exposed with desired pattern, and chemically developed, to form the patterned insulating materials.

[0080] In some embodiments the via conductors may be formed from a conductive ink which may be deposited from a conductive ink applicator. In some cases, the ink applicator may be an inkjet device, but other applicators may be used such as a screen printing, syringe, an extruder, or some other appropriate device capable of patterned deposition. The conductive ink may be dried, cured, sintered, or some combination. Drying may be used to remove solvents and may include heating (e.g., in an oven, contact with a hot gas (air or inert), exposure to infrared radiation, use of a flashlamp, or the like) optionally at reduced pressure. Curing may initiate a chemical reaction that causes the conductive ink to become more solid, e.g., polymerization, cross-linking, or the like. In some cases, curing includes exposure to UV radiation, but may alternatively or in combination, include a heating step, e.g., in an oven, contact with a hot gas (air or inert), or exposure to infrared radiation. In many cases, the deposited conductive ink may include a sintering step which is also a type of heating step that may improve the conductivity of the electrically conductive connector material, particularly those formed from metal-containing conductive inks. In some cases, a flashlamp, a laser, an infrared source, or some other photonic device may be used to induce sintering (or drying or curing).

[0081] Although described as formed from patterned deposition of a fluid material, which has highspeed manufacturing benefits, the via conductor may in some cases be formed using alternative methods such as vapor deposition of an appropriately conducting material, e.g., through a patterned shadow mask.

[0082] Although various figures herein show the via conductor filling the via, the via conductor may instead be applied along sidewalls of the via hole and not necessarily fill the entire space. This may save on the amount of conductive ink used for the via conductor, which may have cost and manufacturing process benefits. As also discussed elsewhere herein, the top or bottom via conductors may in some cases be formed in a common step when forming the respective top or bottom electrodes. In some embodiments, the patterned substrate conductor may be on the opposite side of the substrate. FIG. 7 is a cross-scctional view of another non-limiting example of a PV module 700 according to some embodiments. The embodiment is analogous to the view shown in FIG. IB, but with a few differences. For convenience, many of the part numbers used in FIGS. IB are reused here. In FIG. 7, one or more patterned substrate conductor elements (in this case, bridge conductor 744) are provided on an opposite side (second side or second surface) of substrate 101, whereas the PV cell stack (layers 103 - 109) is provided on the first side or first surface of substrate 101. The substrate structure 770 in FIG. 7 does not require a separate insulating layer 171 since substrate 101 acts as the insulating or dielectric layer separating the PV cell structure from the patterned substrate conductor. The top via structure 751 and bottom via structure 756 may be similar to those discussed with respect to FIGS. 1 A - ID, 5A - 5H, and 6A - 6E, with the primary difference being that the respective via structures and via conductors extend through substrate 101 to contact the patterned substrate conductor on the second side. Note that top via structure 751 shown in FIG. 7 may be similar to that shown in FIG. 5H. Such vias through the substrate may be made by laser etching, by physical drilling, a hole punch, or some other method. Providing the patterned substrate conductor on the second side of the substrate provides some system advantages. For example, diodes may be more easily integrated if the busbars are on the second side. Further, the active PV area on the first side can extend further to the edge of the first side of the substrate since there is no need to save room for the busbars which are on the second side.

[0083] In some embodiments, laser ablating through a PV cell stack to form a bottom via structure may not be necessary, and instead, a patterned dielectric (insulating) layer may be used. FIG. 8A is a cross-sectional view of another non-limiting example of a substrate structure 870 according to some embodiments. Substrate structure 870 may include a patterned substrate conductor element 844 (e.g., a bridge conductor, but alternatively a busbar) provided on a surface of substrate 801. In some embodiments, the edge of the patterned substrate conductor element 844 may be rounded or tapered and characterized by a conductor element taper angle 0ce, e.g., as measured relative to the plane of the substrate 801 surface. The presence of a taper may improve the coating characteristics of the overlaying dielectric layer 871. Any of the embodiments of patterned substrate conductors described herein may optionally have a conductor element taper. In some embodiments, the conductor element taper angle 0cemay be less than about 70°, alternatively, less than 60°, or less than 45°. In some cases, taper angle 0ceis in a range of 10° - 20°, 20° - 30°, 30° - 40°, 40° - 50°, 50° - 60°, or any combination of ranges thereof.

[0084] Substrate structure 870 further includes a patterned dielectric layer 871 (which may also be referred to as a patterned insulating layer 871) provided over the substrate and the patterned substrate conductor. Patterned dielectric layer 871 may include a rounded or tapered opening 855 that exposes a contact area of the underlying patterned substrate conductor element 844 (e.g., a bridge conductor). The tapered opening of the patterned dielectric layer for a bottom via structure may be characterized by a bottom via dielectric taper angle 0db, e.g., measured relative to the plane of the upper surface of patterned substrate conductor element 844. The presence of a taper may improve the coating characteristics of the overlaying PV cell layers as shown in FIG. 8B. In some embodiments, the bottom via dielectric taper angle 0db may be less than about 70°, alternatively, less than 60°, or less than 45°. In some cases, taper angle 0db is in a range of 10° - 20°, 20° - 30°, 30° - 40°, 40° - 50°, 50° - 60°, or any combination of ranges thereof. The patterned dielectric layer 871 may be formed from a photopolymer, by photolithography, or by patterned printing, e.g., by screen printing, inkjet, or the like. Alternatively, the pattern in the dielectric layer 871 may be formed by removing a portion of the dielectric layer with a laser. A subsequent heat treatment may optionally occur at a later stage in order to modify the via sidewall, such as softening the dielectric or stack layers to reduce undercutting and create a continuous slope down to the substrate conductor element.

[0085] As shown in FIG. 8B, the bottom electrode 862, photoactive layer 806, and top electrode 866 may be applied over the substrate structure 870 of FIG. 8 A. In this embodiment, the bottom electrode 862 makes direct contact to the exposed contact area of the patterned substrate conductor element 844, i.e., the bottom electrode acts as the bottom via conductor to form bottom via structure 856. The taper or rounded edge in the patterned dielectric ensures that these PV cell layers remain continuous throughout this section. The bottom via structure of FIG. 8B may in some cases be simpler and less expensive to manufacture than the process illustrated, for example, in FIGS. 6A - 6E, e.g., fewer steps, no need for laser ablation, no need for patterned metal deposition, and the like. Further, the bottom via structure of FIG. 8B does not create any PV cell dead zone with respect to light coming through top transparent electrode 866. Also, the conductive materials of the bottom electrode are designed to be highly compatible with the PV cell whereas metal inks (especially silver) can sometimes migrate over time and cause performance degradation. The bottom electrode 862 may be selected to be transparent, transmissive, or opaque. In some non-limiting examples, it may be a composite conductor (a bottom pattern of metal lines in contact with a conductive metal oxide), a simple conductive metal oxide without metal lines, a metal layer, or a multilayer structure of metal layer and metal oxide layer. Materials and methods for electrodes are discussed elsewhere herein.

[0086] In some embodiments, the top via structure may be made in a manner that utilizes the top electrode as the top via conductor rather than a separately applied metal ink. FIG. 12A is a cross- sectional view of a non-limiting example of a starting structure 881 for such fabrication. The starting structure 881 may include substrate structure 870 (including substrate 801, patterned substrate conductor element 844 (e.g., a bridge conductor or a busbar that may optionally be tapered at its edge) provided on the substrate, and dielectric layer 871 provided over the substrate and patterned substrate conductor element. The bottom electrode 862 is also provided over the top of dielectric layer 871. In FIG. 12B, a first tapered opening 850’ is formed in the dielectric layer / bottom electrode (e.g., by laser ablation / etching) that exposes an area of the underlying patterned substrate conductor element 844 and forms intermediate structure 882. The dielectric layer at the opening 850’ may be characterized by a top via dielectric taper angle 0dt, e.g., as measured relative to the plane of the top surface of patterned substrate conductor element 844. The presence of a taper may improve the coating or deposition characteristics (e.g., continuity) of the overlaying PV cell layers, e.g., ensuring continuity. In some embodiments, the top via dielectric taper angle 0dt may be less than about 70°, alternatively, less than 60°, or less than 45°. In some cases, taper angle 0dt is in a range of 10° - 20°, 20° - 30°, 30° - 40°, 40° - 50°, 50° - 60°, or any combination of ranges thereof.

[0087] Next, as shown in FIG. 12C, a photoactive layer 806 is coated over intermediate structure 882 to form intermediate structure 883. The photoactive layer 806 optionally includes an interfacial layer 812 interposed between the bottom electrode 862 and the other layers of photoactive layer 806. As described elsewhere herein, there are numerous potential uses for interfacial layers. Here, one particular use may be to cover the exposed edge of bottom electrode 862. In some embodiments, the bottom electrode may include a metal layer, or a set metal lines, e.g., made of copper or silver. The interfacial layer 812 may act as a barrier layer to reduce diffusion of the metal into the rest of the photoactive layer 806. In some non-limiting examples, the interfacial layer may include a metal oxide such as a titanium oxide, an aluminum oxide, a tin oxide, a zinc oxide, an indium oxide, a nickel oxide, ITO, AZO, or the like, optionally formed by atomic layer deposition. In some other non-limiting examples, the intcrfacial layer may include graphene, graphene oxide, reduced graphene oxide, or a polymer. In some cases (not shown), the photoactive layer may optionally include a protective interfacial layer at its upper surface that may help protect the surface from subsequent processing steps, such as laser ablation / etching. Although not illustrated, a top electrode layer may optionally be provided over the photoactive layer 806 so long as it permits patterned removal as described in FIG. 12D.

[0088] In FIG. 12D, a portion of the photoactive layer including interfacial layer 812 (and any optional top electrode or upper interfacial layer) is removed, e.g., by laser ablation / etching, in the area of the tapered dielectric opening to expose a contact area 850 of the patterned substrate conductor element, thereby forming intermediate structure 884. Although shown as approximately the same in size, contact area 850 may be different than opening 850’. The patterned removal of the photoactive layer 806 forms a tapered photoactive layer opening characterized by a photoactive layer taper angle 9pt. The photoactive layer taper angle 0pt(e.g., as measured from the plane of the patterned substrate conductor element 844) may be less than about 70°, alternatively, less than 60°, or less than 45°. In some cases, taper angle 0ptis in a range of 10° - 20°, 20° - 30°, 30° - 40°, 40° - 50°, 50° - 60°, or any combination of ranges thereof. As shown in FIG. 12D, taper angle 0pt is larger than taper angle 0dt, but in other embodiments, it may be about the same or even smaller, e.g., when contact area 850 is smaller than area 850’.

[0089] Some other non-limiting examples of intermediate structure 884 are illustrated in FIG. 12F (intermediate structure 884f, contact area 850f) and FIG. 12G (intermediate structure 884g, contact area 850g). For intermediate structure 884f, the photoactive layer 806 is only partially removed over opening 850’ (some of photoactive layer 806 still covers the patterned substrate conductor element 844) and contact area 850f is smaller than opening 850’. For intermediate structure 884g, the photoactive layer 806 is removed from both the opening 850’ and also partway up the sidewalls of the taper of dielectric layer 871. An advantage of intermediate structure 884g relative to 884f is that none of the photoactive layer 806 is in direct contact with the substrate conductor element 844. This can reduce potentially harmful metal migration from the substrate conductor element into the photoactive layer. That is, in some embodiments, the photoactive layer or absorber layer does not contact the patterned substrate conductor element (although the presence of the optional interfacial layer 812 may help reduce such metal migration or the like). A non-limiting method for making intermediate structure 884g is shown briefly in FIGS. 12L and 12M. Structure 881Z in FIG. 12L includes an opening 865 / that may be formed from structure 881 (FIG. 12 A) by patterned removal of the bottom electrode 862 and some of dielectric layer 871, e.g., by laser ablation. This may be referred to as first top via scribe step. Next a photoactive layer 806 (including interfacial layer 812) is applied over structure 881 / to form structure 883m. A second top via scribe step may be used on this structure to form intermediate structure 884g shown in FIG. 12G.

[0090] Numerous other intermediate structures corresponding to 884 can be envisioned. For all embodiments, it is particularly important to ensure that the bottom electrode 862, including at its edge, remains covered with photoactive layer 806 (which may optionally include interfacial layer 812).

[0091] Turning to FIG. 12E, a transparent top electrode 866 is next deposited onto intermediate structure 884. In some non-limiting examples, the transparent top electrode may be a composite conductor (e.g., having a top pattern of metal lines in contact with a metal oxide conducting layer), a layer of conductive metal oxide (without metal), or a multilayer structure of a thin metal layer and conductive metal oxide. Materials and methods for electrodes are discussed elsewhere herein. The top electrode extends down the taper of the photoactive layer 806 to contact area 850 of patterned substrate conductor element 844 thereby forming top via structure 851 where the top electrode acts as the top via conductor. The method shown in FIGS. 12A - 12G (as well as in FIGS. 12H - 12K below) may have manufacturing throughput and cost advantages, e.g., by eliminating the need for patterning a top via conductor, e.g., by a metal ink. Also, the conductive materials of the top electrode are designed to be highly compatible with the PV cell whereas metal inks (especially silver) can sometimes migrate over time and cause performance degradation. While still creating some dead zone (e.g., approximately corresponding to the bracket used to label top via structure 851 in FIG. 12E), the inactive area may be less than some other top via structures.

[0092] FIGS. 12H - 12K are cross-sectional views illustrating another embodiment for making top via structures that utilize the top electrode as the top via conductor. FIG. 12H is similar to FIG. 12A, except that the bottom electrode 862h has been patterned to include areas or openings 865 where there is no bottom electrode over the dielectric layer to form structure 881h. The pattern can be made by pattern printing bottom electrode 862h or by patterned removal of the bottom electrode to form electrode opening 865. Next, as shown in FIG. 121, a photoactive layer 806 (in this case including optional intcrfacial layer 812) is coated over structure 881h to form intermediate structure 883i. In FIG. 12J, both the photoactive layer and the dielectric layer are removed (e.g., by laser ablation / etching) in alignment with bottom electrode opening 865 to form a tapered opening and expose contact area 850j of the patterned substrate conductor element, thereby forming intermediate structure 884j. Note that the removal is such that the edge of bottom electrode remains covered with photoactive layer 806 (including interfacial layer 812) A taper angle 0db (e.g., as measured from the plane of the patterned substrate conductor element 844) may be less than about 70°, alternatively, less than 60°, or less than 45°. In some cases, taper angle 0db is in a range of 10° - 20°, 20° - 30°, 30° - 40°, 40° - 50°, 50° - 60°, or any combination of ranges thereof.

[0093] Turning to FIG. 12K, a transparent top electrode 866 is next deposited onto intermediate structure 884j. The top electrode extends down the taper of the photoactive layer 806 and dielectric layer 871 to contact area 850j of patterned substrate conductor element 844 thereby forming top via structure 851k where the top electrode acts as the top via conductor. The photoactive layer 806 advantageously does not contact the patterned substrate conductor element 144 in the present embodiment.

[0094] In some cases, a PV module may use bottom via structures where the bottom via conductor includes the bottom electrode (e.g., as described in FIGS. 8A - 8B) in combination with top via structures where the top via conductor includes the top electrode (e.g., as described in FIGS. 12A - 12K).

[0095] When a monofacial PV module is desired, the patterned substrate conductor elements may be substantially opaque and occupy a significant area, such as that shown in FIG. 2G. An advantage of such a system is that the patterned substrate conductor elements may have lower resistance than transparent or smaller area embodiments. It may also be used to improve manufacturing tolerances and simplify the design. For example, FIG. 13A is a top view showing a portion of a substrate 1301 with a patterned substrate conductor provided thereon, including a plurality of substrate conductor elements 1344 (e.g., bridge conductors). The patterned substrate conductor elements may optionally be made from copper, aluminum, or some other conductive metal.

[0096] FIG. 13B is a top view showing a non-limiting example of a portion of a PV module constructed from the patterned substrate conductor shown in FIG. 13 A. PV module 1300 may include two or more sets of PV cells (1302-1, y, 1302-2 ,y ...etc.), such that the cells of each set are connected in series (1302-x,l, 1302-x,2...etc.). For convenience, only a few cells are labeled. The PV cells may be separated by a first scribe structures 1332 and a second scribe structure 1336, as described elsewhere. In FIG. 13B, the patterned substrate conductor elements 1344 are underneath the dielectric layer (not labeled here) and not visible, but their positions are noted by dotted lines. In this example, each PV cell includes a plurality of top via structures 1352 extending to a portion of a patterned substrate conductor element. The top via structures may be as described, e.g., with respect to FIGS. 12A - 12K. The top transparent electrode 1366 here may include a conductive metal oxide without metal lines. Although a composite conductor could alternatively be used, there are manufacturing advantages to using just the conductive metal oxide (cost, speed, simplicity).

[0097] Without metal lines, the top electrode may have a higher resistance, but this can be compensated by using a plurality of top via structures for each PV cell. The shape of the PV cells is not particularly limiting, but there can be some advantages to having an oblong shape, e.g., long thin rectangles or other shapes having a length to width aspect ratio of at least 2:1, alternatively at least 3:1. These are oriented in the Y direction but could instead be oriented in the X direction. The oblong shape can reduce dead zone aperture loss and power loss in the top transparent conductive oxide electrode, and may also be easily compatible with a scanning laser that may be used for ablation. The very large area of the patterned substrate conductor elements also provides very high manufacturing tolerances for patterning the top via structures, i.e., alignment is much simpler than when the bridge conductor is small in area.

[0098] In the present example, each PV cell includes a single bottom via structure 1356 provided as a line in the X-direction. The bottom via structure may be as described, e.g., in FIGS. 8A and 8B. Since there is no dead zone with this type of bottom via structure, it may have a relatively high area. Using a long rectangle across the cell can be simple to manufacture, e.g., when patterning the dielectric layer.

[0099] FIG. 13C is a top view of another non-limiting example of a portion of a PV module constructed from the patterned substate conductor shown in FIG. 13 A. PV module 1300c is similar to PV module 1300 except here there is a plurality of bottom via structures 1356c in each PV cell. Also, the top via structures have an oblong shape now aligned to the X-axis.

[0100] FIGS. 13A - 13C show just a few non-limiting examples of how a monofacial PV module may be constructed. Note that if some bifacial performance is desired one can still make a PV module similar to 1300, but as shown in FIG. 13D, using comb shaped patterned substrate conductor elements 1344d. Alternatively, the patterned substrate conductor of FTG. 13A can be used in a bifacial configuration if the patterned substrate conductor elements 1344 arc transparent or transmissive.

[0101] FIGS. 14A - 14H are top views illustrating a non-limiting example of some general manufacturing steps that may be used to make a PV module, e.g., one similar to PV module 1300 shown in FIG. 13B. For clarity, these figures simply show a portion of the photovoltaic structure during the build and only a few parts are labeled since the features have been discussed in detail elsewhere. In some cases, some or all of the manufacturing steps may involve roll-to-roll process where the substrate is provided as part of a web that may be moving along the X-axis from station to station. In some cases, the web may move at a speed of at least 2 m / min, alternatively at least 5 m / min, for one or more steps.

[0102] Referring to FIG. 14A, in step 1401, a patterned substrate conductor precursor is formed including a pattern of metal stripes 1344’ (a patterned conductive metal layer) provided over the surface of a substrate 1301. For example, the metal stripes 1344’ may be precursors of bridge conductors that are formed in a final scribing step (see FIG. 14H). In some non-limiting examples, the metal stripes may include aluminum or copper. The stripes may be directly deposited, e.g., by a vacuum deposition process through a shadow mask having features corresponding to the spaces between stripes. Alternatively, a metal layer may be deposited over the substrate and then the stripes formed by removal of metal, e.g., by laser scribing, chemical etching, or the like. In an alternative embodiment, the patterned substrate conductor elements are formed in step 1401 (rather than a precursor) using methods described herein, e.g., to form a pattern similar to that of FIG. 13A or FIG. 2G.

[0103] Referring to FIG. 14B, in step 1402, a patterned dielectric layer 1371 is formed over the patterned substrate conductor precursor and substrate having tapered openings or channels 1355 that reveal underlying metal stripes 1344’ and will be used to form the bottom via structures. That is, the tapered openings correspond to bottom via contact areas. In some cases, the patterned dielectric 1371 is formed by a printing method.

[0104] Referring to FIG. 14C, in step 1403, the bottom electrode 1362 is deposited over the patterned dielectric layer and into the channels where electrical contact is made with the underlying metal stripes 1344’. In some embodiments, 1362 is formed by first depositing a layer of copper metal followed by depositing a layer of a conductive metal oxide such as ITO or the like. Referring to FIG. 14D, in step 1404, a first top via scribe 1365 is formed that removes a portion of the bottom electrode material and a portion of the underlying dielectric layer. In some cases, the first top via scribe may be as described in FIG. 12L (part 865Z).

[0105] Referring to FIG. 14E, in step 1405, the photoactive layer 1306 is provided over the structure of FIG. 14D. Although not illustrated, the photoactive layer 1306 may include an interfacial layer disposed between the structure of FIG. 14D and the other layers of the photoactive layer. After step 1405, a portion of the structure may in some cases have a cross section similar to that shown in FIG. 12M (part 883m).

[0106] Referring to FIG. 14F, in step 1406, second top via scribes are formed in alignment with the earlier first top via scribes to produce tapered openings 1350 extending to the underlying metal stripes. After step 1406, a portion of the structure may in some cases have a cross section similar to that shown in FIG. 12G (part 884g).

[0107] Referring to FIG. 14G, in step 1407, the top transparent conductor 1366 is deposited over the photoactive layer and into the openings (1350 of FIG. 14F) so that electrical contact is made between the top transparent conductor 1366 and the underlying metal stripes thereby establishing the top via structures.

[0108] Referring to FIG. 14H, in step 1408, first scribe structures 1332 and second scribe structures 1336 are formed. The second scribe structures 1336 cut all the way through the metal stripes thereby electrically separating them into the patterned substrate conductor elements, e.g., bridge conductors. As described elsewhere herein, the first scribe structures extend only through the PV stack, and optionally into the dielectric layer, but do not cut through the underlying metal stripes (at least not all the way).

[0109] A first scribe structure, e.g., 132 or 1332, may have a width (measured along the Y-axis) that is the same as or different from the width of the second scribe structure (136 or 1336) (measured along the X-axis). The width of each scribe structure may be independently selected and may in some embodiments be in a range (which may be measured as minimum, maximum, or an average) of 5 - 10 gm, 10 - 20 gm, 20 - 40 gm, 40 - 60 gm, 60 - 80 gm, 80 - 100 gm, 100 - 120 pm, 120 - 150 pm, 150 - 200 pm, or any combination of ranges thereof. In some preferred embodiments, a scribe structure has a width that is less than 60 pm, alternatively less than 40 pm. The width of a scribe structure may vary across the module. In some embodiments, the spacing between second scribe structures (e.g., when a PV module has 3 or more sets of series-connected PV cells) may be wider than the spacing between first scribe structures. In some cases, the spacing between first scribe structures may be in a range of 0.3 - 1 cm, 1 - 2 cm, 2 - 3 cm, 3 - 4 cm, 4 - 5 cm, or any combination of ranges thereof, or even higher than 5 cm. In some preferred cases, the spacing between first scribe structures may be in a range of 0.5 - 1.7 cm. In some embodiments, the spacing between second scribe structures 136 may be in a range of 1 - 2 cm, 2 - 4 cm, 4 - 6 cm, 8 - 10 cm, 10 - 12 cm, 12 - 15 cm, 15 - 20 cm, 20 - 40 cm, any combination of ranges thereof, or even higher than 40 cm. In some preferred cases, the spacing between second scribe structures may be in a range of 2 - 5 cm.

[0110] Laser ablation (also referred to herein as laser etching) can be carried using various laser etch tools. The dimensions and depths of a via or scribe can be controlled by the properties of the laser. Some of the controllable properties of laser radiation may include wavelength, beam width, beam shape, beam focus, power, pulse profile / width, position, movement, and the like.

[0111] Any or all of the laser etching steps may optionally be performed under an inert atmosphere and / or in combination with an evacuation stream to carry away any potential debris. The laser radiation may be in the form of a spot or line that moves across the substrate. For example, the laser source may be on a moveable arm or the beam may be coupled to redirection optics (mirrors, lenses or the like) to reposition the laser radiation impingement. Depending on the power and other properties of the laser source, laser radiation may be applied to multiple areas concurrently.

[0112] The lasers may in part be housed in one or more processing stations. In some cases, the first and second scribe structures and / or via holes may be formed in a common processing station. In other cases, there may be multiple laser processing stations. Such processing station(s) may further include sensors to ensure quality control, alignment, and proper production of the scribe structure.

[0113] Laser scribes and via holes may be formed by directing a laser beam through a series of optics to achieve the desired focused spot size, thus creating the desired scribe / via width and depth. For example, the raw beam out of the laser may be passed through a collimating beam expander that may be set to a predetermined magnification in order to select the input beam size incident on the focusing optic. Selecting a smaller input beam size can result in a wider focused spot, and thus a wider scribe. The focusing optic (such as a plano-convex lens) may also be selected to have a specific focal length in order to achieve a target focused spot width. The focal window for these scribe processes is related to the Rayleigh length, which also improves with increasing focused spot size, resulting in a more robust and manufacturable process.

[0114] A scribe structure (first or second) may be composed of one or more scribes of various widths; however, there are multiple considerations to make when choosing a particular structure. Via holes have similar options and considerations and may include multiple etch steps. Laser etch dimensions and other properties may be driven by the printer accuracy, repeatability, and wetting characteristics of the layers and printer inks to be applied after etching. A wider scribe or via width may result in a wider process window, but this may result in a larger inactive area, so these factors should be considered in balance. Manufacturability may also be considered when selecting scribe or via width. A larger scribe or via width likely requires higher laser energy or power for a given source, and this could be limited by laser cost and the number of split beam paths used in a manufacturing tool.

[0115] Laser sources may include, but are not limited to, all permutations of nanosecond, picosecond and femtosecond pulse widths, with wavelengths in the UV, visible, NIR or IR ranges. For example, a pulsed green laser source (e.g., with a wavelength of 532 nm) may be used to selectively ablate the layers above a bottom transparent electrode without damaging the transparent bottom electrode, as it is absorbed strongly by the absorber layers, but not the transparent bottom electrode. The required pulse energy and pulse-to-pulse overlap will vary depending on the pulse width, pulse shape, beam incidence, spot size and shape, as well as the composition and thickness of the various layers of the PV cells.

[0116] In some cases when removal of the bottom electrode is desired, an IR source (e.g., at a wavelength of 1064 nm) may be used as it may be absorbed significantly by a bottom transparent conducting layer. The required pulse energy and pulse-to-pulse overlap will vary depending on the pulse width, pulse shape, spot size and shape, and also the composition and thickness of the various layers, as well as the substrate itself.

[0117] Given the right parameters (pulse width, pulse energy, pulse overlap, spot size, etc.) any of these lasers may be a suitable source to form any portion or the whole of a scribe or via structure. Perovskite PV structure

[0118] Although various PV technologies may be used, in some embodiments, the PV stack is based on a perovskite absorber layer. FIG. 9 is a cross-sectional view of a non-limiting example of a perovskite PV structure according to some embodiments. The PV structure may represent a PV cell or a module precursor structure. The photovoltaic structure 900 may include a substrate structure 170, which may include an optionally transparent, substrate and which may in some eases be flexible. For clarity, the patterned substrate conductor, substrate and dielectric layers are not individually illustrated. A bottom electrode 162 may be provided over the substrate structure. In some cases, the bottom electrode may be a composite conductor including a bottom set of conductive metal lines 103 and a bottom transparent conducting layer 105 provided in contact with the bottom set of metal lines. The bottom composite conductor may be light transmissive or transparent. In some preferred embodiments and as shown in FIG. 9, the bottom set of conductive metal lines 103 may be provided over the substrate structure 170 and the bottom conducting layer 105 may be provided over the bottom set of metal lines and over the substrate structure. Although illustrated as a conformal coating, the bottom conducting layer may in some cases act as a smoothing layer and may partially or fully planarize the structure. In some other embodiments, not shown, the bottom conducting layer may instead be provided over the substrate structure and the bottom set of metal lines provided over the bottom conducting layer. In some other cases (not shown), the bottom electrode may be opaque (e.g., include a metal layer or a metal / conductive metal oxide bilayer such as where the conductive metal oxide layer is disposed over the metal layer)

[0119] A first (or lower) carrier transport layer 163 may be provided overlaying the bottom electrode. Although illustrated as planarizing, the first carrier transport layer may in some cases be a conformal coating or partially planarizing. In some preferred embodiments, the first carrier transport layer 163 is generally not in direct contact with the bottom set of metal lines 103. A perovskite absorbing layer 164 (sometimes referred to herein simply as a perovskite layer) may be provided overlaying the first carrier transport layer. A second (or upper) carrier transport layer 165 may be provided overlaying the perovskite absorbing layer.

[0120] A transparent top electrode 166 may be provided overlaying the second carrier transport layer. The top electrode may include top composite conductor may include a top electrode conducting layer 107 and a top set of conductive metal lines 109 provided in contact with the top electrode conducting layer. In some preferred embodiments, the top set of metal lines are generally not in direct contact with the second carrier transport layer 165. That is, and as shown in FIG. 9, the top electrode conducting layer may be provided over the second carrier transport layer and the top set of conductive metal lines may be provided over the second conducting layer. In some other embodiments, not shown, the top set of metal lines may be provided over the second carrier transport layer and the top electrode conducting layer may be provided over the second set of metal lines and over the second conductive layer.

[0121] In some embodiments, the photovoltaic structure may optionally include a transparent adhesion layer 167 provided over the top electrode 166. In some cases, the top set of metal lines may be substantially embedded within the adhesion layer 167. Adhesion layer 167 may in some cases have planarizing properties, act as an encapsulation layer, or both. In some embodiments, 167 may be referred to as an encapsulation layer that in part functions to reduce the ingress of water or other materials to improve device lifetime. In some cases, the photovoltaic structure may optionally include a transparent superstrate 168 provided over adhesion layer 167. In some embodiments, the transparent superstrate may be flexible. In some cases, the adhesion layer 167 may be first applied over the top electrode and the transparent superstrate may be adherently applied over the adhesion layer. In some embodiments, the adhesion layer 167 is pre-applied to the superstrate 168 and that assembly may be laminated over the top electrode. The adhesion layer in combination with the superstrate may also fill and scribe and via structures thereby protecting exposed areas of the PV stack.

[0122] The layers between the top and bottom electrodes may sometimes be referred to herein as photovoltaic “active layers” or photoactive layer 106. Further, the bottom electrode 162, photoactive layer 106, and top electrode 166 may sometimes be collectively referred to herein as a PV stack. Although not illustrated in FIG. 9, in some embodiments, one or more interfacial layers may optionally be provided between any adjacent active layers, between an active layer and an electrode, over the top electrode or under the bottom electrode. Herein the term “interfacial layer” is used broadly, with the purpose, e.g., of altering one or more properties of the interface between two layers such as changing the work function, increasing the barrier properties to mobile ions, passivating defects in a neighboring layer, or altering the band gap. In some cases, an interfacial layer may more specifically act as a barrier to diffusion of water, solvents, molecules, ions (e.g., metal ions and / or halide ions). In some embodiments an interfacial layer may passivate, deactivate or otherwise ameliorate unwanted trap states or carrier transport barriers at layer interfaces or even grain boundaries. In some embodiments, an interfacial layer may aid in the deposition of a subsequent layer, e.g., by providing uniform chemical and / or physical properties across a surface such as surface tension, adhesion, reactive groups for bonding, or the like. An interfacial layer may in some embodiments include a generally electrically insulating metal oxide (e.g., aluminum oxide, titanium dioxide, or the like) that is sufficiently thin so as not to seriously impede the transport of charge between layers. In some embodiments, an intcrfacial layer may be less than 6 nm thick, alternatively less than 2 nm thick. In some cases, an interfacial layer may be a few monolayers thick, alternatively a single monolayer thick. In some cases, an interfacial layer may be a continuous layer or fdm, but in other cases may be discontinuous. In some embodiments, an interfacial layer may be applied by an inline tool compatible with roll-to-roll manufacturing. In some cases, an interfacial layer may be applied by spatial ALD (SALD), a reduced pressure metal oxide deposition tool, or coating (or other contact) with a solution, liquid, gas, or aerosol that includes an interfacial material. Additionally, anywhere the phrase “interfacial layer” or similar concepts appear herein, they may be replaced by “interfacial treatment”. In some cases, an interfacial treatment may not result in deposition of an interfacial layer but may instead treat a layer at its surface or even internally to provide the desired treatment result.

[0123] Photovoltaic structure 900 may in some cases be a bifacial photovoltaic structure capable of receiving light 180 from its upper surface and light 182 from its lower surface. In some embodiments, light 180 may be primary light that is more intense than albedo light 182. For example, light 180 may include sunlight and light 182 may include reflected sunlight or some other ambient light source. Alternatively, the photovoltaic structure may be monofacial where it is designed to only receive light 180.

[0124] In operation, positive and negative charges (holes and electrons) are produced in the perovskite absorbing layer 164 in response to absorption of appropriate radiation. The first (lower) and second (upper) carrier transport layers (163, 165) receive these separated charges and transfer them to the respective bottom and top electrodes (162, 166). The bottom and top electrodes may be in electrical contact with an electrical device (not shown in FIG. 9) where the collected charges serve to power the device, or alternatively charge it in the case where the electrical device is an energy storage battery of some sort. In particular, the electrical contact may be through busbars in contact with bottom and top electrodes as discussed elsewhere herein.

[0125] In some embodiments, the first carrier transport layer may include a hole transporting material and the bottom electrode may act as an anode in the photovoltaic structure. In such embodiments, the second carrier transport layer may include an electron transporting material and the top electrode may act as a cathode in the photovoltaic structure. Such an arrangement of layers may for convenience be referred to as a PIN structure. In some alternative embodiments, the first carrier transport layer may include an electron transporting material and the bottom electrode may act as cathode in the photovoltaic structure. In such embodiments, the second carrier transport layer may include a hole transporting material and the top electrode may act as an anode in the photovoltaic structure. Such an arrangement of layers may for convenience be referred to as a NIP structure.

[0126] In some embodiments, the materials and methods used for forming one or more layers of the photovoltaic structure are compatible with high-speed manufacturing. In some cases, one or more layers may be formed using roll-to-roll processes. In some embodiments, one or more manufacturing steps may instead use batch deposition methods or a series of substrates in a “cut sheet” format, e.g., with each mounted in a frame.

[0127] Substrate

[0128] The substrate is generally electrically insulating and may be formed from any suitable material(s). For use with transparent bottom electrodes or bifacial designs, the substrate may be formed from any suitable transparent material(s), such as a glass, a polymer (plastic), or a combination of different materials. For monofacial designs receiving light from the top electrode, the substrate may optionally be opaque instead of transparent or transmissive. The substrate may in some cases be rigid, but in preferred embodiments, the substrate is flexible. Some non-limiting examples of transparent substrates may include thin flexible glass such as Corning® Willow® Glass, a polyethylene terephthalate (PET) (which may optionally be a heat-stabilized PET), a polyethylene naphthalate (PEN), a polycarbonate (PC), a polysulfone (PS), a polyether sulfone (PES), a polyamide, p-nitrophenylbutyrate (PNB), a polyetherketone (PEEK), a polyetherimide (PEI), a polyarylate (PAR), a polyvinyl acetate, a polyimide, a cyclic olefin polymer (COP), a cellulose triacetate (TAC), a polyacrylate, or an epoxide. For some applications, some particularly useful transparent substrates include thin flexible glass, PET and heat-stabilized PET. The substrate may optionally include multiple materials or have a multilayer structure. The substrate may include a surface treatment to modify the surface energy for improved coating quality and / or adhesion of subsequent layers. Some non-limiting examples of surface treatments include corona discharge, ozone (created, for example, with ultraviolet radiation), and plasma. Surface treatment devices may operate in ambient air, conditioned air (where temperature and relative humidity are controlled), oxygen, or inert gas such as nitrogen or argon. In some embodiments, a surface-modifying treatment may involve a wet chemical treatment or even an additional surface layer deposited by a wet- or dry-coating method. In some cases, a surface layer may be referred to as a primer layer. In some cases, the substrate may act as a water vapor or oxygen barrier, c.g., through choice of substrate material or by addition of one or more barrier layers.

[0129] Note that by “flexible” it is generally meant that the material can undergo some shape changes at least in one dimension in response to some force or stress without significant damage. In some cases, flexibility of a substrate or material may be measured by its bend radius, which is the minimum radius that it can be bent without functionally damaging it. In some embodiments, a flexible support may have a bend radius of less than 100 cm, alternatively less than 50 cm, 20 cm, 10 cm, 5 cm, 4 cm, 3 cm, 2 cm, or 1 cm. In some preferred embodiments, a flexible substrate may have a bend radius of less than 10 cm.

[0130] There are no particular limitations on the thickness of the substrate if flexibility is not desired, so long as it remains sufficiently transparent when required. In some preferred embodiments, a flexible substrate is suitable for roll-to-roll manufacturing and may have a thickness of less than about 350 pm if it is flexible glass (e.g., a thickness in a range of 50 to 350 pm), or alternatively less than about 200 pm if it is a flexible plastic (e.g., a thickness in a range of 20 to 250 pm).

[0131] First and Second Carrier Transport Layers

[0132] As mentioned, one carrier transport layer includes a hole transporting material, and the other carrier transport layer includes an electron transporting material. A carrier transport material that includes a hole transporting material may be referred to as a hole transport layer. In addition to transporting holes, a hole transporting material may also effectively block the transport of electrons. A carrier transport material that includes an electron transporting material may be referred to as an electron transport layer. In addition to transporting electrons, an electron transporting material may also effectively block the transport of holes. In some embodiments, a carrier transport layer may include multiple layers of materials. A non-limiting example of a multilayer charge transport layer may include embodiments where one sublayer is especially for transporting the desired charge and another sublayer especially for blocking the opposite charge. In some cases, a blocking sublayer may be adjacent to the perovskite blocking layer. The thickness of a carrier transport layer depends in part on the properties of the overall photovoltaic stack, but in some embodiments, may have an average thickness in a range of 10’ s to 100’s of nanometers. Some non-limiting examples of hole-transporting materials may include a poly(triaryl amine) (c.g., poly[bis(4-phcnyl)(2,4,6-trimcthylphcnyl)aminc]), a poly-(N-vinyl carbazole), PEDOT complex, a poly(3-hexylthiophene), spiro-MeOTAD (also known as N2,N2,N2',N2',N7,N7,N7,NT-octakis(4-methoxyphenyl)-9,9'-spirobi[9H-fluorene]-2,2',7,7'- tetramine), poly-TPD, EH44, certain metal oxides (e.g. nickel oxide, molybdenum oxide, and vanadium oxide, any of which may optionally be doped), copper thiocyanate and copper iodide, and certain self-assembled monolayers (e.g. 2-(9H-Carbazol-9-yl)ethyl]phosphonic acid).

[0133] Some non-limiting examples of electron-transporting materials may include fullerenes, (e.g., phenyl-C61 -butyric acid methyl ester (PCBM) and fullerene -C60), bathocuproine (BCP), TPBI, PFN, PC71BM, ICBA, graphene, reduced graphene oxide, certain metal oxides (e.g., tin oxide, zinc oxide, cerium oxide, and TiCh, any of which may optionally be doped).

[0134] Depending in part upon the particular material, a carrier transport layer may in some cases be deposited by a dry deposition process. Some non-limiting examples of dry processes may include sputtering, thermal evaporation, physical vapor deposition, chemical vapor deposition, atomic layer deposition, e-beam deposition, or some other process that may in some cases operate under reduced pressure. In some cases, dry deposition may be performed inline in a roll-to-roll system, e.g., by using spatial ALD (SALD) or a reduced pressure material deposition (RPMD) tool. Such RPMD tools operate at pressures above normal vacuum deposition systems, e.g., in a range of 0.01 mBar to 200 mBar. In some embodiments, a carrier transport layer may be deposited from an aerosol of nanoparticlcs. Some non-limiting examples of aerosol-based deposition arc described in US 10092926, which is incorporated by reference herein in its entirety for all purposes. In some cases, aerosol deposition has been found to be less damaging to underlying device layers.

[0135] In some embodiments, a carrier transport layer may be deposited by a coating process that does not require reduced pressure. Some non-limiting examples of coating processes may include gravure, slot die, spray, dip coat, inkjet, flexographic, rod, or blade coating methods. In some cases, a coating process may be followed by a thermal treatment to drive off solvent, anneal the carrier transport material, or the like.

[0136] In some embodiments, a carrier transport layer may be deposited by transfer of the carrier transport material from a donor sheet, e.g., by application of heat or some other stimulus to release it from the donor sheet with adherent transfer to the appropriate device layer or substrate. In some cases, the deposition method is suitable for high-speed manufacturing. Tn some embodiments, the deposition of one or more carrier transport layers may be performed using a roll- to-roll manufacturing process.

[0137] Perovskite absorbing Layer

[0138] Perovskite materials and methods for forming perovskite absorbing layers may be as described in U.S. Patent No. 11,108,007, U.S. Patent No. 11,342,130, U.S. Application No. 2020 / 0377532, and U.S. Application Publication No. 2022 / 0238866, the entire contents of which are incorporated herein by reference. In some embodiments, a perovskite absorbing layer may be coated from a fluid mixture, which may be referred to as a perovskite solution. Any coating method suitable for coating a fluid mixture may be used including, but not limited to, gravure, slot die, spray, dip coat, inkjet, flexographic, rod, or blade coating methods. In some cases, the perovskite deposition method is suitable for high-speed manufacturing. In some embodiments, a perovskite absorbing layer may be performed using a roll-to-roll manufacturing process.

[0139] The term “perovskite solution” refers to a solution or colloidal suspension that can be used to generate a continuous layer of organic-inorganic hybrid perovskite material (the perovskite layer), e.g., one with an ABX3 crystal lattice where ‘A’ and ‘B’ are two cations of very different sizes, and X is an anion that coordinates to both cations. A perovskite solution typically includes an appropriate set of perovskite precursor materials and one or more solvents in which the precursor material is dissolved or suspended. A perovskite solution may also contain additives, e.g., to aid in crystal growth or to modify crystal properties or for some other purpose. A perovskite precursor material is typically an ionic species where at least one of its constituents becomes incorporated into the final perovskite layer ABX3 crystal lattice. Organic perovskite precursor materials are materials whose cation contains carbon atoms while inorganic perovskite precursor materials are materials whose cation contains metal but does not contain carbon.

[0140] When the perovskite solution dries, perovskite crystals or an intermediate precursor phase for hybrid perovskite crystals (intermediate phase) form. The intermediate phase is a crystal, adduct, or mesophase that is not the desired final crystal lattice, which is ABX3. The intermediate phase, if present, may be converted to the desired final crystal lattice by annealing. In some cases, annealing or other heating methods may include the use of heated nip rollers, optionally under nitrogen. Some non-limiting examples of inorganic perovskite precursor materials for making perovskite solutions may include lead (II) iodide, lead (II) acetate, lead (II) acetate trihydratc, lead (II) chloride, lead (II) bromide, lead nitrate, lead thiocyanate, tin (II) iodide, rubidium halide, potassium halide, and cesium halide. In some cases, the halide may include iodide. Some nonlimiting examples of organic perovskite precursor materials for making perovskite solutions may include methylammonium iodide, methylammonium bromide, methylammonium chloride, methylammonium acetate, formamidinium bromide, and formamidinium iodide. To produce a high- performance perovskite device, it is generally preferred in some cases that the organic perovskite precursor material has a purity greater than 99 percent by weight and the inorganic perovskite precursor has a purity greater than 99.9 percent by weight. The inorganic perovskite precursor material contains a metal cation, and in some preferred embodiments, the metal cation is lead. In some preferred embodiment, the molar ratio of organic perovskite precursor material to inorganic perovskite precursor material may be in a range of one to three.

[0141] Electrodes

[0142] At least one of the top and bottom electrodes is transparent. In some embodiments, at least the top electrode is transparent. In some cases both the top and bottom electrodes are transparent (or one is transparent and the other is partially transparent) and the PV module may be a bifacial device. An electrode may be a single layer of electrically conductive material or have a multilayer structure. If transparency is not required, then the electrode may optionally include a nontransparent metal layer. A non-transparent metal layer for the bottom or top electrode may include, for example, silver, copper, gold, aluminum, molybdenum, tungsten, zinc, nickel, iron, tin, palladium, platinum, titanium, or alloys containing one or more of these metals. Non-transparent electrodes may be deposited from solution (e.g., coating, printing, electrodeposition), or alternatively, deposited using a physical vapor deposition method (e.g., sputtering or evaporation), or even a chemical vapor deposition method. In some cases, a solution deposition method may be preferred for high-speed manufacturing.

[0143] If transparency is desired for the electrode, there are several options. In some cases, a single layer or a multilayer of substantially transparent conductive material may be applied. In some cases, a transparent composite conductor may be used. A transparent composite conductor includes a transparent conducting layer and a pattern of metal (non-transparent) lines. The pattern of metal lines may be provided over the transparent conductor layer, or the transparent conducting layer may instead be provided over the pattern of metal lines. In some embodiments, the former may be preferred for forming a top electrode that is a transparent composite conductor (“top composite conductor”) and the latter may be preferred for forming a bottom electrode that is a transparent composite conductor (“bottom composite conductor”).

[0144] Below is a further discussion of methods and materials for forming a composite conductor, but it should be appreciated that the materials and method for forming the transparent conducting layer can generally be applied to any transparent electrodes that do not include the metal lines. Composite Conductors

[0145] The transparency of a composite conductor depends on the width of the metal lines (which are mostly opaque), the transparency of the conducting layer, may also depend in part on the layers adjacent the composite conductors, e.g., on their index of refraction.

[0146] Transparent Conducting layers

[0147] In some embodiments, a transparent conducting layer or transparent electrode may include a conductive polymer material such as PEDOT:PSS, a poly(pyrrole), a polyaniline, a polyphenylene, or a poly(acetylene). Conductive polymers may be applied by a coating from a suspension or solution, e.g., using any of the coating methods described above with respect to the perovskite absorbing layer. After coating, the conducting layer may optionally be subjected to heating or some other drying step to drive off solvent or otherwise improve conductivity properties of the conductive polymer.

[0148] In some embodiments, a transparent conducting layer or transparent electrode may include high aspect ratio metal nanowires (e.g., silver nanowires) or carbon nanotubes. Such materials may be coated from a dispersion (optionally with a binder) at a density sufficient to form an interconnected, conductive mesh, but low enough to achieve a desired transparency. After coating, the conducting layer may optionally be subjected to heating or some other drying step to drive off solvent or otherwise improve conductivity properties of the metal nano wires or carbon nanotubes.

[0149] In some preferred embodiments, a transparent conducting layer or transparent electrode may include doped or undoped metal oxides such as tin oxide, molybdenum oxide, zinc oxide, indium tin oxide [ITO], fluorine-doped tin oxide [FTO], indium zinc oxide [IZO], or aluminum zinc oxide [AZO] . Such metal oxides are sometimes referred to as transparent conductive oxides (TCOs). TCOs may in some cases be coated from a suspension of metal oxide particles or formed from a sol-gel precursor solution, typically followed by a heating step to drive off solvent and anneal or sinter the metal oxide particles. TCOs may in some cases be deposited using dry deposition methods such as sputtering, physical vapor deposition, chemical vapor deposition, atomic layer deposition, e-beam deposition, or the like. In some preferred embodiments, a TCO may be deposited from an aerosol of nanoparticles (also considered a dry process). Some non-limiting examples of aerosol-based deposition are described in U.S. Pat. No. 10,092,926, which is incorporated by reference herein in its entirety for all purposes. In some cases, aerosol deposition may be less damaging to underlying device layers. A heating step may optionally follow such dry deposition processes, e.g., to improve conductivity of the deposited layer.

[0150] In some preferred embodiments, the conducting layer may be interposed between the metal line and a charge carrier layer. Such an arrangement has been found to reduce migration of metal and / or halide ions into the active portion of the perovskite photovoltaic structure. Such migration may cause degradation of performance over time. In some particularly preferred embodiments, the interposing conducting layer includes a TCO as described previously, e.g., ITO, FTO, IZO, AZO, or molybdenum oxide. The TCO conducting layer may act as a barrier layer to diffusion of the metal and / or halide ions.

[0151] In some embodiments, the applied conducting layer may have an intrinsic sheet resistance (i.e., as measured in the absence of metal lines) of less than 1000 £2 / square, preferably less than 300 £2 / square. In some embodiments, the conducting layer may have an intrinsic sheet resistance in a range of 5 - 15 £2 / square, 15 - 25 £2 / square, 25 - 50 £2 / square, 50 - 75 £2 / square, 75 - 100 £2 / square, 100 - 150 £2 / square, 150 - 200 £2 / square, 200 - 250 £2 / square, 250 - 300 £2 / square, 300 - 400 £2 / square, 400 - 500 £2 / square, 500 - 1000 £2 / square, or any combination of ranges thereof. While lower resistance is generally favored, in some embodiments, this range provides a practical balance of resistance with optical transparency. In some embodiments, the conducting layer may have a %T within a target wavelength range of at least 80%, alternatively at least 90%, at least 95%, or at least 97% (as measured in the absence of the metal lines). In some embodiments, the second conducting layer may have an absorptance %A within a target wavelength range of less than 20%, alternatively, less than 10%, less than 5%, or less than 3%.

[0152] In some embodiments, the presence of the top via structures and substrate conductor elements may allow the use of more transparent top electrodes having higher resistivity. For example, the sheet resistance of the top transparent electrode may in some embodiments be 50 - 75 £1 / square, 75 - 100 £2 / square, 100 - 150 £2 / square, 150 - 200 £2 / square, 200 - 250 £1 / square, 250 - 300 / square, 300 - 400 Q / square, 400 - 500 £2 / square, 500 - 1000 £2 / square, or any combination of ranges thereof As mentioned, in some cases the top electrode may have a higher resistivity than the bottom electrode. Even in bifacial systems, the transparency demands on the bottom electrode may be relaxed relative to the top electrode thereby allowing a lower resistance. When the PV module is monofacial, the bottom electrode can include a highly conductive metal layer or more metal lines. In some embodiments, a ratio of sheet resistance (or other relevant resistivity metric) of the top electrode to the bottom electrode may be at least 2:1, alternatively at least 5:1, or alternatively at least 10:1. In some cases, the sheet resistance of the bottom electrode is less than 50 £2 / square, alternatively less than 25 £2 / square, alternatively less than 10 £2 / square, alternatively less than 5 £2 / square.

[0153] The thickness of a conducting layer or transparent electrode depends in part on the electrical and optical properties of the selected material and may also depend on the deposition method. In some embodiments, the conducting layer may have a thickness of less than 500 nm, alternatively less than 200 nm, alternatively less than 100 nm, alternatively less than 50 nm, alternatively less than 20 nm, or alternatively less than 10 nm.. In some embodiments, the conducting layer may be an aerosol-applied TCO having an average thickness in a range of 30 nm to 100 nm. When a conducting layer is applied over a set of metal lines, the average thickness may correspond to areas between the metal lines. When applied over metal lines, it is desirable in many cases that the conducting layer also substantially covers the metal lines to help ensure electrical continuity and prevent or reduce migration of metal ions into the active layers. In some cases, a surface energy modifying treatment may be applied to the substrate and a bottom set of metal lines to assist in adhesion and / or uniform deposition of the first conducting layer over both the substrate and the metal lines.

[0154] Metal lines

[0155] There is no particular limitation on the metal material that may be used for the metal lines. In some embodiments, the metal lines may include silver or copper, or alloys containing one or both of these metals. In some cases, other metals may be suitable including, but not limited to, gold, aluminum, molybdenum, tungsten, zinc, nickel, iron, tin, palladium, platinum, titanium, and alloys containing one or more of these metals. In some embodiments, the metal lines may be formed of a metal material having a conductivity of at least 105S / m. In some embodiments, metal lines may be deposited using a dry metal deposition process coupled with some patterning process. For example, metal lines may be deposited by thermal evaporation, sputtering, physical vapor deposition, chemical vapor deposition, atomic layer deposition, e-beam deposition, or the like. Patterned metal lines may be formed, for example, by deposition through a shadow mask or by using known photolithographic methods that may involve etching and / or lift-off processes. In some embodiments, a metal layer may be electrochemically or electrolessly deposited and then patterned into metal lines, for example, by photolithography. In some embodiments, metal lines may be deposited by transfer of prepatterned metal lines from a donor sheet to the intended surface, optionally in combination with heat and / or pressure.

[0156] In some embodiments, metal lines may be formed by printing. In some embodiments, printing may involve patterned application of an electroless metallization catalyst (e.g., palladium) followed by contact with an electroless plating solution (e.g., copper or nickel). In some preferred embodiments, metal lines may be printed using a metal-containing fluid mixture or “metal ink” (e.g., a suspension, slurry, paste, or the like). In some cases, printing metal lines may be performed by flexographic printing, inkjet printing, gravure printing, or some other printing technology. The printed metal lines may in some cases be followed by a heat treatment to drive off solvent or cause metal particles to fuse or sinter, which can increase the metal conductivity. Heat treatments may include an oven, IR heaters, flashlamps, heated rollers (with or without pressure), or the like. US Pat. 8,907,258, incorporated herein by reference for all purposes, discloses a non-limiting example of a pulsed radiation apparatus that may be suitable for metal particle sintering in a roll-to-roll manner. In some cases, a printed metal ink may be subjected to a secondary chemical treatment such as a reducing agent. The metal ink may include metal particulates of various shapes and sizes (e.g., spherical, oblong, nanoparticles, nanowires) in an appropriate liquid carrier and may further include other agents such as binders, surfactants, or the like. A few non-limiting examples of metal inks may include those disclosed in US20220025200, which is incorporated herein by reference for all purposes. In some embodiments, a surface receiving the metal ink may first be treated to modify its surface energy, e.g., by corona discharge, a plasma, UV / ozone, or a chemical treatment. Modification of this surface energy can in some cases be used to control the shape, dimension, and / or adhesion of the deposited metal ink.

[0157] It should be appreciated that the inks, materials, and printing methods discussed above with respect to the metal lines may be similar to those used to make an electrically conductive connector. The particular set of metal materials and patterning methods may be different for a bottom set of metal lines relative to a top set of metal lines. For example, if fomiing a bottom set of metal lines, the substrate may have a relatively wide tolerance for ink solvents, plating, photolithography, heat treatments, surface treatments, and the like. However, if forming a top set of metal lines the top conducting layer and underlying charge transport and perovskite layers may have a lower tolerance for these materials and treatments. In some embodiments, a set of top metal lines may be preferably formed using technology other than photolithography or plating. Metal line patterns

[0158] FIG. 10A is a cross-sectional view of non-limiting examples of metal lines according to some embodiments. Metal line 244 may be provided on a surface 242. A metal line may be characterized in cross section by a height H (or thickness) and width W. Height H and width W may be measured at a particular point or may be reported as an average height H and average width W along a metal line. In some embodiments, the height or width may vary along the length of a metal line.

[0159] Surface 242 may correspond to the surface of a substrate structure when metal line 244 is part of the bottom set of metal lines. Alternatively, surface 242 may correspond to the upper portion of the top electrode conducting layer when metal line 244 is part of the top set of metal lines. Metal line 244 may take on a variety of shapes and sizes. In FIG. 10A, metal line 244 is shown to have a hemispherical shape in cross-section, but such a shape is not limiting. In some embodiments, in particular for the bottom set of metal lines, it may be less preferred to use metal line structures such as metal line 244x where the top of the metal is wider than the base thereby creating an overhang. This may create electrical discontinuities when depositing the bottom conducting layer over the bottom set of metal lines, particularly when the bottom conducting layer is substantially thinner than the metal line. Even a substantially vertical sidewall (e.g., a square or rectangular shape in cross section) may in some cases result in electrical discontinuities or areas of metal that are not covered such that the bottom conducting layer cannot act as an effective metal ion barrier. In some preferred embodiments, the cross-sectional shape of the metal line may have sidewalls that generally slope inwardly from its edge toward the middle of the line, e.g., as shown in metal line 244a or even 244. Although shown as symmetrical, the cross-sectional shape may not be symmetrical. FTG. 1 OB is a top view of a non-limiting example of a set of metal lines according to some embodiments. As with FIG. 10A, surface 242 may correspond to the surface of a substrate structure when the set of metal lines 244 represents the bottom set of metal lines. Alternatively, surface 242 may correspond to the upper portion of the top electrode conducting layer when the set of metal lines 244 represents the top set of metal lines. In some cases, the metal lines may be provided by roll-to-roll coating as discussed, and arrow 240 may correspond to the direction of web conveyance. Alternatively, arrow 240 may correspond to the direction of a cut sheet conveyance. The set of metal lines may be characterized by an average spacing Sx. In some preferred embodiments, the metal lines may be substantially parallel to each other and uniformly spaced. “Substantially parallel lines” may refer to non-intersecting lines that, relative to a common axis align within 5 degrees of each other, alternatively within 3 degrees, 2 degrees, or even within 1 degree. “Uniformly spaced” may refer to an average standard deviation of the spacings that is less than about 20% of an average spacing. The metal lines may be substantially parallel to the Y axis in FIG. 10B. When using roll- to-roll coating, such metal lines may be advantageously provided having a direction substantially orthogonal to the web conveyance direction, e.g., when using flexographic printing methods for the metal lines. In some cases, however, the metal lines may be provided at a different angle, or at various angles. Similarly, in some cases, the spacing may not be uniform. Although shown as straight lines, the metal lines could include some curvature or a zig-zag pattern.

[0160] In operation, positive or negative charges may generally flow in a direction 246, substantially parallel to the set of metal lines, to a first edge 251 of cell 250 where the current may be collected by a bus line or transferred in series to an adjacent cell (not shown). Although not illustrated, the opposite charges may flow in the direction opposite of arrow 246 to the second edge 252 of cell 250 to be collected by a bus line or transferred in series to an adjacent cell.

[0161] FIG. 10C is a top view of a non-limiting example of a set of metal lines according to some embodiments. FIG. 10C is similar to FIG. 10B, but in addition to metal lines 244’ parallel to the Y axis, may further includes one or more metal lines 244” orthogonal to the metal lines 244’ and parallel to the X axis or conveyance direction 240. The set of metal lines includes both 244’ and 244”. A PV cell may have just one metal line 244” (optionally positioned near the middle of the cell), or it may have two or more. When there are two or more, the metal lines 244” may be characterized by an average spacing Sy. In some preferred embodiments, the metal lines may be substantially parallel to each other and uniformly spaced. However, other angles and spacing options may be used in a manner similar to that discussed with respect to metal lines 244’. Metal lines 244” may be applied in the same step as 244’, or alternatively, may be made separately and / or using a different deposition technology. The width or height of the metal lines 244’ may be about the same as metal lines 244”, but in some other embodiments, they may be smaller or larger. The set of metal lines may make a crossed-line grid as shown, or may include a honeycomb shape, or some other pattern. Although adding the set of metal lines 244” as shown in FIG. IOC may in some cases reduce the overall transparency of the composite conductor relative to FIG. 10B, it may in some cases mitigate the effect of defects or discontinuities of metal lines 244’ to ensure that charges generated in cell 250 can be transported to cell edge 251 or 252 without high resistance. In some embodiments, Sy > Sx. In some cases, the ratio of Sy to Sx may be greater than 2, alternatively greater than 5, or alternatively greater than 10. In this way, the impact on transparency may be reduced while still providing low resistance pathways in the event of a discontinuity in a metal line 244’.

[0162] In some embodiments, a set of metal lines (bottom or top) occupies less than 15% of the active cell surface area, alternatively less than 10%, or less than 5%. In some cases, a set of metal lines occupies an active cell surface area in a range of 0.5% to 15%, or alternatively 1 to 10%, or alternatively 1 - 5%. In some cases, the average spacing Sx of the metal lines is in a range of 0.1 to 2.0 mm. In some cases, a ratio Sx / W of average spacing Sx of the metal lines to the average width W of the metal lines is in a range of 10 to 100. In some embodiments, the average width W of the metal lines of the first or second set of metal lines is less than 40 pm, preferably less than 30 pm. In some embodiments, the average width W of the metal lines of the first or second set of metal lines may be in a range of 1 to 30 pm, alternatively 2 to 25 pm. In some embodiments, the average height H of the metal lines of the first or second set of metal lines is at least 50 nm, preferably at least 100 nm.

[0163] In some embodiments, when both the top and bottom electrodes use transparent composite conductors, the bottom set of metal lines may be different in some way relative to the top set of metal lines, besides the location in the photovoltaic stack. In some cases, this difference may be with respect to at least one physical dimension (spacing, height, width, line direction, any ratios thereof, or the like). With respect to physical dimensions, such difference may be at least 5%, alternatively at least 10%, alternatively at least 20%, or alternatively at least 50%. For example, the spacings between at top set of metal lines may be different than the spacings of a bottom set of metal lines. In some embodiments, the average width of a bottom set of metal lines may be in a range of 15 to 40 pm, whereas an average width of a top set of metal lines may be in a range of 2 to 30 gm. In some printing embodiments, the width of the metal lines may in part be controlled by adjusting the surface energy of the surface on which they arc printed. For example, matching a surface energy to an ink may allow for more spreading of the ink and produce wider lines. A mismatch in surface energy may reduce the amount of ink spreading and produce narrower lines.

[0164] In some embodiments, an average height of a set of bottom metal lines may be less than 300 nm, preferably less than 200 nm, more preferably less than 150 nm. For example, in some cases the average height of a set of bottom metal lines may be in a range of about 20 - 200 nm, alternatively in a range of 50 - 150 nm. In some cases, a set of top metal lines may have a height of greater than 50 nm, alternatively greater than 100 nm, alternatively greater than 200 nm, or alternatively greater than 500 nm. For example, in some cases an average height of a set of top metal lines may be in a range of 200 - 1500 nm. In some embodiments when printing a set of top metal lines, it may be difficult to fully sinter the metal without damaging the underlying perovskite or other layers. As such, the intrinsic resistivity of the metal line material may be higher than for a fully sintered metal line material. In such cases it may be preferred to deposit a thicker metal line to compensate. Example

[0165] In a specific non-limiting example, a bifacial PV module may be manufactured that is characterized as having a 187V design that, relative to a traditional 60V design, may reduce current by 3x and allow 9x thinner in height or narrower in width or some combination of height and width reduction for the busbars. Such a PV module may, for example, include 48 sets of series-connected PV cells, where each set includes 196 PV cells connected in series, for a total of 9018 PV cells, each capable of producing a voltage about 0.95 V when illuminated and connected to an electrical load. The top of the PV module is intended to receive most of the light and produce most of the power, but the bottom may receive some albedo radiation. Each PV cell includes a top via structure and a bottom via structure.

[0166] A non-limiting example of the general manufacturing steps is shown in FIG. 11. The manufacturing may preferably include roll-to-roll methods, but some of the steps may instead be performed using cut-sheet processing.

[0167] In some cases, the substrate structure (e.g., 170) may be fabricated in a substrate zone 1100. This may include equipment to carry out step 1101 to form the patterned substrate conductor (e.g., 140, 142, 144) over a substrate (e.g., 101). In a particular example, a conductive copper metal ink can be printed by flexographic methods to form the bridge conductors and busbars over a PET substrate. The thickness of the patterned substrate conductor may be about 4 microns. Overall, the patterned substrate conductor may block about 5% of incident albedo light, but as a system, this typically corresponds to less than 0.5% overall power loss (since most power is generated from light incident on the top of the PV module, not the bottom). In step 1102, an insulating layer (e.g., 171) may be coated over the substrate and the patterned substrate conductor. In a particular example, the insulating layer includes a transparent epoxy, coated by gravure that forms a 10- micron thick film which substantially smooths the surface. After curing / drying, the substrate structure may optionally be collected as a roll.

[0168] Next, the PV stack is fabricated in a first manufacturing zone 1110. In some cases, the substrate structure may be moved into the first manufacturing zone as a roll for subsequent processing. Alternatively, the substrate zone may be part of the first manufacturing zone and the substrate structure is transported directly to the next PV stack fabrication step as part of an inline roll-to-roll process.

[0169] In step 1111, the bottom pattern of metal lines is printed. In a particular example, a silver ink is flexographically printed to produce 0.2 microns thick silver lines that are 20 microns wide and have a pitch Sx of 0.6 mm. These dimensions block about 3.3% of incident albedo light.

[0170] In step 1112, a bottom electrode conducting layer is coated. In a particular example, a transparent conductive oxide, indium tin oxide, is deposited by an aerosol deposition method to form a conducting layer having an intrinsic sheet resistance of about 300 ohm / sq, and which absorbs about 2% of incident albedo light.

[0171] In step 1113, the photoactive layer (e.g., 106) is coated. In particular, the photoactive layer includes a first charge transport layer (e.g., 163), a perovskite absorbing layer (e.g., 164), and a second charge transport layer (e.g., 165).

[0172] In step 1114, a top electrode conducting layer is coated. In a particular example, a transparent conductive oxide is deposited by an aerosol deposition method to form a conducting layer having an intrinsic sheet resistance of about 600 ohm / sq, and which absorbs about 1 % of incident primary light.

[0173] In step 1115, the top pattern of metal lines is printed. In a particular example, a silver ink is flexographically printed to produce 2.0 microns thick silver lines that are 20 microns wide and have a pitch Sx of 0.95 mm. These dimensions block about 2.1% of incident primary light. Next, the various scribe and via structures are formed in a second manufacturing zone 1120. In step 1121, the first and second scribe structures arc formed (c.g., 132 and 136) at a laser etch station to form the individual PV cells. In particular, both scribe structures have a width of about 40 microns, corresponding to 0.86% inactive area.

[0174] In step 1122, the vias are formed for the top and bottom via structures. In a particular example, via holes for the upper portion of the bottom via structures are made, each having a area of about 0.8 mm2. Afterwards (or beforehand) via holes for the top via structures and the lower portion of the bottom via structures are made, each having a diameter of about 0.1 mm.

[0175] In step 1123 the via structures are formed. In a particular example, patterned insulating material is applied by inkjet and cured, e.g., by UV. This is followed by inkjet printing of copper or silver ink and curing. This produces via structures that result in less than 0.1% inactive area and very little power loss.

[0176] Relative to a PV module using P1-P3 series connections, the present “via” approach has many advantages. In particular, many high precision steps for P1-P3 are replaced with lower precision steps using the present via method. For example, P1-P3 requires 428 meters of high precision picosecond laser scribing which can be slow, expensive, and prone to defects. The present via method requires 500 meters of low precision “P4” type scribes which is much faster, less expensive, and less prone to defects. Further, the overall volume of expensive metal inks can be greatly reduced using the via method relative to P1-P3, and the precision requirements of the application can be substantially relaxed resulting in higher yield and lower cost deposition equipment. The cost of conductive ink using the via method is only 30% that of using P1-P3, and can even be lower if using copper.

[0177] In addition to cost and manufacturing advantages, the via method produces a panel that can have significant performance advantages. In particular, the power loss caused by inactive area on the window side (primary light source) plus the resistive losses in the patterned substrate conductors, top electrode and bottom electrode is only 5.6%, whereas a corresponding PV module using P1-P3, this value is 12%. The PV industry considers even a 1% power efficiency improvement to be significant, and the PV modules of the present disclosure can provide 6% power efficiency improvements at reduced manufacturing costs.

[0178] Still further embodiments herein include the following non-limiting enumerated embodiments. Enumerated embodiment 1. A photovoltaic (PV) module including: a) a substrate structure including a dielectric layer and a patterned substrate conductor provided in a plane beneath an upper surface of the dielectric layer a substrate; b) first and second PV cells provided over the substrate structure, wherein each of the first and second PV cells independently include: i) a bottom electrode; ii) a photoactive layer overlaying the bottom electrode, the photoactive layer including at least an absorber layer; and iii) a transparent top electrode overlaying the photoactive layer; c) a top via structure extending through the first PV cell and the dielectric layer to a first portion of the patterned substrate conductor, wherein the top via structure includes a top via conductor that electrically connects the first portion of the patterned substrate conductor to the top electrode of the first PV cell, and wherein the top via conductor is electrically isolated from the bottom electrode of the first PV cell; and d) a bottom via structure extending through at least the dielectric layer to a second portion of the patterned substrate conductor, the second portion conesponding to the second PV cell, wherein the bottom via structure includes a bottom via conductor that electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the second PV cell, and wherein the bottom via conductor is electrically isolated from the top electrode of the second PV cell.

[0179] Enumerated embodiment 2. The PV module of enumerated embodiment 1, wherein: i) the first and second PV cells are adjacent cells within a set of series-connected PV cells separated by a first scribe structure, ii) the first and second portions of the patterned substrate conductor are part of a common bridge conductor that extends from a first point underneath the first P V cell to a second point underneath the second PV cell, and iii) the top via conductor, the bridge conductor, and the bottom via conductor collectively form a series connection between the first and second PV cells.

[0180] Enumerated embodiment 3. The PV module of enumerated embodiment 1 wherein i) the first and second PV cells are at opposite ends of a set of series-connected PV cells, ii) the first portion of the patterned substrate conductor is part of a first busbar, iii) the second portion of the patterned substrate conductor is part of a second busbar, electrically isolated from the first busbar, and iv) the first and second busbars each provide a parallel electrical connection between sets of series-connected PV cells.

[0181] Enumerated embodiment 4. The PV module according to any of enumerated embodiments 1 - 3, wherein the substrate structure includes a substrate having a first side and a second side; wherein the dielectric layer is an insulating layer provided over the first side of the substrate, and wherein at least some of the patterned substrate conductor is interposed between the substrate and the insulating layer.

[0182] Enumerated embodiment 5. The PV module according to any of enumerated embodiments 1 - 4, wherein the top via structure further includes a patterned insulating material that electrically isolates the photoactive layer of the first PV cell from the top via conductor, and optionally wherein the top via conductor is formed in a different step than formation of the top electrode. Enumerated embodiment 6. The PV module according to any of enumerated embodiments 1 - 5, wherein the bottom via structure further includes a patterned insulating material that electrically isolates the photoactive layer of the second PV cell from the bottom via conductor.

[0183] Enumerated embodiment 7. The PV module according to any of enumerated embodiments 1 - 5, wherein the bottom via conductor is foimed in a common step with forming the bottom electrode such that the bottom via conductor includes a conductive material also used in the bottom electrode.

[0184] Enumerated embodiment 8. The PV module according to any of enumerated embodiments 1 - 4 or 7, wherein the top via conductor is formed in a common step with forming the top electrode such that the top via conductor includes a conductive material also used in the top electrode.

[0185] Enumerated embodiment 9. The PV module according to any of enumerated embodiments 1 - 8, wherein the top via structure is one of a set of top via structures extending to the first portion of the patterned substrate conductor.

[0186] Enumerated embodiment 10. The PV module of enumerated embodiment 9, wherein i) the first and second PV cells are adjacent cells within a set of series-connected PV cells separated by a first scribe structure, ii) the first and second portions of the patterned substrate conductor are part of a common bridge conductor that extends from a first point underneath the first PV cell to a second point underneath the second PV cell, and iii) the bottom via structure extends across a length of the common bridge conductor approximately parallel to the first scribe structure.

[0187] Enumerated embodiment 11 . The PV module of enumerated embodiment 10, wherein the common bridge conductor is one of a plurality of approximately rectangularly shaped metallic bridge conductors that occupy at least 50% of the surface area of the substrate.

[0188] Enumerated embodiment 12. The PV module according to any of enumerated embodiments 1 - 9, wherein the bottom via structure is one of a set of bottom via structures extending to the second portion of the patterned substrate conductor.

[0189] Enumerated embodiment 13. The PV module according to any of enumerated embodiments 1 - 12, wherein the top via structure has an elongated shape having length width aspect ratio of at least 2:1.

[0190] Enumerated embodiment 14. The PV module according to any of enumerated embodiments 1 - 13, wherein the transparent top electrode includes a transparent conductive oxide, optionally wherein the transparent conductive oxide includes ITO, IZO, AZO, or FTO.

[0191] Enumerated embodiment 15. The PV module according to any of enumerated embodiments 1 - 14, wherein the transparent top electrode is substantially free of metal lines.

[0192] Enumerated embodiment 16. The PV module according to any of enumerated embodiments 1 - 14, wherein the top electrode is a composite conductor including a top conducting layer and a top pattern of metal lines. Enumerated embodiment 17. The PV module of enumerated embodiment 16, wherein the top conducting layer is disposed between the photoactive layer and the top set of metal lines.

[0193] Enumerated embodiment 18. The PV module of enumerated embodiment 16 or 17, wherein the top set of metal lines occupies an area that is 4% or less of an area defined by the PV cell.

[0194] Enumerated embodiment 19. The PV module according to any of enumerated embodiments 16 -

[0195] 18, wherein the top via conductor is provided over at least one metal line of the top pattern of metal lines.

[0196] Enumerated embodiment 20. The PV module according to any of enumerated embodiments 16 -

[0197] 19, wherein the top pattern of metal lines include silver or copper.

[0198] Enumerated embodiment 21 . The PV module according to any of enumerated embodiments 16 -

[0199] 20, wherein the metal lines of the top pattern of metal lines have a thickness in a range of 1 - 4 microns and a width in a range of 10 - 30 microns.

[0200] Enumerated embodiment 22. The PV module according to any of enumerated embodiments 16 -

[0201] 21, wherein the bottom electrode is a transmissive or transparent composite conductor including a bottom conducting layer and a bottom pattern of metal lines.

[0202] Enumerated embodiment 23. The PV module of enumerated embodiment 22, wherein the bottom set of metal lines occupies an area that is 20% or less of an area defined by the PV cell, and greater than an area occupied by the top set of metal lines.

[0203] Enumerated embodiment 24. The PV module according to any of enumerated embodiments 22 -

[0204] 23, wherein the bottom via conductor is provided over at least one metal line of the bottom pattern of metal lines.

[0205] Enumerated embodiment 25. The PV module according to any of enumerated embodiments 22 -

[0206] 24, wherein the bottom pattern of metal lines include silver.

[0207] Enumerated embodiment 26. The PV module according to any of enumerated embodiments 22 -

[0208] 25, wherein the metal lines of the bottom pattern of metal lines have a thickness in a range of 0.1 - 0.5 microns and a width in a range of 10 - 30 microns.

[0209] Enumerated embodiment 27. The PV module according to any of enumerated embodiments 1 - 27, wherein the patterned substrate conductor occupies an area that is less than 50 % of a substrate structure area, optionally less than 20%.

[0210] Enumerated embodiment 28. The PV module according to any of enumerated embodiments 1 - 21, wherein the bottom electrode is opaque. Enumerated embodiment 29. The PV module of enumerated embodiment 28, wherein the patterned substrate conductor occupies an area that is at least 50 % of a substrate structure area.

[0211] Enumerated embodiment 30. The PV module according to any of enumerated embodiments 1 - 29, wherein the top via structures occupy an area that is less than 10% of an area of the PV module, and optionally wherein

[0212] Enumerated embodiment 31. The PV module according to any of enumerated embodiments 1 - 3, wherein: the dielectric layer of the substrate structure includes a substrate having a first side and a second side; the first and second PV cells are provided on the first side of the substrate; and the patterned substrate conductor is provided on the second side of the substrate.

[0213] Enumerated embodiment 32. The PV module according to any of enumerated embodiments 1 - 31, wherein the absorber layer includes a perovskite.

[0214] Enumerated embodiment 33. The PV module according to any of enumerated embodiments 1 - 31, wherein the absorber layer includes an organic photovoltaic material, a CIGS material, or a cadmium telluride material.

[0215] Enumerated embodiment 34. The PV module according to any of enumerated embodiments 1 - 33, wherein the photoactive layer includes an interfacial layer in contact with the bottom electrode.

[0216] Enumerated embodiment 35. The PV module according to any of enumerated embodiments 1 - 34, wherein the substrate structure is flexible.

[0217] Enumerated embodiment 36. A photovoltaic (PV) module including: a) a substrate structure including a dielectric layer and a patterned substrate conductor provided in a plane beneath an upper surface of the dielectric layer, wherein the patterned substrate conductor includes electrically isolated patterned substrate conductor elements including a first busbar, a second busbar, and a plurality of bridge conductors; and b) at least first and second sets of series-connected PV cells provided over the substrate structure, wherein: each set includes a plurality of PV cells connected in series by a bridge conductor; the sets are connected in parallel at one end of the series by connection to the first busbar and at an opposite end of the series by connection to the second busbar; and each of the PV cells independently includes: i) a bottom electrode; ii) a photoactive layer overlaying the bottom electrode, the photoactive layer including at least an absorber layer; iii) a transparent top electrode overlaying the photoactive layer; iv) a top via structure extending through the PV cell and the dielectric layer to a first portion of the patterned substrate conductor, wherein the top via structure includes a top via conductor that electrically connects the first portion of the patterned substrate conductor to the top electrode of the PV cell, and wherein the top via conductor is electrically isolated from the bottom electrode and photoactive layer of the PV cell; and v) a bottom via structure extending through the PV cell and the dielectric layer to a second portion of the patterned substrate conductor, wherein the bottom via structure includes a bottom via conductor that electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the PV cell, and wherein the bottom via conductor is electrically isolated from the top electrode and photoactive layer of the PV cell.

[0218] Enumerated embodiment 37. The PV module of enumerated embodiment 36, wherein the substrate structure is flexible.

[0219] Enumerated embodiment 38. A method of making a photovoltaic (PV) module including a plurality of sets of series-connected PV cells, the method including: a) forming a patterned conductive metal layer over a substrate, the patterned conductive metal layer corresponding to a patterned substrate conductor or a patterned substrate conductor precursor; b) forming a patterned dielectric layer over the conductive metal layer, the patterned dielectric layer including bottom via tapered openings corresponding to bottom via contact areas; c) depositing a bottom electrode layer over the patterned dielectric layer and into the bottom via tapered openings to make electrical contact between the bottom electrode layer and the underlying patterned conductive metal layer; d) forming a plurality of first top via scribes, wherein each first top via scribe is formed by removing a portion of the bottom electrode layer along with a portion of the dielectric layer underneath the portion of the bottom electrode layer; e) depositing a photoactive layer over the structure from step (a), the photoactive layer including an absorber layer; f forming a plurality of second top via scribes in alignment with the first top via scribes, wherein each bottom via scribe produces top via tapered openings extending to the underlying patterned conductive metal layer and corresponding to top via contact areas; g) depositing a transparent top electrode layer over the structure from step (f) and into the top via openings to make electrical contact between the transparent top electrode layer and the underlying patterned conductive metal layer; and h) forming one or more first scribe structures and one or more second scribe structures to form two more sets of PV cells, each set including two or more PV cells, wherein adjacent cells in a set of PV cells arc connected in scries by a bridge conductor formed from the patterned conductive metal layer.

[0220] Enumerated embodiment 39. The method of enumerated embodiment 38, wherein step (e) starts with depositing an interfacial layer including a metal oxide over the structure from step (d), optionally by atomic layer deposition.

[0221] Enumerated embodiment 40. The method of enumerated embodiment 38 or 39, wherein the patterned conductive metal layer is a patterned substrate conductor precursor, and wherein forming the second scribe structure includes scribing through portions of the patterned conductive metal layer to form the patterned substrate conductor.

[0222] Enumerated embodiment 41. The method of enumerated embodiment 40, wherein the patterned conductive metal layer includes a set of metal stripes.

[0223] Enumerated embodiment 42. The method of enumerated embodiment 38 or 39, wherein the patterned conductive metal layer corresponds to the patterned substrate conductor.

[0224] Enumerated embodiment 43. The method according to any of enumerated embodiments 38 - 42, wherein the absorber layer includes a perovskite.

[0225] Enumerated embodiment 44. The method according to any of enumerated embodiments 38 - 42, wherein the absorber layer includes an organic photovoltaic material, a CIGS material, or a cadmium telluride material.

[0226] Enumerated embodiment 45. The method according to any of enumerated embodiments 38 - 44, wherein forming the patterned dielectric layer includes coating a first dielectric sublayer and coating a second dielectric sublayer over the first dielectric sublayer.

[0227] Enumerated embodiment 46. The method according to any of enumerated embodiments 38 - 45, wherein forming the first top via scribes and the second top via scribes includes laser ablation.

[0228] Enumerated embodiment 47. The method according to any of enumerated embodiments 38 - 46, wherein forming the first and second scribe structures includes laser ablation.

[0229] Enumerated embodiment 48. The method according to any of enumerated embodiments 38 - 47, wherein the substrate is flexible.

[0230] Enumerated embodiment 49. The method according to any of enumerated embodiments 38 - 48, wherein the substrate moves at a speed of at least 5 meter per minute during the deposition of the bottom electrode layer, the deposition of the photoactive layer, and the deposition of the top electrode layer, optionally wherein the substrate structure is a flexible substrate structure provided as a web of a roll-to-roll manufacturing process.

[0231] The specific details of particular embodiments may be combined in any suitable manner without departing from the spirit and scope of embodiments of the invention. However, other embodiments of the invention may be directed to specific embodiments relating to each individual aspect, or specific combinations of these individual aspects.

[0232] The above description of example embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form described, and many modifications and variations are possible in light of the teaching above. In the preceding description, for the purposes of explanation, numerous details have been set forth in order to provide an understanding of various embodiments of the present technology. It will be apparent to one skilled in the art, however, that certain embodiments may be practiced without some of these details, or with additional details.

[0233] Having described several embodiments, it will be recognized by those of skill in the art that various modifications, alternative constructions, and equivalents may be used without departing from the spirit of the invention. Additionally, a number of well-known processes and elements have not been described in order to avoid unnecessarily obscuring the present invention. Additionally, details of any specific embodiment may not always be present in variations of that embodiment or may be added to other embodiments. It should be noted that, unless otherwise explicitly noted or required by context, the word “or” is used in this disclosure in a non-exclusive sense.

[0234] Where a range of values is provided, it is understood that each intervening value, to the tenth of the unit of the lower limit unless the context clearly dictates otherwise, between the upper and lower limits of that range is also specifically disclosed. Each smaller range between any stated value or intervening value in a stated range and any other stated or intervening value in that stated range is encompassed. The upper and lower limits of these smaller ranges may independently be included or excluded in the range, and each range where either, neither, or both limits are included in the smaller ranges is also encompassed within the invention, subject to any specifically excluded limit in the stated range. Where the stated range includes one or both of the limits, ranges excluding either or both of those included limits are also included.

[0235] As used herein and in the appended claims, the singular forms “a”, “an”, and “the” include plural referents unless the context clearly dictates otherwise. Thus, for example, reference to “a method” includes a plurality of such methods and reference to “the device” includes reference to one or more devices and equivalents thereof known to those skilled in the art, and so forth. The invention has now been described in detail for the purposes of clarity and understanding. However, it will be appreciated that certain changes and modifications may be practice within the scope of the appended claims.

[0236] All publications, patents, and patent applications cited herein are hereby incorporated by reference in their entirety for all purposes. None is admitted to be prior art.

Claims

We claim:

1. A photovoltaic (PV) module comprising: a) a substrate structure comprising a dielectric layer and a patterned substrate conductor provided in a plane beneath an upper surface of the dielectric layer a substrate; b) first and second PV cells provided over the substrate structure, wherein each of the first and second PV cells independently comprise: i) a bottom electrode; ii) a photoactive layer overlaying the bottom electrode, the photoactive layer comprising at least an absorber layer; and iii) a transparent top electrode overlaying the photoactive layer; c) a top via structure extending through the first P V cell and the dielectric layer to a first portion of the patterned substrate conductor, wherein the top via structure comprises a top via conductor that electrically connects the first portion of the patterned substrate conductor to the top electrode of the first PV cell, and wherein the top via conductor is electrically isolated from the bottom electrode of the first PV cell; and d) a bottom via structure extending through at least the dielectric layer to a second portion of the patterned substrate conductor, the second portion corresponding to the second PV cell, wherein the bottom via structure comprises a bottom via conductor that electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the second PV cell, and wherein the bottom via conductor is electrically isolated from the top electrode of the second PV cell.

2. The PV module of claim 1, wherein: i) the first and second PV cells are adjacent cells within a set of series-connected PV cells separated by a first scribe structure, ii) the first and second portions of the patterned substrate conductor are part of a common bridge conductor that extends from a first point underneath the first PV cell to a second point underneath the second PV cell, and iii) the top via conductor, the bridge conductor, and the bottom via conductor collectively form a series connection between the first and second PV cells.

3. The PV module of claim 1 wherein i) the first and second PV cells are at opposite ends of a set of series-connected PV cells, ii) the first portion of the patterned substrate conductor is part of a first busbar, iii) the second portion of the patterned substrate conductor is part of a second busbar, electrically isolated from the first busbar, and iv) the first and second busbars each provide a parallel electrical connection between sets of series-connected PV cells.

4. The PV module of claim 1, wherein the substrate structure comprises a substrate having a first side and a second side; wherein the dielectric layer is an insulating layer provided over the first side of the substrate, andwherein at least some of the patterned substrate conductor is interposed between the substrate and the insulating layer.

5. The PV module of claim 1, wherein the top via structure further comprises a patterned insulating material that electrically isolates the photoactive layer of the first PV cell from the top via conductor, and optionally wherein the top via conductor is formed in a different step than formation of the top electrode.

6. The PV module of claim 1 , wherein the bottom via structure further comprises a patterned insulating material that electrically isolates the photoactive layer of the second PV cell from the bottom via conductor.

7. The PV module of claim 1, wherein the bottom via conductor is formed in a common step with forming the bottom electrode such that the bottom via conductor comprises a conductive material also used in the bottom electrode.

8. The PV module of claim 1 , wherein the top via conductor is formed in a common step with forming the top electrode such that the top via conductor comprises a conductive material also used in the top electrode.

9. The PV module of claim 1, wherein the top via structure is one of a set of top via structures extending to the first portion of the patterned substrate conductor.

10. The PV module of claim 9, wherein i) the first and second PV cells are adjacent cells within a set of series-connected PV cells separated by a first scribe structure, ii) the first and second portions of the patterned substrate conductor are part of a common bridge conductor that extends from a first point underneath the first PV cell to a second point underneath the second PV cell, and iii) the bottom via structure extends across a length of the common bridge conductor approximately parallel to the first scribe structure.

11. The PV module of claim 10, wherein the common bridge conductor is one of a plurality of approximately rectangularly shaped metallic bridge conductors that occupy at least 50% of the surface area of the substrate.

12. The PV module of claim 1, wherein the bottom via structure is one of a set of bottom via structures extending to the second portion of the patterned substrate conductor.

13. The PV module of claim 1, wherein the top via structure has an elongated shape having length / width aspect ratio of at least 2: 1.

14. The PV module of claim 1, wherein the transparent top electrode comprises a transparent conductive oxide, optionally wherein the transparent conductive oxide includes ITO, IZO, AZO, or FTO.

15. The PV module of claim 1, wherein the transparent top electrode is substantially free of metal lines.

16. The PV module of claim 1 , wherein the top electrode is a composite conductor comprising a top conducting layer and a top pattern of metal lines.

17. The PV module of claim 16, wherein the top conducting layer is disposed between the photoactive layer and the top set of metal lines.

18. The PV module of claim 16, wherein the top set of metal lines occupies an area that is 4% or less of an area defined by the PV cell.

19. The PV module of claim 16, wherein the top via conductor is provided over at least one metal line of the top pattern of metal lines.

20. The PV module of claim 16, wherein the top pattern of metal lines comprise silver or copper.

21. The PV module of claim 16, wherein the metal lines of the top pattern of metal lines have a thickness in a range of 1 - 4 microns and a width in a range of 10 - 30 microns.

22. The PV module of claim 16, wherein the bottom electrode is a transmissive or transparent composite conductor comprising a bottom conducting layer and a bottom pattern of metal lines.

23. The PV module of claim 22, wherein the bottom set of metal lines occupies an area that is 20% or less of an area defined by the PV cell, and greater than an area occupied by the top set of metal lines.

24. The PV module of claim 22, wherein the bottom via conductor is provided over at least one metal line of the bottom pattern of metal lines.

25. The PV module of claim 22, wherein the bottom pattern of metal lines comprise silver.

26. The PV module of claim 22, wherein the metal lines of the bottom pattern of metal lines have a thickness in a range of 0.1 - 0.5 microns and a width in a range of 10 - 30 microns.

27. The PV module of claim 1, wherein the patterned substrate conductor occupies an area that is less than 50 % of a substrate structure area, optionally less than 20%.

28. The PV module of claim 1, wherein the bottom electrode is opaque.

29. The PV module of claim 28, wherein the patterned substrate conductor occupies an area that is at least 50 % of a substrate structure area.

30. The PV module of claim 1, wherein the top via structures occupy an area that is less than 10% of an area of the PV module.

31. The PV module of claim 1 , wherein: the dielectric layer of the substrate structure comprises a substrate having a first side and a second side; the first and second PV cells are provided on the first side of the substrate; and the patterned substrate conductor is provided on the second side of the substrate.

32. The PV module according to any of claims 1 - 31, wherein the absorber layer comprises a perovskite.

33. The PV module of claim 32, wherein the photoactive layer comprises an interfacial layer in contact with the bottom electrode.

34. The PV module of claim 1, wherein the absorber layer comprises an organic photovoltaic material, a CIGS material, or a cadmium telluride material.

35. The PV module of claim 1, wherein the substrate structure is flexible.

36. A photovoltaic (PV) module comprising: a) a substrate structure comprising a dielectric layer and a patterned substrate conductor provided in a plane beneath an upper surface of the dielectric layer, wherein the patterned substrate conductor comprises electrically isolated patterned substrate conductor elements including a first busbar, a second busbar, and a plurality of bridge conductors; and b) at least first and second sets of series-connected PV cells provided over the substrate structure, wherein: each set comprises a plurality of PV cells connected in series by a bridge conductor; the sets are connected in parallel at one end of the series by connection to the first busbar and at an opposite end of the series by connection to the second busbar; and each of the PV cells independently comprises: i) a bottom electrode; ii) a photoactive layer overlaying the bottom electrode, the photoactive layer comprising at least an absorber layer; iii) a transparent top electrode overlaying the photoactive layer, iv) a top via structure extending through the PV cell and the dielectric layer to a first portion of the patterned substrate conductor, wherein the top via structure comprises a top via conductor that electrically connects the first portion of the patterned substrate conductor to the top electrode of the PV cell, and wherein the top via conductor is electrically isolated from the bottom electrode and photoactive layer of the PV cell; andv) a bottom via structure extending through the PV cell and the dielectric layer to a second portion of the patterned substrate conductor, wherein the bottom via structure comprises a bottom via conductor that electrically connects the second portion of the patterned substrate conductor to the bottom electrode of the PV cell, and wherein the bottom via conductor is electrically isolated from the top electrode and photoactive layer of the PV cell.

37. A method of making a photovoltaic (PV) module comprising a plurality of sets of series- connected PV cells, the method comprising: a) forming a patterned conductive metal layer over a substrate, the patterned conductive metal layer corresponding to a patterned substrate conductor or a patterned substrate conductor precursor; b) forming a patterned dielectric layer over the conductive metal layer, the patterned dielectric layer comprising tapered bottom via openings corresponding to bottom via contact areas; c) depositing a bottom electrode layer over the patterned dielectric layer and into the bottom via tapered openings to make electrical contact between the bottom electrode layer and the underlying patterned conductive metal layer; d) forming a plurality of first top via scribes, wherein each first top via scribe is formed by removing a portion of the bottom electrode layer along with a portion of the dielectric layer underneath the portion of the bottom electrode layer; e) depositing a photoactive layer over the structure from step (d), the photoactive layer comprising an absorber layer; f) forming a plurality of second top via scribes in alignment with the first top via scribes, wherein each second top via scribe produces top via tapered openings extending to the underlying patterned conductive metal layer and corresponding to top via contact areas; g) depositing a transparent top electrode layer over the structure from step (f) and into the top via openings to make electrical contact between the transparent top electrode layer and the underlying patterned conductive metal layer; and h) forming one or more first scribe structures and one or more second scribe structures to form two more sets of PV cells, each set comprising two or more PV cells, wherein adjacent cells in a set of PV cells are connected in series by a bridge conductor formed from the patterned conductive metal layer.

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