Display panel, driving method and display device

Abstract

A display panel, a driving method and a display device, which belong to the technical field of display. Each sub-pixel (10) in the display panel comprises: a light-emitting element (D), wherein a first electrode thereof is electrically connected to a first power supply voltage signal end (ELVSS); and an addressing switch module (101), wherein a control end thereof is electrically connected to a control signal end of a first driving module (20), a first end thereof is electrically connected to a second power supply voltage signal output end (ELVDD) of the first driving module (20), and a second end thereof is electrically connected to a second electrode of the light-emitting element (D). The addressing switch module (101) is turned on or off under the control of the control signal end of the first driving module (20), and when the addressing switch module (101) is turned on, a second power supply voltage signal of the second power supply voltage signal output end (ELVDD) of the first driving module (20) is transmitted to the second electrode of the light-emitting element (D), wherein the second power supply voltage signal outputted from the second power supply voltage signal output end (ELVDD) is a variable voltage signal. The display panel can effectively reduce the complexity of pixel structures, thereby helping to achieve a narrow-bezel or bezel-less effect.

Description

A display panel, driving method and display device

[0001] Cross-references to related applications

[0002] This application claims priority to Chinese Patent Application No. 202410517287.9, filed on April 26, 2024, entitled “A display panel, driving method and display device”, the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application belongs to the field of display technology, and in particular relates to a display panel, driving method and display device. Background Technology

[0004] With the rapid development of display technology, new types of display panels, such as Organic Light Emitting Diode (OLED) and Micro Light Emitting Diode (micro LED), are emerging in large numbers, and full-screen displays have become the development trend of mobile display devices such as mobile phones. As display technology continues to develop and consumers' demands for display panels increase, the functions integrated into display panels are becoming increasingly diverse. In display panels, pixel circuits typically drive light-emitting elements to emit light for display. However, the inventors of this application have discovered that current display panel pixel circuits suffer from a high degree of structural complexity.

[0005] Summary of the Invention

[0006] This application provides a display panel, a driving method, and a display device, which can effectively reduce the complexity of the pixel structure of the display panel and help to achieve narrow bezel or bezel-less effects.

[0007] In a first aspect, embodiments of this application provide a display panel, the display panel including a plurality of sub-pixels arranged in an array; the sub-pixels include:

[0008] The light-emitting element has its first electrode electrically connected to the first power supply voltage signal terminal.

[0009] The addressing switch module has its control terminal electrically connected to the control signal terminal of the first drive module, its first terminal electrically connected to the second power supply voltage signal output terminal of the first drive module, and its second terminal electrically connected to the second electrode of the light-emitting element.

[0010] The addressing switch module is turned on or off under the control of the control signal terminal of the first driving module. When the addressing switch module is turned on, the second power supply voltage signal of the second power supply voltage signal output terminal of the first driving module is transmitted to the second electrode of the light-emitting element through the addressing switch module; wherein, the second power supply voltage signal output by the second power supply voltage signal output terminal is a variable voltage signal.

[0011] Based on the same inventive concept, in a second aspect, embodiments of this application also provide a driving method for a display panel, applied to a display panel as provided in any of the embodiments of the first aspect of this application, the driving method for the display panel comprising:

[0012] An addressing switch control signal is provided to the control signal terminal of the first driving module to control the addressing switch module in the target sub-pixel to be turned on or off; and a second power supply voltage signal is provided to the second power supply voltage signal output terminal of the first driving module to transmit the second power supply voltage signal to the second electrode of the light-emitting element in the target sub-pixel; wherein the second power supply voltage signal is a variable voltage signal.

[0013] Based on the same inventive concept, in a third aspect, embodiments of this application also provide a display device, which includes a display panel as provided in any embodiment of the first aspect of this application.

[0014] As described above, this application provides a display panel, a driving method, and a display device. The display panel includes multiple sub-pixels arranged in an array. Each sub-pixel includes a light-emitting element and an addressing switch module. The first electrode of the light-emitting element is electrically connected to a first power supply voltage signal terminal, and the second electrode of the light-emitting element is electrically connected to a second terminal of the addressing switch module. The addressing switch module is turned on or off under the control of the control signal terminal of the first driving module. When the addressing switch module is on, the second power supply voltage signal from the second power supply voltage signal output terminal of the first driving module is transmitted to the second electrode of the light-emitting element through the first terminal of the addressing switch module. This second power supply voltage signal is a variable voltage signal. In this way, by controlling the on / off state of the addressing switch module and the voltage value of the second power supply voltage signal, the potential control of the second electrode of the light-emitting element in the sub-pixel can be achieved efficiently and flexibly, thereby enabling the light-emitting element to display the required brightness.

[0015] Compared to related technologies, the display panel, driving method, and display device of this application embodiment include a light-emitting element and an addressing switch module in each sub-pixel of the display panel. The light-emitting element is driven digitally by the addressing switch module, thus changing the process from sequentially turning on sub-pixels row by row in related technologies to individually controlling the turning on of each sub-pixel. This application embodiment utilizes the addressing switch module and a second power supply voltage signal with an adjustable voltage value to drive the light-emitting element to emit light. This facilitates a simplified pixel circuit structure design, effectively reducing the complexity of the display panel's pixel structure, freeing up display panel space, and contributing to the achievement of narrow bezels or bezel-less effects. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 is a schematic diagram of the structure of a display panel provided in an embodiment of this application;

[0018] Figure 2 is a schematic diagram of the addressing and light emission timing of a display panel provided in an embodiment of this application;

[0019] Figure 3 is a schematic diagram of another display panel provided in an embodiment of this application;

[0020] Figure 4 is a schematic diagram of the structure of another display panel provided in an embodiment of this application;

[0021] Figure 5 is a schematic diagram of the strobe signal timing of a display panel according to an embodiment of this application;

[0022] Figure 6 is a schematic diagram of the structure of another display panel provided in an embodiment of this application;

[0023] Figure 7 is a schematic diagram of the structure of a first driving module in a display panel according to an embodiment of this application;

[0024] Figure 8 is a schematic diagram of sub-pixel encoding of a display panel provided in an embodiment of this application;

[0025] Figure 9 is a schematic diagram of matrix control signals for a display panel provided in an embodiment of this application;

[0026] Figure 10 is a cross-sectional schematic diagram of the pixel structure of a display panel provided in an embodiment of this application;

[0027] Figure 11 is a schematic diagram of the metal shielding layer pattern of a display panel provided in an embodiment of this application;

[0028] Figure 12 is a flowchart illustrating a driving method for a display panel according to an embodiment of this application;

[0029] Figure 13 is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0030] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.

[0031] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.

[0032] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0033] It should be noted that the transistors in the embodiments of this application can be either N-type or P-type transistors. For N-type transistors, the on-state level is high and the off-state level is low. That is, when the gate of an N-type transistor is high, its first and second terminals are connected; when the gate of an N-type transistor is low, its first and second terminals are off. For P-type transistors, the on-state level is low and the off-state level is high. That is, when the control terminal of a P-type transistor is low, its first and second terminals are connected; when the control terminal of a P-type transistor is high, its first and second terminals are off. In specific implementations, the gate of each transistor is used as its control terminal. Furthermore, depending on the signal and type of the gate of each transistor, its first terminal can be used as the source and its second terminal as the drain, or vice versa. No distinction is made here. Additionally, the on-state and off-state levels in the embodiments of this invention are general terms. The on-state level refers to any level that enables the transistor to conduct, and the off-state level refers to any level that enables the transistor to turn off / become off.

[0034] In the embodiments of this application, the term "electrical connection" can refer to a direct electrical connection between two components, or it can refer to an electrical connection between two components via one or more other components.

[0035] Various modifications and variations can be made to this application without departing from its spirit or scope, which will be apparent to those skilled in the art. Therefore, this application is intended to cover modifications and variations falling within the scope of the corresponding claims (the claimed technical solutions) and their equivalents. It should be noted that the embodiments provided in this application can be combined with each other without contradiction.

[0036] Before describing the technical solutions provided in the embodiments of this application, in order to facilitate understanding of the embodiments of this application, this application first specifically explains the problems existing in the related technologies:

[0037] With the continuous development of display technology and the increasing demands of consumers for display panels, the functions integrated into display panels are becoming more and more numerous. However, the inventors of this application have discovered that the sub-pixels in current display panels suffer from structural complexity.

[0038] Specifically, current OLED pixel structures are highly complex. For example, traditional 7T1C and 8T1C pixel circuit structures often contain numerous switching TFTs (Thin Film Transistors) and driving TFTs, making the pixel circuit manufacturing process complex and space-consuming. Furthermore, due to the complexity of the internal structure of current pixel circuits, display panels typically require a large number of fanout circuits to control the operation of the TFTs in the pixel circuits. This also occupies a significant amount of space in the display panel, hindering the development of narrow-bezel or bezel-less display products.

[0039] Furthermore, the inventors of this application have discovered that currently, display panel sub-pixels are actually illuminated by driving the light-emitting elements line by line. Based on the existing pixel circuit structure, sub-pixels are prone to lateral leakage, which causes uneven low grayscale display.

[0040] To address the aforementioned technical problems, this application provides a display panel, a driving method, and a display device, which can solve the problem in the related technology that the complex sub-pixel structure in the display panel is not conducive to the development of narrow-bezel or borderless display products.

[0041] It should be noted that the embodiments provided in this application are not intended to limit the scope of this application. To better understand the present invention, a display panel, driving method, and display device provided in the embodiments of this application will be described in detail below with reference to Figures 1 to 13.

[0042] The display panel provided in the embodiments of this application will be described first below.

[0043] Figure 1 shows a schematic diagram of a display panel 100 provided in an embodiment of this application. The display panel 100 shown in Figure 1 can be an organic light-emitting diode (OLED) display panel 100. In other implementations of this application, the display panel 100 can also be a micro light-emitting diode (Micro LED) display panel 100, a quantum dot display panel 100, etc.

[0044] To facilitate a more intuitive understanding of the embodiments of this application, each addressing switch module 101 is illustrated in the accompanying drawings as an N-type transistor, but this does not impose any substantial limitations on the specific device type used in each addressing switch module 101.

[0045] As shown in Figure 1, the display panel 100 includes multiple sub-pixels 10 arranged in an array. Each sub-pixel 10 includes a light-emitting element D and an addressing switch module 101.

[0046] The first electrode of the aforementioned light-emitting element D is electrically connected to the first power supply voltage signal terminal ELVSS. This light-emitting element D can be an LED (Light-Emitting Diode), an OLED, or others; this embodiment does not impose strict limitations on it.

[0047] The first electrode of the aforementioned light-emitting element D can be, for example, the cathode of the light-emitting element. The aforementioned first power supply voltage signal terminal ELVSS can be used to provide a constant first power supply voltage signal, which can be a negative voltage signal, such as -3.3V. The voltage value of the first power supply voltage signal can be different in different display modes. For example, display modes may include Always-on Display (AOD) mode, high refresh rate mode, low refresh rate mode, or other display modes. For example, the voltage range of the first power supply voltage signal can be between -2V and -3V.

[0048] The control terminal of the addressing switch module 101 is electrically connected to the control signal terminal EN of the first driving module 20. The first terminal of the addressing switch module 101 is electrically connected to the second power supply voltage signal output terminal ELVDD of the first driving module 20. The second terminal of the addressing switch module 101 is electrically connected to the second electrode of the light-emitting element D. The second electrode of the light-emitting element D can be, for example, the anode of the light-emitting element D, and the first driving module 20 can be, for example, an onboard driving chip. This application does not impose strict limitations on these aspects.

[0049] The addressing switch module 101 is turned on or off under the control of the control signal terminal EN of the first driving module 20. When the addressing switch module 101 is on, the second power supply voltage signal of the second power supply voltage signal output terminal ELVDD of the first driving module 20 is transmitted to the second electrode of the light-emitting element D through the addressing switch module 101. The second power supply voltage signal output by the aforementioned second power supply voltage signal output terminal ELVDD is a variable voltage signal. The voltage value of the second power supply voltage signal can be flexibly adjusted according to the grayscale brightness required to be displayed by the current sub-pixel 10, that is, the voltage value of the second power supply voltage signal is related to the display grayscale / brightness of the sub-pixel 10.

[0050] For example, when sub-pixel 10 needs to display a brightness of 100 gray levels, the voltage value of the second power supply voltage signal can be, for example, 3V; when sub-pixel 10 needs to display a brightness of 200 gray levels, the voltage value of the second power supply voltage signal can be, for example, 5V. This embodiment does not impose strict limitations on this.

[0051] In this way, the first electrode of the light-emitting element D provides the first power supply voltage signal to the first power supply voltage signal terminal ELVSS, and the second electrode of the light-emitting element D provides the second power supply voltage signal to the second power supply voltage signal terminal. The light-emitting element D displays the brightness of the corresponding grayscale under the voltage difference between the first power supply voltage signal and the second power supply voltage signal.

[0052] When the addressing switch module 101 is turned off, the second power supply voltage signal at the second power supply voltage signal output terminal ELVDD cannot be transmitted to the second electrode of the light-emitting element D. The second electrode of the light-emitting element D has no voltage, so the light-emitting element D does not emit light when the addressing switch module 101 is turned off.

[0053] To gain a more intuitive understanding of the independent driving control of the sub-pixel light-emitting elements implemented by the addressing switch module 101 in this application, please refer to Figure 2 below. Figure 2 is a schematic diagram of the addressing and light-emitting timing of a display panel 100 provided in an embodiment of this application.

[0054] In Figure 2, the addressing switch control signal is the signal output from the control signal terminal EN of the first drive module 20. Taking the addressing switch module 101 as an N-type transistor as an example, when the control signal terminal EN of the first drive module 20 outputs a high-level signal, the addressing switch module 101 is turned on. When the control signal terminal EN of the first drive module 20 outputs a low-level signal, the addressing switch module 101 is turned off.

[0055] When the screen is actually displayed, if the light-emitting element D in sub-pixel R11, sub-pixel G1n and sub-pixel Bn1 in the Nth frame needs to emit light, the addressing switch module 101 in sub-pixel R11, sub-pixel G1n and sub-pixel Bn1 is turned on, and the second power supply voltage signal output terminals ELVDD_R11, ELVDD_G1n and ELVDD_Bn1, which are electrically connected to the first terminal of the addressing switch module 101 in each sub-pixel, output the corresponding second power supply voltage signal (positive voltage).

[0056] In the N+1th frame, the light-emitting element D in sub-pixels G11, R1n, Bn1, and Rnn needs to emit light for display. Then, the addressing switch module 101 in the above sub-pixels is turned on, and the corresponding second power supply voltage signal output terminals ELVDD_G11, ELVDD_R1n, ELVDD_Bn1, and ELVDD_Rnn of each sub-pixel output the corresponding second power supply voltage signal (positive voltage).

[0057] As described above, this application provides a display panel 100, which includes a plurality of sub-pixels 10 arranged in an array. Each sub-pixel 10 includes a light-emitting element D and an addressing switch module 101. The first electrode of the light-emitting element D is electrically connected to a first power supply voltage signal terminal ELVSS, and the second electrode of the light-emitting element D is electrically connected to a second terminal of the addressing switch module 101. The addressing switch module 101 is turned on or off under the control of the control signal terminal EN of the first driving module 20. When the addressing switch module 101 is on, the second power supply voltage signal of the second power supply voltage signal output terminal ELVDD of the first driving module 20 is transmitted to the second electrode of the light-emitting element D through the first terminal of the addressing switch module 101. This second power supply voltage signal is a variable voltage signal. Thus, by controlling the on / off state of the addressing switch module 101 and the voltage value of the second power supply voltage signal, the potential control of the second electrode of the light-emitting element D in the sub-pixel 10 can be achieved efficiently and flexibly, thereby enabling the light-emitting element D to display the required brightness.

[0058] Compared to related technologies, a display panel 100 in this application embodiment includes a light-emitting element D and an addressing switch module 101 in each sub-pixel 10. The addressing switch module 101 is used to digitally address and drive the light-emitting element D, thus changing the process from sequentially turning on sub-pixels 10 in related technologies to individually controlling the turning on of each sub-pixel 10. This application embodiment utilizes the addressing switch module 101 and a second power supply voltage signal with an adjustable voltage value to drive the light-emitting element D to emit light. This facilitates a simplified pixel circuit structure design, effectively reduces the complexity of the pixel structure of the display panel 100, frees up space in the display panel 100, and helps achieve narrow bezel or bezel-less effects.

[0059] Please refer to Figure 3 below. Figure 3 is a schematic diagram of another display panel 100 provided in an embodiment of this application. Optionally, according to some embodiments of this application, as shown in Figure 3, in order to flexibly meet the control requirements of sub-pixels 10 in the light-emitting drive of the display panel 100 and to address cost control issues, the same first driving module 20 can be electrically connected to addressing switch modules 101 in one or more sub-pixels 10 simultaneously. Specifically, X sub-pixels 10 form a sub-pixel group, the addressing switch modules 101 in the same sub-pixel group are electrically connected to the same first driving module 20, and the addressing switch modules 101 in different sub-pixel groups are electrically connected to different first driving modules 20, where X is a positive integer.

[0060] In this embodiment, the same first driving module 20 is used to drive and control a sub-pixel group including X sub-pixels 10. A sub-pixel group may include one or more sub-pixels 10. The value of X can be flexibly set according to the actual control requirements of the sub-pixels 10 and the development cost. The value of X can be different for different sub-pixel groups. This application does not impose strict restrictions on this.

[0061] In this way, by limiting the addressing switch module 101 in one or more sub-pixels 10 to be electrically connected to the same first driving module 20, multiple addressing switch modules 101 can reuse the same first driving module 20, or the addressing switch modules 101 in different sub-pixels 10 can be electrically connected to different first driving modules 20 respectively. This can fully meet the control requirements of multiple sub-pixels 10 in the light emission driving of the display panel 100.

[0062] Figure 3 shows two sub-pixel groups: sub-pixel group 1 and sub-pixel group 2. In sub-pixel group 1, X = 2. In sub-pixel group 2, X = 1.

[0063] The following explanation will first take sub-pixel group 1 as an example to illustrate the case where X is greater than or equal to 2. In sub-pixel group 1, X = 2, which means that the addressing switch module 101 in the two sub-pixels 10 can be electrically connected to the same first driving module 20. This means that the two sub-pixels 10 can reuse the first driving module 20, which can further save wiring space and thus help control the production cost of the display panel 100.

[0064] When the same first driving module 20 is electrically connected to the addressing switch module 101 in multiple sub-pixels 10, the control terminals of the addressing switch modules 101 in different sub-pixels 10 of the same pixel group can be electrically connected to the same control signal terminal EN of the first driving module 20, and the on / off states of the addressing switch modules 101 connected to the same control signal terminal EN are synchronized.

[0065] Alternatively, the control terminals of the addressing switch modules 101 in different sub-pixels 10 of the same pixel group can be electrically connected to different control signal terminals EN of the first driving module 20, and the first driving module 20 can independently control the output signals of the different control signal terminals EN. In this way, even if the control terminals of different addressing switch modules 101 are electrically connected to the same first driving module 20, the control of turning on or off of the different addressing switch modules 101 can still be guaranteed to be independent. Similarly, the control of the first terminals of different addressing switch modules 101 in the sub-pixel group by the same first driving module 20 can be independent or synchronous, depending on the actual control requirements and the performance of the first driving module 20, etc., and this embodiment does not impose strict limitations on this.

[0066] According to some embodiments of this application, optionally, X = 1 in order to facilitate full independent control of each sub-pixel 10.

[0067] Please refer to sub-pixel group 2 in Figure 3 for details. In sub-pixel group 2, X=1. In this case, the addressing switch module 101 in different sub-pixels 10 is electrically connected to different first driving modules 20. The control terminal of the addressing switch module 101 in different sub-pixels 10 is individually controlled by the first driving module 20 corresponding to it.

[0068] Thus, when the addressing switch modules 101 in different sub-pixels 10 are turned on, the first terminal of the addressing switch modules 101 in the sub-pixels 10 respectively receives the second power supply voltage signal output from the second power supply voltage signal terminal of the corresponding first driving module 20. The second power supply voltage signals received by different addressing switch modules 101 are independent, thereby making the brightness control of the light-emitting elements D in different sub-pixels 10 independent, which is beneficial for the display panel 100 to perform effective image display.

[0069] According to some embodiments of this application, optionally, please continue to refer to FIG3. Taking sub-pixel 101 in FIG3 as an example, in the case where the addressing switch module 101 of multiple sub-pixels 10 reuses the same first driving module 20, in order to fully ensure independent control of each sub-pixel 10, thereby facilitating the effective guarantee of the display effect of the display panel 100, the aforementioned first driving module 20 includes multiple control signal terminals EN (e.g., EN_Rn1 and EN_Gn1 in FIG3) and multiple second power supply voltage signal output terminals ELVDD (e.g., ELVDD_Rn1 and ELVDD_Gn1 in FIG3).

[0070] The control terminals of the addressing switch modules 101 in at least two sub-pixels 10 are electrically connected to different control signal terminals EN of the same first drive module 20;

[0071] The first terminal of the addressing switch module 101 in at least two sub-pixels 10 is electrically connected to the different second power supply voltage signal output terminals ELVDD of the same first driving module 20.

[0072] For example, in Figure 3, the control terminals of the addressing switch modules 101 of sub-pixels Rn1 and Gn1 are electrically connected to different control signal terminals EN_Rn1 and EN_Gn1 of the same first driving module 20, respectively, and the first terminals of the addressing switch modules 101 of sub-pixels Rn1 and Gn1 are electrically connected to different second power supply voltage signal output terminals ELVDD_Rn1 and ELVDD_Gn1 of the same first driving module 20, respectively.

[0073] In this embodiment, the first driving module 20 includes multiple control signal terminals EN and multiple second power supply voltage signal output terminals ELVDD. The control terminals of the addressing switch modules 101 in at least two sub-pixels 10 are electrically connected to different control signal terminals EN of the same first driving module 20. The same first driving module 20 can independently control the output signals of different control signal terminals EN. In this way, even if the control terminals of different addressing switch modules 101 are electrically connected to the same first driving module 20, the independent control of the on or off of different addressing switch modules 101 can still be guaranteed.

[0074] In this way, the same first driving module 20 can provide independent second power supply voltage signals to the first terminals of different addressing switch modules 101 through different second power supply voltage signal output terminals ELVDD, thereby facilitating independent control of the voltage signal of the second pole of the light-emitting element D in the sub-pixel 10, and thus facilitating the individual driving of different sub-pixels 10 in the display panel 100, which is beneficial to fully guaranteeing the display effect of the display panel 100.

[0075] Please refer to Figure 4 below. Figure 4 is a structural schematic diagram of another display panel 100 provided in an embodiment of this application. According to some embodiments of this application, optionally, as shown in Figure 4, when the first driving module 20 is multiplexed by addressing switch modules 101 in multiple sub-pixels 10, in order to more reasonably realize independent control of multiple addressing switch modules 101 connected to the same first driving module 20, the control terminals of the addressing switch modules 101 in N sub-pixels 10 are respectively electrically connected to the corresponding M gating signal lines (e.g., Mux-B, Mux-G, and Mux-R in Figure 4), and the M gating signal lines are respectively electrically connected to the M control signal terminals EN of the same first driving module 20; M is a positive integer less than or equal to N, and M is greater than 1;

[0076] The first terminals of the addressing switch modules 101 in the N sub-pixels 10 are all electrically connected to the second power supply voltage signal output terminal ELVDD of the same first driving module 20.

[0077] In this embodiment, as shown in FIG4, the first terminals of the addressing switch modules 101 of multiple sub-pixels 10 are all electrically connected to the same second power supply voltage signal output terminal ELVDD, and the control terminals of the addressing switch modules 101 of multiple sub-pixels 10 are electrically connected to different control signal terminals EN in the same first driving module 20 through their respective corresponding gating signal lines.

[0078] In this way, the first drive module 20 provides different control signals to different control signal terminals EN, so that the corresponding addressing switch module 101 is turned on or off.

[0079] In one example, at a certain moment, if the first driving module 20 drives one or more addressing switch modules 101 to be turned on, then the second power supply voltage signal output by the second power supply voltage signal output terminal ELVDD is transmitted to the second pole of the light-emitting element D through the one or more turned-on addressing switch modules 101 to drive the light-emitting element D to emit light for display.

[0080] According to some embodiments of this application, optionally, please continue to refer to FIG4, considering the reasonable balanced multiplexing drive of sub-pixels 10 in the display panel 100, and in order to fully guarantee the display effect of the display panel 100, the gating signal lines Mux connected to the addressing switch modules 101 in different color sub-pixels 10 can be different, that is, the on or off state control of the addressing switch modules 101 in different color sub-pixels 10 is independent.

[0081] Specifically, the N sub-pixels 10 include the first sub-pixel and the second sub-pixel, and the M gating signal lines Mux include the first gating signal line Mux and the second gating signal line Mux.

[0082] The first sub-pixel is used to emit light to display the first color, and the second sub-pixel is used to emit light to display the second color;

[0083] The control terminal of the addressing switch module 101 in the first sub-pixel is electrically connected to the first gating signal line, and the control terminal of the addressing switch module 101 in the second sub-pixel is electrically connected to the second gating signal line.

[0084] The first color mentioned above may be, for example, red, and the second color may be, for example, green. Alternatively, the first color may also be green and the second color may be, for example, blue. This embodiment does not impose strict limitations on this.

[0085] Referring to Figure 4, the first sub-pixel can be, for example, sub-pixel R11 in Figure 4, and the second sub-pixel can be, for example, sub-pixel G11. Correspondingly, the first gating signal line can be, for example, gating signal line Mux-R, and the second gating signal line can be, for example, gating signal line Mux-G.

[0086] In this embodiment, the addressing switch modules 101 in different color sub-pixels 10 are connected to different gating signal lines. Thus, even when the same first driving module 20 is reused, because the addressing switch modules 101 in different color sub-pixels 10 are connected to different gating signal lines, and the control signal terminals EN in the first driving module 20 connected to these different gating signal lines are different, it is possible to effectively control the addressing switch modules 101 in different color sub-pixels 10 individually. This facilitates ensuring a good display effect of the display panel 100 through individual control of different color sub-pixels 10.

[0087] Please refer to Figure 5 for details. Figure 5 is a schematic diagram of the selection signal timing of a display panel provided in an embodiment of this application. As shown in Figure 5, according to some embodiments of this application, optionally, when the control terminals of the addressing switch modules 101 in multiple sub-pixels 10 are respectively electrically connected to different control signal terminals EN in the same first driving module 20, and the first terminals of the addressing switch modules 101 in multiple sub-pixels 10 are all electrically connected to the same second power supply voltage signal output terminal ELVDD in the first driving module 20, in order to fully ensure the independent driving control of different sub-pixels 10, the addressing switch modules 101 in N sub-pixels 10 are turned on in a time-division manner during one screen display cycle.

[0088] The first driving module 20 is used to provide a second power supply voltage signal with the same or different voltage values ​​to the first terminal of the addressing switch module 101 according to the duty cycle of the addressing switch module 101 in the N sub-pixels 10.

[0089] In this embodiment, the brightness of the light-emitting element D in one frame is related to the voltage value of the second power supply voltage signal and the emission time. Based on this, when each sub-pixel 10 does not reuse the first driving module 20, the light-emitting elements D in the sub-pixel 10 can be lit and turned off simultaneously, and the brightness difference of the light-emitting elements D in the sub-pixel 10 comes from the different voltage values ​​of the second power supply voltage signal.

[0090] When multiple addressing switch modules 101 in multiple sub-pixels 10 reuse the same first driving module 20, the addressing switch modules 101 in the multiple sub-pixels 10 can be set to have different conduction time periods within a screen display cycle, that is, the addressing switch modules 101 in the multiple sub-pixels 10 are time-divisionally conducted. For example, when three sub-pixels 10 (sub-pixel Rn1, sub-pixel Gn1, and sub-pixel Bn1) reuse the first driving module 20, the conduction duty cycle of the addressing switch modules 101 of sub-pixels Rn1, Gn1, and Bn1 can all be 1 / 3.

[0091] The following is a specific example: During the first 1 / 3 of a screen display cycle, the first driving module 20 controls the addressing switch module 101 in sub-pixel Rn1 to be turned on, and provides a second power supply voltage signal of a corresponding voltage value to sub-pixel Rn1 to drive the light-emitting element D in sub-pixel Rn1 to emit light and display. Further, during the second 1 / 3 of the screen display cycle, the first driving module 20 controls the addressing switch module 101 in sub-pixel Bn1 to be turned on, and provides a second power supply voltage signal of a corresponding voltage value to sub-pixel Bn1 to drive the light-emitting element D in sub-pixel Bn1 to emit light and display.

[0092] Furthermore, since the brightness of the light-emitting element D in a frame is related to the voltage value of the second power supply voltage signal and the emission time, the voltage value of the second power supply voltage signal can be adaptively increased after the emission time of the light-emitting element D in the sub-pixel 10 is reduced, so as to ensure that the final display effect remains unchanged.

[0093] Please refer to Figure 6 below. Figure 6 is a schematic diagram of another display panel 100 provided in an embodiment of this application. Optionally, according to some embodiments of this application, as shown in Figure 6, this embodiment considers that if the grayscale of the first frame of sub-pixel 10 is 0xFF, and the grayscale of the second frame is 0x00, the brightness will immediately decrease, resulting in inconsistent brightness and uneven display. Therefore, to improve the display uniformity of the display panel 100, the sub-pixel 10 may further include a storage module 102.

[0094] The first end of the storage module 102 is electrically connected to the second electrode of the light-emitting element D, and the second end of the storage module 102 is electrically connected to the second end of the addressing switch module 101.

[0095] The storage module 102 is used to store charge when the addressing switch module 101 is turned on, and to provide the stored charge to the second electrode of the light-emitting element D when the addressing switch module 101 is turned off.

[0096] In a specific implementation, a storage module 102 is added between the second terminal of the light-emitting element D of the sub-pixel 10 and the second terminal of the addressing switch module 101. This storage module 102 can specifically use one or more parallel capacitors to store charge, but this embodiment does not impose strict limitations on this.

[0097] Thus, by adding the aforementioned storage module 102, when the addressing switch module 101 is turned on in the first frame, the second power supply voltage signal provided by the second power supply voltage signal output terminal ELVDD will be stored in the storage module 102 first. In the second frame, since the storage module 102 stores the second power supply voltage signal corresponding to the first frame, it discharges to make the light-emitting element D maintain the brightness of the previous frame, and so on.

[0098] In this way, by adding the aforementioned storage module 102 between the second pole of the light-emitting element D of the sub-pixel 10 and the second end of the addressing switch module 101, the problem of uneven display between adjacent frames can be effectively solved, which helps to improve the display performance of the display panel 100.

[0099] According to some embodiments of this application, optionally, and more specifically, continuing as shown in FIG6, considering that the charge storage capacity and discharge capacity of the above-mentioned storage module 102 need to be adapted to the performance parameters of the display panel 100, so as to avoid the discharge of the storage module 102 causing the light-emitting element D to maintain the brightness of the previous frame for too short or too long, thereby affecting the effect of the storage module 102 on solving the problem of uneven display between adjacent frames, the above-mentioned storage module 102 may specifically include a storage capacitor C.

[0100] The capacitance of the storage capacitor C is determined based on the refresh rate of the display panel 100, the resolution of the display panel 100, and the equivalent resistance of the light-emitting element D.

[0101] In this embodiment, for example, the capacitance C of the storage capacitor C added to the sub-pixel 10 can be calculated according to the following formula:

[0102] Where V0 is the initial voltage on the storage capacitor C; V1 is the final voltage that the storage capacitor C is charged to; Vt is the voltage on the storage capacitor C at time t; R is the equivalent resistance of the light-emitting element D; t=1 / (f*M*N*3), M*N is the resolution of the display panel 100; f is the refresh rate of the display panel 100; M*N*3 is the total number of sub-pixels 10;

[0103] In one example, V0 equals 0V, and the value of V1 is equal to the voltage value of the second power supply voltage signal. According to Vt = 0.99V1, C = t / 4.605R can be calculated.

[0104] Please refer to Figure 7 below. Figure 7 is a schematic diagram of the structure of the first driving module 20 in a display panel 100 according to an embodiment of this application. Optionally, according to some embodiments of this application, as shown in Figure 7, in order to more reasonably ensure the reliability and effectiveness of the output signals from the control signal terminal EN and the second power supply voltage signal output terminal ELVDD of the first driving module 20, this first driving module 20 is electrically connected to the second driving chip 200. Considering actual display driving scenarios, the second driving chip 200 can specifically be a display driver integrated circuit (DDIC).

[0105] The first driving module 20 described above can be used to receive the matrix control signal from the second driving chip 200, and provide an addressing switch control signal to the control signal terminal EN according to the matrix control signal, so as to control the addressing switch module 101 to be turned on or off. Additionally, it provides a second power supply voltage signal to the second power supply voltage signal output terminal ELVDD according to the matrix control signal, so as to transmit the second power supply voltage signal to the second electrode of the light-emitting element D.

[0106] In a specific implementation, the second driver chip 200 can provide a matrix control signal to the first driver module 20. This matrix control signal can be obtained by converting the screen display information provided by the motherboard or the front-end timing control board (Timing Controller, TCON). This embodiment does not impose strict limitations on this.

[0107] After receiving the matrix control signal transmitted by the second driver chip 200, the first driving module 20 may provide a corresponding addressing switch control signal to its control signal terminal EN according to the matrix control signal. It may also provide a corresponding second power supply voltage signal to the second power supply voltage signal output terminal ELVDD according to the matrix control signal, so that when the addressing switch module 101 is turned on, a corresponding voltage signal is provided to the second electrode of the light-emitting element D, thereby causing the light-emitting element D to emit light and display the corresponding grayscale brightness.

[0108] According to some embodiments of this application, optionally, and more specifically, referring to Figure 7, in order to make the first driving module 20 more reasonably provide the corresponding addressing switch control signal and the second power supply voltage signal according to the matrix control module, the first driving module 20 is used to receive the matrix control signal. The matrix control signal specifically includes the coordinate information, addressing switch identifier, and target grayscale information corresponding to K sub-pixels 10, where K is a positive integer. At least one of the K sub-pixels 10 is the target sub-pixel 10.

[0109] The first drive module 20 includes an addressing signal module, a power control module, and a data conversion module.

[0110] The addressing signal module is used to compare the coordinate information of the target sub-pixel 10 with the coordinate information of the K sub-pixels 10 respectively, so as to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel 10.

[0111] The power control module is used to output an addressing switch control signal corresponding to the addressing switch identifier to the control signal terminal EN according to the addressing switch identifier corresponding to the target sub-pixel 10, so as to control the addressing switch module 101 in the target sub-pixel 10 to be turned on or off.

[0112] The data conversion module is used to determine the second power supply voltage signal that matches the target grayscale information corresponding to the target sub-pixel 10 according to the preset correspondence between grayscale information and the second power supply voltage signal, and transmit the second power supply voltage signal corresponding to the target grayscale information to the second power supply voltage signal output terminal ELVDD.

[0113] In this embodiment, among the coordinate information, addressing switch identifier, and target grayscale information corresponding to the K sub-pixels 10, there is an association or mapping relationship between the coordinate information, addressing switch identifier, and target grayscale information corresponding to the same sub-pixel 10. For example, please refer to Figure 8, which is a schematic diagram of sub-pixel 10 encoding in a display panel 100 provided in an embodiment of this application. Each sub-pixel pre-codes and defines its own coordinate information, etc., so that it can be queried and matched during subsequent individual drive control.

[0114] Taking target sub-pixel 10 as an example, its coordinate information can be, for example, the row coordinates and column coordinates of target sub-pixel 10 in the pixel array. For example, the coordinate information of target sub-pixel 10 can specifically include: sub-pixel 10 row coordinate "0x01" and sub-pixel 10 column coordinate "0x07".

[0115] The aforementioned addressing switch identifier can specifically be the on / off identifier of the addressing switch module 101 in the target sub-pixel 10, and the target grayscale information can specifically be the grayscale value that this target sub-pixel 10 needs to display. For example, if the addressing switch identifier is "1", then the addressing switch module 101 of this target sub-pixel 10 needs to be turned on; if the addressing switch identifier is "0", then the addressing switch module 101 of this target sub-pixel 10 needs to be turned off. The target grayscale information can be, for example, "0xFF".

[0116] In specific implementation, the addressing signal module in the first matrix module can pre-store the coordinate information of the target sub-pixel 10. Thus, after the first driving module 20 connected to the target sub-pixel 10 receives the matrix control signal, the addressing signal module in the first matrix module compares the coordinate information of each of the K sub-pixels 10 with the coordinate information of the target sub-pixel 10, thereby determining the sub-pixel 10 whose coordinate information matches the pre-stored coordinate information of the target sub-pixel 10; this sub-pixel is the target sub-pixel 10. After finding the coordinate information of the target sub-pixel 10, the addressing switch identifier and target grayscale information associated with this target sub-pixel 10 can be determined. This addressing signal module can transmit the determined corresponding addressing switch identifier to the power control module and the target grayscale information to the data conversion module.

[0117] After receiving the addressing switch identifier of the target sub-pixel 10, the power control module can output an addressing switch control signal corresponding to the addressing switch identifier to the control signal terminal EN of the first driving module 20, so as to control the addressing switch module 101 in the target sub-pixel 10 to be turned on or off.

[0118] After receiving the target grayscale information of the target sub-pixel 10, the data conversion module can determine the second power supply voltage signal that matches the target grayscale information according to the preset correspondence between the grayscale information and the second power supply voltage signal, and transmit the second power supply voltage signal to the second power supply voltage signal output terminal ELVDD.

[0119] Taking the addressing switch module 101 as an N-type transistor as an example, if the above addressing switch indicator indicates that the addressing switch module 101 is turned off, the power control module outputs a low-level signal to the control signal terminal EN to control the addressing switch module 101 in the target sub-pixel 10 to be turned off.

[0120] If the aforementioned addressing switch indicator indicates that the addressing switch module 101 is turned on, the power control module outputs a high-level signal to the control signal terminal EN. The control terminal of the addressing switch module 101 receives the high-level signal from the control signal terminal EN, and its first terminal receives the second power supply voltage signal from the second power supply voltage signal output terminal ELVDD. The voltage value of the second power supply voltage signal is typically within a preset voltage range, with its upper limit being less than the high-level signal provided by the control signal terminal EN. Thus, a positive potential difference is formed between the control terminal and the first terminal of the addressing switch module 101, enabling it to conduct.

[0121] In some possible implementations, the matrix control signal may include only the addressing switch identifier and grayscale information of the sub-pixel 10 connected to the first driving module 20, so as to effectively simplify the amount of information transmitted to the first driving module 20.

[0122] According to some embodiments of this application, optionally, specifically limited to before the first driving module 20 receives the matrix control signal, in order to enable the second driving chip 200 to more accurately determine the matrix control signal and to send the matrix control signal to the first driving module 20 more reasonably, thereby fully realizing effective display control of the display panel 100, the second driving chip 200 may specifically include a signal conversion module, a data storage module and a timing control module.

[0123] The aforementioned signal conversion module is used to acquire the display signal of the target screen input from the motherboard, and determine the matrix control signal based on the display signal.

[0124] The aforementioned data storage module is used to receive and store the matrix control signals transmitted by the signal conversion module.

[0125] The timing control module is used to call the matrix control signal from the data storage module when the start node of the preset time interval is reached, and send the matrix control signal to the first drive module 20; the preset time interval is determined based on the refresh rate information of the display panel 100.

[0126] In this embodiment, when the target image needs to be displayed in the next frame on the display panel 100, the motherboard acquires the display signal of the target image and transmits the acquired display signal to the signal conversion module in the second driver chip 200. The aforementioned display signal may include information such as the chroma, brightness, or grayscale of each pixel in the target image, but this embodiment does not impose strict limitations on this.

[0127] After receiving the display signal, the signal conversion module, exemplarily, can convert the display signal to obtain the coordinate information, addressing switch identifier, and grayscale information corresponding to each sub-pixel 10 in the pixel array (array size is related to display resolution), thereby determining the matrix control signal and transmitting it to the data storage module for signal storage. This matrix control signal is specifically shown in Figure 9, which is a schematic diagram of the matrix control signal of a display panel 100 provided in an embodiment of this application. In Figure 9, the coordinates of the sub-pixels to be displayed in the current frame are lit, and the addressing switch identifier and grayscale information of the sub-pixels to be displayed are associated and bound.

[0128] The aforementioned timing control module retrieves a matrix control signal from the data storage module and sends it to the first drive module 20 when the start node of a preset time interval is reached. The preset time interval is determined based on the refresh rate information of the display panel 100. In other words, the timing control module can retrieve the stored matrix control signal from the data storage module according to the motherboard refresh rate requirements and send it to the first drive module 20 at regular intervals. This facilitates the orderly drive control of the sub-pixels 10 of the display panel 100.

[0129] According to some embodiments of this application, optionally, when the aforementioned first driving module 20 is multiplexed by the addressing switch modules 101 in multiple sub-pixels 10, it is also necessary to consider combining the conduction duty cycle settings of different sub-pixels 10 in one screen display cycle when sending matrix control signals. Based on this, when the same first driving module 20 is electrically connected to at least two sub-pixels 10, the preset time interval is determined based on the refresh rate information of the display panel 100 and the conduction duty cycle of the addressing switch modules 101 in the at least two sub-pixels 10 in one screen display cycle.

[0130] In this embodiment, when the addressing switch modules 101 in multiple sub-pixels 10 reuse the same first driving module 20, for example, when the addressing switch modules 101 in three sub-pixels 10 (sub-pixels Rn1, Gn1, and Bn1) share one first driving module 20, the duty cycle of the three sub-pixels 10 can be, for example, 1 / 3. During one screen display cycle, the second driving chip 200 can send a matrix control signal to the first driving module 20 every 1 / 3 of the screen display cycle. The first driving module 20 will receive three matrix control signals during the same screen display cycle. Each received matrix control signal can be consistent, for example, containing coordinate information, addressing switch identifiers, and grayscale information corresponding to the multiple sub-pixels 10.

[0131] Upon receiving the matrix control signal for the first time, the first driving module 20 matches the coordinate information of sub-pixel Rn1 to determine the addressing switch identifier and grayscale information corresponding to sub-pixel Rn1, and then performs time-division multiplexing control and driving the emission of sub-pixel Rn1. Upon receiving the matrix control signal for the second time, it matches the coordinate information of sub-pixel Gn1 to determine the addressing switch identifier and grayscale information corresponding to sub-pixel Gn1, and then performs time-division multiplexing control and driving the emission of sub-pixel Gn1. Upon receiving the matrix control signal for the third time, it matches the coordinate information of sub-pixel Bn1 to determine the addressing switch identifier and grayscale information corresponding to sub-pixel Bn1, and then performs time-division multiplexing control and driving the emission of sub-pixel Bn1.

[0132] In other cases, the first driving module 20 may receive three matrix control signals within the same screen display cycle, and the received matrix control signals may be different each time. For example, within one screen display cycle, the matrix control signal received by the first driving module 20 for the first time may only include the addressing switch identifier of sub-pixel Rn1 and grayscale information; the matrix control signal received for the second time may only include the addressing switch identifier of sub-pixel Gn1 and grayscale information; and the matrix control signal received for the third time may only include the addressing switch identifier of sub-pixel Bn1 and grayscale information. This embodiment does not impose strict limitations on this, and the specific settings can be made according to the actual display information processing mechanism, etc.

[0133] In other possible implementations, even if the addressing switch modules 101 in multiple sub-pixels 10 reuse the same first driving module 20, the first driving module 20 may only need to receive the matrix control signal once in the same screen display cycle. For example, the first driving module 20 may receive a matrix control signal including the coordinate information of multiple sub-pixels 10, addressing switch identifiers, and grayscale information at the beginning of the screen display cycle, and then output timing signals according to the time-division multiplexing control requirements of the connected sub-pixels 10. This application does not impose strict limitations on this.

[0134] Please refer to Figure 10 below. Figure 10 is a cross-sectional schematic diagram of the pixel structure of a display panel 100 provided in an embodiment of this application. Optionally, according to some embodiments of this application, in order to sufficiently reduce the manufacturing complexity of the display panel 100, the display panel 100 may specifically include an array substrate and a light-emitting element layer 300 disposed along the thickness direction of the display panel 100. The first driving module 20 is located on the array substrate, and the light-emitting element D is located on the light-emitting element layer 300.

[0135] In this embodiment, the first driving module 20 is disposed on the array substrate and the light-emitting element D is disposed on the light-emitting element layer 300, which helps to ensure the reasonable layout of the first driving module 20 in the display panel 100 and helps to save process steps to a certain extent.

[0136] According to some embodiments of this application, optionally, and more specifically, as shown in FIG10, the array substrate includes: a substrate 400, a switching device layer 500, and a planarization layer 600.

[0137] The first driving module 20 is disposed on one side of the substrate 400 along the thickness direction of the display panel 100.

[0138] The switching device layer 500 is disposed on the side of the first driving module 20 away from the substrate 400 along the thickness direction of the display panel 100, and the switching device layer 500 includes addressing switching modules 101 in a plurality of sub-pixels 10.

[0139] The planarization layer 600 is disposed on the side of the switching device layer away from the substrate 400 along the thickness direction of the display panel 100.

[0140] According to some embodiments of this application, the array substrate may optionally include a shielding layer 700.

[0141] As shown in Figure 10, along the thickness direction of the display panel 100, this shielding layer 700 is located between the switching device layer and the first driving module 20.

[0142] In this embodiment, by adding a shielding layer 700 between the switching device layer and the first driving module 20, adverse interference from electrical signals generated by the driving IC and other components to the sub-pixel 10 can be avoided or reduced, which helps to further improve the display performance of the display panel 100. This shielding layer 700 can be one or more layers, and can be added or removed according to actual design requirements.

[0143] The inorganic film in the shielding layer 700 can be made of inorganic or organic materials such as SiNx (silicon nitride), SiOx (silicon monoxide), and polyimide. This embodiment does not impose strict limitations on this.

[0144] According to some embodiments of this application, optionally, and more specifically, in order to more fully guarantee the shielding effect of the shielding layer 700 against adverse interference, the shielding layer 700 may include: a first insulating shielding layer 701, a metal shielding layer 702, and a second insulating shielding layer 703 sequentially disposed along the thickness direction of the display panel 100.

[0145] In this embodiment, the first insulating shielding layer 701 and the second insulating shielding layer 703 may be made of insulating materials, and the metal shielding layer 702 may be made of Ag (silver), Cu (copper), Au (gold) or Mo (molybdenum), etc. This application is not limited thereto.

[0146] The metal layer pattern of the aforementioned metal shielding layer 702 can be a whole surface of metal or a patterned design. For example, FIG11 is a schematic diagram of the pattern of the metal shielding layer 701 of a display panel provided in an embodiment of this application.

[0147] As shown in Figure 11, considering the widespread application of flexible displays, the use of a full-surface metal shielding layer often leads to cracks in the metal layer during panel bending. Therefore, to fully meet the flexible bending requirements of the display panel, a metal mesh structure as shown in Figure 11 can be used to implement the aforementioned metal shielding layer 702, thereby reducing cracks in the bending area of ​​the display and thus benefiting flexible displays.

[0148] In addition, using a metal mesh as shown in Figure 11 to make the metal shielding layer 702 is also beneficial to the panel transmittance of the display panel and to achieving good light sensing, thereby helping the display panel to achieve effective driving control.

[0149] According to some embodiments of this application, optionally, please continue to refer to FIG10, more specifically, the addressing switch module 101 is electrically connected to the second pole of the corresponding light-emitting element D through a first conductive hole 801, and the addressing switch module 101 is electrically connected to the corresponding first driving module 20 through a second conductive hole 802; the second conductive hole 802 is not connected to the metal shielding layer 702.

[0150] In this embodiment, the first conductive hole 801 may be filled with a conductive material to enhance the current carrying capacity, and the outside of the first conductive hole 801 may be filled with an insulating material to shield interlayer crosstalk, thereby reducing or avoiding interference to the electrical signal to be conducted. Correspondingly, the second conductive hole 802 is similar to the first conductive hole 801, and will not be described in detail here.

[0151] It should be added that Figure 10 also shows the connection relationship between the control terminal (metal) of the addressing switch module 101 and the corresponding first drive module 20. The control terminal of the addressing switch module 101 and the corresponding first drive module 20 can be electrically connected through a via. This embodiment does not impose strict restrictions on this, and the specific connection can be set according to the control requirements of the first drive module 20.

[0152] According to some embodiments of this application, optionally, considering that each sub-pixel 10 includes an independent addressing switch module 101, and considering the limited wiring space within the panel, the addressing switch modules 101 can be arranged in layers within the switch device layer 500 to reduce lateral space occupation. Specifically, the switch device layer 500 may include multiple sub-switch device layers, which are sequentially arranged along the thickness direction of the display panel 100.

[0153] Addressing switch modules 101, which have at least two sub-pixels among multiple sub-pixels 10, are disposed in the same sub-switch device layer.

[0154] As shown in Figure 10, the switching device layer 500 may specifically include sub-switching device layer 1 (503), ..., sub-switching device layer n-1 (502), and sub-switching device layer n (503), etc. In this embodiment, the sub-switching device layers may be laid with insulating material to better facilitate the placement of the addressing switch module 101 between layers.

[0155] In a specific implementation, by setting the addressing switch modules 101 of at least two sub-pixels in the same sub-switching device layer, the horizontal space occupied by the addressing switch modules 101 in the switching device layer 500 can be significantly reduced, thus effectively saving panel wiring space.

[0156] According to some embodiments of this application, optionally, considering the array arrangement of sub-pixels 10 in the display panel 100, in order to more reasonably realize the layered setting of the addressing switch module 101, the display panel 100 includes multiple pixel rows, and any pixel row may include multiple sub-pixels 10.

[0157] The addressing switch modules 101 of sub-pixels 10 in the same pixel row are all set in the same sub-switch device layer.

[0158] In this embodiment, considering the actual sub-pixel distribution, the sub-switching device layer in the switching device layer 500 can be divided into n layers according to the number of sub-pixel rows n, where n≥1. The film thickness of each sub-switching device layer is between 50 and 10000nm, so as to fully save the wiring space in the panel.

[0159] According to some embodiments of this application, optionally, please continue to refer to FIG10, in order to facilitate the effective driving of the light-emitting element D to emit light, the light-emitting element layer 300 may include a first electrode layer (ELVSS), the light-emitting element D and the second electrode layer (ELVDD) arranged sequentially along the thickness direction of the display panel 100.

[0160] Based on the display panel provided in any of the above embodiments, correspondingly, this application also provides a driving method for a display panel, applied to the display panel provided in any of the foregoing embodiments of this application. Please refer to FIG12 below. FIG11 is a schematic diagram of the metal shielding layer pattern of a display panel provided in an embodiment of this application. As shown in FIG12, the driving method for the display panel includes:

[0161] S1201, an addressing switch control signal is provided to the control signal terminal of the first driving module to control the addressing switch module in the target sub-pixel to be turned on or off; and a second power supply voltage signal is provided to the second power supply voltage signal output terminal of the first driving module to transmit the second power supply voltage signal to the second electrode of the light-emitting element in the target sub-pixel; wherein, the second power supply voltage signal is a variable voltage signal.

[0162] This application embodiment drives the light-emitting element to emit light by controlling the on or off of the addressing switch module and controlling the second power supply voltage signal with adjustable data voltage value. This is beneficial to fully realize the simplified design of the pixel circuit structure, effectively reduce the complexity of the pixel structure of the display panel, free up display panel space, and help to achieve narrow bezel or bezel-less effect.

[0163] For the sake of brevity, the specific implementation process of S1201 can be found in the corresponding description above, and will not be repeated here.

[0164] According to some embodiments of this application, optionally, before providing the addressing switch control signal to the control signal terminal of the first driving module and before providing the second power supply voltage signal to the second power supply voltage signal output terminal of the first driving module, the driving method of the display panel further includes:

[0165] Obtain the matrix control signals of the sub-pixels in the display panel;

[0166] Based on the matrix control signal, determine the addressing switch control signal and the second power supply voltage signal corresponding to the target sub-pixel.

[0167] In this embodiment, the first driving module is specifically limited to acquiring the matrix control signal before controlling and driving the sub-pixels, and determining the addressing switch control signal and the second power supply voltage signal based on the matrix control signal.

[0168] This facilitates the more rational provision of address switch control signals to the control signal terminal of the first drive module, and the provision of second power supply voltage signals to the second power supply voltage signal output terminal of the first drive module.

[0169] According to some embodiments of this application, optionally, in order to more reasonably determine the required output addressing switch control signal and second power supply voltage signal based on the matrix control signal, the matrix control signal includes at least the coordinate information of K sub-pixels, the addressing switch identifier, and the target grayscale information, where K is a positive integer; the K sub-pixels may include at least the target sub-pixel;

[0170] Based on the matrix control signal, determine the addressing switch control signal and the second power supply voltage signal for the target sub-pixel, including:

[0171] The coordinate information of the target sub-pixel is compared with the coordinate information of multiple sub-pixels respectively to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel;

[0172] Based on the addressing switch identifier corresponding to the target sub-pixel, determine the addressing switch control signal corresponding to the addressing switch identifier;

[0173] Based on the preset correspondence between grayscale information and the second power supply voltage signal, the second power supply voltage signal that matches the target grayscale information corresponding to the target sub-pixel is determined.

[0174] In practice, after acquiring the matrix control signal containing the coordinate information of K sub-pixels, the addressing switch identifier, and the target grayscale information, the coordinate information of each of the K sub-pixels is compared and searched according to the coordinate information of the target sub-pixel. This process identifies the sub-pixel whose coordinate information matches the pre-stored target sub-pixel coordinate information; this sub-pixel is then identified as the target sub-pixel. Once the coordinate information of the target sub-pixel is found, the associated addressing switch identifier and target grayscale information can be determined.

[0175] In this case, based on the addressing switch identifier corresponding to the target sub-pixel, an addressing switch control signal corresponding to the addressing switch identifier is provided to the control signal of the first driving module to control the addressing switch module in the target sub-pixel to be turned on or off.

[0176] Furthermore, based on the preset correspondence between grayscale information and the second power supply voltage signal, a second power supply voltage signal matching the target grayscale information is determined, and the second power supply voltage signal is provided to the second power supply voltage signal output terminal of the first driving module to transmit the second power supply voltage signal to the second pole of the light-emitting element in the target sub-pixel.

[0177] According to some embodiments of this application, optionally, in conjunction with the array arrangement of the sub-pixels of the display panel, in order to make full use of the coordinate information of the above K sub-pixels to realize the coordinate positioning of the target sub-pixel, the coordinate information of the above K sub-pixels specifically includes the row coordinate information and column coordinate information of n*m sub-pixels, where n and m are both positive integers, and the values ​​of n and m are related to the resolution of the display panel.

[0178] The coordinate information of the target sub-pixel is compared with the coordinate information of multiple sub-pixels to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel, including:

[0179] The row coordinates of the target sub-pixel are compared with the row coordinates of the n*m ​​sub-pixels, and the column coordinates of the target sub-pixel are compared with the column coordinates of the n*m ​​sub-pixels to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel.

[0180] For example, the coordinate information of the target sub-pixel may specifically include: the sub-pixel row coordinate "0x01" and the sub-pixel column coordinate "0x07". In this way, by searching for the sub-pixel with row coordinate "0x01" and the sub-pixel with column coordinate "0x07" among the row coordinate information of n*m sub-pixels, the target sub-pixel can be accurately locked, which helps to fully realize precise control of different sub-pixels and improve the display accuracy of the display panel.

[0181] Optionally, according to some embodiments of this application, and considering the actual display scenario, in order to fully improve the reliability of the matrix control signal, before obtaining the matrix control signal of the sub-pixels in the display panel, the driving method of the display panel further includes:

[0182] Obtain the display signal of the target screen input from the motherboard;

[0183] The matrix control signal is determined based on the display signal.

[0184] In this embodiment, before obtaining the matrix control signal, it is necessary to first obtain the display signal of the target screen input by the motherboard. The aforementioned display signal may be, for example, information such as the chroma, brightness, or grayscale of each pixel in the target screen, and this embodiment does not impose strict limitations on this.

[0185] After obtaining the display signal of the target image, for example, the coordinate information, addressing switch identifier and grayscale information of each sub-pixel in the pixel array (the array size is related to the display resolution) can be obtained by converting the display signal, thereby determining the matrix control signal.

[0186] According to some embodiments of this application, optionally, in order to fully realize effective display control of the display panel, obtaining the matrix control signal of the sub-pixels in the display panel includes:

[0187] Upon reaching the start node of the preset time interval, a matrix control signal is obtained; the preset time interval is determined based on the refresh rate information of the display panel.

[0188] In this embodiment, the transmission and acquisition of matrix control signals are limited to the panel refresh rate. This is beneficial for achieving orderly driving control of sub-pixels of the display panel and avoiding display deviation caused by confusion of matrix control signals corresponding to adjacent frames.

[0189] According to some embodiments of this application, optionally, when the first driving module is multiplexed by the addressing switch module in multiple sub-pixels, it is also necessary to consider combining the conduction duty cycle settings of different sub-pixels in a screen display cycle to send the matrix control signal.

[0190] Based on this, when the same first driving module is electrically connected to at least two sub-pixels, the preset time interval is determined based on the refresh rate information of the display panel and the duty cycle of the addressing switch modules in the at least two sub-pixels in one screen display cycle.

[0191] For the sake of brevity, the specific implementation process of this embodiment can be referred to the corresponding description in the preceding text, and will not be repeated here.

[0192] The driving method for the display panel provided in this application embodiment has the beneficial effects of the display panel 100 provided in this application embodiment. For details, please refer to the specific description of the display panel 100 in the above embodiments. This embodiment will not repeat the description here.

[0193] Based on the display panel provided in the above embodiments, this application also provides a display device, including the display panel provided in this application. Please refer to FIG13, which is a structural schematic diagram of a display device provided in an embodiment of this application. The display device 1000 provided in FIG13 includes the display panel 100 provided in any of the above embodiments of this application. FIG13 uses a mobile phone as an example to illustrate the display device 1000. It can be understood that the display device provided in the embodiments of this application can be other display devices with display functions, such as wearable products, computers, televisions, and vehicle display devices. This application does not impose specific limitations on these. The display device provided in the embodiments of this application has the beneficial effects of the display panel 100 provided in the embodiments of this application. For details, please refer to the specific descriptions of the display panel 100 in the above embodiments. These descriptions will not be repeated here.

[0194] It should be understood that the specific circuit structures and cross-sectional structures of the display panels provided in the accompanying drawings of the embodiments of this application are merely examples and are not intended to limit this application. Furthermore, the above embodiments provided in this application can be combined with each other unless there is contradiction.

[0195] It should be clarified that the various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on describing the differences from other embodiments. According to the embodiments described above, these embodiments do not exhaustively describe all details, nor do they limit this application to only the specific embodiments described. Obviously, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to make good use of this application and modifications based on it. This application is limited only by the claims and their full scope and equivalents.

[0196] Those skilled in the art should understand that the above embodiments are exemplary and not restrictive. Different technical features appearing in different embodiments can be combined to achieve beneficial effects. Based on a study of the drawings, specification, and claims, those skilled in the art should be able to understand and implement other variations of the disclosed embodiments. In the claims, the term "comprising" does not exclude other means or steps; "article" without the use of a quantifier is intended to include one or more articles and can be used interchangeably with "one or more articles"; the terms "first" and "second" are used to identify names and not to indicate any particular order. Any reference numerals in the claims should not be construed as limiting the scope of protection. The functionality of multiple parts appearing in the claims can be implemented by a single hardware or software module. The appearance of certain technical features in different dependent claims does not mean that these technical features cannot be combined to achieve beneficial effects.

Claims

1. A display panel, the display panel comprising an array of sub-pixels; the sub-pixels comprising: A light-emitting element, wherein the first electrode of the light-emitting element is electrically connected to a first power supply voltage signal terminal; An addressing switch module is provided, wherein the control terminal of the addressing switch module is electrically connected to the control signal terminal of the first driving module, the first terminal of the addressing switch module is electrically connected to the second power supply voltage signal output terminal of the first driving module, and the second terminal of the addressing switch module is electrically connected to the second electrode of the light-emitting element. The addressing switch module is turned on or off under the control of the control signal terminal of the first driving module. When the addressing switch module is turned on, the second power supply voltage signal of the second power supply voltage signal output terminal of the first driving module is transmitted to the second electrode of the light-emitting element through the addressing switch module; wherein, the second power supply voltage signal output by the second power supply voltage signal output terminal is a variable voltage signal.

2. The display panel according to claim 1, wherein, X sub-pixels form a sub-pixel group. The addressing switch module in the same sub-pixel group is electrically connected to the same first driving module. The addressing switch modules in different sub-pixel groups are electrically connected to different first driving modules. X is a positive integer.

3. The display panel according to claim 1, wherein, X＝1。 4. The display panel according to claim 1, wherein, The first drive module includes multiple control signal terminals and multiple second power supply voltage signal output terminals; The control terminals of the addressing switch modules in at least two of the sub-pixels are electrically connected to different control signal terminals of the same first driving module; The first terminal of the addressing switch module in at least two of the sub-pixels is electrically connected to different second power supply voltage signal output terminals of the same first driving module.

5. The display panel according to claim 1, wherein, The first driving module is electrically connected to the second driving chip; The first driving module is used to receive the matrix control signal from the second driving chip, and provide an addressing switch control signal to the control signal terminal according to the matrix control signal to control the addressing switch module to be turned on or off; and provide the second power supply voltage signal to the second power supply voltage signal output terminal according to the matrix control signal to transmit the second power supply voltage signal to the second electrode of the light-emitting element.

6. The display panel according to claim 1, wherein, The first driving module is used to receive a matrix control signal; the matrix control signal includes coordinate information corresponding to K sub-pixels, an addressing switch identifier, and target grayscale information, where K is a positive integer; the K sub-pixels include at least the target sub-pixel; The first driving module includes: Addressing signal module, the addressing signal module is used to set the corresponding target sub-pixel The coordinate information is compared with the coordinate information corresponding to the K sub-pixels to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel; A power control module is configured to output an address switch control signal corresponding to the address switch identifier to the control signal terminal according to the address switch identifier corresponding to the target sub-pixel, so as to control the address switch module in the target sub-pixel to be turned on or off. The data conversion module is used to determine the second power supply voltage signal that matches the target grayscale information corresponding to the target sub-pixel according to the preset correspondence between grayscale information and the second power supply voltage signal, and transmit the second power supply voltage signal corresponding to the target grayscale information to the second power supply voltage signal output terminal.

7. The display panel according to claim 5, wherein, The second driver chip includes: A signal conversion module is used to acquire the display signal of the target screen input by the motherboard, and determine the matrix control signal based on the display signal; A data storage module is provided, which is used to receive the matrix control signal transmitted by the signal conversion module and store the matrix control signal. A timing control module is used to retrieve the matrix control signal from the data storage module and send the matrix control signal to the first driving module when the start node of a preset time interval is reached; the preset time interval is determined based on the refresh rate information of the display panel.

8. The display panel according to claim 7, wherein, When the first driving module is electrically connected to at least two of the sub-pixels, the preset time interval is determined based on the refresh rate information of the display panel and the duty cycle of the addressing switch modules in the at least two sub-pixels in one screen display cycle.

9. The display panel according to claim 1, wherein, The sub-pixel also includes a storage module; The first end of the storage module is electrically connected to the second electrode of the light-emitting element, and the second end of the storage module is electrically connected to the second end of the addressing switch module; The storage module is used to store charge when the addressing switch module is turned on, and to provide the stored charge to the second electrode of the light-emitting element when the addressing switch module is turned off.

10. The display panel according to claim 9, wherein, The storage module includes a storage capacitor; The capacitance of the storage capacitor is determined based on the refresh rate of the display panel, the resolution of the display panel, and the equivalent resistance of the light-emitting element.

11. The display panel according to claim 1, wherein, The control terminals of the addressing switch modules in the N sub-pixels are respectively electrically connected to the corresponding M gating signal lines, and the M gating signal lines are respectively electrically connected to the M control signal terminals of the same first driving module; M is a positive integer less than or equal to N, and M is greater than 1; The first terminal of each of the addressing switch modules in the N sub-pixels is electrically connected to the second power supply voltage signal output terminal of the same first driving module.

12. The display panel according to claim 11, wherein, The N sub-pixels include a first sub-pixel and a second sub-pixel, and the M gating signal lines include a first gating signal line and a second gating signal line; The first sub-pixel is used to emit light to display a first color, and the second sub-pixel is used to emit light to display a second color; The control terminal of the addressing switch module in the first sub-pixel is electrically connected to the first strobe signal line, and the control terminal of the addressing switch module in the second sub-pixel is electrically connected to the second strobe signal line.

13. The display panel according to claim 12, wherein, During one display cycle, the addressing switch modules in N sub-pixels are turned on in a time-division manner; The first driving module is used to provide the second power supply voltage signal with the same or different voltage values ​​to the first terminal of the addressing switch module according to the duty cycle of the addressing switch module in the N sub-pixels.

14. The display panel according to claim 1, wherein, The display panel includes an array substrate and a light-emitting element layer disposed along the thickness direction of the display panel; the first driving module is located on the array substrate, and the light-emitting element is located on the light-emitting element layer.

15. The display panel according to claim 14, wherein, The array substrate includes: a substrate, wherein the first driving module is disposed on one side of the substrate along the thickness direction of the display panel; A switching device layer is disposed on the side of the first driving module away from the substrate along the thickness direction of the display panel, and the switching device layer includes the addressing switch module among the plurality of sub-pixels; A planarization layer is disposed on the side of the switching device layer away from the substrate along the thickness direction of the display panel.

16. The display panel according to claim 15, wherein, The array substrate further includes a shielding layer; The shielding layer is located between the switching device layer and the first driving module along the thickness direction of the display panel.

17. The display panel according to claim 16, wherein, The shielding layer includes: A first insulating shielding layer, a metal shielding layer, and a second insulating shielding layer are sequentially disposed along the thickness direction of the display panel.

18. The display panel according to claim 17, wherein, The addressing switch module is electrically connected to the second electrode of the corresponding light-emitting element through a first conductive hole, and the addressing switch module is electrically connected to the corresponding first driving module through a second conductive hole; The second conductive hole is not connected to the metal shielding layer.

19. The display panel according to claim 15, wherein, The switching device layer includes multiple sub-switching device layers, which are arranged sequentially along the thickness direction of the display panel. The addressing switch modules of at least two of the sub-pixels are disposed in the same sub-switch device layer.

20. The display panel according to claim 19, wherein, The display panel includes multiple pixel rows, and each pixel row includes multiple sub-pixels; The addressing switch modules of the sub-pixels in the same pixel row are all located in the same sub-switch device layer.

21. The display panel according to claim 14, wherein, The light-emitting element layer includes a first electrode layer, the light-emitting element, and a second electrode layer, which are sequentially disposed along the thickness direction of the display panel.

22. A driving method for a display panel, applied to the display panel as described in any one of claims 1-21, the driving method comprising: Provide an addressing switch control signal to the control signal terminal of the first driving module to control the addressing switch module in the target sub-pixel to be turned on or off; In addition, a second power supply voltage signal is provided to the second power supply voltage signal output terminal of the first driving module to transmit the second power supply voltage signal to the second electrode of the light-emitting element in the target sub-pixel; wherein the second power supply voltage signal is a variable voltage signal.

23. The driving method according to claim 22, wherein, Before providing the addressing switch control signal to the control signal terminal of the first drive module, and before providing the second power supply voltage signal to the second power supply voltage signal output terminal of the first drive module, the method further includes: Obtain the matrix control signals of the sub-pixels in the display panel; Based on the matrix control signal, the addressing switch control signal and the second power supply voltage signal corresponding to the target sub-pixel are determined.

24. The driving method according to claim 23, wherein, The matrix control signal includes at least the coordinate information of K sub-pixels, addressing switch identifiers, and target grayscale information, where K is a positive integer; the K sub-pixels include at least the target sub-pixel; Based on the matrix control signal, the addressing switch control signal and the second power supply voltage signal of the target sub-pixel are determined, including: The coordinate information of the target sub-pixel is compared with the coordinate information corresponding to the plurality of sub-pixels respectively to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel; Based on the addressing switch identifier corresponding to the target sub-pixel, determine the addressing switch control signal corresponding to the addressing switch identifier; Based on the preset correspondence between grayscale information and the second power supply voltage signal, the second power supply voltage signal that matches the target grayscale information corresponding to the target sub-pixel is determined.

25. The driving method according to claim 24, wherein, The coordinate information of the K sub-pixels includes the row coordinate information and column coordinate information of n*m sub-pixels, where n and m are both positive integers, and the values ​​of n and m are related to the resolution of the display panel. The step of comparing the coordinate information of the target sub-pixel with the coordinate information corresponding to the plurality of sub-pixels respectively to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel includes: The row coordinates of the target sub-pixel are compared with the row coordinates of the n*m ​​sub-pixels, and the column coordinates of the target sub-pixel are compared with the column coordinates of the n*m ​​sub-pixels, in order to determine the addressing switch identifier and target grayscale information corresponding to the target sub-pixel.

26. The driving method according to claim 23, wherein, Before acquiring the matrix control signal of the sub-pixels in the display panel, the method further includes: Obtain the display signal of the target screen input from the motherboard; The matrix control signal is determined based on the display signal.

27. The driving method according to claim 26, wherein, The step of obtaining the matrix control signal of the sub-pixels in the display panel includes: When the starting node of the preset time interval is reached, the matrix control signal is obtained; the preset time interval is determined based on the refresh rate information of the display panel.

28. The driving method according to claim 27, wherein, When the first driving module is electrically connected to at least two of the sub-pixels, the preset time interval is determined based on the refresh rate information of the display panel and the duty cycle of the addressing switch modules in the at least two sub-pixels in one screen display cycle.

29. A display device comprising a display panel as described in any one of claims 1-21.

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