System and method for spectral use analysis

Abstract

A system and method for spectral use analysis. In some embodiments, a method includes: analyzing spectrum use, based on a first array of samples, by a system including an accelerator. The accelerator may include a stored-program computer. The analyzing may include executing, by the accelerator, first instructions. The first instructions may correspond to a first node of a first analysis tree, and the first instructions may include instructions for processing the first array of samples.

Description

SYSTEM AND METHOD FOR SPECTRAL USE ANALYSISCROSS-REFERENCE TO RELATED APPLICATION(S)

[0001] The present application claims priority to and the benefit of U.S. Provisional Application No. 63 / 639,244, filed 04 / 26 / 2024, entitled "WIDE-BAND SPECTRUM SENSING", the entire content of which is incorporated herein by reference.FIELD

[0002] One or more aspects of embodiments according to the present disclosure relate to electromagnetic environment characterization, and more particularly to a system and method for spectral use analysis.BACKGROUND

[0003] Electromagnetic radiation may be used for various applications, including communications and sensing. In some circumstances it may be advantageous to adjust the spectrum use of a system to avoid interference with other systems.

[0004] It is with respect to this general technical environment that aspects of the present disclosure are related.SUMMARY

[0005] According to an embodiment of the present disclosure, there is provided a method, including: analyzing spectrum use, based on a first array of samples, by a system including an accelerator, the accelerator including a stored-program computer, the analyzing including executing, by the accelerator, first instructions, the first instructions corresponding to a first node of a first analysis tree, the first instructions including instructions for processing the first array of samples.

[0006] In some embodiments, the method further includes executing, based on a result of the executing of the first instructions, second instructions, the second instructions corresponding to a second node of the first analysis tree.

[0007] In some embodiments, the executing of the first instructions includes executing the first instructions by a first portion of the accelerator, and the executing ofthe second instructions includes executing the second instructions by a second portion of the accelerator.

[0008] In some embodiments, the method further includes loading, based on the result, the second instructions into the second portion of the accelerator.

[0009] In some embodiments, the method further includes selecting, by a scheduler, the second portion of the accelerator, for executing the second instructions.

[0010] In some embodiments, the executing of the first instructions includes executing the first instructions by a first portion of the accelerator, and the executing of the second instructions includes executing the second instructions by the first portion of the accelerator.

[0011] In some embodiments, the accelerator includes a stored-program computer including a program counter configured to be written externally.

[0012] In some embodiments, the accelerator includes a deterministic sequence stored-program computer.

[0013] In some embodiments, the accelerator includes a non-conditional-branching stored-program computer.

[0014] In some embodiments, the accelerator includes a non-branching stored- program computer.

[0015] In some embodiments, the system further includes a control processor, and the method further includes selecting, by the control processor, the first analysis tree.

[0016] In some embodiments, the method further includes selecting, based on a result of the executing of the first instructions, a second analysis tree, and executing, by the accelerator, instructions corresponding to a first node of the second analysis tree.

[0017] In some embodiments, the method further includes channelizing a received signal into a plurality of sub-bands, wherein the first array of samples includes samples of a first signal, within a first sub-band of the sub-bands, the first sub-band having a width different from a width of a second sub-band of the sub-bands.

[0018] In some embodiments, the first sub-band has a width greater than a width of the second sub-band by at least a factor of 10.

[0019] In some embodiments: the executing of the first instructions includes executing the first instructions by a first portion of the accelerator; the analyzing includingexecuting, by the accelerator, third instructions; the third instructions correspond to a node of a third analysis tree; the third instructions include instructions for processing a second array of samples; the second array of samples includes samples of a second signal, within the second sub-band; the executing of the third instructions includes executing the third instructions by a third portion of the accelerator; the first portion of the accelerator consists of a first set of processing elements; the third portion of the accelerator consists of a third set of processing elements; and the third set of processing elements contains fewer processing elements than the first set of processing elements.

[0020] In some embodiments, the method further includes: determining, based on a result of the executing of the first instructions, that the first signal does not have power exceeding a threshold, and terminating analysis of the first signal.

[0021] In some embodiments: the channelizing of the received signal includes channelizing the received signal by a preprocessing accelerator, and the method further includes dividing, based on based on a result of the executing of the first instructions, the first sub-band into a plurality of sub-bands.

[0022] In some embodiments, the dividing of the first sub-band includes dividing the first sub-band by reconfiguring the channelizer.

[0023] In some embodiments, the dividing of the first sub-band includes dividing the first sub-band by an auxiliary channelizer.

[0024] In some embodiments, the first instructions cause the accelerator to perform an operation selected from the group consisting of transformation, classification, estimation, and combinations thereof.

[0025] According to an embodiment of the present disclosure, there is provided a system, including: a control processor, and an accelerator including a stored-program computer, the system being configured to analyze spectrum use, the analyzing including executing, by the accelerator, first instructions, the first instructions corresponding to a first node of a first analysis tree, the first instructions including instructions for processing a first array of samples.

[0026] In some embodiments, the accelerator is configured to execute, based on a result of the executing of the first instructions, second instructions, the second instructions corresponding to a second node of the first analysis tree.

[0027] In some embodiments, the executing of the first instructions includes executing the first instructions by a first portion of the accelerator, and the executing of the second instructions includes executing the second instructions by a second portion of the accelerator.

[0028] In some embodiments, the executing of the first instructions includes executing the first instructions by a first portion of the accelerator, and the executing of the second instructions includes executing the second instructions by the first portion of the accelerator.

[0029] In some embodiments, the accelerator includes a stored-program computer including a program counter configured to be written externally.

[0030] In some embodiments, the accelerator includes a deterministic sequence stored-program computer.

[0031] In some embodiments, the accelerator includes a non-conditional-branching stored-program computer.

[0032] In some embodiments, the accelerator includes a non-branching stored- program computer.BRIEF DESCRIPTION OF THE DRAWINGS

[0033] These and other features and advantages of the present disclosure will be appreciated and understood with reference to the specification, claims, and appended drawings wherein:

[0034] FIG. 1 A is a system level block diagram, according to an embodiment of the present disclosure;

[0035] FIG. 1 B is a system level block diagram, according to an embodiment of the present disclosure;

[0036] FIG. 2A is an operating diagram including a channelizer and an analysis tree, according to an embodiment of the present disclosure;

[0037] FIG. 2B is diagram of an analysis tree, according to an embodiment of the present disclosure;

[0038] FIG. 2C is diagram of an analysis tree, according to an embodiment of the present disclosure;

[0039] FIG. 2D is diagram of an analysis tree, according to an embodiment of the present disclosure;

[0040] FIG. 2E is diagram of an analysis tree, according to an embodiment of the present disclosure;

[0041] FIG. 3A is an operating diagram including a channelizer and an analysis tree, according to an embodiment of the present disclosure; and

[0042] FIG. 3B is an operating diagram including a channelizer and an analysis tree, according to an embodiment of the present disclosure.DETAILED DESCRIPTION

[0043] The detailed description set forth below in connection with the appended drawings is intended as a description of exemplary embodiments of a system and method for spectral use analysis provided in accordance with the present disclosure and is not intended to represent the only forms in which the present disclosure may be constructed or utilized. The description sets forth the features of the present disclosure in connection with the illustrated embodiments. It is to be understood, however, that the same or equivalent functions and structures may be accomplished by different embodiments that are also intended to be encompassed within the scope of the disclosure. As denoted elsewhere herein, like element numbers are intended to indicate like elements or features.

[0044] In systems using electromagnetic radiation, such as communications systems, or sensing systems (e.g., radar) it may be advantageous to configure the use of the electromagnetic spectrum so as to avoid interference with other systems. For example, it may be advantageous for a communications system to pause its operation, or to move to a different band of the spectrum, while a nearby radar system is transmitting a pulse, to avoid the communications’ being interfered with. Similarly, it may be advantageous for a radar system to adjust its operations to avoid interfering with the operations of communications systems. As electronic systems become more advanced, it may be that the use of spectrum will continue to become more dynamic, and that the regions of the spectrum available to any system may vary frequently and rapidly. Mobile phone systems, for example, may continue to have use for increasing bandwidth anddata rates, and may benefit from an ability to rapidly take advantage of windows (unused regions of the spectrum) that may occasionally become available.

[0045] To adapt to a changing environment of spectral use by other systems, it may be advantageous for a system to (i) rapidly analyze spectral use by other systems, in real time and to (ii) adjust its use of the spectrum accordingly As such, some embodiments provide a system and method for spectral use analysis that is capable of rapidly generating models of the spectral use of other users.

[0046] FIG. 1A shows the hardware of such a system for spectral use analysis, in some embodiments. The system includes one or more array processors 105 (each of which may be or include a configurable accelerator), including an array of processing elements, which is configurable to perform any of a number of signal processing and signal analysis tasks, as discussed in further detail below. The system may further include a radio frequency (RF) front end 110, which may include one or more receiving chains, each of which may include a receiving antenna (e.g., an omnidirectional antenna, or an antenna (e.g., an array antenna) with one or more beams in the direction of which the antenna has increased gain) or antenna element, a low noise amplifier, a downconverter, and an analog to digital converter.

[0047] As illustrated in FIG. 1A, digital samples (each of which may be a complex number including a real part equal to an in-phase (I) component of the received signal and an imaginary part equal to the quadrature (Q) component of the received signal) may be fed to a first array processor 105, then from the first array processor 105 to a second array processor 105, and then from the second array processor 105 to a third array processor 105. Each of the array processors 105 may, as mentioned above, perform signal processing and signal analysis tasks based on the data it receives. FIG. 1 A shows three array processors 105; some embodiments have more or fewer; however, each of the blocks shown in FIG. 1A, except for the RF front end 110, may be a processing circuit.

[0048] Each array processor 105 may include an internal memory 115 and be connected to a local memory 120 and, through an interconnect 125, to a system memory 130. Each of the processing elements of each of the array processors 105 may include (e.g., consist of) two or more sub-processing elements; for example, a processingelement may include (i) a complex multiply and accumulate circuit for performing mathematical computations such as multiplication and addition on real and complex numbers (ii) a memory circuit, which may also be referred to as intelligent storage, and which may be configured to store 32-bit complex data, (iii) a coordinate rotation digital compute (CORDIC) and division circuit (which may be referred as a CORDIV (CORDIC + DIV) circuit), which may handle CORDIC and division operations, and (iv) a logic circuit, which may include gates for performing logical operations. Each sub-processing element may be a stored-program computer. In some embodiments, each subprocessing element is a deterministic sequence stored-program computer such as a non-conditional-branching stored-program computer (e.g., a non-branching stored- program computer). As used herein, a “deterministic sequence stored-program computer” is a stored-program computer for which the sequence of instructions that will be performed is known before execution begins (e.g., because the computer does not support conditional branching instructions). As used herein, a “non-conditional- branching stored-program computer” is a stored-program computer which does not support conditional branching instructions. As used herein, a “non-branching stored- program computer” is a stored-program computer which does not support branching instructions. As such, a non-branching stored-program computer is an example of a non- conditional-branching stored-program computer, which is an example of a deterministic sequence stored-program computer. The use of a deterministic sequence stored- program computer in each sub-processing element may facilitate the synchronization of communications between the sub-processing elements and between the processing elements.

[0049] A program launcher 135 may be connected to each array processor 105 as shown. Each program launcher may load instructions into the instruction memory of the corresponding array processor 105. In some embodiments, the program counter (or program counters) of the array processor 105 are configured to be written (e.g., overwritten) externally, so that an external circuit may cause, e.g., a processing element of the array processor 105 to begin executing instructions at a specified location in the instruction memory. The program launcher 135 may control the execution of the array processor 105, e.g., by overwriting one or more program counters of the array processor105, or using vectored interrupts. One or more accelerators 140 (e.g., fast Fourier transform (FFT) accelerators, finite impulse response (FIR) filter accelerators, or deep neural network (DNN) accelerators) may also be connected to the other elements of the system through the interconnect 125. A control processor 145 (which may be a general purpose processor (e.g., an advanced reduced instruction set computer (RISC) machine (ARM) processor) may manage and supervise the operation of the system and method for spectral use analysis. The control processor 145 may be a general-purpose stored- program computer (e.g., a stored-program computer that (i) supports conditional branching and (ii) does not support external writing (e.g., overwriting) of its program counter).

[0050] The first (leftmost) one of the array processors 105 may perform preprocessing of the received signal, and may be configured for efficiently performing such preprocessing. As such, it may be referred to as a preprocessing array processor 105. The preprocessing may involve dividing the received frequency band into a plurality of sub-bands, by a circuit element, of the preprocessing array processor 105, that may be referred to as a channelizer, or as a polyphase channelizer. The polyphase channelizer may include a plurality of FIR filters and a plurality of digital down-converters (e.g., one of each per sub-band), and it may produce a stream of complex numbers corresponding to I and Q baseband samples within each sub-band. The channelizer may be configurable, e.g., the center frequency and width of each sub-band may be independently configured by the control processor 145 (e.g., the widths may be different, e.g., arbitrary).

[0051] FIG. 1 B shows an embodiment including the elements shown in FIG. 1 A, and also including a plurality of buffering and switching circuits 150, a set of buffers 155, a direct memory access (DMA) controller 160, an intelligent scheduler 165, and an external host interface 170. Some or all of the components of FIG. 1 B may be fabricated as a system on a chip (SoC).

[0052] In some embodiments, the RF front end 110 does not perform downconversion. In some embodiments, the RF front end 110 performs other functions not listed above. For example, the RF front end 110 may perform preliminary spectralanalysis (e.g., using an FFT) for the purpose of making an initial determination of the sub-bands to be used by the channelizer.

[0053] In operation, spectral use analysis may be performed using one or more trees that may be referred to as analysis trees or decision trees. In such a tree each node may perform one or more of (i) transformation, (ii) classification, or (iii) estimation. Each edge of the tree may correspond to a transition, in the analysis, to another node. Once the execution of a node is complete, the output of the node may be one or more of (i) transformed data, (ii) a subsequent node identifier, identifying a node to be executed next, and (iii) estimated parameters.

[0054] FIG. 2A shows an example of a channelizer (e.g., a polyphase channelizer) with one sub-band output connected to a tree. In some embodiments several of the outputs of the channelizer are fed to different respective analysis trees, which may be executed in parallel (e.g., in different array processors 105 or in different portions of an array processor 105). The widths of the sub-bands, and the corresponding sample rates, may vary significantly (e.g. , a first sub-band may have a width that is greater than a width of a second sub-band by a factor of up to 10, or more (e.g., by a factor of between 2 and 10,000)). For example, one sub-band may have a width of 1 MHz and a second subband may have a width of 5 GHz. In such a situation, the processing resources allocated to the sub-band may vary accordingly; for example, a larger number of processing elements may be allocated to a wider sub-band than to a narrower sub-band. In FIG. 2A only one of the analysis trees (corresponding to one of the sub-bands) is shown, for ease of illustration. The tree used for any of the sub-bands of the channelizer may be selected based on typical use of the sub-band. For example, a tree suitable for detecting and analyzing radar signals may be used for a sub-band that is commonly used for radar, and a tree suitable for detecting and analyzing cellular communication signals may be used for a sub-band that is commonly used for cellular communications. When it is determined that a tree is to be loaded into one or more of the array processors 105, the scheduler 165 may identify resources (e.g., one or more portions of the one or more of the array processors 105) that are available for executing the tree, and the control processor 145 and the program launcher 135 may then use those resources to execute the tree. The scheduler 165 may optimize the resource management and placement ofnodes in the accelerator based on the control processor assignments. The stream of complex samples may be separated into groups referred to as frames. Each frame may be a set (e.g., a vector) of (e.g., 256) consecutive samples; the data may be processed by the node or nodes one frame at a time.

[0055] The tree of FIG. 2A includes three energy detecting nodes. Each of these nodes may be a classification node, which classifies a frame as (i) containing energy exceeding a threshold value or (ii) not containing energy exceeding the threshold value. The energy detection may involve calculating the square of the magnitude of each complex sample (e.g., adding the squares of the real and imaginary parts), and summing the squares of the magnitudes. Energy detection may be performed for one or more antennas (or “channels”); in the example of FIG. 2A it is performed for one channel, then for 4 channels, and then for 8 channels. Energy detection with multiple channels may involve receiving, and processing, a plurality of frames together (e.g., one frame per antenna). To process multiple frames from multiple corresponding antenna elements, the frames may be added, sample-wise, in amplitude (which may correspond to beamforming for a narrow, high-gain beam, for example, if the antennas are elements arranged in a plane, with equal-delay feeds). In some embodiments each frame is multiplied by a different complex number to achieve different beam forming (e.g., to generate an off-axis receive beam). In some embodiments, multi-channel energy detection is more sensitive and more computationally costly than single-channel energy detection.

[0056] As shown in FIG. 2A, each energy detecting node may generate, upon completing execution, a “case 1” subsequent node identifier, if the energy exceeds the threshold, or a “case 2” identifier, if the energy is less than the threshold. In the example of FIG. 2A, each energy detecting node transitions to the kurtosis detecting node for case 1 and (i) to another energy detecting node or to a “no source” exit from the tree for case 2. As used herein, a “source” is (i) a source of electromagnetic radiation of a particular type, e.g., a cellular network tower, or a WiFi access point, or (ii) the radiation produced by such a source. As such, a mobile phone may be or include several sources (e.g. a WiFi source, a cellular communications (e.g., 5G) source, and a Bluetooth source). As such, if all three of the energy detecting nodes determine that the energy isbelow the threshold, then the conclusion, upon exiting from the tree, may be that no source is present in the sub-band; the analysis may terminate upon determining, based on a result of the executing of the final energy detecting node, that the signal in the subband, if any, does not have power exceeding the threshold.

[0057] Statistical characteristics of the signal may be used to tentatively classify the signal as being of a known type (e.g., orthogonal frequency division multiplexing (OFDM), phase shift keying (PSK), or quadrature amplitude modulation (QAM)). The kurtosis detecting node is an example of such classification node. In the example of FIG. 2A, kurtosis exceeding a threshold (case 1 ) may indicate that the source is likely an OFDM source, and kurtosis that is less than the threshold (case 2) may indicate that the source is likely a PSK source or a QAM source. If the kurtosis detecting node determines that the kurtosis exceeds the threshold, then the analysis transitions from the kurtosis detecting node to a cyclic prefix (CP) detecting node, which determines whether a cyclic prefix is present in each symbol, and, if it is, then the analysis transitions to an OFDM estimation node. The OFDM estimation node is an example of an estimation node; estimation nodes may estimate the values of parameters that characterize the source (e.g., the signal produced by the source). For OFDM, the parameters estimated may include, e.g., the subcarrier spacing, the number of subcarriers, and the symbol length.

[0058] In the example of FIG. 2A, if the kurtosis detecting node determines that the kurtosis is less than the threshold, then the analysis may transition to a node for detecting the kurtosis of the instantaneous amplitude. If the kurtosis of the instantaneous amplitude exceeds a threshold (case 1 ) then it may be likely that the source is a PSK source, and the analysis may transition to a PSK classifying and estimating node (which may estimate, e.g., the order of the PSK (e.g., binary phase shift keying (BPSK) or quadrature phase-shift keying (QPSK)), and the symbol rate); otherwise it may be likely that the source is a QAM source, and the analysis may transition to a QAM classifying and estimating node, which may estimate the QAM order and symbol rate.

[0059] Transitions between nodes may be performed in various ways. In a method that may be referred to as “swapping” a portion of an accelerator (e.g., of an array processor 105) may be used to perform the functions of a first node, by executing a program stored in a first range of addresses of the instruction memory of the portion ofthe accelerator. A program for performing the functions of a second node may also be stored in a second range of addresses of the instruction memory of the portion of the accelerator. The transition (e.g., the swap) may then be performed by changing the program counter (e.g., by overwriting the program counter, by the program launcher 135) to point to the first address of the second range of addresses. If each processing element has a separate program counter, then all of them may be overwritten. The data to be processed (e.g., the frame being analyzed) may already be in the data memory of the portion of the accelerator. As such, such a transition may be performed quickly, e.g., in a time interval of between 10 ns and 100 ns, or less (e.g., in a time interval of between 0.01 ns and 10 ns).

[0060] In another method that may be referred to as “switching”, a second portion of an accelerator (e.g., of the same accelerator or of another accelerator) may be used to perform the functions of the second node. When such a transition is performed, the data (e.g., the frame being processed) may be copied to the data memory of the second portion of the accelerator, the first portion of the accelerator may transition to idle mode (to conserve power) or it may begin performing the function of a third node, or it may perform the function of the first node for new data (e.g., for a new frame), and the second node may begin processing (e.g., it may transition from idle mode to active mode). Any switching between idle mode and active mode may be performed by writing a zero or one to a bit in the control registers of the processing elements of the portion of the accelerator. The writing to these bits may be done by one or more currently active processing elements, or by the program launcher 135.

[0061] As mentioned above, in some circumstances processing of several nodes may be performed in parallel. For example, once processing of a first frame by an energy detecting node, in a first portion of the accelerator, is complete for a first frame (and, e.g., analysis of the frame has transitioned to the kurtosis detecting node), then (if the transition was a switch, and the processing of the first frame by the kurtosis detecting node is performed by a different portion of the accelerator) processing of the first frame by the kurtosis detecting node may be performed in parallel with processing, in the first portion of the accelerator, of a second frame, by the energy detecting node.

[0062] In another example, testing for, and estimating parameters of, different types of sources may be performed in parallel. For example, in the example of FIG. 2A, instead of using a kurtosis detecting node to select between an upper branch of the tree (for OFDM) and a lower branch of the tree (for PSK or QAM), both the upper branch and the lower branch may be executed in parallel, by different portions of an accelerator.

[0063] As mentioned above, nodes may fall into any of three categories: (i) transformation nodes, (ii) classification nodes, and (iii) estimation nodes. Classification nodes may include signal detectors and coarse signal classifiers. Signal detectors may include energy detectors for high or medium signal to noise ratio (SNR), and, for low SNR, cumulative sum (CUSUM) detectors, adaptive event processing (AEP) detectors, method of moments estimators (MME), restricted likelihood ratio testers (RLRT), energy to minimum eigen value ratio detectors (EME).

[0064] Coarse signal classifiers may include statistics of instantaneous amplitude or phase or frequency for high or medium SNR, and, for low or medium SNR, excess kurtosis, time-frequency transform features, higher order cumulant, and higher order cyclic cumulant. In the drawings, some but not all of the nodes that include statistical characterizations explicitly include the word “detect”; each such node is a classification node, regardless of whether “detect” is part of the name of the node.

[0065] Transformation blocks may include up / down converters, channel equalizers, and phase / frequency correctors.

[0066] Signal-specific detectors / estimators may include chirp detectors or estimators, cyclic prefix detectors or estimators, or BPSK or FSK or frequency modulation (FM) detectors or estimators.

[0067] Signal parameter estimators may include carrier frequency, symbol rate, or bandwidth estimators, OFDM parameter estimators, PSK / FSK / QAM order estimators, direction of arrival (DOA) estimators, or cyclostationary estimators.

[0068] Other estimators may include SNR estimators, channel estimators, or estimators of the number of channels for channelization.

[0069] A signal monitor may be or include a matched filter. In some embodiments, once an analysis tree has performed parameter estimation for a source, it may be replaced, for subsequent frames, with a single-node tree, the node performing matchedfiltering to determine whether a source, with the previously estimated parameters, remains present.

[0070] In some embodiments, each tree to be used is first loaded into one or more of the accelerators, e.g., by the control processor 145, which may use the program launcher 135 for this purpose. The control processor 145 may store (e.g., in the system memory 130), for each sub-band, an ordered (e.g., prioritized) set of trees, and it may cause a first tree from the ordered set to be analyzed (by loading the first tree into one or more of the array processors 105), and, each time an analysis ends in failure, it may load the next tree from the ordered set and cause it to be analyzed, until the signal is successfully analyzed and the source parameters are estimated. In some embodiments, only one tree at a time is loaded into the accelerator, for each sub-band.

[0071] In some embodiments, the control processor 145 stores a plurality of ordered sets of trees, and it selects an ordered set based on prior information it may receive (e.g., from a user, or from a database). For example, if the environment is a rural environment, in which relatively sparse use of the spectrum is expected, the control processor 145 may use a first ordered set of trees from the plurality of ordered sets of trees, the first set being better suited to analysis of a sparse spectral environment. If the environment is an urban environment, in which relatively dense use of the spectrum is expected, the control processor 145 may use a second ordered set of trees from the plurality of ordered sets of trees, the second set being better suited to analysis of dense spectral environments.

[0072] Loading a tree into one or more accelerators may entail loading the program for each node into the instruction memory of an accelerator, and also loading instructions, for execution upon completion of any classification node, for transitioning to each of the nodes to which a transition may be needed.

[0073] FIGs. 2B - 2E depict further examples of analysis trees. In the trees of FIG. 2D and 2E, arrows labeled “explore” are tree exits that are taken when it is determined that a tree has failed to characterize the signal (e.g., to identify the signal and to estimate parameters of the signal). When such an exit is taken, the control processor 145 may select and load a different analysis tree, and a new attempt to characterize the signal, using the new tree, may be made.

[0074] In some embodiments, the system is capable of detecting signals from different sources that overlap in time. The presence of multiple sources in one sub-band may prevent certain statistical characteristics (such as kurtosis or a cumulant) from producing meaningful results for purposes of classifying the signal in the sub-band. Various methods may be used to detect such a situation. For example, values of statistical characteristics of the signal that do not correspond to any common signal type (e.g., OFDM or PSK) may indicate that multiple sources are present. Failure, or repeated failure, to estimate parameters of the signal after tentatively classifying it as being of a known signal type may also indicate that multiple sources are present. When the system determines, based on one or more of these indications, that multiple sources appear to be present, the system may divide the sub-band into two or more smaller sub-bands. After such dividing is performed, each of the new, smaller sub-bands may contain at most one source, making characterization of the signals possible.

[0075] The number and width of the new sub-bands may be determined, for example, by calculating an FFT of the signal in the original sub-band, and performing a cluster analysis to identify portions of the original sub-bands containing significant signal power. A new, smaller sub-band may then be defined for each such portion, and the remaining portions may be allocated to other new sub-bands (expected to contain too little signal power for analysis).

[0076] The dividing of a sub-band into two or more smaller sub-bands may be performed, for example, by reconfiguring (e.g., by the control processor 145) the channelizer. Such reconfiguring may also be performed if the system determines that a source appears to straddle a sub-band boundary (e.g., to extend beyond the boundaries of a sub-band) (in which case the channelizer may be configured to move one or more boundaries so that the source is present entirely within a single sub-band). In some embodiments, the dividing of a sub-band into two or more smaller sub-bands is performed by configuring another accelerator (other than the preprocessing array processor 105) with an auxiliary channelizer, configured to further channelize the original sub-band into a plurality of smaller sub-bands.

[0077] In some embodiments, the system is capable of detecting an underlay signal, which may be a signal that overlaps another signal both in time and in frequency. In sucha situation the method of dividing the sub-band into smaller sub-bands may not be sufficient to separate the signals, and adaptive event processing may be used to separate the signals. This method may involve using beamforming to receive one or the other of the two sources preferentially, if the sources are spatially separated.

[0078] In some embodiments, dynamic subtree branching is performed to characterize a source. This method may involve adding a subtree to a tree being executed when it is determined that a first tree is not capable of characterizing the source. For example, in the tree of FIG. 3A, if it is determined that the sum of the cumulant 63, the cumulant 42, and the kurtosis does not fit into Case 1 nor Case 2, then the system (e.g., the control processor 145) may add nodes to the tree as shown in FIG. 3B to make it possible to characterize the signal.

[0079] In some embodiments, a method as disclosed herein includes: analyzing spectrum use, based on a first array of samples (e.g., a first frame), by a system including an accelerator (e.g., an array processor 105), the accelerator including a stored-program computer, the analyzing including executing, by the accelerator, first instructions, the first instructions corresponding to a first node of a first analysis tree, the first instructions including instructions for processing the first array of samples. For example, the first node may perform transformation, classification, or estimation. In some embodiments, the method further includes executing, based on a result of the executing of the first instructions, second instructions, the second instructions corresponding to a second node of the first analysis tree. For example, as illustrated in FIG. 2A, if the first node is the node for energy detection with one channel, and the first node detects energy exceeding a threshold, then the instructions of a second node, the kurtosis detection node, may be executed. In some embodiments, the executing of the first instructions includes executing the first instructions by a first portion of the accelerator, and the executing of the second instructions includes executing the second instructions by a second portion of the accelerator. This type of node transition may be referred to as a switch, as discussed above. In some embodiments, the method further includes loading, based on the result, the second instructions into the second portion of the accelerator. For example, in some embodiments, the control processor 145 may monitor the execution of the first node, and cause the program launcher 135 to load the secondinstructions, in response to determining, from the execution of the first node, that the first node has detected energy exceeding a threshold.

[0080] In some embodiments, the executing of the first instructions includes executing the first instructions by a first portion of the accelerator, and the executing of the second instructions includes executing the second instructions in the first portion of the accelerator. As mentioned above, this type of node transition may be referred to as a swap.

[0081] In some embodiments, the accelerator includes a stored-program computer including a program counter configured to be written externally.

[0082] In some embodiments, the accelerator includes a deterministic sequence stored-program computer, e.g., a non-conditional-branching stored-program computer or a non-branching stored-program computer.

[0083] In some embodiments, the method includes selecting, based on a result of the executing of the first instructions, a second analysis tree, and executing, by the accelerator, instructions corresponding to a first node of the second analysis tree. For example, the first node may be the CP detect node of FIG. 2A, and, in response to a failure to detect a cyclic prefix by this node, the analysis of the tree may terminate with an indication that the analysis failed. The control processor 145 may then load a second analysis tree into one or more portions of the array processors 105.

[0084] In some embodiments, the method includes determining, based on a result of the executing of the first instructions, that the first signal does not have power exceeding a threshold, and terminating analysis of the first signal. For example, analysis may terminate within a sub-band that lacks significant signal power, and does not merit further analysis, whereas, some of the sub-bands generated by the channelizer may have significant signal power and may merit analysis.

[0085] Some embodiments described herein improve the functioning of a computer or improve another technology or technical field, and provide improvements to the functioning of a computer or to another technology or technical field. For example, executing, in an accelerator, instructions that are part of an analysis tree for analyzing spectral use improves the technology of spectral use analysis, and also improves the functioning of a computer that may be used for analyzing spectral use. Similarly, theability to switch analysis tasks rapidly by overwriting a program counter of a processing element, which already has access to the data to be analyzed, enables the accelerator to perform a multi-step analysis more rapidly than other approaches, and, as such, improves the technology of spectral use analysis and also improves the functioning of a computer that may be used for analyzing spectral use.

[0086] As used herein, “a portion of” something means “at least some of’ the thing, and as such may mean less than all of, or all of, the thing. As such, “a portion of” a thing includes the entire thing as a special case, i.e., the entire thing is an example of a portion of the thing. As used herein, when a second quantity is “within Y” of a first quantity X, it means that the second quantity is at least X-Y and the second quantity is at most X+Y. As used herein, when a second number is “within Y%” of a first number, it means that the second number is at least (1 -Y / 100) times the first number and the second number is at most (1 +Y / 100) times the first number. As used herein, the word “or” is inclusive, so that, for example, “A or B” means any one of (i) A, (ii) B, and (iii) A and B.

[0087] Each of the terms “processing circuit” and “means for processing” is used herein to mean any combination of hardware, firmware, and software, employed to process data or digital signals. Processing circuit hardware may include, for example, application specific integrated circuits (ASICs), general purpose or special purpose central processing units (CPUs), digital signal processors (DSPs), graphics processing units (GPUs), and programmable logic devices such as field programmable gate arrays (FPGAs). In a processing circuit, as used herein, each function is performed either by hardware configured, i.e., hard-wired, to perform that function, or by more general- purpose hardware, such as a CPU, configured to execute instructions stored in a non- transitory storage medium. A processing circuit may be fabricated on a single printed circuit board (PCB) or distributed over several interconnected PCBs. A processing circuit may contain other processing circuits; for example, a processing circuit may include two processing circuits, an FPGA and a CPU, interconnected on a PCB.

[0088] As used herein, when a method (e.g., an adjustment) or a first quantity (e.g., a first variable) is referred to as being “based on” a second quantity (e.g., a second variable) it means that the second quantity is an input to the method or influences the first quantity, e.g., the second quantity may be an input (e.g., the only input, or one ofseveral inputs) to a function that calculates the first quantity, or the first quantity may be equal to the second quantity, or the first quantity may be the same as (e.g., stored at the same location or locations in memory as) the second quantity.

[0089] It will be understood that, although the terms “first”, “second”, “third”, etc., may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed herein could be termed a second element, component, region, layer or section, without departing from the spirit and scope of the inventive concept.

[0090] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the inventive concept. As used herein, the terms “substantially,” “about,” and similar terms are used as terms of approximation and not as terms of degree, and are intended to account for the inherent deviations in measured or calculated values that would be recognized by those of ordinary skill in the art.

[0091] Any numerical range recited herein is intended to include all sub-ranges of the same numerical precision subsumed within the recited range. For example, a range of "1.0 to 10.0" or “between 1.0 and 10.0” is intended to include all subranges between (and including) the recited minimum value of 1 .0 and the recited maximum value of 10.0, that is, having a minimum value equal to or greater than 1 .0 and a maximum value equal to or less than 10.0, such as, for example, 2.4 to 7.6. Similarly, a range described as “within 35% of 10” is intended to include all subranges between (and including) the recited minimum value of 6.5 (i.e. , (1 - 35 / 100) times 10) and the recited maximum value of 13.5 (i.e., (1 + 35 / 100) times 10), that is, having a minimum value equal to or greater than 6.5 and a maximum value equal to or less than 13.5, such as, for example, 7.4 to 10.6. Any maximum numerical limitation recited herein is intended to include all lower numerical limitations subsumed therein and any minimum numerical limitation recited in this specification is intended to include all higher numerical limitations subsumed therein.

[0092] It will be understood that when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. As used herein, “generally connected” means connected by an electrical path that may contain arbitrary intervening elements, including intervening elements the presence of which qualitatively changes the behavior of the circuit. As used herein, “connected” means (i) “directly connected” or (ii) connected with intervening elements, the intervening elements being ones (e.g., low-value resistors or inductors, or short sections of transmission line) that do not qualitatively affect the behavior of the circuit.

[0093] Some embodiments may include features of the following numbered clauses.1 . A method, comprising: analyzing spectrum use, based on a first array of samples, by a system comprising an accelerator, the accelerator comprising a stored-program computer, the analyzing comprising executing, by the accelerator, first instructions, the first instructions corresponding to a first node of a first analysis tree, the first instructions comprising instructions for processing the first array of samples.2. The method of clause 1 , further comprising executing, based on a result of the executing of the first instructions, second instructions, the second instructions corresponding to a second node of the first analysis tree.3. The method of clause 1 or clause 2, wherein the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator, and the executing of the second instructions comprises executing the second instructions by a second portion of the accelerator.4. The method of any one of the preceding clauses, wherein the method further comprises loading, based on the result, the second instructions into the second portion of the accelerator.5. The method of any one of the preceding clauses, further comprising selecting, by a scheduler, the second portion of the accelerator, for executing the second instructions.6. The method of clause 2, wherein the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator, and the executing of the second instructions comprises executing the second instructions by the first portion of the accelerator.7. The method of any one of the preceding clauses, wherein the accelerator comprises a stored-program computer comprising a program counter configured to be written externally.8. The method of any one of the preceding clauses, wherein the accelerator comprises a deterministic sequence stored-program computer.9. The method of any one of the preceding clauses, wherein the accelerator comprises a non-conditional-branching stored-program computer.10. The method of any one of the preceding clauses, wherein the accelerator comprises a non-branching stored-program computer.11 . The method of any one of the preceding clauses, wherein the system further comprises a control processor, and the method further comprises selecting, by the control processor, the first analysis tree.12. The method of any one of the preceding clauses, further comprising selecting, based on a result of the executing of the first instructions, a second analysis tree, and executing, by the accelerator, instructions corresponding to a first node of the second analysis tree.13. The method of any one of the preceding clauses, further comprising channelizing a received signal into a plurality of sub-bands, wherein the first array of samples comprises samples of a first signal, within a first sub-band of the sub-bands, the first sub-band having a width different from a width of a second sub-band of the sub-bands.14. The method of clause 13, wherein the first sub-band has a width greater than a width of the second sub-band by at least a factor of 10.15. The method of clause 13 or clause 14, wherein: the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator; the analyzing comprising executing, by the accelerator, third instructions; the third instructions correspond to a node of a third analysis tree; the third instructions comprise instructions for processing a second array of samples; the second array of samples comprises samples of a second signal, within the second sub-band; the executing of the third instructions comprises executing the third instructions by a third portion of the accelerator; the first portion of the accelerator consists of a first set of processing elements; the third portion of the accelerator consists of a third set of processing elements; and the third set of processing elements contains fewer processing elements than the first set of processing elements.16. The method of any one of clauses 13 to 15, further comprising: determining, based on a result of the executing of the first instructions, that the first signal does not have power exceeding a threshold, and terminating analysis of the first signal.17. The method of any one of clauses 13 to 16, wherein: the channelizing of the received signal comprises channelizing the received signal by a preprocessing accelerator, and the method further comprises dividing, based on based on a result of the executing of the first instructions, the first sub-band into a plurality of sub-bands.18. The method of clause 17, wherein the dividing of the first sub-band comprises dividing the first sub-band by reconfiguring the channelizer.19. The method of clause 17, wherein the dividing of the first sub-band comprises dividing the first sub-band by an auxiliary channelizer.20. The method of any one of the preceding clauses, wherein the first instructions cause the accelerator to perform an operation selected from the group consisting of transformation, classification, estimation, and combinations thereof.21. A system, comprising: a control processor, and an accelerator comprising a stored-program computer, the system being configured to analyze spectrum use, the analyzing comprising executing, by the accelerator, first instructions, the first instructions corresponding to a first node of a first analysis tree, the first instructions comprising instructions for processing a first array of samples.22. The system of clause 21 , wherein the accelerator is configured to execute, based on a result of the executing of the first instructions, second instructions, the second instructions corresponding to a second node of the first analysis tree.23. The system of clause 21 or clause 22, wherein the executing of the first instructions comprises executing the first instructions by a first portion of theaccelerator, and the executing of the second instructions comprises executing the second instructions by a second portion of the accelerator.24. The system of clause 22 or clause 23, wherein the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator, and the executing of the second instructions comprises executing the second instructions by the first portion of the accelerator.25. The system of any one of clauses 22 to 24, wherein the accelerator comprises a stored-program computer comprising a program counter configured to be written externally.26. The system of any one of clauses 22 to 25, wherein the accelerator comprises a deterministic sequence stored-program computer.27. The system of any one of clauses 22 to 26, wherein the accelerator comprises a non-conditional-branching stored-program computer.28. The system of any one of clauses 22 to 27, wherein the accelerator comprises a non-branching stored-program computer.

[0094] Although exemplary embodiments of a system and method for spectral use analysis have been specifically described and illustrated herein, many modifications and variations will be apparent to those skilled in the art. Accordingly, it is to be understood that a system and method for spectral use analysis constructed according to principles of this disclosure may be embodied other than as specifically described herein. The invention is also defined in the following claims, and equivalents thereof.

Claims

WHAT IS CLAIMED IS:1 . A method, comprising: analyzing spectrum use, based on a first array of samples, by a system comprising an accelerator, the accelerator comprising a stored-program computer, the analyzing comprising executing, by the accelerator, first instructions, the first instructions corresponding to a first node of a first analysis tree, the first instructions comprising instructions for processing the first array of samples.

2. The method of claim 1 , further comprising executing, based on a result of the executing of the first instructions, second instructions, the second instructions corresponding to a second node of the first analysis tree.

3. The method of claim 2, wherein the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator, and the executing of the second instructions comprises executing the second instructions by a second portion of the accelerator.

4. The method of claim 3, wherein the method further comprises loading, based on the result, the second instructions into the second portion of the accelerator.

5. The method of claim 4, further comprising selecting, by a scheduler, the second portion of the accelerator, for executing the second instructions.

6. The method of claim 2, wherein the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator, and the executing of the second instructions comprises executing the second instructions by the first portion of the accelerator.

7. The method of claim 1 , wherein the accelerator comprises a stored- program computer comprising a program counter configured to be written externally.

8. The method of claim 1 , wherein the accelerator comprises a deterministic sequence stored-program computer.

9. The method of claim 8, wherein the accelerator comprises a non- conditional-branching stored-program computer.

10. The method of claim 9, wherein the accelerator comprises a nonbranching stored-program computer.11 . The method of claim 1 , wherein the system further comprises a control processor, and the method further comprises selecting, by the control processor, the first analysis tree.

12. The method of claim 1 , further comprising selecting, based on a result of the executing of the first instructions, a second analysis tree, and executing, by the accelerator, instructions corresponding to a first node of the second analysis tree.

13. The method of claim 1 , further comprising channelizing a received signal into a plurality of sub-bands, wherein the first array of samples comprises samples of a first signal, within a first sub-band of the sub-bands, the first sub-band having a width different from a width of a second sub-band of the sub-bands.

14. The method of claim 13, wherein the first sub-band has a width greater than a width of the second sub-band by at least a factor of 10.

15. The method of claim 14, wherein: the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator; the analyzing comprising executing, by the accelerator, third instructions; the third instructions correspond to a node of a third analysis tree;the third instructions comprise instructions for processing a second array of samples; the second array of samples comprises samples of a second signal, within the second sub-band; the executing of the third instructions comprises executing the third instructions by a third portion of the accelerator; the first portion of the accelerator consists of a first set of processing elements; the third portion of the accelerator consists of a third set of processing elements; and the third set of processing elements contains fewer processing elements than the first set of processing elements.

16. The method of claim 13, further comprising: determining, based on a result of the executing of the first instructions, that the first signal does not have power exceeding a threshold, and terminating analysis of the first signal.

17. The method of claim 13, wherein: the channelizing of the received signal comprises channelizing the received signal by a preprocessing accelerator, and the method further comprises dividing, based on based on a result of the executing of the first instructions, the first sub-band into a plurality of sub-bands.

18. The method of claim 17, wherein the dividing of the first sub-band comprises dividing the first sub-band by reconfiguring the channelizer.

19. The method of claim 17, wherein the dividing of the first sub-band comprises dividing the first sub-band by an auxiliary channelizer.

20. The method of claim 1 , wherein the first instructions cause the accelerator to perform an operation selected from the group consisting of transformation, classification, estimation, and combinations thereof.

21. A system, comprising: a control processor, and an accelerator comprising a stored-program computer, the system being configured to analyze spectrum use, the analyzing comprising executing, by the accelerator, first instructions, the first instructions corresponding to a first node of a first analysis tree, the first instructions comprising instructions for processing a first array of samples.

22. The system of claim 21 , wherein the accelerator is configured to execute, based on a result of the executing of the first instructions, second instructions, the second instructions corresponding to a second node of the first analysis tree.

23. The system of claim 22, wherein the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator, and the executing of the second instructions comprises executing the second instructions by a second portion of the accelerator.

24. The system of claim 22, wherein the executing of the first instructions comprises executing the first instructions by a first portion of the accelerator, and the executing of the second instructions comprises executing the second instructions by the first portion of the accelerator.

25. The system of claim 21 , wherein the accelerator comprises a stored- program computer comprising a program counter configured to be written externally.

26. The system of claim 21 , wherein the accelerator comprises a deterministic sequence stored-program computer.

27. The system of claim 26, wherein the accelerator comprises a non- conditional-branching stored-program computer.

28. The system of claim 27, wherein the accelerator comprises a nonbranching stored-program computer.

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