Method for manufacturing printed wiring board, and printed wiring board

By incorporating an insulating portion with a higher linear expansion coefficient into the core substrate of printed wiring boards, the warpage issue is addressed, ensuring reliable connections and improved stability through matched thermal expansion.

WO2025248600A1PCT designated stage Publication Date: 2025-12-04RESONAC CORP
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Patent Information

Application Number
PCT/JP2024/019430
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-27
Publication Date
2025-12-04

AI Technical Summary

Technical Problem

Warpage of printed wiring boards due to differences in linear expansion coefficients between the substrate and the insulating resin layer leads to poor connection reliability when mounting semiconductor chips.

Method used

Manufacturing a printed wiring board by forming a core substrate with an insulating portion having a higher linear expansion coefficient than the substrate main body, and providing a wiring layer on one or both sides, which includes a wiring portion and an insulating resin portion, to match the thermal expansion of the entire core substrate with the wiring layer.

Benefits of technology

Suppresses warpage of the printed wiring board, enhancing connection reliability by aligning the thermal expansion coefficients, thereby improving the stability and precision of the wiring structure.

✦ Generated by Eureka AI based on patent content.

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Abstract

Provided is a method for manufacturing a printed wiring board (101), the method comprising: preparing a substrate (1) that includes a substrate main portion (11) that forms a cavity (11A); providing an insulating portion (2) in the cavity, thereby forming a sheet-like core substrate (10) including the substrate and the insulating portion; and providing a wiring layer (30) including a wiring portion (31) and an insulating resin portion (32) on one or both sides of the core substrate. The substrate main portion is an insulating substrate or a semiconductor substrate, and the insulating portion has a greater coefficient of linear expansion than the substrate main portion. Alternatively, the substrate main portion is a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate, and the insulating portion is a cured film formed by the curing of a photosensitive resin layer or a thermosetting resin layer.
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Description

METHOD FOR MANUFACTURING PRINTED WIRING BOARD, AND PRINTED WIRING BOARD

[0001] The present disclosure relates to a method for manufacturing a printed wiring board, and to a printed wiring board.

[0002] Printed wiring boards are sometimes manufactured by a method that includes forming a wiring layer on a core substrate such as a copper-clad laminate that includes through-holes (see, for example, Patent Documents 1 and 2).

[0003] JP 2021-177525 A JP 2019-031739 A

[0004] Warpage of a printed wiring board can cause a decrease in reliability, such as poor connection, when mounting a semiconductor chip or the like on the printed wiring board. The present disclosure relates to suppressing warpage of a printed wiring board having a substrate and a wiring layer including an insulating resin layer.

[0005] The present disclosure includes the following: [1] A method for manufacturing a printed wiring board, comprising: preparing a substrate including a substrate main body portion forming a cavity; providing an insulating portion in the cavity, thereby forming a sheet-like core substrate including the substrate and the insulating portion; and providing a wiring layer including wiring portions and an insulating resin portion on one or both sides of the core substrate, wherein the substrate main body portion is an insulating substrate or a semiconductor substrate, and the insulating portion has a linear expansion coefficient greater than that of the substrate main body portion. [2] A method for manufacturing a printed wiring board, comprising: preparing a substrate including a substrate main body portion forming a cavity; providing an insulating portion in the cavity, thereby forming a sheet-like core substrate including the substrate and the insulating portion; and providing a wiring layer including wiring portions and an insulating resin portion on one or both sides of the core substrate, wherein the substrate main body portion is a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate, and the insulating portion is a cured film formed by curing a photosensitive resin layer or a thermosetting resin layer. [3] The method of [1] or [2], wherein the insulating portion is provided in the cavity so as to contact the substrate main body portion. [4] The method of any of [1] to [3], wherein providing the insulating portion includes: forming the insulating portion including a portion that fills the cavity and embeds the substrate; and removing a portion of the insulating portion from the side opposite to the substrate to form a flat surface including the surface of the substrate and the surface of the insulating portion, wherein the wiring layer is provided on the flat surface. [5] The method of any of [1] to [4], wherein the method further includes: placing the substrate on a carrier; and separating the core substrate and the carrier after the insulating portion is provided in the cavity. [6] The method of any of [1] to [5], wherein the insulating portion forms a through hole penetrating the insulating portion, and the method further includes providing a conductive portion in the through hole, wherein the wiring layer is provided so that the wiring portion is electrically connected to the conductive portion.[7] The method according to [6], wherein providing the insulating portion in the cavity includes forming the insulating portion as a cured film that forms the through hole by a method including: forming a photosensitive resin layer in the cavity; and exposing and developing the photosensitive resin layer. [8] The method according to [6] or [7], further including: placing the substrate on a carrier; and separating the core substrate and the carrier after the insulating portion is provided in the cavity, wherein a conductive pattern layer forming a pattern is provided on the carrier, the cavity penetrates the substrate main body portion, the substrate is placed on the carrier so that at least a part of the conductive pattern layer is exposed in the cavity, and the conductive portion is provided in the through hole so as to be electrically connected to the conductive pattern layer. [9] The method according to any one of [1] to [9], wherein the insulating portion is provided in the cavity so as to form a recess having a bottom surface including the surface of the insulating portion on one or both sides of the core substrate, the method further comprising providing an encapsulating resin layer including a portion that fills the recess, and the wiring layer is provided on the encapsulating resin layer on the recess side of the core substrate.

[10] The method according to [9], wherein providing the encapsulating resin layer comprises: forming the encapsulating resin layer including the portion that fills the recess and that embeds the substrate, and removing a portion of the encapsulating resin layer from the side opposite to the substrate to form a flat surface including the surface of the substrate and the surface of the encapsulating resin layer, and the wiring layer is provided on the flat surface.

[11] A printed wiring board comprising: a sheet-like core substrate; and a wiring layer provided on one or both sides of the core substrate, the wiring layer including a wiring portion and an insulating resin portion, wherein the core substrate includes: a substrate including a substrate main body portion forming a cavity; and an insulating portion provided within the cavity, wherein the substrate main body portion is an insulating substrate or a semiconductor substrate, and the linear expansion coefficient of the insulating portion is larger than the linear expansion coefficient of the substrate main body portion.

[12] A printed wiring board comprising: a sheet-like core substrate; and a wiring layer including a wiring portion and an insulating resin portion provided on one or both sides of the core substrate, wherein the core substrate comprises: a substrate including a substrate main body portion forming a cavity; and an insulating portion provided in the cavity, wherein the substrate main body portion is a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate, and the insulating portion is a cured film formed by curing a photosensitive resin layer or a thermosetting resin layer.

[13] The printed wiring board according to

[11] or

[12] , wherein the insulating portion is in contact with the substrate main body portion.

[14] The printed wiring board according to any of

[11] to

[13] , wherein a flat surface is formed including a surface of the substrate and a surface of the insulating portion, and the wiring layer is provided on the flat surface.

[15] The printed wiring board according to any one of

[11] to

[14] , wherein the insulating section forms a through hole penetrating the insulating section, and the core substrate further includes a conductive section provided in the through hole, and the conductive section and the wiring section are electrically connected.

[16] The printed wiring board according to any one of

[11] to

[15] , wherein a recess having a bottom surface including the surface of the insulating section is formed on one or both sides of the core substrate, and the printed wiring board further includes an encapsulating resin layer including a portion filling the recess, and the wiring layer is provided on the encapsulating resin layer on the recess side of the core substrate.

[17] The printed wiring board according to

[16] , wherein a flat surface including the surface of the substrate and the surface of the encapsulating resin layer is formed, and the wiring layer is provided on the flat surface.

[0006] Warping of a printed wiring board having a substrate and a wiring layer including an insulating resin layer can be suppressed.

[0007] 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are end views showing an example of a printed wiring board; 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are process diagrams showing an example of a method for manufacturing a printed wiring board; 1A and 1B are end views showing an example of a printed wiring board;

[0008] The present disclosure is not limited to the following examples.

[0009] Figures 1, 2, 3, 4, 5, and 6 are process diagrams showing, in schematic end views, examples of methods for manufacturing printed wiring boards. Figure 7 is an end view showing an example of a printed wiring board that can be manufactured by the methods shown in Figures 1 to 6.

[0010] The method shown in Figures 1 to 6 includes preparing a substrate 1 including a substrate main body portion 11 forming a cavity 11A, providing an insulating portion 2 within the cavity 11A to thereby form a sheet-like core substrate 10 including the substrate 1 and the insulating portion 2, and providing a wiring layer 30 including a wiring portion 31 and an insulating resin portion 32 on one or both sides of the core substrate 10.

[0011] The substrate main body 11 can be an insulating substrate or a semiconductor substrate. The insulating substrate can be, for example, a fiber-reinforced resin substrate, a glass substrate, or a ceramic substrate. The semiconductor substrate can be, for example, a silicon substrate. The fiber-reinforced resin substrate includes a fiber base material containing fibers such as glass fibers and a resin portion impregnated into the fiber base material. The fiber-reinforced resin substrate can be, for example, a substrate formed by curing a laminate of a fiber base material and a prepreg containing a thermosetting resin composition.

[0012] When the substrate main body 11 is an insulating substrate or a semiconductor substrate, the linear expansion coefficient of the insulating part 2 may be greater than that of the substrate main body 11. Generally, when the substrate main body 11 is an insulating substrate or a semiconductor substrate, the linear expansion coefficient of the wiring layer 30 including the wiring part 31 and the insulating resin part 32 is greater than that of the substrate main body 11, and the difference between the linear expansion coefficients can cause warping of the printed wiring board. By replacing a portion of the core substrate 10 supporting the wiring layer 30 with the insulating part 2 having a greater linear expansion coefficient, the degree of thermal expansion of the entire core substrate 10 becomes closer to that of the wiring layer 30. As a result, warping can be suppressed.

[0013] The substrate main body 11 may be a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate, and the insulating portion 2 may be a cured film formed by curing a photosensitive resin layer or a thermosetting resin layer. Generally, even when the substrate main body 11 is a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate, the linear expansion coefficient of the wiring layer 30 including the wiring portion 31 and the insulating resin portion 32 is greater than that of the substrate main body 11, and the difference between the linear expansion coefficients may cause warping of the printed wiring board. By replacing a portion of the core substrate 10 supporting the wiring layer 30 with the insulating portion 2, which is a cured film of a photosensitive resin layer or a thermosetting resin layer, the degree of thermal expansion of the entire core substrate 10 becomes closer to that of the wiring layer 30. As a result, warping can be suppressed. Typically, the linear expansion coefficient of the insulating portion 2, which is a cured film formed by curing a photosensitive resin layer or a thermosetting resin layer, is greater than the linear expansion coefficient of the substrate main body 11, which is a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate.

[0014] In this specification, the linear expansion coefficient may be a value measured by thermomechanical analysis (TMA) under conditions of a temperature rise rate of 5°C / min in the range of 30 to 320°C.

[0015] The substrate 1 having the substrate main body 11 forming the cavity 11A can be formed by a method including preparing a sheet-like substrate 1 as shown in Fig. 1(a) and removing a portion of the substrate 1 to form the cavity 11A as shown in Fig. 1(b). The cavity 11A may penetrate the substrate main body 11.

[0016] The cavity 11A can be formed by a conventional method selected in consideration of the material of the substrate body 11. For example, the cavity 11A can be formed by a mechanical drill, a router, or a laser.

[0017] The thickness of the substrate body 11 may be, for example, 1.6 mm or more and 20 μm or less. The width of the cavity 11A may be, at most, 1 mm or more and 7 mm or less. The width here refers to the width in the direction perpendicular to the thickness direction of the substrate body 11.

[0018] 1 , in addition to the cavity 11A, a plurality of through holes 11B are formed penetrating the substrate main body 11. The substrate 1 further includes a conductive layer 12 provided on the wall surface of the through hole 11B, a filled resin portion 13 that fills the through hole 11B inside the conductive layer 12, and a conductive lid portion 15 that closes one opening of the through hole 11B. The conductive layer 12 in the through hole 11B can electrically connect both surfaces of the substrate main body 11 or the substrate 1. The through hole 11B and the conductive layer 12 and filled resin portion 13 therein do not necessarily have to be provided in the substrate 1.

[0019] As shown in FIG. 2( a), the substrate 1 may be placed on the carrier 4, and then the insulating portion 2 may be formed in the cavity 11A as shown in FIG. 2( b). In the example of FIG. 2, a conductive pattern layer 7 forming a pattern is provided on the carrier 4. The substrate 1 is placed on the carrier 4 so that at least a portion of the conductive pattern layer 7 is exposed in the cavity 11A. The insulating portion 2 is formed to include a portion that fills the cavity 11A and to embed the substrate 1. The thickness of the insulating portion 2 at this stage is greater than the thickness of the substrate main body 11. The carrier 4 may be a laminate including a support substrate (e.g., a glass substrate) and a temporary fixing layer. The temporary fixing layer may be a layer that temporarily fixes the substrate 1 and can be separated from the substrate 1 and the insulating portion 2 after the core substrate 10 and the wiring layer 30 are formed. The conductive pattern layer 7 may be formed, for example, by a subtractive method or a semi-additive method. A wiring structure composed of a carrier 4 having a support substrate and a temporary fixing layer, and a conductive pattern layer 7 can be obtained, for example, by preparing a carrier laminate having a support substrate, a temporary fixing layer, and a seed layer, and forming a conductive pattern layer by a semi-additive method using the seed layer. As the carrier laminate having a support substrate, a temporary fixing layer, and a seed layer, a commercially available product such as a special glass carrier "HRDP" (product name) manufactured by Mitsui Mining & Smelting Co., Ltd. can be used.

[0020] Subsequently, as shown in FIG. 3A, through-holes 2A may be formed through the insulating portion 2. If a conductive pattern layer 7 is provided on the carrier 4, the conductive pattern layer 7 may be exposed in the through-holes 2A. The insulating portion 2 having a pattern including through-holes 2A can be formed, for example, by a method including forming a photosensitive resin layer in the cavity 11A and exposing and developing the photosensitive resin layer to form the insulating portion 2, which is a cured film having a pattern including the through-holes 2A. The photosensitive resin layer (insulating portion) after development may be heated to harden the photosensitive resin layer. The photosensitive resin layer for forming the insulating portion 2 may include, for example, a photosensitive resin composition similar to the photosensitive resin composition used to form the insulating resin portion of the wiring layer.

[0021] Examples of photosensitive resin compositions that can be used to form the insulating portion 2 include the following: [1] A photosensitive resin composition comprising a polyfunctional phenol novolac epoxy resin and a photosensitive acid generator containing an onium salt (e.g., onium borate salt, onium gallate salt). [2] A photosensitive resin composition comprising a high molecular weight material having a photopolymerizable functional group and a carbon-nitrogen bond, a low molecular weight material having a photopolymerizable functional group (e.g., a (meth)acryloyl group) and a carbon-nitrogen bond, and a photopolymerization initiator. [3] A photosensitive resin composition comprising a photopolymerizable compound having an ethylenically unsaturated group but not an isocyanuric skeleton, a photopolymerizable compound having an ethylenically unsaturated group and an isocyanuric skeleton, and a photopolymerization initiator. [4] A photosensitive resin composition comprising a photopolymerizable compound having an ethylenically unsaturated group, a photopolymerization initiator, and an inorganic filler. The particle size at which the maximum value is shown in the volume-based particle size distribution of the inorganic filler may be 0.4 μm or less. [5] A photosensitive resin composition comprising an acid-modified vinyl group-containing epoxy resin, a photopolymerizable compound having an ethylenically unsaturated group, a photopolymerization initiator, and an inorganic filler. [6] A photosensitive resin composition comprising a polyimide compound containing a structural unit derived from a maleimide compound having two or more N-substituted maleimide groups and a structural unit derived from a diamine compound, a modified polybutadiene, and an inorganic filler. [7] A photosensitive resin composition comprising an alkali-soluble resin having at least one of a carboxyl group and a sulfone group, a compound that generates an acid upon exposure to actinic rays having a wavelength of 300 nm or more, and a basic nitrogen-containing heterocyclic compound. [8] A negative-tone photosensitive resin composition comprising a polyimide precursor, one or more compounds selected from an active esterifying agent, a thermosetting agent, a tertiary amine compound, a guanidine compound, an acidic compound, and a nitrogen-containing compound, and a photopolymerization initiator. [9] A photosensitive resin composition comprising an alkali-soluble polymer, a photopolymerizable compound having an ethylenically unsaturated group, and a photopolymerization initiator.

[10] A negative-type photosensitive resin composition comprising an alkali-soluble resin, a photosensitizer, and a crosslinking agent.

[11] A positive photosensitive resin composition comprising at least one resin selected from the group consisting of a polybenzoxazole precursor having a carboxyl group at its terminal and a polyimide having a hydroxyl group and a carboxy group, a photoacid generator having a naphthalimide skeleton or an imino group, and a silane compound having at least one group selected from the group consisting of a carboxy group, an acid anhydride group, a sulfonic acid group, and a (meth)acryloyl group.

[0022] 3(b), a seed layer 3 may be formed on the surface of the insulating section 2. The seed layer 3 is a metal layer formed to cover the wall surface of the through hole 2A and the surface of the insulating section 2 opposite to the carrier 4. The seed layer 3 is formed by, for example, electroless plating or sputtering.

[0023] 4( a), a resist layer 8 having a pattern including openings 8A arranged at the positions of the through holes 2A may be formed on the seed layer 3. Thereafter, as shown in FIG. 4( b), a conductive portion 5 including a portion filling the through holes 2A may be formed by electrolytic plating using the resist layer 8 as a mask. The conductive portion 5 formed in the through holes 2A of the insulating portion 2 may be electrically connected to the conductive pattern layer 7.

[0024] As shown in FIG. 5(a), the resist layer 8 is stripped, and then, as shown in FIG. 5(b), a portion of the seed layer 3 is removed by etching.

[0025] As shown in FIG. 6( a), a flat surface S1 including the surface of the substrate 1 and the surface of the insulating portion 2 may be formed on the side opposite the carrier 4 by removing a portion of the insulating portion 2 from the side opposite the substrate 1. The core substrate 10 shown in FIG. 6 is composed of a substrate 1 including a substrate main body portion 11, a conductive layer 12, a filled resin portion 13, and a lid portion 15, an insulating portion 2 filling a cavity 11A penetrating the substrate main body portion 11, a seed layer 3 and a conductive portion 5 provided in a through hole 2A penetrating the insulating portion 2, and a conductive pattern layer 7. The insulating portion 2 is provided in the cavity 11A so as to be in direct contact with the substrate main body portion 11 without any other layer such as a conductive layer interposed therebetween. The seed layer 3 and the conductive portion 5 do not necessarily need to be provided in the insulating portion 2.

[0026] 6, the flat surface S1 includes the surface of the lid portion 15, the surface of the insulating portion 2, and the surface of the conductive portion 5 that constitute the substrate 1. In this specification, a flat surface means a surface that does not include steps with a height of 0.060 μm or more, and may include smaller irregularities.

[0027] The flat surface S1 can be formed by removing a part of the insulating portion 2 by a conventional method such as grinding or chemical mechanical polishing (CMP).

[0028] As shown in Figure 6 (b), a wiring layer 30 is formed on a flat surface S1, which is one of the main surfaces of the core substrate 10. When a conductive portion 5 is provided in the through hole 2A of the insulating portion 2, the conductive portion 5 and the wiring portion 31 may be electrically connected. The wiring layer 30 may have a multilayer structure composed of a wiring portion 31 and a plurality of insulating resin portions 32. The wiring layer 30 can be formed by a conventional method using a build-up film or the like. The formation of the flat surface S1 makes it easier to form a fine wiring layer 30 with high precision.

[0029] By separating the carrier 4 from the core substrate 10, a printed wiring board 101 shown in FIG. 7 is obtained.

[0030] 8 and 9 are also process diagrams showing, in schematic end views, an example of a method for manufacturing a printed wiring board. Fig. 10 is an end view showing an example of a printed wiring board that can be manufactured by the method shown in Figs.

[0031] 8 and 9, similarly to the above-described example, after the substrate 1 having the substrate main body portion 11 forming the cavity 11A is placed on the carrier 4, an insulating portion 2 is formed having a thickness smaller than that of the substrate main body portion 11. Therefore, as shown in Fig. 8(a), a recess 25 having a bottom surface including the surface of the insulating portion 2 is formed on the side of the core substrate 10 opposite the carrier 4.

[0032] 8(b), a sealing resin layer 20 is formed to embed the substrate 1, including a portion that fills the recess 25. The sealing resin layer 20 can be formed using a normal sealing material. By removing a portion of the sealing resin layer 20 from the side opposite the substrate 1, a flat surface S2 is formed that includes the surface of the substrate 1 (lid portion 15) and the surface of the sealing resin layer 20. A wiring layer 30 that includes a wiring portion 31 and an insulating resin portion 32 is formed on the formed flat surface S2.

[0033] By separating the carrier 4 from the core substrate 10, a printed wiring board 102 shown in FIG. 10 is obtained.

[0034] The printed wiring boards exemplified as the printed wiring boards 101 and 102 can be used as wiring boards that constitute a semiconductor package, for example. The printed wiring board may also be an organic interposer that constitutes a semiconductor package.

[0035] 1...substrate, 2...insulating portion, 2A...through hole, 3...seed layer, 4...carrier, 5...conductive portion, 7...conductive pattern layer, 8...resist layer, 10...core substrate, 11A...cavity, 11B...through hole, 12...conductive layer, 13...filled resin portion, 15...lid portion, 20...sealing resin layer, 25...recess, 30...wiring layer, 31...wiring portion, 32...insulating resin portion, 101, 102...printed wiring board, S1, S2...flat surface.

Claims

1. A method for manufacturing a printed wiring board, comprising: preparing a substrate including a substrate main body portion forming a cavity; providing an insulating portion within the cavity, thereby forming a sheet-like core substrate including the substrate and the insulating portion; and providing a wiring layer including a wiring portion and an insulating resin portion on one or both sides of the core substrate, wherein the substrate main body portion is an insulating substrate or a semiconductor substrate, and the insulating portion has a linear expansion coefficient greater than that of the substrate main body portion.

2. A method for manufacturing a printed wiring board, comprising: preparing a substrate including a substrate main body portion forming a cavity; providing an insulating portion within the cavity, thereby forming a sheet-like core substrate including the substrate and the insulating portion; and providing a wiring layer including a wiring portion and an insulating resin portion on one or both sides of the core substrate, wherein the substrate main body portion is a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate, and the insulating portion is a hardened film formed by hardening a photosensitive resin layer or a thermosetting resin layer.

3. The method according to claim 1 or 2, wherein the insulating portion is provided in the cavity so as to be in contact with the substrate main body portion.

4. The method according to claim 1 or 2, wherein providing the insulating portion includes: forming the insulating portion including a portion that fills the cavity and embeds the substrate; and removing a portion of the insulating portion from the side opposite the substrate to form a flat surface including the surface of the substrate and the surface of the insulating portion, and the wiring layer is provided on the flat surface.

5. The method according to claim 1 or 2, further comprising: placing the substrate on a carrier; and separating the core substrate and the carrier after the insulating portion is provided in the cavity.

6. The method according to claim 1 or 2, wherein the insulating section forms a through hole penetrating the insulating section, the method further comprising providing a conductive section in the through hole, and the wiring layer is provided so that the wiring section is electrically connected to the conductive section.

7. The method according to claim 6, wherein providing the insulating portion in the cavity includes: forming a photosensitive resin layer in the cavity; and forming the insulating portion as a hardened film that forms the through-hole by a method including exposing and developing the photosensitive resin layer.

8. The method according to claim 6, further comprising: placing the substrate on a carrier; and separating the core substrate and the carrier after the insulating portion is provided in the cavity; wherein a conductive pattern layer forming a pattern is provided on the carrier, the cavity penetrates the substrate main body portion, the substrate is placed on the carrier so that at least a portion of the conductive pattern layer is exposed in the cavity, and the conductive portion is provided in the through hole so as to be electrically connected to the conductive pattern layer.

9. The method according to claim 1 or 2, wherein the insulating portion is provided in the cavity so that a recess having a bottom surface including the surface of the insulating portion is formed on one or both sides of the core substrate, the method further comprising providing an encapsulating resin layer including a portion that fills the recess, and the wiring layer is provided on the encapsulating resin layer on the recess side of the core substrate.

10. The method according to claim 9, wherein providing the sealing resin layer includes: forming the sealing resin layer including a portion that fills the recess and embeds the substrate; and removing a portion of the sealing resin layer from the side opposite the substrate to form a flat surface including the surface of the substrate and the surface of the sealing resin layer, and the wiring layer is provided on the flat surface.

11. A printed wiring board comprising: a sheet-like core substrate; and a wiring layer provided on one or both sides of the core substrate, the wiring layer including a wiring portion and an insulating resin portion, wherein the core substrate comprises: a substrate including a substrate main body portion forming a cavity; and an insulating portion provided within the cavity, wherein the substrate main body portion is an insulating substrate or a semiconductor substrate, and the linear expansion coefficient of the insulating portion is greater than the linear expansion coefficient of the substrate main body portion.

12. A printed wiring board comprising: a sheet-like core substrate; and a wiring layer including a wiring portion and an insulating resin portion provided on one or both sides of the core substrate, wherein the core substrate comprises: a substrate including a substrate main body portion forming a cavity; and an insulating portion provided within the cavity, wherein the substrate main body portion is a fiber-reinforced resin substrate, a silicon substrate, a glass substrate, or a ceramic substrate, and the insulating portion is a hardened film formed by hardening a photosensitive resin layer or a thermosetting resin layer.

13. The printed wiring board according to claim 11 or 12, wherein the insulating portion is in contact with the board main body portion.

14. The printed wiring board according to claim 11 or 12, wherein a flat surface is formed including the surface of the substrate and the surface of the insulating portion, and the wiring layer is provided on the flat surface.

15. A printed wiring board according to claim 11 or 12, wherein the insulating portion forms a through hole penetrating the insulating portion, the core substrate further includes a conductive portion provided in the through hole, and the conductive portion and the wiring portion are electrically connected.

16. A printed wiring board as described in claim 11 or 12, wherein a recess having a bottom surface including the surface of the insulating part is formed on one or both sides of the core substrate, the printed wiring board further comprising an encapsulating resin layer including a portion that fills the recess, and the wiring layer is provided on the encapsulating resin layer on the recess side of the core substrate.

17. The printed wiring board according to claim 16, wherein a flat surface is formed including the surface of the substrate and the surface of the sealing resin layer, and the wiring layer is provided on the flat surface.

Citation Information

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