Multilayer ceramic capacitor

By incorporating a perovskite structure with tin solid solution in the dielectric layers and a perovskite region in the internal electrode layers, the multilayer ceramic capacitors maintain high reliability and dielectric constant despite the presence of tin.

WO2025248979A1PCT designated stage Publication Date: 2025-12-04MURATA MFG CO LTD
View PDF 3 Cites 0 Cited by

Patent Information

Application Number
PCT/JP2025/014130
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-05-27
Filing Date
2025-04-09
Publication Date
2025-12-04

AI Technical Summary

Technical Problem

In multilayer ceramic capacitors, the presence of a non-perovskite oxide interface layer containing tin reduces the proportion of the perovskite oxide in the dielectric layer, affecting reliability and dielectric constant.

Method used

The dielectric layers contain barium and titanium with a perovskite structure and incorporate tin as a solid solution, while the internal electrode layers have a first region with dissolved tin near the interface and a second region with a perovskite structure containing tin, maintaining the perovskite proportion.

Benefits of technology

This configuration enhances the reliability and dielectric constant of the multilayer ceramic capacitors by suppressing the decrease in the perovskite structure region and improving the proportion of perovskite oxide.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure JP2025014130_04122025_PF_FP_ABST
    Figure JP2025014130_04122025_PF_FP_ABST
Patent Text Reader

Abstract

The present disclosure relates to a multilayer ceramic capacitor (100). A multilayer ceramic capacitor (100) according to the present disclosure includes a ceramic element (10) in which a plurality of dielectric layers (11) and a plurality of internal electrode layers (12) are alternately laminated. The dielectric layer (11) contains ceramic as a main component, the ceramic contains barium and titanium, and the dielectric layer (11) further contains tin. The internal electrode layer (12) contains nickel as a main component. The internal electrode layer (12) has, at the vicinity of an interface with at least the dielectric layer (11), a first region in which the tin is dissolved, and the dielectric layer has a second region in which a Perovskite structure containing barium and titanium is formed. The second region is in contact with the internal electrode layer (12), and tin is dissolved in the Perovskite structure in the second region.
Need to check novelty before this filing date? Find Prior Art

Description

Multilayer ceramic capacitors

[0001] The present disclosure relates to multilayer ceramic capacitors.

[0002] Japanese Patent Laid-Open Publication No. 2022-143403 (Patent Document 1) discloses a multilayer ceramic capacitor in which reliability is improved by providing an interface layer made of a non-perovskite oxide containing tin at a portion of a dielectric layer containing a perovskite oxide containing barium and titanium as a main component and contacting an internal electrode layer.

[0003] Japanese Patent Application Laid-Open No. 2022-143403

[0004] In multilayer ceramic capacitors, dielectric layers are often made of perovskite oxides containing barium and titanium in order to obtain a high dielectric constant. However, in the multilayer ceramic capacitor of Patent Document 1, an interface layer made of a non-perovskite oxide containing tin is formed at the portion where the dielectric layer contacts the internal electrode layer, which tends to reduce the proportion of the region made of perovskite oxide in the dielectric layer.

[0005] The present disclosure aims to provide a multilayer ceramic capacitor in which a decrease in the proportion of the region in the dielectric layer that is composed of a perovskite structure (e.g., the proportion of layers that have a perovskite structure per unit thickness) is suppressed even when the region of the dielectric layer that is in contact with an internal electrode layer contains tin.

[0006] A multilayer ceramic capacitor according to the present disclosure includes a ceramic element body in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately stacked. The dielectric layers contain ceramic as a main component. The ceramic contains barium and titanium. The dielectric layers further contain tin. The internal electrode layers contain nickel as a main component. The internal electrode layers have a first region in which tin is dissolved, at least near the interface with the dielectric layers. The dielectric layers have a second region in which a perovskite structure containing barium and titanium is formed. The second region is in contact with the internal electrode layers. The perovskite structure in the second region contains tin as a solid solution.

[0007] According to the present disclosure, it is possible to provide a multilayer ceramic capacitor in which a decrease in the proportion of the region in the dielectric layer that is composed of a perovskite structure is suppressed even when the region of the dielectric layer that is in contact with the internal electrode layer contains tin.

[0008] 1 is a cross-sectional view showing an example of a multilayer ceramic capacitor as an embodiment of a multilayer electronic component according to the present disclosure; 2 is a schematic diagram of a transmission electron microscope image of a region including an interface between a dielectric layer and an internal electrode layer in a cross section of a ceramic body in the lamination direction; 3 is a transmission electron microscope image of a multilayer ceramic capacitor fabricated in an example; 4 is a transmission electron microscope image of a multilayer ceramic capacitor fabricated in an example;

[0009] A multilayer ceramic capacitor according to the present disclosure will be described with reference to the drawings.

[0010] 1 is a cross-sectional view of a multilayer ceramic capacitor 100. The multilayer ceramic capacitor 100 includes a ceramic body 10. The ceramic body 10 is formed by alternately stacking a plurality of dielectric layers 11 and a plurality of internal electrode layers 12.

[0011] The ceramic body 10 has a first main surface and a second main surface that face each other in the stacking direction, a first side surface and a second side surface that face each other in a width direction perpendicular to the stacking direction, and a first end face 13a and a second end face 13b that face each other in a length direction perpendicular to the stacking direction and the width direction.

[0012] The plurality of dielectric layers 11 have outer layer portions and inner layer portions. The outer layer portions are disposed between the first main surface of the ceramic body 10 and the internal electrode layer 12 closest to the first main surface, and between the second main surface and the internal electrode layer 12 closest to the second main surface. The inner layer portions are disposed in a region sandwiched between the two outer layer portions. The number of dielectric layers 11 in the multilayer ceramic capacitor 100 is, for example, 100 to 900.

[0013] The dielectric layer 11 contains ceramic as a main component. The main component refers to the component with the largest content in terms of mass among the constituent components. The ceramic content in the dielectric layer 11 may be 50 mass% or more, 60 mass% or more, 70 mass% or more, 80 mass% or more, 90 mass% or more, 95 mass% or more, or 99 mass% or more based on the total mass of the dielectric layer 11.

[0014] The ceramic may contain a perovskite structure oxide (hereinafter also referred to as a perovskite oxide) containing titanium (Ti) and barium (Ba) as a main component. The ceramic may have crystal grains composed of the perovskite oxide. The perovskite oxide may be barium titanate (BaTiO 3 ) based compounds. 3 is represented by the general formula: ABO 3 It is a perovskite oxide represented by BaTiO 3 is a ferroelectric material that exhibits a tetragonal crystal structure at room temperature and has a high dielectric constant. 3 By using a perovskite-type compound as the main component, the dielectric constant of the dielectric ceramic can be increased, making it possible to increase the capacitance of the capacitor. The content of the perovskite-type oxide in the ceramic may be, for example, 50 mass % or more, 60 mass % or more, 70 mass % or more, 80 mass % or more, or 90 mass % or more. The ceramic may have crystal grains as described below.

[0015] BaTiO 3 The BaTiO-based compound is not particularly limited as long as it is a perovskite-type oxide containing mainly Ba and Ti. 3 The compound is BaTiO 3 or BaTiO 3 In addition, Ba and / or Ti contained in BaTiO may be partially substituted with other elements. Specifically, Ba may be partially substituted with strontium (Sr) and / or calcium (Ca), and Ti may be partially substituted with zirconium (Zr) and / or hafnium (Hf).3 The ratio of A-site elements (Ba, Sr, Ca, etc.) to B-site elements (Ti, Zr, Hf, etc.) in the perovskite-based compounds is not strictly limited to 1:1. As long as the perovskite crystal structure is maintained, deviations in the ratio of A-site elements to B-site elements are permissible.

[0016] The dielectric layer 11 further contains tin (Sn). When the dielectric layer 11 contains Sn, the region of the dielectric layer in contact with the internal electrode layer is more likely to contain tin, which tends to increase the reliability of the multilayer ceramic capacitor. Sn may be present dispersedly throughout the dielectric layer 11. Sn may be present in a solid solution at either the A element site (e.g., Ba site) or the B element site (e.g., Ti site) of the perovskite structure containing Ba and Ti present in the dielectric layer 11, or may be present in a solid solution at both the A element site (e.g., Ba site) and the B element site (e.g., Ti site). Sn may be present in a solid solution in a greater amount at the B element site than at the A element site in the perovskite structure containing Ba and Ti present in the dielectric layer 11.

[0017] The thickness of the dielectric layer 11 may be, for example, 0.4 μm or less. When the thickness of the dielectric layer is a thin layer of 0.4 μm or less, the effects of improving reliability and dielectric constant by forming the first region and second region described below can be more suitably obtained. The thickness of the dielectric layer 11 is preferably 0.1 μm or more from the viewpoint of ensuring reliability. The thickness of the dielectric layer 11 is the thickness of a single dielectric layer in the internal layer portion (a dielectric layer present between two opposing internal electrode layers). The thickness of the dielectric layer 11 can be measured, for example, in a scanning electron microscope (hereinafter sometimes abbreviated as SEM) or transmission electron microscope (hereinafter sometimes abbreviated as TEM) observation image of a cross section of the ceramic body 10 in the stacking direction.

[0018] The internal electrode layers 12 contain nickel (Ni) as a main component. The Ni content in the internal electrode layers 12 may be, for example, 50 mass % or more, 60 mass % or more, 70 mass % or more, 80 mass % or more, or 90 mass % or more.

[0019] The internal electrode layers 12 contain Sn. The Sn contained in the internal electrode layers 12 may be present in a state of solid solution in the first region described below, with Sn contained in the dielectric layer (dielectric sheet before sintering) migrating to the internal electrode layer side during the sintering process of the ceramic body described below. The internal electrode layers 12 may contain, in addition to Ni and Sn, other conductive metals, for example, at least one selected from the group consisting of copper (Cu), silver (Ag), palladium (Pd), and alloys containing these. The internal electrode layers 12 may further contain other components. Examples of the other components include ceramic components that function as co-materials. As the ceramic component, BaTiO contained in the dielectric layer 11 may be used. 3 Examples include compounds based on the above.

[0020] The thickness of the internal electrode layers 12 may be, for example, 0.4 μm or less. When the thickness of the internal electrode layers 12 is 0.4 μm or less, a decrease in the proportion of the dielectric layers 11 in the multilayer ceramic capacitor 100 is suppressed, and as a result, a decrease in capacitance tends to be easily suppressed. The thickness of the internal electrode layers 12 may be, for example, 0.3 μm or more. When the thickness of the internal electrode layers 12 is 0.3 μm or more, defects such as electrode discontinuities tend to be easily suppressed. The thickness of the internal electrode layers 12 can be measured in an SEM observation image or TEM observation image of a cross section in the stacking direction of the ceramic body 10.

[0021] The internal electrode layer 12 has a first region in which Sn is dissolved at least near the interface with the dielectric layer 11. The presence of the first region in the internal electrode layer 12 near the interface with the dielectric layer 11 can be confirmed, for example, by combining TEM observation and EDX analysis of a region including the interface between the dielectric layer 11 and the internal electrode layer 12 in a cross section of the ceramic body 10 in the stacking direction. TEM observation can be, for example, high-angle scattering annular dark-field scanning transmission electron microscopy (HAADF-STEM). The HAADF-STEM method is a technique in which a focused electron probe is scanned on a sample, and high-angle scattered transmitted electrons among those transmitted through the sample are detected with an annular detector to perform two-dimensional mapping. The HAADF-STEM method can obtain an image with atomic resolution, and image interpretation is easy because there is no inversion of image contrast. The presence of the first region can be confirmed by confirming the atomic positions in the image using HAADF-STEM observation and identifying the atoms using EDX.

[0022] The internal electrode layer 12 may have Sn as a solid solution in a central region. The central region is a region inside the internal electrode layer 12 that exists outside the first region. The concentration of Sn in the first region is higher than the concentration of Sn in the central region.

[0023] The dielectric layer 11 has a second region in which a perovskite structure containing Ba and Ti is formed. The second region is a region in contact with the internal electrode layer 12. The perovskite structure formed in the second region contains Sn as a solid solution. The formation of a perovskite structure containing Sn as a solid solution suppresses the generation of a non-perovskite structure containing Ba, Ti, and Sn in the dielectric layer containing Ba, Ti, and Sn, which tends to relatively suppress a decrease in the proportion of the region composed of the perovskite structure. The Sn dissolved in the perovskite structure formed in the second region may be dissolved in either the A element site (e.g., the Ba site) or the B element site (e.g., the Ti site), or may be dissolved in both. In the perovskite structure formed in the second region, more Sn may be dissolved in the B element site than in the A element site. Sn may be present in solid solution at Ti sites in the perovskite structure containing Ba and Ti formed in the second region.

[0024] The presence of the second region can be confirmed, for example, by performing a combination of TEM observation and EDX analysis on a region including the interface between the dielectric layer 11 and the internal electrode layer 12 in a cross section in the stacking direction of the ceramic body 10. The TEM observation may be the HAADF-STEM method described above.

[0025] 2 is a schematic diagram of a TEM image obtained by TEM observation of a region including the interface between the dielectric layer 11 and the internal electrode layer 12 in a cross section of the ceramic body 10 in the stacking direction. An interface BL exists between the dielectric layer 11 and the internal electrode layer 12. A first region M in which Sn is dissolved exists in the internal electrode layer 12 near the interface BL with the dielectric layer 11. An alloy containing Sn may be formed in the first region M. Elements other than Sn may also be dissolved in the first region M. In FIG. 2 , the direction indicated by the arrow is the stacking direction L of the ceramic body 10.

[0026] The first region M is a region located near the interface BL and may be, for example, a region located within several tens of nanometers of the interface BL in the stacking direction L of the ceramic body 10, for example, a region located within 10 nm of the interface BL. The first region M may have a length (width) of 10 nm or less in the stacking direction L. The first region M may be a region in contact with the dielectric layer 11 or may be a region not in contact with the dielectric layer 11. The tin dissolved in the first region M may be, for example, located within several tens of nanometers of the interface BL in the stacking direction L of the ceramic body 10, for example, and may be located within 10 nm of the interface BL.

[0027] In FIG. 2 , a second region N is formed on the dielectric layer 11 side in contact with the internal electrode layer 12. The perovskite structure formed in the second region N contains Sn as a solid solution. The second region N may be formed over the entire interface BL between the dielectric layer 11 and the internal electrode layer 12, or may be formed only in a portion of the interface BL between the dielectric layer 11 and the internal electrode layer 12. When the second region N is provided only in a portion of the interface BL, the second region N may be present in only one location, or may be present separately in multiple locations. From the viewpoint of the proportion of the region consisting of the perovskite structure, the more locations where the second region N is present, the better.

[0028] The second region N may be a region located within a few nanometers of the interface BL in the stacking direction of the ceramic body 10, for example, within 2 nanometers of the interface BL. The second region N may have a length (width) of 2 nanometers or less in the stacking direction L. When the length (width) of the second region N from the interface BL is expressed in terms of the number of atomic layers, it may correspond to 1 to 5 atomic layers.

[0029] The first region M and the second region N can be obtained by adjusting the manufacturing conditions of the ceramic body, for example, the sintering conditions in the firing step (for example, the sintering temperature, the sintering time, etc.) For example, in a manufacturing method of a multilayer ceramic capacitor described below, a pre-sintered dielectric sheet containing an oxide of Sn is fired in a first firing step and a second firing step, and the second firing step is fired for a longer time than the first firing step, so that Sn uniformly diffused in the dielectric layer segregates near the interface, forming a region where Sn is solid-solved near the interface on the internal electrode layer side, and Sn tends to be easily diffused in the dielectric layer while maintaining the perovskite structure.

[0030] In the dielectric layer 11, the perovskite structure in which Sn is dissolved may be formed in a region other than the second region. The perovskite structure in which Sn is dissolved may be formed in the whole or part of the dielectric layer 11.

[0031] The dielectric layer 11 may further include at least one element selected from the group consisting of Ni, manganese (Mn), magnesium (Mg), silicon (Si), aluminum (Al), vanadium (V), and rare earth elements. The rare earth elements may include at least one element selected from the group consisting of scandium (Sc), yttrium (Y), lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), and lutetium (Lu). The rare earth elements preferably include Dy.

[0032] When the dielectric layer 11 contains a rare earth element, various characteristics such as high temperature load life and temperature characteristics of dielectric constant tend to be improved. 3 The dielectric layer may contain many oxygen vacancies generated during the firing process. These oxygen vacancies act as paths for electric charges, which may reduce the insulation resistance. Adding rare earth elements to the dielectric layer may reduce the insulating resistance. 3The rare earth elements tend to dissolve in the Ba site or Ti site of the BaTiO based compound. The dissolved rare earth elements function as donors or acceptors, preventing the movement of oxygen vacancies, which results in an increase in insulation resistance and a tendency to improve the high temperature load life. The dielectric layer may contain one type of rare earth element or a combination of multiple types of rare earth elements. The rare earth elements are also present in the BaTiO 3 They may be contained only in the system compound, or may be contained in the grain boundary, triple point, or the like.

[0033] When the dielectric layer 11 contains Dy, Dy tends to be easily dissolved in the A element site or the B element site of the perovskite structure. As shown in FIG. 2, the dielectric layer 11 is BaTiO 3 The grains G of the BaTiO system compound are included, and grain boundaries GB are formed. Dy is present in the BaTiO 3 Dy tends to dissolve more easily in the Ba site or Ti site of the dielectric compound. Also, in the portion (shell portion) in contact with the grain boundary GB of the crystal grain G present in the portion in contact with the interface BL, Dy tends to dissolve more easily in the Ti site than in the Ba site. Also, in the portion (shell portion) in contact with the grain boundary GB of the crystal grain G present near the center inside the dielectric layer 11 away from the interface BL, Dy tends to dissolve more easily in the Ba site than in the Ti site.

[0034] A Dy segregation phase (Dy segregation phase) may be present inside the dielectric layer 11 in a portion in contact with the internal electrode layer 12. The Dy segregation phase is formed by the BaTiO 3 This occurs when Dy that is not dissolved in the system compound segregates at the interface. When a Dy segregation phase exists, the reliability of the multilayer ceramic capacitor 100 tends to be improved.

[0035] The multiple internal electrode layers 12 include a first internal electrode layer 12a and a second internal electrode layer 12b. The first internal electrode layer 12a has a counter electrode portion facing the second internal electrode layer 12b with the dielectric layer 11 interposed therebetween, and a lead electrode portion extending from the counter electrode portion to the first end face 13a of the ceramic body 10. The second internal electrode layer 12b has a counter electrode portion facing the first internal electrode layer 12a with the dielectric layer 11 interposed therebetween, and a lead electrode portion extending from the counter electrode portion to the second end face 13b of the ceramic body 10.

[0036] A single capacitor is formed by the first internal electrode layer 12a and the second internal electrode layer 12b facing each other via the dielectric layer 11. The multilayer ceramic capacitor 100 can be said to be a plurality of capacitors connected in parallel via first external electrodes 14a and second external electrodes 14b, which will be described later.

[0037] The multilayer ceramic capacitor 100 further includes a first external electrode 14a and a second external electrode 14b. The first external electrode 14a is formed on a first end face 13a of the ceramic body 10 so as to be electrically connected to the first internal electrode layer 12a. The first external electrode 14a extends from the first end face 13a to the first and second main faces and the first and second side faces. The second external electrode 14b is formed on a second end face 13b of the ceramic body 10 so as to be electrically connected to the second internal electrode layer 12b. The second external electrode 14b extends from the second end face 13b to the first and second main faces and the first and second side faces.

[0038] The first external electrode 14 a and the second external electrode 14 b each have, for example, a base electrode layer and a plating layer disposed on the base electrode layer. The base electrode layer includes, for example, at least one selected from a sintered body layer, a conductive resin layer, and a metal thin film layer.

[0039] The sintered body layer is formed by baking a paste containing glass powder and metal powder, and includes a glass portion and a metal portion. 2 O 3 -SiO 2Examples of suitable metals for the metal portion include BaO-based glasses. The metal portion may be made of at least one selected from the group consisting of Ni, Cu, and Ag, or an alloy containing such a metal. The sintered body layer may be formed of multiple layers made of different components. In the manufacturing method described below, the sintered body layer may be fired simultaneously with the ceramic body 10, or may be baked after the ceramic body 10 has been fired.

[0040] The conductive resin layer includes conductive particles, such as metal fine particles, and a resin portion. The metal fine particles may include at least one selected from Ni, Cu, Ag, etc., or an alloy containing such a metal. The resin portion may include an epoxy-based thermosetting resin. The conductive resin layer may be formed of multiple layers made of different components.

[0041] The metal thin film layer is a layer of metal fine particles deposited to a thickness of 1 μm or less, formed by a thin film formation method such as sputtering or vapor deposition. The metal constituting the metal thin film layer may be at least one selected from Ni, Cu, Ag, Au, etc., or an alloy containing such a metal. The metal thin film layer may be formed of multiple layers made of different components.

[0042] The metal constituting the plating layer may be at least one selected from the group consisting of Ni, Cu, Ag, Au, Sn, etc., or an alloy containing such a metal. The plating layer may be formed of a plurality of layers made of different components.

[0043] The first external electrode 14a and the second external electrode 14b may each be a plated layer that is provided directly on the ceramic body 10 and directly connected to the corresponding internal electrode layer described above.

[0044] <Method for manufacturing a multilayer ceramic capacitor> A method for manufacturing the multilayer ceramic capacitor 100 may include a lamination process of laminating a plurality of mother sheets, each including a pre-fired dielectric sheet having an internal electrode pattern formed thereon, to obtain a pre-fired ceramic body, a first firing process of firing the pre-fired ceramic body, and a second firing process of further firing the ceramic body after the first firing process.

[0045] The pre-fired dielectric sheet is a precursor of the dielectric layer and contains the main component raw material and the additive component raw material of the dielectric layer, as well as Sn oxide. The pre-fired dielectric sheet can be produced by any known method, without particular limitation. The main component raw material is mixed with the additive component raw material to produce a dielectric raw material, and a binder and a solvent are added and mixed to the resulting dielectric raw material to prepare a dielectric layer-forming slurry. The pre-fired dielectric sheet can be formed from the resulting dielectric layer-forming slurry. Sn oxide can be added to either or both of the dielectric raw material and the dielectric layer-forming slurry. Sn oxide can be blended so that it contains 0.01 to 0.10 molar parts of tin (Sn) per 100 molar parts of titanium (Ti) in the pre-fired dielectric sheet. Adding Ni oxide to either or both of the dielectric raw material and the dielectric layer-forming slurry tends to facilitate Sn diffusion.

[0046] Next, the dielectric layer forming slurry is formed into a sheet on a carrier film using a die coater, gravure coater, microgravure coater, or the like, to form a pre-fired dielectric sheet.

[0047] Next, a mother sheet is formed. Specifically, a conductive paste is printed in a predetermined pattern on the pre-fired dielectric sheet using a screen printing method, a gravure printing method, or the like, to form a mother sheet having the predetermined conductive pattern on the pre-fired dielectric sheet.

[0048] As the mother sheet, in addition to the mother sheet having the conductive pattern, a pre-fired dielectric sheet having no conductive pattern formed thereon is also prepared.

[0049] Next, the mother sheets are stacked. Specifically, a predetermined number of mother sheets that do not have a conductive pattern and that constitute the outer layer portion are stacked, and then a plurality of mother sheets that have a conductive pattern and that constitute the inner layer portion are stacked in order on top of these, and then a predetermined number of mother sheets that do not have a conductive pattern and that constitute the outer layer portion are stacked on top of these, thereby forming a mother sheet group.

[0050] Next, the mother sheets are pressed together by a hydrostatic press or a rigid press in the stacking direction to form a mother laminate.

[0051] Next, the mother laminate is divided. Specifically, the mother laminate is divided into a matrix by press-cutting or dicing, and is divided into a plurality of pre-fired ceramic bodies. The pre-fired ceramic bodies may be barrel-polished.

[0052] In the first firing step, the pre-fired ceramic body is fired. The firing temperature in the first firing step is set appropriately depending on the type of starting material, and may be, for example, higher than 1100° C. or 1200° C. or higher. The firing temperature in the first firing step may be, for example, 1300° C. or lower.

[0053] The firing time in the first firing step may be, for example, 1 minute to 30 minutes. The first firing step may be performed in a reducing atmosphere. Before firing in the first firing step, the binder component may be burned by heating in an inert gas (e.g., nitrogen) atmosphere at a temperature lower than the firing temperature, for example, a temperature of 500°C or lower.

[0054] In the second firing step, the ceramic body is further fired after the first firing step. The firing time in the second firing step is longer than that in the first firing step. By firing in the second firing step for a longer time than that in the first firing step, Sn uniformly diffused in the dielectric layer segregates near the interface, forming a region where Sn is solid-dissolved near the interface on the internal electrode layer side, and Sn tends to be more easily diffused in the dielectric layer while maintaining the perovskite structure. The firing time in the second firing step may be, for example, more than 30 minutes, or may be 60 minutes or more, or may be 6 hours or less.

[0055] The firing temperature in the second firing step may be lower than that in the first firing step. The firing temperature in the second firing step may be, for example, less than 1100°C and may be 1000°C or less. The firing temperature in the second firing step may be, for example, a temperature of 900°C or more. By performing firing in the second firing step at a temperature within the above range, the above-mentioned second region tends to be more easily obtained. The second firing step can be performed in a reducing atmosphere. After the second firing, the pre-fired dielectric sheet and the internal electrode pattern are co-sintered to become dielectric layers and internal electrode layers, respectively, and a ceramic body is produced.

[0056] Next, after a base electrode layer is formed on the surface of the ceramic body, a plating layer is formed by electroplating so as to cover the base electrode layer.

[0057] The multilayer ceramic capacitor 100 of the present disclosure is manufactured through the above series of steps.

[0058] <Preparation of Multilayer Ceramic Capacitors> (Samples 1 to 15) First, a predetermined amount of barium carbonate (BaCO 3 ) powder and titanium dioxide (TiO 2 The weighed powders were then combined and mixed using a ball mill, and then subjected to heat treatment under predetermined conditions to obtain BaTiO 3 A powder of the compound was obtained.

[0059] Next, dysprosium oxide (Dy) was added to 100 parts by mole of titanium (Ti) in the main component. 2 O 3 ) 1 molar part, nickel oxide (NiO) 1 molar part, silicon oxide (SiO 2 The additive raw materials were weighed so that the amount of tin oxide (SnO) was 0.5 parts by mol relative to 100 parts by mol of titanium (Ti) in the main component. 2 ) was further blended in the amounts shown in Table 1. In Samples 1, 6 and 11, tin oxide (SnO 2 The obtained powder of the additive component raw material was then blended with the main component raw material powder together with water, mixed for a certain period of time using a ball mill, dried, and then dry-pulverized to obtain a dielectric raw material powder.

[0060] A polyvinyl butyral binder and ethanol were added to the obtained dielectric raw material powder, and the mixture was wet mixed using a ball mill to prepare a slurry. The obtained slurry was formed into a sheet using a doctor blade method to obtain a pre-fired dielectric sheet. The obtained pre-fired dielectric sheet had a thickness of 0.6 to 1.2 μm.

[0061] Next, a conductive paste was printed on the surface of the obtained pre-fired dielectric sheet in a predetermined pattern to form an internal electrode pattern. The conductive paste was prepared by adding a polyvinyl butyral binder and ethanol to nickel (Ni) powder and wet mixing them using a ball mill.

[0062] A plurality of pre-fired dielectric sheets on which internal electrode patterns were formed were stacked so that the sides on which the internal electrode patterns were drawn were alternately reversed to obtain a laminated block, which was then cut into individual pieces to produce laminated chips (ceramic bodies).

[0063] The obtained laminated chip was heated with nitrogen (N 2 The laminated chip was heated to 280°C in a reducing atmosphere to burn off the binder. The laminated chip with the binder burned off was then fired for 2 minutes at 1200°C in a reducing atmosphere, during which the firing timing of the internal electrode pattern and the pre-fired dielectric sheet was shifted to form a heterogeneous phase. The laminated chip was then further fired at 1000°C for 300 minutes.

[0064] On both end surfaces of the laminated chip after firing, B 2 O 3 -SiO 2 Copper (Cu) paste containing BaO-based glass frit was applied, and nitrogen (N 2 The laminated ceramic capacitor was then baked at 800°C in a 100% SiO 2 atmosphere to form external electrodes electrically connected to the internal electrode layers. This resulted in the production of a multilayer ceramic capacitor. The thickness of each dielectric layer in the internal layer portion of the resulting multilayer ceramic capacitor was 0.33 to 0.60 μm. The thickness of each internal electrode layer was 0.45 μm.

[0065] TEM observation of the microstructure near the interface between the dielectric layer and internal electrode layer of a multilayer ceramic capacitor was performed under the following conditions. (TEM Observation) The interface between the dielectric layer and internal electrode layer of a multilayer ceramic capacitor was observed using a high-angle annular dark-field scanning transmission electron microscope (HAADF-STEM). For the observation, a sample was prepared by thin-film processing using the FIB method. Observation was performed using the STEM method (atomic resolution analytical electron microscope: JEOL JEM-ARM200F) and the STEM-EDX method (atomic resolution analytical electron microscope: JEOL JEM-ARM200FD Dual-X, EDX: JEOL JED-2300, System: NORANTMSytem7) with an acceleration voltage of 200 kV and a beam diameter of approximately 0.2 nmΦ, with appropriate adjustments. Furthermore, after adjusting the orientation of the dielectric element (parent phase; dielectric layer) in the multilayer ceramic capacitor in the (100) direction, the interface between the dielectric grain and Inner E (internal electrode layer) was observed. Thereafter, the orientation of another dielectric grain was adjusted again in the (100) direction, and the interface between the dielectric grain and Inner E (internal electrode layer) was observed. This was repeated five times for each different dielectric grain, and the presence or absence of a first region where Sn was dissolved in solid solution on the internal electrode layer side, a second region where a perovskite structure where Sn was dissolved in solid solution was formed on the dielectric layer side, and a dysprosium segregation phase (Dy segregation phase) was examined.

[0066] As an example of a TEM observation image, a TEM observation image of sample 3 is shown in FIG. 3. FIG. 3A is a TEM observation image near the interface between the internal electrode layer and the dielectric layer. FIG. 3B is an element mapping image of Sn in FIG. 3A. As shown in FIG. 3A, it was observed that a perovskite structure was formed in the region of the dielectric layer in contact with the internal electrode layer. As shown in FIG. 3B, a region (first region) where Sn was solid-dissolved was observed on the internal electrode layer side. Although not shown, segregation of Dy was confirmed on the dielectric layer side by a similar method. FIG. 4A is an element mapping image of Ti, and as shown in FIG. 4C, it was observed that Sn was solid-dissolved in the Ti site.

[0067] It was confirmed that Dy was dissolved in the perovskite structure of the dielectric layer as shown in Fig. 4B. It was confirmed that Dy was dissolved in a larger amount in the Ti site than in the Ba site in the shell portion of the crystal grains present in the portion of the dielectric layer in contact with the interface with the internal electrode layer, and that Dy was dissolved in a larger amount in the Ba site than in the Ti site in the shell portion of the crystal grains present near the center inside the dielectric layer away from the interface.

[0068]

[0069] (Sample 16) A multilayer ceramic capacitor of Example 16 was produced by the same procedure as in Example 2 of JP 2022-143403 A. Specifically, the amount of the additive component raw material used in the production of Sample 1 was changed to 100 parts by mole of titanium (Ti) in the main component, and 100 parts by mole of dysprosium oxide (Dy 2 O 3 ) 0.75 mol parts, magnesium oxide (MgO) 1 mol part, manganese oxide (MnO) 0.2 mol parts, silicon oxide (SiO 2 ) was 1 molar part, and the obtained laminated chip 2 ) After heating to 350 ° C. in an atmosphere to burn off the binder, -10 ~10 -12 MPa H 2 -N 2 -H 2 The internal electrode pattern and the green sheet were fired at 1200°C for 20 minutes in a reducing atmosphere of O gas at a temperature increase rate of 50°C to 100 / min, with the firing timing of the internal electrode pattern and the green sheet shifted to form a heterogeneous phase. Then, the obtained element part was heated in an oxygen partial pressure of 10 -12 ~10 -15 A multilayer ceramic capacitor was fabricated in the same manner as in Sample 1, except that the sample was annealed in an atmosphere of 1050° C. for 30 minutes under a pressure of 100 MPa. The results are shown in Table 2.

[0070]

[0071] Compared with Sample 16, which was prepared based on Example 2 of JP 2022-143403 A, Samples 2 to 5, 7 to 10, and 12 to 15 exhibited high reliability and dielectric constant. Furthermore, Samples 3 to 5, 8 to 10, and 13 to 15, which also contained Dy segregation phases, exhibited even higher reliability.

[0072] In the above-described embodiments, configurations that can be combined may be combined with each other.

[0073] The embodiments disclosed herein should be considered to be illustrative in all respects and not restrictive. The scope of the present invention is defined by the claims, not by the above description, and is intended to include all modifications within the meaning and scope of the claims.

[0074] It will be appreciated by those skilled in the art that the exemplary embodiments described above are examples of the following aspects.

[0075] (Item 1) A multilayer ceramic capacitor according to the present disclosure includes a ceramic body in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately stacked. The dielectric layers contain ceramic as a main component. The ceramic contains barium and titanium. The dielectric layers further contain tin. The internal electrode layers contain nickel as a main component. The internal electrode layers have a first region in which tin is dissolved, at least near the interface with the dielectric layers. The dielectric layers have a second region in which a perovskite structure containing barium and titanium is formed. The second region is in contact with the internal electrode layers. The perovskite structure in the second region contains tin as a solid solution.

[0076] (Item 2) In the multilayer ceramic capacitor described in item 1, the tin dissolved in the first region is present within 10 nm from the interface in the lamination direction of the ceramic body.

[0077] (Item 3) In the multilayer ceramic capacitor according to item 1 or 2, tin is dissolved in the titanium site in the perovskite structure in the second region.

[0078] (Item 4) In the multilayer ceramic capacitor according to any one of items 1 to 3, tin is further present in a central region of the internal electrode layer. The concentration of tin in the first region is higher than the concentration of tin in the central region.

[0079] (Item 5) In the multilayer ceramic capacitor according to any one of items 1 to 4, the thickness of the dielectric layer is 0.4 μm or less.

[0080] (Item 6) In the multilayer ceramic capacitor according to any one of items 1 to 5, the thickness of the internal electrode layers is 0.4 μm or less.

[0081] (7) The multilayer ceramic capacitor according to any one of the first to sixth aspects further contains a rare earth element.

[0082] (Item 8) In the multilayer ceramic capacitor according to item 7, the rare earth element includes dysprosium.

[0083] (Item 9) A method for manufacturing a multilayer ceramic capacitor according to any one of Items 1 to 8, comprising: a lamination step of laminating a plurality of mother sheets, each including a pre-fired dielectric sheet having an internal electrode pattern formed thereon, to obtain a pre-fired ceramic body; a first firing step of firing the pre-fired ceramic body; and a second firing step of further firing the ceramic body after the first firing step, wherein the second firing step is performed for a longer time than the first firing step, and the firing temperature in the second firing step is lower than the firing temperature in the first firing step.

[0084] 100 Multilayer ceramic capacitor, 10 Ceramic body, 11 Dielectric layer, 12 Internal electrode layer, 12a First internal electrode layer, 12b Second internal electrode layer, 13a First end face, 13b Second end face, 14a First external electrode, 14b Second external electrode, N Second region, M First region, BL Interface, G Crystal grain, GB Grain boundary, L Stacking direction.

Claims

1. A multilayer ceramic capacitor comprising a ceramic element in which a plurality of dielectric layers and a plurality of internal electrode layers are alternately stacked, wherein the dielectric layers contain ceramic as a main component, the ceramic containing barium and titanium, the dielectric layers further containing tin, the internal electrode layers contain nickel as a main component, the internal electrode layers have a first region in which tin is dissolved at least near the interface with the dielectric layer, the dielectric layers have a second region in which a perovskite structure containing barium and titanium is formed, the second region is in contact with the internal electrode layers, and the perovskite structure in the second region has tin dissolved therein.

2. The multilayer ceramic capacitor according to claim 1, wherein the tin dissolved in the first region is present within 10 nm of the interface in the stacking direction of the ceramic body.

3. The multilayer ceramic capacitor according to claim 1, wherein in the perovskite structure in the second region, the tin is dissolved in a titanium site.

4. A multilayer ceramic capacitor according to any one of claims 1 to 3, wherein tin is further present in a central region of the internal electrode layer, and the concentration of tin in the first region is higher than the concentration of tin in the central region.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the thickness of the dielectric layer is 0.4 μm or less.

6. The multilayer ceramic capacitor according to any one of claims 1 to 5, wherein the thickness of the internal electrode layers is 0.4 μm or less.

7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the dielectric layers further contain a rare earth element.

8. The multilayer ceramic capacitor according to claim 7, wherein the rare earth element includes dysprosium.

9. A method for manufacturing a multilayer ceramic capacitor according to any one of claims 1 to 8, comprising: a lamination step of laminating a plurality of mother sheets, each of which includes a pre-fired dielectric sheet having an internal electrode pattern formed thereon, to obtain a pre-fired ceramic body; a first firing step of firing the pre-fired ceramic body; and a second firing step of further firing the ceramic body after the first firing step, wherein the second firing step is performed for a longer time than the first firing step, and the firing temperature in the second firing step is lower than the firing temperature in the first firing step.

Citation Information

Patent Citations

  • Manufacturing method for electronic component

    JP2008124276A

  • Dielectric composition, and laminated ceramic electronic component

    JP2022023548A

  • Multilayer ceramic capacitor

    JP2022143403A