Method for producing a multi-layer substrate having an integrated conductor structure, and multi-layer substrate producible according to the method

Abstract

In order to produce a multilayer substrate having an integrated conductor structure, a layer (103) made of an organic dielectric and a metal layer (104) are applied to one side (101a) of a layered substrate (101) made of a dielectric inorganic material. The layered substrate (101) has at least one through-hole (102) which is thereby closed, wherein the two layers (103) and (104) form at least one base of the at least one closed hole, and an inner side of the at least one base is formed by the layer (103) made of the organic dielectric. The latter is removed in a subsequent step such that the metal layer (104) of the at least one base is exposed. The at least one closed through-hole (102) is then filled with a metal by means of electrochemical deposition, and then the metal layer (104) is structured to form the conductor structure or, alternatively, the metal layer (104) is removed and the conductor structure is then built up on the layer (103) made of the organic dielectric. In addition to the method, multilayer substrates produced by said method and having the integrated conductor structure are also described.

Description

[0001] METHOD FOR PRODUCING A MULTI-LAYER SUBSTRATE WITH AN INTEGRATED LADDER STRUCTURE AND A MULTI-LAYER SUBSTRATE PRODUCABLE BY THE METHOD

[0002] AREA OF INVENTION

[0003] The invention relates to a method for producing a multilayer substrate with an integrated conductor structure and multilayer substrates produced according to the method.

[0004] BACKGROUND TO THE INVENTION

[0005] Printed circuit boards (PCBs) serve as carriers for electronic components in electronics, such as SMD components (Surface-Mount Device), BGA components (Ball Grid Array) or THT components (Through-Hole Technology).

[0006] Printed circuit boards (PCBs) typically have a multilayer structure with conductor structures in several levels. These conductor structures are separated from each other by dielectric layers. The dielectric layers are usually interrupted by vias (vias), which electrically connect conductor structures on opposite sides of the dielectric layers.

[0007] For simple applications, there are also single-layer printed circuit boards (PCBs) that consist of only a dielectric layer, which may have a conductor structure on one or both sides. In the latter case, the layers on both sides are usually also perforated by vias to ensure an electrical connection between the conductor structures.

[0008] Traditionally, plastic-based films or sheets, often reinforced with fibers, are used as dielectric layers for printed circuit boards (PCBs). FR-4 (Flame Retardant 4) is probably the most commonly used material for PCBs. It consists of an epoxy resin matrix in which a woven glass fiber material is embedded. FR-4 is known for its excellent mechanical and electrical properties, as well as its heat resistance.

[0009] Instead of polymer-based dielectric layers, layers made of inorganic dielectric materials can also be of interest. In recent years, glass, ceramics, silicon, and glass-ceramics have increasingly played a role as suitable inorganic dielectric materials for dielectric layers. In printed circuit boards, dielectric layers made of these inorganic materials can be combined with other polymer-based layers, for example, made of FR4 or other materials.

[0010] Among the numerous advantages resulting from the use of the aforementioned inorganic materials, the following are particularly noteworthy:

[0011] In particular, glass, ceramics and glass-ceramics have a very low dielectric constant, which leads to lower signal losses and better signal integrity, especially in high-frequency applications.

[0012] The use of glass, ceramics and glass-ceramics results in low dielectric losses, which in turn is ideal for high-speed and high-frequency applications.

[0013] They are more thermally stable than, for example, plastics, which increases the reliability of printed circuit boards made from these materials in thermally demanding environments.

[0014] They have a comparatively low coefficient of thermal expansion, which leads to higher dimensional stability and reduces the stress on solder joints during temperature changes.

[0015] They are mechanically very resilient and tolerate vibrations and shocks very well.

[0016] In particular, glass, ceramics and glass-ceramics are chemically inert and resist corrosion and chemical attacks, which can extend the service life of printed circuit boards, especially in aggressive environments.

[0017] To create the aforementioned vias, holes are drilled into the dielectric layers and filled with a metal. Drilling the holes can be done mechanically. Very small holes, for example, with a diameter in the range of 10 pm to 100 pm, can also be drilled through the layer using a laser. Filling the holes can be done electroplating. However, filling very small diameter holes can be very time-consuming.

[0018] Another potential problem associated with vias through dielectric layers made of the aforementioned inorganic materials stems from the differing coefficients of thermal expansion between copper and glass, ceramics, silicon, and glass-ceramics. Thermal expansion and contraction can cause a copper filling in a hole to loosen. In extreme cases, a copper filling can even fall out during the processing of a glass layer with vias. Since glass, for example, has low flexibility, the expansion of copper in a hole through a glass dielectric layer can also lead to microcracks in the vicinity of the hole.

[0019] A conventional method for producing through-hole vias through a thin glass substrate involves drilling holes into the substrate, forming a titanium layer on both sides of the substrate and on the sidewalls of the holes. A copper seed layer is then sputtered onto the titanium layer, followed by electrolytic or electroless copper filling of the holes.

[0020] However, the process is complex, especially due to the required sputtering process, and only results in low-quality metal fillings in the through holes.

[0021] Improved methods for creating vias in layered glass substrates are known from EP 4333028 A1 and US 2016 / 0113119 A1. Both documents describe how to create vias by temporarily sealing through holes in a substrate by applying a thin copper foil with an adhesive layer to one side of the substrate. The adhesive layer present at the bottom of the holes is removed, for example, in the case of EP 4333028 A1, using plasma to expose the copper foil at the bottom of the holes. The hole is then filled with copper by electrolysis, starting from the copper foil at the bottom. Finally, the copper foil, including the adhesive layer, is completely removed, as shown in Fig. 2 of EP 4333028 A1 or Fig. 4 of US 2016 / 0113119 A1. The resulting substrate with the vias can then be further processed.

[0022] These procedures result in high-quality metal fillings. However, the described problem of potential loosening of the copper filling due to thermal stress is not solved.

[0023] SUMMARY OF THE INVENTION

[0024] The invention described below was based on the objective of providing a method for manufacturing printed circuit boards. The printed circuit board to be manufactured should have at least one dielectric layer perforated by vias, which consists essentially of an inorganic dielectric material. The method should solve or at least reduce existing problems with the vias.

[0025] To solve this problem, the invention proposes the method with the features of claim 1, which is particularly (but not exclusively) suitable for the production of printed circuit boards. A multilayer substrate produced by the method is the subject of claim 9. Further developments of the invention are the subject of dependent claims. The wording of all claims is hereby incorporated by reference into this description.

[0026] The method according to the invention is suitable for producing a multilayer substrate with an integrated conductor structure. It comprises the following steps: a. Providing a layered substrate made of a dielectric inorganic material with a first and a second side and with at least one through-hole connecting the first and second sides. b. Applying a layer of an organic dielectric and a metal layer to the first side 101a of the layered substrate, such that the at least one through-hole on this side is closed and the two layers form at least one bottom of the at least one closed through-hole, and the layer of organic dielectric is arranged between the metal layer and the first side, so that it forms an inner side of the at least one bottom. c.d. Removal of the organic dielectric in the at least one sealed through-hole, so that the metal layer of the at least one base is exposed. d. Filling the at least one sealed through-hole with a metal by electrochemical deposition. e. Structuring the metal layer (possibly after reinforcement) to form the conductor structure or.

[0027] Removal of the metal layer and subsequent construction of the conductor structure on the layer of organic dielectric.

[0028] Compared to the prior art, the method according to the invention is distinguished in particular by the fact that the layer of organic dielectric remains in the substrate and is not merely a temporary layer, as is the case with the adhesive layer in the method proposed in EP 4333028 A1 and US 2016 / 0113119 A1. As described above, according to this prior art, the copper foil, including the adhesive layer, is completely removed after the via has been formed. In the present invention, the layer of dielectric already forms the next layer of the multilayer substrate to be produced, and the metal layer, at least in the first embodiment of feature e, forms the basis for a conductor structure of the multilayer substrate to be produced. The method according to the invention is therefore particularly efficient.

[0029] The presence of the dielectric layer further secures the metal filling in the through-hole. The dielectric layer is generally more flexible than the inorganic substrate made of the dielectric inorganic material and can compensate for shrinkage and expansion of the metal filling. With regard to the dielectric inorganic material and the substrate thereof, the method, in preferred embodiments, is characterized by at least one of the following additional features a. and b.: a. The dielectric inorganic material is a material from the group consisting of glass, ceramics, glass-ceramics, and silicon. b. The substrate made of the dielectric inorganic material has a thickness in the range of 25 pm to 2000 pm, preferably a thickness in the range of 100 pm to 1100 pm.

[0030] It is preferred that the immediately preceding features a. and b. are realized in combination.

[0031] Suitable glass types include borosilicate, aluminosilicate, quartz, or soda-lime glass. Depending on the application, photosensitive glasses (especially from the lithium silicate glass family) and glasses with a high refractive index may be preferred.

[0032] Suitable ceramic substrates include, in particular, substrates made of AI2O3, ZrOz / ALOj, AIN, Si3N4, BeO and BN.

[0033] A thickness within the aforementioned preferred range offers an optimal balance between mechanical stability and flexibility, enabling the substrate to better withstand mechanical stresses and thermal cycles.

[0034] Preferably, the substrate has a uniform thickness in one of the aforementioned areas.

[0035] Regarding the at least one through-hole, the method in preferred embodiments is characterized by at least one of the following additional features a. and b.: a. The at least one through-hole is formed by means of a laser. b. The at least one through-hole has a diameter in the range of 5 pm to 200 pm. It is preferred that the immediately preceding features a. and b. are implemented in combination.

[0036] Laser technology enables the precise and clean formation of very small holes, which increases the miniaturization and packing density of the multilayer substrate being produced. Furthermore, this reduces the risk of mechanical damage to the substrate made of dielectric inorganic material.

[0037] It is also possible to create the at least one through-hole by locally treating the substrate with a laser and then forming the at least one through-hole by means of an etching process, for example using heated KOH solution or hydrogen fluoride. This approach is based on the principle of making the substrate locally more sensitive to an etching solution, for example by inducing a phase change using the laser.

[0038] The aforementioned preferred hole size enables a high packing density and improves the electrical connection between the layers.

[0039] Regarding the organic dielectric layer, the method, in preferred embodiments, is characterized by at least one of the following additional features a. to d.: a. The organic dielectric layer is an epoxy resin-based layer or a polyimide-based layer. b. The organic dielectric layer has a thickness in the range of 5 pm to 100 pm, preferably from 8 pm to 50 pm. c. The organic dielectric layer is a plastic film. d. The organic dielectric layer is laminated onto the substrate.

[0040] It is preferred that the immediately preceding features a. to c. are realized in combination. Particularly preferred is the immediately preceding features a. to d. being realized in combination. Epoxy resin and polyimide offer excellent electrical insulation and thermal stability. They are also chemically resistant, which increases the durability of the multilayer substrate to be produced.

[0041] The preferred thickness of the organic dielectric layer allows for flexible adaptation to various application scenarios, offering a good balance between insulation and mechanical stability.

[0042] Using a film facilitates processing and integration into the manufacturing process, which reduces production costs and increases efficiency.

[0043] In a particularly preferred embodiment of an epoxy resin-based layer, an ABF film (ABF = Ajinomoto Build-up Film) is used.

[0044] Laminating ensures a uniform and reliable adhesion of the layer.

[0045] It is also possible to apply the layer of organic dielectric to the substrate using slit or spin coating.

[0046] Regarding the metal layer, the method, in preferred embodiments, is characterized by at least one of the following additional features a. to d.: a. The metal layer consists of copper. b. The metal layer has a thickness in the range of 0.3 pm to 20 pm, preferably from 0.5 pm to 5 pm. c. The metal layer is a metal foil. d. The metal layer is a gas-phase deposited, chemically deposited, or sputtered metal layer.

[0047] It is preferred that the immediately preceding features a. to c. are implemented in combination. It is particularly preferred that the immediately preceding features a. to d. are implemented in combination.

[0048] Copper offers excellent electrical conductivity and is also cost-effective, making it an ideal material for conductive traces.

[0049] The specified thickness offers a good balance between conductivity and material costs, ensuring the multilayer substrate remains efficient and performs well. The use of a metal foil allows for easy handling and integration into the production process, thus reducing manufacturing costs.

[0050] As defined in feature e of claim 1, in one embodiment of the inventive method the metal layer is structured to form a conductor structure. Optionally, the metal layer can be reinforced before or after structuring, e.g. by electroplating or electroless deposition of copper.

[0051] Regarding the application of the organic dielectric layer and the metal layer, the method in preferred embodiments is characterized by at least one of the following additional features a. and b.: a. The metal layer and the organic dielectric layer are provided as a composite film with one layer of the metal layer and one layer of the organic dielectric. b. To apply the organic dielectric layer and the metal layer, the composite film, with the organic dielectric layer leading, is pressed onto the first side of the layered substrate. c. To apply the organic dielectric layer and the metal layer, a film of the organic dielectric is first pressed onto the first side of the layered substrate, and the metal layer is applied in a subsequent step.

[0052] It is preferred that the immediately preceding features a. and b. are implemented in combination. The immediately preceding features b. and c. are generally implemented alternatively to each other.

[0053] In the case of the immediately preceding feature c., the metal layer can be applied as a foil in the subsequent step. However, it is also possible to deposit the metal layer from the gas phase (using a CVD or PVD process) or to sputter it on and, if necessary, subsequently reinforce it galvanically or without current.

[0054] The use of the composite film simplifies the manufacturing process and increases efficiency, as both layers can be applied in one step.

[0055] The stepwise method according to the immediately preceding feature c. allows for more precise control over the thickness and adhesion of each layer, which can increase the quality of the final products.

[0056] Regarding the removal of the organic dielectric, the method in preferred embodiments is characterized by at least one of the following additional features a. and b.: a. To remove the organic dielectric, the second side of the layered substrate is exposed to a plasma. b. To remove the organic dielectric, the second side of the layered substrate is exposed to a liquid composition for etching or dissolving the organic dielectric.

[0057] The immediately preceding features a. and b. are usually implemented as alternatives to each other.

[0058] Plasma etching is a precise and clean process, particularly suitable for small through-holes, and it does not compromise the integrity of the rest of the substrate. Accordingly, plasma etching is especially preferred when the at least one through-hole has a small diameter.

[0059] Liquid etchants can ensure a uniform and effective removal of the dielectric, which can improve the quality and consistency of the through holes.

[0060] Regarding the filling of the at least one sealed through-hole, the method in preferred embodiments is characterized by at least one of the following additional features a. and b.: a. To fill the at least one sealed through-hole, a metal is deposited in the through-hole by means of electrochemical deposition. b. The electrochemical deposition is carried out from a copper salt solution.

[0061] The immediately preceding features a. and b. are usually realized in combination.

[0062] To achieve feature a. mentioned immediately above, the metal layer is preferably connected as the cathode. The metal filling is preferably made of copper, in accordance with feature b. mentioned immediately above.

[0063] Electrochemical deposition enables precise and controlled metal filling, which can improve the electrical connection and mechanical stability of the through-holes. The use of copper salt solution ensures that the deposited copper is of high purity and conductivity, thus optimizing the performance of the multilayer substrate being produced.

[0064] In some embodiments of the method according to the invention, it is preferred, as per feature e of claim 1, to structure the metal layer to form a conductor structure. This is advantageous because an existing metal layer can serve as the starting point for the conductor structure to be built up, and enables efficient integration of the conductor tracks directly onto the substrate, which reduces manufacturing costs and shortens production time. Furthermore, the direct structuring of the metal layer offers high precision and reduces material waste.

[0065] In other cases, it may be advantageous to remove the metal layer and rebuild it completely. Removing and reapplying the metal layer offers the flexibility to optimally adapt the layer thickness and composition to the specific requirements of the multilayer substrate being produced.

[0066] A multilayer substrate according to the invention can be produced, in particular, by the method described above. It is characterized by the following features: a. The multilayer substrate comprises a layered substrate made of a dielectric inorganic material and a layer of an organic dielectric applied thereto. b. The multilayer substrate comprises at least one via. c. The at least one via extends through the layered substrate and the layer of organic dielectric.

[0067] The multilayered substrate is characterized in particular by the aforementioned feature c., which results from the fact that, as mentioned above, the layer of organic dielectric remains in the substrate and is not merely a temporary layer.

[0068] Regarding preferred specifications of the layered substrate and the layers of dielectric, reference is made to the above descriptions of the method according to the invention.

[0069] The use of a dielectric layer comprising the layered substrate made of dielectric inorganic material results in high thermal stability, which improves the reliability of the printed circuit board in demanding environments. The layer also offers excellent electrical properties with low dielectric losses and high signal integrity, which is particularly advantageous in high-frequency applications.

[0070] In preferred embodiments, the multilayer substrate is characterized by at least one of the following features a. and b.: a. The multilayer substrate comprises a first conductor structure on a side of the layered substrate made of the dielectric inorganic material facing away from the layer of the organic dielectric. b. The multilayer substrate comprises a second conductor structure on a side of the layer made of the organic dielectric that faces away from the layered substrate made of the dielectric inorganic material.

[0071] The immediately preceding features a. and b. are usually realized in combination.

[0072] The first and second ladder structures can be applied to the respective pages or embedded in the pages.

[0073] In further preferred embodiments, the multilayer substrate is characterized by at least one of the following features a. to b.: a. The multilayer substrate has a multilayer structure with conductor structures in several layers, in particular with the first and the second conductor structure. b. The conductor structures, in particular the first and the second conductor structure, are separated from each other by the layered substrate made of the dielectric inorganic material and the layer of organic dielectric applied thereon. c. The at least one via electrically connects conductor structures on opposite sides of the substrate made of the dielectric inorganic material and the layer of organic dielectric applied thereon, in particular the first and the second conductor layer.

[0074] The immediately preceding features a. to c. are usually realized in combination.

[0075] In further preferred embodiments, the multilayer substrate is characterized by at least one of the following features a. and b.: a. The multilayer substrate is a printed circuit board. b. The multilayer substrate is a carrier for a chiplet.

[0076] A chiplet is a smaller, modular component of a larger electronic component that is functionally independent and, in combination with other chiplets, is assembled, for example, to form a system-on-a-chip (SoC). This design makes it possible to decompose complex electronic circuits into smaller, specialized units that are then combined on a substrate. The multilayer substrate according to the invention can serve as such a substrate.

[0077] Further features and advantages of the invention will become apparent from the claims and from the following description of preferred embodiments of the invention in conjunction with the drawings. The features shown and described can be implemented individually or in combination with one another.

[0078] BRIEF DESCRIPTION OF THE DRAWINGS

[0079] An embodiment of the invention is explained in more detail below with reference to a drawing.

[0080] Figure 1 schematically shows the process of a variant of the method according to the invention.

[0081] DESCRIPTION OF A PREFERRED EXECUTION EXAMPLE

[0082] In a process according to Fig. 1, in step A a substrate 101 made of glass is provided with a first side 101 a and a second side 101 b and with at least one through hole 102 that connects the first and the second side 101a and 101 b.

[0083] In step B, a layer 103 of an organic dielectric and a metal layer 104 are applied to the first side 101a of the substrate 101. The two layers 103 and 104 are provided and applied as a composite film. The composite film comprises a layer of ABF film as layer 103 of the organic dielectric, and a layer of copper foil as metal layer 104. After application, the through-holes 102 on the first side 101a are sealed. The two layers 103 and 104 form a base for the sealed through-holes 102. The layer 103 of the ABF film is positioned between the copper foil 104 and the first side 101a, thus forming an inner side of the at least one base.

[0084] In step C, the organic dielectric in the sealed through-holes 102 is removed, exposing the copper foil 104 at the bottom of the through-holes. For this purpose, a plasma is applied to the substrate side 101b.

[0085] In step D, the sealed through-holes 102 are filled with copper by electrochemical deposition. The copper foil 104 is connected as the cathode. The deposition is carried out from a copper salt solution. In steps E to H, a resist 105 is first applied to the metal layer 104 to form a conductor structure (step E). This resist is then selectively exposed and subsequently partially removed (step F), resulting in areas where the metal layer is covered by the resist 105, while in other areas it is exposed. In the exposed areas, the metal layer is removed using an etching solution (step G). In a subsequent step (step H), the remaining resist is removed, resulting in the desired conductor structure.

[0086] In step I, a composite film 106 consisting of a layer of dielectric 107 and a copper layer 108 is laminated onto layer 104. In subsequent steps (not shown), layer 108 can be structured and connected to the copper-filled through-holes 102 for the further construction of, for example, a multilayer printed circuit board.

Claims

PATENT CLAIMS 1. A method for producing a multilayer substrate with an integrated conductor structure comprising the following steps: a. Providing a layered substrate 101 made of a dielectric inorganic material, having a first side 101a and a second side 101b, and having at least one through-hole 102 connecting the first and second sides. b. Applying a layer 103 of an organic dielectric and a metal layer 104 to the first side 101a of the layered substrate, such that the at least one through-hole 102 on this side is closed, and the two layers 103 and 104 form at least one bottom of the at least one closed through-hole 102, and the layer 103 of the organic dielectric is arranged between the metal layer 104 and the first side 101a, forming an inner side of the at least one bottom. c.d. Removal of the organic dielectric in the at least one sealed through-hole 102, so that the metal layer 104 of the at least one base is exposed. d. Filling the at least one sealed through-hole 102 with a metal by electrochemical deposition. e. Structuring the metal layer 104 to form the conductor structure or. Removal of the metal layer 104 and subsequent construction of the conductor structure on the layer of organic dielectric.

2. The method of claim 1 with at least one of the following additional features: a. The dielectric inorganic material is a material from the group consisting of glass, ceramics, glass-ceramics, and silicon. b. The layered substrate 101 made of the dielectric inorganic material has a thickness in the range of 25 pm to 2000 pm.

3. A method according to any of the preceding claims with at least one of the following additional features: a. The through-hole 102 is formed by means of a laser. b. The through-hole 102 has a diameter in the range of 5 pm to 300 pm.

4. A method according to any one of the preceding claims, comprising at least one of the following additional features: a. The organic dielectric layer 103 is an epoxy resin-based layer or a polyimide-based layer. b. The organic dielectric layer 103 has a thickness in the range of 5 pm to 50 pm. c. The organic dielectric layer 103 is a plastic film. d. The organic dielectric layer 103 is laminated onto the substrate.

5. A method according to any one of the preceding claims, comprising at least one of the following additional features: a. The metal layer 104 consists of copper. b. The metal layer 104 has a thickness in the range of 0.3 pm to 20 pm. c. The metal layer 104 is a metal foil. d. The metal layer 104 is a gas-phase deposited or sputtered metal layer.

6. A method according to any one of the preceding claims with at least one of the following additional features: a. The metal layer 104 and the layer 103 of the organic dielectric are provided as a composite film with one layer 104 of the metal layer and one layer 103 of the organic dielectric. b. To apply the layer 103 of the organic dielectric and the metal layer 104, the composite film with the layer 103 of the organic dielectric is pressed onto the first side 101a of the layered substrate 101. c. To apply the layer 103 of the organic dielectric and the metal layer 104, a film of the organic dielectric is first pressed onto the first side 101a of the layered substrate 101, and in a subsequent step the metal layer 104 is applied.

7. A method according to any one of the preceding claims, comprising at least one of the following additional features: a. To remove the organic dielectric, the second side 101b of the layered substrate 101 is exposed to a plasma. b. To remove the organic dielectric, the second side 101b of the layered substrate 101 is exposed to a liquid composition for etching or dissolving the organic dielectric.

8. Method according to one of the preceding claims with at least one of the following additional features: a. To fill the at least one sealed through-hole 102, a metal is deposited in the through-hole 102 by means of electrochemical deposition. b. Electrochemical deposition is carried out from a copper salt solution.

9. Multilayer substrate with an integrated conductor structure, in particular produced according to a method according to one of the preceding claims, comprising the following features: a. The multilayer substrate comprises a layered substrate 101 made of a dielectric inorganic material and a layer 103 made of an organic dielectric applied thereto. b. The multilayer substrate comprises at least one via 109. c. The at least one via 109 traverses the layered substrate 101 and the layer 103 made of the organic dielectric.

10. Multilayer substrate according to claim 9 with at least one of the following additional features: a. It comprises a first conductor structure on a side of the layered substrate 101 made of the dielectric inorganic material facing away from the layer 103 made of the organic dielectric. b. It comprises a second conductor structure on a side of the layer 103 made of the organic dielectric that faces away from the layered substrate 101 made of the dielectric inorganic material.

11. Multilayer substrate according to claim 9 or claim 10 with at least one of the following additional features: a. The multilayer substrate has a multilayer structure with conductor structures in several layers, in particular with the first and the second conductor structure. b. The conductor structures, in particular the first and the second conductor structure, are separated by the layered substrate made of the dielectric inorganic material and the layer of the organic dielectric applied thereto. separated from each other. c. The at least one via 109 electrically connects conductor structures on different sides of the substrate 101 made of the dielectric inorganic material and the layer 103 made of the organic dielectric applied thereto, in particular the first and the second conductor layer.

12. Multilayer substrate according to any one of claims 9 to 11, comprising at least one of the following additional features: a. The multilayer substrate is a printed circuit board. b. The multilayer substrate is a carrier for a chiplet.

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