Systems and methods for creating an IEDF using a non-sinusoidal generator

Abstract

An ion energy distribution function (IEDF) control method, an IEDF controller, and an IEDF system are described. The IEDF method includes receiving a center of an ion energy distribution function, receiving a first extent of an overcompensated spread from the center, and receiving a second extent of an undercompensated spread from the center. The IEDF method further includes receiving a first slope of the overcompensated spread, receiving a second slope of the undercompensated spread, and identifying, based on the first extent, the second extent, the first slope, and the second slope, a combination of values of ion flux compensation to be achieved using a non-sinusoidal bias (NSB) voltage source. The IEDF method includes controlling the NSB voltage source to generate a non-sinusoidal voltage waveform having the combination of values of ion flux compensation.

Description

SYSTEMS AND METHODS FOR CREATING AN IEDF USING A NONSINUSOID AL GENERATOR FIELD

[0001] The embodiments described in the present disclosure relate to systems and methods for creating an ion energy distribution function (IEDF) using a non-sinusoidal generator.BACKGROUND

[0002] The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

[0003] In a plasma tool, a radio frequency (RF) generator generates an RF signal. An impedance matching network that is coupled to the RF generator receives the RF signal and modifies an impedance of the RF signal to output another RF signal. A plasma chamber coupled to the impedance matching network receives the other RF signal from the impedance matching network to process a substrate placed within the plasma chamber. However, it is difficult to process the substrate in a desirable manner.

[0004] It is in this context that embodiments described in the present disclosure arise.SUMMARY

[0005] Embodiments of the disclosure provide systems and methods for creating an ion energy distribution function (IEDF) using a non-sinusoidal generator. It should be appreciated that the present embodiments can be implemented in numerous ways, e.g., a process, an apparatus, a system, a piece of hardware, or a method on a computer-readable medium. Several embodiments are described below.

[0006] In one embodiment, systems and methods of creating a radio frequency-driven (RF-driven) IEDF using a non-sinusoidal generator in a time-averaged manner is described. This includes a superposition of two or more states, such as two or more ramp slopes, of a non- sinusoidal waveform to create a desired IEDF profile. The methods provide a capability of recreating an RF-driven IEDF profile with the non-sinusoidal generator to achieve controllability of ion energy spread and shift. When the methods are applied, etched profiles with a sinusoidal generator and the non-sinusoidal generator closely match as well.

[0007] The non-sinusoidal generator provides a capability to create a narrow ion energy distribution function or a broad ion energy distribution. The broad ion energy distribution is achieved by superposition of the two or more states of the non-sinusoidal waveform. The two or more states are chosen based on the IEDF profile, and the non-sinusoidal generator alternates thestates during operation so that the non-sinusoidal generator creates the IEDF in a time-averaged manner. By generating the IEDF, patterned wafers are etched in a manner similar to that using the sinusoidal generator.

[0008] The non-sinusoidal generator can create RF-driven lEDFs as well as a profile in a patterned wafer that is controllable. Therefore, the non-sinusoidal generator provides advantages in terms of less complexity of a plasma system and cost of ownership.

[0009] In one aspect, an IEDF control method is described. The IEDF method includes receiving a center of an ion energy distribution function, receiving a first extent of an overcompensated spread from the center, and receiving a second extent of an undercompensated spread from the center. The IEDF method further includes receiving a first slope of the overcompensated spread, receiving a second slope of the undercompensated spread, and identifying, based on the first extent, the second extent, the first slope, and the second slope, a combination of values of ion flux compensation to be achieved using a non-sinusoidal bias (NSB) voltage source. The IEDF method includes controlling the NSB voltage source to generate a non-sinusoidal voltage waveform having the combination of values of ion flux compensation.

[0010] In an aspect, an IEDF controller is described. The IEDF controller includes a processor and a memory device coupled to the processor. The processor receives a center of an ion energy distribution function, receives a first extent of an overcompensated spread from the center, and receives a second extent of an undercompensated spread from the center. The processor also receives a first slope of the overcompensated spread, receives a second slope of the undercompensated spread, and identifies, based on the first extent, the second extent, the first slope, and the second slope, a combination of values of ion flux compensation to be achieved using an NSB voltage source. The processor controls the NSB voltage source to generate a non- sinusoidal voltage waveform having the combination of values of ion flux compensation.

[0011] In one aspect, an IEDF system is described. The IEDF system includes an NSB voltage source, a plasma chamber coupled to the NSB voltage source, and a computer coupled to the NSB voltage source. The computer receives a center of an ion energy distribution function, receives a first extent of an overcompensated spread from the center, and receives a second extent of an undercompensated spread from the center. The computer also receives a first slope of the overcompensated spread, receives a second slope of the undercompensated spread, and identifies, based on the first extent, the second extent, the first slope, and the second slope, a combination of values of ion flux compensation to be achieved using the NSB voltage source. The computer controls the NSB voltage source to generate a non-sinusoidal voltage waveform having the combination of values of ion flux compensation. The plasma chamber receives the non-sinusoidal voltage waveform.

[0012] Some advantages of the herein described systems and methods include using the non-sinusoidal generator to generate a non-sinusoidal voltage waveform. The non-sinusoidal voltage waveform is generated to achieve a predetermined IEDF profile. For example, upon receiving an electron Volt (eV) center of the predetermined IEDF profile, an extent of overcompensation of the predetermined IEDF profile, an extent of under compensation of the predetermined IEDF profile, a slope of the overcompensation, and a slope of the under compensation, a processor controls the non-sinusoidal generator to generate the non-sinusoidal voltage waveform having one or more positive ramp slopes and a value of each of the positive ramp slopes, or one or more negative ramp slopes and a value of each of the negative ramp slopes, or a combination thereof. The non-sinusoidal voltage waveform is generated to achieve the predetermined IEDF profile.

[0013] Some other aspects will become apparent from the following detailed description, taken in conjunction with the accompanying drawings.BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The embodiments are understood by reference to the following description taken in conjunction with the accompanying drawings.

[0015] Figure 1 is a diagram of an embodiment of a system for creating an ion energy distribution function (IEDF) using a non-sinusoidal generator, such as a non-sinusoidal bias (NSB) voltage source.

[0016] Figure 2A is an embodiment of a graph to illustrate a non-sinusoidal voltage waveform having a ramp slope that is negative, during each radio frequency (RF) cycle of the non-sinusoidal voltage waveform.

[0017] Figure 2B is an embodiment of a graph to illustrate an IEDF plot of an IEDF that is overcompensated.

[0018] Figure 3A is an embodiment of a graph to illustrate a non-sinusoidal voltage waveform having a ramp slope that is positive, during each RF cycle of the non-sinusoidal voltage waveform.

[0019] Figure 3B is an embodiment of a graph to illustrate an IEDF plot to illustrate an IEDF that is undercompensated.

[0020] Figure 4A is an embodiment of a graph to illustrate a non-sinusoidal voltage waveform having a ramp slope that is positive during each of number of RF cycles of the non- sinusoidal voltage waveform and having a ramp slope that is negative during each of the same number of RF cycles of the non-sinusoidal voltage waveform.

[0021] Figure 4B is an embodiment of a graph to illustrate an IEDF plot of an IEDF that is balanced between being undercompensated and being overcompensated.

[0022] Figure 5A is an embodiment of a graph to illustrate a non-sinusoidal voltage waveform having a ramp slope that is negative during each of a first number of RF cycles of the non-sinusoidal voltage waveform and having a ramp slope that is positive during each of a second number of RF cycles of the non-sinusoidal voltage waveform.

[0023] Figure 5B is an embodiment of a graph to illustrate an IEDF plot of an IEDF that is more overcompensated and less undercompensated.

[0024] Figure 6A is an embodiment of a graph to illustrate a non-sinusoidal voltage waveform having a ramp slope that is positive during each of the first number of RF cycles of the non-sinusoidal voltage waveform and having a ramp slope that is negative during each of the second number of RF cycles of the non-sinusoidal voltage waveform.

[0025] Figure 6B is an embodiment of a graph to illustrate an IEDF plot of an IEDF that is more undercompensated and less overcompensated.

[0026] Figure 7A is an embodiment of a graph to illustrate a non-sinusoidal voltage waveform having a steeper ramp slope that is positive during each of a number of RF cycles of the non-sinusoidal voltage waveform and having a steeper ramp slope that is negative during each of the same or a different number of RF cycles of the non-sinusoidal voltage waveform.

[0027] Figure 7B is an embodiment of the graph to illustrate an IEDF plot that has a wider ion energy distribution created by the steeper positive and negative ramp slopes of Figure 7A.

[0028] Figure 8A is an embodiment of a graph to illustrate a non-sinusoidal voltage waveform having a less steeper ramp slope that is positive during each of a number of RF cycles of the non-sinusoidal voltage waveform and having a less steeper ramp slope that is negative during each of the same or a different number of RF cycles of the non-sinusoidal voltage waveform.

[0029] Figure 8B is an embodiment of the graph to illustrate an IEDF plot that has a narrower ion energy distribution created by the less steeper positive and negative ramp slopes of Figure 8 A.

[0030] Figure 9 is an example of a display device to illustrate a mapping function.DETAILED DESCRIPTION

[0031] The following embodiments describe systems and methods for creating an ion energy distribution function (IEDF) using a non-sinusoidal generator. It will be apparent that the present embodiments may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present embodiments.

[0032] Figure 1 is a diagram of an embodiment of a plasma system 100 for creating an IEDF using a non-sinusoidal generator, such as a non-sinusoidal bias (NSB) voltage source 102. The plasma system 100 includes the NSB voltage source 102, a plasma chamber 104, and a host computer 106. The NSB voltage source 102 includes a direct current (DC) voltage supply VDC1, a voltage supply circuit 108, a charging diode 110, a resonant inductor 111, a discharging diode 112, and energy storage and transfer circuit 114, a switch SW1, an IEDF diode 116, a voltage supply circuit 118, and a DC voltage supply VDC2.

[0033] The voltage supply circuit 118 includes multiple voltage supplies. Each voltage supply of the voltage supply circuit 118 modifies, such as increases or decreases, a DC voltage from one amount to another amount. For example, the voltage supplies of the voltage supply circuit 118 have inputs that are coupled in series and have outputs that are coupled in parallel. To illustrate, the voltage supply circuit 118 includes a first voltage supply, a second voltage supply, and a third voltage supply coupled to each other. A first terminal, such as a negative terminal, of the DC voltage source VDC2 is coupled to a first input of the first voltage supply. A second input of the first voltage supply is coupled a first input of the second voltage supply. A second input of the second voltage supply is coupled to a first input of the third voltage supply. A second input of the third voltage supply is coupled to a second terminal, such as a positive terminal, of the DC voltage source VDC2. The first input of the first voltage supply forms an input 120 of the voltage supply circuit 118 and the second input of the third voltage supply is coupled to the ground potential. A first output of the first voltage supply is coupled to a first output of the second voltage supply and to a first output of the third voltage supply. Also, a second output of the first voltage supply is coupled to a second output of the second voltage supply and to a second output of the third voltage supply. The first output of the first voltage supply and the second output of the third voltage supply is coupled to the IEDF diode 116. The first output of the first voltage supply and the second output of the third voltage supply forms an output 122 of the voltage supply circuit 118.

[0034] Similarly, the voltage supply circuit 108 includes multiple voltage supplies. Each voltage supply of the voltage supply circuit 108 converts, such as increases or decreases, a direct current voltage from one amount to another amount.

[0035] An example of the energy storage and transfer circuit 114 is a circuit that includes a transformer. An example of a switch, as used herein, includes one or more transistors that are coupled to each other.

[0036] The host computer 106 includes a processor 124 and a memory device 126. Examples of the host computer 106 include a controller, a desktop computer, a laptop computer, a tablet, and a smart phone. Examples of the processor 124 include a microprocessor, a centralprocessing unit (CPU), an application specific integrated circuit (ASIC), and a programmable logic device (PLD). Examples of the memory device 126 include a read-only memory or a random access memory or a combination thereof.

[0037] The plasma chamber 104 includes an electrostatic chuck (ESC) 128 and an upper electrode 130. The electrostatic chuck 128 includes a lower electrode. As an example, the lower electrode is fabricated from a metal, such as aluminum or an alloy of aluminum. The upper electrode 130 is placed above the electrostatic chuck 128 to form a gap between the upper electrode 130 and the electrostatic chuck 128. The plasma system 100 further includes a voltage sensor 132.

[0038] The processor 124 is coupled to the memory device 126. Also, the processor 124 is coupled to the voltage supply circuits 108 and 122. Moreover, the processor 134 is coupled to the switch SW1, the DC voltage source VDC1, and the DC voltage source VDC2. The voltage sensor 132 is coupled to a point Pl between the resonant inductor 111 and the electrostatic chuck 128. For example, the point Pl is located on an RF connection 134 between the resonant inductor 111 and the electrostatic chuck 128. The RF connection 134 couples the resonant inductor 111 to the electrostatic chuck 128. An example of an RF connection, as used herein, includes one or more RF straps, or one or more RF cables, or a combination thereof. An example of a point includes a connector. The voltage sensor 132 is also coupled to the processor 124.

[0039] The DC voltage source VDC1 is coupled to the voltage supply circuit 108, which is coupled to the charging diode 110. For example, a positive terminal of the DC voltage source VDC1 is coupled to the voltage supply circuit 108 and a negative terminal of the DC voltage source VDC1 is coupled to a ground potential. The charging diode 110 is coupled via a point P2 to the resonant inductor 111. The point P2 is situated on an RF connection 136, which couples the charging diode 110 to the resonant inductor 111.

[0040] Also, the DC voltage source VDC2 is coupled to the input 120 of the voltage supply circuit 118. For example, a negative terminal of the DC voltage source VDC2 is coupled to the input 120 and a positive terminal of the DC voltage source VDC2 is coupled to the ground potential. The output 122 of the voltage supply circuit 118 is coupled to a cathode of the IEDF diode 116. An anode of the IEDF diode 116 is coupled to a terminal of the switch SW1. An opposite terminal of the switch SW2 is coupled to the point P2.

[0041] The point Pl is coupled to the discharging diode 112, which is coupled to the energy storage and transfer circuit 114. The energy storage and transfer circuit 114 is coupled to the ground potential. The upper electrode 130 is coupled to the ground potential. Also, the energy storage and transfer circuit 114 is coupled to the DC voltage source VDC1.

[0042] The processor 124 receives one or more IEDF settings from a user via an input device. Examples of the input device include a stylus, a touch screen, a keyboard, and a combination of the keyboard and a mouse. An example of an IEDF setting includes a value of an electron Volt (eV) center, a value of an overcompensated spread, a value of an undercompensated spread, a slope of the overcompensated spread, and a slope of the undercompensated spread. The value of the eV center includes a value of ion flux and a value of ion energy. An example of a slope, as described herein, includes a positive slope or a negative slope. The processor 124 stores the IEDF settings within the memory device 126.

[0043] The processor 124 applies a mapping function to each of the IEDF settings to determine, such as identify, information regarding a combination of ramp slopes of a non- sinusoidal voltage waveform 142 that is to be output from the resonant inductor 111 for the IEDF setting. For example, the processor 124 applies the mapping function to a first IEDF setting to identify information regarding a first combination of ramp slopes of the non-sinusoidal voltage waveform 142 and applies the mapping function to a second IEDF setting to identify information regarding a second combination of ramp slopes of the non-sinusoidal voltage waveform 142. An example of information regarding a combination of ramp slopes include a number of positively sloped ramp slopes, a number of negatively sloped ramp slopes, a slope of a respective one of the positively sloped ramp slopes, and a slope of a respective one of the negatively sloped ramp slopes. It should be noted that the terms positively sloped ramp slopes and positive ramp slopes are used herein interchangeably. Also, the terms negatively sloped ramp slopes and negative ramp slopes are used herein interchangeably.

[0044] The non-sinusoidal voltage waveform 142 is sometimes referred to herein as square-shaped waveform. For example, during a charging phase and a discharging phase, described below, the non-sinusoidal voltage waveform 142 lacks a sinusoid.

[0045] A substrate S, such as a semiconductor wafer, is placed on a top surface of the electrostatic chuck 128 for processing. During the charging phase that occurs within a first RF cycle of the non-sinusoidal voltage waveform 142, the processor 124 sends a charging control signal to the DC voltage source VDC1. For example, the charging control signal, includes a frequency of a pulsed voltage waveform 138. An example of the frequency is a low radio frequency (RF), such as 100 kilohertz (kHz) or 400 kHz or 1 megahertz (MHz). Another example of the frequency is a medium RF, such as 13 MHz or 15 MHz. Upon receiving the charging control signal, the DC voltage source VDC1 generates the pulsed voltage waveform 138 having the frequency and sends the pulsed voltage waveform 138 to the voltage supply circuit 108. The processor 124 controls the voltage supply circuit 108 to modify, such as increase or decrease, a voltage of the pulsed voltage waveform 138 to output a modified pulsed voltage waveform 140.

[0046] When the modified pulse voltage waveform 140 is output, the charging diode110 is forward biased and the modified voltage waveform 140 is sent to the resonant inductor111 via the point P2. The resonant inductor 111 converts the modified voltage waveform 140 into the non-sinusoidal voltage waveform 142 having square-shaped pulses that repeat at the frequency. For example, the non-sinusoidal voltage waveform 142 is not a sinusoidal waveform. During the charging phase, the non-sinusoidal voltage waveform 142 is output from the resonant inductor 111 to the lower electrode.

[0047] RF energy of the non-sinusoidal voltage waveform 142 charges the plasma chamber 104. Also, one or more process gases are supplied to the gap within the plasma chamber 104 in conjunction with the supply of the non-sinusoidal voltage waveform 142 to strike or maintain plasma within the gap. The plasma is used to process a substrate S. For example, one or more materials are deposited on the substrate S, or the substrate S is etched, or the substrate S is cleaned, or a combination thereof, to process the substrate S.

[0048] During the charging phase, voltage of the non-sinusoidal waveform 142 at the point Pl increases to a value. When the voltage at the point Pl increases to the value, the charging diode 110 becomes reverse biased and the discharging diode 112 becomes forward biased. When the discharging diode 112 is forward biased, the discharging phase is initiated during the first RF cycle. During the discharging phase, the RF energy from the plasma chamber 104 is transferred via the RF connection 134, the point Pl, and the discharging diode 112 to the energy storage and transfer circuit 114. The RF energy stored in the energy storage and transfer circuit 114 is transferred to the DC voltage source VDC1 during or after the discharging phase.

[0049] During each RF cycle of the non-sinusoidal voltage waveform 142, the voltage sensor 132 measures a voltage of the non-sinusoidal voltage waveform 132 at the point Pl to generate a measurement signal 144, and sends the measurement signal 144 to the processor 124. Also, during each RF cycle of the non-sinusoidal voltage waveform 142, the processor 124 compares the voltage received within the measurement signal 144 and determines whether the voltage is less than a predetermined threshold. Upon determining that the voltage is less than the predetermined threshold, during each RF cycle of the non-sinusoidal voltage waveform 142, the processor 124 determines that the discharging phase of the RF cycle has ended, identifies a time at which the discharging phase ends during the RF cycle, and sends an on-control signal 146 to the switch SW1 to close the switch SW1. When the switch SW1 is closed, the terminals of the switch SW1 are in contact with each other. It should be noted that the switch SW1 is open during the charging and discharging phases.

[0050] When the on-control signal 146 is sent to the switch SW1, an IEDF phase is initiated during the first RF cycle. During the IEDF phase of each RF cycle of the non-sinusoidalvoltage waveform 142, the processor 124 sends an on control signal to the DC voltage source VDC2 to turn on the DC voltage source VDC2. When the DC voltage source VDC2 is turned on, a current waveform 148 is generated by the DC voltage source VDC2 and sent to the voltage supply circuit 118. For example, the current waveform 148 is generated based on a voltage of the DC voltage source VDC2. The current waveform 148, as an example, is a negative current. To illustrate, a directionality of flow of the current waveform 148 is from the voltage supply circuit 118 towards the negative terminal of the DC voltage source VDC2.

[0051] During each RF cycle of the non-sinusoidal voltage waveform 142, the processor 124 controls the voltage supply circuit 118 based on information regarding a combination of ramp slopes. For example, the processor 124 controls the voltage supply circuit 118 to modify, such as increase or decrease, a voltage of that is output from the voltage supply circuit 118 to modify, such as increase or decrease, a voltage of the current waveform 148, to output a modified current waveform 150 at the output 122. To illustrate, the processor 124 sends a first enable signal to the first voltage supply of the voltage supply circuit 118 and a second enable signal to the second voltage supply of the voltage supply circuit 118 and a disable signal to the third voltage supply of the voltage supply circuit 118 to increase a voltage of the current waveform 148 to output a voltage of the modified current waveform 150. In the illustration, alternatively, the processor 124 sends a first disable signal to the first voltage supply of the voltage supply circuit 118 and a second disable signal to the second voltage supply of the voltage supply circuit 118 and an enable signal to the third voltage supply of the voltage supply circuit 118 to decrease a voltage of the current waveform 148 to output a voltage of the modified current waveform 150. In the illustration, each of the first and second voltage supplies converts a voltage of the current waveform 148 to a higher voltage to increase the voltage of the current waveform 148 to output a voltage of the modified current waveform 150. Also, the third voltage supply converts a voltage of the current waveform 148 to a lower voltage to decrease the voltage of the current waveforml48 to output a voltage of the modified current waveform 150.

[0052] As another illustration, the processor 124 sends a first enable signal to the first voltage supply of the voltage supply circuit 118 and a second enable signal to the second voltage supply of the voltage supply circuit 118 and a disable signal to the third voltage supply of the voltage supply circuit 118 to increase, by a first amount, a voltage of the current waveform 148 to output a voltage of the modified current waveform 150. In the illustration, alternatively, the processor 124 sends a first disable signal to the first voltage supply of the voltage supply circuit 118 and a second disable signal to the second voltage supply of the voltage supply circuit 118 and an enable signal to the third voltage supply of the voltage supply circuit 118 to increase a voltage of the current waveform 148 by a second amount to output a voltage of the modifiedcurrent waveform 150. In the illustration, each of the first, second, and third voltage supplies converts a voltage of the current waveform 148 to a higher voltage to increase the voltage of the current waveform 148 to output a voltage of the modified current waveform 150. Also, in the illustration, the first amount is greater than the second amount.

[0053] As yet another illustration, the processor 124 sends a first enable signal to the first voltage supply of the voltage supply circuit 118 and a second enable signal to the second voltage supply of the voltage supply circuit 118 and a disable signal to the third voltage supply of the voltage supply circuit 118 to decrease, by a first amount, a voltage of the current waveform 148 to output a voltage of the modified current waveform 150. In the illustration, alternatively, the processor 124 sends a first disable signal to the first voltage supply of the voltage supply circuit 118 and a second disable signal to the second voltage supply of the voltage supply circuit 118 and an enable signal to the third voltage supply of the voltage supply circuit 118 to decrease a voltage of the current waveform 148 by a second amount to output a voltage of the modified current waveform 150. In the illustration, each of the first, second, and third voltage supplies converts a voltage of the current waveform 148 to a lower voltage to decrease the voltage of the current waveform 148 to output a voltage of the modified current waveform 150. Also, in the illustration, the first amount is greater than the second amount.

[0054] During the IEDF phase, when the switch SW1 is closed, the IEDF diode 116 is forward biased and the modified current waveform 150 is supplied from the output 122 of the voltage supply circuit 118 via the switch SW1 to the point P2. The voltage of the modified current waveform 150 modifies, such as increases or decreases, a voltage of the modified pulsed DC waveform 140 to further modify, such as increase or decrease, a voltage of the non- sinusoidal voltage waveform 142. For example, when a voltage of the current waveform 148 is increased by the first amount using the voltage supply circuit 118 to output a voltage of the modified current waveform 150, a voltage of the modified pulsed DC waveform 140 increases by the first amount at the point P2 to increase a voltage of the non-sinusoidal voltage waveform 142 by the first amount. In the example, the other hand, when a voltage of the current waveform 148 is increased by the second amount using the voltage supply circuit 118 to output a voltage of the modified current waveform 150, a voltage of the modified pulsed DC waveform 140 increases at the point P2 by the second amount to increase a voltage of the non-sinusoidal voltage waveform 142 by the second amount. Continuing with the example, when the voltage of the non-sinusoidal voltage waveform 142 is increased by the first amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 increases by the first amount. To illustrate, when the voltage of the non-sinusoidal voltage waveform 142 is increased by the first amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 is positive and increasesby the first amount. In the example, when the voltage of the non-sinusoidal voltage waveform 142 is increased by the second amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 increases by the second amount. To illustrate, when the voltage of the non-sinusoidal voltage waveform 142 is increased by the second amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 is positive and increases by the second amount.

[0055] As another example, when a voltage of the current waveform 148 is decreased by the first amount using the voltage supply circuit 118 to output a voltage of the modified current waveform 150, a voltage of the modified pulsed DC waveform 140 decreases by the first amount at the point P2 to decrease a voltage of the non-sinusoidal voltage waveform 142 by the first amount. In the example, the other hand, when a voltage of the current waveform 148 is decreased by the second amount using the voltage supply circuit 118 to output a voltage of the modified current waveform 150, a voltage of the modified pulsed DC waveform 140 decreases at the point P2 by the second amount to decrease a voltage of the non-sinusoidal voltage waveform 142 by the second amount. Continuing with the example, when the voltage of the non-sinusoidal voltage waveform 142 is decreased by the first amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 decreases by the first amount. To illustrate, when the voltage of the non-sinusoidal voltage waveform 142 is decreased by the first amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 is negative and decreases, such as becomes more negative, by the first amount. In the example, when the voltage of the non- sinusoidal voltage waveform 142 is decreased by the second amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 decreases by the second amount. To illustrate, when the voltage of the non-sinusoidal voltage waveform 142 is decreased by the second amount during the IEDF phase, a ramp slope of the non-sinusoidal voltage waveform 142 is negative and decreases, such as becomes more negative, by the second amount.

[0056] It should be noted that the processor 124 controls the voltage supply circuit 118 to modify, such as increase or decrease, a ramp slope of the non-sinusoidal voltage waveform 142 by an amount during a time period, within an RF cycle, such as the first RF cycle, of the non-sinusoidal voltage waveform 142 between a time at which the discharging phase occurring within the RF cycle ends and a time at which a charging phase occurring within a consecutively following RF cycle, such as a second RF cycle, of the non-sinusoidal voltage waveform 142 begins. For example, the processor 124 calculates a time difference from the time at which the charging phase occurring within the second RF cycle begins and the time at which the discharging phase occurring within the first RF cycle ends. The time at which the charging phase occurring within the second RF cycle begins is determined by the processor 124 based onthe frequency of the pulsed DC waveform 138. To illustrate, the processor 124 calculates an inverse of the frequency to determine the time at with the charging phase occurring within the second RF cycle begins. The processor 124 modifies, such as increases or decreases, a voltage of the current waveform 148 by controlling the voltage supply circuit 118 to achieve a voltage of the modified current waveform 150 within the time difference. When the voltage of the current waveform 148 is modified, such as increased or decreased, within the time difference, a ramp slope of the non-sinusoidal voltage waveform 142 is modified, such as increased or decreased, within the time difference. An example of the amount of modification of the ramp slope of the non-sinusoidal voltage waveform 142 is the first amount or the second amount.

[0057] In this manner, the charging phase, the discharging phase, and the IEDF phase repeat during each RF cycle, such as the second RF cycle, a third RF cycle and a fourth RF cycle, of the non-sinusoidal voltage waveform 142. For example, during the second RF cycle of the non-sinusoidal voltage waveform 142, the charging phase, the discharging phase, and the IEDF phase repeat. To illustrate, the second RF cycle is consecutive to the first RF cycle. Further, in the example, during the third RF cycle of the non-sinusoidal voltage waveform 142, the charging phase, the discharging phase, and the IEDF phase repeat and during the fourth RF cycle of the non-sinusoidal voltage waveform 142, the charging phase, the discharging phase, and the IEDF phase repeat. To illustrate, the third RF cycle is consecutive to the second RF cycle and the fourth RF cycle is consecutive to the third RF cycle. In the example, during each RF cycle of the non-sinusoidal voltage waveform 142, the processor 124 controls the voltage supply circuit 118 in the same manner as that described above to modify, such as increase or decrease, a voltage of the current waveform 148 to further modify, such as increase or decrease, a voltage of a ramp slope of the non-sinusoidal voltage waveform 142 by an amount, such as the first amount or the second amount.

[0058] Figure 2A is an embodiment of a graph 200 to illustrate a non-sinusoidal voltage waveform 202 having a ramp slope that is negative, during each RF cycle of the non- sinusoidal voltage waveform 202. The non-sinusoidal voltage waveform 202 is an example of the non-sinusoidal voltage waveform 142 (Figure 1).

[0059] The graph 200 plots a voltage of the non-sinusoidal voltage waveform 202 on a y-axis and time t on an x-axis. On the y-axis of the graph 200, multiple values -V5, -V4, -V3, - V2, -VI, 0, VI, V2, V3, and V3.5 of a voltage of the non-sinusoidal voltage waveform 202 are plotted. The negative value -V4 is greater than the negative value -V5, the negative value -V3 is greater than the negative value -V4, the negative value -V2 is greater than the negative value - V3, the negative value -VI is greater than the negative value -V2, the value 0 volts is greater than the negative value -VI, the positive value VI is greater than the value of 0 volts, the positivevalue V2 is greater than the positive value VI, the positive value V3 is greater than the positive value V2, and the positive value V3.5 is greater than the positive value V3.

[0060] On the x-axis of the graph 200, multiple values of the time t are plotted. For example, values tO, tl, t2, t2.75, t3, t4, t5, t6, t7, t7.4, t8, t9, and tlO are plotted in a progressively increasing order. To illustrate, the time tl occurs after the time tO, the time t2 occurs after the time t2.75, and so on until the time tlO occurs after the time t9.

[0061] During charging phase occurring within an RF cycle 1, which is an example of a first RF cycle of the non-sinusoidal voltage waveform 202, the voltage of the non-sinusoidal voltage waveform 202 increases from the value -V3 to the value V3.5. Moreover, during the discharging phase occurring within the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 202 decreases from the value V3.5 to the value -V4. Also, during the IEDF phase of the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 202 decreases from the negative value -V4 to the negative value -V5 to form a negative ramp slope. For example, the negative ramp slope starts at the time t2.75 and ends at the time t5. The RF cycle 1 starts at the time tO and ends at the time t5.

[0062] Similarly, during a charging phase occurring within an RF cycle 2, which is an example of the second RF cycle of the non-sinusoidal voltage waveform 202, the voltage of the non-sinusoidal voltage waveform 202 increases from the value -V5 to the value V3.5. Moreover, during the discharging phase occurring within the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 202 decreases from the value V3.5 to the value -V4. Also, during the IEDF phase of the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 202 decreases from the negative value -V4 to the negative value -V5 to form a negative ramp slope. For example, the negative ramp slope starts at the time t7.4 and ends at the time tlO. The RF cycle 2 starts at the time t5 and ends at the time tlO.

[0063] Figure 2B is an embodiment of a graph 250 to illustrate an IEDF plot 252. The IEDF plot 252 illustrates an IEDF that is overcompensated and excludes any undercompensation. The graph 250 plots ion flux on a y-axis and ion energy, in eV, on an x-axis. The ion flux, plotted on the graph 250, has values IF0, IF1, IF2, IF3, IF4, IF4.5, and IF5 in an increasing order. For example, the value IF1 of ion flux is greater than the value IF0, the value IF2 of ion flux is greater than the value IF1 and so on until the value of ion flux IF5 is greater than the value IF4.5 of ion flux. The ion energy, plotted on the x-axis of the graph 250, has values evO, eVl, eV2, eV3, eV4, eV5, eV6, eV7, eV8, eV9, and eVIO in an increasing order. For example, the value eVl is greater than the value eVO of ion energy, the value eV2 is greater than the value eVl, and so on until the value eVIO is greater than the value eV9.

[0064] The ion flux of the IEDF plot 252 starts at the value IFO and increases to the value IF4.5. When the ion flux of the IEDF plot 252 has the value IF4.5, the ion energy of the IEDF plot 252 has the value eV7. The ion flux of the IEDF plot 252 decreases from the value IF4.5 to the value of IFO. When the ion flux of the IEDF plot 252 has the value of IFO after the decrease, the ion energy has the value eVlO.

[0065] It should be noted that the IEDF plot 252 provides an example of the IEDF setting. For example, an eV center of the IEDF plot 252 has the value eV5 and the value IF1, a value of an overcompensated spread of the IEDF plot 252 is eV5, which is a difference between the value eVIO and the value eV5 of the eV center, and a slope of the overcompensated spread of the IEDF plot 252 is a slope, such as a negative slope or a positive slope, of the IEDF plot 252 between the eV center of the IEDF plot 252 and the value eVIO at which the ion flux is IFO. To illustrate, the slope of the overcompensated spread of the IEDF plot 252 is a value of a positive slope between the values eV5 and eV7. As another illustration, the slope of the overcompensated spread of the IEDF plot 252 is a value of a negative slope between the values eV7 and eVIO.

[0066] The overcompensated spread of the IEDF plot 252 occurs from the value eV5 of the eV center of the IEDF plot 252 until the value eVIO at which the ion flux is IFO. For example, the overcompensated spread of the IEDF plot 252 is to the right side of the value eV5 of the eV center of the IEDF plot 252. To illustrate, the overcompensated spread of the IEDF plot 252 includes a maximum value, such as IF4.5, of the ion flux of the IEDF plot 252 and extends from the eV center of the IEDF plot 252 until the ion flux of the IEDF plot 252 has a value of IFO.

[0067] When the overcompensated spread of the IEDF plot 252 is to be produced during the RF cycle 1 of the non-sinusoidal voltage waveform 202, the IEDF setting illustrated by the IEDF plot 252 is provided by the user via the input device to the processor 124. Upon receiving the IEDF setting illustrated by the IEDF plot 252, the processor 124 accesses the mapping function to identify the information regarding a combination of ramp slopes of the non- sinusoidal voltage waveform 202, such as a value of each negative ramp slope of the non- sinusoidal voltage waveform 202 (Figure 2A) and a number of the negative ramp slopes of the non-sinusoidal voltage waveform 202. For example, the value of the negative ramp slope of the non-sinusoidal voltage waveform 202 is a difference between the values -V5 and -V4 during each of the RF cycle 1 of the non-sinusoidal voltage waveform 202 and the RF cycle 2 of the non-sinusoidal voltage waveform 202. The processor 124 controls the voltage supply circuit 118 (Figure 1) to achieve the difference between the values -V5 and -V4 during a time period, which is a difference between the times t5 and t2.75, of the IEDF phase within the RF cycle 1 and during another time period, which is a difference between the times tlO and t7.4, of the IEDFphase within the RF cycle 2 to control the non-sinusoidal voltage waveform 202 to have the number of negative ramp slopes of the non-sinusoidal voltage waveform 202 and a value of each of the negative ramp slopes of the non-sinusoidal voltage waveform 202.

[0068] Figure 3A is an embodiment of a graph 300 to illustrate a non-sinusoidal voltage waveform 302 having a ramp slope that is positive, during each RF cycle of the non- sinusoidal voltage waveform 302. The non-sinusoidal voltage waveform 302 is an example of the non-sinusoidal voltage waveform 142 (Figure 1).

[0069] The graph 300 plots a voltage of the non-sinusoidal voltage waveform 302 on a y-axis and the time t on an x-axis. The x-axis of the graph 300 is the same as the x-axis of the graph 200 (Figure 2A). On the x-axis of the graph 300, multiple values of the time t are plotted. On the y-axis of the graph 300, the value -V5, a value -V4.5, the value -V4, a value -V3.5, the value -V3, the value -V2, the value -VI, the value 0, the value VI, the value V2, and the value V3 of a voltage of the non-sinusoidal voltage waveform 302 are plotted. The negative value and - V4.5 is greater than the negative value -V5 and the negative value -V3.5 is greater than the negative value -V4.

[0070] During the charging phase occurring within the RF cycle 1, which is an example of the first RF cycle of the non-sinusoidal voltage waveform 302, the voltage of the non-sinusoidal voltage waveform 302 increases from the value -V3 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 302 decreases from the value V3 to the value -V4.5. Also, during the IEDF phase of the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 202 increases from the negative value -V4.5 to the negative value -V4 to form a positive ramp slope. For example, the positive ramp slope starts at the time t3 and ends at the time t5.

[0071] Similarly, during the charging phase occurring within the RF cycle 2, which is an example of the second RF cycle of the non-sinusoidal voltage waveform 302, the voltage of the non-sinusoidal voltage waveform 302 increases from the value -V4 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 2, the voltage of the non- sinusoidal voltage waveform 302 decreases from the value V3 to the value -V4.5. Also, during the IEDF phase of the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 302 increases from the negative value -V4.5 to the negative value -V3.5 to form a positive ramp slope. For example, the positive ramp slope starts at the time t7 and ends at the time tlO.

[0072] Figure 3B is an embodiment of a graph 350 to illustrate an IEDF plot 352. The IEDF plot 352 illustrates an IEDF that is undercompensated and excludes any overcompensation. The graph 350 plots ion flux on a y-axis and ion energy, in eV, on an x-axis. The y-axis of thegraph 350 is the same as the y-axis of the graph 250 (Figure 2B). Also, the x-axis of the graph 350 is the same as the x-axis of the graph 250.

[0073] The ion flux of the IEDF plot 352 starts at the value IF0 and increases to the value IF 5. When the ion flux of the IEDF plot 352 has the value IF 5, the ion energy of the IEDF plot 352 has the value eV2. The ion flux of the IEDF plot 352 decreases from the value IF5 to the value of IF0. When the ion flux of the IEDF plot 352 has the value of IF0 after the decrease, the ion energy has the value eVlO.

[0074] It should be noted that the IEDF plot 352 provides an example of the IEDF setting. For example, an eV center of the IEDF plot 352 has the value eV5 and a value IF0.5, a value of an undercompensated spread of the IEDF plot 352 is eV5, which is a difference between the value eV5 of the eV center and the value eVO, and a slope of the undercompensated spread of the IEDF plot 352 is a slope, such as a negative slope or a positive slope, of the IEDF plot 352 between the eV center of the IEDF plot 252 and the value eVO at which the ion flux is IF0. To illustrate, the slope of the undercompensated spread of the IEDF plot 352 is a value of a positive slope between the values eVO and eV2. As another illustration, the slope of the undercompensated spread of the IEDF plot 352 is a value of a negative slope between the values eV2 and eV5. The value IF0.5 is greater than the value of IF0 of ion flux and is less than the value IF1.

[0075] The undercompensated spread of the IEDF plot 352 occurs from the value eVO, at which the ion flux is IF0, until the value eV5 of the eV center of the IEDF plot 352. For example, the undercompensated spread is to the left side of the value eV5 of the eV center of the IEDF plot 352. To illustrate, the undercompensated spread of the IEDF plot 352 includes a maximum value, such as IF5, of the ion flux of the IEDF plot 352 and extends from the value of IF0 of ion flux of the IEDF plot 452 until the eV center of the IEDF plot 452.

[0076] When the undercompensated spread of the IEDF plot 352 is to be produced during the RF cycle 1, the IEDF setting illustrated by the IEDF plot 352 is provided by the user via the input device to the processor 124. Upon receiving the IEDF setting illustrated by the IEDF plot 352, the processor 124 accesses the mapping function to identify the information regarding a combination of ramp slopes of the non-sinusoidal voltage waveform 302, such as a value of each positive ramp slope of the non-sinusoidal voltage waveform 302 (Figure 3A) and a number of the positive ramp slopes of the non-sinusoidal voltage waveform 302. For example, a value of the positive ramp slope during the IEDF phase of the RF cycle 1 of the non-sinusoidal voltage waveform 302 is a difference between the values -V4 and -V4.5 and a value of the positive ramp slope during the IEDF phase of the RF cycle 2 of the non-sinusoidal voltage waveform 302 is a difference between the values -V3.5 and -V4.5. The processor 124 controlsthe voltage supply circuit 118 (Figure 1) to achieve the difference between the values -V4 and - V4.5 during a time period, which is a difference between the times t5 and t3, of the IEDF phase within the RF cycle 1. The processor 124 also controls the voltage supply circuit 118 to achieve the difference between the values -V3.5 and -V4.5 during a time period, which is a difference between the times tlO and a time t7.5, of the IEDF phase within the RF cycle 2 to control the non-sinusoidal voltage waveform 302 to have the number of positive ramp slopes of the non- sinusoidal voltage waveform 302 and a value of each of the positive ramp slopes of the non- sinusoidal voltage waveform 302. The time t7.5 occurs after the time t7 and before the time t8.

[0077] Figure 4A is an embodiment of a graph 400 to illustrate a non-sinusoidal voltage waveform 402 having a ramp slope that is positive during each of number of RF cycles of the non-sinusoidal voltage waveform 402 and having a ramp slope that is negative, during each of the same number of RF cycles of the non-sinusoidal voltage waveform 402. As illustrated in the graph 400, the number of RF cycles during which a ramp slope of the non-sinusoidal voltage waveform 402 is positive is equal to the number of RF cycles during which a ramp slope of the non-sinusoidal voltage waveform 402 is negative. For example, a number of positive ramp slopes of the non-sinusoidal voltage waveform 402 is equal to the number of negative ramp slopes of the non-sinusoidal voltage waveform 402. The non-sinusoidal voltage waveform 402 is an example of the non-sinusoidal voltage waveform 142 (Figure 1).

[0078] The graph 400 plots a voltage of the non-sinusoidal voltage waveform 402 on a y-axis and time t on an x-axis. On the y-axis of the graph 400, the values -V4, -V3, -V2, -VI, 0, VI, V2, V3, and V4 of a voltage of the non-sinusoidal voltage waveform 402 are plotted. On the x-axis of the graph 400, multiple values of the time t are plotted. For example, in addition to the values from tO to tlO, values ti l, tl2, tl3, tl4, tl5, tl6, tl7, tl8, tl9, and t20 of the time t are plotted in a progressively increasing order. To illustrate, the time ti l occurs after the time tlO, the time tl2 occurs after the time tl 1, and so on until the time t20 occurs after the time tl9.

[0079] During the charging phase occurring within the RF cycle 1, which is an example of the first RF cycle of the non-sinusoidal voltage waveform 402, the voltage of the non-sinusoidal voltage waveform 402 increases from the value -V3 to the value V4. Moreover, during the discharging phase occurring within the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 402 decreases from the value V4 to the value -V3. Also, during the IEDF phase of the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 402 decreases from the negative value -V3 to the negative value -V4 to form a negative ramp slope. For example, the negative ramp slope starts at the time t2 and ends at the time t5.

[0080] Similarly, during the charging phase occurring within the RF cycle 2, which is an example of a second RF cycle of the non-sinusoidal voltage waveform 402, the voltage of thenon-sinusoidal voltage waveform 402 increases from the value -V4 to the value V4. Moreover, during the discharging phase occurring within the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 402 decreases from the value V4 to the value -V4. Also, during the IEDF phase of the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 402 increases from the negative value -V4 to the negative value -V3 to form a positive ramp slope. For example, the positive ramp slope starts at the time t7 and ends at the time tlO.

[0081] In this manner, the negative and positive ramp slopes of the non-sinusoidal voltage waveform 402 repeat during an RF cycle 3 of the non-sinusoidal voltage waveform 402 and an RF cycle 4 of the non-sinusoidal voltage waveform 402. For example, during the IEDF phase of the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 402 decreases from the negative value -V3 to the negative value -V4 to form a negative ramp slope. For example, the negative ramp slope starts at the time tl2 and ends at the time tl5. The RF cycle 3 starts at the time tlO and ends at the time tl5. In the example, during the IEDF phase of the RF cycle 4, the voltage of the non-sinusoidal voltage waveform 402 increases from the negative value -V4 to the negative value -V3 to form a positive ramp slope. For example, the positive ramp slope starts at the time tl7 and ends at the time t20. The RF cycle 4 starts at the time tl 5 and ends at the time t20. The RF cycle 3 is consecutive to the RF cycle 2 and the RF cycle 4 is consecutive to the RF cycle 3. The RF cycle 3 of the non-sinusoidal voltage waveform 402 is an example of the third RF cycle and the RF cycle 4 of the non-sinusoidal voltage waveform 402 is an example of the fourth RF cycle.

[0082] The processor 124 (Figure 1) controls the voltage supply circuit 118 (Figure 1) to implement a number of positive ramp slopes and a number of negative ramp slopes to generate the non-sinusoidal voltage waveform 402. For example, the processor 124 controls the voltage supply circuit 118 to decrease a voltage of current waveform 148 (Figure 1) for a time period of an IEDF phase of each of the number of RF cycles, such as the RF cycles 1 and 3, of the non- sinusoidal voltage waveform 402 to further decrease a voltage of the modified current waveform 150 (Figure 1) to decrease a voltage of the modified pulsed voltage waveform 140 (Figure 1) at the point P2 (Figure 1). When the voltage of the modified pulsed voltage waveform 140 is decreased, a voltage of the non-sinusoidal voltage waveform 402 decreases to generate a negative ramp slope during the IEDF phase. As another example, the processor 124 controls the voltage supply circuit 118 to increase a voltage of current waveform 148 for a time period of an IEDF phase of each of the number of RF cycles, such as the RF cycles 2 and 4, of the non-sinusoidal voltage waveform 402 to further increase a voltage of the modified current waveform 150 to increase a voltage of the modified pulsed voltage waveform 140 at the point P2. When the voltage of the modified pulsed voltage waveform 140 is increased, a voltage of the non-sinusoidal voltage waveform 402 increases to generate a positive ramp slope during the IEDF phase.

[0083] Figure 4B is an embodiment of a graph 450 to illustrate an IEDF plot 452. The IEDF plot 452 illustrates an IEDF that is balanced between being undercompensated and being overcompensated. For example, an amount of overcompensation that is achieved is within a predetermined range, such as within 10 percent, from an amount of undercompensation. To illustrate, the amount of overcompensation is equal to the amount of undercompensation. To further illustrate, a maximum value of ion flux during an undercompensated spread of the IEDF plot 452 is within the predetermined range from a maximum value of ion flux during an overcompensated spread of the IEDF plot 452. By achieving the balance between being overcompensated an undercompensated, uniformity in processing the substrate S (Figure 1) is achieved. Further description of the uniformity is provided below.

[0084] The graph 450 plots ion flux on a y-axis and ion energy, in eV, on an x-axis. The ion flux, plotted on the graph 450, has the values IF0, IF1, IF2, IF3, IF4, and IF5, and a value IF6 in an increasing order. For example, the value IF6 of ion flux is greater than the value IF5. The x-axis of the graph 450 is the same as the x-axis of the graph 350 (Figure 3B). The ion energy plotted on the x-axis of the graph 450 includes a value eV1.5, which is greater than the value eVl and less than the value eV2.

[0085] The ion flux of the IEDF plot 452 starts at the value IF0 and increases to the value IF6. When the ion flux of the IEDF plot 452 has the value IF6, the ion energy of the IEDF plot 452 has the value eV1.5. The ion flux of the IEDF plot 452 decreases from the value IF 6 to the value IF2 at the value eV5 of an eV center of the IEDF plot 452. The ion flux increases from the value IF 2 to the value IF6. When the ion flux of the IEDF plot 452 has the value of IF 6 after the increase, the ion energy has the value eV8. The ion flux of the IEDF plot 452 decreases from the value IF 6 to the value of IF0 at the value eVIO of the ion energy of the IEDF plot 452.

[0086] It should be noted that the IEDF plot 452 provides an example of the IEDF setting. For example, an eV center of the IEDF plot 452 has the value eV5 and the value IF2, a value of an overcompensated spread of the IEDF plot 452 is eV5, which is a difference between the value eVIO and the value eV5 of the eV center, and a slope of the overcompensated spread of the IEDF plot 452 is a slope, such as a negative slope or a positive slope, of the IEDF plot 452 between the eV center of the IEDF plot 452 and the value eVIO at which the ion flux is IF0. To illustrate, the slope of the overcompensated spread of the IEDF plot 452 is a value of a positive slope between the values eV5 and eV8. To further illustrate, the slope of the overcompensated spread of the IEDF plot 452 is equal to a ratio of a difference between IF6 and IF2 and a difference between eV8 and eV5. As another illustration, the slope of the overcompensatedspread of the IEDF plot 452 is a value of a negative slope between the values eV8 and eVlO. To further illustrate, the slope of the overcompensated spread of the IEDF plot 452 is equal to a ratio of a difference between IFO and IF6 and a difference between eVIO and eV8. As another example, the eV center of the IEDF plot 452 has the value eV5 and the value IF2, a value of an undercompensated spread of the IEDF plot 452 is eV5, which is a difference between the value eV5 of the eV center and the value eVO, and a slope of the undercompensated spread of the IEDF plot 452 is a slope, such as a negative slope or a positive slope, of the IEDF plot 452 between the value eVO at which the ion flux is IFO and the eV center of the IEDF plot 452. To illustrate, the slope of the undercompensated spread of the IEDF plot 452 is a value of a positive slope between the values eVO and eV1.5. To further illustrate, the slope of the undercompensated spread of the IEDF plot 452 is equal to a ratio of a difference between IF6 and IFO and a difference between eV1.5 and eVO. As another illustration, the slope of the undercompensated spread of the IEDF plot 452 is a value of a negative slope between the values eV1.5 and eV5. To further illustrate, the slope of the undercompensated spread of the IEDF plot 452 is equal to a ratio of a difference between IF2 and IF6 and a difference between eV5 and eV1.5.

[0087] The overcompensated spread of the IEDF plot 452 occurs from the value eV5 of the eV center of the IEDF plot 452 until the value eVIO at which the ion flux is IFO. For example, the overcompensated spread of the IEDF plot 452 is to the right side of the value eV5 of the eV center of the IEDF plot 252. To illustrate, the overcompensated spread of the IEDF plot 452 includes a maximum value, such as the value IF6, of the ion flux of the IEDF plot 452 and extends from the eV center of the IEDF plot 452 until the ion flux of the IEDF plot 452 has a value of IFO. Also, the undercompensated spread of the IEDF plot 452 occurs from the value eVO at which the ion flux is IFO to the value eV5 of the eV center of the IEDF plot 452. For example, the undercompensated spread of the IEDF plot 452 is to the left side of the value eV5 of the eV center of the IEDF plot 452. To illustrate, the undercompensated spread of the IEDF plot 452 includes a maximum value, such as the value IF6, of the ion flux of the IEDF plot 452 and extends from the value eVO at which the ion flux is IFO to the eV center of the IEDF plot 452.

[0088] When the overcompensated spread of the IEDF plot 452 is to be produced during the number of RF cycles, such as the RF cycles 1 and 3, of the non-sinusoidal voltage waveform 402 and the undercompensated spread of the IEDF plot 452 is to be produced during the number of RF cycles, such as the RF cycles 2 and 4, of the non-sinusoidal voltage waveform 402, the IEDF setting illustrated by the IEDF plot 452 is provided by the user via the input device to the processor 124. Upon receiving the IEDF setting illustrated by the IEDF plot 452, the processor 124 accesses the mapping function to identify a value of each negative ramp slope of the non-sinusoidal voltage waveform 402 (Figure 4A), a value of each positive ramp slope of thenon-sinusoidal voltage waveform 402, the number of the negative ramp slopes of the non- sinusoidal voltage waveform 402, and the number of the positive ramp slopes of the non- sinusoidal voltage waveform 402. For example, the value of the negative ramp slope of the non- sinusoidal voltage waveform 402 during each of the RF cycles 1 and 3 is a difference between the values -V4 and -V3. The processor 124 controls the voltage supply circuit 118 (Figure 1) to achieve the difference between the values -V4 and -V3 during a time period, which is a difference between the times t5 and t2, of the IEDF phase of the RF cycle 1. Also, the processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V4 and -V3 during a time period, which is a difference between the times tl 5 and tl2, of the IEDF phase of the RF cycle 3 to control the non-sinusoidal voltage waveform 402 to have the number of negative ramp slopes of the non-sinusoidal voltage waveform 402 and a value of each of the negative ramp slopes of the non-sinusoidal voltage waveform 402. Continuing with the example, the value of the positive ramp slope of the non-sinusoidal voltage waveform 402 during each of the RF cycles 2 and 4 is a difference between the values -V3 and -V4. The processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V3 and -V4 during a time period, which is a difference between the times tlO and t7, of the IEDF phase of the RF cycle 2. Also, the processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V3 and -V4 during a time period, which is a difference between the times t20 and tl 7, of the IEDF phase of the RF cycle 4 to control the non-sinusoidal voltage waveform 402 to have the number of positive ramp slopes of the non-sinusoidal voltage waveform 402 and a value of each of the positive ramp slopes of the non-sinusoidal voltage waveform 402.

[0089] It should be noted that by increasing a maximum value during the overcompensated spread of the IEDF plot 452, there is an increase in high ion energy. With the increase in the high ion energy, there is an increase in a rate at which the substrate S is etched. Also, by increasing a maximum value during the undercompensated spread of the IEDF plot 452, there is an increase in low ion energy. With the increase in the low ion energy, there is an increase in a rate at which materials are deposited on the substrate S. As such, by achieving a balance between overcompensation and undercompensation, the substrate S is processed in a uniform manner.

[0090] Figure 5A is an embodiment of a graph 500 to illustrate a non-sinusoidal voltage waveform 502 having a ramp slope that is negative during each of a first number of RF cycles of the non-sinusoidal voltage waveform 502 and having a ramp slope that is positive during each of a second number of RF cycles of the non-sinusoidal voltage waveform 502. As illustrated in the graph 500, the first number of RF cycles of the non-sinusoidal voltage waveform 502 is different from, such as greater than, the second number of RF cycles of the non-sinusoidal voltage waveform 502. For example, the first number of negative ramp slopes of the non-sinusoidal voltage waveform 502 is greater than the second number of positive ramp slopes of the non-sinusoidal voltage waveform 502. The non-sinusoidal voltage waveform 502 is an example of the non-sinusoidal voltage waveform 142 (Figure 1).

[0091] The graph 500 plots a voltage of the non-sinusoidal voltage waveform 502 on a y-axis and time t on an x-axis. The y-axis of the graph 500 is the same as the y-axis of the graph 400 (Figure 4A). The x-axis of the graph 500 is the same as the x-axis of the graph 400 (Figure 4).

[0092] The charging phase, the discharging phase, and the IEDF phase that occur during the RF cycle 1, which is an example of the first RF cycle of the non-sinusoidal voltage waveform 502, is the same as the charging phase, the discharging phase, and the IEDF phase that occur during the RF cycle 1 of the non-sinusoidal voltage waveform 402. During the charging phase occurring within the RF cycle 2, which is an example of the second RF cycle of the non- sinusoidal voltage waveform 502, the voltage of the non-sinusoidal voltage waveform 502 increases from the value -V4 to the value V4. Moreover, during a discharging phase occurring within the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 502 decreases from the value V4 to the value -V3. Also, during the IEDF phase of the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 502 decreases from the negative value -V3 to the negative value -V4 to form a negative ramp slope. For example, the negative ramp slope starts at the time t7 and ends at the time tlO.

[0093] Also, during the charging phase occurring within an RF cycle 3, which is an example of the third RF cycle, of the non-sinusoidal voltage waveform 502, the voltage of the non-sinusoidal voltage waveform 502 increases from the value -V4 to the value V4. Moreover, during the discharging phase occurring within the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 402 decreases from the value V4 to the value -V4. During the IEDF phase of the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 502 increases from the negative value -V4 to the negative value -V3 to form a positive ramp slope. For example, the positive ramp slope starts at the time tl2 and ends at the time tl5.

[0094] In this manner, the first number of negative ramp slopes of the non-sinusoidal voltage waveform 502 and the second number of positive ramp slopes of the non-sinusoidal voltage waveform repeat during additional RF cycles, such as the RF cycle 4, an RF cycle 5, and an RF cycle 6 of the non-sinusoidal voltage waveform 502. The RF cycle 4 is consecutive to the RF cycle 3, the RF cycle 5 is consecutive to the RF cycle 4, and the RF cycle 6 is consecutive to the RF cycle 5. It should be noted that the first number of negative ramp slopes of the non- sinusoidal voltage waveform 502 is equal to the first number of RF cycles of the non-sinusoidalvoltage waveform 502 and the second number of positive ramp slopes of the non-sinusoidal voltage waveform 502 is equal to the second number of RF cycles of the non-sinusoidal voltage waveform 502.

[0095] The processor 124 (Figure 1) controls the voltage supply circuit 118 (Figure 1) to generate the non-sinusoidal voltage waveform 502 having the first number of negative ramp slopes and the second number of positive ramp slopes. For example, the processor 124 controls the voltage supply circuit 118 to increase a voltage of current waveform 148 (Figure 1) for a time period of an IEDF phase of each of the second number of RF cycles, such as the RF cycle 3, of the non-sinusoidal voltage waveform 502 to further increase a voltage of the modified current waveform 150 (Figure 1) to increase a voltage of the modified pulsed voltage waveform 140 (Figure 1) at the point P2 (Figure 1). When the voltage of the modified pulsed voltage waveform 140 is increased, a voltage of the non-sinusoidal voltage waveform 502 increases to generate a positive ramp slope during the IEDF phase of each of the second number of RF cycles. As another example, the processor 124 controls the voltage supply circuit 118 to decrease a voltage of current waveform 148 for a time period of an IEDF phase of each of the first number of RF cycles, such as the RF cycles 1 and 2, of the non-sinusoidal voltage waveform 502 to further decrease a voltage of the modified current waveform 150 to decrease a voltage of the modified pulsed voltage waveform 140 at the point P2. When the voltage of the modified pulsed voltage waveform 140 is decreased, a voltage of the non-sinusoidal voltage waveform 502 decreases to generate a negative ramp slope during the IEDF phase of each of the first number of RF cycles.

[0096] Figure 5B is an embodiment of a graph 550 to illustrate an IEDF plot 552. The IEDF plot 552 illustrates an IEDF that is more overcompensated and less undercompensated. For example, an amount of overcompensation that is achieved is outside the predetermined range from an amount of undercompensation. To illustrate, the amount of overcompensation is greater than the amount of undercompensation by the predetermined range. To further illustrate, a maximum value of ion flux during an overcompensated spread of the IEDF plot 552 is outside the predetermined range from a maximum value of ion flux during an undercompensated spread of the IEDF plot 552. By providing the greater amount of overcompensation, the substrate S (Figure 1) is processed with a high amount of ion flux at a high amount of ion energy.

[0097] The graph 550 plots ion flux on a y-axis and ion energy, in eV, on an x-axis. The x-axis of the graph 550 is the same as the x-axis of the graph 450 (Figure 4B). The y-axis of the graph 550 is the same as the y-axis of the graph 450 (Figure 4B).

[0098] The ion flux of the IEDF plot 552 starts at the value IF0 and increases to the value IF4. When the ion flux of the IEDF plot 552 has the value IF4, the ion energy of the IEDF plot 552 has the value eVl. The ion flux of the IEDF plot 552 decreases from the value IF4 to thevalue IF1 at the value eV5 of an eV center of the IEDF plot 552. The ion flux increases from the value IF1 to the value IF6. When the ion flux of the IEDF plot 552 has the value of IF 6 after the increase, the ion energy has a value eV8.75, which is less than the value eV9 and greater than the value eV8. The ion flux of the IEDF plot 552 decreases from the value IF6 to the value of IFO at the value eVIO of the ion energy of the IEDF plot 552.

[0099] It should be noted that the IEDF plot 552 provides an example of the IEDF setting. For example, an eV center of the IEDF plot 552 has the value eV5 and the value IF1, a value of an overcompensated spread of the IEDF plot 552 is eV5, which is a difference between the value eVIO and the value eV5 of the eV center, and a slope of the overcompensated spread of the IEDF plot 552 is a slope, such as a negative slope or a positive slope, of the IEDF plot 552 between the eV center of the IEDF plot 552 and the value eVIO at which the ion flux is IFO. To illustrate, the slope of the overcompensated spread of the IEDF plot 552 is a value of a positive slope between the values eV5 and eV8.75. To further illustrate, the slope of the overcompensated spread of the IEDF plot 552 is equal to a ratio of a difference between IF6 and IF1 and a difference between eV8.75 and eV5. As another illustration, the slope of the overcompensated spread of the IEDF plot 552 is a value of a negative slope between the values eV8.75 and eVIO. To further illustrate, the slope of the overcompensated spread of the IEDF plot 552 is equal to a ratio of a difference between zero and IF6 and a difference between eVIO and eV8.75. As another example, the eV center of the IEDF plot 552 has the value eV5 and the value IF1, a value of an undercompensated spread of the IEDF plot 452 is eV5, which is a difference between the value eV5 of the eV center and the value eVO, and a slope of the undercompensated spread of the IEDF plot 552 is a slope, such as a negative slope or a positive slope, of the IEDF plot 552 between the value eVO at which the ion flux is IFO and the eV center of the IEDF plot 552. To illustrate, the slope of the undercompensated spread of the IEDF plot 552 is a value of a positive slope between the values eVO and eVl. To further illustrate, the slope of the undercompensated spread of the IEDF plot 552 is equal to a ratio of a difference between IF4 and IFO and a difference between eVl and eVO. As another illustration, the slope of the undercompensated spread of the IEDF plot 552 is a value of a negative slope between the values eVl and eV5. To further illustrate, the slope of the undercompensated spread of the IEDF plot 552 is equal to a ratio of a difference between IF1 and IF4 and a difference between eV5 and eVl.

[0100] The overcompensated spread of the IEDF plot 552 occurs from the value eV5 of the eV center of the IEDF plot 552 until the value eVIO at which the ion flux is IFO. For example, the overcompensated spread of the IEDF plot 552 is to the right side of the value eV5 of the eV center of the IEDF plot 552. To illustrate, the overcompensated spread of the IEDF plot 552 includes a maximum value, such as the value IF6, of the ion flux of the IEDF plot 552 andextends from the eV center of the IEDF plot 552 until the ion flux of the IEDF plot 552 has a value of IFO. Also, the undercompensated spread of the IEDF plot 552 occurs from the value eVO at which the ion flux is IFO to the value eV5 of the eV center of the IEDF plot 552. For example, the undercompensated spread of the IEDF plot 552 is to the left side of the value eV5 of the eV center of the IEDF plot 552. To illustrate, the undercompensated spread of the IEDF plot 552 includes a maximum value, such as the value IF4, of the ion flux of the IEDF plot 552 and extends from the value eVO at which the ion flux is IFO to the eV center of the IEDF plot 552.

[0101] When the overcompensated spread of the IEDF plot 552 is to be produced during the first number of RF cycles, such as the RF cycles 1 and 2, of the non-sinusoidal voltage waveform 502 and the undercompensated spread of the IEDF plot 552 is to be produced during the second number of RF cycles, such as the RF cycle 3, of the non-sinusoidal voltage waveform 502, the IEDF setting illustrated by the IEDF plot 552 is provided by the user via the input device to the processor 124. Upon receiving the IEDF setting illustrated by the IEDF plot 552, the processor 124 accesses the mapping function to identify a value of each negative ramp slope of the non-sinusoidal voltage waveform 502, a value of each positive ramp slope of the non- sinusoidal voltage waveform 502, the first number of negative ramp slopes of the non-sinusoidal voltage waveform 502, and the second number of positive ramp slopes of the non-sinusoidal voltage waveform 502. For example, the value of the negative ramp slope of the non-sinusoidal voltage waveform 502 is a difference between the values -V4 and -V3 during the IEDF phase of each of the RF cycles 1 and 2. The processor 124 controls the voltage supply circuit 118 (Figure 1) to achieve the difference between the values -V4 and -V3 during a time period, which is a difference between the times t5 and t2, of the IEDF phase of the RF cycle 1. Also, the processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V4 and -V3 during a time period, which is a difference between the times tlO and t7, of the IEDF phase of the RF cycle 2. The voltage supply circuit 118 is controlled during the RF cycles 1 and 2 to control the non-sinusoidal voltage waveform 502 to have the first number of negative ramp slopes of the non-sinusoidal voltage waveform 502 and a value of each of the negative ramp slopes of the non-sinusoidal voltage waveform 502. Continuing with the example, the value of the positive ramp slope of the non-sinusoidal voltage waveform 502 is a difference between the values -V3 and -V4, of the IEDF phase of the RF cycle 3. The processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V3 and -V4 during a time period, which is a difference between the times tl 5 and tl2, to control the non-sinusoidal voltage waveform 502 to have the second number of positive ramp slopes of the non-sinusoidal voltage waveform 502 and a value of each of the positive ramp slopes of the non-sinusoidal voltage waveform 502.

[0102] It should be noted that by increasing a maximum value during the overcompensated spread of the IEDF plot 552 and decreasing a maximum value during the undercompensated spread of the IEDF plot 552, there is an increase in high ion energy and decrease in low ion energy. With the increase in the high ion energy and the decrease in the low ion energy, there is an increase in a rate at which the substrate S is etched and a decrease in a rate at which materials are deposited on the substrate S.

[0103] Figure 6A is an embodiment of a graph 600 to illustrate a non-sinusoidal voltage waveform 602 having a ramp slope that is positive during each of the first number of RF cycles of the non-sinusoidal voltage waveform 602 and having a ramp slope that is negative during each of the second number of RF cycles of the non-sinusoidal voltage waveform 602. As illustrated in the graph 600, the first number of RF cycles of the non-sinusoidal voltage waveform 602 is different from, such as greater than, the second number of RF cycles of the non- sinusoidal voltage waveform 602. For example, the first number of positive ramp slopes of the non-sinusoidal voltage waveform 602 is greater than the second number of negative ramp slopes of the non-sinusoidal voltage waveform 602. The non-sinusoidal voltage waveform 602 is an example of the non-sinusoidal voltage waveform 142 (Figure 1).

[0104] The graph 600 plots a voltage of the non-sinusoidal voltage waveform 602 on a y-axis and time t on an x-axis. The y-axis of the graph 600 is the same as the y-axis of the graph 400 (Figure 4A). The x-axis of the graph 600 is the same as the x-axis of the graph 400 (Figure 4A).

[0105] During the charging phase occurring within the RF cycle 1, which is an example of the first RF cycle of the non-sinusoidal voltage waveform 602, the voltage of the non-sinusoidal voltage waveform 602 increases from the value -V3 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 602 decreases from the value V3 to the value -V3. Also, during the IEDF phase of the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 602 increases from the negative value -V3 to the negative value -V2 to form a positive ramp slope. For example, the positive ramp slope starts at the time t2 and ends at the time t5.

[0106] Moreover, during the charging phase occurring within the RF cycle 2, which is an example of the second RF cycle of the non-sinusoidal voltage waveform 602, the voltage of the non-sinusoidal voltage waveform 602 increases from the value -V2 to the value V3. During a discharging phase occurring within the RF cycle 2 of the non-sinusoidal voltage waveform 602, the voltage of the non-sinusoidal voltage waveform 602 increases from the value V3 to the value -V3. Also, during the IEDF phase of the RF cycle 2, the voltage of the non-sinusoidal voltagewaveform 602 increases from the negative value -V3 to the negative value -V2 to form a positive ramp slope. For example, the positive ramp slope starts at the time t7 and ends at the time tlO.

[0107] Similarly, during the charging phase occurring within an RF cycle 3, which is an example of the third RF cycle, of the non-sinusoidal voltage waveform 602, the voltage of the non-sinusoidal voltage waveform 602 increases from the value -V2 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 602 decreases from the value V3 to the value -V3. Also, during the IEDF phase of the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 602 decreases from the negative value -V3 to the negative value -V4 to form a negative ramp slope. For example, the negative ramp slope starts at the time tl2 and ends at the time tl 5.

[0108] In this manner, the first number of positive ramp slopes of the non-sinusoidal voltage waveform 602 and the second number of negative ramp slopes of the non-sinusoidal voltage waveform 602 repeat during additional RF cycles, such as the RF cycle 4, the RF cycle 5, and the RF cycle 6 of the non-sinusoidal voltage waveform 602. It should be noted that the first number of positive ramp slopes of the non-sinusoidal voltage waveform 602 is equal to the first number of RF cycles of the non-sinusoidal voltage waveform 602 and the second number of negative ramp slopes of the non-sinusoidal voltage waveform 602 is equal to the second number of RF cycles of the non-sinusoidal voltage waveform 602.

[0109] The processor 124 (Figure 1) controls the voltage supply circuit 118 (Figure 1) to generate the non-sinusoidal voltage waveform 602 having the first number of positive ramp slopes and the second number of negative ramp slopes. For example, the processor 124 controls the voltage supply circuit 118 to increase a voltage of current waveform 148 (Figure 1) for a time period of the IEDF phase of each of the first number of RF cycles, such as the RF cycles 1 and 2, of the non-sinusoidal voltage waveform 602 to further increase a voltage of the modified current waveform 150 (Figure 1) to increase a voltage of the modified pulsed voltage waveform 140 (Figure 1) at the point P2 (Figure 1). When the voltage of the modified pulsed voltage waveform 140 is increased, a voltage of the non-sinusoidal voltage waveform 602 increases to generate a positive ramp slope during the IEDF phase. As another example, the processor 124 controls the voltage supply circuit 118 to decrease a voltage of current waveform 148 for a time period of the IEDF phase of each of the second number of RF cycles, such as the RF cycle 3, of the non- sinusoidal voltage waveform 602 to further decrease a voltage of the modified current waveform 150 to decrease a voltage of the modified pulsed voltage waveform 140 at the point P2. When the voltage of the modified pulsed voltage waveform 140 is decreased, a voltage of the non- sinusoidal voltage waveform 602 decreases to generate a negative ramp slope during the IEDF phase.

[0110] Figure 6B is an embodiment of a graph 650 to illustrate an IEDF plot 652. The IEDF plot 652 illustrates an IEDF that is less overcompensated and more undercompensated. For example, an amount of undercompensation that is achieved is outside the predetermined range from an amount of overcompensation. To illustrate, the amount of undercompensation is greater than the amount of overcompensation by greater than the predetermined range. To further illustrate, a maximum value of ion flux during an undercompensated spread of the IEDF plot 652 is outside the predetermined range from a maximum value of ion flux during an overcompensated spread of the IEDF plot 652. By providing the greater amount of undercompensation, the substrate S (Figure 1) is processed with a high amount of ion flux at a low amount of ion energy and a low amount of ion flux at a high amount of ion energy. The low amount of ion energy is less than the high amount of ion energy by a predetermined percentage, such as 20 percent or 30 percent or 40 percent.

[0111] The graph 650 plots ion flux on a y-axis and ion energy, in eV, on an x-axis. The y-axis of the graph 650 has a value IF3.5 of ion flux. The value IF3.5 is greater than the value IF3 and less than the value IF4. The x-axis of the graph 650 is the same as the x-axis of the graph 450 (Figure 4B). The y-axis of the graph 650 is the same as the y-axis of the graph 450 (Figure 4B).

[0112] The ion flux of the IEDF plot 652 starts at the value IF0 and increases to the value IF 5. When the ion flux of the IEDF plot 652 has the value IF 5, the ion energy of the IEDF plot 652 has the value eVl. The ion flux of the IEDF plot 652 decreases from the value IF5 to the value IF0.5 at the value eV5 of an eV center of the IEDF plot 652. The ion flux increases from the value IF 0.5 to the value IF 3.5. When the ion flux of the IEDF plot 652 has the value of IF 3.5 after the increase, the ion energy has the value eV8.75. The ion flux of the IEDF plot 652 decreases from the value IF3.5 to the value of IF0 at the value eVIO of the ion energy of the IEDF plot 652.

[0113] It should be noted that the IEDF plot 652 provides an example of the IEDF setting. For example, an eV center of the IEDF plot 652 has the value eV5 and the value IF0.5, a value of an overcompensated spread of the IEDF plot 652 is eV5, which is a difference between the value eVIO and the value eV5 of the eV center, and a slope of the overcompensated spread of the IEDF plot 652 is a slope, such as a negative slope or a positive slope, of the IEDF plot 652 between the eV center of the IEDF plot 652 and the value eVIO at which the ion flux is IF0. To illustrate, the slope of the overcompensated spread of the IEDF plot 652 is a value of a positive slope between the values eV5 and eV8.75. To further illustrate, the slope of the overcompensated spread of the IEDF plot 652 is equal to a ratio of a difference between IF3.5 and IF0.5 and a difference between eV8.75 and eV5. As another illustration, the slope of the overcompensatedspread of the IEDF plot 652 is a value of a negative slope between the values eV8.75 and eVlO. To further illustrate, the slope of the overcompensated spread of the IEDF plot 652 is equal to a ratio of a difference between IFO and IF3.5 and a difference between eVIO and eV8.75. As another example, the eV center of the IEDF plot 652 has the value eV5 and the value IFO.5, a value of an undercompensated spread of the IEDF plot 652 is eV5, which is a difference between the value eV5 of the eV center and the value eVO, and a slope of the undercompensated spread of the IEDF plot 652 is a slope, such as a negative slope or a positive slope, of the IEDF plot 652 between the value eVO at which the ion flux is IFO and the eV center of the IEDF plot 652. To illustrate, the slope of the undercompensated spread of the IEDF plot 652 is a value of a positive slope between the values eVO and eVl. To further illustrate, the slope of the undercompensated spread of the IEDF plot 652 is equal to a ratio of a difference between IF5 and IFO and a difference between eVl and eVO. As another illustration, the slope of the undercompensated spread of the IEDF plot 652 is a value of a negative slope between the values eVl and eV5. To further illustrate, the slope of the undercompensated spread of the IEDF plot 652 is equal to a ratio of a difference between IFO.5 and IF5 and a difference between eV5 and eVl.

[0114] The overcompensated spread of the IEDF plot 652 occurs from the value eV5 of the eV center of the IEDF plot 652 until the value eVIO at which the ion flux is IFO. For example, the overcompensated spread of the IEDF plot 652 is to the right side of the value eV5 of the eV center of the IEDF plot 652. To illustrate, the overcompensated spread of the IEDF plot 652 includes a maximum value, such as the value IF3.5, of the ion flux of the IEDF plot 652 and extends from the eV center of the IEDF plot 652 until the ion flux of the IEDF plot 652 has a value of IFO. Also, the undercompensated spread of the IEDF plot 652 occurs from the value eVO at which the ion flux is IFO to the value eV5 of the eV center of the IEDF plot 652. For example, the undercompensated spread of the IEDF plot 652 is to the left side of the value eV5 of the eV center of the IEDF plot 652. To illustrate, the undercompensated spread of the IEDF plot 652 includes a maximum value, such as the value IF5, of the ion flux of the IEDF plot 652 and extends from the value eVO at which the ion flux is IFO to the eV center of the IEDF plot 652.

[0115] When the undercompensated spread of the IEDF plot 652 is to be produced during the first number of RF cycles, such as the RF cycles 1 and 2, of the non-sinusoidal voltage waveform 602 and the overcompensated spread of the IEDF plot 552 is to be produced during the second number of RF cycles, such as the RF cycle 3, of the non-sinusoidal voltage waveform 602, the IEDF setting illustrated by the IEDF plot 652 is provided by the user via the input device to the processor 124. Upon receiving the IEDF setting illustrated by the IEDF plot 652, the processor 124 accesses the mapping function to identify a value of each negative ramp slope of the non-sinusoidal voltage waveform 602, a value of each positive ramp slope of the non-sinusoidal voltage waveform 602, the first number of positive ramp slopes of the non-sinusoidal voltage waveform 602, and the second number of negative ramp slopes of the non-sinusoidal voltage waveform 602. For example, the value of the negative ramp slope of the non-sinusoidal voltage waveform 602 is a difference between the values -V4 and -V3. The processor 124 controls the voltage supply circuit 118 (Figure 1) to achieve the difference between the values - V4 and -V3 during a time period, which is a difference between the times tl 5 and tl2, during the IEDF phase of the RF cycle 3. The voltage supply circuit 118 is controlled to generate the non- sinusoidal voltage waveform 602 having the second number of negative ramp slopes and a value of each of the negative ramp slopes. Continuing with the example, the value of the positive ramp slope of the non-sinusoidal voltage waveform 602 is a difference between the values -V2 and - V3. The processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V2 and -V3 during a time period, which is a difference between the times t5 and t2, of the IEDF phase of the RF cycle 1 of the non-sinusoidal voltage waveform 602. Also, the processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V2 and -V3 during a time period, which is a difference between the times tlO and t7, of the IEDF phase of the RF cycle 2 of the non-sinusoidal voltage waveform 602. The voltage supply circuit 118 is controlled during the IEDF phase of each of the RF cycles 1 and 2 to generate the non-sinusoidal voltage waveform 602 having the first number of positive ramp slopes and a value of each of the positive ramp slopes.

[0116] It should be noted that by increasing a maximum value during the undercompensated spread of the IEDF plot 652 and decreasing a maximum value during the overcompensated spread of the IEDF plot 552, there is an increase in low ion energy and decrease in high ion energy. With the increase in the low ion energy and the decrease in the high ion energy, there is a decrease in a rate at which the substrate S is etched and an increase in a rate at which materials are deposited on the substrate S.

[0117] Figure 7A is an embodiment of a graph 700 to illustrate a non-sinusoidal voltage waveform 702 having a steeper ramp slope that is positive during each of a number of RF cycles of the non-sinusoidal voltage waveform 702 and having a steeper ramp slope that is negative during each of the same or a different number of RF cycles of the non-sinusoidal voltage waveform 702. The non-sinusoidal voltage waveform 702 is an example of the non- sinusoidal voltage waveform 142 (Figure 1).

[0118] The graph 700 plots a voltage of the non-sinusoidal voltage waveform 702 on a y-axis and time t on an x-axis. The y-axis of the graph 700 is the same as the y-axis of the graph 600 (Figure 6A). The x-axis of the graph 700 is the same as the x-axis of the graph 600 (Figure 6A).

[0119] During the charging phase occurring within the RF cycle 1, which is an example of the first RF cycle of the non-sinusoidal voltage waveform 702, the voltage of the non-sinusoidal voltage waveform 702 increases from the value -V3 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 702 decreases from the value V3 to the value -V4. Also, during the IEDF phase of the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 702 increases from the negative value -V4 to the negative value -V2 to form a steeper positive ramp slope. For example, the steeper positive ramp slope starts at the time t2 and ends at the time t5.

[0120] Moreover, during the charging phase occurring within the RF cycle 2, which is an example of the second RF cycle of the non-sinusoidal voltage waveform 702, the voltage of the non-sinusoidal voltage waveform 702 increases from the value -V2 to the value V3. During a discharging phase occurring within the RF cycle 2 of the non-sinusoidal voltage waveform 702, the voltage of the non-sinusoidal voltage waveform 702 decreases from the value V3 to the value -V2. Also, during the IEDF phase of the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 702 decreases from the negative value -V2 to the negative value -V4 to form a steeper negative ramp slope. For example, the steeper negative ramp slope starts at the time t7 and ends at the time tlO.

[0121] Similarly, during the charging phase occurring within the RF cycle 3, which is an example of the third RF cycle of the non-sinusoidal voltage waveform 702, the voltage of the non-sinusoidal voltage waveform 702 increases from the value -V4 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 702 decreases from the value V3 to the value -V4. Also, during the IEDF phase of the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 702 increases from the negative value -V4 to the negative value -V2 to form a steeper positive ramp slope. For example, the steeper positive ramp slope starts at the time tl2 and ends at the time tl5. In this manner, the steeper positive ramp slopes of the non-sinusoidal voltage waveform 702 and the steeper negative ramp slopes of the non-sinusoidal voltage waveform 702 repeat during additional RF cycles, such as the RF cycle 4, the RF cycle 5, and the RF cycle 6 of the non- sinusoidal voltage waveform 702.

[0122] The processor 124 (Figure 1) controls the voltage supply circuit 118 (Figure 1) to generate the non-sinusoidal voltage waveform 702 having the steeper positive ramp slopes and the steeper negative ramp slopes. For example, the processor 124 controls the voltage supply circuit 118 to increase a voltage of current waveform 148 (Figure 1) by the first amount for a time period of the IEDF phase of each of the first number of RF cycles, such as the RF cycles 1 and 3, of the non-sinusoidal voltage waveform 702 to further increase a voltage of the modifiedcurrent waveform 150 (Figure 1) by the first amount to increase a voltage of the modified pulsed voltage waveform 140 (Figure 1) at the point P2 (Figure 1) by the first amount. When the voltage of the modified pulsed voltage waveform 140 is increased by the first amount, a voltage of the non-sinusoidal voltage waveform 702 increases by the first amount to generate the steeper positive ramp slope during the IEDF phase. As another example, the processor 124 controls the voltage supply circuit 118 to decrease a voltage of current waveform 148 by the first amount for a time period of the IEDF phase of each of the number of RF cycles, such as the RF cycle 3, of the non-sinusoidal voltage waveform 702 to further decrease a voltage of the modified current waveform 150 by the first amount to decrease a voltage of the modified pulsed voltage waveform 140 at the point P2 by the first amount. When the voltage of the modified pulsed voltage waveform 140 is decreased by the first amount, a voltage of the non-sinusoidal voltage waveform 702 decreases by the first amount to generate the steeper negative ramp slope during the IEDF phase. As yet another example, the processor 124 controls the voltage supply circuit 118 to decrease a voltage of current waveform 148 by a third amount, different from the first amount, for a time period of the IEDF phase of each of the number of RF cycles, such as the RF cycle 3, of the non-sinusoidal voltage waveform 702 to further decrease a voltage of the modified current waveform 150 by the third amount to decrease a voltage of the modified pulsed voltage waveform 140 at the point P2 by the third amount. When the voltage of the modified pulsed voltage waveform 140 is decreased by the third amount, a voltage of the non-sinusoidal voltage waveform 702 decreases by the third amount to generate the steeper negative ramp slope during the IEDF phase.

[0123] Figure 7B is an embodiment of the graph 650 to illustrate the IEDF plot 652. The IEDF plot 652 illustrates an IEDF that has a wider ion energy distribution created by the steeper positive and negative ramp slopes. To illustrate, a difference between ion energy at which the maximum value, IF5, of ion flux occurs during an undercompensated spread and ion energy at which the maximum value, IF3.5, of ion flux occurs during an overcompensated spread is eV7.75. As another illustration, a difference between a value of eVO of ion energy of the IEDF plot 652 during an overcompensated spread and a value of eVIO of ion energy of the IEDF plot 652 during an overcompensated spread is eVIO.

[0124] When the wider ion energy distribution of the IEDF plot 652 is to be produced, the IEDF setting illustrated by the IEDF plot 652 is provided by the user via the input device to the processor 124. Upon receiving the IEDF setting illustrated by the IEDF plot 652, the processor 124 accesses the mapping function to identify a value of each steeper negative ramp slope of the non-sinusoidal voltage waveform 702, a value of each steeper positive ramp slope of the non-sinusoidal voltage waveform 702, a number of steeper positive ramp slopes ofthe non-sinusoidal voltage waveform 702, and a number of steeper negative ramp slopes of the non-sinusoidal voltage waveform 702 . For example, the value of the steeper negative ramp slope of the non-sinusoidal voltage waveform 702 is a difference between the values -V4 and -V2. The processor 124 controls the voltage supply circuit 118 (Figure 1) to achieve the difference between the values -V4 and -V2 during a time period, which is a difference between the times tlO and t7, during the IEDF phase of the RF cycle 2. The voltage supply circuit 118 is controlled to generate the non-sinusoidal voltage waveform 702 having the number of steeper negative ramp slopes and a value of each of the steeper negative ramp slopes. Continuing with the example, the value of the steeper positive ramp slope of the non-sinusoidal voltage waveform 702 is a difference between the values -V2 and -V4. The processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V2 and -V4 during a time period, which is a difference between the times t5 and t2, of the IEDF phase of the RF cycle 1 of the non-sinusoidal voltage waveform 702. Moreover, the processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V2 and -V4 during a time period, which is a difference between the times tl 5 and tl2, of the IEDF phase of the RF cycle 3 of the non-sinusoidal voltage waveform 702. The voltage supply circuit 118 is controlled during the IEDF phase of each of the RF cycles 1 and 3 to generate the non-sinusoidal voltage waveform 702 having the number of steeper positive ramp slopes and a value of each of the steeper positive ramp slopes.

[0125] It should be noted that by controlling an amount, such as a value, of ion energy distribution, there is an increase in low ion energy and decrease in high ion energy. With the increase in the low ion energy and the decrease in the high ion energy, there is a decrease in a rate at which the substrate S is etched and an increase in a rate at which materials are deposited on the substrate S.

[0126] Figure 8A is an embodiment of a graph 800 to illustrate a non-sinusoidal voltage waveform 802 having a less steeper, such as a lower, ramp slope that is positive during each of a number of RF cycles of the non-sinusoidal voltage waveform 802 and having a less steeper, such as a lower, ramp slope that is negative during each of the same or a different number of RF cycles of the non-sinusoidal voltage waveform 802. The non-sinusoidal voltage waveform 802 is an example of the non-sinusoidal voltage waveform 142 (Figure 1).

[0127] The graph 800 plots a voltage of the non-sinusoidal voltage waveform 802 on a y-axis and time t on an x-axis. The y-axis of the graph 800 is the same as the y-axis of the graph 600 (Figure 6A). The x-axis of the graph 800 is the same as the x-axis of the graph 600 (Figure 6A).

[0128] During the charging phase occurring within the RF cycle 1, which is an example of the first RF cycle of the non-sinusoidal voltage waveform 802, the voltage of the non-sinusoidal voltage waveform 802 increases from the value -V3 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 802 decreases from the value V3 to the value -V4. Also, during the IEDF phase of the RF cycle 1, the voltage of the non-sinusoidal voltage waveform 802 increases from the negative value -V4 to the negative value -V3 to form a less steeper positive ramp slope compared to the steeper positive ramp slope of the non-sinusoidal voltage waveform 702 (Figure 7A). For example, the less steeper positive ramp slope starts at the time t2 and ends at the time t5.

[0129] Moreover, during the charging phase occurring within the RF cycle 2, which is an example of the second RF cycle of the non-sinusoidal voltage waveform 802, the voltage of the non-sinusoidal voltage waveform 802 increases from the value -V3 to the value V3. During a discharging phase occurring within the RF cycle 2 of the non-sinusoidal voltage waveform 802, the voltage of the non-sinusoidal voltage waveform 802 decreases from the value V3 to the value -V3. Also, during the IEDF phase of the RF cycle 2, the voltage of the non-sinusoidal voltage waveform 802 decreases from the negative value -V3 to the negative value -V4 to form a less steeper negative ramp slope compared to the steeper negative ramp slope of the non-sinusoidal voltage waveform 702. For example, the less steeper negative ramp slope starts at the time t7 and ends at the time tlO.

[0130] Similarly, during the charging phase occurring within the RF cycle 3, which is an example of the third RF cycle of the non-sinusoidal voltage waveform 802, the voltage of the non-sinusoidal voltage waveform 802 increases from the value -V4 to the value V3. Moreover, during the discharging phase occurring within the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 802 decreases from the value V3 to the value -V4. Also, during the IEDF phase of the RF cycle 3, the voltage of the non-sinusoidal voltage waveform 802 increases from the negative value -V4 to the negative value -V3 to form a less steeper positive ramp slope compared to the steeper ramp slope of the non-sinusoidal voltage waveform 702. For example, the less steeper positive ramp slope starts at the time tl2 and ends at the time tl5. In this manner, the less steeper positive ramp slopes of the non-sinusoidal voltage waveform 802 and the less steeper negative ramp slopes repeat during additional RF cycles, such as the RF cycle 4, the RF cycle 5, and the RF cycle 6 of the non-sinusoidal voltage waveform 802.

[0131] The processor 124 (Figure 1) controls the voltage supply circuit 118 (Figure 1) to generate the non-sinusoidal voltage waveform 802 having the less steeper positive ramp slopes and the less steeper negative ramp slopes. For example, the processor 124 controls the voltage supply circuit 118 to increase a voltage of current waveform 148 (Figure 1) by the secondamount for a time period of the IEDF phase of each of the number of RF cycles, such as the RF cycles 1 and 3, of the non-sinusoidal voltage waveform 802 to further increase a voltage of the modified current waveform 150 (Figure 1) by the second amount to increase a voltage of the modified pulsed voltage waveform 140 (Figure 1) at the point P2 (Figure 1) by the second amount. When the voltage of the modified pulsed voltage waveform 140 is increased by the second amount, a voltage of the non-sinusoidal voltage waveform 802 increases by the second amount to generate the less steeper positive ramp slope during the IEDF phase. As another example, the processor 124 controls the voltage supply circuit 118 to decrease a voltage of current waveform 148 by the second amount for a time period of the IEDF phase of each of the number of RF cycles, such as the RF cycle 3, of the non-sinusoidal voltage waveform 702 to further decrease a voltage of the modified current waveform 150 by the second amount to decrease a voltage of the modified pulsed voltage waveform 140 at the point P2 by the second amount. When the voltage of the modified pulsed voltage waveform 140 is decreased by the second amount, a voltage of the non-sinusoidal voltage waveform 802 decreases by the second amount to generate the less steeper negative ramp slope during the IEDF phase. As yet another example, the processor 124 controls the voltage supply circuit 118 to decrease a voltage of current waveform 148 by a fourth amount, different from the second amount, for a time period of the IEDF phase of each of the number of RF cycles, such as the RF cycle 3, of the non-sinusoidal voltage waveform 802 to further decrease a voltage of the modified current waveform 150 by the fourth amount to decrease a voltage of the modified pulsed voltage waveform 140 at the point P2 by the fourth amount. When the voltage of the modified pulsed voltage waveform 140 is decreased by the fourth amount, a voltage of the non-sinusoidal voltage waveform 802 decreases by the fourth amount to generate the less steeper negative ramp slope during the IEDF phase.

[0132] Figure 8B is an embodiment of a graph 850 to illustrate an IEDF plot 852. The IEDF plot 852 illustrates an IEDF that has a narrower ion energy distribution created by the less steeper positive and the less steeper negative ramp slopes. For example, the narrower ion energy distribution is narrower than the ion energy distribution of the IEDF plot 652 (Figure 7B). To illustrate, a difference between ion energy at which the maximum value, IF5, of ion flux occurs during an undercompensated spread of the IEDF plot 852 and ion energy at which the maximum value, IF3.5, of ion flux occurs during an overcompensated spread of the IEDF plot 852 is eV6.5, which is less than the difference eV7.75 of the IEDF plot 652. As another illustration, a difference between a value of eVO of ion energy during an overcompensated spread and a value of eVO of ion energy during an overcompensated spread is eV8, which is less than the difference eVIO ofthe lEDF plot 652.

[0133] The graph 850 plots ion flux on a y-axis and ion energy, in eV, on an x-axis. The x-axis of the graph 850 is the same as the x-axis of the graph 450 (Figure 4B). The y-axis of the graph 850 is the same as the y-axis of the graph 450 (Figure 4B).

[0134] The ion flux of the IEDF plot 852 starts at the value eVO and increases to the value IF5. When the ion flux of the IEDF plot 852 has the value IF5, the ion energy of the IEDF plot 852 has a value eV0.5, which is greater than the value 0 of ion energy and less than the value eVl. The ion flux of the IEDF plot 852 decreases from the value IF5 to the value IF1 at the value eV4 of an eV center of the IEDF plot 852. The ion flux of the IEDF plot 852 increases from the value IF1 to the value IF 3.5. When the ion flux of the IEDF plot 852 has the value of IF 3.5 after the increase, the ion energy has the value eV7. The ion flux of the IEDF plot 852 decreases from the value IF 3.5 to the value of IF0 at the value eV8 of the ion energy of the IEDF plot 852.

[0135] It should be noted that the IEDF plot 852 provides an example of the IEDF setting. For example, an eV center of the IEDF plot 852 has the value eV4 and the value IF1, a value of an overcompensated spread of the IEDF plot 852 is eV4, which is a difference between the value eV8 and the value eV4 of the eV center, and a slope of the overcompensated spread of the IEDF plot 852 is a slope, such as a negative slope or a positive slope, of the IEDF plot 852 between the eV center of the IEDF plot 852 and the value eV8 at which the ion flux is IF0. To illustrate, the slope of the overcompensated spread of the IEDF plot 852 is a value of a positive slope between the values eV4 and eV7. To further illustrate, the slope of the overcompensated spread of the IEDF plot 852 is equal to a ratio of a difference between IF3.5 and IF1 and a difference between eV7 and eV4. As another illustration, the slope of the overcompensated spread of the IEDF plot 852 is a value of a negative slope between the values eV7 and eV8. To further illustrate, the slope of the overcompensated spread of the IEDF plot 852 is equal to a ratio of a difference between IF0 and IF3.5 and a difference between eV8 and eV7. As another example, the eV center of the IEDF plot 852 has the value eV4 and the value IF1, a value of an undercompensated spread of the IEDF plot 852 is eV4, which is a difference between the value eV4 of the eV center and the value eVO, and a slope of the undercompensated spread of the IEDF plot 852 is a slope, such as a negative slope or a positive slope, of the IEDF plot 852 between the value evO at which the ion flux is IF0 and the eV center of the IEDF plot 852. To illustrate, the slope of the undercompensated spread of the IEDF plot 852 is a value of a positive slope between the values eVO and eV0.5. To further illustrate, the slope of the undercompensated spread of the IEDF plot 852 is equal to a ratio of a difference between IF5 and IF0 and a difference between eV0.5 and eVO. As another illustration, the slope of the undercompensated spread of the IEDF plot 852 is a value of a negative slope between the values eV0.5 and eV4. To further illustrate,the slope of the undercompensated spread of the IEDF plot 852 is equal to a ratio of a difference between IF1 and IF5 and a difference between eV4 and eV0.5.

[0136] The overcompensated spread of the IEDF plot 852 occurs from the value eV4 of the eV center of the IEDF plot 852 until the value eV8 at which the ion flux is IFO. For example, the overcompensated spread of the IEDF plot 852 is to the right side of the value eV4 of the eV center of the IEDF plot 852. To illustrate, the overcompensated spread of the IEDF plot 852 includes a maximum value, such as the value IF3.5, of the ion flux of the IEDF plot 852 and extends from the eV center of the IEDF plot 852 until the ion flux of the IEDF plot 852 has a value of IFO. Also, the undercompensated spread of the IEDF plot 852 occurs from the value eVO at which the ion flux is IFO to the value eV4 of the eV center of the IEDF plot 852. For example, the undercompensated spread of the IEDF plot 852 is to the left side of the value eV4 of the eV center of the IEDF plot 852. To illustrate, the undercompensated spread of the IEDF plot 852 includes the maximum value, such as the value IF5, of the ion flux of the IEDF plot 852 and extends from the value eVO at which the ion flux is IFO to the eV center of the IEDF plot 852.

[0137] When the narrower ion energy distribution of the IEDF plot 852 is to be produced, the IEDF setting illustrated by the IEDF plot 852 is provided by the user via the input device to the processor 124. Upon receiving the IEDF setting illustrated by the IEDF plot 852, the processor 124 accesses the mapping function to identify a value of each less steeper negative ramp slope of the non-sinusoidal voltage waveform 802, a value of each less steeper positive ramp slope of the non-sinusoidal voltage waveform 802, a number of less steeper positive ramp slopes of the non-sinusoidal voltage waveform 802, and a number of less steeper negative ramp slopes of the non-sinusoidal voltage waveform 802. For example, the value of the less steeper negative ramp slope of the non-sinusoidal voltage waveform 802 is a difference between the values -V4 and -V3. The processor 124 controls the voltage supply circuit 118 (Figure 1) to achieve the difference between the values -V4 and -V3 during a time period, which is a difference between the times tlO and t7, during the IEDF phase of the RF cycle 2. The voltage supply circuit 118 is controlled to generate the non-sinusoidal voltage waveform 802 having the number of less steeper negative ramp slopes and a value of each of the less steeper negative ramp slopes. Continuing with the example, the value of the less steeper positive ramp slope of the non- sinusoidal voltage waveform 802 is a difference between the values -V3 and -V4. The processor controls the voltage supply circuit 118 to achieve the difference between the values -V3 and -V4 during a time period, which is a difference between the times t5 and t2, of the IEDF phase of the RF cycle 1 of the non-sinusoidal voltage waveform 802. Moreover, the processor 124 controls the voltage supply circuit 118 to achieve the difference between the values -V3 and -V4 during a time period, which is a difference between the times tl5 and tl2, of the IEDF phase of the RFcycle 3 of the non-sinusoidal voltage waveform 802. The voltage supply circuit 118 is controlled during the IEDF phase of each of the RF cycles 1 and 3 to generate the non-sinusoidal voltage waveform 802 having the number of less steeper positive ramp slopes and a value of each of the less steeper positive ramp slopes.

[0138] It should be noted that by controlling an amount, such as a value, of ion energy distribution, there is an increase in high ion energy and decrease in low ion energy. With the increase in the high ion energy and the decrease in the low ion energy, there is an increase in a rate at which the substrate S is etched and a decrease in a rate at which materials are deposited on the substrate S.

[0139] Figure 9 is an example of a display device 900 to illustrate a mapping function 902. The mapping function is displayed on a display screen 904 of the display device 900. An example of the display device 900 is a display device of the host computer 106 (Figure 1). The display device 900 is coupled to the processor 124 (Figure 1). For example, the display device 900 includes a graphical processing unit (GPU) and the GPU is coupled to the processor 124. Examples of the display device 900 include a liquid crystal display (LCD) device and a light emitting diode display (LED) device.

[0140] The mapping function 902 includes correspondences, such as one-to-one relationships or unique relationships or links, between IEDF settings and the information regarding combinations of ramp slopes of the non-sinusoidal voltage waveform 142 (Figure 1). For example, a first IEDF setting includes a combination of a value eVCl of an eV center of an IEDF plot, such as the IEDF plot 252 or 352 or 452 or 552 or 652 or 852 (Figure 2B or 3B or 4B or 5B or 6B or 7B or 8B), a value eVSOCl of an overcompensated spread of the IEDF plot, a value eVSUCl of an undercompensated spread of the IEDF plot, a value SOC1 of a slope, such as a positive slope or a negative slope, of the overcompensated spread, and a value SUC1 of a slope, such as a positive slope or a negative slope, of the undercompensated spread. Also, in the example, a second IEDF setting includes a combination of a value eVC2 of an eV center of an IEDF plot, such as the IEDF plot 252 or 352 or 452 or 552 or 652 or 852, a value eVSOC2 of an overcompensated spread of the IEDF plot, a value eVSUC2 of an undercompensated spread of the IEDF plot, a value SOC2 of a slope, such as a positive slope or a negative slope, of the overcompensated spread, and a value SUC2 of a slope, such as a positive slope or a negative slope, of the undercompensated spread. In the example, the first IEDF setting or the second IEDF setting is received from the user via the input device by the processor 124.

[0141] Continuing with the example, upon receiving the first IEDF setting, the processor 124 accesses the mapping function 902 to identify, such as determine or access, a first set of information regarding a combination of ramp slopes of the non-sinusoidal voltagewaveform 142. The first set of information corresponds to the first IEDF setting. An example of the first set of information regarding the combination of ramp slopes of the non-sinusoidal voltage waveform 142 is a combination Cl of values of ion flux compensation. The combination Cl includes a number of positive ramp slopes of the non-sinusoidal voltage waveform 142, a number of negative ramp slopes of the non-sinusoidal voltage waveform 142, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. To illustrate, the combination Cl includes the number of positive ramp slopes of the non-sinusoidal voltage waveform 402 (Figure 4A), the number of negative ramp slopes of the non-sinusoidal voltage waveform 402, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. As another illustration, the combination Cl includes the first number of negative ramp slopes of the non-sinusoidal voltage waveform 502 (Figure 5A), the second number of positive ramp slopes of the non-sinusoidal voltage waveform 502, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. As yet another illustration, the combination Cl includes the first number of positive ramp slopes of the non-sinusoidal voltage waveform 602 (Figure 6A), the second number of negative ramp slopes of the non-sinusoidal voltage waveform 602, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. As another illustration, the combination Cl includes the number of steeper positive ramp slopes of the non-sinusoidal voltage waveform 702 (Figure 7A), the number of steeper negative ramp slopes of the non-sinusoidal voltage waveform 702, a value of each of the steeper positive ramp slopes, and a value of each of the steeper negative ramp slopes. As yet another illustration, the combination Cl includes the number of less steeper positive ramp slopes of the non-sinusoidal voltage waveform 802 (Figure 8A), the number of less steeper negative ramp slopes of the non-sinusoidal voltage waveform 802, a value of each of the less steeper positive ramp slopes, and a value of each of the less steeper negative ramp slopes.

[0142] Continuing with the example, on the other hand, upon receiving the second IEDF setting, the processor 124 accesses the mapping function 902 to identify, such as determine or access, a second set of information regarding a combination of ramp slopes of the non- sinusoidal voltage waveform 142. The second set of information corresponds to the second IDF setting. An example of the second set of information regarding the combination of ramp slopes of the non-sinusoidal voltage waveform 142 is a combination C2 of values of ion flux compensation. The combination C2 includes a number of positive ramp slopes of the non- sinusoidal voltage waveform 142, a number of negative ramp slopes of the non-sinusoidal voltage waveform 142, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. To illustrate, the combination C2 includes the number of positive ramp slopes of the non-sinusoidal voltage waveform 402, the number of negative ramp slopes of thenon-sinusoidal voltage waveform 402, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. As another illustration, the combination C2 includes the first number of negative ramp slopes of the non-sinusoidal voltage waveform 502, the second number of positive ramp slopes of the non-sinusoidal voltage waveform 502, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. As yet another illustration, the combination C2 includes the first number of positive ramp slopes of the non-sinusoidal voltage waveform 602, the second number of negative ramp slopes of the non-sinusoidal voltage waveform 602, a value of each of the positive ramp slopes, and a value of each of the negative ramp slopes. As another illustration, the combination C2 includes the number of steeper positive ramp slopes of the non-sinusoidal voltage waveform 702, the number of steeper negative ramp slopes of the non-sinusoidal voltage waveform 702, a value of each of the steeper positive ramp slopes, and a value of each of the steeper negative ramp slopes. As yet another illustration, the combination C2 includes the first number of less steeper positive ramp slopes of the non- sinusoidal voltage waveform 802, the second number of less steeper negative ramp slopes of the non-sinusoidal voltage waveform 802, a value of each of the less steeper positive ramp slopes, and a value of each of the less steeper negative ramp slopes. It should be noted that each value, such as eVSOCl or eVSOC2 or eVSUCl or eVSUC2, is sometimes referred to herein as an extent.

[0143] It should be noted that the value eVSOCl is equal to or different from, such as greater than or less than, the value eVSUCl . Similarly, the value eVSOC2 is equal to or different from, such as greater than or less than, the value eVSUC2.

[0144] It should further be noted that the value SOC1 is equal to or different from, such as greater than or less than, the value SUC1. Similarly, the value SOC2 is equal to or different from, such as greater than or less than, the value SUC2.

[0145] Embodiments, described herein, may be practiced with various computer system configurations including hand-held hardware units, microprocessor systems, microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers and the like. The embodiments, described herein, can also be practiced in distributed computing environments where tasks are performed by remote processing hardware units that are linked through a computer network.

[0146] In some embodiments, a controller is part of a system, which may be part of the above-described examples. The system includes semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). The system is integrated with electronics for controlling its operation before, during, and afterprocessing of a semiconductor wafer or substrate. The electronics is referred to as the “controller,” which may control various components or subparts of the system. The controller, depending on processing requirements and / or a type of the system, is programmed to control any process disclosed herein, including a delivery of process gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, RF generator settings, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with the system.

[0147] Broadly speaking, in a variety of embodiments, the controller is defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as ASICs, PLDs, one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). The program instructions are instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a process on or for a semiconductor wafer. The operational parameters are, in some embodiments, a part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0148] The controller, in some embodiments, is a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller is in a “cloud” or all or a part of a fab host computer system, which allows for remote access for wafer processing. The controller enables remote access to the system to monitor current progress of fabrication operations, examines a history of past fabrication operations, examines trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process.

[0149] In some embodiments, a remote computer (e.g. a server) provides process recipes to the system over a computer network, which includes a local network or the Internet. The remote computer includes a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of settings for processing a wafer. It should be understood that the settings are specific to a type of process to be performed on a wafer and a type of tool that the controller interfaces with or controls. Thus as described above, thecontroller is distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the fulfilling processes described herein. An example of a distributed controller for such purposes includes one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at a platform level or as part of a remote computer) that combine to control a process in a chamber.

[0150] Without limitation, in various embodiments, a plasma system, described herein, includes a plasma etch chamber, a deposition chamber, a spin-rinse chamber, a metal plating chamber, a clean chamber, a bevel edge etch chamber, a physical vapor deposition (PVD) chamber, a chemical vapor deposition (CVD) chamber, an atomic layer deposition (ALD) chamber, an atomic layer etch (ALE) chamber, an ion implantation chamber, a track chamber, or any other semiconductor processing chamber that is associated or used in fabrication and / or manufacturing of semiconductor wafers.

[0151] It is further noted that although the above-described operations are described with reference to a parallel plate plasma chamber, e.g., a capacitively-coupled plasma (CCP) chamber, etc., in some embodiments, the above-described operations apply to other types of plasma chambers, e.g., a plasma chamber including an inductively coupled plasma (ICP) reactor, a transformer coupled plasma (TCP) reactor, conductor tools, dielectric tools, a plasma chamber including an electron cyclotron resonance (ECR) reactor, etc.

[0152] As noted above, depending on a process operation to be performed by the tool, the controller communicates with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.

[0153] With the above embodiments in mind, it should be understood that some of the embodiments employ various computer-implemented operations involving data stored in computer systems. These computer-implemented operations are those that manipulate physical quantities.

[0154] Some of the embodiments also relate to a hardware unit or an apparatus for performing these operations. The apparatus is specially constructed for a special purpose computer. When defined as a special purpose computer, the computer performs other processing, program execution or routines that are not part of the special purpose, while still being capable of operating for the special purpose.

[0155] In some embodiments, the operations, described herein, are performed by a computer selectively activated, or are configured by one or more computer programs stored in a computer memory, or are obtained over a computer network. When data is obtained over the computer network, the data may be processed by other computers on the computer network, e.g., a cloud of computing resources.

[0156] One or more embodiments, described herein, can also be fabricated as computer-readable code on a non-transitory computer-readable medium. The non-transitory computer-readable medium is any data storage hardware unit, e.g., a memory device, etc., that stores data, which is thereafter read by a computer system. Examples of the non-transitory computer-readable medium include hard drives, network attached storage (NAS), ROM, RAM, compact disc-ROMs (CD-ROMs), CD-recordables (CD-Rs), CD-rewritables (CD-RWs), magnetic tapes and other optical and non-optical data storage hardware units. In some embodiments, the non-transitory computer-readable medium includes a computer-readable tangible medium distributed over a network-coupled computer system so that the computer- readable code is stored and executed in a distributed fashion.

[0157] Although some method operations, described above, were presented in a specific order, it should be understood that in various embodiments, other housekeeping operations are performed in between the method operations, or the method operations are adjusted so that they occur at slightly different times, or are distributed in a system which allows the occurrence of the method operations at various intervals, or are performed in a different order than that described above.

[0158] It should further be noted that in an embodiment, one or more features from any embodiment described above are combined with one or more features of any other embodiment without departing from a scope described in various embodiments described in the present disclosure.

[0159] Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications can be practiced within the scope of appended claims. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein, but may be modified within the scope and equivalents of the appended claims.

Claims

CLAIMS1. An ion energy distribution function (IEDF) control method comprising: receiving a center of an ion energy distribution function; receiving a first extent of an overcompensated spread from the center; receiving a second extent of an undercompensated spread from the center; receiving a first slope of the overcompensated spread; receiving a second slope of the undercompensated spread; identifying, based on the first extent, the second extent, the first slope, and the second slope, a combination of values of ion flux compensation to be achieved using a non- sinusoidal bias (NSB) voltage source; and controlling the NSB voltage source to generate a non-sinusoidal voltage waveform having the combination of values of ion flux compensation.

2. The IEDF control method of claim 1, wherein the first extent includes values of ion energy greater than a value of ion energy at the center, wherein the second extent includes values of ion energy less than the value of ion energy at the center.

3. The IEDF control method of claim 1, wherein the first slope is a positive slope of the overcompensated spread and the second slope is a positive slope of the undercompensated spread.

4. The IEDF control method of claim 1, wherein the first slope is a negative slope of the overcompensated spread and the second slope is a negative slope of the undercompensated spread.

5. The IEDF control method of claim 1, wherein the combination of values include a number of positive slopes of the ion flux compensation, a number of negative slopes of the ion flux compensation, a value of each of the positive slopes, and a value of each of the negative slopes.

6. The IEDF control method of claim 1, wherein the ion flux compensation occurs between a discharging phase of a first radio frequency (RF) cycle and a charging phase of a second RF cycle, wherein the second RF cycle is consecutive to the first RF cycle.

7. The IEDF control method of claim 1, wherein the non-sinusoidal voltage waveform is a square-shaped waveform.

8. An ion energy distribution function (IEDF) controller comprising: a processor configured to: receive a center of an ion energy distribution function;receive a first extent of an overcompensated spread from the center; receive a second extent of an undercompensated spread from the center; receive a first slope of the overcompensated spread; receive a second slope of the undercompensated spread; and identify, based on the first extent, the second extent, the first slope, and the second slope, a combination of values of ion flux compensation to be achieved using a non-sinusoidal bias (NSB) voltage source; and control the NSB voltage source to generate a non-sinusoidal voltage waveform having the combination of values of ion flux compensation; and a memory device coupled to the processor.

9. The IEDF controller of claim 8, wherein the first extent includes values of ion energy greater than a value of ion energy at the center, wherein the second extent includes values of ion energy less than the value of ion energy at the center.

10. The IEDF controller of claim 8, wherein the first slope is a positive slope of the overcompensated spread and the second slope is a positive slope of the undercompensated spread.

11. The IEDF controller of claim 8, wherein the first slope is a negative slope of the overcompensated spread and the second slope is a negative slope of the undercompensated spread.

12. The IEDF controller of claim 8, wherein the combination of values include a number of positive slopes of the ion flux compensation, a number of negative slopes of the ion flux compensation, a value of each of the positive slopes, and a value of each of the negative slopes.

13. The IEDF controller of claim 8, wherein the ion flux compensation occurs between a discharging phase of a first radio frequency (RF) cycle and a charging phase of a second RF cycle, wherein the second RF cycle is consecutive to the first RF cycle.

14. The IEDF controller of claim 8, wherein the non-sinusoidal voltage waveform is a square-shaped waveform.

15. An ion energy distribution function (IEDF) system comprising: a non-sinusoidal bias (NSB) voltage source; a plasma chamber coupled to the NSB voltage source; a computer coupled to the NSB voltage source, wherein the computer is configured to: receive a center of an ion energy distribution function;receive a first extent of an overcompensated spread from the center; receive a second extent of an undercompensated spread from the center; receive a first slope of the overcompensated spread; receive a second slope of the undercompensated spread; and identify, based on the first extent, the second extent, the first slope, and the second slope, a combination of values of ion flux compensation to be achieved using the NSB voltage source; and control the NSB voltage source to generate a non-sinusoidal voltage waveform having the combination of values of ion flux compensation, wherein the plasma chamber is configured to receive the non-sinusoidal voltage waveform.

16. The IEDF system of claim 15, wherein the first extent includes values of ion energy greater than a value of ion energy at the center, wherein the second extent includes values of ion energy less than the value of ion energy at the center.

17. The IEDF system of claim 15, wherein the first slope is a positive slope of the overcompensated spread and the second slope is a positive slope of the undercompensated spread.

18. The IEDF system of claim 15, wherein the first slope is a negative slope of the overcompensated spread and the second slope is a negative slope of the undercompensated spread.

19. The IEDF system of claim 15, wherein the combination of values include a number of positive slopes of the ion flux compensation, a number of negative slopes of the ion flux compensation, a value of each of the positive slopes, and a value of each of the negative slopes.

20. The IEDF system of claim 15, wherein the ion flux compensation occurs between a discharging phase of a first radio frequency (RF) cycle and a charging phase of a second RF cycle, wherein the second RF cycle is consecutive to the first RF cycle.

21. The IEDF system of claim 15, wherein the non-sinusoidal voltage waveform is a square-shaped waveform.

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