Method and device for a chiplet system

Abstract

Method for a chiplet system, the chiplet system including a first chiplet designed to perform a first function and a second chiplet designed to perform a second function, the second function differing from the first function for example, the method comprising: detection of a fault in the second chiplet, for example with regard to the performance of the second function, and at least temporary performance of at least part of the second function by the first chiplet.

Description

[0001] Description

[0002] Method and apparatus for chiplet system

[0003] State of the art

[0004] The disclosure relates to a process for a chiplet system.

[0005] The disclosure also relates to a device for a chiplet system.

[0006] Disclosure of the invention

[0007] Some examples refer to a method, for example a computer-implemented method, for a chiplet system, for example for a vehicle, wherein the chiplet system has a first chiplet configured to perform a first function and a second chiplet configured to perform a second function, wherein, for example, the second function is different from the first function, wherein the method includes: detecting an error of the second chiplet, for example with respect to the execution of the second function, at least temporarily executing at least part of the second function, at least by the first chiplet.

[0008] For example, it is intended that a) the first function includes general calculations, and / or that b) the second function includes calculations for artificial intelligence algorithms, such as machine learning.

[0009] For example, it is envisaged that the first chiplet is manufactured using a first manufacturing technology, such as CMOS technology, while the second chiplet is manufactured using a second manufacturing technology that is different from the first manufacturing technology, such as a manufacturing technology for the production of components for in-memory computing (IMC), for example, analog IMC components.

[0010] For example, the method is designed to include: at least temporary execution of at least part of the second function by at least one further, for example third, chiplet.

[0011] For example, it is planned that the error detection will include diverse error detection methods.

[0012] For example, the method is designed to include: at least temporary interruption of the execution of at least part of the first function by the first chiplet, and at least temporary execution of at least part of the second function by the first chiplet.

[0013] In some examples, instead of at least temporarily interrupting the execution of at least part of the first function by the first chiplet, the interruption can be omitted, so that the first chiplet executes at least part of the second function, for example, in addition to the first function.

[0014] Some examples refer to a method for providing a chiplet system, for example for a vehicle, wherein the chiplet system has at least a first chiplet and a second chiplet, wherein the method includes: specifying functions to be executed by means of the chiplet system, providing several chiplets that can each execute at least part of the functions at least temporarily, assigning the functions to at least one of the chiplets, for example for a first operating mode, assigning at least one function to at least one other chiplet, for example for the at least temporary execution of the at least one function by the at least one other chiplet, for example in the event of an error of the second chiplet, for example with regard to the execution of the second function.

[0015] Some examples relate to a device, for example a chiplet system, for carrying out the method according to the disclosure. Some examples relate to a product, for example a control unit or vehicle computer, comprising at least one device, for example a chiplet system, according to the disclosure.

[0016] Some examples refer to a vehicle, for example a motor vehicle, comprising at least one device, for example a chiplet system, according to the disclosure and / or a product according to the disclosure.

[0017] Some examples refer to a computer-readable storage medium comprising instructions which, when executed by a computer, cause it to perform the procedure according to the disclosure.

[0018] Some examples refer to a computer program, comprising instructions that, when the program is executed by a computer, cause it to perform the procedure according to the disclosure.

[0019] Some examples refer to a data carrier signal that transmits and / or characterizes the computer program according to the disclosure.

[0020] Some examples relate to a use of the method according to the disclosure and / or the device according to the disclosure and / or the product according to the disclosure and / or the vehicle according to the disclosure and / or the computer-readable storage medium according to the disclosure and / or the computer program according to the disclosure and / or the data carrier signal according to the disclosure for at least one of the following elements: a) providing a chiplet system, for example for automotive applications, or b) operating a chiplet system, for example for automotive applications, or c) increasing, for example, functional safety of a chiplet system, or d) enabling decomposition, for example according to ISO 26262, or e) providing a fault tolerance scheme for a chiplet system.

[0021] Further features, applications, and advantages of the disclosure will become apparent from the following description of examples illustrated in the figures of the drawing. All described or illustrated features, individually or in any combination, constitute the subject matter of the disclosure, irrespective of their compilation in the claims or their cross-reference, and irrespective of their formulation or representation in the description or in the drawing.

[0022] The drawing shows:

[0023] Fig. 1 schematically shows a block diagram,

[0024] Fig. 2 schematically shows a flowchart,

[0025] Fig. 3 schematically shows a flowchart

[0026] Fig. 4 schematically shows a flowchart

[0027] Fig. 5 schematically shows a block diagram,

[0028] Fig. 6 schematically shows a block diagram.

[0029] Fig. 7 schematically shows aspects of uses.

[0030] Some examples, e.g. Fig. 1, 2, refer to a method, for example a computer-implemented method, for a chiplet system 100, for example for a vehicle 10 (Fig. 6), wherein the chiplet system 100 has a first chiplet 102-1 (Fig. 1) configured to perform a first function F-1 200 (Fig. 2) and a second chiplet 102-2 configured to perform a second function F-2 202, wherein, for example, the second function F-2 is different from the first function F-1, wherein the method includes: detecting 204 an error ERR of the second chiplet 102-2, for example with respect to the execution of the second function F-2, and at least temporarily executing 206 at least part F-2' of the second function F-2 at least by the first chiplet 102-1, for example when the error ERR has been detected. In some cases, this can increase functional safety by, for example,the part F-2' of the second function F-2 continues to be executed, for example, in full quality or in limited quality, for example by the first chiplet 102-1 , e.g. the arrow A1.

[0031] In some examples, execution 206 shows at least temporary execution of the entire second function F-2 by at least the first chiplet 102-1, for example when the error ERR has been detected.

[0032] In some examples, the chiplets 102-1, 102-2 are connected to each other and / or to other components 102-3 via at least one data connection DV.

[0033] For example, it is intended that a) the first function F-1 includes general calculations, and / or that b) the second function F-2 includes calculations for artificial intelligence (AI) algorithms, such as machine learning.

[0034] For example, the first chiplet 102-1 is designed to be manufactured using a first manufacturing technology, such as CMOS technology, while the second chiplet 102-2 is manufactured using a second manufacturing technology that differs from the first, for example, a manufacturing technology for producing components for in-memory computing. This allows for, for example, structural diversity between the two chiplets 102-1 and 102-2.

[0035] For example, the first chiplet 102-1 has one or more computing cores or processors, e.g. CPUs, and, optionally, a, e.g., comparatively small, AI accelerator device.

[0036] For example, the second chiplet 102-2 has a, for example, comparatively large, AI accelerator device. For example, the AI ​​accelerator device of the second chiplet 102-2 is more powerful than the AI ​​accelerator device of the first chiplet 102-1. For example, the second chiplet 102-2 can have an integrated memory device, for example, static RAM, SRAM, configured for IMC methods. For example, Fig. 2, the method is provided to include: at least the temporary execution 206a of at least part F-2' of the second function F-2 (or, in further examples, the entire second function F-2) by at least one further, for example, third, chiplet 102-3, see arrow A2.

[0037] For example, Fig. 2, it is provided that the detection 204 of the error ERR has a diverse error detection 204a.

[0038] For example, diversity in error detection 204a refers to the use of different, e.g., independent, methods for detecting an error ERR of the second chiplet 102-2. In some examples, this can increase the probability that the error ERR is detected and then, e.g., handled according to the disclosure. In some examples, the diversity in error detection 204a can include one or more of the following approaches: a) different algorithms, e.g., using different error detection algorithms that can detect different types of errors; or b) heterogeneous hardware: using different hardware platforms, architectures, or technologies (e.g., CMOS or IMC technology) to perform the same tasks, e.g., to minimize hardware-related errors; or c) temporal diversity, e.g., performing the same calculations at different times and comparing the results., to detect temporary errors, or d) software diversity, e.g., using different software implementations or versions to perform identical tasks in order to identify software-related errors.

[0039] In some examples, the reliability and robustness of error detection can be increased by combining several of the aforementioned diverse approaches, as different error sources can be covered and detected.

[0040] In some examples, the second chiplet 102-2 is configured to detect the error ERR itself (e.g., in the sense of "self-error detection") and, optionally, to signal the error ERR to at least one other component 102-1, 102-3. For example, see Fig. 3, the method is designed to include: at least temporary interruption 210 of the execution of at least one part F-1' of the first function F-1 by the first chiplet 102-1, and at least temporary execution 212 of at least one part F-2' of the second function F-2 by the first chiplet 102-1. In this way, at least temporarily, for example, a portion of the computing resources of the first chiplet 102-1 can be made available for the at least temporary execution 212 of at least one part F-2' of the second function F-2.

[0041] In some examples, for instance, instead of at least temporarily interrupting 210 the execution of at least one part F-1' of the first function F-1 by the first chiplet 102-1, the interruption 210 can be omitted, so that the first chiplet 102-1 executes at least one part F-2' of the second function F-2, for example, in addition to the first function F-1, possibly using a multitasking method.

[0042] Some examples, Fig. 4, relate to a method for providing a chiplet system 100 (Fig. 1), for example for a vehicle 10 (Fig. 6), wherein the chiplet system 100 has at least a first chiplet 102-1 and a second chiplet 102-2, wherein the method comprises: specifying 250 (Fig. 4) functions F-1, F-2 to be executed by means of the chiplet system 100, providing 252 several chiplets 102-1, 102-2, ..., which can each execute at least part of the functions at least temporarily, and assigning 254 the functions F-1, F-2 to at least one of the chiplets (e.g.Function F-1 to chiplet 102-1, function F-2 to chiplet 102-2), for example for a first operating mode, assigning 256 at least one function F-2 to at least one other chiplet 102-1, for example for the at least temporary execution of the at least one function F-2 by the at least one other chiplet 102-1, for example in the event of an error of the second chiplet 102-1, for example with regard to the execution of the second function F-2. This allows a chiplet system 100 with increased functional safety to be provided.

[0043] Some examples, Fig. 5, relate to a device 300, for example a chiplet system 100 (Fig. 1), for carrying out the method according to the disclosure. In further examples, the device 300 is provided to have: a computing device ("computer") 302 having at least one processing core, a storage device 304 associated with the computing device 302 for at least temporary storage of at least one of the following elements: a) data DAT, b) computer program PRG, for example for carrying out the method according to the disclosure.

[0044] For example, the DAT data is associated with information for the detection of error 204 ERR, and / or with at least one of the functions F-1 , F-2.

[0045] In other examples, the memory device 304 includes volatile memory (e.g., RAM) 304a, and / or non-volatile (NVM) memory (e.g., Flash EEPROM) 304b, or a combination thereof or with other memory types not explicitly mentioned.

[0046] In some examples, the functionality of the device 300 according to Fig. 5 can be realized by means of a chiplet system 100 (Fig. 1), for example by means of various components 102-1 , 102-2, ... of the chiplet system 100.

[0047] Further examples relate to a computer-readable storage medium SM, comprising instructions PRG which, when executed by a computer 302, cause it to execute the method according to the embodiments.

[0048] Further exemplary embodiments relate to a computer program PRG, comprising instructions which, when the program PRG is executed by a computer 302, cause it to execute the method according to the embodiments.

[0049] Further exemplary embodiments relate to a data carrier signal DCS, which characterizes and / or transmits the computer program PRG according to the embodiments. The data carrier signal DCS can be received, for example, via an optional data interface 306 of the device 300. Some examples, Fig. 6, relate to a product, for example, a control unit or vehicle computer 20, comprising at least one device 300 (Fig. 5), for example, a chiplet system (100), according to the disclosure.

[0050] Some examples, Fig. 6, relate to a vehicle, for example a motor vehicle, 10, comprising at least one device 300, for example a chiplet system 100, according to the disclosure and / or a product 20 according to the disclosure.

[0051] Further aspects and examples are described below, which can be combined individually or in combination with at least one of the aspects or examples described above.

[0052] In some examples, the second function F-2 (Fig. 1) can implement one or more aspects of an Advanced Driver Assistance System (ADAS), e.g., one or more ADAS functions, and / or one or more aspects of Automated Driving (AD). Upon detection of an ERR fault in the area of ​​the second chiplet 102-2, in some examples at least a portion of F-2' of the ADAS functions that are executed by the second chiplet 102-2 in the absence of the ERR fault can be executed, at least temporarily, by the first chiplet 102-1. This allows, for example, at least part of the ADAS functionality of the chiplet system 100 to be maintained despite the ERR fault. This can, for example, increase the availability of the chiplet system 100 with regard to functional safety.

[0053] In some examples, Fig. 1, more than two chiplets 102-1, 102-2 can be provided, e.g. the optional third chiplet 102-3, which can, for example, have the functionality of a digital signal processor, and which, analogous to the first chiplet 102-1, can at least temporarily, for example, when an error ERR is detected with respect to the second chiplet 102-2, execute at least part F-2' of the second function F-2.

[0054] In some examples, the principle according to the disclosure is also applicable to chiplet systems with more than two or three chiplets. Some examples, Fig.7, refer to a use 400 of the method according to the disclosure and / or the device 300, 100 according to the disclosure and / or the product 20 according to the disclosure and / or the vehicle 10 according to the disclosure and / or the computer-readable storage medium SM according to the disclosure and / or the computer program PRG according to the disclosure and / or the data carrier signal DCS according to the disclosure for at least one of the following elements: a) providing 401 a chiplet system 100, for example for automotive applications, or b) operating 402 a chiplet system 100, for example for automotive applications, or c) increasing 403 a, for example functional, safety of a chiplet system 100, or d) enabling 404 decomposition, for example according to ISO 26262, or e) providing 405 a fault tolerance scheme for a chiplet system 100.

[0055] In some examples, the principle can also be applied to a system-on-a-chip, according to the revelation.

[0056] In some examples, the principle according to the disclosure allows for diversity with respect to the execution of at least one part F-2' of the second function F-2, e.g. at least temporarily, e.g. in normal operation, execution by the second chiplet 102-2, e.g. at least temporarily, e.g. in fault operation when error ERR is detected, execution by the first chiplet 102-1.

[0057] In some examples, the principle according to the disclosure allows for diversity regarding the detection of error 204 ERR, e.g. by the second chiplet 102-2.

Claims

Claims 1. Method for a chiplet system (100), for example for a vehicle (10), wherein the chiplet system (100) comprises a first chiplet (102-1) configured to perform a first function (F-1) (200) and a second chiplet (102-2) configured to perform a second function (F-2) (202), wherein, for example, the second function (F-2) is different from the first function (F-1), wherein the method comprises: detecting (204) an error (ERR) of the second chiplet (102-2), for example with respect to the execution of the second function (F-2), at least temporarily executing (206) at least a part (F-2') of the second function (F-2) at least by the first chiplet (102-1).

2. Method according to claim 1, wherein a) the first function (F-1) comprises general calculations, and / or wherein b) the second function (F-2) comprises calculations for artificial intelligence algorithms, for example machine learning.

3. Method according to at least one of the preceding claims, wherein the first chiplet (102-1) is manufactured using a first manufacturing technology, for example, CMOS technology, wherein the second chiplet (102-2) is manufactured using a second manufacturing technology which is different from the first manufacturing technology, for example, a manufacturing technology for the production of components for in-memory computing.

4. Method according to at least one of the preceding claims, comprising: at least temporary execution (206a) of at least a part (F-2') of the second function (F-2) by at least one further chiplet (102-3).

5. Method according to at least one of the preceding claims, wherein the detection (204) of the fault (ERR) comprises a diverse fault detection (204a).

6. Method according to at least one of the preceding claims, comprising: at least temporary interruption (210) of an execution of at least one part (F-1 ') of the first function (F-1) by the first chiplet (102-1), at least temporary execution (212) of at least one part (F-2') of the second function (F-2) at least by the first chiplet (102-1).

7. Method for providing a chiplet system (100), for example for a vehicle (10), wherein the chiplet system (100) comprises at least a first chiplet (102-1) and a second chiplet (102-2), the method comprising: specifying (250) functions (F-1, F-2) to be executed by means of the chiplet system (100), providing (252) several chiplets (102-1, 102-2, ...) that can each execute at least part of the functions (F-1, F-2) at least temporarily, and assigning (254) the functions (F-1, F-2) to at least one of the chiplets (102-1, 102-2, ...).), for example for a first operating mode, assigning (256) at least one function (F-2) to at least one other chiplet (102-1), for example for at least temporary execution of the at least one function (F-2) by the at least one other chiplet (102-1), for example in the case of an error (ERR) of the second chiplet (102-2), for example with regard to the execution of the second function (F-2).

8. Device (300), for example chiplet system (100), for carrying out the method according to at least one of the preceding claims.

9. Product (20), for example control unit or vehicle computer, comprising at least one device (300), for example a chiplet system (100), according to claim 8.

10. Vehicle (10), for example motor vehicle, comprising at least one device (300), for example a chiplet system (100), according to claim 8 and / or a product (20) according to claim 9.

11. Computer-readable storage medium (SM) comprising instructions (PRG) which, when executed by a computer (302), cause it to execute the method according to at least one of claims 1 to 7.

12. Computer program (PRG) comprising instructions which, when the program (PRG) is executed by a computer (302), cause it to execute the method according to at least one of claims 1 to 7.

13. Data carrier signal (DCS) that transmits and / or characterizes the computer program (PRG) according to claim 12.

14. Use (400) of the method according to at least one of claims 1 to 7 and / or the device (300; 100) according to claim 8 and / or the product (20) according to claim 9 and / or the vehicle (10) according to claim 10 and / or the computer-readable storage medium (SM) according to claim 11 and / or the computer program (PRG) according to claim 12 and / or the data carrier signal (DCS) according to claim 13 for at least one of the following elements: a) providing (401) a chiplet system (100), for example for automotive applications, or b) operating (402) a chiplet system (100), for example for automotive applications, or c) increasing (403) a, for example functional, safety of a chiplet system (100), or d) enabling (404) decomposition, for example according to ISO 26262, or e) providing (405) of a fault tolerance scheme for a chiplet system (100).

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