Array substrate, display panel, and display apparatus

Abstract

Provided in the present disclosure are an array substrate, a display panel, and a display apparatus. The array substrate comprises a base (11), and a pixel circuit (100P) and a light-emitting element (OEL) that are disposed on the base (11). The pixel circuit (100P) comprises a driving module (10), which is used for driving the light emitting element (OEL) to emit light. The pixel circuit (100P) comprises a plurality of transistors, which comprise a first transistor (101) and a second transistor (102), the thickness of an active portion of the first transistor (101) being less than the thickness of an active portion of the second transistor (102). At least one transistor in the driving module (10) is the second transistor (102), and at least one of the transistors electrically connected to a control end of the driving module (10) is the first transistor (101). The hydrogen content of the surface of the active portion of the first transistor (101) away from the base (11) is greater than the hydrogen content of the surface of the active portion of the second transistor (102) away from the base (11).

Description

Array substrate, display panel and display device Cross-reference to related applications

[0001] This disclosure claims priority to Chinese patent application No. 202410776014.6, filed on June 17, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This disclosure relates to the field of display technology, and to an array substrate, a display panel, and a display device. Background Technology

[0003] OLED (organic light-emitting diode) display panels are commonly used in mobile phones, televisions, and other terminal devices. Among them, AMOLED (active-matrix organic light-emitting diode) display panels are more widely used. AMOLED display panels typically consist of OLED light-emitting elements and pixel circuits used to drive the light-emitting elements to emit light. The pixel circuits include a driving module (or driving transistor). When the light-emitting element emits light, the control terminal of the driving module needs to maintain a certain voltage so that the driving module continuously drives the light-emitting element to emit light.

[0004] However, in the prior art, the transistors in other modules that are electrically connected to the control terminal (or gate of the driving transistor) of the driving module have large leakage currents, which makes the potential stability of the control terminal of the driving module poor. Especially in low-frequency display mode, the control terminal of the driving module needs to maintain a stable voltage for a longer period of time, and leakage current makes the potential stability of the control terminal of the driving module even worse. Summary of the Invention

[0005] This disclosure provides an array substrate, a display panel, and a display device, which can solve the problem in the prior art where the leakage current of transistors in other modules electrically connected to the control terminal (or gate of the driving transistor) of the driving module is large, resulting in poor potential stability of the control terminal of the driving module. This is especially true in low-frequency display modes, where the control terminal of the driving module needs to maintain a stable voltage for a longer period of time, and leakage current further worsens the potential stability of the control terminal of the driving module.

[0006] In a first aspect of this disclosure, an array substrate is provided, including a substrate, and a pixel circuit and a light-emitting element disposed on the substrate. The pixel circuit includes a driving module, a first terminal of which is electrically connected to a first power line, and a second terminal of which is electrically connected to a first electrode of the light-emitting element. The driving module is used to drive the light-emitting element to emit light. The pixel circuit includes a plurality of transistors, including a first transistor and a second transistor. The thickness of the active portion of the first transistor is less than the thickness of the active portion of the second transistor. At least one transistor in the driving module is the second transistor, and at least one of the transistors electrically connected to a control terminal of the driving module is the first transistor. The hydrogen content of the surface of the active portion of the first transistor away from the substrate is greater than the hydrogen content of the surface of the active portion of the second transistor away from the substrate.

[0007] In some embodiments, the difference between the thickness of the active portion of the second transistor and the thickness of the active portion of the first transistor ranges from 15 nanometers to 35 nanometers.

[0008] In some embodiments, the active portion of the first transistor and the active portion of the second transistor are disposed in the same layer and are made of the same material.

[0009] In some embodiments, the active portion of the first transistor and the active portion of the second transistor are both made of polycrystalline silicon or amorphous silicon.

[0010] In some embodiments, the pixel circuit further includes: a data writing module, wherein a first end of the data writing module is electrically connected to a first end of the driving module, and a second end of the data writing module is electrically connected to a data signal line, and the data writing module is used to write an electrical signal from the data signal line to the first end of the driving module; a storage module, wherein the storage module is electrically connected to a control end of the driving module, and is used to maintain the potential of the control end of the driving module; a compensation module, wherein a first end of the compensation module is electrically connected to the control end of the driving module, and a second end of the compensation module is electrically connected to at least one of the first end and the second end of the driving module; and a first light emission control module, wherein the driving module is electrically connected to the first power line or the light-emitting element through the first light emission control module, and the first light emission control module is used to control the light-emitting element to emit light.

[0011] In some embodiments, the pixel circuit further includes: a first initialization module, a first terminal of the first initialization module being electrically connected to the control terminal of the driving module, a second terminal of the first initialization module being electrically connected to a first initialization signal line, the first initialization module being used to provide an electrical signal from the first initialization signal line to the control terminal of the driving module; wherein, at least one transistor in the compensation module and the first initialization module is the first transistor.

[0012] In some embodiments, the driving module is electrically connected to the first power line through the first light-emitting control module, and the pixel circuit further includes a second light-emitting control module. The driving module is electrically connected to the light-emitting element through the second light-emitting control module, and the second light-emitting control module is used to control the light-emitting element to emit light.

[0013] In some embodiments, the pixel circuit further includes: a second initialization module, a first terminal of the second initialization module being electrically connected to the first electrode of the light-emitting element, a second terminal of the second initialization module being electrically connected to a second initialization signal line, and the second initialization module being used to provide an electrical signal from the second initialization signal line to the first electrode of the light-emitting element.

[0014] In some embodiments, all the transistors in the compensation module and the first initialization module are the first transistors, and all the transistors in the driving module, the data writing module, the first light-emitting control module, the second light-emitting control module, and the second initialization module are the second transistors.

[0015] In some embodiments, the driving module includes a driving transistor, the first electrode of which is electrically connected to the first power line, and the second electrode of which is electrically connected to the first electrode of the light-emitting element; the data writing module includes a data writing transistor, the first electrode of which is electrically connected to the first electrode of the driving transistor, the second electrode of which is electrically connected to the data signal line, and the gate of which is electrically connected to the first scan signal line; the compensation module includes a compensation transistor, the first electrode of which is electrically connected to the gate of the driving transistor, the second electrode of which is electrically connected to the second electrode of the driving transistor, and the gate of which is electrically connected to the second scan signal line; the storage module includes a storage capacitor, the first plate of which is electrically connected to the first power line, and the second plate of which is electrically connected to the gate of the driving transistor; the first initialization module includes a first initialization transistor, the first electrode of which is electrically connected to the gate of the driving transistor, and the first initialization crystal... The second electrode of the transistor is electrically connected to the first initialization signal line, and the gate of the first initialization transistor is electrically connected to the first initialization control signal line; the second initialization module includes a second initialization transistor, the first electrode of the second initialization transistor is electrically connected to the first electrode of the light-emitting element, the second electrode of the second initialization transistor is electrically connected to the second initialization signal line, and the gate of the second initialization transistor is electrically connected to the second initialization control signal line; the first light-emitting control module includes a first light-emitting control transistor, the first electrode of the first light-emitting control transistor is electrically connected to the first power supply line, the second electrode of the first light-emitting control transistor is electrically connected to the first electrode of the driving transistor, and the gate of the first light-emitting control transistor is electrically connected to the first light-emitting control signal line; the second light-emitting control module includes a second light-emitting control transistor, the first electrode of the second light-emitting control transistor is electrically connected to the second electrode of the driving transistor, the second electrode of the second light-emitting control transistor is electrically connected to the first electrode of the light-emitting element, and the gate of the second light-emitting control transistor is electrically connected to the second light-emitting control signal line.

[0016] In some implementations, in the same pixel circuit, both the compensation transistor and the first initialization transistor are first transistors, and the compensation transistor and the first initialization transistor are arranged directly adjacent to each other.

[0017] In a second aspect of this disclosure, a display panel is provided, including the array substrate provided in the first aspect above.

[0018] In a third aspect of this disclosure, a display device is provided, including the display panel provided in the second aspect above. Attached Figure Description

[0019] Figure 1 is a schematic diagram of a portion of the film layer of an array substrate according to some embodiments of the present disclosure;

[0020] Figure 2 is a block diagram of a pixel circuit provided in some embodiments of this disclosure;

[0021] Figure 3 is a detailed schematic diagram of a pixel circuit provided in some embodiments of this disclosure;

[0022] Figure 4 is a schematic layout diagram of a pixel circuit provided in some embodiments of this disclosure;

[0023] Figure 5 is a flowchart of a method for manufacturing an array substrate according to some embodiments of this disclosure;

[0024] Figure 6 is a flowchart of a method for manufacturing an array substrate according to other embodiments of this disclosure;

[0025] Figure 7 is a schematic diagram of the process of plasma processing of the active part of the first transistor provided in some embodiments of this disclosure. Detailed Implementation

[0026] To better understand the technical solutions provided in the embodiments of this specification, the technical solutions of the embodiments of this specification will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of this specification and the specific features in the embodiments are detailed descriptions of the technical solutions of the embodiments of this specification, rather than limitations on the technical solutions of this specification. In the absence of conflict, the embodiments of this specification and the technical features in the embodiments can be combined with each other.

[0027] In this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The term "two or more" includes two or more cases.

[0028] In the prior art, the leakage current of transistors in other modules that are electrically connected to the control terminal (or gate of the driving transistor) of the driving module is relatively large, which makes the potential stability of the control terminal of the driving module poor. Especially in low-frequency display mode, the control terminal of the driving module needs to maintain a stable voltage for a longer period of time, and the leakage current makes the potential stability of the control terminal of the driving module even worse.

[0029] In view of this, the present disclosure provides an array substrate, a display panel, and a display device that can solve the above-mentioned problems.

[0030] This disclosure provides an array substrate, which includes a substrate and a pixel circuit and a light-emitting element disposed on the substrate. The pixel circuit includes a driving module, a first terminal of which is electrically connected to a first power line, and a second terminal of which is electrically connected to a first electrode of the light-emitting element. The driving module is used to drive the light-emitting element to emit light. The pixel circuit includes a plurality of transistors, which include a first transistor and a second transistor. The thickness of the active portion of the first transistor is less than the thickness of the active portion of the second transistor. At least one transistor in the driving module is a second transistor, and at least one transistor electrically connected to the control terminal of the driving module is a first transistor. The hydrogen content of the surface of the active portion of the first transistor away from the substrate is greater than the hydrogen content of the surface of the active portion of the second transistor away from the substrate.

[0031] This disclosure also provides a display panel including the above-described array substrate.

[0032] This disclosure also provides a display device including the above-described array substrate and / or the above-described display panel.

[0033] Please refer to Figures 1 to 3. Figure 1 is a schematic diagram of a portion of the film layer of an array substrate according to some embodiments of the present disclosure; Figure 2 is a block diagram of a pixel circuit provided in some embodiments of the present disclosure; Figure 3 is a detailed schematic diagram of a pixel circuit provided in some embodiments of the present disclosure.

[0034] This disclosure provides an array substrate 100, which includes a substrate 11, a pixel circuit 100P, and a light-emitting element OEL disposed on the substrate 11. The pixel circuit 100P includes a driving module 10, a first terminal of which is electrically connected to a first power line VDD, and a second terminal of which is electrically connected to a first electrode of the light-emitting element OEL. The driving module 10 is used to drive the light-emitting element OEL to emit light. The pixel circuit 100P includes a plurality of transistors, including a first transistor 101 and a second transistor 102. The thickness of the active portion of the first transistor 101 is less than the thickness of the active portion of the second transistor 102. At least one transistor in the driving module 10 is the second transistor 102, and at least one transistor electrically connected to the control terminal of the driving module 10 is the first transistor 101. The hydrogen content of the surface of the active portion of the first transistor 101 away from the substrate 11 is greater than the hydrogen content of the surface of the active portion of the second transistor 102 away from the substrate 11.

[0035] For example, the material of the substrate 11 can be glass, or it can be polyimide, but it is not limited thereto.

[0036] For example, as shown in FIG1, the first transistor 101 includes a first active portion 131, a first gate 151, a first source 191, and a first drain 192. The second transistor 102 includes a second active portion 132, a second gate 152, a second source 193, and a second drain 194. In the direction perpendicular to the plane of the substrate 11, the thickness of the first active portion 131 is less than the thickness of the second active portion 132. As illustrated in FIG7, the thickness of the first active portion 131 is a first thickness h1, and the thickness of the second active portion 132 is a second thickness h2, where the first thickness h1 is less than the second thickness h2.

[0037] For example, the driving module 10 is used to drive the light-emitting element OEL to emit light. Therefore, the transistors in the driving module 10 need to have high mobility to improve the driving capability of the light-emitting element OEL and achieve fine control of grayscale. Therefore, at least one transistor in the driving module 10 is set as the second transistor 102 so that the driving module 10 maintains a strong driving capability of the light-emitting element OEL.

[0038] For example, when the light-emitting element OEL emits light, the control terminal of the driving module 10 needs to maintain a certain voltage so that the driving module 10 continuously drives the light-emitting element to emit light. Therefore, at least one of the transistors electrically connected to the control terminal of the driving module 10 is a first transistor 101. The thickness of the first transistor 101 is reduced (thinned), which reduces the leakage path of the first transistor 101 and increases the leakage resistance of the first transistor 101, thereby reducing the leakage of the transistor electrically connected to the control terminal of the driving module 10, thereby improving the potential stability of the control terminal of the driving module 10.

[0039] For example, the hydrogen content of the active portion of the first transistor 101 on the surface away from the substrate 11 is greater than the hydrogen content of the active portion of the second transistor 102 on the surface away from the substrate 11. This can be achieved by performing plasma treatment on the active portion of the first transistor 101, for example, by performing plasma treatment on the active portion of the first transistor 101 with hydrogen, but not by performing plasma treatment on the active portion of the second transistor 102.

[0040] For example, taking polysilicon as the material of the active part of the first transistor 101, plasma treatment of the active part of the first transistor 101 can passivate silicon dangling bonds, reduce the level of deep-level defects, reduce leakage current caused by defect-assisted tunneling, reduce the number of defects in the active part of the first transistor 101, and thus further reduce the leakage current of the first transistor 101.

[0041] For example, in some implementations, the first transistor 101 is a switching transistor and the second transistor 102 is a driving transistor.

[0042] For example, in some embodiments, after the first transistor 101 (switching transistor) is thinned to a certain extent, more defects are generated in the active part of the first transistor 101 (switching transistor) due to the etching and other processes. By using hydrogen plasma treatment (H plasma process) to optimize the defects, the leakage current of the first transistor 101 (switching transistor) is reduced better.

[0043] In some embodiments of this disclosure, at least one transistor in the driving module 10 is a second transistor 102, and at least one of the transistors electrically connected to the control terminal of the driving module 10 is a first transistor 101. The thickness of the active portion of the first transistor 101 is less than the thickness of the active portion of the second transistor 102. The active portion of the second transistor 102 is thicker, which can maintain high mobility and ensure the strong driving capability of the driving module 100 for the light-emitting element OEL. The reduction in the thickness (thinning) of the first transistor 101 reduces the leakage path of the first transistor 101 and increases the leakage resistance of the first transistor 101, thereby reducing the leakage of the transistor electrically connected to the control terminal of the driving module 10. This can improve the potential stability of the control terminal of the driving module 10, especially in low-frequency display mode, the control terminal of the driving module 100 can maintain a stable voltage for a longer time, greatly improving the potential stability of the control terminal of the driving module 100. Meanwhile, when the first transistor 101 (switching transistor) is thinned to a certain extent, more defects are generated in the active part of the first transistor 101 (switching transistor) due to etching and other processes. At this time, hydrogen plasma treatment is used to optimize the defects, so that the hydrogen content of the active part of the first transistor 101 away from the substrate 11 is greater than the hydrogen content of the active part of the second transistor 102 away from the substrate 11, thereby achieving a better effect of reducing leakage current of the first transistor 101 (switching transistor).

[0044] In some embodiments, the thickness difference between the active portion of the second transistor 102 and the active portion of the first transistor 101 is 15 nanometers to 35 nanometers.

[0045] For example, if the difference between the second thickness h1 and the first thickness h1 is greater than or equal to 15 nanometers and less than or equal to 35 nanometers, the leakage current of the first transistor 101 can be appropriately reduced while ensuring the current magnitude when the first transistor 101 is turned on.

[0046] In some embodiments, the active portion of the first transistor 101 and the active portion of the second transistor 102 are disposed on the same layer and are made of the same material. The active portions of the first transistor 101 and the second transistor 102 can be manufactured by using the same material and at least some of the same process steps, thereby reducing the manufacturing process steps and material usage requirements of the array substrate 100.

[0047] In some embodiments, the active portion of the first transistor 101 and the active portion of the second transistor 102 are both made of polycrystalline silicon or amorphous silicon.

[0048] For example, in some embodiments, the active portion of the first transistor 101 and the active portion of the second transistor 102 are both made of polycrystalline silicon; in other embodiments, the active portion of the first transistor 101 and the active portion of the second transistor 102 are both made of amorphous silicon.

[0049] It should be noted that in some other examples, the active part of the first transistor 101 can be made of amorphous silicon, and the active part of the second transistor 102 can be made of polycrystalline silicon. Polycrystalline silicon has a high charge mobility, which can ensure the strong driving capability of the driving module 10 to the light-emitting element OEL. Setting the active part of the first transistor 101 to be made of amorphous silicon and having a smaller thickness can reduce the leakage current of the first transistor 101 and increase the leakage resistance of the first transistor 101, thereby improving the stability of the potential at the control terminal of the driving module.

[0050] It should be noted that, in some other examples, the active part of the first transistor 101 may be made of metal oxide semiconductor material.

[0051] It should be noted that in the film layer of the array substrate 100 in the example of FIG1, the array substrate 100 includes: a substrate 11, a buffer layer 12 disposed on the substrate 11, a semiconductor layer 13 disposed on the buffer layer 12, a gate insulating layer 14 disposed on the semiconductor layer 13, a gate metal layer 15 disposed on the gate insulating layer 14, a first metal layer 17 disposed on the gate metal layer 15, a planarization layer 18 disposed on the first metal layer 17, and a second metal layer 19 disposed on the planarization layer. Semiconductor layer 13 includes the active portion (first active portion 131) of first transistor 101 and the active portion (second active portion 132) of second transistor 102; gate metal layer 15 includes the first gate 151 of first transistor 101 and the second gate 152 of second transistor 102; second metal layer 19 includes the first source 191 and the first drain 192 of first transistor 101, and the second source 193 and the second drain 194 of second transistor 102; gate metal layer 15 includes one electrode (first electrode 153) including storage capacitor Cst, and first metal layer 17 includes the other electrode (second electrode 171) of storage capacitor Cst. However, the film structure of array substrate 100 is not limited to the case illustrated in FIG1. ​​For example, array substrate 100 may not include the first metal layer 17, and array substrate 100 may include a third metal layer disposed on the side of second metal layer 19 away from substrate 11.

[0052] In some embodiments, as shown in Figures 2 and 3, the pixel circuit 100P further includes a data writing module 20, a storage module 30, a compensation module 40, and a first light emission control module 50.

[0053] The first end of the data writing module 20 is electrically connected to the first end of the drive module 10, and the second end of the data writing module 20 is electrically connected to the data signal line Da. The data writing module 20 is used to write the electrical signal of the data signal line Da to the first end of the drive module 10.

[0054] The storage module 30 is electrically connected to the control terminal of the drive module 10 and is used to maintain the potential of the control terminal of the drive module 10.

[0055] The first end of the compensation module 40 is electrically connected to the control end of the drive module 10, and the second end of the compensation module 40 is electrically connected to at least one of the first end and the second end of the drive module 10.

[0056] The driving module 10 is electrically connected to the first power line VDD or the light-emitting element OEL through the first light-emitting control module 50. The first light-emitting control module 50 is used to control the light-emitting element OEL to emit light.

[0057] For example, in some implementations, the second end of the compensation module 40 is electrically connected to the first end of the drive module 10. In other implementations, the second end of the compensation module 40 is electrically connected to the second end of the drive module 10.

[0058] For example, in some implementations, the driving module 10 is electrically connected to the first power line VDD via the first light-emitting control module 50, that is, the first light-emitting control module 50 is electrically connected between the first power line VDD and the driving module 10. In other implementations, the driving module 10 is electrically connected to the light-emitting element OEL via the first light-emitting control module 50, that is, the first light-emitting control module 50 is electrically connected between the light-emitting element OEL and the driving module 10.

[0059] In some embodiments, as shown in FIG2 and FIG3, the pixel circuit 100P further includes a first initialization module 60. The first terminal of the first initialization module 60 is electrically connected to the control terminal of the driving module 10, and the second terminal of the first initialization module 60 is electrically connected to the first initialization signal line Vinit1. The first initialization module 60 is used to provide an electrical signal of the first initialization signal line Vinit1 to the control terminal of the driving module 10. In this embodiment, at least one transistor in the compensation module 40 and the first initialization module 60 is a first transistor 101.

[0060] In some embodiments, as shown in Figures 2 and 3, the driving module 10 is electrically connected to the first power line VDD through the first light-emitting control module 50, and the pixel circuit 100P further includes a second light-emitting control module 70. The driving module 10 is electrically connected to the light-emitting element OEL through the second light-emitting control module 70, and the second light-emitting control module 70 is used to control the light-emitting element OEL to emit light.

[0061] In some embodiments, as shown in FIG2 and FIG3, the pixel circuit 100P further includes a second initialization module 80. The first end of the second initialization module 80 is electrically connected to the first electrode of the light-emitting element OEL, and the second end of the second initialization module 80 is electrically connected to the second initialization signal line Vinit2. The second initialization module 80 is used to provide an electrical signal of the second initialization signal line Vinit2 to the first electrode of the light-emitting element OEL.

[0062] In some embodiments, as shown in Figures 2 and 3, all transistors in the compensation module 40 and the first initialization module 60 are first transistors 101, and all transistors in the driving module 10, the data writing module 20, the first light-emitting control module 50, the second light-emitting control module 70, and the second initialization module 80 are second transistors 102.

[0063] For example, the compensation module 40 and the first initialization module 60 are electrically connected to the control terminal of the drive module 10. Setting all transistors in the compensation module 40 and the first initialization module 60 to be first transistors 101 can better improve the potential stability of the control terminal of the drive module 10 when the light-emitting element OEL emits light.

[0064] For example, all transistors in the driver module 10, data writing module 20, first light-emitting control module 50, second light-emitting control module 70, and second initialization module 80 are second transistors 102, which can better improve the mobility of transistors in these modules, thereby improving the working performance of transistors in these modules.

[0065] In some embodiments, as shown in FIG2 and FIG3, the driving module 10 includes a driving transistor T3, the first electrode of the driving transistor T3 is electrically connected to the first power supply line VDD, and the second electrode of the driving transistor T3 is electrically connected to the first electrode of the light-emitting element OEL.

[0066] The data writing module 20 includes a data writing transistor T4, the first electrode of the data writing transistor T4 is electrically connected to the first electrode of the driving transistor T3, the second electrode of the data writing transistor T4 is electrically connected to the data signal line Da, and the gate of the data writing transistor T4 is electrically connected to the first scan signal line Ge1.

[0067] The compensation module 40 includes a compensation transistor T2, the first electrode of the compensation transistor T2 is electrically connected to the gate of the driving transistor T3, the second electrode of the compensation transistor T2 is electrically connected to the second electrode of the driving transistor T3, and the gate of the compensation transistor T2 is electrically connected to the second scan signal line Ge2.

[0068] The storage module 30 includes a storage capacitor Cst, the first plate of which is electrically connected to the first power supply line VDD, and the second plate of which is electrically connected to the gate of the driving transistor T3.

[0069] The first initialization module 60 includes a first initialization transistor T1, the first electrode of the first initialization transistor T1 is electrically connected to the gate of the driving transistor T3, the second electrode of the first initialization transistor T1 is electrically connected to the first initialization signal line Vinit1, and the gate of the first initialization transistor T1 is electrically connected to the first initialization control signal line Re1.

[0070] The second initialization module 80 includes a second initialization transistor T7, the first electrode of the second initialization transistor T7 is electrically connected to the first electrode of the light-emitting element OEL, the second electrode of the second initialization transistor T7 is electrically connected to the second initialization signal line Vinit2, and the gate of the second initialization transistor T7 is electrically connected to the second initialization control signal line Re2.

[0071] The first light-emitting control module 50 includes a first light-emitting control transistor T5, the first electrode of the first light-emitting control transistor T5 is electrically connected to the first power supply line VDD, the second electrode of the first light-emitting control transistor T5 is electrically connected to the first electrode of the driving transistor T3, and the gate of the first light-emitting control transistor T5 is electrically connected to the first light-emitting control signal line EM1.

[0072] The second light-emitting control module 70 includes a second light-emitting control transistor T6. The first electrode of the second light-emitting control transistor T6 is electrically connected to the second electrode of the driving transistor T3. The second electrode of the second light-emitting control transistor T6 is electrically connected to the first electrode of the light-emitting element OEL. The gate of the second light-emitting control transistor T6 is electrically connected to the second light-emitting control signal line EM2.

[0073] It should be noted that in this disclosure, when the transistor is a thin-film transistor or a field-effect transistor, the transistor includes a gate, a source, and a drain. In schematic diagram 3, the upper part is the first terminal of the transistor and the lower part is the second terminal, or the left side of the schematic diagram is the first terminal of the transistor and the right side is the second terminal. The first terminal of the transistor is one of the source and drain of the transistor, and the second terminal of the transistor is the other of the source and drain of the transistor. Moreover, depending on the setting of high and low levels in the specific circuit and the different types and characteristics of the transistors, the source and drain of each transistor can be completely or partially interchanged. This is easily implemented by those skilled in the art according to the specific application scenario, and will not be elaborated here.

[0074] Please refer to Figures 2 and 3. The following uses Figures 2 and 3 as examples to illustrate the working stages of the pixel circuit 100P.

[0075] During the initialization phase S1, the first initialization module 60, under the control of the first initialization control signal line Re1, provides the electrical signal of the first initialization signal line Vinit1 to the control terminal of the drive module 10 to initialize the control terminal of the drive module 10. That is, the first initialization transistor T1 is turned on under the control of the first initialization control signal line Re1, and provides the electrical signal of the first initialization signal line Vinit1 to the gate of the drive transistor T3 to initialize the gate of the drive transistor T3.

[0076] In some examples, during the initialization phase S1, simultaneously, the second initialization module 80, under the control of the second initialization control signal line Re2, provides an electrical signal of the second initialization signal line Vinit2 to the first electrode of the light-emitting element OEL to initialize the first electrode of the light-emitting element OEL. That is, the second initialization transistor T7 is turned on under the control of the second initialization control signal line Re2, providing an electrical signal of the second initialization signal line Vinit2 to the first electrode of the light-emitting element OEL to initialize the first electrode of the light-emitting element OEL.

[0077] During the data writing stage S2 (or threshold voltage compensation stage), under the control of the first scan signal line Ge1, the data writing module 20 writes the electrical signal of the data signal line Da to one end (first end) of the driving module 10, and the driving module 10 is turned on. Under the control of the second scan signal line Ge2, the compensation module 40 is turned on. The electrical signal of the data signal line Da is transmitted to the control terminal of the driving module 10 through the data writing module 20, the driving module 10, and the compensation module 40. That is, under the control of the first scan signal line Ge1, the data writing transistor T4 writes the electrical signal of the data signal line Da to one end (first end) of the driving transistor T3, and the driving transistor 10 is turned on. Under the control of the second scan signal line Ge2, the compensation transistor T2 is turned on. The data writing transistor T4, the driving transistor T3, and the compensation transistor T2 are turned on, and the electrical signal of the data signal line Da is transmitted to the gate of the driving transistor T3.

[0078] During the light-emitting stage S3, the first light-emitting control module 50 is turned on under the control of the first light-emitting control signal line EM1, and the second light-emitting control module 70 is turned on under the control of the second light-emitting control signal line EM2. At this time, the storage module 30 keeps the driving module 10 on (the storage capacitor Cst keeps the driving transistor T3 on). The electrical signal of the first power supply signal line VDD is transmitted to the first electrode of the light-emitting element OEL through the first light-emitting control module 50, the driving module 10, and the second light-emitting control module 70, causing the light-emitting element OEL to emit light. That is, the first light-emitting control transistor T5 is turned on under the control of the first light-emitting control signal line EM1, and the second light-emitting control transistor T6 is turned on under the control of the second light-emitting control signal line EM2. At this time, the storage capacitor Cst keeps the driving transistor T3 on (the storage capacitor Cst keeps the potential of the gate of the driving transistor T3). The electrical signal of the first power supply signal line VDD is transmitted to the first electrode of the light-emitting element OEL through the first light-emitting control transistor T5, the driving transistor T3, and the second light-emitting control transistor T6, causing the light-emitting element OEL to emit light.

[0079] For example, in the light-emitting stage S3, at least one of the transistors electrically connected to the control terminal of the driving module 10 is a first transistor 101. The thickness of the active portion of the first transistor 101 is less than the thickness of the active portion of the second transistor 102. The active portion of the second transistor 102 is thicker, which can maintain high mobility and ensure the strong driving capability of the driving module 100 to the light-emitting element OEL. The reduction in the thickness of the first transistor 101 (thinning) reduces the leakage path of the first transistor 101 and increases the leakage resistance of the first transistor 101, thereby reducing the leakage of the transistor electrically connected to the control terminal of the driving module 10. This can improve the potential stability of the control terminal of the driving module 10. Especially in the low-frequency display mode, the control terminal of the driving module 100 can maintain a stable voltage for a longer time, which greatly improves the potential stability of the control terminal of the driving module 100.

[0080] It should be noted that in the various working stages of the pixel circuit 100P described above, the working process of the pixel circuit 100P is illustrated by the pixel circuit 100P exemplified in Figures 2 and 3, or the function of each module / transistor is further explained. However, the working process of the pixel circuit 100P is not limited to the above examples. For example, the pixel circuit 100P may also include other working stages before the light emission stage S3. For example, the initialization stage S1 includes a first initialization stage and a second initialization stage. In the first initialization stage, the first initialization module 60 initializes the control terminal of the driving module 10, and in the second initialization stage, the second initialization module 80 initializes the first electrode of the light emission element OEL.

[0081] It should be noted that, in some embodiments of this disclosure, the pixel circuit 10P may include some of the following modules: data writing module 20, compensation module 40, storage module 30, first initialization module 60, second initialization module 80, first light emission control module 50, and second light emission control module 70. For example, the pixel circuit 10P may include one of the first initialization module 60 and the second initialization module 80, but not the other one.

[0082] It should be noted that in some embodiments of this disclosure, the pixel circuit 100P may include some of the following modules: data writing module 20, compensation module 40, storage module 30, first initialization module 60, second initialization module 80, first light emission control module 50, and second light emission control module 70. In this case, the working stages of the pixel circuit 100P are not limited to the three methods described above: initialization stage S1, data writing stage S2, and light emission stage S3.

[0083] It should be noted that the light-emitting element (OEL) can be a light-emitting device in an organic light-emitting diode (OLED) display panel, or it can be a light-emitting device in other types of display panels. For example, the OEL can be a light-emitting unit in a micro LED display panel. The first electrode of the OEL can be the anode of the light-emitting device. The OEL also includes a cathode, which is electrically connected to the cathode signal line VSS, but the structure of the OEL is not limited to this.

[0084] Please refer to Figure 4, which is a schematic layout diagram of a pixel circuit provided in some embodiments of this disclosure.

[0085] In some embodiments, in the same pixel circuit, the compensation transistor T2 and the first initialization transistor T1 are both first transistors 101, and the compensation transistor T2 and the first initialization transistor T1 are directly adjacent to each other.

[0086] For example, in the same pixel circuit, the compensation transistor T2 and the first initialization transistor T1 are directly adjacent to each other, meaning that there is no second transistor 102 (e.g., the second transistor 102 of other modules) between the compensation transistor T2 and the first initialization transistor T1. During the manufacturing process of the array substrate 100, after the active part of the first transistor 101 and the active part of the second transistor 102 are patterned in the same process step, a photoresist layer needs to be formed to protect the active part of the second transistor 102. The photoresist layer includes a first opening that exposes the active part of the first transistor 101. The thickness of the active part of the first transistor 101 is reduced by etching or other processes to form an active part of the first transistor 101 with a preset thickness. When there is no second transistor 102 between the compensation transistor T2 and the first initialization transistor T1 in the same pixel circuit, the size of the first opening of the photoresist layer can be set to be larger. One first opening can expose the active parts of the compensation transistor T2 and the first initialization transistor T1 in the same pixel circuit at the same time, reducing the requirements for the fineness of the photomask and the fineness of the process, which helps to improve the process stability and the yield of the array substrate manufacturing.

[0087] In some other embodiments, the compensation transistor T2 and the first initialization transistor T1 are both first transistors 101. The compensation transistor T2 includes a first sub-compensation transistor T21 and a second sub-compensation transistor T22 connected in series. The first initialization transistor T1 includes a first sub-initialization transistor T11 and a second initialization transistor T12 connected in series.

[0088] For example, by setting both the compensation transistor T2 and the first initialization transistor T1 to include two sub-transistors connected in series, the resistance value on the leakage path of the compensation transistor T2 and the first initialization transistor T1 can be increased, thereby reducing the leakage current of the compensation transistor T2 and the first initialization transistor T1, which can better improve the potential stability of the gate of the driving transistor T3.

[0089] Please refer to Figure 5, which is a flowchart of a method for manufacturing an array substrate provided in some embodiments of this disclosure.

[0090] This disclosure also provides a method for manufacturing an array substrate, wherein any of the array substrates described above can be manufactured using this method.

[0091] The method for manufacturing the array substrate includes steps S100, S200, and S300.

[0092] S100, a substrate 11 is provided, on which a semiconductor layer 13 is formed.

[0093] S200, the active portion (first active portion 131) of the first transistor 101 and the active portion (second active portion 132) of the second transistor 102 are formed by at least partially identical processes, wherein the thickness of the active portion of the first transistor 101 is less than the thickness of the active portion of the second transistor 102.

[0094] For example, the active portions of the first transistor 101 and the second transistor 102 with different thicknesses can be formed by a half-grayscale photomask process, wherein the thickness of the active portion of the first transistor 101 is less than the thickness of the active portion of the second transistor 102.

[0095] For example, in some other embodiments, the corresponding pattern of the active portion of the first transistor 101 and the active portion of the second transistor 102 can be formed first using the same photomask and the same process. Then, the active portion of the second transistor 102 can be protected by recoating a photoresist layer, the photoresist layer including a first opening that exposes the active portion of the first transistor 101. The corresponding pattern of the active portion of the first transistor 101 can be further etched and thinned to form a predetermined thickness of the active portion of the first transistor 101.

[0096] S300, forming a first gate 151 of the first transistor 101 and a second gate 152 of the second transistor 102, and forming a first source 191 and a first drain 192 of the first transistor 101, and a second source 193 and a second drain 194 of the second transistor 102.

[0097] Please refer to Figures 6 and 7. Figure 6 is a flowchart of a method for manufacturing an array substrate according to some embodiments of the present disclosure; Figure 7 is a schematic diagram of a process for plasma processing of the active portion of a first transistor according to some embodiments of the present disclosure.

[0098] In some embodiments, as shown in FIG6, the method for manufacturing an array substrate includes steps S100, S200, S400 and S300, that is, after step S200 and before step S400, the method for manufacturing an array substrate further includes step S400.

[0099] S400 only performs plasma processing on the active portion of the first transistor 101.

[0100] For example, as shown in FIG7, the active portion of the first transistor 101 is subjected to plasma treatment, but the active portion of the second transistor 102 is not subjected to plasma treatment.

[0101] For example, the active part of the first transistor 101 can be plasma-treated using hydrogen plasma (H+).

[0102] For example, a photoresist layer can be applied first to protect the active portion of the second transistor 102, and then the active portion of the first transistor 101 can be subjected to hydrogen plasma treatment.

[0103] This disclosure also provides a display panel, the display panel including the array substrate 100 of any of the above, and / or the display panel including the pixel circuit 100P of any of the above.

[0104] For example, the display panel can be an organic light-emitting display panel (OLED), a micro light-emitting diode display panel (Micro LED display panel), etc., but is not limited to these.

[0105] This disclosure also provides a display device, the display device including an array substrate 100 of any of the above, or / and the display device including a pixel circuit 100P of any of the above, or / and the display device including a display panel of any of the above.

[0106] For example, the display device can be a mobile phone, a laptop, a television, etc.

[0107] In the array substrate, display panel, and display device provided in some embodiments of this disclosure, at least one transistor in the driving module is a second transistor, and at least one transistor electrically connected to the control terminal of the driving module is a first transistor. The thickness of the active portion of the first transistor is smaller than the thickness of the active portion of the second transistor, and the active portion of the second transistor is thicker. This can maintain high mobility and ensure the strong driving capability of the driving module for the light-emitting element. Reducing the thickness (thinning) of the first transistor reduces the leakage path of the first transistor and increases the leakage resistance of the first transistor, thereby reducing the leakage of the transistor electrically connected to the control terminal of the driving module. This can improve the potential stability of the control terminal of the driving module, especially in low-frequency display modes, where the control terminal of the driving module can maintain a stable voltage for a longer period of time, greatly improving the potential stability of the control terminal of the driving module. Meanwhile, when the first transistor is thinned to a certain extent, more defects are generated in the active part of the first transistor due to etching and other processes. At this time, hydrogen plasma treatment is used to optimize the defects, so that the hydrogen content of the active part of the first transistor away from the substrate is greater than that of the active part of the second transistor away from the substrate, thus achieving a better effect of reducing leakage current of the first transistor.

[0108] It should be noted that the descriptions of each embodiment in the above embodiments have different focuses. For parts that are not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0109] The above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit it. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure.

[0110] Although preferred embodiments have been described in this specification, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this specification.

[0111] Obviously, those skilled in the art can make various modifications and variations to this specification without departing from its spirit and scope. Therefore, if such modifications and variations fall within the scope of the claims and their equivalents, this specification is also intended to include such modifications and variations.

Claims

1. An array substrate, comprising a substrate, and pixel circuitry and light-emitting elements disposed on the substrate, the pixel circuitry comprising: A driving module, wherein a first end of the driving module is electrically connected to a first power line, and a second end of the driving module is electrically connected to the first electrode of the light-emitting element, and the driving module is used to drive the light-emitting element to emit light; The pixel circuit includes multiple transistors, including a first transistor and a second transistor, wherein the thickness of the active portion of the first transistor is less than the thickness of the active portion of the second transistor. Wherein, at least one of the transistors in the driving module is the second transistor, and at least one of the transistors electrically connected to the control terminal of the driving module is the first transistor; Wherein, the hydrogen content of the active portion of the first transistor on the surface away from the substrate is greater than the hydrogen content of the active portion of the second transistor on the surface away from the substrate.

2. The array substrate according to claim 1, wherein, The difference between the thickness of the active portion of the second transistor and the thickness of the active portion of the first transistor ranges from 15 nanometers to 35 nanometers.

3. The array substrate according to claim 1, wherein, The active portion of the first transistor and the active portion of the second transistor are disposed on the same layer and are made of the same material.

4. The array substrate according to claim 3, wherein, The active portion of the first transistor and the active portion of the second transistor are both made of polycrystalline silicon or amorphous silicon.

5. The array substrate according to any one of claims 1 to 4, wherein, The pixel circuit also includes: A data writing module, wherein a first end of the data writing module is electrically connected to a first end of the driving module, and a second end of the data writing module is electrically connected to a data signal line, and the data writing module is used to write the electrical signal of the data signal line into the first end of the driving module; A storage module, which is electrically connected to the control terminal of the drive module, is used to maintain the potential of the control terminal of the drive module; A compensation module, wherein a first terminal of the compensation module is electrically connected to the control terminal of the drive module, and a second terminal of the compensation module is electrically connected to at least one of the first terminal and the second terminal of the drive module; and The first light-emitting control module is used to control the light-emitting element to emit light. The driving module is electrically connected to the first power line or the light-emitting element through the first light-emitting control module.

6. The array substrate according to claim 5, wherein, The pixel circuit also includes: A first initialization module, wherein a first terminal of the first initialization module is electrically connected to the control terminal of the drive module, and a second terminal of the first initialization module is electrically connected to a first initialization signal line, and the first initialization module is used to provide an electrical signal from the first initialization signal line to the control terminal of the drive module; Wherein, at least one transistor in the compensation module and the first initialization module is the first transistor.

7. The array substrate according to claim 6, wherein, The driving module is electrically connected to the first power line through the first light-emitting control module, and the pixel circuit further includes: The second light-emitting control module is used to control the light-emitting element to emit light. The driving module is electrically connected to the light-emitting element through the second light-emitting control module.

8. The array substrate according to claim 7, wherein, The pixel circuit also includes: The second initialization module has a first terminal electrically connected to the first electrode of the light-emitting element and a second terminal electrically connected to the second initialization signal line. The second initialization module is used to provide an electrical signal from the second initialization signal line to the first electrode of the light-emitting element.

9. The array substrate according to claim 8, wherein, All transistors in the compensation module and the first initialization module are the first transistors, and all transistors in the driving module, the data writing module, the first light-emitting control module, the second light-emitting control module, and the second initialization module are the second transistors.

10. The array substrate according to claim 8, wherein, The driving module includes a driving transistor, the first electrode of which is electrically connected to the first power line, and the second electrode of which is electrically connected to the first electrode of the light-emitting element. The data writing module includes a data writing transistor, the first terminal of which is electrically connected to the first terminal of the driving transistor, the second terminal of which is electrically connected to the data signal line, and the gate of which is electrically connected to the first scan signal line. The compensation module includes a compensation transistor, the first terminal of which is electrically connected to the gate of the driving transistor, the second terminal of which is electrically connected to the second terminal of the driving transistor, and the gate of which is electrically connected to the second scan signal line. The storage module includes a storage capacitor, the first plate of which is electrically connected to the first power line, and the second plate of which is electrically connected to the gate of the driving transistor. The first initialization module includes a first initialization transistor, the first electrode of the first initialization transistor is electrically connected to the gate of the driving transistor, the second electrode of the first initialization transistor is electrically connected to the first initialization signal line, and the gate of the first initialization transistor is electrically connected to the first initialization control signal line. The second initialization module includes a second initialization transistor, the first electrode of the second initialization transistor is electrically connected to the first electrode of the light-emitting element, the second electrode of the second initialization transistor is electrically connected to the second initialization signal line, and the gate of the second initialization transistor is electrically connected to the second initialization control signal line; The first light-emitting control module includes a first light-emitting control transistor, the first electrode of the first light-emitting control transistor is electrically connected to the first power supply line, the second electrode of the first light-emitting control transistor is electrically connected to the first electrode of the driving transistor, and the gate of the first light-emitting control transistor is electrically connected to the first light-emitting control signal line. The second light-emitting control module includes a second light-emitting control transistor. The first electrode of the second light-emitting control transistor is electrically connected to the second electrode of the driving transistor. The second electrode of the second light-emitting control transistor is electrically connected to the first electrode of the light-emitting element. The gate of the second light-emitting control transistor is electrically connected to the second light-emitting control signal line.

11. The array substrate according to claim 10, wherein, In the same pixel circuit, both the compensation transistor and the first initialization transistor are first transistors, and the compensation transistor and the first initialization transistor are arranged directly adjacent to each other.

12. A display panel comprising an array substrate as claimed in any one of claims 1 to 11.

13. A display device comprising a display panel as described in claim 12.

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