Display device and method for manufacturing same

Abstract

A display device according to an embodiment may comprise: a substrate; a pixel electrode and a common electrode disposed on the substrate; a first reflective electrode and a second reflective electrode disposed on the pixel electrode and the common electrode, respectively; a first sacrificial electrode and a second sacrificial electrode disposed on the first reflective electrode and the second reflective electrode; an organic layer disposed on the first sacrificial electrode and the second sacrificial electrode; a light-emitting element disposed on the organic layer and including a first contact electrode and a second contact electrode; a first connection electrode connecting the pixel electrode to the first contact electrode through a first connection hole formed in the organic layer and the first sacrificial electrode; and a second connection electrode connecting the common electrode to the second contact electrode through a second connection hole formed in the organic layer and the second sacrificial electrode.

Description

Display device and method of manufacturing the same

[0001] The present invention relates to a display device and a method for manufacturing the same.

[0002] As the information society develops, demand for display devices for displaying images is increasing in various forms. Display devices can be flat panel displays such as liquid crystal displays (LCDs), field emission displays (FEDs), and light emitting displays (LEDs).

[0003] The light-emitting display device may include an organic light-emitting display device including an organic light-emitting diode element as a light-emitting element, and an ultra-small light-emitting display device including a micro light-emitting diode element (hereinafter referred to as a micro light-emitting element) as a light-emitting element. Since the ultra-small light-emitting diode element is made of an inorganic material, it has the advantage of having a longer lifespan due to fewer deterioration issues compared to an organic light-emitting diode element.

[0004] The problem to be solved by the present invention is to provide a display device and a manufacturing method thereof that can reduce contact resistance due to contaminant particles that may occur during a thermal compression process of a light-emitting element and reduce the possibility of dark spots occurring when a display panel is turned on.

[0005] The tasks of the present invention are not limited to the technical tasks mentioned above, and other technical tasks not mentioned will be clearly understood by those skilled in the art from the description below.

[0006] According to one embodiment of the present invention for solving the above problem, a display device and a manufacturing method thereof are provided. The display device according to one embodiment may include a substrate, a pixel electrode and a common electrode disposed on the substrate, first and second reflective electrodes disposed on the pixel electrode and the common electrode, respectively, first and second sacrificial electrodes disposed on the first and second reflective electrodes, an organic layer disposed on the first and second sacrificial electrodes, a light-emitting element disposed on the organic layer and including a semiconductor stack and first and second contact electrodes, a first connection electrode connecting the pixel electrode and the first contact electrode through a first connection hole formed in the organic layer and the first sacrificial electrode, and a second connection electrode connecting the common electrode and the second contact electrode through a second connection hole formed in the organic layer and the second sacrificial electrode.

[0007] The first connection hole may penetrate the organic layer and the first sacrificial electrode to expose the first reflective electrode, and the second connection hole may penetrate the organic layer and the second sacrificial electrode to expose the second reflective electrode.

[0008] The first connection hole may be defined by a groove penetrating the organic layer and recessed downward on the first sacrificial electrode, and the second connection hole may be defined by a groove penetrating the organic layer and recessed downward on the second sacrificial electrode.

[0009] The above first and second connecting holes may have a stepped structure in which the diameter increases as it goes upward.

[0010] The above first and second connecting holes can form step portions where the upper surfaces of the reflective electrode, the sacrificial electrode, and the organic layer are placed horizontally at each step of the step structure.

[0011] The display device further includes a device sacrificial electrode disposed between the organic layer and the first and second contact electrodes of the light-emitting element, wherein the device sacrificial electrode can completely overlap one surface of the light-emitting element.

[0012] The light emitting element (LE) further includes a conductive layer (E1) disposed between the organic layer and the semiconductor stack, and a protective film disposed on side surfaces of the conductive layer and side surfaces of the semiconductor stack, wherein the first contact electrode is disposed on the protective film and is connected to the conductive layer that is exposed and not covered by the protective film, and the second contact electrode is disposed on the protective film and may be disposed in a hole penetrating the conductive layer and a part of the semiconductor stack.

[0013] The semiconductor stack further includes a first semiconductor layer disposed on the organic layer and including a semiconductor material layer doped with a first conductive dopant, an active layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the active layer and including a semiconductor material layer doped with a second conductive dopant, wherein the first contact electrode is disposed on a first side of the first semiconductor layer and a first side of the active layer, and is disposed on a portion of the first side of the second semiconductor layer, and the second contact electrode may be disposed on a second side of the first semiconductor layer and a second side of the active layer, and may be disposed on a portion of the second side of the second semiconductor layer.

[0014] According to one embodiment of the present invention for solving the above problem, a display device includes a substrate, a pixel electrode and a common electrode disposed on the substrate, first and second reflective electrodes disposed on the pixel electrode and the common electrode, respectively, a first sacrificial electrode disposed on the first reflective electrode and a second sacrificial electrode disposed on the second reflective electrode, an organic layer disposed on the first and second sacrificial electrodes, a light emitting element disposed on the organic layer and including a semiconductor stack and first and second contact electrodes, a first connection electrode connecting the pixel electrode and the first contact electrode and a second connection electrode connecting the common electrode and the second contact electrode, and a connection electrode connecting the pixel electrode and the contact electrode, wherein a part of an upper surface of the first reflective electrode is exposed without being covered by the first sacrificial electrode, a part of an upper surface of the second reflective electrode is exposed without being covered by the second sacrificial electrode, the first connection electrode may be connected to the exposed portion of the first reflective electrode, and the second connection electrode may be connected to the exposed portion of the second reflective electrode.

[0015] According to one embodiment of the present invention for solving the above problem, a display device may include a substrate, a pixel electrode disposed on the substrate, a reflective electrode disposed on each of the pixel electrodes, a sacrificial electrode disposed on the reflective electrode, an organic layer disposed on the sacrificial electrode and an organic layer disposed on the first and second sacrificial electrodes, a light-emitting element disposed on the organic layer and including a semiconductor stack and a contact electrode, and a connecting electrode connecting the pixel electrode and the contact electrode through a connecting hole formed in the organic layer and the sacrificial electrode.

[0016] The above connecting hole can penetrate the organic layer and the sacrificial electrode to expose the reflective electrode.

[0017] The above connecting hole may be defined by a groove penetrating the organic layer and recessed downward on the sacrificial electrode.

[0018] The light emitting element may further include a protective film disposed on a side surface of the semiconductor stack, and the contact electrode may be disposed on the protective film.

[0019] The semiconductor stack further includes a first semiconductor layer disposed on the organic layer and including a semiconductor material layer doped with a first conductive dopant, an active layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the active layer and including a semiconductor material layer doped with a second conductive dopant, wherein the contact electrode may be disposed on an entire side surface of the first semiconductor layer and an entire side surface of the active layer, and may be disposed on a portion of a side surface of the second semiconductor layer.

[0020] According to an embodiment of the present invention for solving the above problem, a method for manufacturing a display device may include the steps of: preparing a light-emitting element disposed on an adhesive layer applied on a substrate; forming first and second reflective electrodes and first and second sacrificial electrodes sequentially stacked on the pixel electrode and the common electrode, respectively, on the substrate on which a pixel electrode and a common electrode are disposed; forming an organic layer having a through hole on the first and second sacrificial electrodes; transferring the light-emitting elements onto the organic layer such that the first and second contact electrodes of each of the light-emitting elements face the pixel electrodes and the common electrode; etching the first and second sacrificial electrodes exposed by the through hole to form a first connection hole and a second connection hole, and forming a first connection electrode connecting the pixel electrode and the first contact electrode through the first connection hole, and a second connection electrode connecting the common electrode and the second contact electrode through the second connection hole.

[0021] In the step of sequentially stacking the first and second reflective electrodes and the first and second sacrificial electrodes, the step of depositing a reflective material layer on the entire surface of the substrate so as to cover both the pixel electrode and the common electrode, the step of depositing a sacrificial material layer on the entire surface of the substrate so as to cover all of the reflective material layers, and the step of partially etching the sacrificial material layer and the reflective material layer using a first chemical solution that the first and second reflective electrodes and the first and second sacrificial electrodes react with, thereby forming the first and second reflective electrodes and the first and second sacrificial electrodes.

[0022] In the step of transferring the light emitting elements onto the organic layer such that the first and second contact electrodes of each of the light emitting elements face the pixel electrodes and the common electrodes, the light emitting elements are arranged on the organic layer such that the first and second contact electrodes of each of the light emitting elements face the pixel electrodes and the common electrodes, and the light emitting elements are transferred onto the organic layer by thermally compressing the light emitting elements, and the residual particles of the adhesive layer can be formed on the organic layer and the first and second sacrificial electrodes exposed by the through holes by the thermal compression.

[0023] In the step of forming a second connecting electrode connecting the common electrode and the second contact electrode through the second connecting hole, residual particles formed on the upper portion of the first and second sacrificial electrodes exposed by the through hole can be removed during etching of the first and second sacrificial electrodes.

[0024] In the step of forming a second connecting electrode connecting the common electrode and the second contact electrode through the second connecting hole, the bottoms of the first connecting hole and the second connecting hole are opened, a photoresist is formed to cover a side surface of the organic layer, and a connecting hole having a step structure whose diameter increases as it goes up is formed by wet etching using the photoresist and the second chemical solution, and the second chemical solution may be made of a material that reacts with the first and second sacrificial electrodes and does not react with the first and second reflective electrodes.

[0025] The first and second connecting holes form step portions where the upper surfaces of the reflective electrode, the sacrificial electrode, and the organic layer are placed horizontally at each step of the step structure, and residual particles generated during the transfer of the light-emitting element may remain on the step portion of the sacrificial electrode.

[0026] Specific details of other embodiments are included in the detailed description and drawings.

[0027] According to the display device and the manufacturing method thereof according to the embodiments, the possibility of causing dark spots when lighting a display panel due to contaminant particles that may be generated during a thermal compression process of a light-emitting element can be reduced, and the reliability of the panel can be improved.

[0028] The effects according to the embodiments are not limited to those exemplified above, and more diverse effects are included in this specification.

[0029] Figure 1 is a perspective view showing a display device according to one embodiment.

[0030] FIG. 2 is a layout diagram showing a display device according to one embodiment.

[0031] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0032] Fig. 4 is an equivalent circuit diagram showing a sub-pixel according to one embodiment.

[0033] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0034] Fig. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to line I-I' of Fig. 5.

[0035] Figure 7 is a cross-sectional view showing in detail an example of area A of Figure 6.

[0036] Figure 8 is a cross-sectional view showing another example of area A of Figure 6 in detail.

[0037] Figure 9 is a cross-sectional view showing another example of area A of Figure 6 in detail.

[0038] Fig. 10 is a cross-sectional view showing another example of area A of Fig. 6 in detail.

[0039] Fig. 11 is a cross-sectional view showing another example of a cross-section of a display panel corresponding to line I-I' of Fig. 5.

[0040] Figure 12 is a cross-sectional view showing in detail an example of area A2 of Figure 11.

[0041] FIG. 13 is a layout diagram showing pixels of a display area according to one embodiment.

[0042] Fig. 14 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to line I2-I2' of Fig. 13.

[0043] Figure 15 is a cross-sectional view showing in detail an example of area B1 of Figure 14.

[0044] Fig. 16 is a cross-sectional view showing another example of a cross-section of a display panel corresponding to line I1-I1' of Fig. 13.

[0045] Figure 17 is a cross-sectional view showing another example of area A2 of Figure 16 in detail.

[0046] Fig. 18 is a flowchart showing a method for manufacturing a display device according to one embodiment.

[0047] FIGS. 19 to 30 are exemplary drawings for explaining a method of manufacturing a display device according to one embodiment.

[0048] FIG. 31 and FIG. 32 are exemplary drawings for explaining another method of step 150 of FIG. 18.

[0049] FIG. 33 is an exemplary drawing showing a smartwatch including a display device according to one embodiment.

[0050] FIGS. 34 and 35 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0051] FIG. 36 is an exemplary drawing showing a virtual reality device including a display device according to another embodiment.

[0052] FIG. 37 is an exemplary drawing showing an automobile instrument panel and center fascia including display devices according to one embodiment.

[0053] FIG. 38 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0054] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the scope of the invention, and the present invention is defined solely by the scope of the claims.

[0055] When elements or layers are referred to as being "on" another element or layer, this includes both cases where the other element or layer is directly on top of the other element or layer or intervening therebetween. Like reference numerals refer to like elements throughout the specification. The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments are illustrative and therefore the present invention is not limited to the matters illustrated.

[0056] The individual features of the various embodiments of the present invention can be partially or fully combined or combined with one another, enabling various technically feasible interconnections and operations. Each embodiment may be implemented independently of the others, or may be implemented together in a related manner.

[0057] Specific embodiments are described below with reference to the attached drawings.

[0058] Figure 1 is a perspective view showing a display device according to one embodiment.

[0059] Referring to FIG. 1, the display device (10) is a device that displays a moving image or a still image, and can be used as a display screen for various products such as a mobile phone, a smart phone, a tablet personal computer, a smart watch, a watch phone, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation system, an Ultra Mobile PC (UMPC), etc., as well as a television, a laptop, a monitor, a billboard, an Internet of Things (IOT), etc.

[0060] The display device (10) may be a light-emitting display device such as an organic light-emitting display device using an organic light-emitting diode, a quantum dot light-emitting display device including a quantum dot light-emitting layer, an inorganic light-emitting display device including an inorganic semiconductor, and an ultra-small light-emitting display device using an ultra-small light-emitting diode (micro or nano light emitting diode (micro LED or nano LED)). Hereinafter, the display device (10) is described mainly as an ultra-small light-emitting display device, but the present invention is not limited thereto. Meanwhile, for the convenience of explanation, an ultra-small light-emitting diode is described as a light-emitting element below.

[0061] The display device (10) includes a display panel (100), a display driving circuit (250), a circuit board (300), and a power supply circuit (500).

[0062] The display panel (100) may be formed as a rectangular plane having a short side in a first direction (DR1) and a long side in a second direction (DR2) intersecting the first direction (DR1). The corner where the short side in the first direction (DR1) and the long side in the second direction (DR2) meet may be formed to be rounded to have a predetermined curvature or formed at a right angle. The plane shape of the display panel (100) is not limited to a square, and may be formed in another polygonal, circular, or oval shape. The display panel (100) may be formed flat, but is not limited thereto. For example, the display panel (100) may include a curved portion formed at the left and right ends and having a constant curvature or a varying curvature. In addition, the display panel (100) may be formed to be flexible so as to be bent, curved, folded, or rolled.

[0063] The substrate (SUB) of the display panel (100) may include a main area (MA) and a sub area (SBA).

[0064] The main area (MA) may include a display area (DA) that displays an image and a non-display area (NDA) that is a surrounding area of ​​the display area (DA). The display area (DA) may include a plurality of pixels that display an image. Each of the pixels may include a plurality of sub-pixels. For example, each of the pixels may include a first sub-pixel that emits light of a first color, a second sub-pixel that emits light of a second color, and a third sub-pixel that emits light of a third color, but the embodiments of the present specification are not limited thereto.

[0065] The sub-area (SBA) may protrude in a second direction (DR2) from one side of the main area (MA). In FIG. 1, the sub-area (SBA) is illustrated as being unfolded, but the sub-area (SBA) may be bent, in which case it may be disposed on the lower surface of the display panel (100). When the sub-area (SBA) is bent, it may overlap with the main area (MA) in the third direction (DR3), which is the thickness direction of the display panel (100). A display driving circuit (250) may be disposed in the sub-area (SBA).

[0066] The display driving circuit (250) can generate signals and voltages for driving the display panel (100). The display driving circuit (250) can be formed as an integrated circuit (IC) and attached to the display panel (100) using a COG (chip on glass) method, a COP (chip on plastic) method, or an ultrasonic bonding method, but is not limited thereto. For example, the display driving circuit (250) can be attached to the circuit board (300) using a COF (chip on film) method.

[0067] The circuit board (300) may be attached to one end of the sub-area (SBA) of the display panel (100). As a result, the circuit board (300) may be electrically connected to the display panel (100) and the display driving circuit (250). The display panel (100) and the display driving circuit (250) may receive digital video data, timing signals, and driving voltages through the circuit board (300). The circuit board (300) may be a flexible printed circuit board, a printed circuit board, or a flexible film such as a chip on film.

[0068] The power supply circuit (500) can generate multiple panel driving voltages according to an external power voltage. The power supply circuit (500) can be formed as an integrated circuit (IC) and attached to a circuit board (300) using a COF method.

[0069] Fig. 2 is a layout diagram showing a display device according to one embodiment. Fig. 2 illustrates that the sub-area (SBA) is unfolded rather than bent.

[0070] Referring to FIG. 2, the display panel (100) may include a main area (MA) and a sub area (SBA).

[0071] The main area (MA) may include a display area (DA) that displays an image and a non-display area (NDA) surrounding the display area (DA). The display area (DA) may occupy most of the area of ​​the main area (MA). The display area (DA) may be positioned at the center of the main area (MA).

[0072] The display area (DA) includes a plurality of pixels (PX) for displaying an image, and each of the plurality of pixels (PX) may include a plurality of sub-pixels (SPX). A pixel (PX) may be defined as a sub-pixel group that is the smallest unit capable of expressing white gradation.

[0073] A non-display area (NDA) may be positioned adjacent to a display area (DA). The non-display area (NDA) may be an area outside the display area (DA). The non-display area (NDA) may be positioned to surround the display area (DA). The non-display area (NDA) may be an edge area of ​​the display panel (100).

[0074] The first scan driver (SDC1) and the second scan driver (SDC2) may be positioned in the non-display area (NDA). The first scan driver (SDC1) may be positioned on one side (e.g., the left side) of the display panel (100), and the second scan driver (SDC2) may be positioned on the other side (e.g., the right side) of the display panel, but the embodiments of the present specification are not limited thereto.

[0075] Each of the first scan driving unit (SDC1) and the second scan driving unit (SDC2) can be electrically connected to the display driving circuit (250) via scan fan out lines. Each of the first scan driving unit (SDC1) and the second scan driving unit (SDC2) can receive a scan control signal from the display driving circuit (250), generate scan signals according to the scan control signal, and output the scan signals to the scan lines.

[0076] The sub-area (SBA) may protrude from one side of the main area (MA) in a second direction (DR2). The length of the sub-area (SBA) in the second direction (DR2) may be shorter than the length of the main area (MA) in the second direction (DR2). The length of the sub-area (SBA) in the first direction (DR1) may be shorter than the length of the main area (MA) in the first direction (DR1) or may be substantially the same as the length of the main area (MA) in the first direction (DR1). The sub-area (SBA) may be curved and may be disposed at a lower portion of the display panel (100). In this case, the sub-area (SBA) may overlap the main area (MA) in the third direction (DR3).

[0077] The sub-area (SBA) may include a connection area (CA), a pad area (PA), and a bending area (BA).

[0078] The connection area (CA) is an area that protrudes in the second direction (DR2) from one side of the main area (MA). One side of the connection area (CA) may be in contact with the non-display area (NDA) of the main area (MA), and the other side of the connection area (CA) may be in contact with the bending area (BA).

[0079] The pad area (PA) is an area where pads (PD) and a display driving circuit (250) are arranged. The display driving circuit (250) can be attached to the driving pads of the pad area (PA) using a conductive adhesive such as an anisotropic conductive film. The circuit board (300) can be attached to the pads (PD) of the pad area (PA) using a conductive adhesive such as an anisotropic conductive film. One side of the pad area (PA) can be in contact with the bending area (BA).

[0080] The bending area (BA) is a bending area. When the bending area (BA) is bent, the pad area (PA) can be positioned below the connection area (CA) and below the main area (MA). The bending area (BA) can be positioned between the connection area (CA) and the pad area (PA). One side of the bending area (BA) can be in contact with the connection area (CA), and the other side of the bending area (BA) can be in contact with the pad area (PA).

[0081] FIG. 3 is a block diagram showing a display device according to one embodiment.

[0082] Referring to FIG. 3, the display area (DA) includes a plurality of pixels (PX), a plurality of scan lines (SL), a plurality of emission control lines (EL), and a plurality of data lines (DL).

[0083] A plurality of pixels (PX) can be arranged in a matrix form in a first direction (DR1) and a second direction (DR2). A plurality of scan lines (SL) and a plurality of emission control lines (EL) can extend in the first direction (DR1) and be arranged in the second direction (DR2). A plurality of data lines (DL) can extend in the second direction (DR2) and be arranged in the first direction (DR1). The plurality of scan lines (SL) include a plurality of write scan lines (GWL), a plurality of initialization scan lines (GIL), and a plurality of bias scan lines (GBL).

[0084] Each of the plurality of sub-pixels (SPX) may be connected to one of the plurality of write scan lines (GWLs), one of the plurality of initialization scan lines (GILs), one of the plurality of bias scan lines (GBLs), one of the plurality of emission control lines (ELs), and one of the plurality of data lines (DLs). Each of the plurality of sub-pixels (SPX) may be supplied with a data voltage of the data line (DL) according to a write scan signal of the write scan line (GWL), and may emit light through a light-emitting element according to the data voltage.

[0085] The non-display area (NDA) includes a first scan driver (SDC1), a second scan driver (SDC2), and a display driver circuit (250).

[0086] Each of the first scan driving unit (SDC1) and the second scan driving unit (SDC2) may include a write scan signal output unit (611), an initialization scan signal output unit (612), a bias scan signal output unit (613), and an emission control signal output unit (614). Each of the write scan signal output unit (611), the initialization scan signal output unit (612), the bias scan signal output unit (613), and the emission control signal output unit (614) may receive a scan timing control signal (SCS) from a timing control circuit (251).

[0087] The write scan signal output unit (611) can generate write scan signals according to the scan timing control signal (SCS) of the timing control circuit (251) and sequentially output them to write scan lines (GWL).

[0088] The initialization scan signal output unit (612) can generate initialization scan signals according to a scan timing control signal (SCS) and sequentially output them to initialization scan lines (GIL).

[0089] The bias scan signal output unit (613) can generate bias scan signals according to a scan timing control signal (SCS) and sequentially output them to bias scan lines (GBL).

[0090] The light emission control signal output unit (614) can generate light emission control signals according to a scan timing control signal (SCS) and sequentially output them to light emission control lines (EL).

[0091] The display driving circuit (250) includes a timing control circuit (251) and a data driving circuit (252).

[0092] The data driving circuit (252) can receive digital video data (DATA) and a data timing control signal (DCS) from the timing control circuit (251). The data driving circuit (252) converts the digital video data (DATA) into analog data voltages according to the data timing control signal (DCS) and outputs the converted data voltages to the data lines (DL). In this case, the sub-pixels (SPX) are selected by the write scan signals of the first scan driving unit (SDC1) and the second scan driving unit (SDC2), and the data voltages can be supplied to the selected sub-pixels (SPX).

[0093] The timing control circuit (251) can receive digital video data and timing signals from the outside. The timing control circuit (251) can generate a scan timing control signal (SCS) and a data timing control signal (DCS) for controlling the display panel (100) according to the timing signals. The timing control circuit (400) can output the scan timing control signal (SCS) to the first scan driving unit (SDC1) and the second scan driving unit (SDC2). The timing control circuit (251) can output digital video data (DATA) and a data timing control signal (DCS) to the data driving circuit (252).

[0094] The power supply circuit (500) can generate a plurality of panel driving voltages according to a power voltage supplied from an external source. For example, the power supply circuit (500) can generate a first power voltage (VDD), a second power voltage (VSS), a third power voltage (VINT), and a fourth power voltage (VAINT) and supply them to the display panel (100).

[0095] Fig. 4 is an equivalent circuit diagram showing a sub-pixel according to one embodiment.

[0096] Referring to FIG. 4, a sub-pixel (SPX) according to one embodiment may be connected to scan lines (GWL, GIL, GBL), an emission line (EL), and a data line (DL). For example, the sub-pixel (SPX) may be connected to a write scan line (GWL), an initialization scan line (GIL), a bias scan line (GBL), an emission line (EL), and a data line (DL).

[0097] A sub-pixel (SPX) according to one embodiment includes a driving transistor (DT), switch elements, a capacitor (C1), and a light-emitting element (LE). The switch elements include first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6).

[0098] A driving transistor (DT) includes a gate electrode, a conductive layer, and a second electrode. The driving transistor (DT) controls a drain-source current (Ids, hereinafter referred to as “driving current”) flowing between the conductive layer and the second electrode according to a data voltage applied to the gate electrode.

[0099] The light emitting element (LE) may be a micro light emitting diode.

[0100] The light emitting element (LE) emits light according to the driving current (Ids). The amount of light emitted by the light emitting element (LE) may be proportional to the driving current (Ids). The anode electrode of the light emitting element (LE) may be connected to the conductive layer of the fourth transistor (ST4) and the second electrode of the sixth transistor (ST6), and the cathode electrode may be connected to a second power line (VSL) to which a second power voltage is applied.

[0101] A capacitor (C1) is formed between the second electrode of the driving transistor (DT) and a first power line (VDL) to which a first power voltage is applied. The first power voltage may be a voltage of a higher level than the second power voltage. One electrode of the capacitor (C1) may be connected to the second electrode of the driving transistor (DT), and the other electrode may be connected to the first power line (VDL).

[0102] As shown in Fig. 4, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can all be formed as p-type MOSFETs. In this case, the active layers of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) can be formed of polysilicon.

[0103] The gate electrode of the first transistor (ST1) and the gate electrode of the second transistor (ST2) may be connected to a write scan line (GWL), the gate electrode of the third transistor (ST3) may be connected to an initialization scan line (GIL), and the gate electrode of the fourth transistor (ST4) may be connected to a bias scan line (GBL). Since the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, and ST6) are formed of p-type MOSFETs, they may be turned on when a scan signal of a gate low voltage and an emission signal are applied to the initialization scan line (GIL), the write scan line (GWL), the bias scan line (GBL), and the emission line (EL), respectively. One electrode of the third transistor (ST3) and one electrode of the fourth transistor (ST4) may be connected to an initialization voltage line (VIL).

[0104] Alternatively, the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) may be formed as p-type MOSFETs, and the first transistor (ST1) and the third transistor (ST3) may be formed as n-type MOSFETs. The active layers of each of the driving transistor (DT), the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) formed as p-type MOSFETs may be formed of polysilicon, and the active layers of each of the first transistor (ST1) and the third transistor (ST3) formed as n-type MOSFETs may be formed of oxide semiconductors.

[0105] In this case, since the first transistor (ST1) and the third transistor (ST3) are formed as n-type MOSFETs, the first transistor (ST1) can be turned on when a scan signal of a gate high voltage is applied, and the third transistor (ST3) can be turned on when an initialization scan signal of a gate high voltage is applied. In contrast, the second transistor (ST2), the fourth transistor (ST4), the fifth transistor (ST5), and the sixth transistor (ST6) are formed as p-type MOSFETs, and therefore can be turned on when a scan signal of a gate low voltage and a light emission signal are applied.

[0106] Alternatively, the fourth transistor (ST4) may be formed as an n-type MOSFET, and thus, the active layer of each of the fourth transistors (ST4) may be formed of an oxide semiconductor. When the fourth transistor (ST4) is formed as an n-type MOSFET, it may be turned on when a scan signal of a gate high voltage is applied.

[0107] Alternatively, the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may all be formed as n-type MOSFETs. In this case, the active layers of each of the first to sixth transistors (ST1, ST2, ST3, ST4, ST5, ST6) and the driving transistor (DT) may be formed of an oxide semiconductor.

[0108] FIG. 5 is a layout diagram showing pixels of a display area according to one embodiment.

[0109] Referring to FIG. 5, each of the plurality of pixels (PX) of the display area (DA) may include three sub-pixels (SPX1, SPX2, SPX3), but the embodiment of the present specification is not limited thereto and may include four sub-pixels. When each of the plurality of pixels (PX) includes three sub-pixels (SPX1, SPX2, SPX3), it may include a first sub-pixel (SPX1), a second sub-pixel (SPX2), and a third sub-pixel (SPX3).

[0110] A plurality of pixels (PX) can be arranged in a matrix form. In each of the plurality of pixels (PX), a first sub-pixel (SPX1), a second sub-pixel (SPX2), and a third sub-pixel (SPX3) can be arranged in a first direction (DR1).

[0111] When each of the plurality of pixels (PX) includes three sub-pixels (SPX1, SPX2, SPX3), the first sub-pixel (SPX1) can emit light of a first color, the second sub-pixel (SPX2) can emit light of a second color, and the third sub-pixel (SPX3) can emit light of a third color. Here, the light of the first color may be light in a blue wavelength band, the light of the second color may be light in a green wavelength band, and the light of the third color may be light in a red wavelength band. For example, the blue wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in a wavelength band of about 370 nm to 460 nm, the green wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in a wavelength band of about 480 nm to 560 nm, and the red wavelength band may refer to a wavelength band in which the main peak wavelength of the light is included in a wavelength band of about 600 nm to 750 nm.

[0112] Alternatively, when each of the plurality of pixels (PX) includes four sub-pixels, the first sub-pixel may emit light of a first color, the second and fourth sub-pixels may emit light of a second color, and the third sub-pixel may emit light of a third color. Alternatively, the first sub-pixel may emit light of a first color, the second sub-pixel may emit light of a second color, the third sub-pixel may emit light of a third color, and the fourth sub-pixel may emit light of a fourth color. In this case, the light of the fourth color may be white light.

[0113] The first sub-pixel (SPX1) includes a first pixel electrode (PXE1), a plurality of light-emitting elements (LEs), and a first light conversion layer (QDL1). The second sub-pixel (SPX2) includes a second pixel electrode (PXE2), a plurality of light-emitting elements (LEs), and a second light conversion layer (QDL2). The third sub-pixel (SPX3) includes a third pixel electrode (PXE3), a plurality of light-emitting elements (LEs), and a third light conversion layer (QDL3).

[0114] In each of the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3), pixel electrodes (PXE1 / PXE2 / PXE3) and common electrodes (CE1 / CE2 / CE3) may be arranged in the second direction (DR2). Each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrodes (CE1, CE2, CE3) may have a rectangular planar shape, but the embodiment of the present specification is not limited thereto. The area of ​​the first pixel electrode (PXE1) may be the same as the area of ​​the first common electrode (CE1), the area of ​​the second pixel electrode (PXE2) may be the same as the area of ​​the second common electrode (CE2), and the area of ​​the third pixel electrode (PXE3) may be the same as the area of ​​the third common electrode (CE3), but the embodiment of the present specification is not limited thereto.

[0115] For example, as shown in FIG. 5, when the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1), and the area of ​​the second common electrode (CE2) may be larger than the area of ​​the first common electrode (CE1). In addition, since the light transmitting layer (TPL) directly transmits the light of the light emitting element (LE), whereas the first light conversion layer (QDL1) must convert the light, the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3), and the area of ​​the first common electrode (CE1) may be larger than the area of ​​the third common electrode (CE3).

[0116] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to a second electrode of a fourth transistor (ST4 of FIG. 4) and a second electrode of a sixth transistor (ST6 of FIG. 4) of the corresponding sub-pixel.

[0117] The first common electrode (CE1) may be connected to a second power line (VSL) to which a second driving voltage (VSS) is applied through a first common connection hole (CT4). The second common electrode (CE2) may be connected to the second power line (VSL) through a second common connection hole (CT5). The third common electrode (CE3) may be connected to the second power line (VSL) through a third common connection hole (CT6). Therefore, the second driving voltage (VSS) may be applied to each of the common electrodes (CE1, CE2, CE3). The pixel electrodes (PXE1, PXE2, PXE3) may be referred to as an anode electrode or a first electrode, and the common electrodes (CE1, CE2, CE3) may be referred to as a cathode electrode or a second electrode.

[0118] A plurality of light emitting elements (LEs) may be arranged on pixel electrodes (PXE1 / PXE2 / PXE3) and common electrodes (CE1 / CE2 / CE3). Each of the plurality of light emitting elements (LEs) may have a rectangular planar shape, but the embodiments of the present specification are not limited thereto. For example, each of the plurality of light emitting elements (LEs) may have a circular planar shape.

[0119] The first light conversion layer (QDL1) can completely overlap with the plurality of light emitting elements (LEs) of the first sub-pixel (SPX1). The first light conversion layer (QDL1) can convert or shift the peak wavelength of incident light into light of another specific peak wavelength and emit the light. For example, the first light conversion layer (QDL1) can convert or shift third light emitted from the plurality of light emitting elements (LEs) of the first sub-pixel (SPX1) into first light.

[0120] The second light conversion layer (QDL2) can completely overlap with the plurality of light emitting elements (LE) of the second sub-pixel (SPX2). The area of ​​the second light conversion layer (QDL2) can be larger than the area of ​​the second pixel electrode (PXE2). The second light conversion layer (QDL2) can convert or shift the peak wavelength of incident light into light of another specific peak wavelength and emit the light. For example, the second light conversion layer (QDL2) can convert or shift third light emitted from the plurality of light emitting elements (LE) of the second sub-pixel (SPX2) into second light.

[0121] The light transmitting layer (TPL) can completely overlap with the plurality of light emitting elements (LEs) of the third sub-pixel (SPX3). The light transmitting layer (TPL) can directly transmit incident light. For example, the light transmitting layer (TPL) can directly transmit third light emitted from the plurality of light emitting elements (LEs) of the third sub-pixel (SPX3).

[0122] When the light-emitting element (LE) of the first sub-pixel (SPX1) emits light of a first color, the light-emitting element (LE) of the second sub-pixel (SPX2) emits light of a second color, and the light-emitting element (LE) of the third sub-pixel (SPX3) emits light of a third color, the light conversion layers (QDL1, QDL2) and the light transmitting layer (TPL) may be omitted.

[0123] Fig. 6 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to line I-I' of Fig. 5. Fig. 7 is a cross-sectional view showing in detail an example of area A of Fig. 6, and Fig. 8 is a cross-sectional view showing in detail another example of area A of Fig. 6.

[0124] Referring to FIGS. 6 and 7, the substrate (SUB) may be made of an insulating material such as glass or a polymer resin. If the substrate (SUB) is made of a polymer resin, it may be a flexible substrate that can be stretched. The polymer resin may be an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0125] A barrier film (BR) may be disposed on the substrate (SUB). The barrier film (BR) is a film that protects the transistors and the light-emitting element layer of the thin film transistor layer (TFTL) from moisture penetrating through the substrate (SUB), which is vulnerable to moisture permeation. The barrier film (BR) may be composed of a plurality of inorganic films that are alternately laminated.

[0126] A thin film transistor (TFT1) may be arranged on the barrier film (BR). The thin film transistor (TFT1) may be either the fourth transistor (ST4) or the sixth transistor (ST6) illustrated in FIG. 4. The thin film transistor (TFT1) may include a first active layer (ACT1) and a first gate electrode (G1).

[0127] A first active layer (ACT1) of a thin film transistor (TFT1) may be disposed on the barrier film (BR). The first active layer (ACT1) of the thin film transistor (TFT1) may include polycrystalline silicon, single-crystalline silicon, low-temperature polycrystalline silicon, or amorphous silicon. Alternatively, the first active layer (ACT1) of the thin film transistor (TFT1) may be formed of an oxide semiconductor including IGZO (indium (In), gallium (Ga), zinc (Zn), and oxygen (O)), IGZTO (indium (In), gallium (Ga), zinc (Zn), tin (Sn), and oxygen (O)), or IGTO (indium (In), gallium (Ga), tin (Sn), and oxygen (O)).

[0128] The first active layer (ACT1) may include a first channel region (CHA1), a first source region (S1), and a first drain region (D1). The first channel region (CHA1) may be a region overlapping the first gate electrode (G1) in a third direction (DR3) that is a thickness direction of the substrate (SUB). The first source region (S1) may be disposed on one side of the first channel region (CHA1), and the first drain region (D1) may be disposed on the other side of the first channel region (CHA1). The first source region (S1) and the first drain region (D1) may be regions that do not overlap the first gate electrode (G1) in the third direction (DR3). The first source region (S1) and the first drain region (D1) may be regions in which ions are doped into a semiconductor material to have conductivity.

[0129] A first gate insulating film (131) may be disposed on the first channel region (CHA1), the first source region (S1), and the first drain region (D1) of the thin film transistor (TFT1).

[0130] A first gate metal layer may be disposed on the first gate insulating film (131). The first gate metal layer may include a first gate electrode (G1) of a thin film transistor (TFT1) and a first capacitor electrode (CAE1). The first gate electrode (G1) may overlap the first active layer (ACT1) in the third direction (DR3). Although FIG. 6 illustrates that the first gate electrode (G1) and the first capacitor electrode (CAE1) are disposed apart from each other, the first gate electrode (G1) and the first capacitor electrode (CAE1) may be connected to each other.

[0131] A second gate insulating film (132) may be disposed on the first gate electrode (G1) and the first capacitor electrode (CAE1) of the thin film transistor (TFT1).

[0132] A second gate metal layer may be disposed on the second gate insulating film (132). The second gate metal layer may include a second capacitor electrode (CAE2). The second capacitor electrode (CAE2) may overlap the first capacitor electrode (CAE1) of the thin film transistor (TFT1) in the third direction (DR3). Since the second gate insulating film (132) has a predetermined dielectric constant, a capacitor (C1 in FIG. 4) may be formed by the first capacitor electrode (CAE1), the second capacitor electrode (CAE2), and the second gate insulating film (132) disposed therebetween.

[0133] A first interlayer insulating film (141) may be placed on the second capacitor electrode (CAE2).

[0134] A first data metal layer may be disposed on a first interlayer insulating film (141). The first data metal layer may include a first source connection electrode (PCE1). The first source connection electrode (PCE1) may be connected to a first drain region (D1) of a first active layer (ACT1) through a first source contact hole (PCT1) penetrating the first gate insulating film (131), the second gate insulating film (132), and the first interlayer insulating film (141).

[0135] A first planarizing organic film (160) may be placed on the first source connection electrode (PCE1) to planarize the step caused by the thin film transistor (TFT1).

[0136] A second data metal layer may be disposed on the first planarization organic film (160). The second data metal layer may include a second source connection electrode (PCE2). The second source connection electrode (PCE2) may be connected to the first source connection electrode (PCE1) through a second pixel contact hole (PCT2) penetrating the first planarization organic film (160).

[0137] A second planarizing organic film (180) may be placed on the second source connection electrode (PCE2).

[0138] The barrier film (BR), the first gate insulating film (131), the second gate insulating film (132), the third gate insulating film (133), and the interlayer insulating film (141) are inorganic films, for example, silicon nitride (SiN). x ), silicon oxide nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x ) can be formed.

[0139] The first gate metal layer, the second gate metal layer, the first data metal layer, and the second data metal layer may be formed as a single layer or multiple layers made of one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0140] The first planarization organic film (160) and the second planarization organic film (180) can be formed of an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0141] A light-emitting element layer may be arranged on the second planarizing organic film (180). The light-emitting element layer may include pixel electrodes (PXE1, PXE2, PXE3), light-emitting elements (LE), a common electrode (CE), and an organic layer (210).

[0142] A pixel electrode layer including pixel electrodes (PXE1, PXE2, PXE3) and common electrodes (CE1, CE2, CE3) may be disposed on a second planarizing organic film (180).

[0143] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) may be connected to the second source connection electrode (PCE2) through a connection hole (CT1 / CT2 / CT3 in FIG. 5) penetrating the second planarization organic film (180). Each of the pixel electrodes (PXE1, PXE2, PXE3) may be connected to the first source region (S1) or the first drain region (D1) of the thin film transistor (TFT1) through the first source connection electrode (PCE1) and the second source connection electrode (PCE2). Therefore, a voltage controlled by the thin film transistor (TFT1) may be applied to each of the pixel electrodes (PXE1, PXE2, PXE3).

[0144] The common electrodes (CE1, CE2, CE3) can be connected to a second power line (VSL in FIG. 4) to which a second driving voltage (VSS in FIG. 3) is applied through a common connection hole (CT4 / CT5 / CT6 in FIG. 5). The second common electrode (CE2) can be connected to the second power line (VSL) through the second common connection hole (CT5). The third common electrode (CE3) can be connected to the second power line (VSL) through the third common connection hole (CT6). Therefore, the second driving voltage (VSS) can be applied to each of the common electrodes (CE1, CE2, CE3).

[0145] The pixel electrode layer may be formed as a single layer or multiple layers made of one or an alloy of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). For example, in order to lower the resistance of each of the pixel electrodes (PXE1, PXE2, PXE3), the pixel electrode layer may be made of copper (Cu) having a low surface resistance.

[0146] An organic layer (210) may be disposed on each pixel electrode layer. The organic layer (210) serves to temporarily fix or adhere an upper member (e.g., a light emitting element (LE)). For example, the organic layer (210) may be a film for temporarily adhering an upper member (e.g., a light emitting element (LE)) on each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrodes (CE1, CE2, CE3). To facilitate the temporary adhesion, the thickness of the organic layer (210) may be greater than the thickness of each of the pixel electrodes (PXE1, PXE2, PXE3) and the common electrodes (CE1, CE2, CE3) and may be greater than the thickness of the contact electrode (CTE). The thickness of the organic layer (210) may be about 2 μm, but is not limited thereto.

[0147] The organic layer (210) may be a photosensitive organic film such as a photoresist. Alternatively, the organic layer (210) may be formed of an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, or the like.

[0148] A plurality of light emitting elements (LE) can be arranged on the organic layer (210). In FIGS. 6 and 7, the light emitting element (LE) is exemplified as a flip-type micro LED. The flip-type micro LED refers to an LED in which contact electrodes (CTE1, CTE2) are formed on one surface (e.g., the lower surface) of the light emitting element (LE).

[0149] The light emitting element (LE) may include substantially vertical side surfaces, as illustrated in FIG. 7. For example, the light emitting element (LE) may be patterned through vertical etching and may have a rectangular or square cross-sectional shape in which the width of the upper surface and the width of the lower surface are substantially the same. The height of the light emitting element (LE) may be about 5.5 μm, but is not limited thereto.

[0150] Each of the plurality of light emitting elements (LEs) can be formed of an inorganic material such as gallium nitride (GaN).

[0151] Each of the plurality of light emitting elements (LEs) can be grown and formed on a semiconductor substrate such as a silicon substrate or a sapphire substrate. The plurality of light emitting elements (LEs) can be transferred onto the pixel electrode layer of the display panel (100) directly from the semiconductor substrate or via a transfer substrate. Alternatively, the plurality of light emitting elements (LEs) can be transferred onto the pixel electrodes (PXE1, PXE2, PXE3) of the display panel (100) through an electrostatic method using an electrostatic head or a stamp method using an elastic polymer material such as PDMS (Polydimethylsiloane) or silicone as a transfer substrate.

[0152] As illustrated in Fig. 7, a reflective electrode (SRF) may be disposed on the upper surface of the pixel electrode (PXE1) and the common electrode (CE1). The reflective electrode (SRF) may be formed as a single layer of a metal with high reflectivity, or may be formed as a multilayer, such as titanium (Ti) / aluminum (Al) / titanium (Ti) or ITO / aluminum (Al) / ITO.

[0153] A sacrificial electrode (SFC) can be placed on the reflective electrode (SRF). The sacrificial electrode (SFC) can be formed of a conductive metal.

[0154] In one embodiment, the reflective electrode (SRF) may be formed of a multilayer of ITO / aluminum (Al) / ITO, and the sacrificial electrode (SFC) may be formed of IZO. The reflective electrode (SRF) ITO / aluminum (Al) / ITO may have a thickness of about 50Å / 850Å / 115Å, respectively, but is not limited thereto. The sacrificial electrode (SFC) may be about 100Å, but is not limited thereto. However, as the sacrificial electrodes (SFC1, SFC2) become thicker, the probability of cracks occurring in the connection electrodes (BE1, BE2) at the boundary between the organic layer (210) and the sacrificial electrodes (SFC1, SFC2) may increase.

[0155] A light emitting element (LE) may include a conductive layer (E1), a semiconductor stack (STC), a first contact electrode (CTE1), a second contact electrode (CTE2), and a passivation layer (INS). The semiconductor stack (STC) may include a first semiconductor layer (SEM1), an active layer (MQW), a second semiconductor layer (SEM2), and a third semiconductor layer (SEM3) sequentially arranged in a third direction (DR3).

[0156] The conductive layer (E1) may be disposed on the lower surface of the first semiconductor layer (SEM1). In Fig. 7, the conductive layer (E1) covers the entire lower surface of the first semiconductor layer (SEM1), but the embodiment of the present specification is not limited thereto. For example, the conductive layer (E1) may be disposed on a portion of the lower surface of the first semiconductor layer (SEM1). The conductive layer (E1) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu).

[0157] The first semiconductor layer (SEM1) may be disposed on the conductive layer (E1). The first semiconductor layer (SEM1) may be formed of a semiconductor material layer doped with a first conductive dopant such as magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or the like, for example, gallium nitride (GaN).

[0158] The active layer (MQW) can be disposed on the first semiconductor layer (SEM1). The active layer (MQW) can emit light by the combination of electron-hole pairs in response to an electric signal applied through the first semiconductor layer (SEM1) and the second semiconductor layer (SEM2).

[0159] The active layer (MQW) may include a material having a single or multiple quantum well structure. When the active layer (MQW) includes a material having a multiple quantum well structure, it may have a structure in which multiple well layers and barrier layers are alternately laminated. In this case, the well layers may be formed of indium gallium nitride (InGaN), and the barrier layer may be formed of gallium nitride (GaN) or aluminum gallium nitride (AlGaN), but the embodiments of the present specification are not limited thereto.

[0160] Alternatively, the active layer (MQW) may have a structure in which semiconductor materials having a large band gap energy and semiconductor materials having a small band gap energy are alternately laminated, or may include different group 3 to group 5 semiconductor materials depending on the wavelength of the emitted light.

[0161] For example, when the active layer (MQW) includes indium gallium nitride (InGaN), the color of the emitted light may vary depending on the content of indium (In). For example, as the content of indium (In) increases, the wavelength band of the light emitted by the active layer may shift toward a red wavelength band, and as the content of indium (In) decreases, the wavelength band of the light emitted by the active layer may shift toward a blue wavelength band. For example, the content of indium (In) in the active layer (MQW) of the light-emitting element (LE) that emits the third light (light in the blue wavelength band) may be approximately 10 wt% to 20 wt%.

[0162] A second semiconductor layer (SEM2) may be disposed on the first semiconductor layer (SEM1). The second semiconductor layer (SEM2) may be a semiconductor material layer doped with a second conductivity type dopant, such as silicon (Si), germanium (Ge), or tin (Sn), for example, gallium nitride (GaN).

[0163] The third semiconductor layer (SEM3) may be disposed on the second semiconductor layer (SEM2). The third semiconductor layer (SEM3) may be a semiconductor material layer having an n-type dopant lower than a predetermined threshold value and may be referred to as an undoped semiconductor layer. For example, the third semiconductor layer (SEM3) may be indium aluminum gallium nitride (InAlGaN), gallium nitride (GaN), aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), aluminum nitride (AlN), or indium nitride (InN) having an n-type dopant lower than a predetermined threshold value.

[0164] An electron blocking layer may be disposed between the first semiconductor layer (SEM1) and the active layer (MQW). The electron blocking layer may be a layer that suppresses or prevents too many electrons from flowing into the active layer (MQW). For example, the electron blocking layer may be aluminum gallium nitride (AlGaN) or p-type aluminum gallium nitride (AlGaN) doped with p-type magnesium (Mg). The electron blocking layer may be omitted.

[0165] A superlattice layer may be disposed between the active layer (MQW) and the second semiconductor layer (SEM2). The superlattice layer may be a layer for relieving stress between the second semiconductor layer (SEM2) and the active layer (MQW). For example, the superlattice layer may be formed of indium gallium nitride (InGaN) or gallium nitride (GaN). The superlattice layer may be omitted.

[0166] Light extraction patterns (LEPs) can be formed on the upper surface of the semiconductor stack (STC). For example, the light extraction patterns (LEPs) can be formed on the upper surface of the third semiconductor layer (SEM3).

[0167] Light extraction patterns (LEPs) may be patterns for increasing the efficiency of light emitted from the upper surface of the light emitting element (LE). The light extraction patterns (LEPs) may be concave patterns formed in a hemisphere or a semi-ellipse. The light extraction patterns (LEPs) may be concave patterns having a cross-sectional shape of a semicircle or a semi-ellipse. The maximum length (Lmax) of the light extraction patterns (LEPs) in the third direction (DR3) may be approximately 100 nm. In addition, the distance between adjacent light extraction patterns (LEPs) may be approximately 100 nm or less. In another embodiment, the light extraction patterns (LEPs) may be omitted.

[0168] Light extraction patterns (LEPs) can be formed of organic films such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, and polyimide resin. Alternatively, light extraction patterns (LEPs) can be formed of inorganic films such as silicon nitride (SiN). x ), silicon oxide nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x ) can be formed.

[0169] The protective film (INS) may be a film for protecting the lower surface and side surfaces of the light emitting element (LE). The protective film (INS) may be disposed on the lower surface and side surfaces of the conductive layer (E1) and the side surfaces of the semiconductor stack (STC). Specifically, the protective film (INS) may be disposed on the lower surface and side surfaces of the conductive layer (E1), the side surfaces of the first semiconductor layer (SEM1), the side surfaces of the active layer (MQW), the side surfaces of the second semiconductor layer (SEM2) and the third semiconductor layer (SEM3). The protective film (INS) may be an inorganic film, for example, silicon nitride (SiN). x ), silicon oxide nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiOx ), or aluminum oxide (AlO x ) can be formed.

[0170] A hole (LEH) can be formed to penetrate the conductive layer (E1), the first semiconductor layer (SEM1), and the active layer (MQW) of the light emitting element (LE) and expose the second semiconductor layer (SEM2). The hole (LEH) may have a rectangular planar shape, but the embodiments of the present specification are not limited thereto. For example, the hole (LEH) may have a polygonal planar shape such as a circle, an ellipse, or a square.

[0171] Additionally, the protective film (INS) may be disposed on the sidewall of the conductive layer (E1) exposed in the hole (LEH), the sidewall of the first semiconductor layer (SEM1), and the sidewall of the active layer (MQW). The protective film (INS) may not cover the second semiconductor layer (SEM2) in the hole (LEH). Therefore, the second semiconductor layer (SEM2) may be exposed without being covered by the protective film (INS).

[0172] The first contact electrode (CTE1) may be disposed on at least one side of the semiconductor stack (STC) and on at least one side and the lower surface of the conductive layer (E1). The first contact electrode (CTE1) may be disposed on the lower surface of the conductive layer (E1) that is exposed and not covered by the protective film (INS). Therefore, the first contact electrode (CTE1) may be electrically connected to the conductive layer (E1).

[0173] The second contact electrode (CTE2) may be disposed on at least one side of the semiconductor stack (STC) and on at least one side and the lower surface of the conductive layer (E1). In this case, the first contact electrode (CTE1) may be disposed on the first side of the semiconductor stack (STC) and the first side of the conductive layer (E1), while the second contact electrode (CTE2) may be disposed on the second side of the semiconductor stack (STC) and the second side of the conductive layer (E1).

[0174] The second contact electrode (CTE2) can be disposed on the passivation layer (INS) disposed in the hole (LEH) and the second semiconductor layer (SEM2) exposed in the hole (LEH) without being covered by the passivation layer (INS). Therefore, the second contact electrode (CTE2) can be electrically connected to the second semiconductor layer (SEM2) in the hole (LEH).

[0175] The first contact electrode (CTE1) and the second contact electrode (CTE2) may be disposed on at least a portion of a side surface of the semiconductor stack (STC). At least a region of the side surface of the semiconductor stack (STC) adjacent to a top surface of the semiconductor stack (STC) may be exposed and not covered by the first contact electrode (CTE1) and the second contact electrode (CTE2). For example, the first contact electrode (CTE1) and the second contact electrode (CTE2) may be spaced apart from the top surface of the semiconductor stack (STC) in a third direction (DR3).

[0176] The first contact electrode (CTE1) and the second contact electrode (CTE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, the first contact electrode (CTE1) and the second contact electrode (CTE2) may be formed as a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of indium tin oxide (ITO), silver (Ag), and indium tin oxide (ITO) to increase reflectivity.

[0177] Each of the first contact electrode (CTE1) and the second contact electrode (CTE2) may be disposed on three sides of the semiconductor stack (STC). For example, when the semiconductor stack (STC) includes first to fourth sides, the first contact electrode (CTE1) may be disposed on the first side, the second side, and the third side, and the second contact electrode (CTE2) may be disposed on the second side, the third side, and the fourth side.

[0178] The first connection electrode (BE1) connects the first contact electrode (CTE1) of the light emitting element (LE) and the pixel electrode (PXE1 / PXE2 / PXE3). The first connection electrode (BE1) can be connected to the pixel electrode (PXE1 / PXE2 / PXE3) through a first connection hole (BH1) penetrating the organic layer (210) and the sacrificial electrode (SFC). For example, the first connection electrode (BE1) can contact the first reflective electrode (SRF1) exposed through the first connection hole (BH1). When the first reflective electrode (SRF1) is omitted, the first connection electrode (BE1) can directly contact the pixel electrode (PXE1 / PXE2 / PXE3) through the first connection hole (BH1). In addition, the first connection electrode (BE1) can be disposed on the upper surface of the organic layer (210) and the first contact electrode (CTE1).

[0179] The first connecting electrode (BE1) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the first connecting electrode (BE1) may be made of a transparent conductive material (TCO), such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0180] The second connection electrode (BE2) connects the second contact electrode (CTE2) of the light emitting element (LE) and the common electrode (CE1 / CE2 / CE3). The second connection electrode (BE2) can be connected to the common electrode (CE1 / CE2 / CE3) through a second connection hole (BH2) penetrating the organic layer (210) and the second sacrificial electrode (SFC2). For example, the second connection electrode (BE2) can contact the second reflective electrode (SRF2) exposed through the second connection hole (BH2). When the second reflective electrode (SRF2) is omitted, the second connection electrode (BE2) can directly contact the common electrode (CE1 / CE2 / CE3) through the second connection hole (BH2). In addition, the second connection electrode (BE2) can be disposed on the upper surface of the organic layer (210) and the second contact electrode (CTE2).

[0181] As illustrated in Fig. 7, the first connecting hole (BH1) and the second connecting hole (BH2) may have a diameter that gradually increases as they go upward. In cross-section, the first connecting hole (BH1) and the second connecting hole (BH2) may have an inclined plane that extends in a straight line from the upper surface to the lower surface of the connecting hole (BH1, BH2). An inclined plane that extends in a straight line means that the change in diameter is constant.

[0182] In addition, the first connection hole (BH1) and the second connection hole (BH2) may have a step structure in which the diameter gradually widens as it goes upward, as illustrated in FIG. 8 in the cross-section. The change in diameter at the interface between the sacrificial electrodes (SFC1, SFC2) and the organic layer (210) may be significantly changed. In this specification, “in the cross-section” is defined as a state viewed in the first direction (DR1) or the second direction (DR2). In this specification, “in the plane” is set based on a plane parallel to the plane defined by the first direction (DR1) and the second direction (DR2).

[0183] A portion of the upper surface of the sacrificial electrode (SFC1, SFC2) may be exposed in the first connecting hole (BH1) and the second connecting hole (BH2) of a stepped structure in which the diameter gradually increases as it goes upward.

[0184] On a plane, the sacrificial electrodes (SFC1, SFC2) within the first connection hole (BH1) and the second connection hole (BH2) surround the reflective electrodes (SRF1, SRF2) on top of the reflective electrodes (SRF1, SRF2), which are the bottom. Therefore, on a plane, the first connection hole (BH1) and the second connection hole (BH2) form step portions where the upper surfaces of the reflective electrodes (SRF1, SRF2), the sacrificial electrodes (SFC1, SFC2), and the organic layer (210) are horizontally placed at each step of the step structure.

[0185] As can be seen with reference to FIG. 32 described below, residual particles (REP) may remain not only on the upper surface of the organic layer (210) but also on the upper surfaces of the sacrificial electrodes (SFC1, SFC2) exposed by the first connection hole (BH1) and the second connection hole (BH2). On the other hand, no residual particles (REP) remain on the bottom surfaces of the first connection hole (BH1) and the second connection hole (BH2).

[0186] By forming the first connecting hole (BH1) and the second connecting hole (BH2) in a step structure with a diameter that gradually increases as it goes up, the area in which the connecting electrodes (BE1, BE2) can contact the sacrificial electrodes (SFC1, SFC2) inside the connecting hole (BH1) is expanded, thereby strengthening the connection of the connecting electrodes (BE1, BE2) and improving the reliability of the panel.

[0187] In addition, by forming the first connecting hole (BH1) and the second connecting hole (BH2) in a step structure with a diameter that gradually increases as it goes up, the possibility of undercut formation at the boundary between the organic layer (210) and the sacrificial electrodes (SFC1, SFC2) can be reduced. Accordingly, the possibility of cracks occurring at the boundary between the organic layer (210) and the sacrificial electrodes (SFC1, SFC2) when forming the connecting electrodes (BE1, BE2) can be reduced, thereby improving the reliability of the panel.

[0188] The thickness of the first connection electrode (BE1) and the second connection electrode (BE2) may each be about 1000 Å, but is not limited thereto.

[0189] The second connecting electrode (BE2) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the second connecting electrode (BE2) may be made of a transparent conductive material (TCO), such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0190] In one embodiment, the first connection electrode (BE1) and the second connection electrode (BE2) may be formed of the same material as the sacrificial electrodes (SFC1, SFC2), for example, IZO (Indium Zinc Oxide). When the first connection electrode (BE1) and the second connection electrode (BE2) are formed of the same material, there is a process advantage. The process advantage is described in detail with reference to FIG. 28.

[0191] The second organic film (211) may be arranged to cover a portion of a side surface of the plurality of light-emitting elements (LE). In addition, the second organic film (211) may be arranged to cover the first connection electrode (BE1) and the second connection electrode (BE2).

[0192] The third organic film (212) may be disposed on the second organic film (211). The third organic film (212) may be disposed to cover another portion of a side surface of each of the plurality of light-emitting elements (LE). The third organic film (212) may be disposed on the protective film (INS), the first connection electrode (BE1), and the second connection electrode (BE2) that are exposed and not covered by the second organic film (211), as shown in FIG. 7, but the embodiment of the present specification is not limited thereto. The upper surface of each of the plurality of light-emitting elements (LE) may be exposed and not covered by the third organic film (212).

[0193] The second organic film (211) and the third organic film (212) are layers for leveling the steps caused by the plurality of light-emitting elements (LE). If the height of the second organic film (211) is arranged to cover most of the side surfaces of each of the plurality of light-emitting elements (LE), the third organic film (212) may be omitted.

[0194] The second organic film (211) and the third organic film (212) can be formed of an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0195] The first capping layer (CAP1) can be disposed on the third organic film (212) and the light-emitting element (LE).

[0196] A light-shielding layer (BM), a first light conversion layer (QDL1), a second light conversion layer (QDL2), and a light-transmitting layer (TPL) may be disposed on a first capping layer (CAP1). The first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light-transmitting layer (TPL) may be formed by the partitioning of the light-shielding layer (BM). Therefore, in the first sub-pixel (SPX1), the first light conversion layer (QDL1) may be disposed on the first capping layer (CAP1), in the second sub-pixel (SPX2), the second light conversion layer (QDL2) may be disposed on the first capping layer (CAP1), and in the third sub-pixel (SPX3), the light-transmitting layer (TPL) may be disposed on the first capping layer (CAP1). The light-shielding layer (BM) may not overlap with a plurality of light-emitting elements (LE) in the third direction (DR3).

[0197] The first light conversion layer (QDL1) can convert a portion of the third light (light in the blue wavelength band) incident from the light emitting element (LE) into first light (light in the red wavelength band). The first light conversion layer (QDL1) can include a first base resin (BRS1) and a first wavelength conversion particle (WCP1). The first base resin (BRS1) can include a light-transmitting organic material. The first wavelength conversion particle (WCP1) can convert a portion of the third light (light in the blue wavelength band) incident from the light emitting element (LE) into first light (light in the red wavelength band).

[0198] The second light conversion layer (QDL2) can convert a portion of the third light (light in the blue wavelength band) incident from the light emitting element (LE) into second light (light in the green wavelength band). The second light conversion layer (QDL2) can include a second base resin (BRS2) and second wavelength conversion particles (WCP2). The second base resin (BRS2) can include a light-transmitting organic material. The second wavelength conversion particles (WCP2) can convert a portion of the third light (light in the blue wavelength band) incident from the light emitting element (LE) into second light (light in the green wavelength band).

[0199] The optically transparent layer (TPL) may include a light-transmitting organic material.

[0200] For example, the first base resin (BRS1), the second base resin (BRS2), and the light transmitting layer (TPL) may include an epoxy resin, an acrylic resin, a cardo resin, or an imide resin. The first and second wavelength conversion particles (WCP1, WCP2) may be quantum dots (QDs), quantum rods, fluorescent materials, or phosphorescent materials.

[0201] The light-blocking layer (BM) may include a first light-blocking layer (BM1) and a second light-blocking layer (BM2) that are sequentially laminated. The length of the first light-blocking layer (BM1) in the first direction (DR1) or the length of the second direction (DR2) may be wider than the length of the second light-blocking layer (BM2) in the first direction (DR1) or the length of the second light-blocking layer (BM2) in the second direction (DR2). The first light-blocking layer (BM1) and the second light-blocking layer (BM2) may be formed of an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin. The first light-blocking layer (BM1) and the second light-blocking layer (BM2) may include a light-blocking material to prevent light from a light-emitting element (LE) of a sub-pixel from propagating to an adjacent sub-pixel. For example, the first shading layer (BM1) and the second shading layer (BM2) may include an inorganic black pigment such as carbon black or an organic black pigment.

[0202] The second capping layer (CAP2) may be disposed on the first capping layer (CAP1) and the light-shielding layer (BM). The second capping layer (CAP2) may be disposed on the side surface and the upper surface of the light-shielding layer (BM). That is, the second capping layer (CAP2) may be disposed on the side surface of the first light-shielding layer (BM1) and the side surface and the upper surface of the second light-shielding layer (BM2).

[0203] A reflective film (RF) may be disposed between a light-shielding layer (BM) and a first light conversion layer (QDL1), between a light-shielding layer (BM) and a second light conversion layer (QDL2), and between a light-shielding layer (BM) and a light-transmitting layer (TPL). The reflective film (RF) may be disposed on a second capping layer (CAP2) disposed on a side surface of the first light-shielding layer (BM1) and a side surface of the second light-shielding layer (BM2). The reflective film (RF) serves to reflect light that propagates in a lateral direction in the first light-conversion layer (QDL1), the second light-conversion layer (QDL2), and the light-transmitting layer (TPL).

[0204] The reflective film (RF) may include a highly reflective metal material, such as aluminum (Al). The thickness of the reflective film (RF) may be approximately 0.1 μm.

[0205] Alternatively, the reflective film (RF) may include M pairs of first and second layers having different refractive indices (M is an integer greater than or equal to 2) to act as distributed Bragg reflectors (DBR). In this case, the M first layers and the M second layers may be arranged alternately. The first and second layers may be made of an inorganic film, for example, silicon nitride (SiN x ), silicon oxide nitride (SiON), silicon oxide (SiO x ), titanium oxide (TiO x ), or aluminum oxide (AlO x ) can be formed.

[0206] The third capping layer (CAP3) can be disposed on the second capping layer (CAP2), the first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmitting layer (TPL).

[0207] The first capping layer (CAP1), the second capping layer (CAP2), and the third capping layer (CAP3) are inorganic films, for example, silicon nitride (SiN). x ), silicon oxide nitride (SiON), silicon oxide (SiO x), titanium oxide (TiO x ), or aluminum oxide (AlO x ) can be formed. The first light conversion layer (QDL1), the second light conversion layer (QDL2), and the light transmitting layer (TPL) can be encapsulated by the first capping layer (CAP1), the second capping layer (CAP2), and the third capping layer (CAP3).

[0208] A fourth organic film (213) may be disposed on the second capping layer (CAP2). A plurality of color filters (CF1, CF2, CF3) may be disposed on the fourth organic film (213). The plurality of color filters (CF1, CF2, CF3) may include first color filters (CF1), second color filters (CF2), and third color filters (CF3).

[0209] The first color filter (CF1) arranged in the first sub-pixel (SPX1) can transmit the first light (light in the red wavelength band) and absorb or block the third light (light in the blue wavelength band). Therefore, the first color filter (CF1) can transmit the first light (light in the red wavelength band) converted by the first light conversion layer (QDL1) among the third light (light in the blue wavelength band) emitted from the light-emitting element (LE), and absorb or block the third light (light in the blue wavelength band) not converted by the first light conversion layer (QDL1). Therefore, the first sub-pixel (SPX1) can emit the first light (light in the red wavelength band).

[0210] The second color filter (CF2) arranged in the second sub-pixel (SPX2) can transmit the second light (light in the green wavelength band) and absorb or block the third light (light in the blue wavelength band). Therefore, the second color filter (CF2) can transmit the second light (light in the green wavelength band) converted by the first light conversion layer (QDL1) among the third light (light in the blue wavelength band) emitted from the light-emitting element (LE), and absorb or block the third light (light in the blue wavelength band) not converted by the first light conversion layer (QDL1). Therefore, the second sub-pixel (SPX2) can emit the second light (light in the green wavelength band).

[0211] The third color filter (CF3) arranged in the third sub-pixel (SPX3) can transmit the third light (light in the blue wavelength band). Therefore, the third color filter (CF3) can transmit the third light (light in the blue wavelength band) emitted from the light-emitting element (LE) passing through the light-transmitting layer (TPL). Therefore, the third sub-pixel (SPX3) can emit the third light (light in the blue wavelength band).

[0212] The first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) overlapping in the third direction (DR3) can overlap the light-shielding layer (BM) in the third direction (DR3).

[0213] A fifth organic film (214) for planarization may be placed on multiple color filters (CF1, CF2, CF3).

[0214] The fourth organic film (213) and the fifth organic film (214) can be formed of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0215] Figure 9 is a cross-sectional view showing another example of area A of Figure 6 in detail.

[0216] The embodiment of FIG. 9 differs from the embodiment of FIG. 7 in that the connection holes (BH1, BH2) penetrate the organic layer (210) and the sacrificial electrodes (SFC1, SFC2) do not penetrate. In the embodiment of FIG. 9, descriptions that overlap with the embodiment of FIG. 7 will not be repeated, and differences from the embodiment of FIG. 7 will be mainly described.

[0217] Referring to Fig. 9, the sacrificial electrodes (SFC1, SFC2) may have different thicknesses in the region overlapping the connection holes (BH1, BH2) and other regions. The upper portions of the sacrificial electrodes (SFC1, SFC2) may be removed and the lower portions may remain in the region overlapping the connection holes (BH1, BH2). Accordingly, the connection holes (BH1, BH2) may expose the sacrificial electrodes (SFC1, SFC2).

[0218] The first connection hole (BH1) may be defined by a groove that penetrates the organic layer (210) and is concave downward on the first sacrificial electrode (SFC1), and the second connection hole (BH2) may be defined by a groove that penetrates the organic layer (210) and is concave downward on the second sacrificial electrode (SFC2).

[0219] The first connection electrode (BE1) connects the first contact electrode (CTE1) of the light emitting element (LE) and the pixel electrode (PXE1 / PXE2 / PXE3). The first connection electrode (BE1) can contact the first sacrificial electrode (SFC1) exposed through the first connection hole (BH1).

[0220] The second connecting electrode (BE2) connects the second contact electrode (CTE2) of the light emitting element (LE) and the common electrode (CE1 / CE2 / CE3). The second connecting electrode (BE2) can contact the second sacrificial electrode (SFC2) exposed through the second connecting hole (BH2).

[0221] Fig. 10 is a cross-sectional view showing another example of area A of Fig. 6 in detail.

[0222] The embodiment of FIG. 10 differs from the embodiment of FIG. 7 in that it further includes a sacrificial electrode (SFC-21, SFC-22) between the contact electrode (CTE1, CTE2) and the organic layer (210). In the embodiment of FIG. 10, descriptions overlapping with those of the embodiment of FIG. 7 will not be repeated, and differences from the embodiment of FIG. 7 will be mainly described.

[0223] The sacrificial electrodes (SFC-21, SFC-22) are referred to as element sacrificial electrodes (SFC-21, SFC-22) to clearly distinguish them from the sacrificial electrodes (SFC1, SFC2) placed between the connecting electrodes (BE1, BE2).

[0224] A first element sacrificial electrode (SFC-21) may be placed between the first contact electrode (CTE1) and the first organic layer (210), and a second element sacrificial electrode (SFC-22) may be placed between the second contact electrode (CTE2) and the organic layer (210).

[0225] The first element sacrificial electrode (SFC-21) and the second element sacrificial electrode (SFC-22) can completely overlap one side of the light emitting element (LE).

[0226] The element sacrificial electrode (SFC-21, SFC-22) can be formed of a conductive metal.

[0227] In one embodiment, the reflective electrode (SRF) may be formed of a multilayer of ITO / aluminum (Al) / ITO, and the sacrificial electrode (SFC) and the element sacrificial electrode (SFC-21, SFC-22) may be formed of IZO.

[0228] Fig. 11 is a cross-sectional view showing another example of a cross-section of a display panel corresponding to line I-I' of Fig. 5. Fig. 12 is a cross-sectional view showing in detail an example of area A2 of Fig. 11.

[0229] The embodiments of FIGS. 11 and 12 differ from the embodiments of FIGS. 6 and 7 in that each of the organic layers (210) is disposed on a portion of the upper surface of the pixel electrodes (PXE1 / PXE2 / PXE3) and a portion of the upper surface of the common electrode (CE), and the sacrificial electrodes (SFC1, SFC2) are disposed only in the region in contact with (and overlapping) the organic layers (210). In FIGS. 11 and 12, descriptions overlapping with the embodiments of FIGS. 6 and 7 will be omitted, and descriptions will be focused on differences from the embodiments of FIGS. 6 and 7.

[0230] Referring to FIGS. 11 and 12, since each of the organic layers (210) is disposed on a portion of the upper surface of each of the pixel electrodes (PXE1, PXE2, PXE3) and a portion of each of the common electrodes (CE1, CE2, CE3), there is no need to form a first connection hole (BH1) for exposing the first reflective electrode (SRF1) and a second connection hole (BH2) for exposing the second reflective electrode (SRF2).

[0231] Each of the first connection electrodes (BE1) may be disposed on the upper surface of the first reflective electrode (SRF1) that is not covered by the organic layer (210). Each of the second connection electrodes (BE2) may be disposed on the upper surface of the second reflective electrode (SRF2) that is not covered by the organic layer (210). In addition, each of the first connection electrode (BE1) and the second connection electrodes (BE2) may be disposed on the upper surface and at least one side surface of the organic layer (210).

[0232] The first sacrificial electrode (SFC1) is disposed between the first reflective electrode (SRF1) and the organic layer (210), but may expose at least a portion of the first reflective electrode (SRF1). For example, the first sacrificial electrode (SFC1) may be disposed only in an area overlapping the organic layer (210).

[0233] The second sacrificial electrode (SFC2) is disposed between the second reflective electrode (SRF2) and the organic layer (210), but may expose at least a portion of the second reflective electrode (SRF2). For example, the second sacrificial electrode (SFC2) may be disposed only in an area overlapping the organic layer (210).

[0234] FIG. 13 is a layout diagram showing pixels of a display area according to one embodiment.

[0235] The embodiment of FIG. 13 differs from the embodiment of FIG. 5 in that the light emitting elements (LEs) overlap the pixel electrodes (PXE1 / PXE2 / PXE3) in each of the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3). In the embodiment of FIG. 13, descriptions overlapping with the embodiment of FIG. 5 are omitted.

[0236] Referring to FIG. 13, a first sub-pixel (SPX1) includes a first pixel electrode (PXE1), a plurality of light-emitting elements (LEs), and a first light conversion layer (QDL1). A second sub-pixel (SPX2) includes a second pixel electrode (PXE2), a plurality of light-emitting elements (LEs), and a second light conversion layer (QDL2). A third sub-pixel (SPX3) includes a third pixel electrode (PXE3), a plurality of light-emitting elements (LEs), and a light-transmitting layer (or third light conversion layer) (TPL).

[0237] Each of the first pixel electrode (PXE1), the second pixel electrode (PXE2), and the third pixel electrode (PXE3) may have a rectangular planar shape having a short side in the first direction (DR1) and a long side in the second direction (DR2). The area of ​​the first sub-pixel (SPX1), the area of ​​the second sub-pixel (SPX2), and the area of ​​the third sub-pixel (SPX3) may be set according to the light conversion efficiency of the first light conversion layer (QDL1) and the light conversion efficiency of the second light conversion layer (QDL2). For example, the lower the light conversion efficiency, the larger the area of ​​the sub-pixel.

[0238] For example, as shown in FIG. 13, when the light conversion efficiency of the second light conversion layer (QDL2) is lower than the light conversion efficiency of the first light conversion layer (QDL1), the area of ​​the second pixel electrode (PXE2) may be larger than the area of ​​the first pixel electrode (PXE1). In addition, since the light transmitting layer (TPL) directly transmits the light of the light emitting element (LE), whereas the first light conversion layer (QDL1) must convert the light, the area of ​​the first pixel electrode (PXE1) may be larger than the area of ​​the third pixel electrode (PXE3).

[0239] Each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to at least one transistor through a pixel connection hole (CT1 / CT2 / CT3). For example, each of the pixel electrodes (PXE1, PXE2, PXE3) can be electrically connected to a second electrode of a fourth transistor (ST4 of FIG. 4) and a second electrode of a sixth transistor (ST6 of FIG. 4) of the corresponding sub-pixel.

[0240] A plurality of light emitting elements (LEs) may be arranged on each of the pixel electrodes (PXE1, PXE2, PXE3). The same number of light emitting elements (LEs) may be arranged on each of the pixel electrodes (PXE1, PXE2, PXE3). For example, two light emitting elements (LEs) may be arranged on each of the pixel electrodes (PXE1, PXE2, PXE3).

[0241] The first light conversion layer (QDL1) can completely overlap the first pixel electrode (PXE1) and the plurality of light emitting elements (LEs) of the first sub-pixel (SPX1). The area of ​​the first light conversion layer (QDL1) can be larger than the area of ​​the first pixel electrode (PXE1). The first light conversion layer (QDL1) can convert or shift the peak wavelength of incident light into light of another specific peak wavelength and emit the light. For example, the first light conversion layer (QDL1) can convert or shift third light emitted from the plurality of light emitting elements (LEs) of the first sub-pixel (SPX1) into first light.

[0242] The second light conversion layer (QDL2) can completely overlap the second pixel electrode (PXE2) and the plurality of light emitting elements (LEs) of the second sub-pixel (SPX2). The area of ​​the second light conversion layer (QDL2) can be larger than the area of ​​the second pixel electrode (PXE2). The second light conversion layer (QDL2) can convert or shift the peak wavelength of incident light into light of another specific peak wavelength and emit the light. For example, the second light conversion layer (QDL2) can convert or shift third light emitted from the plurality of light emitting elements (LEs) of the second sub-pixel (SPX2) into second light.

[0243] The light transmitting layer (TPL) can completely overlap the third pixel electrode (PXE3) and the plurality of light emitting elements (LEs) of the third sub-pixel (SPX3). The light transmitting layer (TPL) can directly transmit incident light. For example, the light transmitting layer (TPL) can directly transmit third light emitted from the plurality of light emitting elements (LEs) of the third sub-pixel (SPX3).

[0244] Fig. 14 is a cross-sectional view showing an example of a cross-section of a display panel corresponding to line I2-I2' of Fig. 13. Fig. 15 is a cross-sectional view showing in detail an example of area B1 of Fig. 14.

[0245] The embodiments of FIGS. 14 and 15 differ from the embodiments of FIGS. 6 and 7 in that the light emitting elements (LE) are vertical type micro LEDs in which each of the plurality of light emitting elements (LE) extends in a third direction (DR3). The vertical type micro LED refers to an LED having a structure in which a first semiconductor layer (SEM1), an active layer (MQW), and a second semiconductor layer (SEM2) are sequentially arranged in the third direction (DR3), which is a vertical direction. Each of the plurality of light emitting elements (LE) may include a substantially vertical side surface. The light emitting elements (LE) may be patterned through vertical etching and may have a rectangular or square cross-sectional shape in which the width of the upper surface and the width of the lower surface are substantially the same.

[0246] In the embodiments of FIGS. 14 and 15, descriptions that overlap with those of the embodiments of FIGS. 6 and 7 are omitted.

[0247] Referring to FIGS. 14 and 15, a pixel electrode layer may be disposed on the second planarizing organic film (180). The pixel electrode layer may include a first pixel electrode (PXE1), a second pixel electrode (PXE2), and a third pixel electrode (PXE3).

[0248] A reflective electrode (SRF) may be disposed on each of the pixel electrodes (PXE1, PXE2, PXE3). The reflective electrode (SRF) may be formed as a single layer of a metal with high reflectivity, or may be formed as a multilayer, such as titanium (Ti) / aluminum (Al) / titanium (Ti) or ITO / aluminum (Al) / ITO.

[0249] A sacrificial electrode (SFC) can be placed on the reflective electrode (SRF). The sacrificial electrode (SFC) can be formed of a conductive metal.

[0250] In one embodiment, the reflective electrode (SRF) may be formed of a multilayer of ITO / aluminum (Al) / ITO, and the sacrificial electrode (SFC) may be formed of IZO.

[0251] A plurality of light emitting elements (LEs) can be arranged on the organic layer (210).

[0252] Each of the plurality of light emitting elements (LE) may have a length in the first direction (DR1), a length in the second direction (DR2), and a length in the third direction (DR3) of several to several hundred μm, respectively. For example, each of the plurality of light emitting elements (LE) may have a length in the first direction (DR1), a length in the second direction (DR2), and a length in the third direction (DR3) of approximately 100 μm or less, respectively.

[0253] A light emitting element (LE) may include a conductive layer (E1), a semiconductor stack (STC), a contact electrode (CTE), and a passivation layer (INS). The semiconductor stack (STC) may include a first semiconductor layer (SEM1), an active layer (MQW), a second semiconductor layer (SEM2), and a third semiconductor layer (SEM3) sequentially arranged in a third direction (DR3).

[0254] The protective film (INS) may be disposed on the side of the first semiconductor layer (SEM1), the side of the active layer (MQW), the side of the second semiconductor layer (SEM2), and the side of the third semiconductor layer (SEM3). The protective film (INS) may be a film for protecting the side of the light emitting element (LE). The protective film (INS) may be formed of an inorganic film, for example, silicon nitride (SiNx), silicon nitride oxide (SiON), silicon oxide (SiOx), titanium oxide (TiOx), or aluminum oxide (AlOx).

[0255] A plurality of contact electrodes (CTEs) may be disposed on the protective layer (INS). Each of the plurality of contact electrodes (CTEs) may be disposed between the organic layer (210) and the protective layer (INS). Each of the plurality of contact electrodes (CTEs) may be in contact with the organic layer (210).

[0256] Each of the plurality of contact electrodes (CTE) can be connected to a conductive layer (E1) that is exposed and not covered by a protective film (INS). As a result, even if one of the plurality of contact electrodes (CTE) is not connected to the conductive layer (E1) due to a process error, the occurrence of a defect in which the light emitting element (LE) does not light up can be prevented by connecting another contact electrode (CTE) to the conductive layer (E1).

[0257] When a plurality of contact electrodes (CTEs) are formed of a metal with high reflectivity, light emitted from the active layer (MQW) of the light emitting element (LE) and propagating in the lateral direction of the light emitting element (LE) can be reflected by the plurality of contact electrodes (CTEs) and emitted to the upper surface of the light emitting element (LE). Therefore, since light loss of the light emitting element (LE) can be reduced, the light efficiency of the light emitting element (LE) can be increased. Therefore, in order to increase the light efficiency of the light emitting element (LE), it is preferable that each of the plurality of contact electrodes (CTEs) be arranged to cover most of the lateral surface of the semiconductor stack (STC).

[0258] The plurality of contact electrodes (CTEs) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Specifically, the plurality of contact electrodes (CTEs) may be formed as a two-layer structure of chromium (Cr) and gold (Au), a three-layer structure of titanium (Ti), aluminum (Al), and titanium (Ti), or a three-layer structure of indium tin oxide (ITO), silver (Ag), and indium tin oxide (ITO) to increase reflectivity.

[0259] Each of the plurality of contact electrodes (CTEs) may be positioned on a side surface of the semiconductor stack (STC). Among the side surfaces of the semiconductor stack (STC), an area adjacent to the upper surface of the semiconductor stack (STC) may be covered by a protective layer (INS), but may be exposed without being covered by the plurality of contact electrodes (CTEs).

[0260] The connecting electrode (BE) connects the contact electrode (CTE) of the light emitting element (LE) and the pixel electrodes (PXE1 / PXE2 / PXE3). The connecting electrode (BE) can be in contact with the exposed reflective electrode (SRF) through a connecting hole (BH) penetrating the organic layer (210) and the sacrificial electrode (SFC). In addition, the connecting electrode (BE) can be disposed on the upper surface of the organic layer (210) and the contact electrode (CTE). In another embodiment, the connecting hole (BH) may not completely penetrate the sacrificial electrode (SFC), and only the upper portion of the sacrificial electrode (SFC) may be removed and exposed. In this case, the connecting electrode (BE) can be in contact with the sacrificial electrode (SFC) exposed by the connecting hole (BH).

[0261] The connecting electrode (BE) may include any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu). Alternatively, the connecting electrode (BE) may be made of a transparent conductive material (TCO), such as indium tin oxide (ITO) and indium zinc oxide (IZO).

[0262] The connection electrode (BE) may be arranged on a side surface of the semiconductor stack (STC). Among the side surfaces of the semiconductor stack (STC), a region adjacent to a top surface of the semiconductor stack (STC) may be exposed without being covered by the connection electrode (BE). For example, a separation distance between the top surface of the semiconductor stack (STC) and the connection electrode (BE) in the third direction (DR3) may be greater than approximately 100 nm. In addition, the separation distance between the top surface of the semiconductor stack (STC) and the connection electrode (BE) in the third direction (DR3) may be greater than a maximum length (Lmax) of the light extraction pattern in the third direction (DR3).

[0263] The separation distance between the upper surface of the semiconductor stack (STC) and the connection electrode (BE) in the third direction (DR3) may be greater than the separation distance between the upper surface of the semiconductor stack (STC) and the contact electrode (CTE) in the third direction (DR3), but the embodiments of the present specification are not limited thereto. For example, the separation distance between the upper surface of the semiconductor stack (STC) and the connection electrode (BE) in the third direction (DR3) may be less than the separation distance between the upper surface of the semiconductor stack (STC) and the contact electrode (CTE) in the third direction (DR3). In this case, the connection electrode (BE) may cover at least a portion of the protective film (INS) that is exposed and not covered by the contact electrode (CTE). Alternatively, the connection electrode (BE) may be arranged to cover the entirety of the protective film (INS) that is exposed and not covered by the contact electrode (CTE). As another example, the separation distance between the top surface of the semiconductor stack (STC) and the connecting electrode (BE) in the third direction (DR3) may be substantially equal to the separation distance between the top surface of the semiconductor stack (STC) and the contact electrode (CTE) in the third direction (DR3).

[0264] The second organic film (211) may be arranged to cover a portion of a side surface of a plurality of light-emitting elements (LE). In addition, the second organic film (211) may be arranged to cover a connection electrode (BE).

[0265] The third organic film (212) may be disposed on the second organic film (211). The third organic film (212) may be disposed to cover another portion of a side surface of each of the plurality of light-emitting elements (LE). The third organic film (212) may be disposed on the protective film (INS), the contact electrode (CTE), and the connection electrode (BE) that are not covered by the second organic film (211) and are exposed as shown in FIG. 7, but the embodiment of the present specification is not limited thereto. For example, the entire connection electrode (BE) may be covered by the second organic film (211). The upper surface of each of the plurality of light-emitting elements (LE) may be exposed and not covered by the third organic film (212).

[0266] The second organic film (211) and the third organic film (212) are layers for leveling the steps caused by the plurality of light-emitting elements (LE). If the height of the second organic film (211) is arranged to cover most of the side surfaces of each of the plurality of light-emitting elements (LE), the third organic film (212) may be omitted.

[0267] The second organic film (211) and the third organic film (212) can be formed of an organic film such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0268] A common electrode (CE) may be disposed on the upper surface of each of the plurality of light emitting elements (LE) and the upper surface of the third organic film (212). The common electrode (CE) may be a common layer formed in common on the first sub-pixel (SPX1), the second sub-pixel (SPX2), and the third sub-pixel (SPX3). The common electrode (CE) may be made of a transparent metal material (TCO, Transparent Conductive Material), such as ITO (Indium Tin Oxide) and IZO (Indium Zinc Oxide), which can transmit light.

[0269] The pixel electrodes (PXE1, PXE2, PXE3) may be referred to as anode electrodes or first electrodes, and the common electrode (CE) may be referred to as cathode electrodes or second electrodes.

[0270] The first capping layer (CAP1) can be disposed on the common electrode (CE).

[0271] Fig. 16 is a cross-sectional view showing another example of a cross-section of a display panel corresponding to line I1-I1' of Fig. 13. Fig. 17 is a cross-sectional view showing another example of area A2 of Fig. 16 in detail.

[0272] The embodiments of FIGS. 16 and 17 differ from the embodiments of FIGS. 14 and 15 in that each of the organic layers (210) is disposed on a portion of the upper surface of the pixel electrode (PXE) and the sacrificial electrode (SFC) is disposed only in an area in contact with (and overlapping) the organic layer (210). In FIGS. 16 and 17, descriptions that overlap with the embodiments of FIGS. 14 and 15 will be omitted, and descriptions will be focused on differences from the embodiments of FIGS. 14 and 15.

[0273] Referring to FIGS. 16 and 17, since each of the organic layers (210) is disposed on a portion of the upper surface of the pixel electrode (PXE), there is no need to form a connecting hole (BH) to expose the reflective electrode (SRF). The connecting electrode (BE) may be disposed on the upper surface of the reflective electrode (SRF) that is not covered by the organic layer (210). The connecting electrode (BE) may be disposed on the upper surface and side surfaces of the organic layer (210).

[0274] Fig. 18 is a flowchart showing a method for manufacturing a display device according to one embodiment. Figs. 19 to 30 are exemplary drawings for explaining a method for manufacturing a display device according to one embodiment.

[0275] Hereinafter, a method for manufacturing a display device according to one embodiment will be described in detail by connecting FIG. 18 with FIGS. 19 to 30. In FIGS. 19 to 30, cross sections corresponding to line I-I' of FIG. 6 are illustrated for convenience of explanation.

[0276] First, as shown in Fig. 19, a light emitting element (LE) placed on a first substrate (SSUB) can be prepared. (S110 of Fig. 18)

[0277] The light emitting element (LE) is a device grown on a semiconductor substrate, and may be the light emitting element (LE) described with reference to FIGS. 6 and 7.

[0278] The semiconductor substrate may be a silicon wafer substrate or a sapphire substrate. A light emitting element (LE) grown on the semiconductor substrate may be transferred onto a substrate (SUB) of a display panel via one or more relay substrates.

[0279] The sub-substrate (SSUB) may include a support layer (SPL) and an adhesive layer (ASD). The support layer (SPL) may be formed of a material that is transparent and mechanically stable, allowing light to pass through. For example, the support layer (SPL) may include a transparent polymer such as polyester, polyacrylic, polyepoxy, polyethylene, polystyrene, or polyethylene terephthalate.

[0280] An adhesive layer (ASD) having adhesive properties can be placed on the support layer (SPL).

[0281] The thickness (DS-A) of the adhesive layer (ASD) may be thicker than the height (DS-L) of the light emitting element (LE). For example, the thickness of the adhesive layer (ASD) may be about 50 μm.

[0282] The adhesive layer (ASD) may include an adhesive material for bonding the light emitting element (LE). For example, the adhesive material may be a siloxane-based organic polymer, such as an organosilicon compound such as polydimethylsiloane (PDMS). The adhesive material may have fluidity.

[0283] Secondly, as shown in FIGS. 20 to 22, reflective electrodes (SRF1, SRF2) and sacrificial electrodes (SFC1, SFC2) are formed on the pixel electrodes (PXE1 / PXE2 / PXE3) and the common electrodes (CE1 / CE2 / CE3). (S120 of FIG. 18)

[0284] A reflective material layer (SRFL) and a sacrificial material layer (SFCL) can be sequentially deposited on the pixel electrode (PXE1 / PXE2 / PXE3) and the common electrode (CE1 / CE2 / CE3).

[0285] For example, referring to FIG. 20, a reflective material layer (SRFL) may be fully deposited on one surface of a substrate (SUB). The reflective material layer (SRFL) may be formed to cover the pixel electrodes (PXE1 / PXE2 / PXE3) and the common electrodes (CE1 / CE2 / CE3). The reflective material layer (SRFL) may be formed on one surface of the semiconductor substrate (SSUB) exposed between the pixel electrodes (PXE1 / PXE2 / PXE3) and the common electrodes (CE1 / CE2 / CE3).

[0286] Next, referring to FIG. 21, the sacrificial material layer (SFCL) can be fully deposited to cover the reflective material layer (SRFL) on one surface of the substrate (SUB).

[0287] Thereafter, referring to FIG. 22, the sacrificial material layer (SFCL) and the reflective material layer (SRFL) can be patterned in the same process. For example, the mask pattern can be formed so as not to cover the sacrificial material layer (SFCL) that does not overlap with the pixel electrodes (PXE1 / PXE2 / PXE3) and the common electrodes (CE1 / CE2 / CE3).

[0288] A sacrificial material layer (SFCL) not covered by a mask pattern can be wet-etched, and a reflective material layer (SRFL) exposed by etching the sacrificial material layer (SFCL) by the same mask pattern without a separate additional photo process can be wet-etched. The first chemical used in the wet-etching can react with both the sacrificial material layer (SFCL) and the reflective material layer (SRFL).

[0289] Accordingly, the sacrificial material layer (SFCL) and the reflective material layer (SRFL) disposed between the pixel electrodes (PXE1 / PXE2 / PXE3) and the common electrodes (CE1 / CE2 / CE3) are etched, thereby exposing the semiconductor substrate (SSUB). In addition, the reflective electrodes (SRF1, SRF2) and the sacrificial electrodes (SFC1, SFC2) may be sequentially stacked on the pixel electrodes (PXE1 / PXE2 / PXE3) and the common electrodes (CE1 / CE2 / CE3). The mask pattern may be removed by an ashing process after forming the reflective electrodes (SRF1, SRF2) and the sacrificial electrodes (SFC1, SFC2) thereon.

[0290] Thirdly, referring to FIGS. 23 and 24, an organic layer (210) having a through hole (210-H) is formed. (S130 of FIG. 18)

[0291] Referring to FIG. 23, the organic layer (210) can be applied to the entire surface of the substrate (SUB) to cover the sacrificial electrodes (SFC1, SFC2), pixel electrodes (PXE1 / PXE2 / PXE3), and common electrodes (CE1 / CE2 / CE3).

[0292] When the organic layer (210) is a photosensitive organic film such as a photoresist, the organic layer (210) can be hardened (soft baked) at a first temperature. Thereafter, a through hole (210-H) is formed so that the organic layer (210) exposes a portion of the sacrificial electrode (SFC1, SFC2).

[0293] Fourth, referring to FIGS. 25 and 26, the light emitting element (LE) on the first substrate (SSUB) is transferred to the organic layer (210), and the first substrate (SSUB) is removed. (S140 of FIG. 18)

[0294] For example, referring to FIG. 25, the first substrate (SSUB) is placed on the substrate (SUB) so that the light-emitting element (LE) on the first substrate (SSUB) faces the organic layer (210). Thereafter, the light-emitting element (LE) is thermo-compression-bonded onto the organic layer (210). Accordingly, at least a portion of the light-emitting element (LE) can be temporarily fixed by being embedded in the organic layer (210). When the fluidity of the organic layer (210) is low or the organic layer (210) is hard, the depth at which the light-emitting element (LE) is inserted or embedded into the organic layer (210) may be very small, or the light-emitting element (LE) may be placed on the organic layer (210) without being inserted or embedded in the organic layer (210). Then, the organic layer (210) can be completely cured at a second temperature higher than the first temperature. The first temperature may be approximately 100 degrees Celsius, and the second temperature may be approximately 230 degrees Celsius, but the embodiments of the present specification are not limited thereto. In addition, the process of completely curing the organic layer (210) at the second temperature may be performed for approximately 30 minutes.

[0295] In addition, since the adhesive layer (ASD) has fluidity and elasticity, when the light emitting elements (LE) are thermo-compression-bonded, the light emitting elements (LE) are embedded into the adhesive layer (ASD), so that the adhesive material of the adhesive layer (ASD) not only fills the space between the light emitting elements (LE), but also can come into contact with the sacrificial electrodes (SFC1, SFC2) exposed through the organic layer (210) and the through hole (210-H) of the organic layer (210). Meanwhile, the adhesive layer (ASD) is partially melted during thermo-compression, leaving residual particles on the surface in contact with the adhesive layer (ASD). The residual particles are by-products generated in the process and are one of the contaminants. Therefore, the residual particles can be called contaminant particles.

[0296] Thereafter, the first substrate (SSUB) can be separated and removed from the light-emitting element (LE). For example, considering the spacing between the plurality of light-emitting elements (LE) arranged on the first substrate (SSUB), a laser is irradiated on a desired light-emitting element (LE). The adhesive strength of the adhesive layer attached to the light-emitting element (LE) to which the laser has been irradiated may be reduced, resulting in physical or natural separation of the light-emitting element (LE) from the first substrate (SSUB).

[0297] After the first substrate (SSUB) is separated, residual particles (REP) may adhere to the organic layer (210) to which the adhesive material is adhered and the bottom surface of the through hole (210-H). If a connection electrode is formed on the top surface of the residual particles (REP), a conductivity problem may occur. In particular, if a connection electrode is formed while residual particles (REP) are generated on the bottom surface of the through hole (210-H) with a narrow contact area, the contact resistance may increase and the resistance dispersion may increase. Accordingly, there is a possibility that dark spots may be induced when the display panel is turned on, and the reliability of the display panel may be reduced.

[0298] Fifthly, referring to FIGS. 27 and 28, connecting holes (BH1, BH2) are formed and connecting electrodes (BE1, BE2) are formed. (S150 of FIG. 18)

[0299] A first sacrificial electrode (SFC1) exposed by a through hole (210-H) is etched to form a connection hole (BH1) penetrating the first sacrificial electrode (SFC1). In addition, a second sacrificial electrode (SFC2) exposed by the through hole (210-H) is etched to form a connection hole (BH2) penetrating the second sacrificial electrode (SFC2). The connection hole (BH1) and the connection hole (BH2) can be formed by wet etching, but are not limited thereto. Residual particles (REP) formed at the bottom of the through hole (210-H) can be removed by etching the sacrificial electrodes (SFC1, SFC2).

[0300] At this time, by controlling the etchant or etching time, the degree of etching of the sacrificial electrodes (SFC1, SFC2) can be controlled, and by stopping the etching after etching only the upper surface of the sacrificial electrodes (SFC1, SFC2), the sacrificial electrodes (SFC1, SFC2) can be avoided from being completely removed from the bottom of the connection hole (BH1) and the connection hole (BH2), as illustrated in Fig. 9. In this way, even when only the upper surface of the sacrificial electrodes (SFC1, SFC2) is etched, no residual particles (REP) remain at the bottom of the connection hole (BH1) and the connection hole (BH2).

[0301] Then, referring to FIG. 28, first connection electrodes (BE1) for connecting the first contact electrode (CTE1) and the pixel electrode (PXE) of the light-emitting element (LE) disposed on the organic layer (210) and second connection electrodes (BE2) for connecting the second contact electrode (CTE2) and the common electrode (PXE) are formed.

[0302] The first connection electrodes (BE1) contact the bottom of the first connection hole (BH1). As described with reference to Fig. 27, no residual particles (REP) remain on the bottom of the first connection hole (BH1), so the first connection electrodes (BE1) can contact the first reflective electrode (SRF1) without being lifted.

[0303] In this way, the second connection electrodes (BE2) contact the bottom of the second connection hole (BH2). As described with reference to Fig. 27, since no residual particles (REP) remain on the bottom of the second connection hole (BH2), the second connection electrodes (BE2) can contact the second reflective electrode (SRF2) without being lifted. This minimizes or prevents the possibility of dark spots on the display panel.

[0304] Sixth, an organic film, a light-shielding layer, a wavelength conversion layer, a light-transmitting layer, and a color filter layer are formed sequentially. (S160 of Fig. 18)

[0305] Referring to FIG. 29, a second organic film (211) and a third organic film (212) are formed to fix the light emitting elements (LEs) and to flatten the steps caused by the light emitting elements (LEs).

[0306] Then, as shown in FIG. 30, a first capping layer (CPL1) is formed on the third organic film (212) and the light-emitting elements (LE), and a first light-blocking layer (BM1) and a second light-blocking layer (BM2) are formed on the first capping layer (CPL1) so as not to overlap with the light-emitting elements (LE) in the third direction (DR3). Then, a second capping layer (CPL2) covering the first light-blocking layer (BM1), the second light-blocking layer (BM2), and the first capping layer (CPL1) is formed. Then, a reflective film (RF) is formed covering the second capping layer (CPL2) disposed on the first light-blocking layer (BM1) and the second light-blocking layer (BM2).

[0307] Then, a first light conversion layer (QDL1) is formed on each of the first sub-pixels (SPX1), a second light conversion layer (QDL2) is formed on each of the second sub-pixels (SPX2), and a light transmitting layer (TPL) is formed on each of the third sub-pixels (SPX3). Then, a third capping layer (CPL3) is formed to cover the first light conversion layers (QDL1), the second light conversion layers (QDL2), and the light transmitting layers (TPL). Then, a fourth organic film (213) is formed on the third capping layer (CPL3).

[0308] Then, a first color filter (CF1) is formed on the fourth organic film (213) to overlap the first light conversion layers (QDL1) in the third direction (DR3), a second color filter (CF2) is formed to overlap the second light conversion layers (QDL2) in the third direction (DR3), and a third color filter (CF3) is formed to overlap the light transmitting layers (TPL) in the third direction (DR3). The first color filter (CF1), the second color filter (CF2), and the third color filter (CF3) can all be formed in the region overlapping the first light-blocking layer (BM1) and the second light-blocking layer (BM2) in the third direction (DR3).

[0309] Then, a fifth organic film (214) is formed on the first color filter (CF1), the second color filter (CF2), and the third color filter (CF3).

[0310] FIG. 31 and FIG. 32 are exemplary drawings for explaining another method of step 150 of FIG. 18.

[0311] Referring to FIGS. 31 and 32, a first connection hole (BH1) and a second connection hole (BH2) having a step structure in which the diameter gradually increases upward as described with reference to FIG. 8 are formed, and connection electrodes (BE1, BE2) are formed. (S150 of FIG. 18)

[0312] The bottoms of the first connection hole (BH1) and the second connection hole (BH2) are open, and a photoresist is formed to cover both the organic layer (210) and the side electrodes (CTE1, CTE2) of the light-emitting element (LE). A portion of the bottoms (upper portions of the sacrificial electrodes (SFC1, SFC2)) of the first connection hole (BH1) and the second connection hole (BH2) is covered by the thickness of the photoresist covering the side surfaces of the organic layer (210). For example, the diameter of the bottoms (upper portions of the sacrificial electrodes (SFC1, SFC2)) of the connection holes (BH1, BH2) may be about 10 μm, and the diameter of the bottoms exposed by the photoresist may be about 4.5 μm, but is not limited thereto.

[0313] The bottom of the connection hole (BH1, BH2) not covered by the photoresist (sacrificial electrode (SFC1, SFC2)) can be wet-etched. The second chemical used in wet-etching may react only to the sacrificial electrode (SFC1, SFC2) and not to the reflective electrode (SRF1, SRF2).

[0314] Accordingly, as illustrated in Fig. 32, the sacrificial electrodes (SFC1, SFC2) within the first connection hole (BH1) and the second connection hole (BH2) can be etched to expose the reflective electrodes (SRF1, SRF2). Thereafter, the photoresist is removed, so that the upper portions of the sacrificial electrodes (SFC1, SFC2) that were covered by the photoresist are partially exposed. Residual particles (REP) may remain on the upper portions of the sacrificial electrodes (SFC1, SFC2) thus exposed.

[0315] Thereafter, as described with reference to FIGS. 29 and 30, an organic film, a light-shielding layer, a wavelength conversion layer, a light-transmitting layer, and a color filter layer are sequentially formed. (S160 of FIG. 18) The description described with reference to FIGS. 29 and 30 will not be repeated.

[0316]

[0317] FIG. 33 is an exemplary drawing showing a smartwatch including a display device according to one embodiment.

[0318] Referring to FIG. 33, a display device (10_1) according to one embodiment can be applied to a smart watch (1000_1), which is one of the smart devices.

[0319] FIGS. 34 and 35 are exemplary drawings showing a virtual reality device including a display device according to one embodiment.

[0320] Referring to FIGS. 34 and 35, a head-mounted display device (1000_2) according to one embodiment includes a first display device (10_2), a second display device (10_3), a display device storage unit (1100), a storage unit cover (1200), a first eyepiece lens (1210), a second eyepiece lens (1220), a head-mounted band (1300), a middle frame (1400), a first optical member (1510), a second optical member (1520), and a control circuit board (1600).

[0321] The first display device (10_2) provides an image to the user's left eye, and the second display device (10_3) provides an image to the user's right eye. Since each of the first display device (10_2) and the second display device (10_3) is substantially the same as the display device (10) described in conjunction with FIGS. 1 and 2, descriptions of the first display device (10_2) and the second display device (10_3) are omitted.

[0322] The first optical member (1510) may be positioned between the first display device (10_2) and the first eyepiece lens (1210). The second optical member (1520) may be positioned between the second display device (10_3) and the second eyepiece lens (1220). Each of the first optical member (1510) and the second optical member (1520) may include at least one convex lens.

[0323] The middle frame (1400) is disposed between the first display device (10_2) and the control circuit board (1600), and may be disposed between the second display device (10_3) and the control circuit board (1600). The middle frame (1400) serves to support and fix the first display device (10_2), the second display device (10_3), and the control circuit board (1600).

[0324] The control circuit board (1600) may be placed between the middle frame (1400) and the display device housing (1100). The control circuit board (1600) may be connected to the first display device (10_2) and the second display device (10_3) via connectors. The control circuit board (1600) may convert an image source input from the outside into digital video data (DATA) and transmit the digital video data (DATA) to the first display device (10_2) and the second display device (10_3) via the connectors.

[0325] The control circuit board (1600) can transmit digital video data (DATA) corresponding to a left-eye image optimized for the user's left eye to the first display device (10_2) and digital video data (DATA) corresponding to a right-eye image optimized for the user's right eye to the second display device (10_3). Alternatively, the control circuit board (1600) can transmit the same digital video data (DATA) to the first display device (10_2) and the second display device (10_3).

[0326] The display device storage unit (1100) serves to store the first display device (10_2), the second display device (10_3), the middle frame (1400), the first optical member (1510), the second optical member (1520), and the control circuit board (1600). The storage unit cover (1200) is arranged to cover an open surface of the display device storage unit (1100). The storage unit cover (1200) may include a first eyepiece (1210) for the user's left eye and a second eyepiece (1220) for the user's right eye. In FIGS. 33 and 34, the first eyepiece (1210) and the second eyepiece (1220) are separately arranged, but the embodiment of the present specification is not limited thereto. The first eyepiece (1210) and the second eyepiece (1220) may be combined into one.

[0327] The first eyepiece (1210) can be aligned with the first display device (10_2) and the first optical member (1510), and the second eyepiece (1220) can be aligned with the second display device (10_3) and the second optical member (1520). Accordingly, the user can view the image of the first display device (10_2) enlarged into a virtual image by the first optical member (1510) through the first eyepiece (1210), and can view the image of the second display device (10_3) enlarged into a virtual image by the second optical member (1520) through the second eyepiece (1220).

[0328] The head-mounted band (1300) serves to secure the display device storage unit (1100) to the user's head so that the first eyepiece (1210) and the second eyepiece (1220) of the storage unit cover (1200) can be positioned respectively for the user's left and right eyes. If the display device storage unit (1200) is implemented in a lightweight and compact form, the head-mounted display device (1000) may be equipped with a glasses frame as shown in FIG. 35 instead of the head-mounted band (800).

[0329] In addition, the head-mounted display device (1000) may further include a battery for supplying power, an external memory slot for storing external memory, and an external connection port and wireless communication module for receiving a video source. The external connection port may be a USB (universe serial bus) terminal, a display port, or an HDMI (high-definition multimedia interface) terminal, and the wireless communication module may be a 5G communication module, a 4G communication module, a Wi-Fi module, or a Bluetooth module.

[0330] Fig. 36 is an exemplary drawing showing a virtual reality device including a display device according to another embodiment. Fig. 36 shows a virtual reality device (1000_3) to which a display device (10_4) according to one embodiment is applied.

[0331] Referring to FIG. 36, a virtual reality device (1000_3) according to one embodiment may be a device in the form of glasses. The virtual reality device (1000_3) according to one embodiment may include a display device (10_4), a left-eye lens (10a), a right-eye lens (10b), a support frame (20), glasses frame legs (30a, 30b), a reflective member (40), and a display device storage unit (50).

[0332] In Fig. 36, it is exemplified that the virtual reality device (1000_3) is a glasses-type display device including glasses frame legs (30a, 30b). That is, the virtual reality device (1000_3) according to one embodiment is not limited to that illustrated in Fig. 36, and can be applied in various forms in various other electronic devices.

[0333] The display device housing (50) may include a display device (10_4) and a reflective member (40). An image displayed on the display device (10_4) may be reflected by the reflective member (40) and provided to the user's right eye through the right eye lens (10b). As a result, the user may view a virtual reality image displayed on the display device (10_4) through the right eye.

[0334] In FIG. 36, the display device housing (50) is exemplified as being arranged at the right end of the support frame (20), but the embodiment of the present specification is not limited thereto. For example, the display device housing (50) may be arranged at the left end of the support frame (20), in which case the image displayed on the display device (10_4) may be reflected by the reflective member (40) and provided to the user's left eye through the left eye lens (10a). As a result, the user may view the virtual reality image displayed on the display device (10_4) through the left eye. Alternatively, the display device housing (50) may be arranged at both the left end and the right end of the support frame (20), in which case the user may view the virtual reality image displayed on the display device (10_4) through both the left eye and the right eye.

[0335] Fig. 37 is an exemplary drawing showing an automobile instrument panel and center fascia including display devices according to one embodiment. Fig. 37 shows an automobile to which display devices (10_a, 10_b, 10_c, 10_d, 10_e) according to one embodiment are applied.

[0336] Referring to FIG. 37, display devices (10_a, 10_b, 10_c) according to one embodiment may be applied to a dashboard of a vehicle, a center fascia of a vehicle, or a CID (Center Information Display) placed on a dashboard of a vehicle. In addition, display devices (10_d, 10_e) according to one embodiment may be applied to a room mirror display that replaces a side mirror of a vehicle.

[0337] FIG. 38 is an exemplary drawing showing a transparent display device including a display device according to one embodiment.

[0338] Referring to FIG. 38, a display device (10_5) according to one embodiment can be applied to a transparent display device. The transparent display device can display an image (IM) and transmit light at the same time. Therefore, a user positioned at the front of the transparent display device can not only view the image (IM) displayed on the display device (10_5), but also view an object (RS) or background positioned at the back of the transparent display device. When the display device (10_5) is applied to a transparent display device, the substrate of the display device (10_5) can include a light-transmitting portion that can transmit light or can be formed of a material that can transmit light.

[0339] Although embodiments of the present invention have been described with reference to the attached drawings, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without altering the technical spirit or essential characteristics of the present invention. Therefore, the embodiments described above should be understood to be illustrative in all respects and not restrictive.

Claims

substrate; A pixel electrode and a common electrode arranged on the substrate; A first reflective electrode and a second reflective electrode respectively disposed on the pixel electrode and the common electrode; A first sacrificial electrode and a second sacrificial electrode disposed on the first and second reflective electrodes; An organic layer disposed on the first sacrificial electrode and the second sacrificial electrode; A light emitting element disposed on the organic layer, the light emitting element including a semiconductor stack and first and second contact electrodes; A first connection electrode connecting the pixel electrode and the first contact electrode through a first connection hole formed in the organic layer and the first sacrificial electrode; and A display device including a second connection electrode connecting the common electrode and the second contact electrode through a second connection hole formed in the organic layer and the second sacrificial electrode. In the first paragraph, The first connecting hole penetrates the organic layer and the first sacrificial electrode to expose the first reflective electrode, A display device in which the second connecting hole penetrates the organic layer and the second sacrificial electrode to expose the second reflective electrode. In the first paragraph, The first connecting hole is defined by a groove penetrating the organic layer and recessed downward on the first sacrificial electrode, A display device in which the second connecting hole penetrates the organic layer and is defined by a groove recessed downward on the second sacrificial electrode. In the first paragraph, A display device in which the first connecting hole and the second connecting hole have a stepped structure in which the diameter increases as it goes up. In paragraph 4, A display device in which the first connection hole and the second connection hole form step portions in which the upper surfaces of the reflective electrode, the sacrificial electrode, and the organic layer are placed horizontally at each step of the step structure. In the first paragraph, Further comprising a device sacrificial electrode disposed between the organic layer and the first contact electrode and the second contact electrode of the light-emitting device, A display device in which the above-mentioned element sacrificial electrode completely overlaps one side of the above-mentioned light-emitting element. In the first paragraph, The above light emitting element, A conductive layer disposed between the organic layer and the semiconductor stack; and Further comprising a protective film disposed on the side surfaces of the above conductive layer and the side surfaces of the above semiconductor stack, The first contact electrode is disposed on the protective film and is connected to the conductive layer that is exposed and not covered by the protective film, A display device in which the second contact electrode is disposed on a protective film and is disposed in a hole penetrating the conductive layer and a portion of the semiconductor stack. In the first paragraph, The above semiconductor stack, A first semiconductor layer disposed on the organic layer and including a semiconductor material layer doped with a first conductive dopant; An active layer disposed on the first semiconductor layer; and It further comprises a second semiconductor layer disposed on the above active layer and including a semiconductor material layer doped with a second conductive dopant, The first contact electrode is disposed on the first side of the first semiconductor layer and the first side of the active layer, and is disposed on a portion of the first side of the second semiconductor layer. A display device in which the second contact electrode is disposed on the second side of the first semiconductor layer and the second side of the active layer, and is disposed on a portion of the second side of the second semiconductor layer. substrate; A pixel electrode and a common electrode arranged on the substrate; A first reflective electrode and a second reflective electrode respectively disposed on the pixel electrode and the common electrode; A first sacrificial electrode disposed on the first reflective electrode and exposing a portion of an upper surface of the first reflective electrode, and a second sacrificial electrode disposed on the second reflective electrode and exposing a portion of an upper surface of the second reflective electrode; An organic layer disposed on the first sacrificial electrode and the second sacrificial electrode; A light emitting element disposed on the organic layer, the light emitting element including a semiconductor stack and first and second contact electrodes; A first connecting electrode connecting the pixel electrode and the first contact electrode and connected to a portion of the upper surface of the first reflective electrode; and A display device comprising a second connecting electrode connecting the common electrode and the second contact electrode and connected to a portion of the upper surface of the second reflective electrode. substrate; A pixel electrode disposed on the substrate; Reflective electrodes each disposed on the pixel electrode; A sacrificial electrode placed on the above reflective electrode; an organic layer disposed on the sacrificial electrode; and A light emitting element disposed on the organic layer, comprising a semiconductor stack and a contact electrode; A display device including a connecting electrode connecting the pixel electrode and the contact electrode through a connecting hole formed in the organic layer and the sacrificial electrode. In Article 10, A display device in which the above connecting hole penetrates the organic layer and the sacrificial electrode to expose the reflective electrode. In Article 10, A display device in which the above connecting hole penetrates the organic layer and is defined by a groove recessed downward on the sacrificial electrode. In Article 10, The above light emitting element. Further comprising a protective film disposed on the side of the semiconductor stack, A display device in which the above contact electrode is disposed on the protective film. In Article 10, The above semiconductor stack, A first semiconductor layer disposed on the organic layer and including a semiconductor material layer doped with a first conductive dopant; An active layer disposed on the first semiconductor layer; and It further comprises a second semiconductor layer disposed on the above active layer and including a semiconductor material layer doped with a second conductive dopant, A display device in which the contact electrode is disposed on the entire side surface of the first semiconductor layer and the entire side surface of the active layer, and on a portion of the side surface of the second semiconductor layer. A step of preparing a light-emitting element including a semiconductor stack and a first contact electrode and a second contact electrode; A step of forming a first reflective electrode and a second reflective electrode and a first sacrificial electrode and a second sacrificial electrode sequentially stacked on a substrate on which a pixel electrode and a common electrode are arranged, respectively; A step of forming an organic layer defining a through hole on the first sacrificial electrode and the second sacrificial electrode; A step of transferring the light emitting elements onto the organic layer so that the first contact electrode and the second contact electrode of each of the light emitting elements face the pixel electrodes and the common electrodes; A step of forming a first connection hole and a second connection hole by etching the first sacrificial electrode and the second sacrificial electrode exposed by the above through hole; A method for manufacturing a display device, comprising the step of forming a first connecting electrode connecting the pixel electrode and the first contact electrode through the first connecting hole, and a second connecting electrode connecting the common electrode and the second contact electrode through the second connecting hole. In Article 15, In the step of forming the first reflective electrode and the second reflective electrode and the first sacrificial electrode and the second sacrificial electrode by sequentially stacking them, A step of depositing a reflective material layer on the entire surface of the substrate so as to cover both the pixel electrode and the common electrode; A step of depositing a sacrificial material layer on the entire surface of the substrate so as to cover the entire reflective material layer; A method for manufacturing a display device, comprising the step of forming the first reflective electrode and the second reflective electrode and the first sacrificial electrode and the second sacrificial electrode by partially etching the sacrificial material layer and the reflective material layer using a first chemical solution with which the first reflective electrode and the second reflective electrode and the first sacrificial electrode and the second sacrificial electrode react. In Article 15, In the step of transferring the light emitting elements onto the organic layer so that the first contact electrode and the second contact electrode of each of the light emitting elements face the pixel electrodes and the common electrodes, The light emitting elements are arranged on the organic layer so that the first contact electrode and the second contact electrode in each of the light emitting elements face the pixel electrodes and the common electrodes, and the light emitting elements are transferred onto the organic layer by thermally compressing the light emitting elements. A method for manufacturing a display device, wherein residual particles of the adhesive layer are formed on the organic layer and the first sacrificial electrode and the second sacrificial electrode exposed by the through hole by the thermocompression. In Article 17, In the step of forming a second connecting electrode connecting the common electrode and the second contact electrode through the second connecting hole, A method for manufacturing a display device in which residual particles formed on the upper portion of the first sacrificial electrode and the second sacrificial electrode exposed by the through hole are removed during etching of the first sacrificial electrode and the second sacrificial electrode. In Article 15, In the step of forming a second connecting electrode connecting the common electrode and the second contact electrode through the second connecting hole, The bottoms of the first connection hole and the second connection hole are opened, a photoresist is formed to cover the side surface of the organic layer, and wet etching is performed using the photoresist and the second chemical solution to form a step-structured connection hole whose diameter becomes wider as it goes up. A method for manufacturing a display device, wherein the second sacrificial solution is made of a material that reacts with the first sacrificial electrode and the second sacrificial electrode and does not react with the first reflective electrode and the second reflective electrode. In Article 19, The above first connection hole and the second connection hole form a step portion in which the upper surfaces of the reflective electrode, the sacrificial electrode and the organic layer are placed horizontally at each step of the step structure, A method for manufacturing a display device in which residual particles generated during the transfer of the light-emitting element remain on the step portion of the sacrificial electrode.

Images