Etching of a bottle-shaped feature
The method addresses pitting issues in poly gate cuts by using a directional etch, etch stop liner, and thermal isotropic etch to form a bottle-shaped feature, enhancing etching precision and device yield in FinFET and GAAFET fabrication.
Patent Information
- Application Number
- PCT/US2025/032239
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-06-21
- Filing Date
- 2025-06-04
- Publication Date
- 2025-12-26
AI Technical Summary
Existing etching processes for poly gate cuts in FinFET and GAAFET fabrication cause pitting of dummy oxide layers, leading to potential damage and overlay errors, which can impact device yield.
A method involving a first directional etch followed by an etch stop liner formation, then a second directional etch, and finally a thermal isotropic etch to form a bottle-shaped feature, using gases like F2/NO or XeF2 to selectively remove polysilicon while protecting the dummy oxide layer.
The method reduces pitting of dummy oxide layers, ensuring precise etching and minimizing damage, thereby improving device yield and reliability.
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Figure US2025032239_26122025_PF_FP_ABST
Abstract
Description
ETCHING OF A BOTTLE-SHAPED FEATUREBACKGROUND
[0001] The fabrication of integrated circuits on a substrate can involve the deposition, patterning, and etching of many material layers to form circuit structures. Etching processes are used to remove material from substrates. Some etching processes are anisotropic or directional, in that an etch rate is higher in one direction (e.g. a vertical direction, normal to a surface plane of the substrate) than in other directions (e.g. a horizontal direction, parallel to the surface plane of the substrate). Other etching processes are isotropic, in that etch rates in different directions are substantially similar.SUMMARY
[0002] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Furthermore, the claimed subject matter is not limited to implementations that solve any or all disadvantages noted in any part of this disclosure.
[0003] Examples are disclosed that relate to etching processes that utilize both directional etching and an isotropic etching to form a feature with a wider portion deeper within the feature, and a narrower portion closer to an opening of the feature. Such a feature can generally be described as bottle-shaped. The disclosed examples can be used to perform a poly gate cut etch in a FinFET (Fin Field Effect Transistor) or GAAFET (Gate All Around Field Effect Transistor) fabrication process, for example. One example provides a method of etching a feature into a material layer on a substrate. The method comprises forming a first portion of the feature by performing a first directional etch to a first depth in the material layer, forming an etch stop liner on sidewalls of the first portion of the feature, and forming a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by performing an isotropic etch.
[0004] In some such examples, performing the isotropic etch comprises performing a thermal isotropic etch.
[0005] Alternatively or additionally, in some such examples, the thermal isotropic etch is performed using a gas mix comprising a radical gas and a fluorine- containing species.
[0006] Alternatively or additionally, in some such examples, the radical gas is nitric oxide.
[0007] Alternatively or additionally, in some such examples, the gas mix further comprises a passivating agent.
[0008] Alternatively or additionally, in some such examples, the passivating agent comprises a halogen other than fluorine.
[0009] Alternatively or additionally, in some such examples, the thermal isotropic etch is performed using one or more of xenon difluoride or an interhalogen.
[0010] Alternatively or additionally, in some such examples, the isotropic etch utilizes radical species generated in a remote plasma.
[0011] Alternatively or additionally, in some such examples, the method is performed in a gate cut process, and the isotropic etch is performed to expose a dummy oxide of a gate structure.
[0012] Alternatively or additionally, in some such examples, the material layer comprises silicon, and the etch stop liner comprises a silicon-containing dielectric material.
[0013] Alternatively or additionally, in some such examples, forming the first portion of the feature, forming the etch stop liner, and forming the second portion of the feature are performed in a same processing chamber.
[0014] Another example provides a method of etching a feature in a substrate. The method comprises forming a first portion of the feature by performing a first directional etch to a first depth in a material layer on the substrate, the material layer comprising silicon. The method further comprises forming an etch stop liner on sidewalls of the first portion of the feature, the etch stop liner comprising a silicon- containing dielectric material. The method further comprises forming a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by performing a thermal isotropic etch.
[0015] In some such examples, the thermal isotropic etch is performed using a gas mix comprising a radical gas and a fluorine-containing species.
[0016] Alternatively or additionally, in some such examples, the radical gas is nitric oxide, and the fluorine-containing species is F2.
[0017] Alternatively or additionally, in some such examples, the gas mix further comprises a halogen other than fluorine as a passivating agent.
[0018] Alternatively or additionally, in some such examples, the thermal isotropic etch is performed using one or more of XeF2 or an interhalogen.
[0019] Another example provides a processing tool, comprising a processing chamber, a substrate holder in the processing chamber, a showerhead, flow control hardware configured to deliver processing chemicals to the showerhead, and power supply to form a plasma. The processing tool further comprises a controller comprising instructions executable to control the processing tool to perform a first directional etch to a first depth in a material layer of a substrate to form a first portion of a feature, instructions executable to control the processing tool to form an etch stop liner on sidewalls of the first portion of the feature, and instructions executable to control the processing tool to form a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by a thermal isotropic etch to widen the second portion of the feature beneath the etch stop liner.
[0020] In some such examples, the instructions executable to control the processing tool to perform the thermal isotropic etch comprise instructions executable to control the processing tool to perform the thermal isotropic etch using a gas mix comprising a radical gas and a fluorine-containing species.
[0021] Alternatively or additionally, in some such examples, the radical gas is nitric oxide.
[0022] Alternatively or additionally, in some such examples, the gas mix further comprises a passivating agent, the passivating agent comprises a halogen other than fluorine.BRIEF DESCRIPTION OF THE DRAWINGS
[0023] FIGS. 1A-1C schematically shows structures formed in a poly gate cut etch process that poses a risk of damaging a dummy oxide layer on a fin of a FinFET device being fabricated.
[0024] FIG. 2 illustrates overlay error in an etch according to the process of FIGS. 1A-1C.
[0025] FIGS. 3A-3D schematically show structures formed in a poly gate cut etch process according to the present disclosure.
[0026] FIG. 4 shows a flow diagram depicting an example method of performing an etching process.
[0027] FIG. 5 shows a schematic depiction of an example processing tool.
[0028] FIG. 6 shows a block diagram of an example computing system.DETAILED DESCRIPTION
[0029] As mentioned above, etching processes are used to remove material from a substrate. Directional (anisotropic) etching processes are used to etch in one direction at a higher rate than another direction. Directional etching processes can be used to form relatively narrow, deep features in a substrate. Directional etching processes often use a plasma to create ionic species from etching agents, and a bias to accelerate the ionic species toward a substrate. In this manner, etching can be controlled, for example, to etch in a vertical direction (normal to a substrate surface plane) at a higher rate than in a horizontal direction (parallel to a substrate surface plane). In contrast, isotropic etching processes are used to etch in different directions at substantially similar rates. Isotropic etching can be performed using gas-phase radical species, for example. As radical species are not ionized, the radical species are not accelerated by an electric field, but instead diffuse to the substrate within a feature being etched, and thereby encounter the substrate surface in random directions, rather than in a biased direction.
[0030] One application for directional etching is a poly gate cut used in the fabrication of FinFET (Fin Field Effect Transistor) and GAAFET (Gate All Around Field Effect Transistor) manufacturing processes. The poly gate cut etching process removes material (e.g. polycrystalline silicon (“polysilicon”) from a region between adjacent fin structures in a FinFET process, or from between nanosheets (in a GAAFET) process. A directional etch can be used in a poly gate cut etching process. However, as described below, a directional etch can cause problems in a poly gate cut etching process.
[0031] FIGS. 1A-1C illustrate a directional etching process used to perform a poly gate cut etch in a FinFET fabrication process. First, FIG. 1 A shows a structure 100 that includes a substrate 102 with a plurality of fin structures 104. The fin structures 104 comprise silicon. For example, the fin structures can be formed from polycrystalline silicon (polysilicon) and / or silicon / germanium (SiGe) in variousexamples. The fin structures 104 include a dummy oxide layer 106. The dummy oxide layer 106 can be used in later processing steps to form a gate oxide.
[0032] The fin structures 104, including the dummy oxide layer 106, are covered with a polysilicon layer 108. As part of the FinFET fabrication process, portions of the poly silicon layer 108 positioned between the fin structures 104 are removed to expose the dummy oxide layer 106. A directional etching process can be used to access and etch the portions of the poly silicon layer 108 between the fin structures 104.
[0033] FIG. 1A shows the structure after a first portion of directional etching has been performed to form a feature 110. Various directional etching methods can be used, including directional atomic layer etching (ALE) and reactive ion etching (RIE). A width of the feature 110 is defined by a patterned hard mask 111. In FIG. 1A, the feature is not yet as deep as a distal surface of the dummy oxide layer 106 (with reference to substrate 102). FIG. IB shows the structure 100 after additional etching has been performed. Here, a thin region of poly silicon remains between the feature 110 and each fin structure 104. Continued directional etching deepens the feature 110, as shown in FIG. 1C, and exposes the dummy oxide layer 106.
[0034] However, the exposure of the dummy oxide layer 106 using a plasmabased etching process can cause pitting of the dummy oxide layer 106. Further, overlay errors during directional etching also can cause damage to a dummy oxide layer in a poly gate cut process. The feature 110 that is etched in the poly gate cut etch process can have a width on the order of 10-20 nanometers (nm) and a depth on the order of 100 nm. Further, future technology nodes may involve spacings between fin structures that are less than 10 nm. With such closely spaced fin structures, an etch front of a directional etching process can “overlay” and therefore impinge a portion of a top surface of the dummy oxide layer of a fin structure. This again can result in pitting. Pitting of the dummy oxide layer can cause problems in later integration processes. Further, pitting can allow the etching chemistry to penetrate the dummy oxide layer, thereby potentially damaging the fin structure beneath the dummy oxide layer.
[0035] FIG. 2 shows a structure 200 illustrating an example of poly gate cut etching process that impinges a portion of a dummy oxide layer due to overlay. The structure 200 includes a substrate 202 having a plurality of fin structures 204. The fin structures include a dummy oxide layer 206. The fin structures 204, including the dummy oxide layer 206, are covered with a polysilicon layer 208. In this example, thedirectional etching process impinges an upper portion 210 of a fin structure 204. This impingement gives rise to a risk of pitting of the dummy oxide layer. As mentioned above, such pitting can be vulnerable to further damage in later processing steps, and thereby can impact device yield.
[0036] In view of the above issues, examples are disclosed that relate to etching processes that can avoid pitting of a dummy oxide layer during a poly gate cut etching process. Briefly, the disclosed examples form a first portion of an etched feature by performing a first directional etch through a material layer (e.g. polysilicon) to a first depth in the material layer. The first portion of the etched feature has a width that is narrower than the spacing between fin structures or nanosheets of a device being fabricated. Further, an etch stop liner is formed on a sidewalls of the first portion of the etched feature. The etch stop liner is formed from a material that is highly resistant to the etching chemistry being used.. The etch stop liner can be formed during the first directional etch, after the first directional etch, or both during and after the first directional etch.
[0037] The first portion of the etched feature, including the etch stop liner, can extend to a depth that is relatively close to or at a depth of a distal end of the fin structures or nanosheets respectively of a FinFET or GAAFET device being fabricated. The etch stop liner helps to prevent the directional etching process from impinging a upper surface of a dummy oxide layer on a gate or nanosheet structure as the directional etching process continues.
[0038] Thus, after forming the first portion of the etched feature and passivating the sidewalls of the first portion of the etched feature with the etch stop liner, a second directional etch to a second depth in the material layer is performed, followed by an isotropic etch. The etch stop liner of the first portion of the feature defines a width of the second directional etch, and thereby helps to protect the dummy oxide layer on adjacent fin structures from being damaged during the second directional etch. Following the second directional etch, an isotropic etch is performed to remove polysilicon from between the fin structures. The etch stop liner protects the sidewalls of the first portion of the etched feature during the isotropic etch.
[0039] As described in more detail below, the isotropic etch is configured to avoid causing pitting in the dummy oxide. In some examples, the isotropic etch can be performed using a thermal isotropic etch. Further, in some examples, a passivating agent can be used to further help avoid pitting. Example chemistries that can be used toperform a thermal isotropic etch of polysilicon are described below. The geometry of a feature formed by the disclosed example etching processes can resemble a bottle, with a narrower “neck” portion formed by the first directional etch, and a wider “body” formed by the second directional etch and the isotropic etch.
[0040] FIGS. 3A-3D illustrate an example etching process according to the present disclosure. FIG. 3A shows a structure 300 that includes a substrate 302 with a plurality of fin structures 304. The fin structures 304 include a dummy oxide layer 306. The fin structures 304, including the dummy oxide layer 306, are covered with a polysilicon layer 308. FIG. 3 A shows the structure after a first directional etch has been performed to form a first portion 309 of a feature 310. The first portion of the feature 309 is represented by a bracket showing a depth to which the first directional etch reached. Various directional etching methods can be used, including anisotropic atomic layer etching (ALE) and reactive ion etching (RIE). A width of the first portion 309 of the feature 310 is defined by a patterned hard mask 311.
[0041] The first portion 309 of the feature 310 is etched to a depth selected based at least upon a depth of a distal end of the fin structures 304 in the polysilicon layer 308. Further, the width of the first portion 309 of the feature 3 lOis narrower than the space between the fin structures 304. Next referring to FIG. 3B, an etch stop liner 312 is formed on the sidewalls of the first portion 309 of the feature 310. The etch stop liner 312 helps to prevent widening of the first portion 309 of the feature 310s as additional directional etching is subsequently performed. This helps to prevent overlay errors arising from the etch process impinging the distal ends of the fin structures 304.
[0042] In the example of FIGS. 3A-3B, the etch stop liner is formed after the first portion 309 of the feature 310 has been directionally etched. In other examples, the etch stop liner alternatively or additionally can be formed during the directional etching process. The etch stop liner can be formed, for example, by exposing the exposed polysilicon of the sidewalls of the first portion 309 of the feature 310 to a liner-forming substance. In some examples, the liner-forming substance can include oxygen to form a silicon dioxide etch stop liner. Example oxygen-containing liner-forming substances include molecular oxygen (O2), water vapor (H2O), various nitrogen oxides (e.g. nitrous oxide (N2O)), carbon oxides (e.g. carbon monoxide (CO) and carbon dioxide (CO2)), hydrogen peroxide (H2O2), and ozone (O3). The liner-forming substance can be introduced into a plasma to form reactive oxygen-containing species. The reactive oxygen-containing species then react with the polysilicon to form silicon dioxide.Alternatively or additionally, the liner-forming substance can include nitrogen to form a silicon nitride liner or a silicon oxynitride liner. Example liner-forming substances containing nitrogen include molecular nitrogen (N2), ammonia (NH3), and hydrazine (N2H4). The etch stop liner can have any suitable thickness. Suitable thicknesses include thicknesses in a range of 0.5 - 1.5 nm.
[0043] As mentioned above, a liner-forming substance(s) can be introduced into the plasma used to perform the first directional etch to form the liner during the first directional etch. As a more specific example, molecular oxygen can be included in a plasma used to perform the first directional etch. The molecular oxygen can react with silicon-containing byproducts (e.g. silicon halides) formed in the etching process, and / or react directly with the polysilicon sidewall.
[0044] After forming the first portion 309 of the feature 310 and the etch stop liner 312, a second portion 314 of the feature 310 is formed. The second portion 314 of the feature 310 is represented by a bracket showing a depth through which the second directional etch extended. Referring to FIG. 3C, forming the second portion of the feature comprises performing a second directional etch to extend the feature 310 between the fin structures 304. As described above for the first directional etch, the second directional etch can utilize any suitable process, such as directional ALE or RIE.
[0045] However, unlike the first portion 309 of the feature 310, no etch stop liner is formed in the second portion 314 of the feature 310. Instead, referring next to FIG. 3D, an isotropic etch is performed to widen the second portion 314 of the feature 310 to expose the dummy oxide layer 306 on the fin structures 304. Various chemistries can be used to perform the isotropic etch. In some examples, the isotropic etch can be performed thermally, without the use of a plasma. As one example, a mixture of a radical gas and a fluorine-containing species can be used to perform the isotropic etch. As a more particular example, nitric oxide (NO) and molecular fluorine (F2) can be used to perform the isotropic etch. Nitric oxide has a lone electron on the nitrogen atom, and thus is a radical gas. The lone electron of nitric oxide can react with the F2 to form fluorine radicals. The fluorine radicals then can react with the polysilicon to etch the polysilicon. In other examples, other radical gases and / or other fluorine-containing species can be used.
[0046] Any suitable temperatures and pressures can be used to perform the thermal isotropic etch. For example, where a F2 / NO etch is used, a temperature within a range of 90-140 degrees Celsius can be used. Further, in some examples, the pressurein the processing chamber during the isotropic etching can be within a range of 500 millitorr (mTorr) to 10 Torr. In yet other examples, one or more conditions outside of these ranges can be used. In addition to the F2 and NO, other gases also may be used during the thermal isotropic etch. Examples include various inert gases, such as carrier gases for other components. Example inert gases that can be used during thermal isotropic etching include helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe), and molecular nitrogen (N2).
[0047] The selectivity of an NO / F2 etching process to SiO2:poly silicon can be on the order of 1000: 1. Thus, the thermal isotropic etch used in forming the second portion 314 of the feature 310 is highly selective to the polysilicon with regard to a silicon dioxide etch stop liner 312 and the dummy oxide layer 306. This selectivity can potentially be increased by adding a passivating agent to the thermal isotropic etching chemistry. It is possible that the passivating agent can compete with fluorine to react with dangling silicon bonds of the etch stop liner during the thermal isotropic etch process, and thereby help to slow the etching of the etch stop liner by the thermal isotropic etching chemistry. As one example, molecular chlorine (Ch) can be added to a F2 / NO thermal isotropic etch. Adding Ch to a F2 / NO etching process can result in a SiO2:polysilicon selectivity of approximately 4500: 1. However, the etch rage may be reduced by adding the passivating agent.
[0048] Other example etching agents for use in the isotropic thermal etching process can be used without the radical gas. As one example, xenon difluoride (XeF2) can be used as an etching agent for the thermal isotropic etch. Xenon difluoride can have a polysilicon:SiO2 selectivity on the order of 5000: 1. Further, xenon difluoride etching can be performed at relatively low temperatures, including in cryoetching processes that cool a substrate during etching. As undiluted xenon difluoride can etch polysilicon at high rates, dilution of the xenon difluoride can be used to achieve a desired lower etch rate. Example temperatures for performing a thermal isotropic etch with xenon difluoride include temperatures within a range of -40 to 140 °C.
[0049] Other examples of etching agents for use in the isotropic thermal etch include interhalogens. Example interhalogens include chlorine monofluoride (C1F), chlorine trifluoride (CIF3), bromine trifluoride (BrFs), bromine pentafluoride (BrFs), iodine trifluoride (IF3), and iodine pentafluoride (IFs). The fluorine in such interhalogens can be used to etch the polysilicon. Further, the chlorine, bromine, oriodine may have a passivating effect, as described above for CI2 when used in a F2 / NO thermal isotropic etch process.
[0050] The use of a thermal isotropic etch process to expose the dummy oxide layer 306 in the second portion 314 of the feature 310 avoids exposing the dummy oxide layer 306 to energetic ions, unlike plasma etching. As such, the thermal isotropic etch can expose the dummy oxide layer 306 with less, or no, pitting of the dummy oxide layer 306 compared to plasma etching. Nevertheless, in some examples, a remote plasma source can be used to generate radicals to activate the fluorine-containing species by forming fluorine radicals, instead of or in addition to using a radical gas such as nitric oxide.
[0051] In experiments, it was found that thermal etching using F2 / NO / CI2 and XeF2 resulted in no pitting to a silicon dioxide layer when removing lOOnm, 300nm, and 500nm of a polysilicon layer, using etching conditions within the ranges given above. Further, thermal etching using F2 / NO without a passivating agent showed no silicon dioxide pitting after lOOnm of etching of the poly silicon layer, but did show pitting at 300nm and 500nm. Thus, these processes can be used to remove polysilicon and expose a dummy oxide layer with a reduced risk of pitting of the dummy oxide layer compared to a plasma-based etch.
[0052] FIG. 4 shows a flow diagram illustrating an example method 400 for etching a feature. Method 400 can be used to perform a poly gate cut etch process, for example. Method 400 comprises, at 402, forming a first portion of a feature by performing a first directional etch to a first depth in the material layer. The first directional etch can use directional ALE, RIE, or other suitable etching process. In some examples, the material layer can be polysilicon. In other examples, the material layer can be another material.
[0053] Method 400 further comprises, at 404, forming an etch stop liner on sidewalls of the first portion of the feature. Where the material layer comprises polysilicon, the etch stop liner can comprise a silicon-containing dielectric layer. As described above, the etch stop liner can be formed, for example, by exposing the exposed polysilicon of the sidewalls of the first portion 309 of the feature 310 to a linerforming substance. In some examples, the liner-forming substance can include oxygen to form a silicon dioxide etch stop liner. Example oxygen-containing liner-forming substances include molecular oxygen (O2), water vapor (H2O), various nitrogen oxides (e.g. nitrous oxide (N2O)), carbon dioxide (CO2), hydrogen peroxide (H2O2), and ozone(O3). The liner-forming substance can be introduced into a plasma to form reactive oxygen-containing species. The reactive oxygen-containing species then react with the polysilicon to form silicon dioxide. Alternatively or additionally, the liner-forming substance can include nitrogen to form a silicon nitride liner or a silicon oxynitride liner. Example liner-forming substances containing nitrogen include molecular nitrogen (N2), ammonia (NH3), and hydrazine (N2H4). The liner-forming substance(s) can be introduced into a plasma during the first directional etch to form the liner during the first directional etch, for example, by reacting with byproducts of the etching process used to perform the first directional etch.
[0054] Continuing, method 400 comprises, at 406, forming a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by performing an isotropic etch. Where method 400 is used in a poly gate cut etch process, the second portion of the feature can expose a dummy oxide on fin structures or nanosheets respectively of a FinFET or GAAFET device being fabricated. The resulting feature has a bottle-shaped cross-sectional profile, such that the first portion of the feature has a narrower width, and the second portion of the feature has a wider width.
[0055] As shown at 408, in some examples, the isotropic etch can be a thermal isotropic etch, performed without a plasma. Where polysilicon is being etched, the thermal isotropic etch can be performed using a gas mix comprising a radical gas and a fluorine-containing species. An example radical gas is nitric oxide. The radical gas can react with a fluorine bond in the fluorine-containing species to form reactive fluorine species, such as fluorine radicals. The fluorine radicals then can react with the polysilicon to etch the polysilicon. In other examples, the radical gas can be formed in a remote plasma.
[0056] In some such examples, the gas mix can further comprise a passivating agent. The passivating agent can compete with fluorine to react with dangling silicon bonds on the dummy oxide layer as the dummy oxide layer is exposed. This can help to increase an etch selectivity of the radical gas / etching chemistry relative to the same etching chemistry used without a passivating agent. In some examples, the passivating agent can comprise a halogen other than fluorine. Example passivating agent can include Ch, Brc, and I2. In other examples where polysilicon is being etched, the thermal isotropic etch is performed using one or more of XeF2 or an interhalogen.
[0057] In some examples, forming the first portion of the feature, forming the etch stop liner, and forming the second portion of the feature are performed in a same processing chamber. Performing these processes in a same processing chamber can be more efficient than performing one or more of these processes in a different processing chamber. However, in other examples, one or more of these processes can be performed in a different processing chamber than one or more of these processes.
[0058] FIG. 5 schematically shows a processing tool that can be used to etch a feature in a substrate. The processing tool 500 can be configured for thermal etching, plasma etching, and / or other substrate processes.
[0059] The processing tool 500 comprises a processing chamber 502 including a showerhead 504. The processing tool 500 further includes a substrate support 506. During operation, a substrate 507 is positioned on the substrate support 506. The substrate support 506 comprises a substrate heater 508. In other examples, a heater can be omitted, or can be located elsewhere within processing chamber 502. Further, in some examples, a substrate holder can include a chiller to perform cryoetching.
[0060] The processing tool 500 further comprises flow control hardware 510. The flow control hardware 510 connects processing chemical source(s) to the processing chamber. In the depicted example, the flow control hardware 510 connects one or more etching agents 512, one or more liner-forming substance source(s) 514, one or more inert gas source(s) 516, and optionally one or more passivating agent(s) 518 to the processing chamber 502 and to a plasma chamber 520. The flow control hardware 510 can include any suitable components. Examples include mass flow controllers, valves, and conduits.
[0061] Reactive species formed in the plasma chamber 520 pass through the showerhead 504 toward substrate 507. Additionally or alternatively, processing chemicals can be introduced into processing chamber 502 through showerhead 504, as indicated at 524.
[0062] The etching agent(s) 512 can comprise any suitable chemicals that can react, alone or in combination, with a material to be removed from a substrate to form a volatile product. The etching agent(s)_512 can include etching agents for plasma etching processes, and etching agents for thermal etching processes. Examples of etching agents include halogen-containing etchants, such as fluorine-containing etchants, chlorine-containing etchants, bromine-containing etchants, and / or interhalogens. More specific examples of etching agent(s) include hydrogen bromide(HBr), hydrogen chloride (HC1), Ch, F2, NO, XeF2, interhalogens, hydrogen fluoride (HF), nitrogen trifluoride (NF3), sulfur hexafluoride (SFe), tungsten hexafluoride (WFe), molybdenum hexafluoride (MoFe), fluorocarbons, and fluorohydrocarbons. Example interhalogens include C1F, CIF3, BrFs, BrFs, IF3, and IFs. As described above, a mixture of F2 and NO can be used to perform a thermal isotropic etch. XeF2 and / or an interhalogen also can be used to perform a thermal isotropic etch.
[0063] In some examples, one or more passivating agent(s) 518 can be used with an etching agent to help prevent pitting of a dielectric material. The passivating agent can compete with fluorine to react with dangling bonds in the dielectric material (e.g. dangling silicon bonds in SiO2 or Si3N4). This can help to increase a selectivity of a thermal isotropic etching process compared to omitting the passivating agent. Example passivating agents that can be used with an F2 and NO gas mixture include Ch, Br2, and I2. Further, an interhalogen comprising fluorine and another halogen can provide both fluorine for etching and another halogen for passivation.
[0064] The liner-forming substance source(s) 514 can comprise any suitable substance that can form an etch stop liner that is suitably selective to etching chemistry used in subsequent directional and isotropic etching processes. Where polysilicon is being etched, example liner-forming substances include oxygen-containing substances. Example oxygen-containing substances can include oxygen gas (O2), ozone (O3), carbon oxides (e.g. carbon dioxide (CO2) and carbon monoxide (CO)), nitrogen oxides (e.g. nitrous oxide (N2O)), water vapor (H2O), and hydrogen peroxide (H2O2).
[0065] The inert gas source(s) 516 can comprise any suitable inert gases. Inert gases can be used, for example, as a carrier gas in a directional or isotropic etching process. Example inert gases include helium (He), neon (Ne), argon (Ar), krypton (Kr), xenon (Xe), and in some processes (e.g. processes that omit a plasma, such as a thermal isotropic etch), nitrogen (N2).
[0066] The processing tool 500 further comprises an exhaust system 526. The exhaust system 526 is configured to exhaust gases from the processing chamber 502. The exhaust system 526 can comprise any suitable hardware, including one or more low vacuum pumps, one or more high vacuum pumps, and one or more valves for controlling an exhaust flow. Together, flow control hardware 510 and exhaust system 526 can be operated to achieve a selected pressure in processing chamber 502 during substrate processing. Further, flow control hardware 510 and exhaust system 526 can be operated to purge processing chamber 502.
[0067] The processing tool 500 further includes a radio frequency (RF) inductive coil 528. The inductive coil 528 is used to form a transformer coupled plasma (TCP). The TCP can form reactive species from etching agents and liner-forming substances introduced into the TCP. In other examples, a processing tool may be configured to generate a capacitively coupled plasma (CCP), in-situ (at a processing station) or remotely.
[0068] The processing tool 500 further comprises a radiofrequency (RF) power source 530 that is electrically connected to RF inductive coil 528. RF power source 530 is configured to form a TCP using a gas mixture. The processing tool 500 further includes a matching network 532 for impedance matching of the RF power source 530. The RF power source 530 can be configured to provide RF energy of any suitable frequency and power. Examples of suitable frequencies include frequencies in a range from 0.3 MHz to 10 gigahertz (GHz). Examples of suitable powers include powers within a range from 300 W to 2000 W. In some examples, RF power source 530 is configured to operate at a plurality of different frequencies and / or powers. In other examples, a microwave plasma may be used.
[0069] The processing tool further comprises a biasing power source 534 controllable to apply an electrical bias to accelerate ions formed in plasma chamber 520 toward substrate 507 for directional etching.
[0070] The processing tool 500 further comprises a controller 540 configured to control operation of the processing tool. Controller 540 is operatively coupled to substrate heater 508, flow control hardware 510, exhaust system 526, plasma chamber 520, RF power source 530, and biasing power source 534. The controller 540 further may be operatively coupled to any other suitable component of processing tool 500. The controller 540 can take the form of a computing system with instructions (e.g. hardware, software, and / or firmware instructions) configured to control the other components of the processing tool 500 to perform the example processes described herein. For example, the controller 540 can include instructions executable to control the processing tool to perform a first directional etch to a first depth in a material layer of a substrate to form a first portion of a feature, instructions executable to control the processing tool to form an etch stop liner on sidewalls of the first portion of the feature, and instructions executable to control the processing tool to form a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by a thermal isotropic etch to widen the second portion of the featurebeneath the etch stop liner. Example processes for performing each of these steps are describe in more detail above.
[0071] Controller 540 may comprise any suitable computing system. FIG. 6 schematically shows an example of a computing system 600 that can enact one or more of the methods and processes described above. Computing system 600 is shown in simplified form. Computing system 600 may take the form of one or more personal computers, workstations, computers integrated with substrate processing tools, and / or network accessible server computers.
[0072] Computing system 600 includes a logic subsystem 602 and a storage subsystem 604. Computing system 600 may optionally include a display subsystem 606, input subsystem 608, communication subsystem 610, and / or other components not shown in FIG. 6. Controller 540 is an example of computing system 600.
[0073] Logic subsystem 602 includes one or more physical devices configured to execute instructions. For example, the logic subsystem may be configured to execute instructions that are part of one or more applications, services, programs, routines, libraries, objects, components, data structures, or other logical constructs. Such instructions may be implemented to perform a task, implement a data type, transform the state of one or more components, achieve a technical effect, or otherwise arrive at a desired result.
[0074] The logic subsystem may include one or more processors configured to execute software instructions. Additionally or alternatively, the logic subsystem may include one or more hardware or firmware logic subsystems configured to execute hardware or firmware instructions. Processors of the logic subsystem may be singlecore or multi-core, and the instructions executed thereon may be configured for sequential, parallel, and / or distributed processing. Individual components of the logic subsystem optionally may be distributed among two or more separate devices, which may be remotely located and / or configured for coordinated processing. Aspects of the logic subsystem may be virtualized and executed by remotely accessible, networked computing devices configured in a cloud-computing configuration.
[0075] Storage subsystem 604 includes one or more physical devices configured to hold instructions 612 executable by the logic subsystem to implement the methods and processes described herein. When such methods and processes are implemented, the state of storage subsystem 604 may be transformed — e.g., to hold different data.
[0076] Storage subsystem 604 may include removable and / or built-in devices. Storage subsystem 604 may include optical memory (e.g., CD, DVD, HD-DVD, Blu- Ray Disc, etc.), semiconductor memory (e.g., RAM, EPROM, EEPROM, etc.), and / or magnetic memory (e.g., hard-disk drive, floppy-disk drive, tape drive, MRAM, etc.), among others. Storage subsystem 604 may include volatile, nonvolatile, dynamic, static, read / write, read-only, random-access, sequential-access, location-addressable, file-addressable, and / or content-addressable devices.
[0077] It will be appreciated that storage subsystem 604 includes one or more physical devices. However, aspects of the instructions described herein alternatively may be propagated by a communication medium (e.g., an electromagnetic signal, an optical signal, etc.) that is not held by a physical device for a finite duration.
[0078] Aspects of logic subsystem 602 and storage subsystem 604 may be integrated together into one or more hardware-logic components. Such hardware-logic components may include field-programmable gate arrays (FPGAs), program- and application-specific integrated circuits (PASIC / ASICs), program- and applicationspecific standard products (PSSP / ASSPs), system-on-a-chip (SOC), and complex programmable logic devices (CPLDs), for example.
[0079] When included, display subsystem 606 may be used to present a visual representation of data held by storage subsystem 604. This visual representation may take the form of a graphical user interface (GUI). As the herein described methods and processes change the data held by the storage subsystem, and thus transform the state of the storage subsystem, the state of display subsystem 606 may likewise be transformed to visually represent changes in the underlying data. Display subsystem 606 may include one or more display devices utilizing virtually any type of technology. Such display devices may be combined with logic subsystem 602 and / or storage subsystem 604 in a shared enclosure, or such display devices may be peripheral display devices.
[0080] When included, input subsystem 608 may comprise or interface with one or more user-input devices such as a keyboard, mouse, or touch screen. In some examples, the input subsystem may comprise or interface with selected natural user input (NUI) componentry. Such componentry may be integrated or peripheral, and the transduction and / or processing of input actions may be handled on- or off-board. Example NUI componentry may include a microphone for speech and / or voicerecognition, and an infrared, color, stereoscopic, and / or depth camera for machine vision and / or gesture recognition.
[0081] When included, communication subsystem 610 may be configured to communicatively couple computing system 600 with one or more other computing devices. Communication subsystem 610 may include wired and / or wireless communication devices compatible with one or more different communication protocols. As non-limiting examples, the communication subsystem may be configured for communication via a wireless telephone network, or a wired or wireless local- or wide-area network. In some examples, the communication subsystem may allow computing system 600 to send and / or receive messages to and / or from other devices via a network such as the Internet.
[0082] It will be understood that the configurations and / or approaches described herein are exemplary in nature, and that these specific examples or examples are not to be considered in a limiting sense, because numerous variations are possible. The specific routines or methods described herein may represent one or more of any number of processing strategies. As such, various acts illustrated and / or described may be performed in the sequence illustrated and / or described, in other sequences, in parallel, or omitted. Likewise, the order of the above-described processes may be changed.
[0083] The subject matter of the present disclosure includes all novel and non- obvious combinations and sub-combinations of the various processes, systems and configurations, and other features, functions, acts, and / or properties disclosed herein, as well as any and all equivalents thereof.
Claims
CLAIMS:
1. A method of etching a feature a material layer on a substrate, the method comprising: forming a first portion of the feature by performing a first directional etch to a first depth in the material layer; forming an etch stop liner on sidewalls of the first portion of the feature; and forming a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by performing an isotropic etch.
2. The method of claim 1, wherein performing the isotropic etch comprises performing a thermal isotropic etch.
3. The method of claim 2, wherein the thermal isotropic etch is performed using a gas mix comprising a radical gas and a fluorine-containing species.
4. The method of claim 3, wherein the radical gas is nitric oxide.
5. The method of claim 3, wherein the gas mix further comprises a passivating agent.
6. The method of claim 5, wherein the passivating agent comprises a halogen other than fluorine.
7. The method of claim 2, wherein the thermal isotropic etch is performed using one or more of xenon difluoride or an interhalogen.
8. The method of claim 1, wherein the isotropic etch utilizes radical species generated in a remote plasma.
9. The method of claim 1, wherein the method is performed in a gate cut process, and wherein the isotropic etch is performed to expose a dummy oxide of a gate structure.
10. The method of claim 1, wherein the material layer comprises one or more of silicon, and wherein the etch stop liner comprises a silicon-containing dielectric material.
11. The method of claim 1, wherein forming the first portion of the feature, forming the etch stop liner, and forming the second portion of the feature are performed in a same processing chamber.
12. A method of etching a feature in a substrate, the method comprising: forming a first portion of the feature by performing a first directional etch to a first depth in a material layer on the substrate, the material layer comprising silicon; forming an etch stop liner on sidewalls of the first portion of the feature, the etch stop liner comprising a silicon-containing dielectric material; and forming a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by performing a thermal isotropic etch.
13. The method of claim 12, wherein the thermal isotropic etch is performed using a gas mix comprising a radical gas and a fluorine-containing species.
14. The method of claim 13, wherein the radical gas is nitric oxide, and the fluorine- containing species is F2.
15. The method of claim 13, wherein the gas mix further comprises a halogen other than fluorine as a passivating agent.
16. The method of claim 12, wherein the thermal isotropic etch is performed using one or more of XeF2 or an interhalogen.
17. A processing tool, comprising a processing chamber; a substrate holder in the processing chamber; a showerhead; flow control hardware configured to deliver processing chemicals to the showerhead; anda power source configured to form a plasma for processing a substrate; and a controller comprising executable instructions, the executable instructions comprising: instructions executable to control the processing tool to perform a first directional etch to a first depth in a material layer of the substrate to form a first portion of a feature, instructions executable to control the processing tool to form an etch stop liner on sidewalls of the first portion of the feature; and instructions executable to control the processing tool to form a second portion of the feature by performing a second directional etch to a second depth in the material layer, followed by a thermal isotropic etch to widen the second portion of the feature beneath the etch stop liner.
18. The processing tool of claim 17, wherein the instructions executable to control the processing tool to perform the thermal isotropic etch comprise instructions executable to control the processing tool to perform the thermal isotropic etch using a gas mix comprising a radical gas and a fluorine-containing species.
19. The processing tool of claim 18, wherein the radical gas is nitric oxide.
20. The processing tool of claim 19, wherein the gas mix further comprises a passivating agent, the passivating agent comprises a halogen other than fluorine.
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