Display panel and display device

By setting filter patterns and planarization layers in the display panel, and optimizing the structure of the conductive layer and substrate, the problem of low transmittance of ultra-high PPI display panels is solved, achieving higher light extraction efficiency and transmittance, improving the problem of metal residue in the manufacturing process, and enhancing the display effect.

WO2026000750A1PCT designated stage Publication Date: 2026-01-02BOE TECHNOLOGY GROUP CO LTD
View PDF 6 Cites 0 Cited by

Patent Information

Application Number
PCT/CN2024/129073
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-06-25
Filing Date
2024-10-31
Publication Date
2026-01-02

AI Technical Summary

Technical Problem

Ultra-high PPI display panels have low pixel aperture ratio and transmittance, making it difficult to further improve them.

Method used

By setting filter patterns and planarization layers in the display panel, the structure of the conductive layer and the substrate is optimized. This includes transmitting and reflecting different colors of light in the first sub-pixel, thinning the color filter layer, and reflecting the first color light in the second sub-pixel to improve transmittance. At the same time, the surface is planarized by the planarization layer to eliminate step differences and improve wiring problems.

Benefits of technology

It improves the light emission efficiency and transmittance of the display panel, enhances reliability, reduces metal residue problems in the manufacturing process, and improves the display effect.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN2024129073_02012026_PF_FP_ABST
    Figure CN2024129073_02012026_PF_FP_ABST
Patent Text Reader

Abstract

A display panel and a display device, which relate to the technical field of display. The display panel comprises a first base substrate (1), a plurality of conductive layers (DD) and a filtering layer (2), wherein the plurality of conductive layers (DD) are sequentially stacked on one side of the first base substrate (1) in the normal direction of the first base substrate (1); and the filtering layer (2) is disposed between the first base substrate (1) and the conductive layers (DD), and comprises a first filtering pattern (21), in an orthographic projection onto the first base substrate (1), the first filtering pattern (21) overlapping with an aperture region of a first sub-pixel (PX1) and not overlapping with an aperture region of a second sub-pixel (PX2), and the first filtering pattern (21) being used for transmitting first-color light and reflecting second-color light. The filtering layer (2) can improve the light utilization efficiency of a backlight source of the display panel, thereby enhancing the light efficiency of the display device.
Need to check novelty before this filing date? Find Prior Art

Description

Display panel and display device

[0001] Cross-reference to Related Applications

[0002] The present application claims priority to the Chinese patent application No. 202410834135.1, filed on June 25, 2024, and entitled “Display panel and display device”, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present application relates to the technical field of display, and in particular, to a display panel and a display device. BACKGROUND

[0004] With the increasing demand for energy saving and emission reduction, the display industry is also constantly pursuing high light efficiency product performance. For mobile portable LCD (Liquid Crystal Display) products, improving light efficiency can improve the endurance time; for non-mobile portable LCD products, improving light efficiency can reduce power consumption and save energy.

[0005] SUMMARY

[0006] Embodiments of the present application adopt the following technical solutions:

[0007] In a first aspect, embodiments of the present application provide a display panel, comprising a plurality of sub-pixels in a display area, the plurality of sub-pixels comprising a first sub-pixel and a second sub-pixel, the first sub-pixel being configured to transmit first color light, and the second sub-pixel being configured to transmit second color light.

[0008] The display panel further comprises:

[0009] a first substrate;

[0010] a plurality of conductive layers, sequentially stacked along a normal direction of the first substrate on one side of the first substrate;

[0011] a filter layer, disposed between the first substrate and the conductive layers, the filter layer comprising a plurality of filter patterns, the plurality of filter patterns comprising a first filter pattern, in an orthographic projection on the first substrate, the first filter pattern overlapping with an opening area of the first sub-pixel and not overlapping with an opening area of the second sub-pixel, the first filter pattern being configured to transmit the first color light and reflect the second color light.

[0012] In some display panels provided by embodiments of the present application, the plurality of filter patterns further comprise:

[0013] A second filter pattern, in an orthographic projection on the first substrate, the second filter pattern has an overlap with the opening region of the second sub-pixel and has no overlap with the opening region of the first sub-pixel, the second filter pattern is configured to transmit the second color light and reflect the first color light; the opening region is configured to transmit light.

[0014] In some display panels provided by the embodiments of the present application, the display panel further comprises:

[0015] A first planar layer is arranged on the first substrate and the side of the filter layer close to the conductive layer, the orthographic projection of the first planar layer on the first substrate covers the first substrate, and the surface of the first planar layer away from the first substrate is a plane.

[0016] In some display panels provided by the embodiments of the present application, the display panel further comprises a second planar layer.

[0017] The orthographic projection of the second planar layer on the first substrate covers the gap between the plurality of filter patterns.

[0018] In some display panels provided by the embodiments of the present application, the plurality of conductive layers comprise a plurality of metal layers, the plurality of metal layers comprise a gate layer and a source-drain metal layer, the source-drain metal layer is located between the first substrate and the filter layer, and the second planar layer covers part of the area of the source-drain metal layer and fills the gap between the plurality of filter patterns.

[0019] In some display panels provided by the embodiments of the present application, the plurality of conductive layers comprise a plurality of metal layers, the plurality of metal layers comprise a gate layer and a source-drain metal layer, and the second planar layer is arranged between the metal layer and the first substrate.

[0020] In some display panels provided by the embodiments of the present application, the display panel comprises, in sequence away from the filter layer along the normal direction of the first substrate, a buffer layer, a semiconductor layer, a gate insulating layer, the gate layer, a first interlayer dielectric layer, and the source-drain metal layer.

[0021] The second planar layer is arranged between one of the buffer layer, the semiconductor layer, the gate insulating layer, the gate layer, the first interlayer dielectric layer, and the source-drain metal layer and the first substrate.

[0022] In some display panels provided by the embodiments of the present application, the second planar layer fills the gap between the plurality of filter patterns.

[0023] A difference between a distance between the second planar layer and the first substrate and a distance between the filter pattern and the first substrate is less than or equal to 200 nm along a normal direction of the first substrate.

[0024] In some display panels provided by embodiments of the present application, the second planar layer is substantially flush with the filter pattern.

[0025] In some display panels provided by embodiments of the present application, a difference between a refractive index of the second planar layer and a refractive index of the first substrate is less than or equal to 0.1.

[0026] In some display panels provided by embodiments of the present application, a material of the second planar layer includes silicon dioxide.

[0027] In some display panels provided by embodiments of the present application, the second planar layer and the first substrate are integrated.

[0028] In some display panels provided by embodiments of the present application, the filter pattern includes high-refraction layers and low-refraction layers stacked and arranged alternately, a refractive index of the high-refraction layers being greater than a refractive index of the low-refraction layers.

[0029] In some display panels provided by embodiments of the present application, the first sub-pixel includes a red sub-pixel and a green sub-pixel, the first color light includes red light and green light, the second sub-pixel includes a blue sub-pixel, and the second color light includes blue light.

[0030] In some display panels provided by embodiments of the present application, the conductive layer includes:

[0031] A semiconductor layer is disposed on a side of the filter layer facing away from the first substrate, the semiconductor layer including transistor active layers of different sub-pixels in the display area and transistor active layers in a peripheral area; the peripheral area is located on at least one side of the display area.

[0032] In an orthographic projection on the first substrate, the filter pattern completely covers the transistor active layers.

[0033] In a second aspect, embodiments of the present application provide another display panel, including a plurality of sub-pixels in a display area, the plurality of sub-pixels including a first sub-pixel and a second sub-pixel, the first sub-pixel being configured to transmit first color light, and the second sub-pixel being configured to transmit second color light.

[0034] The display panel further includes:

[0035] a substrate substrate;

[0036] a filter layer disposed on a side of the substrate substrate away from a backlight of the display panel, the filter layer comprising a plurality of filter patterns, the plurality of filter patterns comprising a first filter pattern, a projection of the first filter pattern on the substrate substrate overlapping with the opening region of the first sub-pixel and not overlapping with the opening region of the second sub-pixel, the first filter pattern being configured to transmit the first color light and reflect the second color light;

[0037] the display panel comprising an array substrate, a color filter substrate, and a liquid crystal layer between the array substrate and the color filter substrate;

[0038] wherein the substrate substrate comprises at least one of a first substrate substrate and a second substrate substrate, the first substrate substrate being disposed on the array substrate, and the second substrate substrate being disposed on the color filter substrate.

[0039] In some display panels provided by the embodiments of the present application, the color filter substrate comprises a plurality of color filter patterns disposed on the second substrate substrate, the plurality of color filter patterns comprising a first color filter pattern and a second color filter pattern, a projection of the first color filter pattern on the second substrate substrate overlapping with the opening region of the first sub-pixel and not overlapping with the opening region of the second sub-pixel, the first color filter pattern being configured to transmit the first color light and reflect the second color light.

[0040] the filter layer being disposed on a side of the second substrate substrate away from the backlight of the display panel, a projection of the first color filter pattern on the second substrate substrate covering a projection of the filter layer on the second substrate substrate.

[0041] In some display panels provided by the embodiments of the present application, a sum of thicknesses of the filter layer and the first color filter pattern is substantially equal to a thickness of the second color filter pattern.

[0042] In some display panels provided by the embodiments of the present application, the filter pattern comprises a high-refractive layer and a low-refractive layer stacked and alternately arranged, a refractive index of the high-refractive layer being greater than a refractive index of the low-refractive layer.

[0043] the first sub-pixel comprising a red sub-pixel and a green sub-pixel, the first color light comprising red light and green light, the second sub-pixel comprising a blue sub-pixel, and the second color light comprising blue light.

[0044] In a third aspect, the embodiments of the present application provide a display device, comprising:

[0045] The driving assembly is connected with the display panel and used for driving the display panel to emit light.

[0046] The driving assembly is connected with the display panel and used for driving the display panel to emit light.

[0047] The above description is only a summary of the technical solutions of the present application. In order to make the technical means of the present application more clear and to enable the above and other purposes, characteristics and advantages of the present application to be more obvious and easy to understand, the following specific embodiments of the present application are described in detail. BRIEF DESCRIPTION OF DRAWINGS

[0048] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the related art, the drawings needed to be used in the embodiments or the prior art description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0049] Figs. 1-7 are structural schematic diagrams of seven array substrates provided by embodiments of the present application;

[0050] Fig. 8 is a structural schematic diagram of a first display panel provided by an embodiment of the present application;

[0051] Figs. 9-11 are structural schematic diagrams of another three array substrates provided by embodiments of the present application;

[0052] Fig. 12 is a structural schematic diagram of a second display panel provided by an embodiment of the present application;

[0053] Fig. 13 is a structural schematic diagram of another array substrate provided by an embodiment of the present application;

[0054] Figs. 14-17 are four pixel arrangement schematic diagrams provided by embodiments of the present application;

[0055] Fig. 18 is a schematic diagram of the positional relationship between a pixel opening area and a first filter pattern provided by an embodiment of the present application. DETAILED DESCRIPTION

[0056] The technical solutions in the embodiments of the present application will be described in detail below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative labor fall within the scope of the present application.

[0057] AR / VR / MR products need to use display panels with ultra-high pixel density units (Pixels Per Inch, PPI) to achieve better display effects. However, ultra-high PPI display panels face great challenges in design and process.

[0058] As the pixel size of the ultra-high PPI display panel becomes smaller, the shielding structures such as the wires, transistors, and spacers in the pixel are difficult to be scaled down in proportion due to the limitations of equipment and material capabilities, resulting in a very small pixel aperture ratio of the ultra-high PPI display panel. For example, the pixel aperture ratio of a 500PPI display panel is 50% to 65%, and the transmittance is about 4%. The pixel size of a 1200PPI display panel is 3 to 20 microns, and the pixel aperture ratio can only be 20%, and the transmittance is only about 1.5%. Therefore, the transmittance of the ultra-high PPI display panel is low.

[0059] In view of the difficulty in further improving the pixel aperture ratio, the transmittance of the display panel can be improved by increasing the light output intensity and light output efficiency of the display panel.

[0060] Based on this, the embodiments of the present application provide a display panel, which includes a display area AA and a peripheral area NA surrounding the display area AA.

[0061] The display area AA includes a plurality of sub-pixels PX, and each sub-pixel PX includes an opening area (such as RK, GK, and BK shown in FIGS. 14-17) for transmitting light and a non-opening area that cannot transmit light. The non-transparent shielding structures such as thin film transistors, vias, wires, and spacers PS can be arranged in the non-opening area. The ratio of the opening area to the area of the sub-pixel PX, i.e., the opening ratio, is the sum of the opening area and the non-opening area.

[0062] For example, the plurality of sub-pixels PX are arranged in a row direction and a column direction, and the adjacent two rows of sub-pixels PX can be arranged in alignment (as shown in FIGS. 14, 15, and 16) or misaligned (as shown in FIG. 17).

[0063] As shown in FIG. 1, the display panel includes a plurality of sub-pixels PX in the display area AA, and the plurality of sub-pixels PX include a first sub-pixel PX1 and a second sub-pixel PX2, the first sub-pixel PX1 is used to transmit first color light, and the second sub-pixel PX2 is used to transmit second color light.

[0064] For example, the first sub-pixel PX1 can include one or more of a red sub-pixel PXR, a green sub-pixel PXG, and a blue sub-pixel PXB, and the second sub-pixel PX2 can include one or more of a red sub-pixel PXR, a green sub-pixel PXG, and a blue sub-pixel PXB.

[0065] For example, as shown in FIG. 1, the first sub-pixel PX1 includes a red sub-pixel PXR and a green sub-pixel PXG, the first color light includes red light and green light, and the second sub-pixel PX2 includes a blue sub-pixel PXB, and the second color light includes blue light.

[0066] For example, as shown in FIG. 1, the display panel further includes:

[0067] a first substrate 1;

[0068] a plurality of conductive layers DD (for example, including a semiconductor layer 4, a gate layer 6, a source-drain metal layer 8, pixel electrodes 12 and 14, and a common electrode 16) are sequentially stacked on one side of the first substrate 1 along the normal direction of the first substrate 1;

[0069] a filter layer 2 disposed between the first substrate 1 and the conductive layer DD, the filter layer 2 including a plurality of filter patterns, and the plurality of filter patterns including a first filter pattern 21, in the orthographic projection on the first substrate 1, the first filter pattern 21 has an overlap with the opening area of the first sub-pixel PX1 and no overlap with the opening area of the second sub-pixel PX2, and the first filter pattern 21 is configured to transmit the first color light and reflect the second color light.

[0070] For example, the filter pattern (for example, the first filter pattern 21 and the second filter pattern 22 described below) includes high-refraction layers and low-refraction layers which are stacked and alternately arranged, and the refractive index of the high-refraction layer is greater than the refractive index of the low-refraction layer.

[0071] For example, the refractive index of the high-refraction layer material ranges from 1.8 to 2.7, and the refractive index of the low-refraction layer material ranges from 1.1 to 1.6.

[0072] In the display panel provided by the embodiments of the present application, since the first filter pattern 21 disposed in the first sub-pixel PX1 can reflect the second color light, the thickness of the color filter layer CF (color filter pattern) disposed in the first sub-pixel PX1 can be thinned, thereby improving the light extraction efficiency of the display panel, and further improving the transmittance of the first sub-pixel PX1.

[0073] For example, the thickness of the first filter pattern 21 is 0.58 microns, and under the premise of maintaining the same color gamut, the thickness of the color filter layer CF disposed in the first sub-pixel PX1 can be thinned by 1 micron, and the transmittance is improved by 16%.

[0074] In some embodiments of the present application, FIG. 18 provides the positional relationship between the opening area of each sub-pixel and the first filter pattern 21, taking the pixel arrangement design shown in FIG. 15 as an example.

[0075] With reference to FIG. 18, it can be understood that the first filter pattern 21 overlaps with the opening area of the first sub-pixel PX1 and does not overlap with the opening area of the second sub-pixel PX2 in the orthographic projection on the first substrate 1 includes the following cases:

[0076] First, at least part of the outer contour of the first filter pattern 21 overlaps with the outer contour of the opening area of the first sub-pixel PX1 in the orthographic projection on the first substrate 1.

[0077] For example, as shown in FIG. 18, when the line width of the long strip-shaped first filter pattern 21 is W1, the above case is met, where the line width W1 is the distance between one side of the opening area of the red sub-pixel PXR and the other side of the opening area of the green sub-pixel PXG in the first sub-pixel PX1.

[0078] Second, the outer contour of the opening area of the first sub-pixel PX1 is located within the outer contour of the first filter pattern 21 in the orthographic projection on the first substrate 1.

[0079] For example, as shown in FIG. 18, when the line width of the long strip-shaped first filter pattern 21 is W2, the above case is met. The line width W2 is greater than the distance between one side of the opening area of the red sub-pixel PXR and the other side of the opening area of the green sub-pixel PXG in the first sub-pixel PX1, and is less than the distance between two adjacent blue sub-pixels PXB.

[0080] Third, at least part of the outer contour of the first filter pattern 21 is tangent to the outer contour of the opening area of the second sub-pixel in the orthographic projection on the first substrate 1.

[0081] For example, as shown in FIG. 18, when the line width of the long strip-shaped first filter pattern 21 is W3, the above case is met. The line width W3 is equal to the distance between two adjacent blue sub-pixels PXB.

[0082] In an exemplary embodiment, the taper of the first filter pattern 21 ranges from 50° to 85°.

[0083] For example, the taper of the first filter pattern 21 ranges from 60° to 85°.

[0084] By setting the taper of the first filter pattern 21 to be steep, the material of the first filter pattern 21 can be prevented from extending to the position of the second sub-pixel PX2 / PXB in the manufacturing process, so that the first filter pattern 21 does not reflect blue light to reduce the transmittance of the second sub-pixel PX2 / PXB.

[0085] In an exemplary embodiment, the display panel includes a liquid crystal display panel.

[0086] For example, a pixel circuit of a liquid crystal display (LCD) includes one or two transistors, which is relatively simple, and thus can achieve an ultra-high pixel density (PPI), i.e., the number of pixels per inch. The LCD has various display modes, such as an ADS (Advanced Super Dimension Switch) mode, a TN (twisted nematic) mode, and a VA (Vertical Alignment) mode. In the ADS mode, a pixel electrode and a common electrode are both located on one side of a liquid crystal layer. In the TN mode and the VA mode, the pixel electrode and the common electrode are respectively arranged on opposite sides of the liquid crystal layer, the pixel electrode is located on an array substrate, and the common electrode is located on a color filter substrate. The working principle of the ADS mode is that liquid crystal molecules are parallel to a substrate. Without a voltage, light passing through a lower polarizer forms a straight linear polarization parallel to a short axis of the liquid crystal molecules. The polarization direction cannot be rotated, and thus is absorbed by an upper polarizer and cannot be emitted. After a voltage is applied, a horizontal electric field is formed to the left and right of the liquid crystal, and the liquid crystal molecules are arranged along the direction of the electric field. Light passing through the lower polarizer and the liquid crystal layer is in an elliptical polarization state and can be emitted through the upper polarizer. The working principle of the TN mode is that, without a voltage, liquid crystal molecules are twisted by 90° under the action of an alignment film, and light passing through the lower polarizer and the liquid crystal molecules is emitted from the upper polarizer. When a voltage is applied, most of the liquid crystal molecules are vertically arranged except for the liquid crystal near the upper and lower alignment films, and light passing through the lower polarizer is not deflected through the liquid crystal layer. Since the light is parallel to the polarization axis of the upper polarizer, the light is absorbed and cannot be emitted. The working principle of the VA mode is that liquid crystal molecules are vertically arranged relative to a substrate. Without a voltage, light passing through the lower polarizer forms a straight linear polarization parallel to the short axis of the liquid crystal molecules. The polarization direction cannot be rotated, and thus is absorbed by the upper polarizer and cannot be emitted. After a voltage is applied, the liquid crystal molecules are deflected along the direction of the electric field, and light passing through the lower polarizer and the liquid crystal layer is in an elliptical polarization state and can be emitted through the upper polarizer.

[0087] The structure of the display panel is described below by taking the ADS mode as an example.

[0088] In some display panels provided in the embodiments of the present application, as shown in FIG. 2, the plurality of filter patterns further include:

[0089] The second filter pattern 22 overlaps the opening region of the second sub-pixel PX2 and does not overlap the opening region of the first sub-pixel PX1 in the orthogonal projection on the first substrate 1, and the second filter pattern 22 is configured to transmit the second color light and reflect the first color light.

[0090] In the case that the first sub-pixel PX1 includes a red sub-pixel PXR and a green sub-pixel PXG, the first color light includes red light and green light, the second sub-pixel PX2 includes a blue sub-pixel PXB, and the second color light includes blue light, as shown in FIG. 2, the second filter pattern 22 is arranged at the blue sub-pixel PXB, transmits the blue light, and reflects the red light and the green light.

[0091] Since the second filter pattern 22 located at the second sub-pixel PX2 can reflect the first color light, the thickness of the color filter layer (or referred to as a color filter pattern) arranged at the second sub-pixel PX2 can be thinned, so that the light extraction efficiency of the second sub-pixel PX2 can be improved, and thus the transmittance of the second sub-pixel PX2 can be improved.

[0092] In some display panels provided by the embodiments of the present application, as shown in FIG. 3, the display panel further includes:

[0093] The first planar layer PLN1 is arranged at the side of the first substrate 1 and the filter layer 2 close to the conductive layer DD, the orthographic projection of the first planar layer PLN1 on the first substrate 1 covers the first substrate 1 entirely, and the surface of the first planar layer PLN1 away from the first substrate 1 is planar. As shown in FIG. 3, the first planar layer PLN1 is arranged not only in the gap between the first filter patterns 21 but also at the side of the first filter patterns 21 away from the first substrate 1, that is, the first planar layer PLN1 is arranged at both the first sub-pixel PX1 and the second sub-pixel PX2, and the surface of the first planar layer PLN1 away from the first substrate 1 is higher than the surface of the filter layer 2 away from the first substrate 1.

[0094] In the embodiments of the present application, by arranging the first planar layer PLN1, the subsequent film layer can be formed on the planarized surface of the first planar layer PLN1, so that the step difference can be eliminated and the risk of wire disconnection can be avoided.

[0095] In some display panels provided by the embodiments of the present application, as shown in FIG. 4, FIG. 5, FIG. 6 and FIG. 7, the display panel further includes a second planar layer PLN2.

[0096] The orthographic projection of the second planar layer PLN2 on the first substrate 1 covers the gap between the plurality of filter patterns.

[0097] In the embodiments of the present application, by arranging the second planar layer PLN2, the surface of the second planar layer PLN2 away from the first substrate 1 and the surface of the film layer arranged in the same layer away from the first substrate 1 are located in the same plane, the subsequent film layer can be formed on the planarized surface, and the risk of wire disconnection can be avoided.

[0098] In order to improve the reliability of the display panel, in some embodiments, the first planar layer PLN1 or the second planar layer PLN2 has a temperature resistance greater than or equal to 350°C.

[0099] In order to improve the transmittance of the display panel, the first planar layer PLN1 or the second planar layer PLN2 has a refractive index, for example, equivalent to that of the first substrate 1.

[0100] For example, the first substrate 1 is a glass substrate, and the difference between the refractive index of the first substrate 1 and the first planar layer PLN1 is less than or equal to 0.1; the difference between the refractive index of the first substrate 1 and the second planar layer PLN2 is less than or equal to 0.1.

[0101] For example, the first planar layer PLN1 or the second planar layer PLN2 has a refractive index greater than or equal to 1.4 and less than or equal to 1.5.

[0102] For example, the first planar layer PLN1 or the second planar layer PLN2 has a transmittance greater than or equal to 99%.

[0103] For example, the first planar layer PLN1 or the second planar layer PLN2 is made of inorganic material, such as silicon dioxide.

[0104] In some display panels provided by the embodiments of the present application, as shown in FIG. 6, the plurality of conductive layers DD includes a plurality of metal layers, and the plurality of metal layers includes a gate layer 6 and a source-drain metal layer 8, the source-drain metal layer 8 is located between the first substrate 1 and the filter layer 2, and the second planar layer PLN2 covers part of the area of the source-drain metal layer 8 and fills the gap between the plurality of filter patterns 21.

[0105] In the embodiments of the present application, by placing the source-drain metal layer 8 below (the source-drain metal layer 8 is located between the first substrate 1 and the filter layer 2), and then electrically connecting the data line DL in the source-drain metal layer 8 with the semiconductor layer 4 (ACT) through the via, the problem of metal residue at the step difference position when preparing the source-drain metal layer 8 caused by the step difference of the film layer in the case of placing the source-drain metal layer 8 above is avoided, in addition, placing the source-drain metal layer 8 below can also improve the light leakage problem caused by metal reflection.

[0106] For example, as shown in FIG. 4, the data line DL can be located on the side of the semiconductor layer 6 away from the first substrate 1, in this case, the active layer ACT is connected with the data line DL in an upper lap joint manner; as shown in FIG. 6, the data line DL can also be located on the side of the semiconductor layer 6 close to the first substrate 1, in this case, the active layer ACT is connected with the data line DL in a lower lap joint manner.

[0107] In some display panels provided by the embodiments of the present application, as shown in FIGS. 4 and 5, the plurality of conductive layers DD include a plurality of metal layers, and the plurality of metal layers include the gate layer 6 and the source-drain metal layer 8. The second planar layer PLN2 is arranged between the metal layer and the first substrate 1.

[0108] For example, as shown in FIGS. 4 and 9, the second planar layer PLN2 can be arranged between the gate layer 6 and the first substrate 1.

[0109] For example, as shown in FIGS. 10 and 11, the second planar layer PLN2 can be arranged between the source-drain metal layer 8 and the first substrate 1.

[0110] In some display panels provided by the embodiments of the present application, as shown in FIGS. 4, 5, 7, 9, 10 and 11, the display panel includes, in sequence along the normal direction of the first substrate 1 away from the filter layer 2, the buffer layer 3, the semiconductor layer 4, the gate insulating layer 5, the gate layer 6, the first interlayer dielectric layer 7 and the source-drain metal layer 8.

[0111] The second planar layer PLN2 is arranged between one of the buffer layer 3, the semiconductor layer 4, the gate insulating layer 5, the gate layer 6, the first interlayer dielectric layer 7 and the source-drain metal layer 8 and the first substrate 1.

[0112] For example, as shown in FIGS. 4, 5 and 7, the second planar layer PLN2 is arranged between the buffer layer 3 and the first substrate 1.

[0113] For example, as shown in FIG. 9, the second planar layer PLN2 is arranged between the semiconductor layer 4 and the first substrate 1, specifically, the second planar layer PLN2 is arranged between the semiconductor layer 4 and the buffer layer 3.

[0114] For example, as shown in FIG. 10, the second planar layer PLN2 is arranged between the first interlayer dielectric layer 7 and the first substrate 1, specifically, the second planar layer PLN2 is arranged between the gate layer 6 and the first interlayer dielectric layer 7.

[0115] In the embodiments of the present application, by arranging the second planar layer PLN2 between one of the buffer layer 3, the semiconductor layer 4, the gate insulating layer 5, the gate layer 6, the first interlayer dielectric layer 7 and the source-drain metal layer 8 and the first substrate 1, the film layer step difference caused by arranging the filter layer 2 is eliminated before the source-drain metal layer 8 is prepared, so that the metal residue problem at the step difference position when the source-drain metal layer 8 is prepared can be improved, and the preparation yield of the display panel is improved.

[0116] In some display panels provided by the embodiments of the present application, as shown in FIGS. 4 and 8, the second planar layer PLN2 is filled in the gaps between the plurality of filter patterns 21.

[0117] In the case where the filter layer 2 includes the first filter pattern 21 at the first sub-pixel PX1 and does not include the second pattern 22, as shown in FIG. 4, the orthogonal projection of the second planar layer PLN2 on the first substrate 1 has an overlap with the second sub-pixel PX2 and no overlap with the first sub-pixel PX1, i.e., the second planar layer PLN2 is disposed in the gap between the first filter pattern 21.

[0118] As shown in FIG. 8, along the normal direction of the first substrate 1, the difference between the distance D2 from the surface of the first substrate 1 to the second planar layer PLN2 and the distance D1 from the surface of the first substrate 1 to the filter pattern (the first filter pattern 21) is less than or equal to 200 nm.

[0119] For example, along the normal direction of the first substrate 1, the difference between the distance D2 from the surface of the first substrate 1 to the second planar layer PLN2 and the distance D1 from the surface of the first substrate 1 to the filter pattern (the first filter pattern 21) can be 0 nm, 5 nm, 10 nm, 15 nm, 18 nm, 20 nm, 15 nm, 30 nm, 35 nm, 40 nm, 50 nm, 60 nm, 70 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm, or 190 nm.

[0120] For example, as shown in FIG. 8, at the boundary region between the second planar layer PLN2 and the filter pattern (the first filter pattern 21), the difference between the distance D2 from the surface of the first substrate 1 to the second planar layer PLN2 and the distance D1 from the surface of the first substrate 1 to the filter pattern (the first filter pattern 21) is less than or equal to 200 nm.

[0121] In some display panels provided by the embodiments of the present application, the surface of the second planar layer PLN2 away from the first substrate 1 is substantially flush with the surface of the filter pattern (the first filter pattern 21) away from the first substrate 1.

[0122] For example, at the boundary region between the second planar layer PLN2 and the filter pattern (the first filter pattern 21), the surface of the second planar layer PLN2 away from the first substrate 1 is substantially flush with the surface of the filter pattern (the first filter pattern 21) away from the first substrate 1.

[0123] In the embodiments of the present application, by setting the difference between the distance D2 between the surface of the first substrate substrate 1 and the second planar layer PLN2 facing away from the first substrate substrate 1 along the normal direction of the first substrate substrate 1 and the distance D1 between the surface of the first substrate substrate 1 and the filter pattern (the first filter pattern 21) facing away from the first substrate substrate 1 to be less than or equal to 200 nm, the step difference of the junction area between the second planar layer PLN2 and the filter pattern (the first filter pattern 21) can be made to tend to zero, so that the film layer step difference is almost eliminated before the source-drain metal layer 8 is prepared, thereby improving the metal residue problem in the junction area of the source-drain metal layer 8 prepared, and improving the preparation yield of the display panel.

[0124] In some display panels provided by the embodiments of the present application, the difference between the refractive index of the second planar layer PLN2 and the refractive index of the first substrate substrate 1 is less than or equal to 0.1.

[0125] In some display panels provided by the embodiments of the present application, the material of the second planar layer PLN2 includes silicon dioxide.

[0126] In some display panels provided by the embodiments of the present application, as shown in FIG. 7, the second planar layer PLN2 and the first substrate substrate 1 are integrated structures.

[0127] It should be noted that when the second planar layer PLN2 and the first substrate substrate 1 are integrated structures, during the preparation of the display panel, a thickened glass can be provided, a groove or hole structure with the same thickness as the filter pattern (for example, the first filter pattern 21) is excavated at the corresponding position of the thickened glass, and then the filter pattern (for example, the first filter pattern 21) is formed in the groove or hole structure, so that the filter pattern (for example, the first filter pattern 21) is filled in the groove or hole structure, and the second planar layer PLN2 and the first substrate substrate 1 are integrated structures.

[0128] For example, the thickness of the filter pattern (for example, the first filter pattern 21) ranges from 0.1 microns to 5 microns.

[0129] Since the second planar layer PLN2 and the first substrate substrate 1 are integrated structures, there is no interface between the second planar layer PLN2 and the first substrate substrate 1, and when light passes through the integrated structure, almost no loss occurs, thereby increasing the amount of light emitted from the second sub-pixel PX2, improving the light extraction efficiency, and improving the light transmittance of the second sub-pixel PX2.

[0130] In some display panels provided by the embodiments of the present application, the filter pattern includes high-refraction layers and low-refraction layers stacked and alternately arranged, and the refractive index of the high-refraction layer is greater than the refractive index of the low-refraction layer.

[0131] Exemplarily, the filter pattern (e.g., the first filter pattern 21 and the second filter pattern 22) comprises high-refractive layers and low-refractive layers which are stacked and arranged alternately, the refractive index of the high-refractive layers is greater than the refractive index of the low-refractive layers.

[0132] Exemplarily, the total number of the high-refractive layers and the low-refractive layers in the filter pattern is greater than or equal to 3.

[0133] Exemplarily, the refractive index of the high-refractive layer material ranges from 1.8 to 2.7, and the refractive index of the low-refractive layer material ranges from 1.1 to 1.6.

[0134] Exemplarily, the high-refractive layer comprises one or more of TiO2, Nb2O5, Y2O3, TaO2, SiN, etc., and the low-refractive layer comprises one or more of SiO2, MgF2, LiF, etc. The greater the difference between the refractive index of the high-refractive layer and the low-refractive layer, the thinner the filter pattern.

[0135] Exemplarily, the high-refractive layer is TiO2, and the low-refractive layer is SiO2. The first filter pattern 21 is obtained by alternately stacking TiO2 and SiO2. The first filter pattern 21 has a transmittance of more than 90% for red light and green light, and a reflectivity of more than 90% for blue light.

[0136] In some embodiments, the high-refractive layer is in direct contact with the first substrate 1. In other embodiments, the low-refractive layer is in direct contact with the first substrate 1.

[0137] In some display panels provided by the embodiments of the present application, the first sub-pixel PX1 comprises a red sub-pixel PXR and a green sub-pixel PXG, the first color light comprises red light and green light, and the second sub-pixel PX2 comprises a blue sub-pixel PXB, the second color light comprises blue light.

[0138] In some display panels provided by the embodiments of the present application, as shown in FIGS. 1-7 and 9-11, the conductive layer DD comprises:

[0139] The semiconductor layer 4 is arranged on the side of the filter layer 2 away from the first substrate 1. As shown in FIG. 5, the semiconductor layer 4 comprises transistor active layers ACT of different sub-pixels in the display area AA and transistor active layers ACT in the peripheral area NA. The peripheral area NA is located on at least one side of the display area AA. In the orthographic projection on the first substrate 1, the filter pattern (e.g., the first filter pattern 21) completely covers the transistor active layers ACT.

[0140] Exemplarily, the transistor active layers ACT comprise an oxide semiconductor material, which is conducive to improving the pixel aperture ratio.

[0141] For example, the transistor active layer ACT includes a semiconductor material M1OaNb, where M1 is a single metal or a combination of multiple metals, a > 0, and b ≥ 0, O represents an oxygen element, and N represents a nitrogen element, that is, the semiconductor material is a metal oxide material or a metal oxynitride material.

[0142] Suitable metal oxide materials include, but are not limited to, one or more of indium gallium zinc oxide (IGZO), indium gallium tin oxide (IGTO), indium tin zinc oxide (ITZO), indium gallium oxide (IGO), indium gallium zinc tin oxide (IGZTO), indium zinc oxide (IZO), zinc tin oxide (ZTO), In-free OS, rare earth doped oxides (Ln-OS, such as rare earth element doped IGZO / IZO), zinc oxide (ZnO), gallium oxide (GaO), indium oxide (InO), HfInZnO (HIZO), ZnO:F, In2O3:Sn, In2O3:Mo, Cd2SnO4, ZnO:Al, TiO2:Nb, and Cd-Sn-O. The material of the transistor active layer ACT can be in an amorphous, partially crystalline, single crystalline, or polycrystalline state, and can be a single layer or a multi-layer structure.

[0143] Suitable metal oxynitride materials include, but are not limited to, zinc oxynitride, indium oxynitride, gallium oxynitride, tin oxynitride, cadmium oxynitride, aluminum oxynitride, germanium oxynitride, titanium oxynitride, silicon oxynitride, or a combination thereof. In one example, the material of the transistor active layer ACT includes indium gallium zinc oxide (IGZO).

[0144] In embodiments of the present application, the filter pattern (e.g., the first filter pattern 21) completely covers the transistor active layer ACT in the orthographic projection on the first substrate 1. In this way, the filter pattern can shield part of the light from the active layer ACT, improve the stability of the transistor, and improve the problem of threshold voltage drift caused by light, etc.

[0145] For example, in FIG. 4, the first filter pattern 21 completely covers the transistor active layer ACT located in the first sub-pixel PX1 in the orthographic projection on the first substrate 1, so that the refraction of the blue light to the transistor active layer ACT located in the first sub-pixel PX1 can be avoided.

[0146] In the present application, a transistor refers to an element including at least a gate, a drain, and a source. The transistor has a channel region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow through the drain, the channel region, and the source. In the present application, the channel region refers to a region through which current mainly flows.

[0147] In the present application, the transistor can be a thin film transistor or a field effect transistor, etc. The present application is described by taking a thin film transistor as an example.

[0148] In the present application, the first electrode can be a drain electrode, and the second electrode can be a source electrode, or the first electrode can be a source electrode, and the second electrode can be a drain electrode. In the case of using a transistor with opposite polarity or in the case of changing the current direction in the circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes exchanged with each other. Therefore, in the present application, the "source electrode" and the "drain electrode" can be exchanged with each other.

[0149] Exemplarily, the transistor can adopt a top gate structure, that is, the scan line GL is located on the side of the active layer ACT away from the first substrate substrate 1. Of course, as shown in FIG. 6, the transistor can also adopt a bottom gate structure, that is, the scan line GL is located on the side of the active layer ACT close to the first substrate substrate 1, and the present disclosure does not limit this.

[0150] In an embodiment of the present application, the display panel further comprises:

[0151] The second interlayer dielectric layer 9, the transfer electrode 10, the third interlayer dielectric layer 11, the first pixel electrode layer 12, the filling layer 13, the second pixel electrode layer 14, the fourth interlayer dielectric layer 15, the common electrode layer 16, and the support column 17 are located on the side of the source-drain conductive layer 8 away from the first substrate substrate 1.

[0152] In some embodiments, the filling layer 13 can not be provided.

[0153] In some embodiments, part of the first pixel electrode layer 12 and part of the second pixel electrode layer 14 directly contact.

[0154] In some embodiments, the material of the support column 17 is a conductive structure, and the support column 17 is electrically connected to the common electrode layer 16.

[0155] Another display panel is provided in an embodiment of the present application, which is shown in combination with FIGS. 1 and 8 or FIGS. 12 and 13, and comprises a plurality of sub-pixels in a display area AA, the plurality of sub-pixels comprising a first sub-pixel PX1 and a second sub-pixel PX2, the first sub-pixel PX1 being configured to transmit first color light, and the second sub-pixel PX2 being configured to transmit second color light.

[0156] The display panel further comprises:

[0157] The substrate substrate;

[0158] The filter layer 2 is arranged on a side of the substrate away from the backlight of the display panel; the filter layer 2 comprises a plurality of filter patterns, and the plurality of filter patterns comprises a first filter pattern 21, the first filter pattern 21 has an overlap with the opening area of the first sub-pixel PX1 and has no overlap with the opening area of the second sub-pixel PX2 in the orthographic projection on the substrate, and the first filter pattern 21 is used for transmitting the first color light and reflecting the second color light;

[0159] The display panel comprises an array substrate 200, a color film substrate 100, and a liquid crystal layer LC between the array substrate 200 and the color film substrate 100.

[0160] The substrate comprises at least one of a first substrate 1 and a second substrate 1A, the first substrate 1 is arranged on the array substrate 200, and the second substrate 1A is arranged on the color film substrate 100.

[0161] In some embodiments, as shown in FIG. 8, when the substrate comprises the first substrate 1, the filter layer 2 is arranged on a side of the first substrate 1 away from the backlight of the display panel, at this time, the light of the backlight is incident from the array substrate 200, passes through the liquid crystal layer LC, and is then emitted from the color film substrate 100, and the color film substrate 100 is the light-out side substrate.

[0162] In other embodiments, as shown in FIG. 12, when the substrate comprises the second substrate 1A, the filter layer 2 is arranged on a side of the second substrate 1A away from the backlight of the display panel, at this time, the light of the backlight is incident from the color film substrate 100, passes through the liquid crystal layer LC, and is then emitted from the array substrate 200, and the array substrate 200 is the light-out side substrate.

[0163] In the embodiments of the present application, by arranging the filter layer 2 on a side of the substrate away from the backlight of the display panel, the filter layer 2 comprises a plurality of filter patterns, and the plurality of filter patterns comprises a first filter pattern 21, the first filter pattern 21 has an overlap with the opening area of the first sub-pixel PX1 and has no overlap with the opening area of the second sub-pixel PX2 in the orthographic projection on the substrate, and the first filter pattern 21 is used for transmitting the first color light and reflecting the second color light (for example, blue light). In this way, the blue light reflected by the first filter pattern 21 returns to the backlight again to excite the quantum dot material to emit light, thereby improving the light efficiency of the overall display device.

[0164] In some display panels provided by embodiments of the present application, as shown in FIGS. 12 and 13, the color filter substrate 100 includes a plurality of color filter patterns (e.g., RCF, GCF, and BCF) on the second substrate 1A, the plurality of color filter patterns including a first color filter pattern (e.g., including RCF and GCF) and a second color filter pattern (e.g., including BCF), in the orthographic projection on the second substrate 1A, the first color filter pattern (e.g., including RCF and GCF) overlaps the opening area of the first sub-pixel PX1 and does not overlap the opening area of the second sub-pixel PX2, the first color filter pattern (e.g., including RCF and GCF) is configured to transmit the first color light and reflect the second color light.

[0165] As shown in FIG. 12, the filter layer 2 is disposed on the side of the second substrate 1A away from the backlight of the display panel, and the orthographic projection of the first color filter pattern (e.g., including RCF and GCF) on the second substrate 1A covers the orthographic projection of the filter layer 2 on the second substrate 1A.

[0166] In some display panels provided by embodiments of the present application, as shown in FIG. 12, the sum D3 of the thicknesses of the filter layer 2 and the first color filter pattern (e.g., RCF or GCF) is substantially equal to the thickness D4 of the second color filter pattern (e.g., BCF).

[0167] In embodiments of the present application, the filter layer 2 is disposed on the color filter substrate 100, so that all the metals and inorganic films on the array substrate (array substrate 200) are made on a substrate with almost no step difference, consistent with conventional processes, the light emitted by the backlight is incident from the color filter substrate 100 and emitted from the array substrate (array substrate 200), in order to reduce the reflectivity of the array substrate, a light shielding layer ZG, such as a blackened metal layer, is added below the metal lines of the array substrate, the material of the blackened metal is a stacked structure of SiN / MoO, and a low-reflectivity polarizer can also be disposed on the array substrate or an anti-reflection film can be disposed on the side of the polarizer away from the liquid crystal layer LC.

[0168] In some embodiments, a light-transmitting organic layer can be disposed on the color filter pattern as shown in FIG. 12 to further play a planarization role and facilitate the subsequent flow leveling of the alignment liquid.

[0169] In some display panels provided by embodiments of the present application, the filter pattern 2 includes high-refractive layers and low-refractive layers stacked and alternately arranged, the refractive index of the high-refractive layers is greater than the refractive index of the low-refractive layers.

[0170] The first sub-pixel PX1 includes a red sub-pixel PXR and a green sub-pixel PXG, the first color light includes red light and green light, and the second sub-pixel PX2 includes a blue sub-pixel PXB, and the second color light includes blue light.

[0171] The display device provided in the present application comprises: a display panel provided in any of the embodiments; and a driving assembly connected with the display panel and used for driving the display panel to emit light.

[0172] It can be understood by those skilled in the art that the display device provided in the present application has the advantages of the display panel of any of the embodiments.

[0173] The display device provided in the present application can be any product or component with display function, such as a display module, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a vehicle-mounted display device, a smart watch, a fitness wristband, a personal digital assistant, etc.

[0174] In the embodiments of the present application, the same items or similar items with basically the same functions and effects are distinguished by using "first", "second", "third", "fourth", etc., only for the purpose of clearly describing the technical solutions of the embodiments of the present application, and cannot be understood as indicating or implying the relative importance of the indicated technical features or implicitly indicating the number of the indicated technical features.

[0175] In the embodiments of the present application, the directions or position relationships indicated by the terms "upper", "lower", etc. are based on the directions or position relationships shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and do not indicate or imply that the indicated devices or elements must have a particular direction, be constructed and operated in a particular direction, and therefore cannot be understood as a limitation on the present application.

[0176] In the description of the specification, the terms "one embodiment", "some embodiments", "exemplary embodiments", "example", "specific example" or "some examples" are intended to mean that the specific features, structures, materials or characteristics related to the embodiment or example are included in at least one embodiment or example of the present application. The illustrative representation of the above terms does not necessarily mean the same embodiment or example. In addition, the specific features, structures, materials or characteristics can be included in any one or more embodiments or examples in any appropriate manner.

[0177] In the embodiments of the present application, "a plurality of" means two or more, and "at least one" means one or more, unless otherwise explicitly specified.

[0178] As used herein, "parallel," "perpendicular," "equal," "flush" include the recited condition and conditions approximating the recited condition within an acceptable deviation range, as determined by one of ordinary skill in the art taking into account the measurement being discussed and the error associated with the measurement of the particular quantity (i.e., limitations of the measurement system). For example, "parallel" includes absolute parallel and near parallel, where near parallel can have an acceptable deviation range of, for example, 10° or 5° or less; "perpendicular" includes absolute perpendicular and near perpendicular, where near perpendicular can also have an acceptable deviation range of, for example, 10° or 5° or less. "Equal" includes absolute equality and near equality, where near equality can have an acceptable deviation range of, for example, less than or equal to 5% of the difference between the two quantities being compared. "Flush" includes absolute flush and near flush, where near flush can have an acceptable deviation range of, for example, less than or equal to 5% of the distance between the two quantities being compared.

[0179] Unless the context clearly requires otherwise, throughout the description and the claims, the word "comprise," and variations such as "comprises" or "comprising," will be understood to imply the inclusion of a stated integer or step or group of integers or steps but not the exclusion of any other integer or step or group of integers or steps.

[0180] In the present specification, polygons are not strictly so, and can be approximate triangles, parallelograms, trapezoids, pentagons, hexagons, etc., and can have some small deformation due to tolerances.

[0181] In the present specification, "electrically connected" and "coupled" include cases where the constituent elements are connected together through an element having some electrical effect. The element having some electrical effect is not particularly limited as long as it can perform the transmission and reception of electrical signals between the connected constituent elements. Examples of the element having some electrical effect include not only electrodes and wiring but also switching elements such as transistors, resistors, inductors, capacitors, other elements having various functions, and the like.

[0182] In the present specification, "disposed in the same layer" means that two (or more) structures are formed by patterning at the same time, and the materials thereof can be the same or different. For example, the materials of the precursors forming the plurality of structures disposed in the same layer are the same, and the materials finally formed can be the same or different.

[0183] It should be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present.

[0184] "A, B, and C at least one of" has the same meaning as "at least one of A, B, or C", both including the following combinations of A, B, and C: only A, only B, only C, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C.

[0185] "A and / or B" includes the following three combinations: only A, only B, and a combination of A and B.

[0186] Finally, it should be noted that the above description is merely a specific implementation of the present application, but the protection scope of the present application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the present application, which should be covered within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A display panel, wherein, It includes multiple sub-pixels in the display area, the multiple sub-pixels including a first sub-pixel and a second sub-pixel, the first sub-pixel being used to transmit a first color light and the second sub-pixel being used to transmit a second color light; The display panel also includes: First substrate; Multiple conductive layers are sequentially stacked on one side of the first substrate along the normal direction of the first substrate. A filter layer is disposed between the first substrate and the conductive layer. The filter layer includes a plurality of filter patterns, including a first filter pattern. In the orthographic projection on the first substrate, the first filter pattern overlaps with the opening area of ​​the first sub-pixel but does not overlap with the opening area of ​​the second sub-pixel. The first filter pattern is used to transmit the first color light and reflect the second color light.

2. The display panel according to claim 1, wherein, The plurality of filter patterns also include: In the orthographic projection onto the first substrate, the second filter pattern overlaps with the opening area of ​​the second sub-pixel but does not overlap with the opening area of ​​the first sub-pixel. The second filter pattern is used to transmit the second color light and reflect the first color light; the opening area is used to transmit light.

3. The display panel according to claim 1, wherein, The display panel also includes: A first planarization layer is disposed on the side of the first substrate and the filter layer near the conductive layer. The orthographic projection of the first planarization layer on the first substrate covers the entire first substrate, and the surface of the first planarization layer facing away from the first substrate is planar.

4. The display panel according to claim 1, wherein, The display panel also includes a second planarization layer; The orthographic projection of the second planarization layer onto the first substrate covers the gaps between the plurality of filter patterns.

5. The display panel according to claim 4, wherein, The plurality of conductive layers include a plurality of metal layers, the plurality of metal layers including a gate layer and a source / drain metal layer, the source / drain metal layer being located between the first substrate and the filter layer, and the second planarization layer covering a portion of the source / drain metal layer and filling the gaps between the plurality of filter patterns.

6. The display panel according to claim 4, wherein, The plurality of conductive layers include a plurality of metal layers, the plurality of metal layers including a gate layer and a source / drain metal layer, and the second planarization layer is disposed between the metal layers and the first substrate.

7. The display panel according to claim 6, wherein, The display panel includes a buffer layer, a semiconductor layer, a gate insulating layer, a gate layer, a first interlayer dielectric layer, and a source / drain metal layer, which are sequentially disposed along the normal direction of the first substrate away from the filter layer. The second planarization layer is disposed between one of the following films: the buffer layer, the semiconductor layer, the gate insulating layer, the gate layer, the first interlayer dielectric layer, and the source / drain metal layer, and the first substrate.

8. The display panel according to claim 7, wherein, The second flattening layer fills the gaps between the plurality of filter patterns; Along the normal direction of the first substrate, the difference between the distance between the surface of the second planarization layer away from the first substrate and the distance between the surface of the filter pattern away from the first substrate and the first substrate is less than or equal to 200 nm.

9. The display panel according to claim 8, wherein, The surface of the second planarization layer opposite to the first substrate is approximately flush with the surface of the filter pattern opposite to the first substrate.

10. The display panel according to claim 7 or 8, wherein, The difference between the refractive index of the second planarization layer and the refractive index of the first substrate is less than or equal to 0.

1.

11. The display panel according to claim 10, wherein, The material of the second planarization layer includes silicon dioxide.

12. The display panel according to claim 10, wherein, The second planarization layer and the first substrate are an integrated structure.

13. The display panel according to claim 1, wherein, The filter pattern includes stacked and alternating high-refractive-index layers and low-refractive-index layers, wherein the refractive index of the high-refractive-index layers is greater than that of the low-refractive-index layers.

14. The display panel according to claim 1, wherein, The first sub-pixel includes a red sub-pixel and a green sub-pixel, the first color ray includes a red ray and a green ray, the second sub-pixel includes a blue sub-pixel, and the second color ray includes a blue ray.

15. The display panel according to any one of claims 1 to 9, 11 to 14, wherein, The conductive layer includes: A semiconductor layer is disposed on the side of the filter layer opposite to the first substrate. The semiconductor layer includes active transistor layers located in different sub-pixels in the display area and active transistor layers located in a peripheral area. The peripheral area is located on at least one side of the display area. In the orthographic projection onto the first substrate, the filter pattern completely covers the active layer of the transistor.

16. A display panel, wherein, It includes multiple sub-pixels in the display area, the multiple sub-pixels including a first sub-pixel and a second sub-pixel, the first sub-pixel being used to transmit a first color light and the second sub-pixel being used to transmit a second color light; The display panel also includes: Substrate; A filter layer is disposed on the side of the substrate away from the backlight of the display panel; the filter layer includes a plurality of filter patterns, the plurality of filter patterns including a first filter pattern, in the orthographic projection on the substrate, the first filter pattern overlaps with the opening area of ​​the first sub-pixel and does not overlap with the opening area of ​​the second sub-pixel, the first filter pattern is used to transmit the first color light and reflect the second color light. The display panel includes an array substrate, a color filter substrate, and a liquid crystal layer located between the array substrate and the color filter substrate; The substrate includes at least one of a first substrate and a second substrate, wherein the first substrate is located on the array substrate and the second substrate is located on the color filter substrate.

17. The display panel according to claim 1, wherein, The color filter substrate includes a plurality of color filter patterns located on the second substrate. The plurality of color filter patterns include a first color filter pattern and a second color filter pattern. In the orthographic projection on the second substrate, the first color filter pattern overlaps with the opening area of ​​the first sub-pixel but does not overlap with the opening area of ​​the second sub-pixel. The first color filter pattern is used to transmit the first color light and reflect the second color light. The filter layer is disposed on the side of the second substrate away from the backlight of the display panel, and the orthographic projection of the first color filter pattern on the second substrate covers the orthographic projection of the filter layer on the second substrate.

18. The display panel according to claim 17, wherein, The sum of the thicknesses of the filter layer and the first color filter pattern is approximately equal to the thickness of the second color filter pattern.

19. The display panel according to any one of claims 16 to 18, wherein, The filter pattern includes stacked and alternating high-refractive-index layers and low-refractive-index layers, wherein the refractive index of the high-refractive-index layers is greater than that of the low-refractive-index layers; The first sub-pixel includes a red sub-pixel and a green sub-pixel, the first color ray includes a red ray and a green ray, the second sub-pixel includes a blue sub-pixel, and the second color ray includes a blue ray.

20. A display device, wherein, include: The driving component and the display panel as described in any one of claims 1 to 19; The driving component is connected to the display panel and is used to drive the display panel to emit light.

Citation Information

Patent Citations

  • Color filter, manufacturing method thereof, array substrate and display device

    CN104765193A

  • Colored filter layer, display substrate and display device

    CN105044974A

  • Display basal plate and manufacturing method thereof, display device

    CN109581733A

  • Display substrate, display device and preparation method thereof

    CN116528622A

  • Liquid crystal display device

    CN212364762U