Array substrate and manufacturing method therefor, liquid crystal dimming panel, and display device

Abstract

Disclosed in the present disclosure are an array substrate and a manufacturing method therefor, a liquid crystal dimming panel, and a display device. The array substrate comprises: a base substrate; a signal lead layer located on one side of the base substrate and located in a peripheral region, the signal lead layer comprising a plurality of signal leads arranged at intervals in a first direction; a first insulating layer located on the side of the signal lead layer away from the base substrate, wherein a plurality of first protrusion structures arranged at intervals in a second direction are provided on the side of the first insulating layer away from the base substrate, the first direction intersects with the second direction, each first protrusion structure extends from a functional region to a position above the corresponding signal lead in the peripheral region, and the first protrusion structure spans at least one signal lead; and a first driving electrode layer located on the side of the first insulating layer away from the base substrate, wherein the first driving electrode layer comprises a plurality of first driving electrodes respectively located on the sides of the first protrusion structures away from the base substrate, and each first driving electrode is electrically connected to the corresponding signal lead through a first via hole penetrating through the first insulating layer.

Description

Array substrate, manufacturing method thereof, liquid crystal light control panel and display device

[0001] Cross-reference to related applications

[0002] The present application claims priority to the Chinese patent application No. 202410832205.X, filed on June 25, 2024, and entitled "Array substrate, manufacturing method thereof, liquid crystal light control panel and display device", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0003] The present disclosure relates to the technical field of display, and in particular, to an array substrate, a manufacturing method thereof, a liquid crystal light control panel and a display device. BACKGROUND

[0004] With the development of display technology, the functions of display products are becoming more and more diversified. At present, 3D (Three Dimensional) stereoscopic display products, especially naked-eye stereoscopic display products, have become a major trend in the display field. Compared with ordinary two-dimensional display products, naked-eye stereoscopic display products not only make the picture stereoscopic and realistic, and the image no longer limited to the screen plane, giving the audience a sense of being there, but also do not require the viewer to wear 3D glasses, making it convenient for users to use, and thus favored by users.

[0005] At present, liquid crystal lenses, liquid crystal gratings and the like are important components of naked-eye stereoscopic display products. SUMMARY

[0006] The present disclosure provides an array substrate, a manufacturing method thereof, a liquid crystal light control panel and a display device, and the specific solutions are as follows:

[0007] The array substrate provided by the present disclosure comprises:

[0008] A substrate substrate comprises a functional area and a peripheral area located at the periphery of the functional area;

[0009] A signal lead layer is located on one side of the substrate substrate and in the peripheral area, and the signal lead layer comprises a plurality of signal leads arranged at intervals along a first direction;

[0010] A first insulating layer is located on the side of the signal lead layer away from the substrate substrate, and the side of the first insulating layer away from the substrate substrate comprises a plurality of first protruding structures arranged at intervals along a second direction, the first direction and the second direction intersect, each first protruding structure extends from the functional area to above the corresponding signal lead in the peripheral area, and the first protruding structure spans at least one signal lead;

[0011] a first driving electrode layer located on a side of the first insulating layer away from the substrate, the first driving electrode layer comprising a plurality of first driving electrodes respectively located on a side of each of the first protruding structures away from the substrate, each of the first driving electrodes being electrically connected to the corresponding signal lead via a first via hole penetrating through the first insulating layer.

[0012] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, a cross section of the first protruding structure along the second direction is trapezoidal, the first protruding structure comprises a bottom surface close to the substrate, a top surface away from the substrate, and a pair of side walls connecting the top surface and the bottom surface, and a width of the top surface along the second direction is less than a width of the bottom surface along the second direction.

[0013] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, the first driving electrode comprises a first part extending along the first direction and a second part extending along the second direction, the first part and the second part are an integral structure, the first part extends from the functional area to above the corresponding signal lead of the peripheral area, the first part is located on a side of the first protruding structure away from the substrate, and the second part is electrically connected to the signal lead via the first via hole penetrating through the first insulating layer.

[0014] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, the first part covers the top surface of the first protruding structure and covers at least part of the side walls of the first protruding structure.

[0015] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, the first part covers 50% to 100% of an area of one of the side walls.

[0016] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, the first part further covers 50% to 100% of an area of the other side wall.

[0017] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, a projection on the substrate of a gap between adjacent first driving electrodes at least covers a projection on the substrate of a gap between adjacent first protruding structures.

[0018] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, an included angle between the side wall of the first protruding structure and the bottom surface of the first protruding structure is 10° to 80°.

[0019] In a possible implementation, in the array substrate provided by the embodiment of the present disclosure, the first insulating layer is a single-layer structure, and a material of the first insulating layer is an inorganic material.

[0020] In a possible implementation, in the array substrate provided by the embodiment of the present disclosure, a thickness of the first protruding structure is 1 / 4 to 3 / 4 of a thickness of the first insulating layer.

[0021] In a possible implementation, in the array substrate provided by the embodiment of the present disclosure, the first insulating layer between the second part and the signal lead layer is arranged to be flush with a groove bottom between the first protruding structure and the surface of the substrate.

[0022] In a possible implementation, in the array substrate provided by the embodiment of the present disclosure, the first insulating layer includes a first sub-insulating layer between the signal lead layer and the first driving electrode layer, and a second sub-insulating layer between the first sub-insulating layer and the first driving electrode layer; wherein,

[0023] The second sub-insulating layer includes a plurality of the first protruding structures, and the second part is electrically connected to the signal lead through a first via hole penetrating through the first sub-insulating layer.

[0024] In a possible implementation, in the array substrate provided by the embodiment of the present disclosure, a material of the first sub-insulating layer is an inorganic material, and a material of the second sub-insulating layer is an organic photosensitive material.

[0025] In a possible implementation, in the array substrate provided by the embodiment of the present disclosure, an organic material layer is further arranged between the first protruding structures and in the functional area, and a normal projection of the organic material layer on the substrate does not overlap with a normal projection of the first driving electrode on the substrate.

[0026] In a possible implementation, in the array substrate provided by the embodiment of the present disclosure, a second insulating layer is further arranged on a side of the first driving electrode layer away from the substrate, and a second driving electrode layer is further arranged on a side of the second insulating layer away from the substrate; wherein,

[0027] The side of the second insulating layer away from the substrate includes a plurality of second protruding structures arranged at intervals along the second direction, each of the second protruding structures extends from the functional area to above the signal lead corresponding to the peripheral area, the second protruding structure spans at least one of the signal leads, and normal projections of the second protruding structure and the first protruding structure on the substrate are arranged alternately along the second direction.

[0028] The second driving electrode layer includes a plurality of second driving electrodes respectively located on the side of each second protruding structure away from the substrate, and each second driving electrode is electrically connected to the corresponding signal lead wire through a second via penetrating the first insulating layer and the second insulating layer.

[0029] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, the structure of the second insulating layer is the same as that of the first insulating layer.

[0030] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, the structure of the second driving electrode is the same as that of the first driving electrode, and the material of the second driving electrode is the same as that of the first driving electrode.

[0031] In a possible implementation, in the array substrate provided by the embodiments of the present disclosure, the material of the signal lead wire layer is a metal material, and the material of the first driving electrode layer is a transparent conductive material.

[0032] Correspondingly, the embodiments of the present disclosure further provide a manufacturing method of an array substrate, comprising:

[0033] providing a substrate, wherein the substrate includes a functional area and a peripheral area located at the periphery of the functional area;

[0034] forming a signal lead wire layer including a plurality of signal lead wires arranged at intervals along a first direction on the peripheral area of the substrate;

[0035] forming a first insulating layer on the side of the signal lead wire layer away from the substrate, wherein the side of the first insulating layer away from the substrate includes a plurality of first protruding structures arranged at intervals along a second direction, the first direction and the second direction intersect, each first protruding structure extends from the functional area to above the corresponding signal lead wire of the peripheral area, and the first protruding structure spans at least one signal lead wire;

[0036] forming a first driving electrode layer on the side of the first insulating layer away from the substrate, wherein the first driving electrode layer includes a plurality of first driving electrodes respectively located on the side of each first protruding structure away from the substrate, and each first driving electrode is electrically connected to the corresponding signal lead wire through a first via penetrating the first insulating layer.

[0037] In a possible implementation, in the manufacturing method provided by the embodiments of the present disclosure, the forming of the first insulating layer on the side of the signal lead wire layer away from the substrate specifically includes:

[0038] depositing an inorganic insulating material film on a side of the signal lead layer away from the substrate substrate;

[0039] forming a photoresist layer on a side of the inorganic insulating material film away from the substrate substrate;

[0040] performing a patterned treatment on the photoresist layer through a half-tone mask process to form a first photoresist pattern including a photoresist completely reserved area, a photoresist semi-reserved area, and a photoresist completely removed area, the photoresist completely reserved area corresponding to a region where the first protruding structure is located, the photoresist completely removed area corresponding to the first via region, and the photoresist semi-reserved area being a region other than the photoresist completely reserved area and the photoresist completely removed area;

[0041] performing etching on the inorganic insulating material film with the first photoresist pattern as a mask to form the first via corresponding to the photoresist completely removed area;

[0042] performing an ashing treatment on the first photoresist pattern to remove photoresist in the photoresist semi-reserved area and thin the photoresist in the photoresist completely reserved area, thereby forming a second photoresist pattern;

[0043] performing etching on the inorganic insulating material film corresponding to the photoresist semi-reserved area with the second photoresist pattern as a mask to form the first protruding structure corresponding to the photoresist completely reserved area;

[0044] removing the second photoresist pattern.

[0045] In a possible implementation, in the above manufacturing method provided by the embodiments of the present disclosure, the forming of the first insulating layer on a side of the signal lead layer away from the substrate substrate specifically includes:

[0046] depositing an inorganic insulating material film on a side of the signal lead layer away from the substrate substrate;

[0047] performing etching on the inorganic insulating material film to form a first sub-insulating layer including the first via;

[0048] applying an organic photosensitive film layer on a side of the first sub-insulating layer away from the substrate substrate;

[0049] performing exposure and development on the organic photosensitive film layer to form a second sub-insulating layer including a plurality of the first protruding structures.

[0050] In a possible implementation, in the above manufacturing method provided by the embodiments of the present disclosure, the method further includes:

[0051] A second insulating layer is formed on the side of the first driving electrode layer away from the substrate by using the same manufacturing method as that of the first insulating layer; wherein the side of the second insulating layer away from the substrate includes a plurality of second protruding structures arranged at intervals along the second direction, each of the second protruding structures extends from the functional area to above the signal lead corresponding to the peripheral area, the second protruding structure spans at least one signal lead, and the normal projection of the second protruding structure and the first protruding structure on the substrate is arranged alternately along the second direction.

[0052] A second driving electrode layer is formed on the side of the second insulating layer away from the substrate; wherein the second driving electrode layer includes a plurality of second driving electrodes respectively located on the side of each second protruding structure away from the substrate, and each second driving electrode is electrically connected to the corresponding signal lead through a second via penetrating the first insulating layer and the second insulating layer.

[0053] Correspondingly, the present disclosure also provides a liquid crystal light control panel, comprising: an array substrate and an opposite substrate arranged oppositely, and a liquid crystal layer located between the array substrate and the opposite substrate; wherein the array substrate is the above-mentioned array substrate provided by the present disclosure.

[0054] In a possible implementation, in the above-mentioned liquid crystal light control panel provided by the present disclosure, the liquid crystal light control panel is a liquid crystal lens panel or a liquid crystal grating panel.

[0055] Correspondingly, the present disclosure also provides a display device, comprising: a display panel, and the above-mentioned liquid crystal light control panel provided by the present disclosure located on the display side of the display panel. BRIEF DESCRIPTION OF DRAWINGS

[0056] FIG. 1 is a plan view of an array substrate of a liquid crystal lens;

[0057] FIG. 2 is an enlarged view of the area E in FIG. 1;

[0058] FIG. 3 is a plan SEM photo of the area F in FIG. 2, in which the driving electrode trace crosses the signal lead area;

[0059] FIG. 4 is a cross-sectional SEM photo of the area F in FIG. 2 along the driving electrode extension direction, in which the driving electrode trace crosses the signal lead area;

[0060] FIG. 5A is a plan view of an array substrate provided by the present disclosure;

[0061] FIG. 5B is a schematic view of the partial structure in the peripheral area BB on the upper side of the functional area AA in FIG. 5A;

[0062] Fig. 5C is a schematic view of a partial structure in a peripheral area BB under the functional area AA in Fig. 5A;

[0063] Fig. 6 is an enlarged schematic view in a dashed box E in Fig. 5A;

[0064] Fig. 7 is a schematic view of a cross section along a direction CC' in Fig. 6;

[0065] Fig. 8 is a schematic view of another cross section along the direction CC' in Fig. 6;

[0066] Fig. 9 is a schematic view of a cross section along a direction DD' in Fig. 6;

[0067] Fig. 10 is a schematic view of another array substrate structure provided by an embodiment of the present disclosure;

[0068] Fig. 11 is a schematic view of another array substrate structure provided by an embodiment of the present disclosure;

[0069] Fig. 12 is a schematic view of another array substrate structure provided by an embodiment of the present disclosure;

[0070] Fig. 13 is a schematic view of another array substrate structure provided by an embodiment of the present disclosure;

[0071] Fig. 14 is a schematic view of another array substrate structure provided by an embodiment of the present disclosure;

[0072] Fig. 15 is a schematic view of another array substrate structure provided by an embodiment of the present disclosure;

[0073] Fig. 16 is a flowchart of a manufacturing method of an array substrate provided by an embodiment of the present disclosure;

[0074] Fig. 17A is a schematic view of a structure of the array substrate shown in Fig. 7 during manufacturing provided by an embodiment of the present disclosure;

[0075] Fig. 17B is a schematic view of another structure of the array substrate shown in Fig. 7 during manufacturing provided by an embodiment of the present disclosure;

[0076] Fig. 17C is a schematic view of another structure of the array substrate shown in Fig. 7 during manufacturing provided by an embodiment of the present disclosure;

[0077] Fig. 17D is a schematic view of another structure of the array substrate shown in Fig. 7 during manufacturing provided by an embodiment of the present disclosure;

[0078] Fig. 17E is a schematic view of another structure of the array substrate shown in Fig. 7 during manufacturing provided by an embodiment of the present disclosure;

[0079] Fig. 17F is a schematic view of another structure of the array substrate shown in Fig. 7 during manufacturing provided by an embodiment of the present disclosure;

[0080] FIG. 17G is another schematic view of the array substrate shown in FIG. 7 during manufacture according to embodiments of the present disclosure;

[0081] FIG. 17H is another schematic view of the array substrate shown in FIG. 7 during manufacture according to embodiments of the present disclosure;

[0082] FIG. 18A is a schematic view of the array substrate shown in FIG. 8 during manufacture according to embodiments of the present disclosure;

[0083] FIG. 18B is another schematic view of the array substrate shown in FIG. 8 during manufacture according to embodiments of the present disclosure;

[0084] FIG. 18C is another schematic view of the array substrate shown in FIG. 8 during manufacture according to embodiments of the present disclosure;

[0085] FIG. 19 is a schematic view of the array substrate shown in FIG. 15 during manufacture according to embodiments of the present disclosure. DETAILED DESCRIPTION

[0086] In order to make the objects, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely below with reference to the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are some but not all of the embodiments of the present disclosure. And the embodiments in the present disclosure and the features in the embodiments can be combined with each other without conflict, if necessary. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative work belong to the protection scope of the present disclosure.

[0087] Unless otherwise defined, the technical terms or scientific terms used in the present disclosure should be understood as the common meanings thereof by those of ordinary skill in the art to which the present disclosure belongs. The similar words such as “comprise” or “contain” and the like used in the present disclosure mean that the elements or objects before the words cover the elements or objects listed after the words and their equivalents, and do not exclude other elements or objects. The similar words such as “connect” or “connected” do not mean the physical or mechanical connection, but can include the electrical connection, whether direct or indirect. “In”, “out”, “up”, “down”, and the like are only used to indicate relative positional relationships, and when the absolute positions of the described objects are changed, the relative positional relationships can also be changed accordingly.

[0088] As used in the present disclosure, "about," "approximately," or "around" includes the recited value and the average value within an acceptable range of deviation from the particular value, as determined by one of ordinary skill in the art taking into account the measurement being discussed and the error associated with the measurement of the particular quantity (i.e., the limitations of the measurement system).

[0089] As used in the present disclosure, "parallel," "perpendicular," "equal" includes the recited condition and conditions that approximate the recited condition, the approximation being within an acceptable range of deviation, as determined by one of ordinary skill in the art taking into account the measurement being discussed and the error associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallel and near parallel, where the acceptable range of deviation for near parallel can be, for example, within 5°; "perpendicular" includes absolute perpendicular and near perpendicular, where the acceptable range of deviation for near perpendicular can also be, for example, within 5°. "Equal" includes absolute equality and near equality, where the acceptable range of deviation for near equality can be, for example, a difference between the two that is less than or equal to 10% of either.

[0090] It should be understood that when a layer or element is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers can also be present.

[0091] The present disclosure describes example embodiments with reference to cross-sectional and / or plan view illustrations that are idealized example diagrams. In the drawings, the thickness of layers and regions are exaggerated for clarity. Accordingly, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and / or tolerances, are to be expected. Thus, the example embodiments should not be construed as limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. For example, an etched region illustrated as a rectangle will typically have rounded or curved features. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the precise shape of a region of a device and are not intended to limit the scope of the example embodiments.

[0092] In the present disclosure, a circle, a triangle, a rectangle, a trapezoid, a pentagon, or a hexagon, etc. is not strictly in the sense, can be an approximate circle, triangle, rectangle, trapezoid, pentagon, or hexagon, etc. there can be some small deformation caused by tolerance, there can be a guide angle, an arc edge, and deformation, etc.

[0093] As an example of liquid crystal lens, liquid crystal lens is widely used in various fields as a new type of optical device. Liquid crystal lens uses the characteristic that liquid crystal material changes refractive index under the action of electric field to realize focusing and dispersing of light. When electric field is applied to liquid crystal lens, the directional arrangement of liquid crystal molecules changes, and the refractive index distribution of liquid crystal lens changes, thereby realizing modulation of light.

[0094] The liquid crystal lens includes array substrate and opposite substrate arranged oppositely and liquid crystal layer between the array substrate and the opposite substrate, and the opposite substrate generally includes common electrode. As shown in FIG. 1 and FIG. 2, FIG. 1 is a plan view of the array substrate of the liquid crystal lens, and FIG. 2 is an enlarged view of the dashed box E in FIG. 1. The array substrate of the liquid crystal lens generally includes: substrate 1, a plurality of signal leads 2 (Gate layer) in the peripheral area BB of the substrate 1, an insulating layer 3 on the side of the plurality of signal leads 2 away from the substrate 1, and a plurality of drive electrodes 4 (ITO electrode) on the side of the insulating layer 3 away from the substrate 1 and in the functional area AA of the substrate 1; wherein the drive electrodes 4 extend from the functional area AA to above the signal leads 2 corresponding to the peripheral area BB and are electrically connected to the signal leads 2 through the via holes V penetrating the insulating layer 3, that is, by designing a plurality of groups of drive electrodes 4 in the functional area AA and signal leads 2 in the peripheral area BB, the drive voltage is applied to the drive electrodes 4 through the signal leads 2, and the common voltage is applied to the common electrode of the opposite substrate to form an electric field, the liquid crystal molecules of the liquid crystal layer are driven to deflect by the electric field, and the designed liquid crystal lens group is realized.

[0095] With the increase of resolution, the wiring density of the driving electrode 4 in the liquid crystal lens array substrate is higher and higher, which requires reducing the line width (L) of the driving electrode 4 and reducing the gap width (S) between adjacent wires, resulting in a small pitch (L+S) of the driving electrode 4. Due to the signal lead 2 arranged in the peripheral area BB, the height from the surface of the insulating layer 3 to the substrate 1 in the peripheral area BB is higher than the height from the surface of the insulating layer 3 to the substrate 1 in the functional area AA, so the insulating layer 3 has a slope (in the dashed box F) on both sides of the signal lead 2 along the arrangement direction of the signal lead 2, and thus the driving electrode 4 wire needs to climb over the corresponding signal lead 2 in the peripheral area BB. The driving electrode 4 wire is generally formed by wet etching. When the photoresist is coated on the ITO layer, the photoresist on the slope is relatively thin, the protection of the area to be formed with the driving electrode 4 wire below is weakened, and the etching liquid easily enters the driving electrode 4 wire below. In addition, as the driving electrode 4 wire is thinner and thinner, the risk of disconnection on the flat insulating layer 3 in the functional area AA is relatively small, but the thinner driving electrode 4 wire is easily drilled by the etching liquid on the slope, and the ITO electrode wire is prone to disconnection (Open) on the slope. That is, the driving electrode 4 wire across the signal lead 2 area in FIG. 1 occurs the step open caused by the climbing of the driving electrode 4 wire. In addition, the thinner the driving electrode 4 wire, the higher the probability of open in the functional area AA.

[0096] As shown in FIGS. 3 and 4, FIG. 3 is a planar SEM photo of the driving electrode 4 wire across the signal lead 2 area (in the dashed box F) in FIG. 2, and FIG. 4 is a cross-sectional SEM photo of the driving electrode 4 wire across the signal lead 2 area (in the dashed box F) in FIG. 2 along the extension direction of the driving electrode 4. It can be seen that the driving electrode wire (ITO represents) on the slope is obviously disconnected. When the liquid crystal lens is applied to a 3D display product, these disconnections will cause electrical failure on the 3D display product. At the same time, due to the limitation of the driving electrode 4 wiring space and the limitation of the resolution of the exposure equipment, it is impossible to design the driving electrode 4 on the slope to be widened.

[0097] Therefore, in order to avoid the disconnection of the driving electrode wire on the slope of the insulating layer, the present embodiment provides an array substrate, as shown in FIGS. 5A-9, FIG. 5A is a planar schematic diagram of the array substrate provided by the present embodiment, FIG. 6 is an enlarged schematic diagram of the dashed box E in FIG. 5A, FIG. 7 is a cross-sectional schematic diagram of FIG. 6 along the CC' direction, FIG. 8 is another cross-sectional schematic diagram of FIG. 6 along the CC' direction, and FIG. 9 is a cross-sectional schematic diagram of FIG. 6 along the DD' direction. The array substrate comprises:

[0098] a substrate 10, comprising a functional area AA and a peripheral area BB located at the periphery of the functional area AA;

[0099] The signal lead layer 20 is located on one side of the substrate base plate 1 and in the peripheral region BB, and includes a plurality of signal leads 21 arranged at intervals along the first direction Y;

[0100] The first insulating layer 30 is located on the side of the signal lead layer 20 away from the substrate base plate 10, and the side of the first insulating layer 30 away from the substrate base plate 10 includes a plurality of first protruding structures 31 arranged at intervals along the second direction X, the first direction Y and the second direction X intersecting, each first protruding structure 31 extending from the functional region AA to above the corresponding signal lead 21 in the peripheral region BB, and the first protruding structure 31 spanning at least one signal lead 21;

[0101] The first driving electrode layer 40 is located on the side of the first insulating layer 30 away from the substrate base plate 10, and the first driving electrode layer 40 includes a plurality of first driving electrodes 41 respectively located on the side of each first protruding structure 31 away from the substrate base plate 10, each first driving electrode 41 being electrically connected to the corresponding signal lead 21 through a first via V1 penetrating the first insulating layer 30.

[0102] The array substrate provided by the embodiments of the present disclosure forms the first insulating layer having the first protruding structure in the functional region and the peripheral region on the side of the first insulating layer away from the substrate base plate, and forms the first driving electrode of the functional region and the peripheral region on the first protruding structure of the first insulating layer, so that in the process of forming the first driving electrode by wet etching, the etching liquid flows along the grooves between adjacent first protruding structures, avoiding the etching liquid from gathering at the slope position where the first driving electrode of the peripheral region and the signal lead cross, thereby avoiding the first driving electrode from being drilled and etched by the etching liquid at the slope position, causing the first driving electrode to break.

[0103] Specifically, as shown in FIGS. 5A and 6, the first direction Y and the second direction X can be perpendicular.

[0104] Specifically, as shown in FIGS. 5A and 6, the first protruding structure 31 is arranged along the second direction X and extends along the first direction Y, the first driving electrode 41 is a strip-shaped electrode arranged along the second direction X and extending along the first direction Y, and the part of the signal lead 21 electrically connected to the first driving electrode 41 is arranged along the first direction Y and extends along the second direction X.

[0105] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIGS. 7 and 8, the first protruding structure 31 has a trapezoidal cross section along the second direction X, the first protruding structure 31 includes a bottom surface 311 close to the substrate 10, a top surface 312 away from the substrate 10, and a pair of side walls (313 and 314) connecting the top surface 312 and the bottom surface 311, the width of the top surface 312 along the second direction X is less than the width of the bottom surface 311 along the second direction X. In this way, when the first driving electrode 41 is formed on the first protruding structure 31, the first driving electrode 41 covering the top surface 312 and the side walls (313 and 314) can be formed, compared with the driving electrode 4 shown in FIG. 2, under the same Pitch (L+S) of the first driving electrode 41, the effective width (i.e. the sum of the width of the top surface 312, the width of at least part of the surface of the side wall 313 and the width of at least part of the surface of the side wall 314) of the first driving electrode 41 shown in FIGS. 7 and 8 is increased, and the Open of the first driving electrode 41 at the slope of the first insulating layer 30 in the peripheral region BB in the etching process can be avoided; on the contrary, compared with the driving electrode 4 shown in FIG. 2, under the same effective width of the first driving electrode 41, the Pitch (L+S) of the first driving electrode 41 shown in FIGS. 7 and 8 can be reduced, so that the wiring density of the first driving electrode 41 can be improved, when the array substrate is applied to the liquid crystal lens, the resolution of the liquid crystal lens can be improved, and when the liquid crystal lens is applied to the naked-eye 3D display, the naked-eye 3D display effect can be improved.

[0106] It should be noted that the trapezoidal shape mentioned above refers to a shape similar to a trapezoid, and due to the influence of the manufacturing process, the surface of the first protruding structure 31 away from the substrate 10 in the cross section along the second direction X can be arc-shaped.

[0107] It should be noted that when the array substrate is applied to the naked-eye 3D display, the functional region AA is the display region.

[0108] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIGS. 6-8, the first driving electrode 41 includes a first part 411 extending along the first direction Y and a second part 412 extending along the second direction X, the first part 411 and the second part 412 are an integral structure, the first part 411 extends from the functional area AA to above the signal lead 21 corresponding to the peripheral area BB, taking the three first driving electrodes 41 and the three signal leads 21 shown in FIG. 6 as an example, the first driving electrode 41 on the left extends from the functional area AA to above the third signal lead 21 from top to bottom corresponding to the peripheral area BB, the second first driving electrode 41 on the left extends from the functional area AA to above the second signal lead 21 from top to bottom corresponding to the peripheral area BB, and the third first driving electrode 41 on the left extends from the functional area AA to above the first signal lead 21 from top to bottom corresponding to the peripheral area BB. Since the extension direction of the first part 411 is perpendicular to that of the signal lead 21, the first part 411 needs to climb the slope of the first insulating layer 30 to above the corresponding signal lead 21, so the first part 411 needs to be arranged on the side of the first protruding structure 31 away from the substrate 10, that is, the present disclosure only arranges the first part 411 extending along the first direction Y in the first driving electrode 41 on the first protruding structure 31, which can avoid the accumulation of etching liquid at each slope of the first insulating layer 30 in the process of etching the first driving electrode 41; the second part 412 is electrically connected to the signal lead 21 through the first via V1 penetrating the first insulating layer 30, so that the signal lead 21 can be input with a driving voltage signal by an external circuit (such as an IC), and then the driving voltage signal is transmitted to the corresponding first driving electrode 41 through the signal lead 21; since the extension direction of the second part 412 is the same as that of the signal lead 21, the second part 412 does not need to climb, so the first insulating layer 30 below the second part 412 does not need to form the first protruding structure 31.

[0109] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIGS. 6-8, the first part 411 covers the top surface 312 of the first protruding structure 31 and covers at least part of the sidewall of the first protruding structure 31, for example, in order to avoid the Open problem caused by the narrow effective width of the first driving electrode 41 in the case of realizing high resolution, the first part 411 can cover 50%-100% of the area of one sidewall (such as 313), and in order to further avoid the Open problem caused by the narrow effective width of the first driving electrode 41, the first part 411 can also cover 50%-100% of the area of another sidewall (such as 314).

[0110] Specifically, as shown in FIGS. 6-8, the first portion 411 covers the top surface 312 of the first protruding structure 31 and completely covers the two side walls (313 and 314) of the first protruding structure 31, so that the first portion 411 is divided into three parts along the second direction X: an upper part on the top surface 312, a left part on the left side wall 313, and a right part on the right side wall 314, the widths of which are L2, L1 and L3 respectively; the orthographic projection width of the first portion 411 on the substrate 10 is L, wherein the orthographic projection widths of the upper part on the top surface 312, the left part on the side wall 313 and the right part on the side wall 314 on the substrate 10 are L2, L1' and L3' respectively, and L2+L1'+L3'=L; the thickness of the first protruding structure 31 is H, and the included angle a between the side wall (for example, 313) of the first protruding structure 31 and the bottom surface 311 of the first protruding structure 31 can be 10°-80°, it is easy to know that L1=L1' / cosin a and L3=L3' / cosin a, so the effective width Line of the first portion 411 is Line=L2+L1+L3=L2+L1' / cosin a+L3' / cosin a, taking a=60° as an example, Line=L2+2*L1'+2*L3', it can be seen that the effective width Line of the first portion 411 is greater than the orthographic projection width L of the first portion 411 on the substrate 10. Therefore, compared with the structure shown in FIG. 2, the effective width of the first driving electrode 41 provided by the embodiment of the present disclosure is larger under the same high resolution, and the problem of Open of the first driving electrode 41 can be avoided.

[0111] Specifically, as shown in FIGS. 6-8, in the embodiment of the present disclosure, the wiring pitch of the first driving electrode 41 is L+S, S being the width of the groove bottom between adjacent first protruding structures 31, and the pitch is mainly limited by the exposure accuracy of the exposure machine. In the case that the exposure accuracy of the exposure machine is close to the limit, if the pitch is to be reduced, the most effective means is to reduce the width L of the orthographic projection of the first driving electrode 41 on the substrate 10. However, if the width L is reduced, the first driving electrode 41 in the peripheral region BB and the functional region AA is prone to Open defect caused by the lateral etching of the etching liquid in the wet etching process. Therefore, the width L cannot be reduced indefinitely and has a minimum lower limit. In the embodiment of the present disclosure, due to the presence of the first protruding structure 31, the effective width Line of the first driving electrode 41 is greater than the orthographic projection width L on the substrate 10. Thus, the lower limit of the orthographic projection width L of the first driving electrode 41 on the substrate 10 can be effectively reduced, the pitch of the first driving electrode 41 in the functional region AA is reduced, and the resolution of the liquid lens is improved. Moreover, because the etching liquid will mainly flow in the groove of the first insulating layer 30 in the etching process of the first driving electrode 41, the etching liquid is prevented from etching the first driving electrode 41 laterally. Thus, even if the orthographic projection width L of the first driving electrode 41 in the functional region AA is reduced, the driving electrode Open defect in the related art will not occur.

[0112] In some embodiments, in the array substrate provided in the embodiment of the present disclosure, as shown in FIGS. 6-8, the orthographic projection of the gap between adjacent first driving electrodes 41 on the substrate 10 covers at least the orthographic projection of the gap between adjacent first protruding structures 31 on the substrate 10. In this way, the first driving electrode 41 can be located on the side of the first protruding structure 31 away from the substrate 10.

[0113] In some embodiments, in the array substrate provided in the embodiment of the present disclosure, as shown in FIG. 7, the first insulating layer 30 can be a single-layer structure, and the material of the first insulating layer 30 can be an inorganic material, such as silicon nitride, silicon oxide, silicon oxynitride, etc. In this way, the first via V1 of the first insulating layer 30 located in the peripheral region BB in the embodiment of the present disclosure can be prepared by the same mask (Mask) process as the first protruding structure 31, such as the Half Tone process, without the need to increase a new Mask process, and the manufacturing process is simple.

[0114] In some embodiments, in the array substrate provided in the embodiment of the present disclosure, as shown in FIG. 7, the thickness H of the first protruding structure 31 can be 1 / 4-3 / 4 of the thickness of the first insulating layer, so as to realize the insulation arrangement of the first driving electrode layer 4 and the signal lead layer 20.

[0115] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIGS. 6 and 7, the first insulating layer 30 between the second portion 412 and the signal lead layer 20 is arranged flush with the groove bottom 315 away from the surface 301 of the substrate 10, so that the thickness of the first insulating layer 30 between the second portion 412 and the signal lead layer 20 is low, and the depth of the first via V1 is also low, which can avoid the problem of disconnection of the second portion 412 in the first via V1.

[0116] It should be noted that the flush arrangement mentioned above means substantially flush, and due to the influence of the manufacturing process, the height difference between the surface 301 and the groove bottom 315 is within the error range of ±5%, which is considered as flush arrangement.

[0117] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIG. 8, the first insulating layer 30 includes a first sub-insulating layer 32 between the signal lead layer 20 and the first drive electrode layer 40, and a second sub-insulating layer 33 between the first sub-insulating layer 32 and the first drive electrode layer 40; wherein,

[0118] The second sub-insulating layer 33 includes a plurality of first protruding structures 31, and the second portion 412 is electrically connected with the signal lead 21 through the first via V1 penetrating the first sub-insulating layer 32. In this way, the first insulating layer 30 can be manufactured by two masks, that is, the first sub-insulating layer 32 including the first via V1 is manufactured by one mask, and then the second sub-insulating layer 33 including a plurality of first protruding structures 31 is manufactured by another mask.

[0119] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIG. 8, the material of the first sub-insulating layer 32 can be inorganic material, such as silicon nitride, silicon oxide, silicon oxynitride, etc.; and the material of the second sub-insulating layer 33 can be organic photosensitive material, such as photoresist. In this way, the first sub-insulating layer 32 can be manufactured by dry etching process, and the second sub-insulating layer 33 can be manufactured by exposure and development process.

[0120] In some embodiments, as shown in FIG. 10, the first portion 411 of the first drive electrode 41 only covers part of the area of the side wall 313 and the side wall 314, for example, it can cover 1 / 2 or 2 / 3 of the area of each side wall, which can also achieve the purpose of increasing the effective width of the first drive electrode 41 under high resolution (smaller Picth).

[0121] In some embodiments, as shown in FIG. 11, the first portion 411 of the first driving electrode 41 only covers part of the area of the sidewall 313, for example, can cover the entire area or part of the area of the sidewall 313, and can also achieve the effective width of the first driving electrode 41 under high resolution (smaller Picth).

[0122] In some embodiments, as shown in FIG. 12, the first portion 411 of the first driving electrode 41 only covers part of the area of the sidewall 314, for example, can cover the entire area or part of the area of each sidewall 314, and can also achieve the effective width of the first driving electrode 41 under high resolution (smaller Picth).

[0123] It should be noted that FIGS. 10-12 are based on the structure of the first insulating layer 30 shown in FIG. 7 to change the area of the sidewall of the first protruding structure 31 covered by the first driving electrode 41, and of course, the structure of the first insulating layer 30 shown in FIG. 8 can also be used to change the area of the sidewall of the first protruding structure 31 covered by the first driving electrode 41.

[0124] In some embodiments, in the array substrate provided in the embodiments of the present disclosure, as shown in FIGS. 13 and 14, an organic material layer 50 is further arranged between adjacent first protruding structures 31 and in the functional area AA, so that the groove between adjacent first protruding structures 31 is filled with the organic material layer 50, for example, the material of the organic material layer 50 is organic resin, and because the dielectric constant of the organic material is smaller than that of the inorganic material (silicon nitride, etc.), the transverse electric field E1 formed between adjacent first driving electrodes 41 is small, that is, the organic material layer 50 can weaken the transverse electric field E1; at the same time, the orthogonal projection of the organic material layer 50 on the substrate 10 does not overlap with the orthogonal projection of the first driving electrode 41 on the top surface 312 of the first protruding structure 31 on the substrate 10, so that the strength of the vertical electric field E2 is not affected, and when the array substrate is applied to a liquid crystal lens, the electric field can be basically the vertical electric field E2, which is beneficial to accurately control the deflection of liquid crystal molecules.

[0125] It should be noted that FIGS. 13 and 14 are examples in which the organic material layer 50 is arranged in the functional area AA, and of course, the organic material layer 50 can also be arranged in the peripheral area BB.

[0126] It should be noted that FIGS. 13 and 14 are based on the structure of the first driving electrode 41 shown in FIGS. 7 and 8 to set the organic material layer 50, and of course, the structure of the first driving electrode 41 shown in FIGS. 10-12 can also be used to set the organic material layer 50.

[0127] In some embodiments, in the case of insufficient drive electrode wiring space of the array substrate, the drive electrode layer can adopt a two-layer or even multi-layer structure, and in the array substrate provided in the embodiments of the present disclosure, as shown in FIG. 15, the array substrate further comprises: a second insulating layer 60 located on the side of the first drive electrode layer 40 away from the substrate 10, and a second drive electrode layer 70 located on the side of the second insulating layer 60 away from the substrate 10; wherein,

[0128] The side of the second insulating layer 60 away from the substrate 10 comprises a plurality of second protruding structures 61 arranged at intervals along the second direction X, each second protruding structure 61 extends from the functional area AA to above the corresponding signal lead 21 of the peripheral area BB, the second protruding structure 61 spans at least one signal lead 21, and the normal projection of the second protruding structure 61 and the first protruding structure 31 on the substrate 10 is arranged alternately along the second direction X.

[0129] The second drive electrode layer 70 comprises a plurality of second drive electrodes 71 respectively located on the side of each second protruding structure 61 away from the substrate 10, and each second drive electrode 71 is electrically connected to the corresponding signal lead 21 through a second via V2 penetrating the first insulating layer 30 and the second insulating layer 60.

[0130] In some embodiments, in the array substrate provided in the embodiments of the present disclosure, as shown in FIG. 15, the structure of the second insulating layer 60 and the structure of the first insulating layer 30 are the same, for example, the second insulating layer 60 and the first insulating layer 30 both adopt the single-layer inorganic material structure shown in FIG. 7; of course, the second insulating layer 60 and the first insulating layer 30 can also both adopt the double-layer structure shown in FIG. 8.

[0131] Alternatively, the structure of the second insulating layer 60 and the structure of the first insulating layer 30 can also be different, for example, the first insulating layer 30 adopts the single-layer inorganic material structure shown in FIG. 7, and the second insulating layer 60 adopts the double-layer structure shown in FIG. 8; or, the first insulating layer 30 adopts the double-layer structure shown in FIG. 8, and the second insulating layer 60 adopts the single-layer inorganic material structure shown in FIG. 7.

[0132] In some embodiments, in the array substrate provided in the embodiments of the present disclosure, as shown in FIG. 15, the structure of the second drive electrode 71 and the structure of the first drive electrode 41 are the same, for example, the second drive electrode 71 and the first drive electrode 41 both adopt the structure shown in FIG. 7, or the second drive electrode 71 and the first drive electrode 41 both adopt any one of the structures shown in FIGS. 10-12.

[0133] Alternatively, the structure of the second drive electrode 71 and the structure of the first drive electrode 41 can also be different, for example, the second drive electrode 71 adopts one of the structures shown in FIGS. 7, 10-12, and the first drive electrode 41 adopts another one of the structures shown in FIGS. 7, 10-12.

[0134] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, as shown in FIG. 15, an organic material layer 50 can also be arranged between the adjacent second protruding structures 61 and in the functional area AA, so that the groove between the adjacent second protruding structures 61 is filled with the organic material layer 60, for example, the material of the organic material layer 50 is organic resin. Since the dielectric constant of the organic material is smaller than that of the inorganic material (silicon nitride, etc.), the transverse electric field E3 formed between the adjacent second driving electrodes 71 is small, that is, the organic material layer 50 can weaken the transverse electric field E3. At the same time, the orthogonal projection of the organic material layer 50 on the substrate 10 does not overlap with the orthogonal projection of the second driving electrode 71 on the top surface of the second protruding structure 61 on the substrate 10, so that the strength of the vertical electric field E4 formed above the second driving electrode 71 is not affected. When the array substrate is applied to a liquid crystal lens, the electric field formed above the second driving electrode 71 is basically a vertical electric field E4, which is beneficial to accurately control the deflection of the liquid crystal molecules.

[0135] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the material of the signal lead layer can be a metal material (for example, Gate metal), and the material of the first driving electrode layer can be a transparent conductive material, for example, ITO, etc.

[0136] In some embodiments, in the array substrate provided by the embodiments of the present disclosure, the material of the second driving electrode is the same as that of the first driving electrode.

[0137] Optionally, the substrate provided by the embodiments of the present disclosure can be a glass substrate, and the material of the glass substrate can be alkali-free glass, alkali-containing glass, and strengthened glass, etc.

[0138] In some embodiments, as shown in FIG. 5B and FIG. 5C, FIG. 5B is a schematic view of a partial structure in the peripheral area BB on the upper side of the functional area AA in FIG. 5A, and FIG. 5C is a schematic view of a partial structure in the peripheral area BB on the lower side of the functional area AA in FIG. 5A. Taking an example that the array substrate only includes the first driving electrode layer 40, a plurality of first driving electrodes 41 are generally divided into a plurality of driving electrode groups C1 (four driving electrode groups are shown in FIG. 5A) along the second direction X, the number of the first driving electrodes 41 in each driving electrode group C1 is the same, and the peripheral area BB on the upper side (generally referred to as the DPO side) and the peripheral area BB on the lower side (generally referred to as the DP side) of the functional area AA have the same number of signal leads 21 as the first driving electrodes 41 in the driving electrode group C1. In this way, the first driving electrodes 41 at the same position in each driving electrode group C1 can be electrically connected to the same signal lead 21, and the first driving electrodes 41 at different positions can be electrically connected to different signal leads 21. In this way, there will be a blank area without the first driving electrode 41 lead between the adjacent two driving electrode groups C1. Since the first driving electrode 41 (ITO electrode) is formed by wet etching, the photoresist in the blank area is removed during the etching process. The blank area will cause the etching liquid to flow unevenly, resulting in uneven etching of the ITO electrode. Therefore, in order to ensure uniform flow of the etching liquid and uniform etching of the ITO electrode, the above-mentioned array substrate provided in the embodiments of the present disclosure further includes a dummy electrode 101 and a dummy electrode line 102 between the adjacent driving electrode groups, as shown in FIG. 5B and FIG. 5C. The dummy electrode 101 can be arranged on the side of the first via V1 close to the adjacent driving electrode group C1. The length of the dummy electrode 101 along the first direction Y can be the same as the length of the signal lead 21 along the first direction Y. The width of the dummy electrode 101 along the second direction X can be the same as the width of the first driving electrode 41 along the second direction X. The dummy electrode line 102 can be arranged between the dummy electrode 101 and the adjacent driving electrode group C1. The extension direction of the dummy electrode line 102 is the same as the extension direction of the first driving electrode 41. The shape and size of the dummy electrode line 102 can be the same as those of the first driving electrode 41. The arrangement of the dummy electrode 101 and the dummy electrode line 102 in the embodiments of the present disclosure can make the wiring of the first driving electrode layer 40 more uniform. In this way, when the first driving electrode layer 40 is formed by wet etching, the uneven flow of the etching liquid can be avoided, and the uneven etching of the ITO electrode can be avoided.

[0139] Based on the same inventive concept, the embodiments of the present disclosure further provide a manufacturing method of an array substrate for manufacturing the above-mentioned array substrate provided in the embodiments of the present disclosure. As shown in FIG. 16, the manufacturing method includes the following steps.

[0140] S1601, providing a substrate substrate, the substrate substrate including a functional area and a peripheral area located outside the functional area;

[0141] S1602, forming a signal lead layer including a plurality of signal leads arranged along a first direction on a peripheral region of the substrate;

[0142] S1603, forming a first insulating layer on a side of the signal lead layer away from the substrate; wherein the side of the first insulating layer away from the substrate includes a plurality of first protruding structures arranged along a second direction, the first direction and the second direction intersecting, each first protruding structure extending from the functional region to above the corresponding signal lead of the peripheral region, and the first protruding structure spanning at least one signal lead;

[0143] S1604, forming a first driving electrode layer on the side of the first insulating layer away from the substrate; wherein the first driving electrode layer includes a plurality of first driving electrodes respectively located on the side of each first protruding structure away from the substrate, each first driving electrode being electrically connected to the corresponding signal lead through a first via penetrating the first insulating layer.

[0144] The above manufacturing method provided by the embodiments of the present disclosure forms the first insulating layer with the first protruding structures in the functional region and the peripheral region on the side of the first insulating layer away from the substrate, and forms the first driving electrodes of the functional region and the peripheral region on the first protruding structures of the first insulating layer. In this way, in the process of forming the first driving electrodes by wet etching, the etching liquid will flow along the grooves between adjacent first protruding structures, avoiding the etching liquid from gathering at the slope of the intersection position of the first driving electrode and the signal lead in the peripheral region, so as to avoid the first driving electrode from being drilled and etched by the etching liquid at the slope, thereby avoiding the disconnection of the first driving electrode.

[0145] Taking the structure shown in FIG. 7 as an example, the manufacturing method provided by the embodiments of the present disclosure is described, which can include the following steps:

[0146] (1) As shown in FIG. 17A, a substrate 10 is provided, which can be an alkali-free glass, an alkali-containing glass, a strengthened glass, etc. A signal lead layer 20 including a plurality of signal leads 21 arranged along a first direction Y is formed on a peripheral region of the substrate 10 by a film forming process such as magnetron sputtering and a photolithography and etching process. Then, an inorganic insulating material film 30' is deposited on a side of the signal lead layer 20 away from the substrate 10 by a chemical vapor deposition method. The material of the inorganic insulating material film 30' can be SiNx or SiOx or a stacked structure of SiNx and SiO, and the thickness can be 300 nm to 1 um.

[0147] (2) As shown in FIG. 17B, a photoresist layer is formed on the side of the inorganic insulating material film 30' away from the substrate 10, and the photoresist layer is patterned by a halftone mask process to form a first photoresist pattern 80 including a photoresist completely reserved region 801, a photoresist semi-reserved region 802, and a photoresist completely removed region 803. The photoresist completely reserved region 801 corresponds to the region where the first protruding structure 31 is located, and the photoresist completely removed region 803 corresponds to the region of the first via V1 of the peripheral region BB. The photoresist semi-reserved region 802 is the region other than the photoresist completely reserved region 801 and the photoresist completely removed region 803.

[0148] (3) As shown in FIG. 17C, the inorganic insulating material film 30' is dry-etched with the first photoresist pattern 80 as a mask to form the first via V1 corresponding to the photoresist completely removed region 803.

[0149] (4) As shown in FIG. 17D, the first photoresist pattern 80 is subjected to a gray-scale treatment to remove the photoresist in the photoresist semi-reserved region 802 and thin the photoresist in the photoresist completely reserved region 801 to form a second photoresist pattern 80'; and then the inorganic insulating material film 30' corresponding to the photoresist semi-reserved region 802 is etched with the second photoresist pattern 80' as a mask to form the first protruding structure 31 corresponding to the photoresist completely reserved region 801.

[0150] (5) As shown in FIG. 17E, the second photoresist pattern 80' is removed to form the first insulating layer 30.

[0151] (6) As shown in FIG. 17F and FIG. 17G, a transparent ITO layer 40' with a thickness of 20-100 nm is deposited on the first insulating layer 30 by a magnetron sputtering film forming method; then, a photoresist is coated on the transparent ITO layer 40' and subjected to exposure and development to form a photoresist mask pattern 90 covering the first protruding structure 31 and part of the signal lead 21; and then a first driving electrode layer 40 is formed on the side of the first insulating layer 30 away from the substrate 10 by a wet etching method.

[0152] (7) As shown in FIG. 17H, the photoresist mask pattern 90 is removed to form the array substrate shown in FIG. 7.

[0153] (8) As shown in FIG. 13, an organic material film layer is coated on the side of the first driving electrode layer 40 away from the substrate 10, and an organic material layer 50 is formed by an exposure and development process.

[0154] With the structure shown in FIG. 8 as an example, the manufacturing method provided by the embodiment of the present disclosure is described, which can specifically include the following steps:

[0155] (1) As shown in FIG. 18A, a substrate 10 is provided, which can be an alkali-free glass, an alkali-containing glass, a strengthened glass, etc. A signal lead layer 20 including a plurality of signal leads 21 arranged along a first direction Y is formed on the substrate 10 by a film forming process such as magnetron sputtering and a photolithography and etching process. Then, an inorganic insulating material film is deposited on the side of the signal lead layer 20 away from the substrate 10 by a chemical vapor deposition method. The material of the inorganic insulating material film can be SiNx or SiOx or a stacked structure of SiNx and SiO. The inorganic insulating material film is etched by a photolithography and dry etching method to form a first sub-insulating layer 32 including a first via V1 in the peripheral region BB.

[0156] (2) As shown in FIG. 18B, an organic photosensitive film layer 33' is coated on the side of the first sub-insulating layer 32 away from the substrate 10.

[0157] (3) As shown in FIG. 18C, the organic photosensitive film layer 33' is exposed and developed to form a second sub-insulating layer 33 including a plurality of first protruding structures 31.

[0158] (4) The first drive electrode layer is formed on the side of the second sub-insulating layer 33 away from the substrate 10 by the same manufacturing method as that of the first drive electrode layer 40 in FIG. 7 to form the array substrate shown in FIG. 8.

[0159] (5) As shown in FIG. 14, an organic material film layer is coated on the side of the first drive electrode layer 40 away from the substrate 10, and an organic material layer 50 is formed by an exposure and development process.

[0160] With the structure shown in FIG. 15 as an example, the manufacturing method provided by the embodiment of the present disclosure is described, which can specifically include the following steps:

[0161] (1) The structure shown in FIG. 7 is manufactured by the steps (1)-(7) for manufacturing the structure shown in FIG. 7;

[0162] (2) As shown in FIG. 19, the second insulating layer 60 is formed on the side of the first driving electrode layer 40 away from the substrate 10 by using the same manufacturing method as that of the first insulating layer 30 shown in FIG. 7; wherein the side of the second insulating layer 60 away from the substrate 10 comprises a plurality of second protruding structures 61 arranged at intervals along the second direction X, each second protruding structure 61 extends from the functional area AA to above the corresponding signal lead 21 of the peripheral area BB, the second protruding structure 61 spans at least one signal lead 21, the normal projection of the second protruding structure 61 and the first protruding structure 31 on the substrate 10 is arranged alternately along the second direction X, and the second via V2 penetrating the first insulating layer 30 and the second insulating layer 60 is formed at the same time of dry etching the second insulating layer 60.

[0163] (3) As shown in FIG. 15, the second driving electrode layer 70 is formed on the side of the second insulating layer 60 away from the substrate 10 by using the same manufacturing method as that of the first driving electrode layer 40 shown in FIG. 7; wherein the second driving electrode layer 70 comprises a plurality of second driving electrodes 71 respectively located on the side of each second protruding structure 61 away from the substrate 10, and each second driving electrode 71 is electrically connected to the corresponding signal lead 21 through the second via V2.

[0164] (4) As shown in FIG. 15, the organic material layer 50 is formed on the side of the first driving electrode layer 40 away from the substrate 10 by coating an organic material film layer and then through an exposure and development process.

[0165] It should be noted that the method of depositing the film of each of the above-mentioned film layers can include blade coating, screen printing, slot coating, roll-to-roll, spraying, etc.

[0166] Based on the same inventive concept, the disclosure also provides a liquid crystal light control panel, comprising: an array substrate and an opposite substrate arranged oppositely, and a liquid crystal layer located between the array substrate and the opposite substrate; wherein the array substrate is the above-mentioned array substrate provided by the disclosure. Since the problem solving principle of the liquid crystal light control panel is similar to that of the above-mentioned array substrate, the implementation of the liquid crystal light control panel provided by the disclosure can be referred to the implementation of the above-mentioned array substrate, and the repeated parts will not be described here.

[0167] In specific implementation, the above-mentioned liquid crystal light control panel provided by the disclosure can be a liquid crystal lens panel, and the related liquid crystal lens panel can be introduced in the above-mentioned array substrate.

[0168] In a specific implementation, the liquid crystal light control panel provided by the embodiments of the present disclosure can also be a liquid crystal grating panel. Specifically, the array substrate of the liquid crystal grating panel also forms a signal lead layer in the peripheral region of the substrate, forms an insulating layer on the side of the signal lead layer away from the substrate, and forms a plurality of driving electrodes on the side of the insulating layer away from the substrate and in the functional region. The driving electrodes are electrically connected to the corresponding signal lead in the peripheral region by extension from the functional region. That is, the liquid crystal grating panel also has driving electrode climbing in the peripheral region, which causes the driving electrode to have an open defect at the climbing position during the manufacturing process. Therefore, the insulating layer in the array substrate of the liquid crystal grating panel can adopt the structure of the first insulating layer in the aforementioned array substrate, so as to avoid the problem of the driving electrode climbing causing the driving electrode to have an open defect at the climbing position during the manufacturing process.

[0169] It should be noted that the liquid crystal light control panel provided by the embodiments of the present disclosure is not limited to a liquid crystal lens panel or a liquid crystal grating panel. As long as the position has a need for wire climbing or thinning, the insulating layer under the wire can be set to include a protruding structure.

[0170] In a specific implementation, the liquid crystal light control panel provided by the embodiments of the present disclosure can also include other structures well known to those skilled in the art, which are not described in detail here.

[0171] Based on the same inventive concept, the embodiments of the present disclosure also provide a display device, which includes a display panel and a liquid crystal light control panel as described above provided by the embodiments of the present disclosure located on the display side of the display panel.

[0172] In some embodiments, the display panel is a liquid crystal display panel. When the display panel is a liquid crystal display panel, the display device can further include a backlight module located on the side of the display panel away from the liquid crystal light control panel.

[0173] In some embodiments, the display panel is an electroluminescent display panel, such as an organic light-emitting diode display panel or a quantum dot light-emitting diode display panel.

[0174] The display device provided by the embodiments of the present disclosure is any product or component with display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, etc. Other essential components of the display device should be understood by those skilled in the art, and are not described in detail here, nor should they be considered as a limitation on the present disclosure. The implementation of the display device can refer to the embodiments of the display panel described above, and repeated descriptions are omitted.

[0175] The array substrate and the manufacturing method thereof, the liquid crystal light control panel and the display device provided by the embodiments of the present disclosure have the following advantages: the first insulating layer with the first protruding structure is formed on the side of the first insulating layer away from the substrate, and the first driving electrodes of the functional area and the peripheral area are formed on the first protruding structure of the first insulating layer. In the process of forming the first driving electrodes by wet etching, the etching liquid flows along the grooves between the adjacent first protruding structures, so as to avoid the etching liquid gathering at the slope of the intersection position of the first driving electrodes and the signal lead in the peripheral area, thereby avoiding the first driving electrodes being etched by the etching liquid at the slope and causing the first driving electrodes to be broken.

[0176] Although the preferred embodiments of the present disclosure have been described, those skilled in the art who are informed of the basic inventive concept can make additional changes and modifications to the embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present disclosure.

[0177] Obviously, those skilled in the art can make various modifications and variations to the embodiments of the present disclosure without departing from the spirit and scope of the embodiments of the present disclosure. Thus, if these modifications and variations of the embodiments of the present disclosure fall within the scope of the claims of the present disclosure and the equivalent technologies thereof, the present disclosure also intends to include these modifications and variations.

Claims

1. An array substrate, wherein, include: The substrate includes a functional region and a peripheral region located around the functional region; A signal lead layer is located on one side of the substrate and in the peripheral region, and the signal lead layer includes a plurality of signal leads arranged at intervals along a first direction; A first insulating layer is located on the side of the signal lead layer away from the substrate. The side of the first insulating layer away from the substrate includes a plurality of first protrusion structures spaced apart along a second direction. The first direction and the second direction intersect. Each first protrusion structure extends from the functional area to above the signal lead corresponding to the peripheral area, and the first protrusion structure spans at least one signal lead. A first driving electrode layer is located on the side of the first insulating layer away from the substrate. The first driving electrode layer includes a plurality of first driving electrodes located on the side of each first protrusion structure away from the substrate. Each first driving electrode is electrically connected to the corresponding signal lead through a first via penetrating the first insulating layer.

2. The array substrate as claimed in claim 1, wherein, The first protrusion structure has a trapezoidal cross-section along the second direction. The first protrusion structure includes a bottom surface near the substrate, a top surface away from the substrate, and a pair of sidewalls connecting the top surface and the bottom surface. The width of the top surface along the second direction is smaller than the width of the bottom surface along the second direction.

3. The array substrate as described in claim 2, wherein, The first driving electrode includes a first portion extending along the first direction and a second portion extending along the second direction. The first portion and the second portion are an integral structure. The first portion extends from the functional area to above the signal lead corresponding to the peripheral area. The first portion is located on the side of the first protrusion structure away from the substrate. The second portion is electrically connected to the signal lead through a first via penetrating the first insulating layer.

4. The array substrate as claimed in claim 3, wherein, The first portion covers the top surface of the first protrusion structure and at least a portion of the sidewalls of the first protrusion structure.

5. The array substrate as claimed in claim 4, wherein, The first portion covers 50% to 100% of the area of ​​one of the sidewalls.

6. The array substrate as claimed in claim 5, wherein, The first portion also covers 50% to 100% of the area of ​​the other sidewall.

7. The array substrate as claimed in claim 6, wherein, The orthographic projection of the gap between adjacent first driving electrodes on the substrate at least covers the orthographic projection of the gap between adjacent first protrusion structures on the substrate.

8. The array substrate according to any one of claims 3-7, wherein, The angle between the sidewall of the first protrusion structure and the bottom surface of the first protrusion structure is 10° to 80°.

9. The array substrate according to any one of claims 3-8, wherein, The first insulating layer is a single-layer structure, and the material of the first insulating layer is an inorganic material.

10. The array substrate as claimed in claim 9, wherein, The thickness of the first protrusion structure is 1 / 4 to 3 / 4 of the thickness of the first insulating layer.

11. The array substrate as claimed in claim 9, wherein, The first insulating layer between the second portion and the signal lead layer is flush with the bottom of the groove between the substrate and the adjacent first protrusion structure, away from the surface of the substrate.

12. The array substrate according to any one of claims 3-8, wherein, The first insulating layer includes: a first sub-insulating layer located between the signal lead layer and the first driving electrode layer, and a second sub-insulating layer located between the first sub-insulating layer and the first driving electrode layer; wherein, The second sub-insulating layer includes a plurality of the first protrusion structures, and the second portion is electrically connected to the signal lead through a first via penetrating the first sub-insulating layer.

13. The array substrate as claimed in claim 12, wherein, The first sub-insulating layer is made of inorganic material, and the second sub-insulating layer is made of organic photosensitive material.

14. The array substrate according to any one of claims 2-13, wherein, It also includes an organic material layer located between adjacent first protrusion structures and in the functional area, wherein the orthographic projection of the organic material layer on the substrate does not overlap with the orthographic projection of the first driving electrode located on the top surface of the first protrusion structure on the substrate.

15. The array substrate according to any one of claims 1-14, wherein, Also includes: A second insulating layer located on the side of the first driving electrode layer away from the substrate, and a second driving electrode layer located on the side of the second insulating layer away from the substrate; wherein, The side of the second insulating layer away from the substrate includes a plurality of second protrusion structures spaced apart along the second direction. Each second protrusion structure extends from the functional area to above the signal lead corresponding to the peripheral area. The second protrusion structure spans at least one signal lead. The orthographic projections of the second protrusion structure and the first protrusion structure on the substrate are alternately arranged along the second direction. The second driving electrode layer includes a plurality of second driving electrodes located on the side of each second protrusion structure away from the substrate. Each second driving electrode is electrically connected to the corresponding signal lead through a second via penetrating the first insulating layer and the second insulating layer.

16. The array substrate as claimed in claim 15, wherein, The structure of the second insulating layer is the same as that of the first insulating layer.

17. The array substrate as claimed in claim 15, wherein, The structure of the second driving electrode is the same as that of the first driving electrode, and the material of the second driving electrode is the same as that of the first driving electrode.

18. The array substrate according to any one of claims 1-17, wherein, The signal lead layer is made of a metallic material, and the first driving electrode layer is made of a transparent conductive material.

19. A method for fabricating an array substrate, wherein, include: A substrate is provided, the substrate including a functional region and a peripheral region located around the functional region; A signal lead layer comprising a plurality of signal leads spaced apart along a first direction is formed in the peripheral region of the substrate. A first insulating layer is formed on the side of the signal lead layer away from the substrate; wherein, the side of the first insulating layer away from the substrate includes a plurality of first protrusion structures spaced apart along a second direction, the first direction and the second direction intersecting, each first protrusion structure extending from the functional area to above the signal lead corresponding to the peripheral area, and the first protrusion structure spanning at least one signal lead. A first driving electrode layer is formed on the side of the first insulating layer away from the substrate; wherein the first driving electrode layer includes a plurality of first driving electrodes located on the side of each first protrusion structure away from the substrate, and each first driving electrode is electrically connected to the corresponding signal lead through a first via penetrating the first insulating layer.

20. The manufacturing method as described in claim 19, wherein, The formation of a first insulating layer on the side of the signal lead layer away from the substrate specifically includes: An inorganic insulating material film is deposited on the side of the signal lead layer away from the substrate. A photoresist layer is formed on the side of the inorganic insulating material film away from the substrate. The photoresist layer is patterned using a halftone mask process to form a first photoresist pattern including a fully retained photoresist region, a partially retained photoresist region, and a completely removed photoresist region. The fully retained photoresist region corresponds to the region where the first protrusion structure is located, the completely removed photoresist region corresponds to the region of the first via, and the partially retained photoresist region is the region other than the fully retained and completely removed photoresist regions. The inorganic insulating material film is etched using the first photoresist pattern as a mask to form the first via corresponding to the area where the photoresist is completely removed. The first photoresist pattern is subjected to graying treatment to remove the photoresist in the partially preserved area and thin the photoresist in the fully preserved area to form a second photoresist pattern. Using the second photoresist pattern as a mask, the inorganic insulating material film corresponding to the photoresist semi-retained region is etched to form the first protrusion structure corresponding to the photoresist fully retained region; Remove the second photoresist pattern.

21. The manufacturing method as described in claim 19, wherein, The formation of a first insulating layer on the side of the signal lead layer away from the substrate specifically includes: An inorganic insulating material film is deposited on the side of the signal lead layer away from the substrate. The inorganic insulating material film is etched to form a first sub-insulating layer including the first via; An organic photosensitive film layer is coated on the side of the first sub-insulating layer away from the substrate. The organic photosensitive film layer is exposed and developed to form a second sub-insulating layer comprising a plurality of the first protrusion structures.

22. The manufacturing method according to any one of claims 19-21, wherein, Also includes: A second insulating layer is formed on the side of the first driving electrode layer away from the substrate using the same fabrication method as the first insulating layer; wherein, the side of the second insulating layer away from the substrate includes a plurality of second protrusion structures spaced apart along the second direction, each second protrusion structure extending from the functional area to above the signal lead corresponding to the peripheral area, the second protrusion structure spanning at least one signal lead, and the orthographic projections of the second protrusion structure and the first protrusion structure on the substrate are alternately arranged along the second direction; A second driving electrode layer is formed on the side of the second insulating layer away from the substrate; wherein the second driving electrode layer includes a plurality of second driving electrodes located on the side of each second protrusion structure away from the substrate, and each second driving electrode is electrically connected to the corresponding signal lead through a second via penetrating the first insulating layer and the second insulating layer.

23. A liquid crystal light-controlling panel, wherein, include: An array substrate and a counter substrate disposed opposite each other, and a liquid crystal layer located between the array substrate and the counter substrate; wherein the array substrate is the array substrate as described in any one of claims 1-18.

24. The liquid crystal light-controlling panel as described in claim 23, wherein, The liquid crystal light control panel is a liquid crystal lens panel or a liquid crystal grating panel.

25. A display device, wherein, include: The display panel, and the liquid crystal light control panel as described in claim 23 or 24 located on the display side of the display panel.

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