Method for and ethernet physical layer transceiver with adaptive common-mode disturbance compensation in ethernet physical layers

Abstract

The invention relates to a method for adaptive common-mode disturbance compensation in ethernet physical layers, comprising the steps of: measuring a voltage signal of a media dependent interface of the ethernet physical layer; generating an output voltage signal based on the measured voltage signal of the media dependent interface; providing the output voltage signal and a reference voltage signal to at least two identical transconductance circuits, which are connected together to the media dependent interface, wherein each transconductance circuit: compares the output voltage signal with the reference voltage signal, generates a compensation current signal based on the result of the comparison of the output voltage signal with the reference voltage signal, and provide the compensation current signal to the media dependent interface; and selectively enabling and / or disabling one or more of the at least two transconductance circuits, until the output voltage signal equals to the reference voltage signal.

Description

[0001] Method for and Ethernet Physical Layer Transceiver with Adaptive Common -Mode Disturbance Compensation in Ethernet

[0002] Physical Layers

[0003] The invention relates to a method for adaptive common-mode disturbance compensation in ethernet physical layers. The invention further relates to an ethernet physical layer transceiver with adaptive common-mode disturbance compensation in ethernet physical layers.

[0004] This invention relates to the field of automotive ethernet transceivers, to common-mode disturbance compensation, also referred to common-mode clamping (CMC) circuits and more particularly to circuits and methods for adaptivity in commonmode clamping. For stabilizing common-mode voltage at differential signal lines, the common-mode clamping circuit can be composed as feedback transconductance amplifier by comparing the common-mode voltage to a reference and injecting egual currents into each of the differential signal lines to counteract common-mode voltage disturbances.

[0005] From the state of the art, it is known that common-mode disturbance on the media dependent interface (MDI) can be suppressed by common-mode clamping devices that measure the common-mode voltage and inject a current for common-mode compensation .

[0006] US20150303907A1 consists of two circuits. First circuit is used for sensing a voltage signal across clamp terminals and to generate an output voltage signal based on the sensed voltage signal (e.g. transconductance amplifier) . The second circuit compares the output voltage signal with a reference voltage. It generates an equal pair of current signals based on a result of comparison. This approach is suffering from constant power consumption e.g. needed for bias generation especially when operating the transconductance amplifier in class A or AB mode. Also, in case of high current driving capability impact on signal integrity is expected due to the capacitive load represented by large transistors constantly biased and connected to the signal lines .

[0007] According to US10128824B2, a mean value between the first end and the second end is referred to as a value of a common-mode signal associated with the differential signal. The common-mode signal is typically undesirable and generally should be suppressed. A common-mode clamp is a circuit that is configured to suppress (or clamp) a common-mode signal of a differential circuit. A common-mode clamp usually needs to sense a value of the common-mode signal, and then perform the suppression based on the sensed value. What is disclosed is a method for clamping a common-mode signal without needing a circuit to sense the common-mode signal. This circuit is lacking from the existence of an accurate common-mode reference to compare to. Because of this and the rather low gain provided by the single stage amplifier concept this circuit is capable to react on only large common-mode variations which might already disturb the differential signalling in case of limited dynamic range as in low voltage designs.

[0008] It is an object of the present invention to provide an adaptive common-mode disturbance compensation in ethernet physical layers, including the detection of the common mode disturber event and strength. Furthermore, the DC power consumption should be reduced, and the signal integrity should be improved compared to a static (non-adaptive ) implementation.

[0009] The object is solved according to the invention by a method according to claim 1 and an ethernet physical layer transceiver according to claim 9. Preferred embodiments of the invention are defined in the dependent claims.

[0010] The invention relates to a method for adaptive common-mode disturbance compensation in ethernet physical layers, comprising the steps of: measuring a voltage signal of a media dependent interface of the ethernet physical layer; generating an output voltage signal based on the measured voltage signal of the media dependent interface; providing the output voltage signal and a reference voltage signal to at least two identical transconductance circuits, which are connected in parallel to the media dependent interface, wherein each transconductance circuit: compares the output voltage signal with the reference voltage signal, generates a compensation current signal based on the result of the comparison of the output voltage signal with the reference voltage signal, and provide the compensation current signal to the media dependent interface; and selectively enabling and / or disabling one or more of the at least two transconductance circuits, until the output voltage signal equals to the reference voltage signal.

[0011] The invention bases on the known principle that common-mode disturbance on the media dependent interface (MDI) can be suppressed by common-mode compensation by measuring the commonmode voltage and inject a current for common-mode compensation.

[0012] In contrast to the prior art, the invention bases on using at least two identical transconductance circuits, which are connected in parallel to the media dependent interface. Preferably, N identical transconductance circuits are connected in parallel to the media dependent interface. Each of the transconductance circuits compares the output voltage signal with the reference voltage signal, generates a compensation current signal based on the result of the comparison of the output voltage signal with the reference voltage signal, and provides the compensation current signal to the media dependent interface .

[0013] According to the present invention, one or more of the at least two transconductance circuits are selectively enabling and / or disabling, until the output voltage signal equals to the reference voltage signal. Only the enabled transconductance circuits generate and provide the compensation signal to the media dependent interface, while the disabled transconductance circuits have no function respectively do not provide a compensation signal to the media dependent interface.

[0014] Hence, the invention uses at least two, preferably N, equal transconductance amplifier or also referred to as transconductance amplifier cells or (transconductance amplifier) slices in parallel which can be activated / deactivated individually. So, it can adapt the common-mode clamping (compensation signal) strength by adjusting the number of active slices. This reduces DC power consumption and aging of slices. The strength of a present or past common-mode disturbance can be classified. Also, it leads to reduction of input capacitances at differential signal lines and hence increased return loss to fix a reduced return loss issue.

[0015] Common-mode compensation strength can be adapted over time according to the disturber strength since the level of possible injected common-mode disturbances is not constant over time and also rather unspecific. This is done by enabling / disabling the one or more of the identical transconductance circuits. In a variant of the invention, an enabled transconductance circuit generates a clipping signal when the transconductance circuit is saturated, wherein this clipping signal is used to enable a further transconductance circuit, which is currently disabled. Using the clipping signals further transconductance circuits are enabled until the output voltage signal equals the reference voltage signal or until a threshold number of transconductance circuits is enabled. The threshold number of transconductance circuits must not correspond to the total number of available transconductance circuits but can also be lower .

[0016] According to a preferred variant of the invention, the transconductance circuit is a feedback transconductance amplifier that compares the output voltage signal with the reference voltage signal and generates the compensation current signal. Using a feedback transconductance amplifier the transconductance circuit can be easily implemented with minimal cost and chip size.

[0017] Pursuant to a variant of the invention, the method comprises the step of defining a threshold number of enabled transconductance circuits and generating an event or storing an event in a database for later readout if the number of enabled transconductance circuits exceeds threshold number, wherein the threshold number is smaller than the total number of available transconductance circuits.

[0018] In an expedient variant of the invention, at least one transconductance circuit is enabled at all times. This at least one transconductance circuit is used for compensating commonmode disturbances and activate further transconductance circuits, for example by generating a corresponding clipping signal . According to an advantageous variant o f the invention, each transconductance circuit has a unique index and the index of enabled transconductance circuits are stored in a FI FO regi ster according to their sequence of enabl ing . In thi s way the transconductance circuits are activated sequentially and hence the reduced excess ive aging o f individual transconductance circuits .

[0019] Pursuant to a variant of the invention, an interrupt signal is generated i f the number o f enabled transconductance circuits is equal to the number o f avai lable transconductance circuits . Once the total number of avail able transconductance circuits i s activated the current common-mode compensation method has reached its maximum compensation capabil ities and thi s results in an interrupt s ignal to inform the higher-level processes of a problem with high disturbances on the ethernet physical layer .

[0020] In a pre ferred variant of the invention, the method comprises the further step of starting a counter after a transconductance circuit has been enabled and di sabl ing a transconductance circuit i f no further transconductance circuit is enabled until the counter expires and at least two transconductance circuits are enabled . Us ing this counter , activated transconductance circuits wi ll be sequential ly deactivated i f they are no longer needed for common-mode disturbance compensation . For example , using the counter the number of active transconductance circuits i s sequentially reduced i f the common-mode disturbances have decreased and could be compensated by a smaller number of transconductance circuits .

[0021] The invention further relates to an ethernet phys ical layer transceiver with adaptive common-mode disturbance compensation in ethernet physical layers , compri sing : a f irst circuit connected to a media dependent interface of the ethernet physical layer and conf igured to measure a voltage signal acros s the media dependent interface and to generate an output voltage signal based on the measured voltage signal ; at least two identical transconductance circuits , which are connected in paral lel to the media dependent interface and to the first circuit , wherein the transconductance circuits are each configured to : receive the output voltage signal from the f i rs t circuit and compare the output voltage signal with a reference voltage s ignal , generate a compensation current signal based on the result of the compari son of the output voltage signal with the re ference voltage signal , provide the compensation current s ignal to the media dependent interface , and generate clipping signal when the transconductance circuit i s saturated, each transconductance circuit further compris ing an enable input for being selectively enabled or disabled; an adaptive control unit connected to al l transconductance circuits for receiving clipping s ignals from and sending enable / disable s ignal to respective transconductance circuits , wherein the adaptive control unit is conf igured to implement the method according to the present invention by adj usting the number of active transconductance circuits by sending enable / disable s ignals to selected transconductance circuits . In a preferred variant of the invention, the transconductance circuit is a feedback transconductance amplifier.

[0022] In the following the invention will be explained further with respect to embodiments shown in the attached figures. It shows:

[0023] Fig. 1 a schematic diagram of an ethernet physical layer transceiver with adaptive common-mode disturbance compensation in ethernet physical layers according to the present invention;

[0024] Fig. 2 an exemplary flow diagram of a method for adaptive common-mode disturbance compensation in ethernet physical layers according to an embodiment of the invention; and

[0025] Fig. 3 different states, counters and registers with respect to the embodiment of the method for adaptive commonmode disturbance compensation in ethernet physical layers of Fig . 2.

[0026] Fig. 1 shows a schematic diagram of an ethernet physical layer transceiver 100 with adaptive common-mode disturbance compensation in ethernet physical layers according to the present invention.

[0027] The ethernet physical layer transceiver 100 shown in Fig. 1 comprises a control unit 110, a first circuit 120 and N identical transconductance circuits 130, 140, 150.

[0028] The first circuit 120 is connected to a media dependent interface 160 of the ethernet physical layer and is configured to measure a voltage signal across the media dependent interface 160 and to generate an output voltage 121 signal based on the measured voltage signal.

[0029] The N identical transconductance circuits 130, 140, 150 are connected in parallel to the media dependent interface 160 and to the first circuit 120. The N identical transconductance circuits 130, 140, 150 each receive the output voltage signal 121 from the first circuit 120 and compare the output voltage signal 121 with a reference voltage signal 122. According to the embodiment of Fig. 1, the reference voltage signal 122 is also provided by the first circuit 120. The N identical transconductance circuits 130, 140, 150 are configured to generate a compensation current signal 133, 134 based on the result of the comparison of the output voltage signal 121 with the reference voltage signal 122. The compensation current signal 133, 134 can be provided to the media dependent interface 160 by the N identical transconductance circuits 130, 140, 150. Furthermore, each transconductance circuit 130, 140, 150 further comprising an enable input for being selectively enabled or disabled by an enable signal 131, 141, 151 of the control unit 110. In case a transconductance circuit 130, 140, 150 is saturated, it generates a clipping signal 132, 142, 152 for the control unit 110.

[0030] Hence, the adaptive control unit 110 is connected to all transconductance circuits 130, 140, 150 for receiving clipping signals 132, 142, 152 from and sending enable / disable signals 131, 141, 151 to respective transconductance circuits 130, 140, 150. The control unit 110 can therefore adjust the number of active transconductance circuits 130, 140, 150 by sending enable / disable signals 131, 141, 151 to selected transconductance circuits 130, 140, 150.

[0031] For example, one of the transconductance circuits 130, 140, 150 (e.g., 130) that is selected arbitrarily by adaptive control unit 110 with enable signal 131 compares the output voltage 121 with the reference voltage 122 and generates a pair of current signals 133 and 134 based on a result of the comparison. Adaptive control unit 110 activates or deactivates the transconductance circuits 130, 140, 150 by using enable signals 131, 141, 151 with the help of clipping signals 132, 142, 152, i.e. if the enabled transconductance circuits are saturated, respective clipping signals 132, 142, 152 are generated, which cause the control unit 110 to send an enable signal 131, 141, 151 to a further, currently deactivated, transconductance circuit 130, 140, 150.

[0032] In general, the control unit 110 is configured to implement the following method for adaptive common-mode disturbance compensation in ethernet physical layers, comprising the steps of : measuring a voltage signal of a media dependent interface 160 of the ethernet physical layer; generating an output voltage 121 signal based on the measured voltage signal of the media dependent interface 160; providing the output voltage signal 121 and a reference voltage signal 122 to at least two identical transconductance circuits 130, 140, 150, which are connected in parallel to the media dependent interface 160, wherein each transconductance circuit 130, 140, 150: compares the output voltage signal 121 with the reference voltage signal 122, generates a compensation current signal 133, 134 based on the result of the comparison of the output voltage signal 121 with the reference voltage signal 122, and provide the compensation current signal 133, 134 to the media dependent interface 160; and selectively enabling and / or disabling one or more of the at least two transconductance circuits 130, 140, 150, until the output voltage signal 121 equals to the reference voltage signal 21. As already described above, an enabled transconductance circuit 130, 140, 150 generates a clipping signal 132, 142, 152 when the transconductance circuit 130, 140, 150 is saturated, wherein this clipping signal 132, 142, 152 is used to enable a further transconductance circuit 130, 140, 150, which is currently disabled.

[0033] Preferably, a counter is started after a transconductance circuit 130, 140, 150 has been enabled. One of the enabled transconductance circuits 130, 140, 150 is disabled if no further transconductance circuit 130, 140, 150 is enabled until the counter expires and at least two transconductance circuits 130, 140, 150 are enabled. Hence, at least one transconductance circuit 130, 140, 150 is enabled at all times.

[0034] In an advantageous variant of the invention, the transconductance circuit 130, 140, 150 is a feedback transconductance amplifier that compares the output voltage signal 121 with the reference voltage signal 122 and generates the compensation current signal 133, 134.

[0035] Fig. 2 shows an exemplary flow diagram of a method 200 for adaptive common-mode disturbance compensation in ethernet physical layers according to an embodiment of the invention. Fig. 3 shows different states, counters and registers with respect to the embodiment of the method for adaptive common-mode disturbance compensation in ethernet physical layers of Fig. 2.

[0036] According to this embodiment in total eight transconductance circuits 130, 140, 150 are available. Furthermore, a threshold number of enabled transconductance circuits 130, 140, 150 is defined and set to three. An event is generated or stored in a database for later readout if the number of enabled transconductance circuits 130, 140, 150 exceeds threshold number. The threshold number of three is smaller than the total number of available transconductance circuits 130, 140, 150, which is eight. Each transconductance circuit 130, 140, 150 of the embodiment of Fig. 2 has a unique index and the index of enabled transconductance circuits 130, 140, 150 are stored in a FIFO register according to their sequence of enabling.

[0037] The adaptive common-mode compensation / clamp (CMC) algorithm 200 shown in Fig. 2 Comprises the following steps:

[0038] 1. Start (201)

[0039] 2. At least one transconductance circuit 130, 140, 150 (CMC slice) has to be active. So, adaptive control unit 110 selects one arbitrary transconductance circuit 130, 140, 150 to activate 202 and writes its index in a FIFO (First In First Out) with lengths equals to number of active transconductance circuits 130, 140, 150. (For Algorithm Scenario in Fig. 3: CMC #0 is the first active slice, # of Active Slices =1, Maximum Number of Slices Activated = 1)

[0040] 3. At the beginning there is just one active transconductance circuit 130, 140, 150, so adaptive control unit 110 waits for clipping signal 132, 142, 152 to activate one more transconductance circuit 130, 140, 150. a. If there is still a difference between output voltage signal 121 and the reference voltage 122, the first transconductance circuit 130, 140, 150 will be saturated and it will generate clipping signal 132, 142, 152. b. When clipping signal 132, 142, 152 is detected 212 in adaptive control unit 110: i. If the number of active transconductance circuits 130, 140, 150 is equal to total number of available transconductance amplifiers 130, 140, 150 (N) 216, an interrupt Signal B is triggered 207. (Fig. 3: Trigger Signal B is 0) ii. If number of active transconductance circuits 130, 140, 150 is not equal to total number of Available Slices (N) 216, one more transconductance circuit 130, 140, 150 will be activated 203 and its index is written in the FIFO. (Fig. 3: CMC #7 is the new active slice, # of Active Slices is 2) c. After activation of a transconductance circuit 130,

[0041] 140, 150 in step 203; if the number of active transconductance circuits 130, 140, 150 is higher than a counter 'Maximum Number of Slices Activated' 217, the counter 'Maximum Number of Slices Activated' is set to the number of active transconductance circuits 130, 140, 150 (step 208) . (Fig. 3: Maximum Number of Slices Activated changes from 1 to 2) . d. If counter 'Maximum Number of Slices Activated' is higher than threshold number 'Predefined Threshold Value' 218, an interrupt Signal A is triggered in step 209. (Fig. 3: Trigger Signal A is 0)

[0042] 4. There are 2 active transconductance circuits 130, 140, 150 (step 211) . So, adaptive control unit 110 has to start counting 205 in order to deactivate one transconductance circuit 130, 140, 150 if there is no detected clipping signal 132, 142, 152. a. If there is still a difference between output voltage signal 121 and the reference voltage 122, the second activated transconductance circuit 130, 140, 150 will be saturated and it will generate clipping signal 142. b. When clipping signal 142 is detected 213 in adaptive control unit 110: i. If the number of active transconductance circuits

[0043] 130, 140, 150 is equal to total number of available transconductance circuits 130, 140, 150 (N) (step 216) , interrupt Signal B is triggered ( step 207) . ii. If number of active transconductance circuits 130, 140, 150 is not equal to total number of available transconductance circuits 130, 140, 150 (N) (step 216) , one more transconductance circuit 130, 140, 150 will be activated (step 203) and its index is written in the FIFO. (Fig. 3: CMC #2 is the new active slice, # of Active Slices is 3) c. After activation of a transconductance circuit 130, 140, 150 (step 203) ; if the number of active transconductance circuits 130, 140, 150 is higher than counter 'Maximum Number of Slices Activated' (step 217) , counter 'Maximum Number of Slices Activated' is set to number of active transconductance circuits 130, 140, 150 (208) . (Fig. 3: Maximum Number of Slices Activated changes from 2 to 3) d. If counter 'Maximum Number of Slices Activated' is higher than threshold value 'Predefined Threshold Value' (step 218) , an interrupt Signal A is triggered (step 209) . (Fig. 3: Trigger Signal A is 0) There are 3 active transconductance circuits 130, 140, 150 (step 211) . So, adaptive control unit has to start counting (205) again from zero in order to deactivate one transconductance circuit 130, 140, 150 if there is no detected clipping signal. a . If there is still a difference between output voltage signal 121 and reference voltage 122, the third activated transconductance circuit 130, 140, 150 will be saturated and it will generate clipping signal 152. b. When clipping signal 142 is detected (step 213) in adaptive control unit 110: i. If the number of active transconductance circuits

[0044] 130, 140, 150 is equal to total number of available transconductance circuits 130, 140, 150 (N) (step 216) , interrupt Signal B is triggered ( step 207) . ii. If number of active transconductance circuits 130, 140, 150 is not equal to total number of available transconductance circuits 130, 140, 150 (N) (step 216) , one more transconductance circuit 130, 140, 150 will be activated (step 203) and its index is written in the FIFO. (Fig. 3: CMC #5 is the new active slice, # of Active Slices is 4) c. After activation of a transconductance circuit 130,

[0045] 140, 150 (step 203) ; if the number of active transconductance circuits 130, 140, 150 is higher than counter 'Maximum Number of Slices Activated' (step 217) , counter 'Maximum Number of Slices Activated' is set to number of active transconductance circuit 130, 140, 150 (step 208) . (Fig. 3: Maximum Number of Slices Activated changes from 3 to 4) d. If counter 'Maximum Number of Slices Activated' is higher than threshold number 'Predefined Threshold Value' (step 218) , interrupt Signal A is triggered (step 209) . (Fig. 3: Trigger Signal A is 1) There are four active transconductance circuits 130, 140, 150 (step 211) . So, adaptive control unit 110 has to start counting (step 205) again from zero in order to deactivate one of the transconductance circuits 130, 140, 150 if there is no detected clipping signal 132, 142, 152. a. If there is no difference between output voltage signal 121 and reference voltage 122, no transconductance circuit 130, 140, 150 will be saturated and they will not generate clipping signal 132, 142, 152. b. When clipping signal 132, 142, 152 is not detected (step 213) in adaptive control unit 110, it increments the counter (step 206) . c. When the counter is equal to predefined value (214) , i. If the number of active transconductance circuits 130, 140, 150 is higher than one (step 215) , adaptive control unit 110 will deactivate a transconductance circuit 130, 140, 150 (step 204) which was on for the longest time by reading the FIFO and deletes the index of deactivated transconductance circuit 130, 140, 150. (Fig. 3: CMC #0 is the slice to be deactivated firstly)

[0046] There are 3 active transconductance circuits 130, 140, 150 (step 211) . So, adaptive control unit 110 has to start counting (step 205) again from zero in order to deactivate one transconductance circuit 130, 140, 150 if there is no detected clipping signal 132, 142, 152. a. If there is no difference between output voltage signal 121 and reference voltage 122, no transconductance circuit 130, 140, 150 will be saturated and they will not generate clipping signal 132, 142, 152. b. When clipping signal 132, 142, 152 is not detected (step 213) in adaptive control unit 110, it increments the counter (step 206) . c. When the counter is equal to predefined value (step

[0047] 214) , i. If the number of active transconductance circuits 130, 140, 150 is higher than one (step 215) , adaptive control unit 110 will deactivate one transconductance circuit 130, 140, 150 (step 204) which was on for the longest time by reading the FIFO and deletes the index of deactivated transconductance circuit 130, 140, 150. (Fig. 3: CMC #7 is the slice to be deactivated secondly) There are two active transconductance circuits 130, 140, 150 (step 211) . So, adaptive control unit 110 has to start counting (step 205) again from zero in order to deactivate one transconductance circuit 130, 140, 150 if there is no detected clipping signal 132, 142, 152. a. If there is still a difference between output voltage signal 121 and reference voltage 122, one of the activated transconductance circuits 130, 140, 150 will be saturated and it will generate clipping signal 132, 142, 152. b. When clipping signal 132, 142, 152 is detected (step 213) in adaptive control unit 110, i. If the number of active transconductance circuits

[0048] 130, 140, 150 is equal to total number of available transconductance circuits 130, 140, 150 (N) (step 216) , interrupt Signal B is triggered ( step207 ) . ii. If number of active transconductance circuits 130, 140, 150 is not equal to total number of available transconductance circuits 130, 140, 150 (N) (step 216) , one more transconductance circuit 130, 140, 150 will be activated (step 203) and its index is written in the FIFO. (Fig. 3: CMC #1 is the new active slice, # of Active Slices is 3) c. After activation of a transconductance circuit 130, 140, 150 (step 203) ; if the number of active transconductance circuits 130, 140, 150 is higher than counter 'Maximum Number of Slices Activated' (step 217) , counter 'Maximum Number of Slices Activated' is set to number of active transconductance circuits 130, 140, 150 (step 208) . (Fig. 3: Maximum Number of Slices Activated is still 4) d. If counter 'Maximum Number of Slices Activated' is higher than threshold number 'Predefined Threshold Value' (step 218) , interrupt Signal A is triggered (209) . (Fig. 3: Trigger Signal A is still 1) There are three active transconductance circuits 130, 140, 150 (step 211) . So, adaptive control unit 110 has to start counting (step 205) again from zero in order to deactivate one transconductance circuit 130, 140, 150 if there is no detected clipping signal 132, 142, 152. a. If there is no difference between output voltage signal

[0049] 121 and reference voltage 122, no transconductance circuit 130, 140, 150 will be saturated and they will not generate clipping signal 132, 142, 152. b. When clipping signal 132, 142, 152 is not detected (step 213) in adaptive control unit 110 , it increments the counter (step 206) . c. When the counter is equal to predefined value (step 214) : If the number of active transconductance circuits

[0050] 130, 140, 150 is higher than one (step 215) , adaptive control unit 110 will deactivate one transconductance circuit 130, 140, 150 (step 204) which was on for the longest time by reading the FIFO and deletes the index of deactivated transconductance circuit 130, 140, 150. (Fig. 3: CMC #2 is the slice to be deactivated) There are two active transconductance circuits 130, 140, 150 (step 211) . So, adaptive control unit 110 has to start counting (step 205) again from zero in order to deactivate one transconductance circuit 130, 140, 150 if there is no detected clipping signal 132, 142, 152. a. If there is no difference between output voltage signal 121 and reference voltage 122, no transconductance circuit 130, 140, 150 will be saturated, and they will not generate clipping signal 132, 142, 152. b. When clipping signal 132, 142, 152 is not detected (step 213) in adaptive control unit 110, it increments the counter (step 206) . c. When the counter is equal to predefined value (step 214) : i. If the number of active transconductance circuits 130, 140, 150 is higher than one (step 215) , adaptive control unit 110 will deactivate one transconductance circuit 130, 140, 150 (step 204) which was on for the longest time by reading the FIFO and deletes the index of deactivated transconductance circuit 130, 140, 150. (Fig. 3: CMC #5 is the slice to be deactivated) There is one active transconductance circuit 130, 140, 150 (step 211) . So, adaptive control unit 110 waits for clipping signal 132, 142, 152 to activate one more transconductance circuit 130, 140, 150. (Fig. 3: CMC #1 is the only active slice)

[0051] Method for and Ethernet Physical Layer Transceiver with Adaptive Common -Mode Disturbance Compensation in Ethernet

[0052] Physical Layers

[0053] List of references

[0054] 100 ethernet phys ical layer transceiver

[0055] 110 adaptive control unit

[0056] 120 f irst circuit

[0057] 121 output voltage

[0058] 122 reference voltage

[0059] 130 transconductance circuit

[0060] 131 enable signal

[0061] 132 clipping signal

[0062] 133 compensation current signal

[0063] 134 compensation current signal

[0064] 140 transconductance circuit

[0065] 141 enable signal

[0066] 142 clipping signal

[0067] 150 transconductance circuit

[0068] 151 enable signal

[0069] 152 clipping signal

[0070] 160 media dependent interface (MDI )

[0071] 200 method for adaptive common-mode disturbance compensation

[0072] 201 method start 202 activate transconductance receiver

[0073] 203 activate one more transconductance receiver

[0074] 204 deactivate transconductance receiver

[0075] 205 start counter 206 increment counter

[0076] 207 trigger interrupt s ignal B

[0077] 208 set value 'maximum number o f active s lices '

[0078] 209 trigger interrupt s ignal A

[0079] 211 more than 1 active transconductance receiver? 212 clipping signal detected?

[0080] 213 clipping detected?

[0081] 214 counter equal to predef ined value ?

[0082] 215 active transconductance receivers higher than one ?

[0083] 216 total available transconductance receiver active? 217 number of active transconductance circuits higher than counter ' Maximum Number o f Sl ices Activated ' ?

[0084] 218 prede fined threshold exceeded?

Claims

Method for and Ethernet Physical Layer Transceiver with Adaptive Common -Mode Disturbance Compensation in EthernetPhysical LayersClaims1. Method for adaptive common-mode disturbance compensation in ethernet physical layers, comprising the steps of: measuring a voltage signal of a media dependent interface of the ethernet physical layer; generating an output voltage signal based on the measured voltage signal of the media dependent interface; providing the output voltage signal and a reference voltage signal to at least two identical transconductance circuits, which are connected together to the media dependent interface, wherein each transconductance circuit: compares the output voltage signal with the reference voltage signal, generates a compensation current signal based on the result of the comparison of the output voltage signal with the reference voltage signal, and provide the compensation current signal to the media dependent interface; and selectively enabling and / or disabling one or more of the at least two transconductance circuits, until the output voltage signal equals to the reference voltage signal.

2. Method according to claim 1, wherein an enabled transconductance circuit generates a clipping signal when the transconductance circuit issaturated, wherein this clipping signal is used to enable a further transconductance circuit, which is currently disabled .

3. Method according to claim 1 or claim 2, wherein the transconductance circuit is a feedback transconductance amplifier that compares the output voltage signal with the reference voltage signal and generates the compensation current signal.

4. Method according to any of claims 1 to 3, further comprising the step of defining a threshold number of enabled transconductance circuits and generating an event or storing an event in a database for later readout if the number of enabled transconductance circuits exceeds threshold number, wherein the threshold number is smaller than the total number of available transconductance circuits .

5. Method according to any of claims 1 to 4 wherein at least one transconductance circuit is enabled at all times.

6. Method according to any of claims 1 to 5, wherein each transconductance circuit has a unique index and the index of enabled transconductance circuits are stored in a FIFO register according to their sequence of enabling .

7. Method according to any of claims 1 to 6, wherein an interrupt signal is generated if the number of enabled transconductance circuits is equal to the number of available transconductance circuits.

8. Method according to any of claims 1 to 7, further comprising the step c 'f starting a counter after a transconductance circuit has been enabled and disabling a transconductance circuit if no further transconductance circuit is enabled until the counter expires and at least two transconductance circuits are enabled.

9. An ethernet physical layer transceiver with adaptive common-mode disturbance compensation in ethernet physical layers, comprising: a first circuit connected to a media dependent interface of the ethernet physical layer and configured to measure a voltage signal across the media dependent interface and to generate an output voltage signal based on the measured voltage signal; at least two identical transconductance circuits, which are connected in parallel to the media dependent interface and to the first circuit, wherein the transconductance circuits are each configured to:receive the output voltage signal from the first circuit and compare the output voltage signal with a reference voltage signal, generate a compensation current signal based on the result of the comparison of the output voltage signal with the reference voltage signal, provide the compensation current signal to the media dependent interface, and generate clipping signal when the transconductance circuit is saturated, each transconductance circuit further comprising an enable input for being selectively enabled or disabled; an adaptive control unit connected to all transconductance circuits for receiving clipping signals from and sending enable / disable signal to respective transconductance circuits, wherein the adaptive control unit is configured to implement the method according to any of claims 1 to 8 by adjusting the number of active transconductance circuits by sending enable / disable signals to selected transconductance circuits.

10. Ethernet physical layer transceiver according to claim 9, wherein the transconductance circuit is a feedback transconductance amplifier.

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