Doherty amplifier
The Doherty amplifier addresses parasitic component interference by using a load modulation circuit and second harmonic processing to achieve efficient amplification of signals with large PAPR, especially during back-off operations.
Patent Information
- Application Number
- PCT/JP2024/032619
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-06-27
- Filing Date
- 2024-09-12
- Publication Date
- 2026-01-02
AI Technical Summary
Existing Doherty amplifiers are susceptible to the influence of parasitic components in the main amplifier and its package, especially during back-off operation, which affects their efficiency.
Incorporating a load modulation circuit, an offset line, and a second harmonic processing circuit to manage impedance fluctuations and parasitic components, allowing for highly efficient amplification by short-circuiting or opening specific frequency signals at the combining point.
The solution enables highly efficient amplification of signals with large peak-to-average power ratio (PAPR) by minimizing the impact of parasitic components, particularly during back-off operations, thus enhancing amplifier performance.
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Figure JP2024032619_02012026_PF_FP_ABST
Abstract
Description
Doherty Amplifier
[0001] The present disclosure relates to a Doherty amplifier having a main amplifier (carrier amplifier) and an auxiliary amplifier (peaking amplifier).
[0002] In recent years, in order to improve the efficiency of communication amplifiers, a Doherty amplifier has been proposed, which is a highly efficient amplifier capable of amplifying signals with a large peak-to-average power ratio (hereinafter referred to as PAPR). The Doherty amplifier disclosed in Patent Document 1 includes a first series resonant circuit connected between the output end of a carrier amplifier and ground and resonating at a first harmonic frequency, a second series resonant circuit connected between the output end of a peak amplifier and ground and resonating at the first harmonic frequency, a first parallel resonant circuit having one end connected to the output end of the carrier amplifier and the other end connected to the output end of the peak amplifier and resonating at a second harmonic frequency, and a second parallel resonant circuit having one end connected to the output end of the peak amplifier and the other end of the first parallel resonant circuit and electrically connected to a load and resonating at the second harmonic frequency.
[0003] WO2022 / 249380 publication
[0004] The Doherty amplifier disclosed in Patent Document 1 can prevent fluctuations in the impedance of the first harmonic and the second harmonic due to fluctuations in the load impedance. Furthermore, when the operating frequency of the Doherty amplifier is high or the output power is large, a highly efficient Doherty amplifier that is not affected by parasitic components in the main amplifier and the package of the main amplifier is desired.
[0005] The present disclosure has been made in consideration of the above points, and aims to provide a highly efficient Doherty amplifier that is less susceptible to the influence of parasitic components in the main amplifier and the main amplifier package, and that is not affected by parasitic components in the main amplifier and the main amplifier package during back-off operation.
[0006] The Doherty amplifier according to the present disclosure includes a main amplifier, an auxiliary amplifier, a load modulation circuit electrically connected between the output terminal of the main amplifier and a combining point and modulating the output load on the main amplifier, an offset line electrically connected between the output terminal of the auxiliary amplifier and the combining point, and a second harmonic processing circuit electrically connected between the combining point and an output terminal and short-circuiting the fundamental frequency signal in the high-frequency signal output from the combining point and opening the second harmonic frequency signal in the high-frequency signal output from the combining point.
[0007] According to the present disclosure, highly efficient amplification can be achieved in back-off operation.
[0008] It is a circuit configuration diagram showing a Doherty amplifier according to embodiment 1. It is a diagram showing a second harmonic processing circuit in the Doherty amplifier according to embodiment 1. It is a diagram showing a simulation result showing bandwidth efficiency in the Doherty amplifier according to embodiment 1. It is a circuit configuration diagram showing a Doherty amplifier according to embodiment 2.
[0009] First Embodiment The Doherty amplifier according to the first embodiment is a highly efficient amplifier capable of amplifying signals with a large PAPR. The Doherty amplifier according to the first embodiment is capable of forming an appropriate harmonic processing circuit outside the combining point 20 as viewed from the main amplifier 1, and is a Doherty amplifier that performs highly efficient amplification while realizing harmonic processing in back-off operation.
[0010] The Doherty amplifier according to the first embodiment includes a main amplifier 1, an auxiliary amplifier 2, a power divider 3, a phase adjustment circuit 4, a load modulation circuit 5, an offset line 6, an output transmission circuit 7, and a second harmonic processing circuit 8. In the Doherty amplifier, the main amplifier 1 is called a carrier amplifier, and the auxiliary amplifier 2 is called a peak amplifier. During saturation operation, the signal amplified by the main amplifier 1 and the signal amplified by the auxiliary amplifier 2 are combined at a combining point 20. During back-off operation, the auxiliary amplifier 2 is stopped from operating, i.e., is turned off.
[0011] The main amplifier 1 is an amplifier composed of transistors that operate in class AB. The gate electrodes of the transistors that make up the main amplifier 1 are the input terminals of the main amplifier 1 that receive the input signal, the drain electrodes are the output terminals of the main amplifier 1 that output the amplified output signal, and the source electrodes are connected to the ground node. Parasitic capacitance exists between the drain and source electrodes (ground) of the transistors that make up the main amplifier 1.
[0012] The main amplifier 1 uses a transistor such as a field effect transistor (FET), a heterojunction bipolar transistor (HBT), a high electron mobility transistor (HEMT), or a GaN HEMT using gallium nitride (GaN).
[0013] The auxiliary amplifier 2 is an amplifier composed of transistors that operate in class C. The gate electrodes of the transistors that make up the auxiliary amplifier 2 are the input terminals of the auxiliary amplifier 2 that receive the input signal, the drain electrodes are the output terminals of the auxiliary amplifier 2 that output the amplified output signal, and the source electrodes are connected to the ground node. Parasitic capacitance exists between the drain and source electrodes (ground) of the transistors that make up the auxiliary amplifier 2.
[0014] The auxiliary amplifier 2 uses a transistor such as an FET, HBT, HEMT, or GaN HEMT. The main amplifier 1 and the auxiliary amplifier 2 are housed in a package PKG molded with resin or the like.
[0015] The power divider 3 has an input end connected to an input terminal 10, and divides a radio frequency (RF) signal in the operating frequency band input to the input terminal 10 into a first output end and a second output end for output. The second output end of the power divider 3 is electrically connected to the input end of the auxiliary amplifier 2. The power divider 3 is configured by a Wilkinson divider or a hybrid circuit, etc. Components that make up the power divider 3 include a circuit using lumped constant elements, a circuit using distributed constant lines, a circuit combining lumped constants and distributed constants, an L-C type matching circuit, or a λ / 4 line.
[0016] The phase adjustment circuit 4 is electrically connected between the first output terminal of the power divider 3 and the input terminal of the main amplifier 1. A radio frequency (RF) signal in the operating frequency band output from the first output terminal of the power divider 3 is input to the input terminal of the main amplifier 1 via the phase adjustment circuit 4.
[0017] The phase adjustment circuit 4 is a circuit that equalizes the electrical length of the transmission path between the first output terminal of the power divider 3 and the input terminal of the main amplifier 1 and the electrical length of the transmission path between the second output terminal of the power divider 3 and the input terminal of the auxiliary amplifier 2. The phase adjustment circuit 4 may be a circuit using lumped constant elements, a circuit using distributed constant lines, a circuit combining lumped constant elements and distributed constant elements, an LC matching circuit, or a λ / 4 line.
[0018] The phase adjustment circuit 4 is a circuit that equalizes the electrical length of the transmission path between the first output terminal of the power divider 3 and the input terminal of the main amplifier 1 and the electrical length of the transmission path between the second output terminal of the power divider 3 and the input terminal of the auxiliary amplifier 2. Therefore, instead of being provided between the first output terminal of the power divider 3 and the input terminal of the main amplifier 1, the phase adjustment circuit 4 may be provided between the second output terminal of the power divider 3 and the input terminal of the auxiliary amplifier 2.
[0019] The load modulation circuit 5 is electrically connected between the output terminal of the main amplifier 1 and the combining point 20. The load modulation circuit 5 is a λ / 4 line, which is a transmission line that modulates the output load for the main amplifier 1. The load modulation circuit 5 has a characteristic impedance of 2×R, which is the optimum load impedance for the output of the main amplifier 1 during saturated operation, for a signal with a fundamental frequency f0 in the radio frequency (RF) signal output from the main amplifier 1. out The electrical length is set to 90 degrees.
[0020] During back-off operation, the impedance seen from the output of the main amplifier 1 for a signal of fundamental frequency f0 in the radio frequency (RF) signal output from the main amplifier 1 is 4×R out At this time, the electrical length of the load modulation circuit 5 is 90 degrees.
[0021] On the other hand, the electrical length of the load modulation circuit 5 is 180 degrees for a signal with a double frequency 2×f0 in the radio frequency (RF) signal output from the main amplifier 1. As a result, the impedance at the combining point 20 is not converted, and the impedance seen from the output of the main amplifier 1 is shorted, thereby achieving harmonic processing.
[0022] Although the load modulation circuit 5 is a λ / 4 line, which is a transmission line, it may be any circuit that has the function of modulating the output load on the main amplifier 1, specifically, that sets the electrical length between the output end of the main amplifier 1 and the combining point 20 to 90 degrees for a signal of the fundamental frequency f0 and to 180 degrees for a signal of the double frequency 2×f0 during back-off operation.
[0023] The offset line 6 is electrically connected between the output end of the auxiliary amplifier 2 and the combining point 20. The offset line 6 is a circuit having an electrical length that correctly reproduces the off-state output impedance (open) of the auxiliary amplifier 2 at the combining point 20 during back-off operation, that is, when the auxiliary amplifier 2 is off. In other words, the offset line 6 has an electrical length that puts the output impedance of the auxiliary amplifier 2 into an open state at the combining point 20 during back-off operation. The offset line 6 may be a circuit using lumped elements, a circuit using distributed constant lines, a circuit combining lumped constants and distributed constants, an L-C matching circuit, or a λ / 4 line.
[0024] The input end of the output transmission circuit 7 is electrically connected to the combining point 20. The output transmission circuit 7 has a characteristic impedance set to the output impedance Rout for the signal of the fundamental frequency f0 of the radio frequency (RF) signal output from the combining point 20, and an electrical length set to 45 degrees for the signal of the fundamental frequency f0 and 90 degrees for the signal of the double frequency 2×f0.
[0025] The second harmonic processing circuit 8 is electrically connected between the output end of the output transmission circuit 7 and the output terminal 30. The second harmonic processing circuit 8 is a DC block and has the following two functions depending on the frequency. The first function is to short-circuit the signal of the fundamental frequency f0 in the radio frequency (RF) signal output from the output end of the output transmission circuit 7. This means that the signal of the fundamental frequency f0 is passed through the series path between the input end and output end of the second harmonic processing circuit 8.
[0026] As a result, the second harmonic processing circuit 8 is in a through state, and the impedance on the input side of the second harmonic processing circuit 8 is equal to the output impedance R out The second harmonic processing circuit 8 may be used as a series matching circuit element for a signal of the fundamental frequency f0.
[0027] The second function is to be in an open state with respect to a signal having a second harmonic frequency of 2×f0 in the radio frequency (RF) signal output from the output end of the output transmission circuit 7. This means that the signal having the second harmonic frequency of 2×f0 is totally reflected from the series path between the input end and output end of the second harmonic processing circuit 8.
[0028] That is, because the second harmonic processing circuit 8 is in an open state, the impedance on the input side of the second harmonic processing circuit 8 is open, and the signal of the second harmonic frequency 2×f0 that reaches the input end of the second harmonic processing circuit 8 is totally reflected. As a result of the signal of the second harmonic frequency 2×f0 being totally reflected, a second harmonic short point necessary for harmonic processing is formed at the combining point 20.
[0029] 2, the second harmonic processing circuit 8 is configured by a DC block having a first capacitor 81 and a second capacitor 82 electrically connected in parallel between the input terminal 8a and the output terminal 8b of the second harmonic processing circuit 8. The first capacitor 81 is a capacitor that self-resonates with respect to the signal of the fundamental frequency f0 in the radio frequency (RF) signal output from the output terminal of the output transmission circuit 7.
[0030] The second capacitor 82 is a capacitor that resonates with a signal of the double frequency 2×f0 due to the reactance of the first capacitor 81. For signals of the fundamental frequency f0, the first capacitor 81 self-resonates, resulting in a through state between the input terminal 8a and the output terminal 8b. On the other hand, for signals of the double frequency 2×f0, the first capacitor 81 and the second capacitor 82 resonate, resulting in an open state between the input terminal 8a and the output terminal 8b.
[0031] The second harmonic processing circuit 8 is not limited to a parallel circuit of the first capacitor 81 and the second capacitor 82, but may be a single capacitor, or may be a parallel circuit in which three or more capacitors are connected in parallel. Furthermore, multiple DC blocks formed by parallel circuits in which the first capacitor 81 and the second capacitor 82 are connected in parallel may be connected in parallel between the input terminal 8a and the output terminal 8b of the second harmonic processing circuit 8. Connecting multiple DC blocks in parallel improves power handling. Essentially, the second harmonic processing circuit 8 may be a circuit that is in a through state for signals of the fundamental frequency f0 and in an open state for signals of the second harmonic frequency 2×f0.
[0032] The circuit composed of the load modulation circuit 5, the offset line 6, the output transmission circuit 7, and the second harmonic processing circuit 8 functions as a harmonic processing circuit for the main amplifier 1 for the signal with the second harmonic frequency 2×f0 in the radio frequency (RF) signal output from the output terminal of the main amplifier 1 during back-off operation.
[0033] Next, a description will be given of the operation of the Doherty amplifier according to embodiment 1. When a radio frequency (RF) signal in the operating frequency band is input to input terminal 10, the signal is divided by power divider 3, and the divided radio frequency (RF) signals are output from the first output terminal and the second output terminal of power divider 3, respectively.
[0034] The radio frequency (RF) signal output from the first output terminal of the power divider 3 is phase-adjusted by the phase adjustment circuit 4 and input to the input terminal of the main amplifier 1. The radio frequency (RF) signal output from the second output terminal of the power divider 3 is input to the input terminal of the auxiliary amplifier 2.
[0035] First, the saturated operation of the Doherty amplifier will be described. Both the main amplifier 1 and the auxiliary amplifier 2 are in the on state. The radio frequency (RF) signal input to the main amplifier 1 is amplified by the main amplifier 1, and the amplified radio frequency (RF) signal passes through the load modulation circuit 5 and reaches the combining point 20. The radio frequency (RF) signal input to the auxiliary amplifier 2 is amplified by the auxiliary amplifier 2, and the amplified radio frequency (RF) signal passes through the offset line 6 and reaches the combining point 20.
[0036] The radio frequency (RF) signal amplified by the main amplifier 1 and the radio frequency (RF) signal amplified by the auxiliary amplifier 2 are combined at a combining point 20, and the amplifier operates as a Doherty amplifier. The impedance of the combining point 20 is arbitrary, and is matched to a 50 Ω system at the end of the output terminal 30. The output transmission circuit 7 has an electrical length of 45 degrees for the signal of the fundamental frequency f0 of the radio frequency (RF) signal output from the combining point 20, and an electrical length of 90 degrees for the signal of the second harmonic frequency 2×f0, and its characteristic impedance is equal to the output impedance of the signal of the fundamental frequency f0.
[0037] The radio frequency (RF) signal combined at combining point 20 is input to second harmonic processing circuit 8 via output transmission circuit 7. The signal having the fundamental frequency f0 of the radio frequency (RF) signal input to second harmonic processing circuit 8 passes through second harmonic processing circuit 8 and is output to output terminal 30. On the other hand, the signal having the second harmonic frequency 2×f0 of the radio frequency (RF) signal input to second harmonic processing circuit 8 is totally reflected by second harmonic processing circuit 8.
[0038] Next, the back-off operation of the Doherty amplifier according to the first embodiment will be described. The main amplifier 1 is in an on state, and the auxiliary amplifier 2 is in an off state. Since the auxiliary amplifier 2 is off, the impedance Z at the output end of the auxiliary amplifier 2 is 3 is open to a signal of the fundamental frequency f0 and a signal of the double frequency 2×f0 of the radio frequency (RF) signal. Also, the impedance Z at the output end of the offset line 6 as seen from the combining point 20 is 3 is open to a signal at the fundamental frequency f0 and a signal at the double frequency 2×f0 of a radio frequency (RF) signal.
[0039] Impedance Z seen from the output of the main amplifier 1 1 is 4×R due to the load modulation of the load modulation circuit 5 for the signal of the fundamental frequency f0 of the radio frequency (RF) signal from the main amplifier 1. out On the other hand, the impedance Z seen from the output from the main amplifier 1 for a signal with a double frequency 2×f0 is 1 The load modulation circuit 5 does not modulate the signal of the double frequency 2×f0, and the impedance of the combining point 20 is not converted and is shorted. As a result, harmonic processing is realized. The impedance Z 2 is R out and is shorted to a signal of the double frequency 2×f0.
[0040] The second harmonic processing circuit 8 is shorted and passes through the fundamental frequency f0 signal of the radio frequency (RF) signal output from the combining point 20 and input to the input terminal of the second harmonic processing circuit 8 via the output transmission circuit 7. Therefore, the impedance Z 4 is the same as the impedance at the output end connected to the output terminal 30, and is Rout, which is the output impedance Z at the output terminal 30.
[0041] Therefore, the impedance Z of the input side of the output transmission circuit 7 as seen from the combining point 20 is 2 In the case of the RF signal output from the combining point 20, the second harmonic processing circuit 8 is short-circuited and the characteristic impedance is equal to the output impedance Z, so that the output transmission circuit 7 does not perform impedance conversion and the output impedance Rout remains unchanged.
[0042] On the other hand, second harmonic processing circuit 8 is in an open state with respect to the signal with the second harmonic frequency 2×f0 of the radio frequency (RF) signal that is output from combining point 20 and input to the input terminal of second harmonic processing circuit 8 via output transmission circuit 7. Therefore, the signal with the second harmonic frequency 2×f0 of the radio frequency (RF) signal that is input to the input terminal of second harmonic processing circuit 8 is totally reflected by second harmonic processing circuit 8.
[0043] Therefore, the impedance Z of the input side of the output transmission circuit 7 as seen from the combining point 20 is 2 In the figure, since the second harmonic processing circuit 8 is in an open state for the signal of the second harmonic frequency 2×f0 in the radio frequency (RF) signal, the signal of the second harmonic frequency 2×f0 is totally reflected by the second harmonic processing circuit 8, and since the electrical length of the output transmission circuit 7 is 90 degrees for the signal of the second harmonic frequency 2×f0, the combining point 20 is shorted. As a result, a short point is formed at the combining point 20 for the signal of the second harmonic frequency 2×f0 required for harmonic processing.
[0044] The impedance Z at the output end of the offset line 6 as viewed from the combining point 20 is 3 is open, the path from the output end of the auxiliary amplifier 2 to the combining point 20 does not affect the matching of the radio frequency (RF) signal from the main amplifier 1 with the fundamental frequency f0 and the double frequency 2×f0.
[0045] The bandwidth efficiency of the Doherty amplifier according to the first embodiment was verified. FIG. 3 shows simulation results illustrating efficiency versus normalized frequency. In FIG. 3, the horizontal axis represents normalized frequency, the vertical axis represents efficiency, characteristic curve A represents the simulation results for the Doherty amplifier according to the first embodiment, and characteristic curve B represents the simulation results for the Doherty amplifier in which the second harmonic processing circuit 8 is omitted. As is clear from FIG. 3, it can be seen that the Doherty amplifier according to the first embodiment can amplify a signal with high efficiency at the back-off point.
[0046] The Doherty amplifier according to the first embodiment is a Doherty amplifier in which the main amplifier 1 and the auxiliary amplifier 2 are connected in parallel, and is provided with a second harmonic processing circuit 8 that is electrically connected between the output terminal 30 and a combining point 20 of the output of the main amplifier 1 and the output of the auxiliary amplifier 2, and that is in a short-circuit state for a signal of the fundamental frequency f0 in the high-frequency signal output from the combining point 20, and is in an open state for a signal of the second harmonic frequency 2×f0 in the high-frequency signal output from the combining point 20. Therefore, the amplifier is less susceptible to the influence of parasitic components in the main amplifier 1 and the package PKG of the main amplifier 1, and can perform highly efficient amplification.
[0047] Second Embodiment A Doherty amplifier according to a second embodiment will be described with reference to FIG. 4. The Doherty amplifier according to the second embodiment differs from the Doherty amplifier according to the first embodiment in that a short stub 9 is provided, and the output transmission circuit 7 is omitted and an output matching circuit 11 is provided, but the remaining differences are the same. Therefore, the following description will mainly focus on the differences from the Doherty amplifier according to the first embodiment. Note that in FIG. 4, the same reference numerals as those in FIGS. 1 to 3 indicate the same or corresponding parts.
[0048] The Doherty amplifier according to the second embodiment includes a main amplifier 1, an auxiliary amplifier 2, a power divider 3, a phase adjustment circuit 4, a load modulation circuit 5, an offset line 6, a second harmonic processing circuit 8, a short stub 9, and an output matching circuit 11. One end of the short stub 9 is shunt-connected to the offset line 6, and the other end is electrically connected to a ground node.
[0049] At the shunt connection point with the offset line 6, the short stub 9 forms an open point for the signal of the fundamental frequency f0 in the high-frequency signal output from the output end of the auxiliary amplifier 2 and the signal of the fundamental frequency f0 in the high-frequency signal at the combining point 20, and forms a short point for the signal of the double frequency 2×f0 in the high-frequency signal at the combining point 20.
[0050] Therefore, the short stub 9 does not affect the signal of the fundamental frequency f0 in the high frequency signal, and has a reflection phase with a reflection coefficient of 1 for the signal of the double frequency 2×f0 in the high frequency signal. The shunt connection point between the short stub 9 and the offset line 6 is set so that during back-off operation, the combined electrical length of the short stub 9 from the combining point 20 and the electrical length of the load modulation circuit 5 is an integer multiple of 180 degrees at the output of the main amplifier 1 for the signal of the double frequency 2×f0 in the high frequency signal.
[0051] During back-off operation, the second harmonic processing circuit 8 disappears from the combining point 20 for the signal with the second harmonic frequency 2×f0 in the radio frequency signal. During back-off operation, the circuit formed by the load modulation circuit 5, the offset line 6, and the short stub 9 functions as the harmonic processing circuit of the main amplifier 1 for the signal with the second harmonic frequency 2×f0 in the radio frequency (RF) signal output from the output end of the main amplifier 1.
[0052] The short stub 9 may be a circuit using lumped constant elements, a circuit using distributed constant lines, or a circuit combining lumped constants and distributed constants. The input end of the second harmonic processing circuit 8 is electrically connected to the combining point. The output matching circuit 11 is electrically connected between the output end of the second harmonic processing circuit 8 and the output terminal. The output matching circuit 11 matches the impedance of the combining point 20.
[0053] Next, a description will be given of the operation of the Doherty amplifier according to embodiment 2. When a radio frequency (RF) signal in the operating frequency band is input to input terminal 10, the signal is divided by power divider 3, and the divided radio frequency (RF) signals are output from the first output terminal and the second output terminal of power divider 3, respectively.
[0054] The radio frequency (RF) signal output from the first output terminal of the power divider 3 is phase-adjusted by the phase adjustment circuit 4 and input to the input terminal of the main amplifier 1. The radio frequency (RF) signal output from the second output terminal of the power divider 3 is input to the input terminal of the auxiliary amplifier 2.
[0055] First, the saturated operation of the Doherty amplifier will be described. Both the main amplifier 1 and the auxiliary amplifier 2 are in the on state. The radio frequency (RF) signal input to the main amplifier 1 is amplified by the main amplifier 1, and the amplified radio frequency (RF) signal passes through the load modulation circuit 5 and reaches the combining point 20. The radio frequency (RF) signal input to the auxiliary amplifier 2 is amplified by the auxiliary amplifier 2, and the amplified radio frequency (RF) signal passes through the offset line 6 and reaches the combining point 20.
[0056] The radio frequency (RF) signal amplified by the main amplifier 1 and the radio frequency (RF) signal amplified by the auxiliary amplifier 2 are combined at a combining point 20, and the amplifier operates as a Doherty amplifier. The short stub 9 is open at the shunt connection point between the short stub 9 and the offset line 6, and does not affect the signal with the fundamental frequency f0 in the radio frequency (RF) signal amplified by the main amplifier 1 or the signal with the fundamental frequency f0 in the radio frequency (RF) signal amplified by the auxiliary amplifier 2. The impedance of the combining point 20 is arbitrary, and is matched to a 50 Ω system by an output matching circuit 11.
[0057] The radio frequency (RF) signal combined at combining point 20 is input to second harmonic processing circuit 8. The signal having the fundamental frequency f0 of the radio frequency (RF) signal input to second harmonic processing circuit 8 passes through second harmonic processing circuit 8 and is output to output terminal 30. On the other hand, the signal having the second harmonic frequency 2×f0 of the radio frequency (RF) signal input to second harmonic processing circuit 8 is totally reflected by second harmonic processing circuit 8.
[0058] Next, the back-off operation of the Doherty amplifier according to the second embodiment will be described. The main amplifier 1 is in an on state, and the auxiliary amplifier 2 is in an off state. Since the auxiliary amplifier 2 is off, the impedance Z at the output terminal of the auxiliary amplifier 2 is 3 is open to a signal at the fundamental frequency f0 and a signal at the double frequency 2×f0 of a radio frequency (RF) signal.
[0059] Impedance Z seen from the output of the main amplifier 1 1 is 4×R due to the load modulation of the load modulation circuit 5 for the signal of the fundamental frequency f0 of the radio frequency (RF) signal from the main amplifier 1.out On the other hand, the impedance Z seen from the output from the main amplifier 1 for a signal with a double frequency 2×f0 is 1 The load modulation circuit 5 does not modulate the signal of the double frequency 2×f0, and the impedance of the combining point 20 is not converted and is shorted. As a result, harmonic processing is realized. The impedance Z 2 is R out and is open to signals with a double frequency of 2×f0.
[0060] The second harmonic processing circuit 8 is short-circuited and passes through the fundamental frequency f0 signal in the radio frequency (RF) signal output from the combining point 20 and input to the input terminal of the second harmonic processing circuit 8. Therefore, the impedance Z 2 is the same as the impedance at the output terminal 30 connected to the output terminal 30 via the output matching circuit 11, and is Rout which is the output impedance Z at the output terminal 30.
[0061] On the other hand, second harmonic processing circuit 8 is in an open state with respect to the signal having the second harmonic frequency 2×f0 of the radio frequency (RF) signal output from combining point 20 and input to the input terminal of second harmonic processing circuit 8. Therefore, the signal having the second harmonic frequency 2×f0 of the radio frequency (RF) signal input to the input terminal of second harmonic processing circuit 8 is totally reflected by second harmonic processing circuit 8.
[0062] The shunt connection point between the short stub 9 and the offset line 6 is open to the signal of the fundamental frequency f0 in the radio frequency (RF) signal amplified by the main amplifier 1, and the short stub 9 does not affect the signal of the fundamental frequency f0 in the radio frequency (RF) signal amplified by the main amplifier 1.
[0063] On the other hand, the shunt connection point between the short stub 9 and the offset line 6 becomes a short point for a signal of the double frequency 2×f0 in the radio frequency (RF) signal amplified by the main amplifier 1. In other words, the impedance Z 5 is open and short to a signal at the double frequency 2×f0.
[0064] The Doherty amplifier according to the second embodiment is a Doherty amplifier in which the main amplifier 1 and the auxiliary amplifier 2 are connected in parallel, and further comprises: a second harmonic processing circuit 8 that is electrically connected between the output terminal 30 and a combining point 20 of the outputs of the main amplifier 1 and the auxiliary amplifier 2, and that is in a short state for the signal of the fundamental frequency f0 in the high-frequency signal output from the combining point 20 and is in an open state for the signal of the second harmonic frequency 2×f0 in the high-frequency signal output from the combining point 20; and a short stub that has one end shunt-connected to the offset line 6 and the other end electrically connected to the ground node, and that forms an open point at the shunt connection point with the offset line 6 for the signal of the fundamental frequency f0 in the high-frequency signal output from the output terminal of the auxiliary amplifier 2 and the signal of the fundamental frequency f0 in the high-frequency signal at the combining point 20, and that forms a short point for the signal of the second harmonic frequency 2×f0 in the high-frequency signal at the combining point 20. Therefore, the Doherty amplifier is less susceptible to the influence of parasitic components in the main amplifier 1 and the package PKG of the main amplifier 1, and can perform highly efficient amplification.
[0065] It should be noted that the embodiments may be freely combined, any of the components of the embodiments may be modified, or any of the components of the embodiments may be omitted.
[0066] The Doherty amplifier of the present disclosure is suitable as a communications amplifier in a wireless communication system.
[0067] 1 main amplifier, 2 auxiliary amplifier, 3 power divider, 4 phase adjustment circuit, 5 load modulation circuit, 6 offset line, 7 output transmission circuit, 8 second harmonic processing circuit, 9 short stub, 10 output matching circuit.
Claims
1. A Doherty amplifier comprising: a main amplifier; an auxiliary amplifier; a load modulation circuit electrically connected between the output end of the main amplifier and a combining point, for modulating the output load on the main amplifier; an offset line electrically connected between the output end of the auxiliary amplifier and the combining point; and a second harmonic processing circuit electrically connected between the combining point and an output terminal, for shorting a signal at the fundamental frequency of the high-frequency signal output from the combining point and for opening a signal at the second harmonic frequency of the high-frequency signal output from the combining point.
2. A Doherty amplifier according to claim 1, wherein the load modulation circuit is a transmission line whose electrical length is set at 90 degrees with respect to the signal of the fundamental frequency of the high frequency signal output from the output terminal of the main amplifier.
3. A Doherty amplifier according to claim 1 or 2, wherein the offset line has an electrical length such that, during back-off operation, the output impedance at the combining point is in an open state when the auxiliary amplifier is off.
4. A Doherty amplifier according to any one of claims 1 to 3, wherein the second harmonic processing circuit has a first capacitor electrically connected between the input end and output end of the second harmonic processing circuit and self-resonating with respect to a signal of the fundamental frequency in the high-frequency signal output from the combining point, and a second capacitor connected in parallel to the first capacitor and resonating with the signal of the second harmonic frequency in the high-frequency signal output from the combining point due to the reactance of the first capacitor.
5. A Doherty amplifier according to any one of claims 1 to 3, wherein the second harmonic processing circuit has a plurality of DC blocks electrically connected in parallel between the input terminal and the output terminal of the second harmonic processing circuit, and each of the plurality of DC blocks is composed of a first capacitor that self-resonates with a signal of the fundamental frequency in the high-frequency signal output from the combining point, and a second capacitor that is connected in parallel to the first capacitor and resonates with a signal of the second harmonic frequency in the high-frequency signal output from the combining point due to the reactance of the first capacitor.
6. A Doherty amplifier according to any one of claims 1 to 5, further comprising an output transmission circuit electrically connected between the combining point and the input end of the second harmonic processing circuit, the output transmission circuit having an electrical length set to 90 degrees with respect to the second harmonic frequency signal in the high-frequency signal output from the combining point.
7. A Doherty amplifier according to any one of claims 1 to 5, further comprising a short stub having one end connected in shunt to the offset line and the other end electrically connected to a ground node, the short stub forming an open point at the shunt connection point with the offset line for the signal of the fundamental frequency in the high-frequency signal output from the output end of the auxiliary amplifier and the signal of the fundamental frequency in the high-frequency signal at the combining point, and forming a short point for the signal of the second harmonic frequency in the high-frequency signal at the combining point.
8. A Doherty amplifier according to claim 7, wherein the shunt connection point between the offset line and the short stub is set so that, during back-off operation, for a signal having a second harmonic frequency of 2×f0 in a high-frequency signal, the total electrical length from the combining point to the short stub and the electrical length of the load modulation circuit is an integer multiple of 180 degrees at the output of the main amplifier.
Citation Information
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