Power conversion device

Abstract

The present invention reduces switching loss while suppressing current distortion. Each of a U-phase modulation wave (MU1), a V-phase modulation wave (MV1), and a W-phase modulation wave (MW1) generated in a controller during the steady operation of a three-phase inverter circuit includes: a first curved portion (CV1) that increases from an intermediate value (d3) to a first value (d1) and becomes convex upward; a first straight line portion (SL1) that becomes constant at the first value (d1); a second curved portion (CV2) that decreases from the first value (d1) to the intermediate value (d3) and becomes convex upward; a third curved part (CV3) that decreases from the intermediate value (d3) to a second value (d2) and becomes convex downward; a second straight line portion (SL2) that becomes constant at the second value (d2); and a fourth curved portion (CV4) that increases from the second value (d2) to the intermediate value (d3) and becomes convex downward.

Description

Power Conversion Device

[0001] The present disclosure relates to a power conversion device, and more particularly to a power conversion device including a three-phase inverter circuit.

[0002] Patent Document 1 discloses a power conversion device including an inverter circuit and a control unit.

[0003] In the power conversion device disclosed in Patent Document 1, the inverter circuit has three switching legs each consisting of two switching elements connected in series to each other, and the midpoint between the upper arm switching element and the lower arm switching element in each switching leg is connected to the coil of each phase of a three-phase AC motor.

[0004] The control unit is configured to control the output current of the inverter circuit (currents of U, V, and W phases flowing to the motor) by controlling the switching of the inverter circuit, and is also configured to switch the modulation method used for switching between two-phase modulation and three-phase modulation.

[0005] JP 2015-154633 A

[0006] The two-phase modulation method can reduce switching loss compared to the three-phase modulation method, but current distortion can become large.

[0007] An object of the present disclosure is to provide a power conversion device that can reduce switching loss while suppressing current distortion.

[0008] A power conversion device according to one aspect of the present disclosure includes a three-phase inverter circuit and a controller. The three-phase inverter circuit includes a U-phase switching circuit, a V-phase switching circuit, and a W-phase switching circuit. The U-phase switching circuit has first and second switching elements connected in series to each other and outputs a U-phase current from a first output point. The V-phase switching circuit has third and fourth switching elements connected in series to each other and outputs a V-phase current from a second output point. The W-phase switching circuit has fifth and sixth switching elements connected in series to each other and outputs a W-phase current from a third output point. The controller generates a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave based on detected values ​​of at least two of the U-phase current, the V-phase current, and the W-phase current, and generates a first PWM signal, a second PWM signal, a third PWM signal, a fourth PWM signal, a fifth PWM signal, and a sixth PWM signal for controlling the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element, respectively. Each of the U-phase modulated wave, the V-phase modulated wave, and the W-phase modulated wave is a waveform that indicates a time change in a duty command value. Each of the U-phase modulated wave, the V-phase modulated wave, and the W-phase modulated wave generated by the controller during steady operation of the three-phase inverter circuit includes a first curved portion, a first linear portion, a second curved portion, a third curved portion, a second linear portion, and a fourth curved portion. The first curved portion increases from an intermediate value between a first value and a second value smaller than the first value to the first value, and is upwardly convex. The first straight line portion is connected to the end point of the first curved line portion and is constant at a first value. The second curved line portion is connected to the end point of the first curved line portion and is a curved line portion that decreases from the first value to an intermediate value and is convex upward. The third curved line portion is connected to the end point of the second curved line portion and is a curved line portion that decreases from the intermediate value to a second value and is convex downward. The second straight line portion is connected to the end point of the third curved line portion and is constant at a second value. The fourth curved line portion is connected to the end point of the second curved line portion and is a curved line portion that increases from the second value to an intermediate value and is convex downward. The first value is smaller than the duty command upper limit value and the second value is the same as the duty command lower limit value, or the first value is the same as the duty command upper limit value and the second value is greater than the duty command lower limit value.

[0009] The power conversion device of the present disclosure has the effect of being able to reduce switching loss while suppressing current distortion.

[0010] FIG. 1 is a circuit diagram of a system including a power conversion device according to a first embodiment. FIG. 2 is an explanatory diagram of the operation of the power conversion device according to the first embodiment. FIG. 3 is a waveform diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by a controller in the power conversion device according to the first embodiment. FIG. 4 is a waveform diagram of a U-phase reference modulated wave, a V-phase reference modulated wave, and a W-phase reference modulated wave generated by the controller during steady operation of the three-phase inverter circuit in the power conversion device according to the first embodiment. FIG. 5 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by a low-sticking two-phase modulation method. FIG. 6 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by the controller during steady operation of the three-phase inverter circuit in the power conversion device according to the first embodiment. FIG. 7 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by the controller during steady operation of the three-phase inverter circuit in the power conversion device according to the first embodiment. FIG. 8 is a waveform diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by the controller during a transient response of the three-phase inverter circuit in the power conversion device according to the first embodiment. FIG. 9 is a waveform diagram of a U-phase reference modulated wave, a V-phase reference modulated wave, and a W-phase reference modulated wave generated by the controller during a transient response of the three-phase inverter circuit in the power conversion device according to the first embodiment. FIG. 10 is a waveform diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by a low-sticking two-phase modulation method during a transient response of the three-phase inverter circuit. FIG. 11 is an explanatory diagram of the operation of a power conversion device according to a first comparative example. FIG. 12 is an explanatory diagram of the operation of a power conversion device according to a second comparative example. FIG. 13 is a diagram illustrating characteristics of the power conversion device according to the first embodiment. FIG. 14 is a diagram illustrating characteristics of the power conversion device according to the first comparative example. FIG. 15 is a diagram illustrating characteristics of the power conversion device according to the second comparative example. FIG. 16 is a circuit diagram of a system including the power conversion device according to the second embodiment. Fig. 17 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by a controller during steady operation of a three-phase inverter circuit in a power conversion device according to embodiment 2. Fig. 18 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by an upper-attached two-phase modulation method.Fig. 19 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by the controller during steady operation of the three-phase inverter circuit in the power conversion device according to embodiment 3. Fig. 20 is a waveform diagram of a U-phase reference modulated wave, a V-phase reference modulated wave, and a W-phase reference modulated wave generated by the controller during transient response of the three-phase inverter circuit in the power conversion device according to embodiment 3. Fig. 21 is a waveform diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by a lower-phase two-phase modulation method during transient response of the three-phase inverter circuit. Fig. 22 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by the controller during steady operation of the three-phase inverter circuit in the power conversion device according to embodiment 4. Fig. 23 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by a higher-phase two-phase modulation method.

[0011] First Embodiment A power conversion device 1 according to a first embodiment will be described below with reference to FIGS. 1 to 10. FIG.

[0012] (1) Overall Configuration of the Power Conversion Device FIG. 1 is a circuit diagram of a system including a power conversion device 1 according to the first embodiment. FIG. 2 is an explanatory diagram of the operation of the power conversion device 1 according to the first embodiment. As shown in FIG. 1 , the power conversion device 1 includes, for example, a three-phase inverter circuit 2 and a controller 3. The three-phase inverter circuit 2 includes a U-phase switching circuit 21, a V-phase switching circuit 22, and a W-phase switching circuit 23. The U-phase switching circuit 21 has a first switching element Q1 and a second switching element Q2 connected in series to each other and outputs a U-phase current Isa from a first output point 210. The V-phase switching circuit 22 has a third switching element Q3 and a fourth switching element Q4 connected in series to each other and outputs a V-phase current Isb from a second output point 220. The W-phase switching circuit 23 has a fifth switching element Q5 and a sixth switching element Q6 connected in series to each other and outputs a W-phase current Isc from a third output point 230. The controller 3 generates a U-phase modulated wave MU1 (see FIG. 2), a V-phase modulated wave MV1 (see FIG. 2), and a W-phase modulated wave MW1 (see FIG. 2) based on the detected value ia of the U-phase current Isa, the detected value ib of the V-phase current Isb, and the detected value ic of the W-phase current Isc, and generates a first PWM (Pulse Width Modulation) signal S1, a second PWM signal S2, a third PWM signal S3, a fourth PWM signal S4, a fifth PWM signal S5, and a sixth PWM signal S6 that control the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6, respectively.

[0013] 3 is a waveform diagram of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3 in the power conversion device 1 according to the first embodiment. Each of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 is a waveform that indicates a time change in the value of the duty command. As shown in FIG. 3 , the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3 during steady-state operation of the three-phase inverter circuit 2 each include a first curved portion CV1, a first linear portion SL1, a second curved portion CV2, a third curved portion CV3, a second linear portion SL2, and a fourth curved portion CV4. The first curved portion CV1 is a curved portion that increases from an intermediate value d3 between a first value d1 and a second value d2 smaller than the first value d1 to the first value d1, and is convex upward. The first straight line portion SL1 is connected to the end point of the first curved line portion CV1 and is constant at a first value d1. "The first straight line portion SL1 is connected to the end point of the first curved line portion CV1" means that the first curved line portion CV1 and the first straight line portion SL1 are smoothly connected in each of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1. Each of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 is differentiable at the end point of the first curved line portion CV1. "Constant at the first value d1" does not necessarily mean that the value at any point on the first curved line portion SL1 is strictly constant at the first value d1, but may be 95% to 105% of the first value d1. The second curved line portion CV2 is connected to the end point of the first straight line portion SL1 and is a curved line portion that decreases from the first value d1 to an intermediate value d3 and is convex upward. The third curved portion CV3 is a curved portion that connects to the end point of the second curved portion CV2 and decreases from an intermediate value d3 to a second value d2, forming a downward convex curve. The second straight line portion SL2 is connected to the end point of the third curved portion CV3 and is constant at the second value d2. "The second straight line portion SL2 connects to the end point of the third curved portion CV3" means that the third curved portion CV3 and the second straight line portion SL2 are smoothly connected in each of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1. Therefore, each of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 can be differentiated at the end point of the third curved portion CV3.The phrase "constant at the second value d2" does not necessarily mean that the value at any point on the second straight line segment SL2 is constant at the second value d2, but may mean that the value at any point on the second straight line segment SL2 is 95% to 105% of the second value d2. The fourth curved line segment CV4 is connected to the end point of the second straight line segment SL2 and increases from the second value d2 to the intermediate value d3, forming a downward convex curve. The phrase "the fourth curved line segment CV4 is connected to the end point of the second straight line segment SL2" means that the second straight line segment SL2 and the fourth curved line segment CV4 are smoothly connected. In this embodiment, the first value d1 is smaller than the duty command upper limit value dmax (1 in the example of FIG. 3 ), and the second value d2 is equal to the duty command lower limit value (−1 in the example of FIG. 3 ).

[0014] 1 , the power conversion device 1 further includes a first input terminal 11, a second input terminal 12, and a capacitor C1. In the power conversion device 1, for example, a DC power supply (not shown) is connected between the first input terminal 11 and the second input terminal 12, and an AC load 7 is connected to a first output point 210, a second output point 220, and a third output point 230. The DC power supply includes, for example, an AC-DC converter or a DC-DC converter. The AC load 7 is, for example, a three-phase servo motor. The power conversion device 1 converts DC output from the DC power supply into AC power and outputs it to the AC load 7. In the power conversion device 1, the AC power is three-phase AC power having a U phase, a V phase, and a W phase.

[0015] The capacitor C1 is connected between the first input terminal 11 and the second input terminal 12, and is connected in parallel to the U-phase switching circuit 21, the V-phase switching circuit 22, and the W-phase switching circuit 23. The capacitor C1 is, for example, an electrolytic capacitor.

[0016] (2) Details of the Power Conversion Device In the power conversion device 1, for example, a high-potential output terminal (positive electrode) of a DC power supply is connected to a first input terminal 11, and a low-potential output terminal (negative electrode) of the DC power supply is connected to a second input terminal 12. In addition, in the power conversion device 1, for example, a U-phase terminal, a V-phase terminal, and a W-phase terminal of the AC load 7 are connected to a first output point 210, a second output point 220, and a third output point 230 of the three-phase inverter circuit 2, respectively.

[0017] In the three-phase inverter circuit 2, each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 has a control terminal, a first main terminal, and a second main terminal. Each control terminal is connected to the controller 3.

[0018] In the U-phase switching circuit 21, a first main terminal of the first switching element Q1 is connected to the first input terminal 11, a second main terminal of the first switching element Q1 is connected to the first main terminal of the second switching element Q2, and a second main terminal of the second switching element Q2 is connected to the second input terminal 12. Therefore, in the U-phase switching circuit 21, the first switching element Q1 is a high-side switching element (P-side switching element), and the second switching element Q2 is a low-side switching element (N-side switching element). A first output point 210 of the U-phase switching circuit 21 is, for example, a connection point between the first switching element Q1 and the second switching element Q2. The first output point 210 is not limited to a connection point, and may be a node between the second main terminal of the first switching element Q1 and the first main terminal of the second switching element Q2.

[0019] In the V-phase switching circuit 22, a first main terminal of the third switching element Q3 is connected to the first input terminal 11, a second main terminal of the third switching element Q3 is connected to the first main terminal of the fourth switching element Q4, and a second main terminal of the fourth switching element Q4 is connected to the second input terminal 12. Therefore, in the V-phase switching circuit 22, the third switching element Q3 is a high-side switching element and the fourth switching element Q4 is a low-side switching element. A second output point 220 of the V-phase switching circuit 22 is, for example, a connection point between the third switching element Q3 and the fourth switching element Q4. The second output point 220 is not limited to a connection point, and may be a node between the second main terminal of the third switching element Q3 and the first main terminal of the fourth switching element Q4.

[0020] In the W-phase switching circuit 23, a first main terminal of the fifth switching element Q5 is connected to the first input terminal 11, a second main terminal of the fifth switching element Q5 is connected to the first main terminal of the sixth switching element Q6, and a second main terminal of the sixth switching element Q6 is connected to the second input terminal 12. Therefore, in the W-phase switching circuit 23, the fifth switching element Q5 is a high-side switching element and the sixth switching element Q6 is a low-side switching element. A third output point 230 of the W-phase switching circuit 23 is, for example, a connection point between the fifth switching element Q5 and the sixth switching element Q6. The third output point 230 is not limited to a connection point, and may also be a node between the second main terminal of the fifth switching element Q5 and the first main terminal of the sixth switching element Q6.

[0021] Each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 is, for example, a metal-oxide-semiconductor field effect transistor (MOSFET). Therefore, the control terminal, the first main terminal, and the second main terminal of each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 are a gate terminal, a drain terminal, and a source terminal, respectively.

[0022] The three-phase inverter circuit 2 further includes a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, and a sixth diode D6. The first diode D1 is connected in anti-parallel to the first switching element Q1. The second diode D2 is connected in anti-parallel to the second switching element Q2. The third diode D3 is connected in anti-parallel to the third switching element Q3. The fourth diode D4 is connected in anti-parallel to the fourth switching element Q4. The fifth diode D5 is connected in anti-parallel to the fifth switching element Q5. The sixth diode D6 is connected in anti-parallel to the sixth switching element Q6. The first to sixth diodes D1 to D6 are parasitic diodes of the MOSFETs that constitute the first to sixth switching elements Q1 to Q6, respectively, but are not limited to this and may be external diodes.

[0023] The controller 3 includes a reference modulated wave generating unit 4 , a modulated wave generating unit 5 , and a PWM signal generating unit 6 .

[0024] The reference modulated wave generator 4 generates a U-phase reference modulated wave MU0, a V-phase reference modulated wave MV0, and a W-phase reference modulated wave MW0 using a three-phase modulation system based on the detected value ia of the U-phase current Isa, the detected value ib of the V-phase current Isb, and the detected value ic of the W-phase current Isc. The modulated wave generator 5 generates a U-phase modulated wave MU1, a V-phase modulated wave MV1, and a W-phase modulated wave MW1 based on the U-phase reference modulated wave MU0, the V-phase reference modulated wave MV0, and the W-phase reference modulated wave MW0. The PWM signal generator 6 generates a first PWM signal S1 and a second PWM signal S2 based on the U-phase modulated wave MU1 and a triangular wave carrier signal CA1 (see FIG. 2). The triangular wave carrier signal CA1 is a triangular wave-shaped carrier signal. The PWM signal generator 6 generates a third PWM signal S3 and a fourth PWM signal S4 based on the V-phase modulating wave MV1 and the triangular wave carrier CA1 (see FIG. 2 ). The PWM signal generator 6 generates a fifth PWM signal S5 and a sixth PWM signal S6 based on the W-phase modulating wave MW1 and the triangular wave carrier CA1. The U-phase modulating wave MU1, the V-phase modulating wave MV1, and the W-phase modulating wave MW1 have the same cycle length. Furthermore, the U-phase modulating wave MU1, the V-phase modulating wave MV1, and the W-phase modulating wave MW1 have a longer cycle length than the triangular wave carrier CA1. In the example of FIG. 2 , the U-phase modulating wave MU1, the V-phase modulating wave MV1, and the W-phase modulating wave MW1 each have a frequency of 250 Hz, and the triangular wave carrier CA1 has a frequency of 10 kHz.

[0025] "U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 of three-phase modulation" means that, as shown in Figures 2 and 4, the U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 are sinusoidal waves with phases that differ from each other by 120 degrees. As described above, each of the U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 is a waveform that indicates a time change in the duty command value. Therefore, each value of the U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 is a duty command value.

[0026] 1 , the reference modulated wave generator 4 includes, for example, a first converter 41, a first subtractor 42, a second subtractor 43, a first proportional integral (PI) control unit 44, a second PI control unit 45, a second converter 46, and a divider 47. The first converter 41 acquires a detected value ia from a current sensor 8a that detects a U-phase current Isa. The first converter 41 also acquires a detected value ib from a current sensor 8b that detects a V-phase current Isb. The first converter 41 also acquires a detected value ic from a current sensor 8c that detects a W-phase current Isc. Note that the current sensors 8a, 8b, and 8c are not components of the power converter 1, but may be components of the power converter 1.

[0027] The first conversion unit 41 includes, for example, a three-phase to two-phase conversion unit and a dq conversion unit, and converts the detected phase current values ​​ia, ib, and ic of the three phases in an abc reference coordinate system, in which the U phase is the a phase, the V phase is the b phase, and the W phase is the c phase, into a d-axis current value id and a q-axis current value iq in a dq rotating coordinate system.

[0028] The first subtractor 42 calculates the reference value id of the d-axis current. ＊ The d-axis current reference value id is calculated by subtracting the d-axis current value id from the ＊ and the d-axis current value id (hereinafter also referred to as the d-axis current difference value).

[0029] The second subtractor 43 calculates the reference value iq of the q-axis current. ＊ The q-axis current reference value iq is calculated by subtracting the q-axis current value iq from ＊ and the q-axis current value iq (hereinafter also referred to as the q-axis current difference value).

[0030] The above-mentioned d-axis current reference value id ＊ and the reference value iq of the q-axis current ＊ is determined in the controller 3 by an external command from a higher-level controller of the controller 3. In other words, the controller 3 determines the reference value id of the d-axis current based on the external command from the higher-level controller. ＊ and the reference value iq of the q-axis current ＊ Alternatively, the reference value id of the d-axis current ＊ and the reference value iq of the q-axis current＊ are stored in advance in the controller 3 as a program.

[0031] The first PI control unit 44 calculates a reference value Vd of the d-axis voltage for performing feedback control to bring the difference value output from the first subtraction unit 42 closer to zero. ＊ As a result, the controller 3 controls the three-phase inverter circuit 2 so as to reduce the d-axis current difference value.

[0032] The second PI control unit 45 calculates a reference value Vq of the q-axis voltage for performing feedback control to bring the difference value output from the second subtraction unit 43 closer to zero. ＊ As a result, the controller 3 controls the three-phase inverter circuit 2 so as to reduce the q-axis current difference value.

[0033] The second conversion unit 46 includes, for example, an inverse dq conversion unit and a two-phase to three-phase conversion unit, and converts the reference value Vd of the d-axis voltage ＊ and the reference value Vq of the q-axis voltage ＊ , the target voltage Va of the U phase ＊ , V-phase target voltage Vb ＊ and the target voltage Vc of the W phase ＊ Convert to.

[0034] The division unit 47 calculates the target voltage Va ＊ , Vb ＊ , Vc ＊ Duty command values ​​(du0, dv0, dw0 described below) are calculated by dividing each by the input voltage Vin.

[0035] In this embodiment, the controller 3 sets the maximum value of the triangular wave carrier CA1 to 1 and the minimum value to -1. The controller 3 also sets the maximum value of each of the U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 to 1 and -1. The controller 3 sets the values ​​(duty command values) of the U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 at any given time to du0, dv0, and dw0, respectively. The controller 3 also sets the values ​​(duty command values) of the U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 at any given time to du, dv, and dw, respectively.

[0036] In the controller 3, when (du0×dv0×dw0)≦0, the modulated wave generating unit 5 performs the calculations of the following equations (1), (2), and (3).

[0037]

[0038]

[0039]

[0040] That is, when (du0 x dv0 x dw0) ≦ 0, the modulated wave generating unit 5 calculates equation (1) to determine du at any time for the U-phase modulated wave MU1. Similarly, when (du0 x dv0 x dw0) ≦ 0, the modulated wave generating unit 5 calculates equation (2) to determine dv at any time for the V-phase modulated wave MV1. Similarly, when (du0 x dv0 x dw0) ≦ 0, the modulated wave generating unit 5 calculates equation (3) to determine dw at any time for the W-phase modulated wave MW1.

[0041] Furthermore, the modulated wave generating unit 5 performs the calculations of the following equations (4), (5), and (6) when (du0×dv0×dw0)>0.

[0042]

[0043]

[0044]

[0045] The second row of Fig. 2 shows the amount of overlap with du0 when calculating du. The "amount of overlap with du0" is the component other than du0 on the right side of equation (1) when (du0 x dv0 x dw0) < 0, and is the component other than du0 on the right side of equation (4) when (du0 x dv0 x dw0) > 0.

[0046] The first PWM signal S1, the second PWM signal S2, the third PWM signal S3, the fourth PWM signal S4, the fifth PWM signal S5, and the sixth PWM signal S6 generated by the PWM signal generating unit 6 are PWM signals whose potential levels change between, for example, a first potential level (hereinafter also referred to as a low level) and a second potential level (hereinafter also referred to as a high level) that is higher than the first potential level. In the fifth row of Fig. 2, the low level of the first PWM signal S1 is represented as "0" and the high level is represented as "1". In the three-phase inverter circuit 2, the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 are turned on when the first PWM signal S1, the second PWM signal S2, the third PWM signal S3, the fourth PWM signal S4, the fifth PWM signal S5, and the sixth PWM signal are at high level, and turned off when they are at low level.

[0047] The duties of the first PWM signal S1 and the second PWM signal S2 generated by the PWM signal generation unit 6 vary based on the U-phase modulating wave MU1. As shown in the fourth and fifth rows of FIG. 2 , the PWM signal generation unit 6 generates the first PWM signal S1 by comparing the U-phase modulating wave MU1 with the triangular wave carrier CA1. More specifically, the PWM signal generation unit 6 compares the U-phase modulating wave MU1 with the triangular wave carrier CA1 to generate the first PWM signal S1, which is at a high level ("1") when the U-phase modulating wave MU1 is greater than the triangular wave carrier CA1 and is at a low level ("0") when the U-phase modulating wave MU1 is equal to or less than the triangular wave carrier CA1. The PWM signal generation unit 6 also inverts the first PWM signal S1 to generate the second PWM signal S2. In addition, the PWM signal generating unit 6 sets a dead time period between the high level period of the first PWM signal S1 and the high level period of the second PWM signal S2 so that the on period of the first switching element Q1 and the on period of the second switching element Q2 do not overlap.

[0048] The duties of the third PWM signal S3 and the fourth PWM signal S4 generated by the PWM signal generation unit 6 vary based on the V-phase modulating wave MV1. The PWM signal generation unit 6 generates the third PWM signal S3 by comparing the V-phase modulating wave MV1 with the triangular wave carrier CA1. The PWM signal generation unit 6 also inverts the third PWM signal S3 to generate the fourth PWM signal S4. The PWM signal generation unit 6 also sets a dead time between the high-level period of the third PWM signal S3 and the high-level period of the fourth PWM signal S4 so that the on-period of the third switching element Q3 and the on-period of the fourth switching element Q4 do not overlap.

[0049] The duties of the fifth PWM signal S5 and the sixth PWM signal S6 generated by the PWM signal generation unit 6 vary based on the W-phase modulating wave MW1. The PWM signal generation unit 6 generates the fifth PWM signal S5 by comparing the W-phase modulating wave MW1 with the triangular wave carrier CA1. The PWM signal generation unit 6 also inverts the fifth PWM signal S5 to generate the sixth PWM signal S6. The PWM signal generation unit 6 also sets a dead time period between the high-level period of the fifth PWM signal S5 and the high-level period of the sixth PWM signal S6 so that the on-period of the fifth switching element Q5 and the on-period of the sixth switching element Q6 do not overlap.

[0050] 4 is a waveform diagram of the U-phase reference modulated wave MU1, the V-phase reference modulated wave MV1, and the W-phase reference modulated wave MW1 generated by the controller 3 during steady operation of the three-phase inverter circuit 2 in the power conversion device 1 according to the first embodiment. In this embodiment, among the first period T1, the second period T2, the third period T3, the fourth period T4, the fifth period T5, and the sixth period T6 arranged in chronological order in FIG. 4 , the condition (du0×dv0×dw0)≦0 is satisfied at any point in time during each of the first period T1, the third period T3, and the fifth period T5. Furthermore, in this embodiment, the condition (du0×dv0×dw0)>0 is satisfied at any point in time during each of the second period T2, the fourth period T4, and the sixth period T6 in FIG.

[0051] Fig. 5 is an explanatory diagram of a U-phase modulated wave MU2, a V-phase modulated wave MV2, and a W-phase modulated wave MW2 obtained by the under-tight two-phase modulation method. Fig. 6 is an explanatory diagram of a U-phase modulated wave MU1, a V-phase modulated wave MV1, and a W-phase modulated wave MW1 generated by the controller 3 during steady operation of the three-phase inverter circuit 2 in the power conversion device 1 according to the first embodiment.

[0052] In this embodiment, the U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 have the same waveforms as the U-phase modulated wave MU2 (see FIG. 5), V-phase modulated wave MV2 (see FIG. 5), and W-phase modulated wave MW2 (see FIG. 5) of the underlay two-phase modulation method during the first period T1, third period T3, and fifth period T5 of FIG. 3. For example, focusing on the U-phase modulated wave MU1, the U-phase modulated wave MU1 (see FIG. 3) has the same waveform as the portion indicated by the dashed line in the U-phase modulated wave MU2 of the two-phase modulation method shown in FIG. 6 during the first period T1, third period T3, and fifth period T5. Similarly, the V-phase modulated wave MV1 (see FIG. 3) has the same waveform as the V-phase modulated wave MV2 of the two-phase modulation method shown in FIG. 6 during the first period T1, third period T3, and fifth period T5. Similarly, in the first period T1, the third period T3, and the fifth period T5, the W-phase modulated wave MW1 (see FIG. 3) has the same waveform as the V-phase modulated wave MV2 of the two-phase modulation method shown in FIG. 6. Furthermore, in the second period T2, the fourth period T4, and the sixth period T6 of FIG. 3, the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 of this embodiment have waveforms in which the same superposition amounts, indicated by the upward arrows in FIG. 6, have been added at the same time to the U-phase modulated wave MU2, the V-phase modulated wave MV2, and the W-phase modulated wave MW2 of the bottom-sticking two-phase modulation method shown in FIG. 6, respectively.

[0053] FIG. 7 is an explanatory diagram of the U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 generated by the controller 3 during steady operation of the three-phase inverter circuit 2 in the power conversion device 1 according to the first embodiment. FIG. 7 illustrates waveforms with the same superposition amount, indicated by upward arrows. Therefore, during the second period T2, the U-phase modulated wave MU1 forms a straight line that coincides with the envelope EL1 (the first straight line portion SL1 of the U-phase modulated wave MU1 shown in FIG. 3 ) passing through the maximum values ​​of the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2 of the under-sticking two-phase modulation system. During the fourth period T4, the V-phase modulated wave MV1 forms a straight line that coincides with the envelope EL1 (the first straight line portion SL1 of the V-phase modulated wave MV1 shown in FIG. 3 ). In addition, in the sixth period T6, the W-phase modulated wave MW1 becomes a straight line that coincides with the envelope EL1 (the first straight line portion SL1 of the V-phase modulated wave MV1 shown in FIG. 3).

[0054] As can be seen from the above description, during a period in which the condition (du0×dv0×dw0)≦0 is satisfied, the controller 3 generates the first PWM signal S1 to the sixth PWM signal S6 using du1, dv1, dw1 that are the same as the values ​​(duty command values) du2, dv2, dw2 of the U-phase modulated wave MU2, the V-phase modulated wave MV2, and the W-phase modulated wave MW2 obtained by the underlay two-phase modulation method, and during a period in which the condition (du0×dv0×dw0)>0 is satisfied, The first PWM signal S1 to the sixth PWM signal S6 are generated using values ​​du, dv, and dw obtained by adding the same values ​​to the values ​​du2, dv2, and dw2 of the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2, respectively, so that the maximum value among the values ​​du2, dv2, and dw2 of the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2 obtained by the underlay two-phase modulation method matches the value on the envelope EL1.

[0055] The controller 3 stops the switching of the U-phase switching circuit 21 for one-sixth of one cycle of the U-phase current Isa. "Stopping the switching of the U-phase switching circuit 21 for one-sixth of one cycle of the U-phase current Isa" means that for one-sixth of the cycle, the first PWM signal S1 is set to a low level and the second PWM signal S2 is set to a high level, thereby maintaining the first switching element Q1 in an off state.

[0056] Similarly, the controller 3 stops the switching of the V-phase switching circuit 22 for one-sixth of one cycle of the V-phase current Isb. "Stopping the switching of the V-phase switching circuit 22 for one-sixth of one cycle of the V-phase current Isb" means that for one-sixth of the cycle, the third PWM signal S3 is set to a low level and the fourth PWM signal S4 is set to a high level, thereby maintaining the third switching element Q3 in an off state.

[0057] Similarly, the controller 3 stops the switching of the W-phase switching circuit 23 for one-sixth of one cycle of the W-phase current Isc. "Stopping the switching of the W-phase switching circuit 23 for one-sixth of one cycle of the W-phase current Isc" means that for one-sixth of the cycle, the fifth PWM signal S5 is set to a low level and the sixth PWM signal S6 is set to a high level, thereby maintaining the fifth switching element Q5 in an off state.

[0058] 8 is a waveform diagram of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3 during a transient response of the three-phase inverter circuit 2 in the power conversion device 1 according to embodiment 1. Each of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3 during a transient response of the three-phase inverter circuit 2 has a waveform such as that shown in FIG.

[0059] 9 is a waveform diagram of the U-phase reference modulated wave MU0, the V-phase reference modulated wave MV0, and the W-phase reference modulated wave MW0 generated by the controller during the transient response of the three-phase inverter circuit 2 in the power conversion device according to embodiment 1. Each of the U-phase reference modulated wave MU0, the V-phase reference modulated wave MV0, and the W-phase reference modulated wave MW0 generated by the controller 3 during the transient response of the three-phase inverter circuit 2 has a waveform such as that shown in FIG.

[0060] 10 is a waveform diagram of a U-phase modulated wave MU2, a V-phase modulated wave MV2, and a W-phase modulated wave MW2 obtained by the under-tapping two-phase modulation method during the transient response of the three-phase inverter circuit 2. Each of the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2 obtained by the under-tapping two-phase modulation method during the transient response of the three-phase inverter circuit 2 has a waveform such as that shown in FIG.

[0061] The controller 3 includes a computer system. The computer system is primarily composed of a processor and memory as hardware. The processor executes a program stored in the memory of the computer system to realize the functions of the controller 3 in the present disclosure. The processor of the computer system is composed of one or more electronic circuits, including a semiconductor integrated circuit (IC) or a large-scale integrated circuit (LSI). The IC or LSI referred to here is referred to by different names depending on the degree of integration, and includes integrated circuits called system LSIs, very large scale integrations (VLSIs), or ultra large scale integrations (ULSIs). Furthermore, field-programmable gate arrays (FPGAs), which are programmed after the LSI is manufactured, or logic devices capable of reconfiguring the connections within the LSI or reconfiguring the circuit partitions within the LSI, can also be used as processors. Multiple electronic circuits may be integrated into a single chip or distributed across multiple chips. Multiple chips may be integrated into a single device or distributed across multiple devices. The computer system referred to here includes a microcontroller having one or more processors and one or more memories. Therefore, the microcontroller is also composed of one or more electronic circuits including a semiconductor integrated circuit or a large scale integrated circuit.

[0062] (3) Characteristics of the Power Conversion Device In the following description, the polarity of each of the U-phase current Isa, V-phase current Isb, and W-phase current Isc when flowing in the direction of the arrow in Figure 1 is defined as positive, and the polarity when flowing in the direction opposite to the arrow in Figure 1 is defined as negative.

[0063] In this embodiment, as shown in FIG. 2, the first PWM signal S1 is generated by comparing the U-phase modulating wave MU1 with the triangular wave carrier CA1.

[0064] Fig. 11 is a diagram illustrating the operation of the power conversion device according to Comparative Example 1. As shown in Fig. 11 , the power conversion device according to Comparative Example 1 generates a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave of a three-phase modulation system, and generates a first PWM signal by comparing the U-phase modulated wave with a triangular wave carrier signal.

[0065] Fig. 12 is a diagram illustrating the operation of a power conversion device according to Comparative Example 2. As shown in Fig. 12 , the power conversion device according to Comparative Example 2 generates a U-phase reference modulated wave, a V-phase reference modulated wave, and a W-phase reference modulated wave according to a three-phase modulation method, generates a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave according to an under-tight two-phase modulation method from the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave, and generates a first PWM signal by comparing the U-phase modulated wave with a triangular wave carrier signal.

[0066] Fig. 13 is a diagram illustrating the characteristics of the power conversion device 1 according to embodiment 1. The upper part of Fig. 13 shows the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 in the power conversion device 1 according to this embodiment, the middle part of Fig. 13 shows the waveforms of the phase currents (U-phase current Isa, V-phase current Isb, and W-phase current Isc), and the lower part of Fig. 13 shows the switching loss of the first switching element Q1.

[0067] Fig. 14 is a diagram illustrating the characteristics of the power conversion device according to Comparative Example 1. The upper part of Fig. 14 shows the U-phase modulated wave, the V-phase modulated wave, and the W-phase modulated wave in the power conversion device of Comparative Example 1, the middle part of Fig. 14 shows the waveforms of the phase currents (U-phase current, V-phase current, W-phase current), and the lower part of Fig. 14 shows the switching loss of the first switching element.

[0068] Fig. 15 is a diagram illustrating the characteristics of the power conversion device according to Comparative Example 2. The upper part of Fig. 15 shows the U-phase modulated wave, the V-phase modulated wave, and the W-phase modulated wave in the power conversion device of Comparative Example 2, the middle part of Fig. 15 shows the waveforms of the phase currents (U-phase current, V-phase current, W-phase current), and the lower part of Fig. 15 shows the switching loss of the first switching element.

[0069] 13 to 15, it can be seen that the power conversion device 1 according to the first embodiment and the power conversion device according to the second comparative example can reduce switching loss compared to the power conversion device according to the first comparative example.

[0070] Furthermore, the power conversion device 1 according to the first embodiment has a smoother change in the duty command value than the power conversion device according to the second comparative example, which reduces current distortion and torque ripple in the three-phase servo motor, thereby making it possible to reduce electromagnetic noise generated from the three-phase servo motor or the like.

[0071] (4) Advantages In the power conversion device 1 according to the first embodiment, the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3 during steady operation of the three-phase inverter circuit 2 each include a first curved portion CV1, a first straight line portion SL1, a second curved portion CV2, a third curved portion CV3, a second straight line portion SL2, and a fourth curved portion CV4. The first curved portion CV1 is a curved portion that increases from an intermediate value d3 between the first value d1 and a second value d2 smaller than the first value d1 to the first value d1, and is upwardly convex. The first straight line portion SL1 is connected to the end point of the first curved portion CV1 and remains constant at the first value d1. The second curved portion CV2 is a curved portion that is connected to the end point of the first straight line portion SL1 and decreases from the first value d1 to the intermediate value d3, and is upwardly convex. The third curved portion CV3 is connected to the end point of the second curved portion CV2 and is a curved portion that decreases from the intermediate value d3 to the second value d2, and is convex downward. The second straight line portion SL2 is connected to the end point of the third curved portion CV3 and is constant at the second value d2. The fourth curved portion CV4 is connected to the end point of the second straight line portion SL2 and is a curved portion that increases from the second value d2 to the intermediate value d3, and is convex downward. The first value d1 is smaller than the duty command upper limit value dmax, and the second value d2 is the same as the duty command lower limit value dmin.

[0072] The above configuration reduces switching loss while suppressing current distortion. More specifically, the above configuration generates smoother U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 than the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2 generated using a two-phase modulation scheme with under-locking. This reduces current distortion. Furthermore, the above configuration reduces switching loss in each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 compared to three-phase modulation. Furthermore, the above configuration improves the voltage utilization rate compared to three-phase modulation. Given that the voltage utilization rate in three-phase modulation is 1, the above configuration achieves a voltage utilization rate of 1.155 (= 2 / √3).

[0073] (Embodiment 2) A power conversion device 1A according to embodiment 2 will be described with reference to Fig. 16 and Fig. 17. Regarding the power conversion device 1A according to embodiment 2, components similar to those of the power conversion device 1 according to embodiment 1 (see Fig. 1) are denoted by the same reference numerals, and description thereof will be omitted.

[0074] (1) Configuration Fig. 16 is a circuit diagram of a system including a power conversion device 1A according to embodiment 2. Fig. 17 is an explanatory diagram of a U-phase modulated wave MU1, a V-phase modulated wave MV1, and a W-phase modulated wave MW1 generated by a controller 3A during steady-state operation of a three-phase inverter circuit 2 in a power conversion device 1A according to embodiment 2. As shown in Fig. 16, the power conversion device 1A differs from the power conversion device 1 in that it includes a controller 3A instead of the controller 3 of the power conversion device 1. The controller 3A has a modulated wave generating unit 5A instead of the modulated wave generating unit 5 of the controller 3.

[0075] During steady-state operation of the three-phase inverter circuit 2, the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3A each include, for example, a first curved portion CV1, a first straight line portion SL1, a second curved portion CV2, a third curved portion CV3, a second straight line portion SL2, and a fourth curved portion CV4, as shown in FIG. 17 . The first curved portion CV1 is a curved portion that increases from an intermediate value d3 between a first value d1 and a second value d2 smaller than the first value d1 to the first value d1, and is upwardly convex. The first straight line portion SL1 is connected to the end point of the first curved portion CV1 and remains constant at the first value d1. The phrase "maintaining constant at the first value d1" does not necessarily mean that the value at any point on the first straight line portion SL1 is strictly constant at the first value d1, but may also mean that the value at any point on the first straight line portion SL1 is 95% to 105% of the first value d1. The second curved segment CV2 is connected to the end point of the first straight line segment SL1 and is a curved segment that decreases from the first value d1 to the intermediate value d3, and is convex upward. The third curved segment CV3 is connected to the end point of the second curved segment CV2 and is a curved segment that decreases from the intermediate value d3 to the second value d2, and is convex downward. The second straight line segment SL2 is connected to the end point of the third curved segment CV3 and is constant at the second value d2. "Constant at the second value d2" does not necessarily mean that the value at any point on the second straight line segment SL2 is constant at the second value d2, but may be 95% to 105% of the second value d2. The fourth curved segment CV4 is connected to the end point of the second straight line segment SL2 and is a curved segment that increases from the second value d2 to the intermediate value d3, and is convex downward. In this embodiment, the first value d1 is equal to the duty command upper limit value dmax (1 in the example of FIG. 17), and the second value d2 is greater than the duty command lower limit value (−1 in the example of FIG. 17).

[0076] In this embodiment, similar to the controller 3 of the first embodiment, the controller 3A sets the maximum value of the triangular wave carrier CA1 to 1 and the minimum value to -1. The controller 3A also sets the maximum value of each of the U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 to 1 and the minimum value to -1. The controller 3A sets the values ​​(duty command values) of the U-phase reference modulated wave MU0, V-phase reference modulated wave MV0, and W-phase reference modulated wave MW0 at any given time to du0, dv0, and dw0, respectively. The controller 3A also sets the values ​​(duty command values) of the U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 at any given time to du, dv, and dw, respectively.

[0077] In the controller 3A, when (du0×dv0×dw0)>0, the modulated wave generating unit 5A performs the calculations of the following equations (7), (8), and (9).

[0078]

[0079]

[0080]

[0081] Furthermore, when (du0×dv0×dw0)<0, the modulated wave generating unit 5A performs the calculations of the following equations (10), (11), and (12).

[0082]

[0083]

[0084]

[0085] Incidentally, in this embodiment, as in the first embodiment, among the first period T1, the second period T2, the third period T3, the fourth period T4, the fifth period T5, and the sixth period T6 arranged in chronological order in Fig. 4, at any point in time in each of the first period T1, the third period T3, and the fifth period T5, the condition (du0 x dv0 x dw0) < 0 is satisfied except when any of du0, dv0, and dw0 is 0. Furthermore, in this embodiment, at any point in time in each of the second period T2, the fourth period T4, and the sixth period T6 in Fig. 4, the condition (du0 x dv0 x dw0) > 0 is satisfied except when any of du0, dv0, and dw0 is 0.

[0086] 18 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by the upper-attaching two-phase modulation method. The upper-attaching two-phase modulation method is an upper-attaching type two-phase modulation method.

[0087] In this embodiment, the U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 have the same waveforms as the U-phase modulated wave MU3 (see FIG. 18), V-phase modulated wave MV3 (see FIG. 18), and W-phase modulated wave MW3 (see FIG. 18) of the upper-attaching two-phase modulation method during the second period T2, fourth period T4, and sixth period T6 of FIG. 17. That is, the U-phase modulated wave MU1 (see FIG. 17) has the same waveform as the U-phase modulated wave MU3 of the two-phase modulation method shown in FIG. 18 during the second period T2, fourth period T4, and sixth period T6. Similarly, the V-phase modulated wave MV1 (see FIG. 17) has the same waveform as the V-phase modulated wave MV3 of the two-phase modulation method shown in FIG. 18 during the second period T2, fourth period T4, and sixth period T6. Similarly, in the second period T2, fourth period T4, and sixth period T6, the W-phase modulated wave MW1 (see FIG. 17) has the same waveform as the V-phase modulated wave MV3 of the two-phase modulation method shown in FIG. 18. Furthermore, in the first period T1, third period T3, and fifth period T5, the W-phase modulated wave MW1 has a waveform in which the same amount of superposition is added at the same time to the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3 of the upper-attaching two-phase modulation method shown in FIG. 18. Therefore, in the first period T1, the V-phase modulated wave MV1 forms a straight line (first straight line portion SL1 of the V-phase modulated wave MV1 shown in FIG. 17) that coincides with the envelopes passing through the minimum points of the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3 of the upper-attaching two-phase modulation method. In the third period T3, the V-phase modulated wave MV1 becomes a straight line that coincides with the envelope (the first straight line portion SL1 of the W-phase modulated wave MW1 shown in FIG. 17 ). In the fifth period T5, the U-phase modulated wave MU1 becomes a straight line that coincides with the envelope (the first straight line portion SL1 of the U-phase modulated wave MU1 shown in FIG. 17 ).

[0088] As can be seen from the above description, during a period in which the condition (du0×dv0×dw0)>0 is satisfied, the controller 3A generates the first PWM signal S1 to the sixth PWM signal S6 using the same values ​​of du, dv, and dw as the values ​​(duty command values) du3, dv3, and dw3 of the U-phase modulated wave MU3, the V-phase modulated wave MV3, and the W-phase modulated wave MW3 obtained by the upper-clamped two-phase modulation method, and during a period in which the condition (du0×dv0×dw0)<0 is satisfied, The first PWM signal S1 to the sixth PWM signal S6 are generated using values ​​du, dv, and dw obtained by adding the same values ​​to the values ​​du3, dv3, and dw3 of the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3, respectively, so that the smallest value among the values ​​du3, dv3, and dw3 of the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3 obtained by the two-phase modulation method with upper overlapping matches the value on the envelope.

[0089] (2) Operation The operation of the power conversion device 1A according to the second embodiment is similar to the operation of the power conversion device 1 according to the first embodiment, and therefore a description thereof will be omitted.

[0090] (3) Advantages In the power conversion device 1A according to the second embodiment, the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3A during steady operation of the three-phase inverter circuit 2 each include a first curved portion CV1, a first straight line portion SL1, a second curved portion CV2, a third curved portion CV3, a second straight line portion SL2, and a fourth curved portion CV4. The first curved portion CV1 is a curved portion that increases from an intermediate value d3 between the first value d1 and a second value d2 smaller than the first value d1 to the first value d1, and is upwardly convex. The first straight line portion SL1 is connected to the end point of the first curved portion CV1 and remains constant at the first value d1. The second curved portion CV2 is a curved portion that is connected to the end point of the first straight line portion SL1 and decreases from the first value d1 to the intermediate value d3, and is upwardly convex. The third curved portion CV3 is connected to the end point of the second curved portion CV2 and is a curved portion that decreases from the intermediate value d3 to the second value d2, and is convex downward. The second straight line portion SL2 is connected to the end point of the third curved portion CV3 and is constant at the second value d2. The fourth curved portion CV4 is connected to the end point of the second straight line portion SL2 and is a curved portion that increases from the second value d2 to the intermediate value d3, and is convex downward. The first value d1 is equal to the duty command upper limit value dmax, and the second value d2 is greater than the duty command lower limit value dmin.

[0091] The above configuration reduces switching loss while suppressing current distortion. More specifically, the above configuration smooths the U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 compared to the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3 generated using upper-attaching two-phase modulation, thereby reducing current distortion. Furthermore, the above configuration reduces switching loss in each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 compared to three-phase modulation. Furthermore, the above configuration improves the voltage utilization rate compared to three-phase modulation. If the voltage utilization rate in three-phase modulation is 1, the above configuration achieves a voltage utilization rate of 1.155 (= 2 / √3).

[0092] Third Embodiment A power conversion device 1 according to a third embodiment will be described with reference to FIG. 1 and FIGS. 19 to 21. FIG.

[0093] (1) Configuration Figure 19 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by a controller during steady operation of a three-phase inverter circuit in a power conversion device according to embodiment 3. The circuit configuration of the power conversion device 1 according to embodiment 3 is the same as that of the power conversion device 1 according to embodiment 1 (see Figure 1), and therefore description thereof will be omitted. In this embodiment, the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by the controller 3 during steady operation of the three-phase inverter circuit 2 each include a first curved portion CV1, a first linear portion SL1, a second curved portion CV2, a third curved portion CV3, a second linear portion SL2, and a fourth curved portion CV4, as shown in Figure 19, for example. The first curved portion CV1 is a curved portion that increases from an intermediate value d3 between a first value d1 and a second value d2 smaller than the first value d1 to the first value d1, and is convex upward. The first straight line segment SL1 is connected to the end point of the first curved line segment CV1 and is constant at a first value d1. "Constant at the first value d1" does not necessarily mean that the value at any point on the first straight line segment SL1 is constant at the first value d1, but may mean that the value at any point on the first straight line segment SL1 is between 95% and 105% of the first value d1. The second curved line segment CV2 is connected to the end point of the first straight line segment SL1 and is a curved line segment that decreases from the first value d1 to an intermediate value d3 and is convex upward. The third curved line segment CV3 is connected to the end point of the second curved line segment CV2 and is a curved line segment that decreases from the intermediate value d3 to a second value d2 and is convex downward. The second straight line segment SL2 is connected to the end point of the third curved line segment CV3 and is constant at a second value d2. The phrase "constant at the second value d2" does not necessarily mean that the value is strictly constant at the second value d2, but may mean that the value at any point on the second straight line segment SL2 is between 95% and 105% of the second value d2. The fourth curved line segment CV4 is connected to the end point of the second straight line segment SL2 and increases from the second value d2 to an intermediate value d3, forming a downward convex curve. In this embodiment, the first value d1 is smaller than the duty command upper limit value dmax (1 in the example of FIG. 19 ), and the second value d2 is equal to the duty command lower limit value (0 in the example of FIG. 19 ).

[0094] 20 is a waveform diagram of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave generated by the controller during a transient response of the three-phase inverter circuit in the power conversion device according to the third embodiment. In this embodiment, the controller 3 sets the maximum value of the triangular wave carrier CA1 (see FIG. 2) described in the first embodiment to 1 and the minimum value to 0. Furthermore, as shown in FIG. 20, the controller 3A sets the maximum value of the U-phase reference modulated wave MU0, the V-phase reference modulated wave MV0, and the W-phase reference modulated wave MW0 to 1 and the minimum value to 0, respectively. The controller 3 sets the values ​​(duty command values) of the U-phase reference modulated wave MU0, the V-phase reference modulated wave MV0, and the W-phase reference modulated wave MW0 at any given time to du0, dv0, and dw0, respectively. The controller 3 also sets the values ​​(duty command values) of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 at any given time to du, dv, and dw, respectively.

[0095] In the controller 3, when {(du0-0.5)×(dv0-0.5)×(dw0-0.5)}≦0, the modulated wave generating unit 5 performs the calculations of the following equations (13), (14), and (15).

[0096]

[0097]

[0098]

[0099] When {(du0-0.5)×(dv0-0.5)×(dw0-0.5)}>0, the modulated wave generating unit 5 performs the calculations of the following equations (16), (17), and (18).

[0100]

[0101]

[0102]

[0103] FIG. 21 is a waveform diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by the under-tight two-phase modulation method during the transient response of a three-phase inverter circuit.

[0104] In this embodiment, the U-phase modulated wave MU1 has the same waveform as the U-phase modulated wave MU2 (see FIG. 21) of the lower-sticking two-phase modulation method in the first period T1, third period T3, and fifth period T5 of Fig. 19. Similarly, the V-phase modulated wave MV1 has the same waveform as the V-phase modulated wave MV2 (see FIG. 21) of the lower-sticking two-phase modulation method in the first period T1, third period T3, and fifth period T5 of Fig. 19. Similarly, the W-phase modulated wave MW1 has the same waveform as the V-phase modulated wave MV2 (see FIG. 21) of the lower-sticking two-phase modulation method in the first period T1, third period T3, and fifth period T5 of Fig. 19. Furthermore, in the second period T2, the fourth period T4, and the sixth period T6, the U-phase modulated wave MU1 has a waveform in which the same amount of superposition is added at the same time to each of the U-phase modulated wave MU2, the V-phase modulated wave MV2, and the W-phase modulated wave MW2 of the under-attachment type two-phase modulation method shown in Figure 21.

[0105] As can be seen from the above explanation, during the period when the condition {(du0-0.5) x (dv0-0.5) x (dw0-0.5)} ≦ 0 is satisfied, the controller 3 generates the first PWM signal S1 to the sixth PWM signal S6 using du1, dv1, dw1 having the same values ​​as the values ​​(duty command values) du2, dv2, dw2 of the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2 obtained by the underlay two-phase modulation method. Furthermore, during the period when the condition {(du0-0.5) x (dv0-0.5) x (dw0-0.5)} > 0 is satisfied, the controller 3 generates the first PWM signal S1 to the sixth PWM signal S6 using the values ​​du, dv, and dw obtained by adding the same values ​​to the values ​​du2, dv2, and dw2 of the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2, respectively, obtained by the underlay two-phase modulation method.

[0106] (2) Advantages As with the power conversion device 1 according to embodiment 1, the power conversion device 1 according to embodiment 3 generates smoother U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 compared to the U-phase modulated wave MU2, V-phase modulated wave MV2, and W-phase modulated wave MW2 generated by the under-sticking two-phase modulation method, thereby making it possible to reduce current distortion.

[0107] Fourth Embodiment A power conversion device 1A according to a fourth embodiment will be described with reference to FIGS. 16, 22, and 23. FIG.

[0108] (1) Configuration Figure 22 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave generated by a controller during steady operation of a three-phase inverter circuit in a power conversion device according to embodiment 4. The circuit configuration of a power conversion device 1A according to embodiment 4 is the same as that of the power conversion device 1A according to embodiment 2 (see Figure 16), and therefore description thereof will be omitted. In this embodiment, the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 generated by a controller 3A during steady operation of a three-phase inverter circuit 2 each include a first curved portion CV1, a first linear portion SL1, a second curved portion CV2, a third curved portion CV3, a second linear portion SL2, and a fourth curved portion CV4, as shown in Figure 22, for example. The first curved portion CV1 is a curved portion that increases from an intermediate value d3 between a first value d1 and a second value d2 smaller than the first value d1 to the first value d1, and is convex upward. The first straight line segment SL1 is connected to the end point of the first curved line segment CV1 and is constant at a first value d1. "Constant at the first value d1" does not necessarily mean that the value at any point on the first straight line segment SL1 is constant at the first value d1, but may mean that the value at any point on the first straight line segment SL1 is between 95% and 105% of the first value d1. The second curved line segment CV2 is connected to the end point of the first straight line segment SL1 and is a curved line segment that decreases from the first value d1 to an intermediate value d3 and is convex upward. The third curved line segment CV3 is connected to the end point of the second curved line segment CV2 and is a curved line segment that decreases from the intermediate value d3 to a second value d2 and is convex downward. The second straight line segment SL2 is connected to the end point of the third curved line segment CV3 and is constant at a second value d2. The phrase "constant at the second value d2" does not necessarily mean that the value is strictly constant at the second value d2, but may mean that the value at any point on the second straight line segment SL2 is between 95% and 105% of the second value d2. The fourth curved line segment CV4 is connected to the end point of the second straight line segment SL2 and increases from the second value d2 to an intermediate value d3, forming a downward convex curve. In this embodiment, the first value d1 is equal to the duty command upper limit value dmax (1 in the example of FIG. 22 ), and the second value d2 is greater than the duty command lower limit value (0 in the example of FIG. 22 ).

[0109] In the present embodiment, the controller 3A sets the maximum value of the triangular wave carrier CA1 (see FIG. 2 ) described in the second embodiment to 1 and the minimum value to 0. Similarly to the third embodiment, the controller 3A sets the maximum value of each of the U-phase reference modulated wave MU0, the V-phase reference modulated wave MV0, and the W-phase reference modulated wave MW0 to 1 and the minimum value to 0, as shown in FIG. 20 . The controller 3A sets the values ​​(duty command values) of the U-phase reference modulated wave MU0, the V-phase reference modulated wave MV0, and the W-phase reference modulated wave MW0 at any given time to du0, dv0, and dw0, respectively. The controller 3A also sets the values ​​(duty command values) of the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 at any given time to du, dv, and dw, respectively.

[0110] In the controller 3A, when {(du0-0.5)×(dv0-0.5)×(dw0-0.5)}≧0, the modulated wave generating unit 5A performs the calculations of the following equations (19), (20), and (21).

[0111]

[0112]

[0113]

[0114] If {(du0-0.5)×(dv0-0.5)×(dw0-0.5)}<0, the modulated wave generating unit 5A performs the calculations of the following equations (22), (23), and (24).

[0115]

[0116]

[0117]

[0118] FIG. 23 is an explanatory diagram of a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave obtained by the upper-attached two-phase modulation method.

[0119] In this embodiment, the U-phase modulated wave MU1 has the same waveform as the U-phase modulated wave MU2 (see FIG. 23) of the upper-sticking two-phase modulation method in the first period T1, third period T3, and fifth period T5 of Fig. 22. The V-phase modulated wave MV1 has the same waveform as the V-phase modulated wave MV3 (see FIG. 23) of the upper-sticking two-phase modulation method in the first period T1, third period T3, and fifth period T5 of Fig. 22. The W-phase modulated wave MW1 has the same waveform as the V-phase modulated wave MV3 (see FIG. 21) of the upper-sticking two-phase modulation method in the first period T1, third period T3, and fifth period T5 of Fig. 22. Furthermore, during the second period T2, fourth period T4, and sixth period T6, the U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 have waveforms in which the same amount of superposition is added at the same time to the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3 of the top-attaching two-phase modulation method shown in Figure 23.

[0120] As can be seen from the above explanation, during the period when the condition {(du0-0.5) x (dv0-0.5) x (dw0-0.5)} ≧ 0 is satisfied, the controller 3A generates the first PWM signal S1 to the sixth PWM signal S6 using the same values ​​of du, dv, and dw as the values ​​(duty command values) du3, dv3, and dw3 of the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3 obtained by the two-phase modulation method with upper binding. Furthermore, during the period when the condition {(du0-0.5) x (dv0-0.5) x (dw0-0.5)} < 0 is satisfied, the controller 3A generates the first PWM signal S1 to the sixth PWM signal S6 using the values ​​du, dv, and dw obtained by adding the same values ​​to the values ​​du3, dv3, and dw3 of the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3, respectively, obtained by the two-phase modulation method with upper clogging.

[0121] (2) Advantages As with the power conversion device 1A according to embodiment 2, the power conversion device 1A according to embodiment 4 has smoother U-phase modulated wave MU1, V-phase modulated wave MV1, and W-phase modulated wave MW1 compared to the U-phase modulated wave MU3, V-phase modulated wave MV3, and W-phase modulated wave MW3 generated by the top-attaching two-phase modulation method, making it possible to reduce current distortion.

[0122] (Modifications) The above-described first to fourth embodiments are merely examples of various embodiments of the present disclosure. The above-described first to fourth embodiments can be modified in various ways depending on the design, etc., as long as the object of the present disclosure can be achieved.

[0123] For example, in the power conversion device 1, 1A, when the maximum values ​​of the U-phase current Isa, the V-phase current Isb, and the W-phase current Isc are each smaller than a threshold, the PWM signal generator 6 may be configured to generate the first PWM signal S1 and the second PWM signal S2 based on the U-phase reference modulated wave MU0 and the triangular wave carrier CA1, generate the third PWM signal S3 and the fourth PWM signal S4 based on the V-phase reference modulated wave MV0 and the triangular wave carrier CA1, and generate the fifth PWM signal S5 and the sixth PWM signal S6 based on the W-phase reference modulated wave MW0 and the triangular wave carrier CA1. This allows for further reduction in current distortion when the maximum values ​​of the U-phase current Isa, the V-phase current Isb, and the W-phase current Isc are each smaller than a threshold. Therefore, when switching loss is relatively small even when three-phase modulation is employed, current distortion can be further reduced.

[0124] Furthermore, in the power conversion devices 1, 1A, the controllers 3, 3A are not limited to a configuration that generates the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 based on the detected value ia of the U-phase current Isa, the detected value ib of the V-phase current Isb, and the detected value ic of the W-phase current Isc. The controller 3 may be configured to generate the U-phase modulated wave MU1, the V-phase modulated wave MV1, and the W-phase modulated wave MW1 based on, for example, two detected values ​​of the U-phase current Isa, the V-phase current Isb, and the W-phase current Isc (for example, the detected value ia of the U-phase current Isa and the detected value ib of the V-phase current Isb).

[0125] Furthermore, in the power conversion devices 1 and 1A, the first diode D1 to the sixth diode D6 are parasitic diodes of the first switching element Q1 to the sixth switching element Q6, respectively, but are not limited to parasitic diodes and may be externally attached diodes.

[0126] Furthermore, each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 is not limited to a MOSFET, and may be, for example, an insulated gate bipolar transistor (IGBT). In this case, the control terminal, the first main terminal, and the second main terminal of each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 are a gate terminal, a collector terminal, and an emitter terminal, respectively.

[0127] Each of the first switching element Q1, the second switching element Q2, the third switching element Q3, the fourth switching element Q4, the fifth switching element Q5, and the sixth switching element Q6 may be a bipolar transistor or a GaN-based GIT (Gate Injection Transistor).

[0128] (Aspects) The following aspects are disclosed in this specification.

[0129] A power conversion device (1; 1A) according to a first aspect includes a three-phase inverter circuit (2) and a controller (3; 3A). The three-phase inverter circuit (2) includes a U-phase switching circuit (21), a V-phase switching circuit (22), and a W-phase switching circuit (23). The U-phase switching circuit (21) has a first switching element (Q1) and a second switching element (Q2) connected in series to each other and outputs a U-phase current (Isa) from a first output point (210). The V-phase switching circuit (22) has a third switching element (Q3) and a fourth switching element (Q4) connected in series to each other and outputs a V-phase current (Isb) from a second output point (220). The W-phase switching circuit (23) has a fifth switching element (Q5) and a sixth switching element (Q6) connected in series to each other and outputs a W-phase current (Isc) from a third output point (230). The controller (3; 3A) generates a U-phase modulated wave (MU1), a V-phase modulated wave (MV1), and a W-phase modulated wave (MW1) based on detected values ​​of at least two of the U-phase current (Isa), the V-phase current (Isb), and the W-phase current (Isc), and generates a first PWM signal (S1), a second PWM signal (S2), a third PWM signal (S3), a fourth PWM signal (S4), a fifth PWM signal (S5), and a sixth PWM signal (S6) that control the first switching element (Q1), the second switching element (Q2), the third switching element (Q3), the fourth switching element (Q4), the fifth switching element (Q5), and the sixth switching element (Q6), respectively. Each of the U-phase modulated wave (MU1), the V-phase modulated wave (MV1), and the W-phase modulated wave (MW1) is a waveform that indicates a time change in the value of a duty command. Each of the U-phase modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) generated in the controller (3; 3A) during steady operation of the three-phase inverter circuit (2) includes a first curved portion (CV1), a first straight line portion (SL1), a second curved portion (CV2), a third curved portion (CV3), a second straight line portion (SL2), and a fourth curved portion (CV4). The first curved portion (CV1) is a curved portion that increases from an intermediate value (d3) between a first value (d1) and a second value (d2) smaller than the first value (d1) to the first value (d1), and is upwardly convex.The first straight line portion (SL1) is connected to the end point of the first curved line portion (CV1) and is constant at a first value (d1). The second curved line portion (CV2) is connected to the end point of the first straight line portion (SL1) and is a curved line portion that decreases from the first value (d1) to an intermediate value (d3) and is convex upward. The third curved line portion (CV3) is connected to the end point of the second curved line portion (CV2) and is a curved line portion that decreases from the intermediate value (d3) to a second value (d2) and is convex downward. The second straight line portion (SL2) is connected to the end point of the third curved line portion (CV3) and is constant at a second value (d2). The fourth curved line portion (CV4) is connected to the end point of the second straight line portion (SL2) and is a curved line portion that increases from the second value (d2) to the intermediate value (d3) and is convex downward. The first value (d1) is smaller than the duty command upper limit value (dmax) and the second value (d2) is the same as the duty command lower limit value (dmin), or the first value (d1) is the same as the duty command upper limit value (dmax) and the second value (d2) is greater than the duty command lower limit value (dmin).

[0130] According to this aspect, it is possible to reduce switching loss while suppressing current distortion.

[0131] In the power conversion device (1; 1A) according to the second aspect, in the first aspect, the controller (3; 3A) stops switching of the U-phase switching circuit (21) for one-sixth of one cycle of the U-phase current (Isa), stops switching of the V-phase switching circuit (22) for one-sixth of one cycle of the V-phase current (Isb), and stops switching of the W-phase switching circuit (23) for one-sixth of one cycle of the W-phase current (Isc).

[0132] A power conversion device (1; 1A) according to a third aspect is the power conversion device of the first or second aspect, wherein the controller (3; 3A) has a reference modulated wave generating unit (4), a modulated wave generating unit (5; 5A), and a PWM signal generating unit (6). The reference modulated wave generating unit (4) generates a U-phase reference modulated wave (MU0), a V-phase reference modulated wave (MV0), and a W-phase reference modulated wave (MW0) of a three-phase modulation system based on a detected value (ia) of a U-phase current (Isa), a detected value (ib) of a V-phase current (Isb), and a detected value (ic) of a W-phase current (Isc). The modulated wave generating unit (5; 5A) generates a U-phase modulated wave (MU1), a V-phase reference modulated wave (MV1), and a W-phase reference modulated wave (MW1) based on the U-phase reference modulated wave (MU0), the V-phase reference modulated wave (MV0), and the W-phase reference modulated wave (MW0). The PWM signal generating unit (6) generates a first PWM signal (S1) and a second PWM signal (S2) based on the U-phase modulating wave (MU1) and the triangular wave carrier (CA1). The PWM signal generating unit (6) generates a third PWM signal (S3) and a fourth PWM signal (S4) based on the V-phase modulating wave (MV1) and the triangular wave carrier (CA1). The PWM signal generating unit (6) generates a fifth PWM signal (S5) and a sixth PWM signal (S6) based on the W-phase modulating wave (MW1) and the triangular wave carrier (CA1).

[0133] In the power conversion device (1) according to the fourth aspect, in the third aspect, the U-phase reference modulated wave (MU0), the V-phase reference modulated wave (MV0), and the W-phase reference modulated wave (MW0) are sinusoidal waves whose phases differ from each other by 120 degrees. In the controller (3), when the maximum value of the triangular wave carrier (CA1) is 1 and the minimum value is -1, the maximum value of each of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) is 1 and the minimum value is -1, the values ​​of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) at any time are du0, dv0, and dw0, and the values ​​of the U-phase reference modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) at any time are du, dv, and dw, the modulated wave generating unit (5) performs calculations using the following three calculation formulas when (du0 × dv0 × dw0)≦0.

[0134]

[0135]

[0136]

[0137] When (du0×dv0×dw0)>0, the modulated wave generating unit (5) performs the calculations of the following three calculation formulas.

[0138]

[0139]

[0140]

[0141] According to this aspect, the U-phase modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) are smoother than the U-phase modulated wave (MU2), V-phase modulated wave (MV2), and W-phase modulated wave (MW2) generated by the under-attached two-phase modulation method, thereby making it possible to reduce current distortion.

[0142] In the power conversion device (1A) according to the fifth aspect, in the third aspect, the U-phase reference modulated wave (MU0), the V-phase reference modulated wave (MV0), and the W-phase reference modulated wave (MW0) are sinusoidal waves whose phases differ from each other by 120 degrees. In the controller (3A), when the maximum value of the triangular wave carrier (CA1) is 1 and the minimum value is -1, the maximum value of each of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) is 1 and the minimum value is -1, the values ​​of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) at any time are du0, dv0, and dw0, and the values ​​of the U-phase modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) at any time are du, dv, and dw, the modulated wave generating unit (5A) performs calculations using each of the following three calculation formulas when (du0 × dv0 × dw0)≧0.

[0143]

[0144]

[0145]

[0146] When (du0×dv0×dw0)<0, the modulated wave generating unit (5A) performs the calculations of the following three calculation formulas.

[0147]

[0148]

[0149]

[0150] According to this aspect, the U-phase modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) are smoother than the U-phase modulated wave (MU3), V-phase modulated wave (MV3), and W-phase modulated wave (MW3) generated by the top-attaching two-phase modulation method, thereby making it possible to reduce current distortion.

[0151] In the power conversion device (1) according to the sixth aspect, in the third aspect, the U-phase reference modulated wave (MU0), the V-phase reference modulated wave (MV0), and the W-phase reference modulated wave (MW0) are sinusoidal waves whose phases differ from each other by 120 degrees. In the controller (3), when the maximum value of the triangular wave carrier (CA1) is 1 and the minimum value is 0, the maximum value of each of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) is 1 and the minimum value is 0, the values ​​of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) at any time are du0, dv0, and dw0, and the values ​​of the U-phase reference modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) at any time are du, dv, and dw, the modulated wave generating unit (5) performs calculations using the following three calculation formulas when {(du0-0.5)×(dv0-0.5)×(dw0-0.5)}≦0.

[0152]

[0153]

[0154]

[0155] If {(du0-0.5) x (dv0-0.5) x (dw0-0.5)}>0, the modulated wave generating unit (5) performs the calculations of the following three calculation formulas.

[0156]

[0157]

[0158]

[0159] According to this aspect, the U-phase modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) are smoother than the U-phase modulated wave (MU2), V-phase modulated wave (MV2), and W-phase modulated wave (MW2) generated by the under-attached two-phase modulation method, thereby making it possible to reduce current distortion.

[0160] In the power conversion device (1A) according to the seventh aspect, in the third aspect, the U-phase reference modulated wave (MU0), the V-phase reference modulated wave (MV0), and the W-phase reference modulated wave (MW0) are sinusoidal waves whose phases differ by 120 degrees from each other. In the controller (3A), when the maximum value of the triangular wave carrier (CA1) is set to 1 and the minimum value is set to 0, the maximum value of each of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) is set to 1 and the minimum value is set to 0, the values ​​of the U-phase reference modulated wave (MU0), V-phase reference modulated wave (MV0), and W-phase reference modulated wave (MW0) at any time are set to du0, dv0, and dw0, and the values ​​of the U-phase modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) at any time are set to du, dv, and dw, the modulated wave generating unit (5A) performs calculations using each of the following three calculation formulas when {(du0-0.5)×(dv0-0.5)×(dw0-0.5)}≧0.

[0161]

[0162]

[0163]

[0164] If {(du0-0.5) x (dv0-0.5) x (dw0-0.5)}<0, the modulated wave generating unit (5A) performs the calculations of the following three calculation formulas.

[0165]

[0166]

[0167]

[0168] According to this aspect, the U-phase modulated wave (MU1), V-phase modulated wave (MV1), and W-phase modulated wave (MW1) are smoother than the U-phase modulated wave (MU3), V-phase modulated wave (MV3), and W-phase modulated wave (MW3) generated by the top-attaching two-phase modulation method, thereby making it possible to reduce current distortion.

[0169] In the power conversion device (1; 1A) according to the eighth aspect, in the third aspect, when the maximum values ​​of the U-phase current (Isa), the V-phase current (Isb), and the W-phase current (Isc) are each smaller than a threshold value, the PWM signal generation unit (6) generates a first PWM signal (S1) and a second PWM signal (S2) based on the U-phase reference modulated wave (MU0) and a triangular wave carrier (CA1), generates a third PWM signal (S3) and a fourth PWM signal (S4) based on the V-phase reference modulated wave (MV0) and the triangular wave carrier (CA1), and generates a fifth PWM signal (S5) and a sixth PWM signal (S6) based on the W-phase reference modulated wave (MW0) and the triangular wave carrier (CA1).

[0170] According to this aspect, when the maximum values ​​of the U-phase current (Isa), the V-phase current (Isb), and the W-phase current (Isc) are smaller than the threshold values, it is possible to further reduce current distortion.

[0171] The power conversion device of the present disclosure is capable of suppressing current distortion and reducing switching loss, and is thus industrially useful.

[0172] 1, 1A Power conversion device 2 Three-phase inverter circuit 21 U-phase switching circuit 210 First output point 22 V-phase switching circuit 220 Second output point 23 W-phase switching circuit 230 Third output point 3, 3A Controller 4 Reference modulated wave generating section 5, 5A Modulated wave generating section 6 PWM signal generating section 7 AC load 8a Current sensor 8b Current sensor 8c Current sensor ia Detected value of U-phase current ib Detected value of V-phase current ic Detected value of W-phase current Isa U-phase current Isb V-phase current Isc W-phase current CA1 Triangular wave carrier CV1 First curve section CV2 Second curve section CV3 Third curve section CV4 Fourth curve section dmax Duty command upper limit value dmin Duty command lower limit value d1 First value d2 Second value d3 Intermediate value du value dv value dw value du0 value dv0 value dw0 value MU0 U-phase reference modulated wave MV0 V-phase reference modulated wave MW0 W-phase reference modulated wave MU1 U-phase modulated wave MV1 V-phase modulated wave MW1 W-phase modulated wave Q1 First switching element Q2 Second switching element Q3 Third switching element Q4 Fourth switching element Q5 Fifth switching element Q6 Sixth switching element S1 First PWM signal S2 Second PWM signal S3 Third PWM signal S4 Fourth PWM signal S5 Fifth PWM signal S6 Sixth PWM signal SL1 First linear section SL2 Second linear section

Claims

1. A three-phase inverter circuit including: a U-phase switching circuit having first and second switching elements connected in series with each other and outputting a U-phase current from a first output point; a V-phase switching circuit having third and fourth switching elements connected in series with each other and outputting a V-phase current from a second output point; and a W-phase switching circuit having fifth and sixth switching elements connected in series with each other and outputting a W-phase current from a third output point; and a controller that generates a U-phase modulated wave, a V-phase modulated wave, and a W-phase modulated wave based on detected values ​​of at least two of the U-phase current, the V-phase current, and the W-phase current, and generates a first PWM signal, a second PWM signal, a third PWM signal, a fourth PWM signal, a fifth PWM signal, and a sixth PWM signal that control the first switching element, the second switching element, the third switching element, the fourth switching element, the fifth switching element, and the sixth switching element, respectively; Each of the U-phase modulated wave, the V-phase modulated wave, and the W-phase modulated wave generated by the controller during steady-state operation of the three-phase inverter circuit includes: a first curved portion that increases from an intermediate value between a first value and a second value smaller than the first value to the first value, and that is convex upward; a first straight line portion that is connected to an end point of the first curved portion and that is constant at the first value; a second curved portion that is connected to an end point of the first straight line portion and that decreases from the first value to the intermediate value, and that is convex upward; a third curved portion that is connected to an end point of the second curved portion and that decreases from the intermediate value to the second value, and that is convex downward; a second straight line portion that is connected to an end point of the third curved portion and that is constant at the second value; and a fourth curved portion that is connected to an end point of the second straight line portion and that increases from the second value to the intermediate value, and that is convex downward. a first value smaller than a duty command upper limit value and a second value equal to a duty command lower limit value, or a first value equal to the duty command upper limit value and a second value larger than the duty command lower limit value.

2. The power conversion device according to claim 1, wherein the controller stops switching of the U-phase switching circuit for one-sixth of one cycle of the U-phase current, stops switching of the V-phase switching circuit for one-sixth of one cycle of the V-phase current, and stops switching of the W-phase switching circuit for one-sixth of one cycle of the W-phase current.

3. The power conversion device according to claim 1 or 2, wherein the controller comprises: a reference modulated wave generation unit that generates a U-phase reference modulated wave, a V-phase reference modulated wave, and a W-phase reference modulated wave of a three-phase modulation method based on the detected value of the U-phase current, the detected value of the V-phase current, and the detected value of the W-phase current; a modulated wave generation unit that generates the U-phase modulated wave, the V-phase modulated wave, and the W-phase modulated wave based on the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave; and a PWM signal generation unit that generates the first PWM signal and the second PWM signal based on the U-phase modulated wave and a triangular wave carrier, generates the third PWM signal and the fourth PWM signal based on the V-phase modulated wave and the triangular wave carrier, and generates the fifth PWM signal and the sixth PWM signal based on the W-phase modulated wave and the triangular wave carrier.

4. The U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave are sinusoidal waves with phases that differ from one another by 120 degrees, and in the controller, when the maximum value of the triangular wave carrier is 1 and the minimum value is -1, and the maximum value of each of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave is 1 and the minimum value is -1, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at an arbitrary time are du0, dv0, and dw0, respectively, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at the arbitrary time are du, dv, and dw, respectively, the modulated wave generating unit: if (du0 x dv0 x dw0)≦0, Perform each calculation, and if (du0 x dv0 x dw0) > 0, The power conversion device according to claim 3 , wherein each of the calculations is performed.

5. The U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave are sinusoidal waves with phases that differ from one another by 120 degrees, and in the controller, when the maximum value of the triangular wave carrier is 1 and the minimum value is -1, and the maximum value of each of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave is 1 and the minimum value is -1, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at any time are du0, dv0, and dw0, respectively, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at the any time are du, dv, and dw, respectively, the modulated wave generating unit: Perform each calculation, and if (du0 x dv0 x dw0) < 0, The power conversion device according to claim 3 , wherein each of the calculations is performed.

6. The U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave are sinusoidal waves with phases that differ from one another by 120 degrees, and in the controller, when the maximum value of the triangular wave carrier is 1 and the minimum value is 0, and the maximum value of each of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave is 1 and the minimum value is 0, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at an arbitrary time are du0, dv0, and dw0, respectively, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at the arbitrary time are du, dv, and dw, respectively, the modulated wave generating unit: Perform each calculation, and if {(du0-0.5) x (dv0-0.5) x (dw0-0.5)}>0, The power conversion device according to claim 3 , wherein each of the calculations is performed.

7. The U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave are sinusoidal waves with phases that differ from one another by 120 degrees, and in the controller, when the maximum value of the triangular wave carrier is 1 and the minimum value is 0, and the maximum value of each of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave is 1 and the minimum value is 0, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at any time are du0, dv0, and dw0, respectively, and the values ​​of the U-phase reference modulated wave, the V-phase reference modulated wave, and the W-phase reference modulated wave at the any time are du, dv, and dw, respectively, the modulated wave generating unit: Perform each calculation, and if {(du0-0.5) x (dv0-0.5) x (dw0-0.5)} < 0, The power conversion device according to claim 3 , wherein each of the calculations is performed.

8. The power conversion device according to claim 3, wherein, when the maximum values ​​of the U-phase current, the V-phase current, and the W-phase current are each smaller than a threshold value, the PWM signal generation unit generates the first PWM signal and the second PWM signal based on the U-phase reference modulated wave and the triangular wave carrier, generates the third PWM signal and the fourth PWM signal based on the V-phase reference modulated wave and the triangular wave carrier, and generates the fifth PWM signal and the sixth PWM signal based on the W-phase reference modulated wave and the triangular wave carrier.

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