High-voltage power supply

Abstract

This high-voltage power supply comprises: at least one insulation substrate 31; and a high-voltage generation circuit unit formed on the at least one insulation substrate 31. The high-voltage generation circuit unit comprises: a first multistage voltage doubler rectification circuit unit 32 for generating a first DC voltage; a second multistage voltage doubler rectification circuit unit 33 for generating a second DC voltage by boosting and rectifying inputted AC voltage at a phase opposite to that of the first multistage voltage doubler rectification circuit unit 32; and a DC arm unit 34 for synthesizing the first DC voltage and the second DC voltage. The first multistage voltage doubler rectification circuit unit 32, the second multistage voltage doubler rectification circuit unit 33, and the DC arm unit 34 are concentrically arranged on the insulation substrate 31.

Description

High Voltage Power Supply

[0001] The present disclosure relates to high voltage power supplies.

[0002] A high-voltage power supply including a Cockcroft-Walton circuit (hereinafter referred to as a CW circuit) that boosts and rectifies an input voltage by combining multiple stages of circuit components including capacitors and diodes is known (see, for example, Patent Document 1). In the CW circuit described in Patent Document 1, one or two stages of CW circuits are mounted on an insulating substrate, and the insulating substrates are stacked in multiple stages.

[0003] JP 2008-41318 A

[0004] Since CW circuits generate kilowatt-level output power, it is necessary to ensure sufficient dielectric strength between components or boards. One of the factors that can cause dielectric breakdown is thought to be the uneven distribution of electric field strength between components or boards, resulting in the creation of areas where the electric field strength is locally strong. Therefore, a high-voltage power supply that can suppress the uneven distribution of electric field strength is desired.

[0005] An object of the present disclosure is to provide a high-voltage power supply that can suppress bias in the distribution of electric field strength.

[0006] A high-voltage power supply according to one aspect of the present disclosure includes: [1] "at least one insulating substrate; and a high-voltage generation circuit unit formed on the at least one insulating substrate, wherein the high-voltage generation circuit unit includes a first multi-stage voltage-doubler rectifier circuit unit that generates a first DC voltage by boosting and rectifying an input AC voltage; a second multi-stage voltage-doubler rectifier circuit unit that generates a second DC voltage by boosting and rectifying the input AC voltage in an opposite phase to that of the first multi-stage voltage-doubler rectifier circuit unit; and and a DC arm unit that combines a DC voltage and the second DC voltage, wherein the first multi-stage voltage doubler rectifier circuit unit, the second multi-stage voltage doubler rectifier circuit unit, and the DC arm unit are concentrically arranged on the insulating substrate, the DC arm unit is arranged between the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit, and the second multi-stage voltage doubler rectifier circuit is arranged closer to the center of the insulating substrate than the first multi-stage voltage doubler rectifier circuit unit.

[0007] In the high-voltage power supply described in [1] above, the second voltage doubler rectifier circuit boosts and rectifies the input AC voltage in an opposite phase to that of the first voltage doubler rectifier circuit. Additionally, on the insulating substrate, the DC arm unit is arranged between the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit. This allows noise superimposed on the first DC voltage and noise superimposed on the second DC voltage to cancel each other out. Therefore, noise is reduced in the combined voltage obtained by combining the first DC voltage and the second DC voltage in the DC arm unit. Furthermore, by arranging the first multi-stage voltage doubler rectifier circuit unit, the second multi-stage voltage doubler rectifier circuit unit, and the DC arm unit concentrically on the insulating substrate, it is possible to easily form a uniform electric field distribution in a direction parallel to the surface of the insulating substrate. This suppresses bias in the electric field strength distribution and makes it less likely for discharge to occur.

[0008] A high-voltage power supply according to one aspect of the present disclosure may be [2] "the high-voltage power supply according to [1], wherein the at least one insulating substrate is a plurality of insulating substrates, the high-voltage generation circuit unit is provided across the plurality of insulating substrates, and the plurality of insulating substrates are stacked in a direction perpendicular to the surfaces of the plurality of insulating substrates." In this case, it is possible to easily form a uniform electric field distribution in a direction perpendicular to the surfaces of the insulating substrates, and bias in the electric field strength distribution is further suppressed.

[0009] A high-voltage power supply according to one aspect of the present disclosure may be [3] "the high-voltage power supply according to [2], wherein the AC voltages input to the first multi-stage voltage doubler rectifier circuit unit of each of the plurality of insulating substrates are in phase with each other between the plurality of insulating substrates, and the AC voltages input to the second multi-stage voltage doubler rectifier circuit unit of each of the plurality of insulating substrates are in phase with each other between the plurality of insulating substrates." In this case, the potential difference between each insulating substrate is constant along a direction perpendicular to the surface of the insulating substrate. This further suppresses bias in the electric field strength distribution in the direction perpendicular to the surface of the insulating substrate.

[0010] A high-voltage power supply according to one aspect of the present disclosure may be the high-voltage power supply according to [4] or [2], wherein the first multi-stage voltage doubler rectifier circuit unit, the second multi-stage voltage doubler rectifier circuit unit, and the DC arm unit each include a plurality of capacitors for each insulating substrate, and each of the plurality of capacitors provided on each insulating substrate is arranged alternately along the circumferential direction of the concentric circle with each of the plurality of capacitors provided on another insulating substrate adjacent to the insulating substrate in the perpendicular direction. In this case, the size of the plurality of insulating substrates can be reduced, or the distance between the insulating substrates can be shortened, thereby making it possible to miniaturize the high-voltage power supply.

[0011] A high-voltage power supply according to one aspect of the present disclosure may be [5] "the high-voltage power supply according to [4], wherein each of the plurality of insulating substrates has a first surface and a second surface opposite to the first surface, and among the plurality of capacitors, some capacitors are mounted on the first surface and the remaining capacitors except for the some capacitors are mounted on the second surface." In this case, the space required for mounting the capacitors can be reduced compared to when all of the plurality of capacitors are mounted on the first surface or the second surface, and therefore the size of the plurality of insulating substrates can be reduced.

[0012] A high-voltage power supply according to one aspect of the present disclosure may be [6] "the high-voltage power supply according to [4], wherein each of the plurality of insulating substrates has a first surface, the plurality of capacitors are mounted only on the first surface, and the first surface of each of the plurality of insulating substrates faces the first surface of another adjacent insulating substrate." In this case, by mounting the plurality of capacitors only on the first surface, the distance between the insulating substrates can be shortened on the surface opposite to the first surface. This allows the high-voltage power supply to be made smaller in size in the vertical direction.

[0013] A high-voltage power supply according to one aspect of the present disclosure may be [7] "the high-voltage power supply according to any one of [2] to [6], further comprising a detection resistor circuit for detecting the output voltage of the high-voltage generation circuit unit, the detection resistor circuit being arranged in a circular shape on each of the plurality of insulating substrates, closer to the center of the insulating substrate than the second multi-stage voltage doubler rectifier circuit unit, or closer to the outer edge of the insulating substrate than the first multi-stage voltage doubler rectifier circuit unit." In this case, noise is less likely to be superimposed on the detection resistor circuit, and the detection accuracy of the output voltage can be improved.

[0014] A high-voltage power supply according to one aspect of the present disclosure may be [8] "the high-voltage power supply according to [7], further comprising a first support member provided between the plurality of insulating substrates, the first support member being disposed between the first multi-stage voltage doubler rectifier circuit unit and the detection resistor circuit when viewed from the perpendicular direction." In this case, by disposing the detection resistor circuit closer to the center of the insulating substrate than the first support member, it is possible to suppress the influence of stress caused by deflection of the insulating substrate on the detection resistor circuit, thereby improving the detection accuracy of the output voltage.

[0015] A high-voltage power supply according to one aspect of the present disclosure may be the high-voltage power supply according to [8], further comprising: [9] a second support member disposed between the plurality of insulating substrates and disposed closer to the center of the insulating substrates than the first support member when viewed in the vertical direction, the second support member electrically connecting the detection resistor circuit mounted on each of the plurality of insulating substrates to the detection resistor circuit mounted on another insulating substrate adjacent to the insulating substrate, and the second support members are arranged in a straight line along the vertical direction across the plurality of insulating substrates. In this case, the second support member can electrically connect the detection circuit mounted on one insulating substrate to the detection circuit mounted on the other adjacent insulating substrate. Furthermore, since the second support members are arranged in a straight line along the vertical direction, it is possible to further suppress the influence of stress caused by deflection of the insulating substrates on the detection resistor circuit.

[0016] A high-voltage power supply according to one aspect of the present disclosure may be

[10] "the high-voltage power supply according to any one of [2] to [9], wherein the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit include a plurality of capacitors for each insulating substrate, and each of the plurality of capacitors included in the first multi-stage voltage doubler rectifier circuit unit is aligned with each of the plurality of capacitors included in the second multi-stage voltage doubler rectifier circuit unit on a straight line along the radial direction of the concentric circle." In this case, it is possible to more easily cancel out noise superimposed on the first DC voltage and noise superimposed on the second DC voltage.

[0017] A high-voltage power supply according to one aspect of the present disclosure may be the high-voltage power supply according to [7],

[11] wherein the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit include a plurality of capacitors for each insulating substrate, and each of the plurality of capacitors included in the first multi-stage voltage doubler rectifier circuit unit is aligned with each of the plurality of capacitors included in the second multi-stage voltage doubler rectifier circuit unit on a straight line along the radial direction of the concentric circle, and the detection resistor circuit is spaced apart from the straight line along the circumferential direction of the concentric circle. In this case, noise is less likely to be superimposed on the detection resistor circuit.

[0018] A high-voltage power supply according to one aspect of the present disclosure may be

[12] "the high-voltage power supply according to any one of [2] to

[11] , wherein the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit have a first voltage doubler rectifier circuit unit for each of the insulating substrates, and the first voltage doubler rectifier circuit unit generates a voltage twice the magnitude of the input AC voltage." In this case, the first voltage doubler rectifier circuit unit can reliably boost the AC voltage on each insulating substrate.

[0019] A high-voltage power supply according to one aspect of the present disclosure may be the high-voltage power supply described in

[12] ,

[13] in which "the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit further include a second voltage doubler rectifier circuit unit for each insulating substrate, the first voltage doubler rectifier circuit unit and the second voltage doubler rectifier circuit unit are connected in series with each other, and the second voltage doubler rectifier circuit unit generates a voltage twice the magnitude of the input AC voltage. The first voltage doubler rectifier circuit unit and the second voltage doubler rectifier circuit unit are arranged on the insulating substrate so as to be line-symmetric with each other. In this case, by arranging the two voltage doubler rectifier circuit units, the first voltage doubler rectifier circuit unit and the second voltage doubler rectifier circuit unit, so as to be line-symmetric with each other, it is possible to further facilitate the formation of a uniform electric field distribution in a direction parallel to the surface of the insulating substrate.

[0020] A high-voltage power supply according to one aspect of the present disclosure may be

[14] "the high-voltage power supply according to any one of [1] to

[13] , wherein the insulating substrate has a through-hole in the center of the insulating substrate." In this case, for example, when the high-voltage power supply is immersed in insulating oil, convection of the insulating oil is likely to occur within the through-hole. This suppresses the occurrence of convection of the insulating oil in a direction parallel to the surface of the insulating substrate. This makes it possible to suppress an increase in leakage current induced by charging due to the flow of insulating oil. Furthermore, the insulating substrate can be cooled efficiently.

[0021] A high-voltage power supply according to one aspect of the present disclosure may be

[15] "the high-voltage power supply according to any one of [2] to

[13] , wherein the insulating substrate has a through-hole at the center thereof, and the distance between the plurality of insulating substrates is smaller than the diameter of the through-hole." In this case, for example, when the high-voltage power supply is immersed in insulating oil, convection of insulating oil is more likely to occur within the through-hole than between each of the plurality of insulating substrates and another adjacent insulating substrate. This further suppresses convection of insulating oil in a direction parallel to the surface of the insulating substrate.

[0022] A high-voltage power supply according to one aspect of the present disclosure includes,

[16] "the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit have a plurality of voltage doubler rectifier circuit units connected in series to each other for each insulating substrate, and each of the plurality of voltage doubler rectifier circuit units includes a first boost rectifier capacitor, a second boost rectifier capacitor, a first boost rectifier diode, a second boost rectifier diode, and a third boost rectifier diode, and the DC arm includes a third boost rectifier capacitor, and the first boost rectifier diode is The high-voltage power supply may be the one described in any one of [1] to

[15] , wherein the high-voltage electrode of the first boost rectifier capacitor and the high-voltage electrode of the second boost rectifier capacitor are connected in a forward direction, the second boost rectifier diode connects the high-voltage electrode of the second boost rectifier capacitor and the low-voltage electrode of the third boost rectifier capacitor in a forward direction, and the third boost rectifier diode connects the high-voltage electrode of the third boost rectifier capacitor and the high-voltage electrode of the first boost rectifier capacitor in a forward direction. In this case, in each of the multiple voltage doubler rectifier circuits, when the input voltage is positive, charge is stored in the third boost rectifier capacitor via the second boost rectifier diode. When the input voltage is negative, charge is stored in the second boost rectifier capacitor via the first boost rectifier diode. By repeating this operation, an AC voltage with a peak twice the input AC voltage is generated at the high-voltage side electrode of the second boost rectifier capacitor, and a DC voltage with a peak twice the input AC voltage is generated at the high-voltage side electrode of the third boost rectifier capacitor.

[0023] According to the present disclosure, it is possible to provide a high-voltage power supply that can suppress bias in the distribution of electric field strength.

[0024] 1 is a block diagram showing a high-voltage power supply according to an embodiment of the present disclosure; FIG. 2 is a diagram showing the internal structure of an oil-immersion unit included in the high-voltage power supply shown in FIG. 1; FIG. 3 is a circuit diagram of a high-voltage generation circuit unit constituting the cathode power supply shown in FIG. 1; FIG. 4 is a diagram showing an example of element arrangement on each insulating substrate; FIG. 5 is a diagram showing a stacked structure of the cathode power supply; FIG. 6 is an enlarged view of a portion of wiring connections between a plurality of insulating substrates; FIG. 7 is a diagram showing a stacked structure of the cathode power supply according to a first modified example; FIG. 8 is a schematic diagram of a capacitor arrangement in the stacked structure of the cathode power supply shown in FIG. 7; FIG. 9 is a diagram showing a stacked structure of the cathode power supply according to a second modified example; FIG. 10 is a schematic diagram of a capacitor arrangement in the stacked structure of the cathode power supply shown in FIG. 9; FIG. 11 is a diagram showing a stacked structure of the cathode power supply according to a third modified example; FIG. 12 is an enlarged view of a portion of wiring connections of the cathode power supply shown in FIG. 11; 27A is a graph showing an example of the transition of the potential of the second multi-stage voltage doubler rectifier circuit unit. 27B is a graph comparing the potential of the waveform stabilization circuit and the intermediate potential in the arrangement example shown in FIG. 17. 27C is a diagram showing an example of the arrangement of the surface of the top insulating substrate after a layout change. 27D is a diagram showing an example of the arrangement of the back surface of the top insulating substrate after a layout change. 27E is a diagram showing an example of the arrangement of the surface of the second insulating substrate after a layout change. 27F is a diagram showing an example of the arrangement of the back surface of the second insulating substrate after a layout change. 27F is a graph comparing the potential of the waveform stabilization circuit and the intermediate potential in the arrangement examples shown in FIGS. 20 and 21. 27G is a graph comparing the potential of the detection resistor circuit and the intermediate potential. 27G is an example of a cross-sectional image obtained by cutting the cathode power supply 3 along a plane defined by the radial direction Rd and the height direction Hd. 27G is an example of an electric field analysis model in which only the cross-sectional portion of the cross-sectional image is a two-dimensional image. 27G is an example of a model for electric field analysis ... the cathode power supply according to this embodiment is subjected to an electric field analysis. 27G is an example of a model for electric field analysis in which the cross-sectional image according to this embodiment is subjected to an electric field analysis. 27G is an example of a model for electric field analysis in which the cross-sectional image according to this embodiment is subjected to an electric field analysis. 27G is an example of a model for electric field analysis in which the cross-sectional image according to this embodiment is subjected to an electric field analysis. 27G is an example of FIG. 28B shows an example of the results of an electric field analysis performed on the cathode power supply according to the comparative example.

[0025] Hereinafter, a preferred embodiment of a high-voltage power supply according to an embodiment of the present disclosure will be described in detail with reference to the drawings.

[0026] 1 is a block diagram showing a high-voltage power supply 1 according to one embodiment of the present disclosure. The high-voltage power supply 1 is a power supply circuit for supplying a high voltage to a load. The high-voltage power supply 1 is applicable to devices that use an input voltage of several hundred volts, such as X-ray tubes and electron beam irradiation devices. In this embodiment, the high-voltage power supply 1 is described as being applied to an X-ray tube. The high-voltage power supply 1 includes an AC input unit 11, an inverter 12, an analog control unit 13, a communication control unit 14, a communication connector Cn1, a control connector Cn2, an operation panel Cn3, and an oil-immersion unit 2.

[0027] The AC input unit 11 is a functional unit that converts an AC voltage generated in the AC power supply AP into a DC voltage. The AC input unit 11 is, for example, a switching AC / DC converter. The DC voltage generated in the AC input unit 11 is supplied as a power supply voltage to the inverter 12, the analog control unit 13, and the communication control unit 14. The inverter 12 is a functional unit that converts the DC voltage generated by the AC input unit 11 into an AC voltage. The inverter 12 is a bridge circuit formed by multiple transistors, for example, a half-bridge circuit in which the source terminal of a high-side FET and the drain terminal of a low-side FET are connected to each other. The AC voltage converted in the inverter 12 is supplied to a first transformer TR1, a second transformer TR2, and a third transformer TR3 in the oil-immersed unit 2.

[0028] The analog control unit 13 is a functional unit that controls the inverter 12 and communicates with the communication control unit 14, the control connector Cn2, and the operation panel Cn3. The analog control unit 13 generates a drive signal for controlling the inverter 12. The analog control unit 13 is connected to each of the control terminals of the plurality of transistors that constitute the inverter 12, and drives each of the plurality of transistors. The analog control unit 13 has, for example, the following communication functions. The analog control unit 13 may generate a drive signal based on a signal received from the communication control unit 14 or a signal received from the operation panel. Alternatively, the analog control unit 13 may detect the magnitude of the AC voltage converted in the inverter 12 and output the detected AC voltage to the outside from the control connector Cn2.

[0029] The communication control unit 14 is a functional unit that communicates with the outside via the communication connector Cn1. For example, the communication control unit 14 may receive from the outside an instruction value of the magnitude of the AC voltage converted in the inverter 12. Alternatively, the communication control unit 14 may convert the magnitude of the AC voltage converted in the inverter 12 into a digital signal and transmit it to the outside. The operation panel Cn3 is a user interface. For example, a user may input an instruction value of the magnitude of the AC voltage converted in the inverter 12 from the operation panel Cn3.

[0030] The oil-immersed section 2 is a functional section that boosts the AC voltage converted by the inverter 12 to a high voltage and supplies it to a load. The high voltage boosted by the oil-immersed section 2 is, for example, several hundred kilovolts. The oil-immersed section 2 includes a housing 20, a first transformer TR1, a second transformer TR2, a third transformer TR3, a cathode power supply 3, a filament power supply 4, and a grid power supply 5. The housing 20 is, for example, a cylindrical container and has a top surface 20a, a side surface 20b, and a bottom surface 20c. The first transformer TR1, the second transformer TR2, the third transformer TR3, the cathode power supply 3, the filament power supply 4, and the grid power supply 5 are arranged inside the housing 20. In this embodiment, the housing 20 is filled with insulating oil. As described above, the high voltage boosted by the oil-immersed section 2 is several hundred kilovolts. Therefore, for example, in order to ensure the dielectric strength of the insulating substrates included in the cathode power supply 3, the high dielectric strength of the insulating oil is effective.

[0031] The first transformer TR1, the second transformer TR2, and the third transformer TR3 each include a primary winding and a secondary winding. The primary winding and the secondary winding are insulated from each other. The turns ratio of the primary winding and the secondary winding in the first transformer TR1, the second transformer TR2, and the third transformer TR3 may be different from each other. The first transformer TR1 supplies the AC voltage converted in the inverter 12 to the cathode power supply 3. The second transformer TR2 supplies the AC voltage converted in the inverter 12 to the filament power supply 4. The third transformer TR3 supplies the AC voltage converted in the inverter 12 to the grid power supply 5.

[0032] The electron source in the X-ray tube that emits electrons includes a filament that emits thermions, a grid electrode for extracting thermions from the filament, and a cathode electrode that determines the potential of the electron source. The cathode power supply 3 is a functional unit that generates a DC voltage to be supplied to the cathode electrode from a voltage supplied from a first transformer TR1. Details of the cathode power supply 3 will be described later. The filament power supply 4 is a functional unit that generates a DC voltage to be supplied to the filament from a voltage supplied from a second transformer TR2. The grid power supply 5 is a functional unit that generates a DC voltage to be supplied to the grid electrode from a voltage supplied from a third transformer TR3. The filament power supply 4 and the grid power supply 5 each include a full-wave rectifier circuit, for example, composed of a diode bridge circuit and a smoothing capacitor, and rectify and smooth the voltage supplied from the second transformer TR2 or the voltage supplied from the third transformer TR3.

[0033] FIG. 2 is a diagram showing the internal structure of the oil-immersed unit 2. For ease of explanation, the direction along the side surface 20b between the bottom surface 20c and the top surface 20a of the housing 20 is defined as the height direction Hd of the housing 20. In this embodiment, a filament power supply 4 and a grid power supply 5 are disposed on the bottom surface 20c of the housing 20. The filament power supply 4 and the grid power supply 5 are mounted on a mounting board PCa. A cathode power supply 3 is disposed along the height direction Hd of the housing 20 at a position farther from the bottom surface 20c than the positions at which the filament power supply 4 and the grid power supply 5 are disposed. The cathode power supply 3 is mounted on a mounting board PCb. A first transformer TR1, a second transformer TR2, and a third transformer TR3 are disposed along the height direction Hd of the housing 20 at positions closer to the top surface 20a than the position at which the cathode power supply 3 is disposed. The first transformer TR1, the second transformer TR2, and the third transformer TR3 are mounted on a mounting board PCc. The mounting boards PCa and PCb, and the mounting boards PCb and PCc are fixed together with insulating spacers, nuts, and the like.

[0034] The cathode power supply 3 includes at least one insulating substrate. In the following description, the at least one insulating substrate will be described as a plurality of insulating substrates 31. In the example of FIG. 2 , the plurality of insulating substrates 31 are configured by stacking six insulating substrates 31 along the height direction Hd. The direction perpendicular to the surface of each insulating substrate 31 coincides with the height direction Hd. Diodes and capacitors are mounted on each of the plurality of insulating substrates 31. The cathode power supply 3 further includes a first support member 38, a second support member 39, and a third support member 40 provided between the plurality of insulating substrates 31. The plurality of insulating substrates 31 are fixed to one another by a plurality of support members, including the first support member 38, the second support member 39, and the third support member 40. The first support member 38 and the third support member 40 are made of an insulating material. The second support member 39 is made of a conductive material.

[0035] 3 is a circuit diagram of the high-voltage generation circuit unit 30 constituting the cathode power supply 3. The input terminal of the high-voltage generation circuit unit 30 is connected to the secondary winding TRb of the first transformer TR1. The output terminal of the high-voltage generation circuit unit 30 is connected to a load Rload. The load Rload is, for example, an X-ray tube. The high-voltage generation circuit unit 30 boosts and rectifies the voltage supplied from the first transformer TR1 to several hundred kilovolts and supplies the voltage to the load Rload. The high-voltage generation circuit unit 30 is provided across multiple insulating substrates 31. For convenience, FIG. 3 shows the high-voltage generation circuit unit 30 provided across three insulating substrates 31.

[0036] The high voltage generation circuit unit 30 has a first multistage voltage doubler rectifier circuit unit 32, a second multistage voltage doubler rectifier circuit unit 33, a DC arm unit 34, and a detection resistor circuit 37 on each insulating substrate 31. The first multistage voltage doubler rectifier circuit unit 32 is a functional unit that generates a first DC voltage by boosting and rectifying an input AC voltage. The second multistage voltage doubler rectifier circuit unit 33 is a functional unit that generates a second DC voltage by boosting and rectifying an input AC voltage in the opposite phase to that of the first multistage voltage doubler rectifier circuit unit 32. The DC arm unit 34 is a functional unit that combines the first DC voltage and the second DC voltage.

[0037] The first multistage voltage doubler rectifier circuit unit 32, the second multistage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 are mounted on each insulating substrate 31. For convenience, FIG. 3 shows the first multistage voltage doubler rectifier circuit unit 32, the second multistage voltage doubler rectifier circuit unit 33, the DC arm unit 34, and the detection resistor circuit 37 mounted on three insulating substrates 31. The first multistage voltage doubler rectifier circuit unit 32 is electrically coupled to the first multistage voltage doubler rectifier circuit unit 32 mounted on the adjacent insulating substrate 31 along the height direction Hd. The first multistage voltage doubler rectifier circuit unit 32 electrically coupled across multiple insulating substrates 31 constitutes a half-wave rectifier type CW circuit. Similarly, the second multistage voltage doubler rectifier circuit unit 33 is electrically coupled to the second multistage voltage doubler rectifier circuit unit 33 mounted on the adjacent insulating substrate 31 along the height direction Hd. The second multi-stage voltage doubler rectifier circuit section 33 electrically coupled across the plurality of insulating substrates 31 constitutes a half-wave rectifier type CW circuit.

[0038] The first multistage voltage doubler rectifier circuit unit 32 mounted on the insulating substrate 31 closest to the top surface 20a among the plurality of insulating substrates 31 is referred to as the first-stage first multistage voltage doubler rectifier circuit unit 32. The second multistage voltage doubler rectifier circuit unit 33 mounted on the insulating substrate 31 closest to the top surface 20a among the plurality of insulating substrates 31 is referred to as the first-stage second multistage voltage doubler rectifier circuit unit 33. The first-stage first multistage voltage doubler rectifier circuit unit 32 boosts and rectifies the AC voltage supplied from the first transformer TR1, and transmits the voltage along the height direction Hd to the first multistage voltage doubler rectifier circuit unit 32 mounted on the insulating substrate 31 adjacent to the bottom surface 20c side. The first-stage second multistage voltage doubler rectifier circuit unit 33 boosts and rectifies the AC voltage supplied from the first transformer TR1 and transmits it to the second multistage voltage doubler rectifier circuit unit 33 mounted on the insulating substrate 31 adjacent to the bottom surface 20c along the height direction Hd. These operations are repeated up to the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 mounted on the insulating substrate 31 closest to the bottom surface 20c. In other words, the magnitudes of the first and second DC voltages generated in the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 increase along the height direction Hd from the insulating substrate 31 on the top surface 20a side to the insulating substrate 31 on the bottom surface 20c side. Based on this, in the following description, the side with a higher absolute value of the voltage value may be referred to as the "high voltage side," and the side with a lower absolute value of the voltage value may be referred to as the "low voltage side."

[0039] The DC arm section 34 has a first capacitor C1 (third boost rectifier capacitor) and a second capacitor C2 (third boost rectifier capacitor) connected in series to each other. The DC arm section 34 is electrically coupled to the DC arm section 34 mounted on the insulating substrate 31 adjacent to it in the height direction Hd. Specifically, the second capacitor C2 is connected in series to the first capacitor C1 of the DC arm section 34 mounted on the insulating substrate 31 adjacent to it in the height direction Hd.

[0040] The AC voltage input to the first multistage voltage doubler rectifier circuit unit 32 is in phase with each other between the multiple insulating substrates 31. When the first multistage voltage doubler rectifier circuit unit 32 mounted on each insulating substrate 31 outputs the input AC voltage to the first multistage voltage doubler rectifier circuit unit 32 mounted on the insulating substrate 31 adjacent to the bottom surface 20c side along the height direction Hd, the phase of the input voltage and the phase of the output voltage are in phase. At the same time, the AC voltage input to the second multistage voltage doubler rectifier circuit unit 33 is in phase with each other between the multiple insulating substrates 31. When the second multistage voltage doubler rectifier circuit unit 33 mounted on each insulating substrate 31 outputs the input AC voltage to the second multistage voltage doubler rectifier circuit unit 33 mounted on the insulating substrate 31 adjacent to the bottom surface 20c side along the height direction Hd, the phase of the input voltage and the phase of the output voltage are in phase.

[0041] Each of the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 has two voltage doubler circuit units. The two voltage doubler circuit units are composed of a first voltage doubler rectifier circuit unit 35 and a second voltage doubler rectifier circuit unit 36. Each of the first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36 ​​generates a DC voltage that is twice the magnitude (peak value) of the input AC voltage. For example, if the AC voltage input to the first voltage doubler rectifier circuit unit 35 is a sine wave of ±500 V centered on 0 V, a DC voltage of 1000 V is generated. Then, a sine wave of ±500 V centered on +500 V is input to the second voltage doubler rectifier circuit unit 36, and the second voltage doubler rectifier circuit unit 36 ​​generates a DC voltage of 2000 V. That is, each of the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 generates a DC voltage four times the magnitude (peak value) of the input AC voltage. For example, if the multiple insulating substrates 31 are composed of six insulating substrates, each of the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 mounted on the insulating substrate 31 closest to the bottom surface 20c generates a DC voltage 24 times the magnitude of the AC voltage supplied from the first transformer TR1. Then, the DC voltages generated in the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 are combined in the DC arm unit 34.

[0042] The first voltage doubler rectifier circuit unit 35 includes a third capacitor C3 (first boost rectifier capacitor), a fourth capacitor C4 (second boost rectifier capacitor), a first diode D1 (first boost rectifier diode), a second diode D2 (second boost rectifier diode), and a third diode D3 (third boost rectifier diode). In the first voltage doubler rectifier circuit unit 35, the first diode D1 connects the high-voltage side electrode of the third capacitor C3 to the high-voltage side electrode of the fourth capacitor C4 in the forward direction. The second diode D2 connects the high-voltage side electrode of the fourth capacitor C4 to the low-voltage side electrode of the first capacitor C1 in the forward direction. The third diode D3 connects the high-voltage side electrode of the first capacitor C1 to the high-voltage side electrode of the third capacitor C3 in the forward direction.

[0043] The second voltage doubler rectifier circuit unit 36 ​​includes a fifth capacitor C5 (first boost rectifier capacitor), a sixth capacitor C6 (second boost rectifier capacitor), a fourth diode D4 (first boost rectifier diode), a fifth diode D5 (second boost rectifier diode), and a sixth diode D6 (third boost rectifier diode). In the second voltage doubler rectifier circuit unit 36, the fourth diode D4 forward-connects the high-voltage electrode of the fifth capacitor C5 to the high-voltage electrode of the sixth capacitor C6. The fifth diode D5 forward-connects the high-voltage electrode of the sixth capacitor C6 to the low-voltage electrode of the second capacitor C2. The sixth diode D6 forward-connects the high-voltage electrode of the second capacitor C2 to the high-voltage electrode of the fifth capacitor C5.

[0044] The high-voltage electrode of the third capacitor C3 of the first voltage doubler rectifier circuit unit 35 is connected to the low-voltage electrode of the fifth capacitor C5 of the second voltage doubler rectifier circuit unit 36. The high-voltage electrode of the fourth capacitor C4 of the first voltage doubler rectifier circuit unit 35 is connected to the low-voltage electrode of the sixth capacitor C6 of the second voltage doubler rectifier circuit unit 36. Furthermore, the high-voltage electrode of the fifth capacitor C5 of the second voltage doubler rectifier circuit unit 36 ​​is connected to the low-voltage electrode of the third capacitor C3 of the first voltage doubler rectifier circuit unit 35 mounted on the insulating substrate 31 adjacent to the bottom surface 20c side along the height direction Hd. The high-voltage electrode of the sixth capacitor C6 of the second voltage doubler rectifier circuit unit 36 ​​is connected to the low-voltage electrode of the fourth capacitor C4 of the first voltage doubler rectifier circuit unit 35 mounted on the insulating substrate 31 adjacent to the bottom surface 20c side along the height direction Hd.

[0045] The fourth capacitor C4 is not included in the first voltage doubler rectifier circuit unit 35 in the first-stage first multi-stage voltage doubler rectifier circuit unit 32 and the first voltage doubler rectifier circuit unit 35 in the first-stage second multi-stage voltage doubler rectifier circuit unit 33. A connection point P1 between the low-voltage side electrode of the third capacitor C3 of the first voltage doubler rectifier circuit unit 35 in the first multi-stage voltage doubler rectifier circuit unit 32 and the low-voltage side electrode of the sixth capacitor C6 of the second voltage doubler rectifier circuit unit 36 ​​in the first-stage second multi-stage voltage doubler rectifier circuit unit 33 is connected to one end of the secondary winding TRb of the first transformer TR1. The connection point P2 between the low-voltage side electrode of the sixth capacitor C6 of the second voltage doubler rectifier circuit unit 36 ​​in the first-stage first multi-stage voltage doubler rectifier circuit unit 32 and the low-voltage side electrode of the third capacitor C3 of the first voltage doubler rectifier circuit unit 35 in the first-stage second multi-stage voltage doubler rectifier circuit unit 33 is connected to the other end of the secondary winding TRb of the first transformer TR1. With this configuration, the AC voltage supplied from the first transformer TR1 is input to the first-stage first multi-stage voltage doubler rectifier circuit unit 32. The AC voltage supplied from the first transformer TR1 is input to the first-stage second multi-stage voltage doubler rectifier circuit unit 33 in an opposite phase to the AC voltage input to the first-stage first multi-stage voltage doubler rectifier circuit unit 32.

[0046] The detection resistor circuit 37 detects the output voltage Vout by dividing the output voltage Vout from the output terminal of the high-voltage generating circuit unit 30 into a detection voltage Vdet that is smaller than the output voltage Vout. The detection resistor circuit 37 includes resistors R1 to R4 in each insulating substrate 31. Resistors R1 to R4 each have the same resistance value. The total resistance value of resistors R1 to R4 is, for example, 10 gigaohms to 20 gigaohms. Resistors R1 to R4 are high-voltage resistors, such as plate resistors. In the detection resistor circuit 37, resistors R1 to R4 are connected in series to each other in order. Resistor R4 of the detection resistor circuit 37 is connected to resistor R1 in the detection resistor circuit 37 mounted on the insulating substrate 31 adjacent to the bottom surface 20c along the height direction Hd. In the example of FIG. 3, the detection resistor circuit 37 is connected across three insulating substrates 31. 3, three resistors R1 to R4 are provided, and therefore the output voltage Vout is divided into the detection voltage Vdet by twelve resistors. The divided voltage Vdet is fed back to, for example, the analog control unit 13 shown in FIG.

[0047] FIG. 4 is a diagram showing an example of element arrangement on each insulating substrate 31. When viewed from the height direction Hd, the insulating substrate 31 has a circular shape. The first multistage voltage doubler rectifier circuit unit 32, the second multistage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 are concentrically arranged on each insulating substrate 31. Here, the circumferential direction of the concentric circles is the circumferential direction Cd, the radial direction is the radial direction Rd, and the center is the center CP. The center CP of the concentric circles coincides with the center of each insulating substrate 31. The first multistage voltage doubler rectifier circuit unit 32 is arranged at a position farthest from the center CP. The second multistage voltage doubler rectifier circuit unit 33 is arranged at a position closest to the center CP. The DC arm unit 34 is arranged between the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33. The first multistage voltage doubler rectifier circuit unit 32, the second multistage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 are arranged concentrically from the center CP to the outer edge of the insulating substrate 31 along the radial direction Rd in the order of the second multistage voltage doubler rectifier circuit unit 33, the DC arm unit 34, and the first multistage voltage doubler rectifier circuit unit 32.

[0048] As shown in FIG. 4, each of the first capacitor C1 to the sixth capacitor C6 is not composed of a single large capacitor, but rather is composed of multiple small capacitors connected in parallel. The multiple capacitors (the third capacitor C3 to the sixth capacitor C6) included in the first multi-stage voltage doubler rectifier circuit unit 32 are aligned with the multiple capacitors included in the second multi-stage voltage doubler rectifier circuit unit 33 on a straight line A0 along the radial direction Rd. Specifically, the third capacitor C3 included in the first multi-stage voltage doubler rectifier circuit unit 32 is aligned with the third capacitor C3 included in the second multi-stage voltage doubler rectifier circuit unit 33 on a straight line A0 along the radial direction Rd. The fourth capacitor C4 included in the first multi-stage voltage doubler rectifier circuit unit 32 is aligned with the fourth capacitor C4 included in the second multi-stage voltage doubler rectifier circuit unit 33 on a straight line A0 along the radial direction Rd. The fifth capacitor C5 included in the first multistage voltage doubler rectifier circuit unit 32 is aligned with the fifth capacitor C5 included in the second multistage voltage doubler rectifier circuit unit 33 on a straight line A0 along the radial direction Rd. The sixth capacitor C6 included in the first multistage voltage doubler rectifier circuit unit 32 is aligned with the sixth capacitor C6 included in the second multistage voltage doubler rectifier circuit unit 33 on a straight line A0 along the radial direction Rd.

[0049] The first voltage doubler rectifier circuit unit 35 in the first multi-stage voltage doubler rectifier circuit unit 32 and the first voltage doubler rectifier circuit unit 35 in the second multi-stage voltage doubler rectifier circuit unit 33 are arranged on one side with respect to the center CP. The second voltage doubler rectifier circuit unit 36 ​​in the first multi-stage voltage doubler rectifier circuit unit 32 and the second voltage doubler rectifier circuit unit 36 ​​in the second multi-stage voltage doubler rectifier circuit unit 33 are arranged on the other side opposite to the one side with respect to the center CP. In other words, the first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36 ​​are arranged so as to be line-symmetrical with each other along the radial direction Rd.

[0050] Each insulating substrate 31 has a through hole TH at the center thereof when viewed from the height direction Hd. The through hole TH has a circular shape when viewed from the height direction Hd. The center of the through hole TH coincides with the center of each insulating substrate 31 and the center CP of the concentric circle. Due to the through holes TH, each insulating substrate 31 has a circular ring shape (donut shape) when viewed from the height direction Hd. The diameter of the through hole TH is larger than the distance between the insulating substrates 31.

[0051] The detection resistor circuit 37 is arranged in a circular shape closer to the center CP than the first multi-stage voltage doubler rectifier circuit unit 32. The resistors R1 to R4 included in the detection resistor circuit 37 are arranged at equal intervals along the edge of the through-hole TH. The resistors R1 and R2, the resistors R2 and R3, and the resistors R3 and R4 are connected by wiring patterns.

[0052] The detection resistor circuit 37 is arranged along the circumferential direction Cd with respect to a straight line A0 along which each of the plurality of capacitors (the third capacitor C3 to the sixth capacitor C6) included in the first multi-stage voltage doubler rectifier circuit unit 32 and each of the plurality of capacitors (the third capacitor C3 to the sixth capacitor C6) included in the second multi-stage voltage doubler rectifier circuit unit 33 are aligned. Specifically, the resistor R1 is arranged along the radial direction Rd between the fifth capacitor C5 and the sixth capacitor C6 included in the first multi-stage voltage doubler rectifier circuit unit 32 and between the fifth capacitor C5 and the sixth capacitor C6 included in the second multi-stage voltage doubler rectifier circuit unit 33. The resistor R2 is arranged along the radial direction Rd between the fourth capacitor C4 and the sixth capacitor C6 included in the first multi-stage voltage doubler rectifier circuit unit 32 and between the fourth capacitor C4 and the sixth capacitor C6 included in the second multi-stage voltage doubler rectifier circuit unit 33. The resistor R3 is arranged along the radial direction Rd between the third capacitor C3 and the fourth capacitor C4 included in the first multi-stage voltage doubler rectifier circuit unit 32 and between the third capacitor C3 and the fourth capacitor C4 included in the second multi-stage voltage doubler rectifier circuit unit 33. The resistor R4 is arranged along the radial direction Rd between the third capacitor C3 and the fifth capacitor C5 included in the first multi-stage voltage doubler rectifier circuit unit 32 and between the third capacitor C3 and the fifth capacitor C5 included in the second multi-stage voltage doubler rectifier circuit unit 33.

[0053] When viewed from the height direction Hd, the first support member 38 is disposed between the second multi-stage voltage doubler rectifier circuit unit 33 and the detection resistor circuit 37. In the example of Fig. 4, the cathode power supply 3 has a plurality of first support members 38. When viewed from the height direction Hd, the plurality of first support members 38 are disposed side by side along the edge of the through hole TH.

[0054] The second support members 39 are disposed closer to the center CP than the first support members 38 when viewed in the height direction Hd. In the example of FIG. 4 , the cathode power supply 3 has a plurality of second support members 39. Two of the plurality of second support members 39 are disposed on the low-voltage side of resistor R1 when viewed in the height direction Hd. Two of the plurality of second support members 39 are disposed on the high-voltage side of resistor R4 when viewed in the height direction Hd. The plurality of second support members 39 electrically connect the detection resistor circuit 37 mounted on each insulating substrate 31 to the detection resistor circuit 37 mounted on another insulating substrate 31 adjacent to that insulating substrate 31. Specifically, this is as follows. The two second support members 39 arranged on the low-voltage side of the resistor R1 connect the low-voltage side of the resistor R1 to the high-voltage side of the resistor R4 of the detection resistor circuit 37 mounted on the insulating substrate 31 adjacent to the top surface 20a along the height direction Hd. The two second support members 39 arranged on the high-voltage side of the resistor R4 connect the high-voltage side of the resistor R4 to the low-voltage side of the resistor R1 of the detection resistor circuit 37 mounted on the insulating substrate 31 adjacent to the bottom surface 20c along the height direction Hd.

[0055] When viewed from the height direction Hd, the third support member 40 is disposed closer to the outer edge than the first multi-stage voltage doubler rectifier circuit unit 32. The first support member 38 and the third support member 40 ensure insulation between the multiple insulating substrates 31 and maintain the distance between the multiple insulating substrates 31.

[0056] FIG. 5 is a diagram showing the stacked structure of the cathode power supply 3. FIG. 6 is an enlarged view of the wiring connection portion between multiple insulating substrates 31. As described above, in each insulating substrate 31, the first multistage voltage doubler rectifier circuit unit 32, the second multistage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 are arranged concentrically along the radial direction Rd from the center CP to the outer edge of the insulating substrate 31 in the order of the second multistage voltage doubler rectifier circuit unit 33, the DC arm unit 34, and the first multistage voltage doubler rectifier circuit unit 32. In this embodiment, the arrangement of the first multistage voltage doubler rectifier circuit unit 32, the second multistage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 is the same in each insulating substrate 31. That is, the first multistage voltage doubler rectifier circuit unit 32 is always provided at the same position along the height direction Hd. Similarly, the second multi-stage voltage doubler rectifier circuit unit 33 is always provided at the same position along the height direction Hd. As a result, on each insulating substrate 31, the AC voltage input to the first multi-stage voltage doubler rectifier circuit unit 32 is in phase with the AC voltage input to the first multi-stage voltage doubler rectifier circuit unit 32 on the other insulating substrate 31. At the same time, the AC voltage input to the second multi-stage voltage doubler rectifier circuit unit 33 is in phase with the AC voltage input to the second multi-stage voltage doubler rectifier circuit unit 33 on the other insulating substrate 31. In addition, as shown in FIG. 5, the first support member 38, the second support member 39, and the third support member 40 are arranged in a straight line along the height direction Hd across the multiple insulating substrates 31.

[0057] As shown in FIG. 6, between the plurality of insulating substrates 31, the first multi-stage voltage doubler rectifier circuit unit 32 mounted on each insulating substrate 31 and the first multi-stage voltage doubler rectifier circuit unit 32 mounted on adjacent insulating substrates 31 are connected by a first connection wiring 32A. Similarly, between the plurality of insulating substrates 31, the second multi-stage voltage doubler rectifier circuit unit 33 mounted on each insulating substrate 31 and the second multi-stage voltage doubler rectifier circuit unit 33 mounted on adjacent insulating substrates 31 are connected by a second connection wiring 33A. In this embodiment, the arrangement of the first multi-stage voltage doubler rectifier circuit unit 32 and the second multi-stage voltage doubler rectifier circuit unit 33 is the same in each insulating substrate 31. Therefore, the first connection wiring 32A and the second connection wiring 33A are arranged at a distance without intersecting each other. [Action and effect]

[0058] In the high-voltage generation circuit unit 30 included in the high-voltage power supply 1, the second multi-stage voltage doubler rectifier circuit unit 33 boosts and rectifies the input AC voltage in an opposite phase to that of the first multi-stage voltage doubler rectifier circuit unit 32. In addition, on the insulating substrate 31, the DC arm unit 34 is arranged between the first multi-stage voltage doubler rectifier circuit unit 32 and the second multi-stage voltage doubler rectifier circuit unit 33. This causes noise superimposed on the first DC voltage and noise superimposed on the second DC voltage to cancel each other out. Therefore, noise is reduced in the combined voltage obtained by combining the first DC voltage and the second DC voltage in the DC arm unit 34. Furthermore, by arranging the first multi-stage voltage doubler rectifier circuit unit 32, the second multi-stage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 concentrically on the insulating substrate 31, it is possible to easily form a uniform electric field distribution in a direction parallel to the surface of the insulating substrate 31. This suppresses bias in the distribution of electric field strength, making it difficult for discharge to occur.

[0059] In the high-voltage power supply 1, the at least one insulating substrate may be a plurality of insulating substrates 31, the high-voltage generation circuit section 30 may be provided across the plurality of insulating substrates 31, and the plurality of insulating substrates 31 may be stacked in a direction perpendicular to the surfaces of the plurality of insulating substrates 31. In this case, it is possible to easily form a uniform electric field distribution in the height direction Hd (the direction perpendicular to the surfaces of the insulating substrates 31), and bias in the electric field strength distribution is further suppressed.

[0060] In the high-voltage power supply 1, the AC voltages input to the first multi-stage voltage doubler rectifier circuit units 32 of the respective insulating substrates 31 are in phase with each other between the respective insulating substrates 31, and the AC voltages input to the second multi-stage voltage doubler rectifier circuit units 33 of the respective insulating substrates 31 are in phase with each other between the respective insulating substrates 31. In this case, the potential difference between the respective insulating substrates 31 is constant along the height direction Hd. This further suppresses bias in the electric field strength distribution in the height direction Hd.

[0061] The high-voltage power supply 1 further includes a detection resistor circuit 37 for detecting the output voltage Vout of the high-voltage generation circuit unit 30, and the detection resistor circuit 37 is arranged in a circular shape on each of the multiple insulating substrates 31, closer to the center of the insulating substrate 31 than the first multi-stage voltage doubler rectifier circuit unit 32, or closer to the outer edge of the insulating substrate 31 than the second multi-stage voltage doubler rectifier circuit unit 33. In this case, noise is less likely to be superimposed on the detection resistor circuit 37, and the detection accuracy of the output voltage Vout can be improved.

[0062] The high-voltage power supply 1 further includes first support members 38 provided between the plurality of insulating substrates 31, and the first support members 38 are arranged between the second multi-stage voltage doubler rectifier circuit unit 33 and the detection resistor circuit 37 when viewed from the height direction Hd. In this case, since the detection resistor circuit 37 is arranged closer to the center of the insulating substrate 31 than the first support members 38, it is possible to suppress the effect of stress caused by deflection of the insulating substrate 31 on the detection resistor circuit 37, and it is possible to improve the detection accuracy of the output voltage Vout.

[0063] The high-voltage power supply 1 further includes second support members 39 disposed between the plurality of insulating substrates 31 and closer to the center of the insulating substrates 31 than the first support members 38 when viewed in the height direction Hd. The second support members 39 electrically connect the detection resistor circuits 37 mounted on each of the plurality of insulating substrates 31 to the detection resistor circuits 37 mounted on another insulating substrate 31 adjacent to the insulating substrate 31, and the second support members 39 are aligned in a straight line along the height direction Hd across the plurality of insulating substrates 31. In this case, the second support members 39 can electrically connect the detection resistor circuits 37 mounted on one insulating substrate 31 to the detection resistor circuits 37 mounted on the adjacent insulating substrate 31. Furthermore, since the second support members 39 are aligned in a straight line along the height direction Hd, the influence of stress caused by deflection of the insulating substrates 31 on the detection resistor circuits 37 can be further suppressed.

[0064] The first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 include a plurality of capacitors (third capacitor C3 to sixth capacitor C6) for each insulating substrate 31. The plurality of capacitors included in the first multistage voltage doubler rectifier circuit unit 32 are aligned with the plurality of capacitors included in the second multistage voltage doubler rectifier circuit unit 33 on a straight line A0 along the radial direction Rd of the concentric circles. In this case, it is possible to more easily cancel out noise superimposed on the first DC voltage and noise superimposed on the second DC voltage.

[0065] The first multi-stage voltage doubler rectifier circuit unit 32 and the second multi-stage voltage doubler rectifier circuit unit 33 each include a plurality of capacitors on each insulating substrate 31. The plurality of capacitors included in the first multi-stage voltage doubler rectifier circuit unit 32 are aligned with the plurality of capacitors included in the second multi-stage voltage doubler rectifier circuit unit 33 on a straight line A0 along the radial direction Rd of the concentric circles, and the detection resistor circuit 37 is spaced apart from this straight line A0 along the circumferential direction Cd of the concentric circles. In this case, noise is less likely to be superimposed on the detection resistor circuit 37.

[0066] The first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 have a first voltage doubler rectifier circuit unit 35 for each insulating substrate 31, and the first voltage doubler rectifier circuit unit 35 generates a voltage that is twice the magnitude of the input AC voltage. In this case, the first voltage doubler rectifier circuit unit 35 can reliably boost the AC voltage on each insulating substrate 31.

[0067] The first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 further include a second voltage doubler rectifier circuit unit 36 ​​for each insulating substrate 31. The first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36 ​​are connected in series to each other, and the second voltage doubler rectifier circuit unit 36 ​​generates a voltage twice the magnitude of the input AC voltage. On the insulating substrate 31, the first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36 ​​are arranged so as to be line-symmetric with each other. In this case, by arranging the first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36 ​​so as to be line-symmetric with each other, it is possible to further facilitate the formation of a uniform electric field distribution in a direction parallel to the surface of the insulating substrate 31.

[0068] The insulating substrate 31 has a through hole TH in the center thereof. In this case, for example, if the high-voltage power supply 1 is immersed in insulating oil, convection of the insulating oil is likely to occur within the through hole TH. This prevents convection of the insulating oil from occurring in a direction parallel to the surface of the insulating substrate 31. This makes it possible to prevent an increase in leakage current induced by charging due to the flow of insulating oil. Furthermore, the insulating substrate 31 can be cooled efficiently.

[0069] Each insulating substrate 31 has a through hole TH at its center, and the distance between the plurality of insulating substrates 31 is smaller than the diameter of the through hole TH. In this case, for example, when the high-voltage power supply 1 is immersed in insulating oil, convection of the insulating oil is more likely to occur within the through hole TH than between each of the plurality of insulating substrates 31 and another adjacent insulating substrate 31. This further suppresses the occurrence of convection of the insulating oil in a direction parallel to the surface of the insulating substrate 31, and allows the insulating substrate 31 to be cooled efficiently.

[0070] The first multi-stage voltage doubler rectifier circuit unit 32 and the second multi-stage voltage doubler rectifier circuit unit 33 have a first voltage doubler rectifier circuit unit 35 and a second voltage doubler rectifier circuit unit 36 ​​connected in series to each insulating substrate 31. The first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36 ​​include a first boost rectifier capacitor (third capacitor C3, fifth capacitor C5), a second boost rectifier capacitor (fourth capacitor C4, sixth capacitor C6), a first boost rectifier diode (first diode D1, fourth diode D4), a second boost rectifier diode (second diode D2, fifth diode D5), and a third boost rectifier diode (third diode D3, sixth diode D6). The DC arm unit 34 includes a third boost rectifier capacitor. The first boost rectifier diode forward connects the high-voltage electrode of the first boost rectifier capacitor to the high-voltage electrode of the second boost rectifier capacitor, and the second boost rectifier diode forward connects the high-voltage electrode of the second boost rectifier capacitor to the low-voltage electrode of the third boost rectifier capacitor. The third boost rectifier diode forward connects the high-voltage electrode of the third boost rectifier capacitor to the high-voltage electrode of the first boost rectifier capacitor. In this case, in each of the first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36, when the input voltage is positive, charge is stored in the third boost rectifier capacitor via the second boost rectifier diode. When the input voltage is negative, charge is stored in the second boost rectifier capacitor via the first boost rectifier diode. By repeating this operation, an AC voltage with a peak value twice as high as the input AC voltage is generated at the high-voltage side electrode of the second boost rectifier capacitor, and a DC voltage with a peak value twice as high as the input AC voltage is generated at the high-voltage side electrode of the third boost rectifier capacitor.

[0071] Although the embodiments of the present disclosure have been described above, the present disclosure is not necessarily limited to the above-described embodiments, and various modifications are possible without departing from the spirit of the present disclosure.

[0072] In the first to third modified examples, the laminated structure of the cathode power supply according to the modified examples will be described.

[0073] FIG. 7 is a diagram showing the stacked structure of a cathode power supply 3A according to a first modification. FIG. 8 is a schematic diagram of the capacitor arrangement in the stacked structure of the cathode power supply 3A. In the cathode power supply 3A, the multiple capacitors (third capacitor C3 to sixth capacitor C6) mounted on each insulating substrate 31 are arranged alternately along the circumferential direction Cd of the concentric circles with the multiple capacitors mounted on another insulating substrate 31 adjacent to that insulating substrate 31 in the height direction Hd. Each insulating substrate 31 has a first surface 31a and a second surface 31b opposite the first surface 31a. In the first modification, some of the multiple third capacitors C3 are mounted on the first surface 31a, and the remaining third capacitors C3 are mounted on the second surface 31b. The same applies to the fourth capacitor C4 to the sixth capacitor C6. 7 and 8 mainly illustrate the fifth capacitor C5 included in the first multi-stage voltage doubler rectifier circuit unit 32 and the sixth capacitor C6 included in the first multi-stage voltage doubler rectifier circuit unit 32. In each insulating substrate 31, among the plurality of fifth capacitors C5, some of the fifth capacitors C5 are mounted on the first surface 31a, and the remaining fifth capacitors C5 are mounted on the second surface 31b. Similarly, in each insulating substrate 31, among the plurality of sixth capacitors C6, some of the sixth capacitors C6 are mounted on the first surface 31a, and the remaining sixth capacitors C6 are mounted on the second surface 31b. As a result, the fifth capacitors C5 mounted on the first surface 31a of the insulating substrate 31 and the fifth capacitors C5 mounted on the second surface 31b of the insulating substrate 31 adjacent to the upper surface 20a along the height direction Hd of the insulating substrate 31 are alternately arranged along the circumferential direction Cd. Similarly, a sixth capacitor C6 mounted on the first surface 31a of the insulating substrate 31 and a sixth capacitor C6 mounted on the second surface 31b of the insulating substrate 31 adjacent to the upper surface 20a along the height direction Hd of the insulating substrate 31 are arranged alternately along the circumferential direction Cd.

[0074] In the cathode power supply 3A, the size of the plurality of insulating substrates 31 can be reduced or the distance between the insulating substrates 31 can be shortened, thereby enabling the size of the high-voltage power supply 1. Furthermore, compared to when all of the plurality of capacitors are mounted on only one of the first surface 31a and the second surface 31b, the space required for mounting the capacitors can be reduced, allowing the size of the plurality of insulating substrates 31 to be reduced.

[0075] FIG. 9 is a diagram showing the stacked structure of a cathode power supply 3B according to a second modification. FIG. 10 is a schematic diagram of the capacitor arrangement in the stacked structure of the cathode power supply 3B. Only differences from the cathode power supply 3A will be described. In the cathode power supply 3B, substrates on which multiple capacitors (third capacitor C3 to sixth capacitor C6) are mounted only on the first surface 31a and substrates on which multiple capacitors are mounted only on the second surface 31b may be alternately stacked. The first surface 31a of each of the multiple insulating substrates 31 faces the second surface 31b of another adjacent insulating substrate 31. The examples in FIGS. 9 and 10 mainly illustrate the fifth capacitor C5 and the sixth capacitor C6 included in the first multistage voltage doubler rectifier circuit unit 32. The multiple fifth capacitors C5 and the multiple sixth capacitors C6 are all mounted on the second surface 31b of the insulating substrate 31 located closest to the top surface 20a. On the other hand, the plurality of fifth capacitors C5 and the plurality of sixth capacitors C6 are all mounted on the first surface 31a of the insulating substrate 31 adjacent to the bottom surface 20c of the insulating substrate 31 located closest to the top surface 20a. As a result, the fifth capacitors C5 mounted on the first surface 31a of the insulating substrate 31 and the fifth capacitors C5 mounted on the second surface 31b of the insulating substrate 31 adjacent to the top surface 20a along the height direction Hd of the insulating substrate 31 are alternately arranged in the circumferential direction Cd. Similarly, the sixth capacitors C6 mounted on the first surface 31a of the insulating substrate 31 and the sixth capacitors C6 mounted on the second surface 31b of the insulating substrate 31 adjacent to the top surface 20a along the height direction Hd of the insulating substrate 31 are alternately arranged in the circumferential direction Cd.

[0076] In the cathode power supply 3B, the size of the multiple insulating substrates 31 can be reduced, or the distance between the insulating substrates 31 can be shortened, thereby making it possible to miniaturize the high-voltage power supply 1. Furthermore, since multiple capacitors are mounted only on the first surface 31a, the distance between the insulating substrates 31 can be shortened on the surface opposite to the first surface 31a. This allows the high-voltage power supply 1 to be miniaturized in the height direction Hd.

[0077] FIG. 11 is a diagram showing the stacked structure of a cathode power supply 3C according to a third modified example. FIG. 12 is an enlarged view of the wiring connection portion of the cathode power supply 3C. Only the differences from the cathode power supply 3 according to the embodiment will be described. In the description of the third modified example, for convenience, it is assumed that the first-stage insulating substrate 31A to the sixth-stage insulating substrate 31F are stacked along the height direction Hd from the top surface 20a side to the bottom surface 20c side. In the first-stage insulating substrate 31A, the third-stage insulating substrate 31C, and the fifth-stage insulating substrate 31E, when viewed from the height direction Hd, the first multi-stage voltage doubler rectifier circuit unit 32, the second multi-stage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 are arranged concentrically along the radial direction Rd from the center CP to the outer edge of the insulating substrate 31 in the order of the second multi-stage voltage doubler rectifier circuit unit 33, the DC arm unit 34, and the first multi-stage voltage doubler rectifier circuit unit 32. On the other hand, in the second-stage insulating substrate 31B, the fourth-stage insulating substrate 31D, and the sixth-stage insulating substrate 31F, when viewed from the height direction Hd, the first multi-stage voltage doubler rectifier circuit unit 32, the second multi-stage voltage doubler rectifier circuit unit 33, and the DC arm unit 34 are arranged concentrically along the radial direction Rd from the center CP to the outer edge of the insulating substrate 31 in the order of the first multi-stage voltage doubler rectifier circuit unit 32, the DC arm unit 34, and the second multi-stage voltage doubler rectifier circuit unit 33. In other words, the position of the first multi-stage voltage doubler rectifier circuit unit 32 mounted on the even-numbered insulating substrate 31 is different from the position of the first multi-stage voltage doubler rectifier circuit unit 32 mounted on the odd-numbered insulating substrate 31. Similarly, the position of the second multi-stage voltage doubler rectifier circuit unit 33 mounted on the even-numbered insulating substrate 31 is different from the position of the second multi-stage voltage doubler rectifier circuit unit 33 mounted on the odd-numbered insulating substrate 31. As a result, as shown in FIG. 12, the first connection wiring 32A and the second connection wiring 33A are arranged to intersect with each other. In the cathode power supply 3C, not only are the noise superimposed on the first DC voltage and the noise superimposed on the second DC voltage canceled out on each insulating substrate 31, but the effect of noise cancellation in the height direction Hd is also enhanced. This makes it easier to further reduce the noise of the combined voltage combined in the DC arm unit 34.

[0078] The first to third modified examples described above may be combined as appropriate. For example, the cathode power supply 3C according to the third modified example may be combined with the cathode power supply 3A according to the first modified example. In this case, the plurality of capacitors (the third capacitor C3 to the sixth capacitor C6) mounted on each insulating substrate 31 are arranged alternately with the plurality of capacitors mounted on another insulating substrate 31 adjacent to that insulating substrate 31 in the height direction Hd along the circumferential direction Cd of the concentric circles, and the position of the first multistage voltage doubler rectifier circuit unit 32 mounted on the insulating substrate 31 in the even-numbered stages may be different from the position of the first multistage voltage doubler rectifier circuit unit 32 mounted on the insulating substrate 31 in the odd-numbered stages along the height direction Hd. [Fourth and Fifth Modifications]

[0079] In the fourth and fifth modified examples, high voltage generating circuit units according to the modified examples will be described.

[0080] FIG. 13 is a circuit diagram of a high-voltage generation circuit unit 30A according to a fourth modification. Only differences from the high-voltage generation circuit unit 30 will be described. The transformer TR1A included in the high-voltage generation circuit unit 30A has a primary winding TRa, a first secondary winding TRb1, and a second secondary winding TRb2. One end of the first secondary winding TRb1 is connected to a first multi-stage voltage doubler rectifier circuit unit 32 mounted on the first-stage insulating substrate 31, and one end of the second secondary winding TRb2 is connected to a second multi-stage voltage doubler rectifier circuit unit 33 mounted on the first-stage insulating substrate 31. The other end of the first secondary winding TRb1 and the other end of the second secondary winding TRb2 are a common terminal, and the other end of the first secondary winding TRb1 and the other end of the second secondary winding TRb2 are connected to a DC arm unit 34 mounted on the first-stage insulating substrate 31.

[0081] The DC arm 34 has a first capacitor C1A and a second capacitor C2A connected in series with each other. The second capacitor C2A is connected in series with the first capacitor C1A of the DC arm 34 mounted on the adjacent insulating substrate 31 in the height direction Hd.

[0082] The first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 each have a first voltage doubler rectifier circuit unit 35 and a second voltage doubler rectifier circuit unit 36 ​​.

[0083] The first voltage doubler rectifier circuit 35 includes a third capacitor C3A, a first diode D1A, and a second diode D2A. In the first voltage doubler rectifier circuit 35, the first diode D1A connects the high-voltage electrode of the third capacitor C3A to the low-voltage electrode of the first capacitor C1A in the forward direction. The second diode D2A connects the high-voltage electrode of the first capacitor C1A to the high-voltage electrode of the third capacitor C3A in the forward direction.

[0084] The second voltage doubler rectifier circuit 36 ​​includes a fourth capacitor C4A, a third diode D3A, and a fourth diode D4A. In the first voltage doubler rectifier circuit 35, the third diode D3A forward connects the high-voltage electrode of the fourth capacitor C4A to the low-voltage electrode of the second capacitor C2A. The fourth diode D4A forward connects the high-voltage electrode of the second capacitor C2A to the high-voltage electrode of the fourth capacitor C4A.

[0085] The high-voltage electrode of the third capacitor C3A of the first voltage doubler rectifier circuit unit 35 is connected to the low-voltage electrode of the fourth capacitor C4A of the second voltage doubler rectifier circuit unit 36. Furthermore, the high-voltage electrode of the fourth capacitor C4A of the second voltage doubler rectifier circuit unit 36 ​​is connected to the low-voltage electrode of the third capacitor C3A of the first voltage doubler rectifier circuit unit 35 mounted on the insulating substrate 31 adjacent to the bottom surface 20c along the height direction Hd.

[0086] 14 is a circuit diagram of a high-voltage generation circuit unit 30B according to a fifth modification. Only the differences from the high-voltage generation circuit unit 30A will be described. The DC arm unit 34 has a first capacitor C1B and a second capacitor C2B connected in series. The second capacitor C2B is connected in series with the first capacitor C1B of the DC arm unit 34 mounted on an adjacent insulating substrate 31 in the height direction Hd.

[0087] The first multi-stage voltage doubler rectifier circuit 32 includes a third capacitor C3B, a first diode D1B, and a second diode D2B. The first diode D1B connects the high-voltage side electrode of the third capacitor C3B to the high-voltage side electrode of the first capacitor C1B in the forward direction. The second diode D2B connects the high-voltage side electrode of the second capacitor C2B to the high-voltage side electrode of the third capacitor C3B in the forward direction.

[0088] The second multi-stage voltage doubler rectifier circuit 33 includes a fourth capacitor C4B, a third diode D3B, and a fourth diode D4B. The third diode D3B forwardly connects the low-voltage electrode of the fourth capacitor C4B to the low-voltage electrode of the first capacitor C1B. The fourth diode D4B forwardly connects the high-voltage electrode of the first capacitor C1B to the low-voltage electrode of the fourth capacitor C4B.

[0089] The high-voltage electrode of the third capacitor C3B of the first multistage voltage doubler rectifier circuit unit 32 is connected to the low-voltage electrode of the third capacitor C3B of the first multistage voltage doubler rectifier circuit unit 32 mounted on the insulating substrate 31 adjacent to the bottom surface 20c along the height direction Hd. The high-voltage electrode of the fourth capacitor C4B of the second multistage voltage doubler rectifier circuit unit 33 is connected to the low-voltage electrode of the fourth capacitor C4B of the second multistage voltage doubler rectifier circuit unit 33 mounted on the insulating substrate 31 adjacent to the bottom surface 20c along the height direction Hd. The first-stage second multistage voltage doubler rectifier circuit unit 33 includes a capacitor C0B connected between one end of the second secondary winding TRb2 of the transformer TR1A and the fourth capacitor C4B. [Sixth Modification]

[0090] The high-voltage generation circuit unit may stably control the magnitude of the output voltage Vout by applying feedback. FIG. 15 is a circuit diagram of a high-voltage generation circuit unit 30C according to a sixth modification. The high-voltage generation circuit unit 30C differs from the high-voltage generation circuit unit 30 in that it includes a waveform stabilization circuit 6. The waveform stabilization circuit 6 flows a current corresponding to the magnitude of an instruction voltage generated from the detection voltage Vdet from the reference potential GND to, for example, another reference potential GND2. A set voltage Vset may be input to the waveform stabilization circuit 6 from an external control element. The waveform stabilization circuit 6 functions to stably converge the output voltage Vout to a voltage corresponding to the set voltage Vset. In the example of FIG. 15, the waveform stabilization circuit 6 is provided across a three-layer insulating substrate 31.

[0091] 16 and 17 are diagrams showing examples of circuit diagrams of the waveform stabilization circuit 6. The circuit shown in FIG. 16 and the circuit shown in FIG. 17 are combined to form the waveform stabilization circuit 6. The waveform stabilization circuit 6 is driven, for example, by a drive circuit 7. The drive circuit 7 includes an error amplifier 71, a light-emitting element 72, an optical fiber 73, and a phototransistor 74. The error amplifier 71 generates an indicator voltage Vdrc based on the difference between a set voltage Vset and a detection voltage Vdet. The light-emitting element 72 converts the indicator voltage Vdrc into optical energy. As the indicator voltage Vdrc increases, the amount of current flowing through the light-emitting element 72 increases, increasing the light emission intensity of the light-emitting element 72. The optical signal of the indicator voltage Vdrc converted into optical energy is input to the phototransistor 74 via the optical fiber 73. A first current terminal 74b of the phototransistor 74 is connected to the output terminal of the waveform stabilization circuit 6, and a second current terminal 74c of the phototransistor 74 is connected to another reference potential GND2. When an optical signal having an intensity corresponding to the command voltage Vdrc is input from the optical fiber 73, the phototransistor 74 passes a discharge current Ichg corresponding to the intensity of the optical signal from the first current terminal 74b to the second current terminal 74c.

[0092] The waveform stabilization circuit 6 includes, for each insulating substrate 31, a plurality of transistors Q1 to Q12, a plurality of dividing resistors RL1 to RL12, a plurality of gate resistors RG1 to RG12, and a plurality of pairs of Zener diodes ZN1 to ZN12. The number of each element is not limited to the examples shown in FIGS. 16 and 17. The plurality of transistors Q1 to Q12 are cascade-connected to each other. The plurality of dividing resistors RL1 to RL12 are connected in series to each other, and the input terminals of the plurality of transistors Q1 to Q12 are connected between adjacent resistors of the plurality of dividing resistors RL1 to RL12. A dividing resistor RL0 is connected between the dividing resistor RL1 on the top insulating substrate 31 and a reference potential GND1. The plurality of gate resistors RG1 to RG12 are connected between nodes between adjacent resistors of the plurality of dividing resistors RL1 to RL12 and the input terminals of the plurality of transistors Q1 to Q12. Pairs of Zener diodes ZN1 to ZN12 are connected between the first and second current terminals of the transistors Q1 to Q12, respectively. The first current terminal of the uppermost transistor Q1 on the uppermost insulating substrate 31 is connected to the reference potential GND1. The second current terminal of the lowermost transistor Q12 on the lowermost insulating substrate 31 is connected to the first current terminal 74b of the phototransistor 74.

[0093] A voltage obtained by dividing the output voltage Vout by a plurality of dividing resistors RL1 to RL12 is input to each input terminal of the plurality of transistors Q1 to Q12. In other words, a bias voltage is applied to the plurality of transistors Q1 to Q12. As a result, each of the plurality of transistors Q1 to Q12 is driven in its saturation region. In this state, when an optical signal corresponding to the command voltage Vdrc is input to the phototransistor 74, a discharge current Ichg having a magnitude proportional to the command voltage Vdrc flows through the waveform stabilization circuit 6. The discharge current Ichg flows from the input terminal of the waveform stabilization circuit 6 (the first current terminal of the uppermost transistor Q1 on the uppermost insulating substrate 31) to the second current terminal 74c of the phototransistor 74. In other words, the discharge current Ichg flows from the reference potential GND1 to another reference potential GND2.

[0094] Next, an example of the arrangement of the waveform stabilization circuit 6 on the insulating substrate 31 will be described. FIG. 18 is a diagram showing an example of the arrangement of the topmost insulating substrate 31 when the waveform stabilization circuit 6 is included. The waveform stabilization circuit 6 mounted on each insulating substrate 31 is electrically connected to the waveform stabilization circuit 6 mounted on another insulating substrate 31 adjacent to that insulating substrate via a fourth support member 41. The waveform stabilization circuit 6 is arranged between the input-side fourth support member 41 and the output-side fourth support member 41 in the circumferential direction Cd. The waveform stabilization circuit 6 is arranged between the second multi-stage voltage doubler rectifier circuit unit 33 and the detection resistor circuit 37 in the radial direction Rd. The multiple transistors Q1 to Q12 are arranged so as to be equally spaced from one another in the circumferential direction Cd. The multiple dividing resistors RL1 to RL12 are arranged so as to be equally spaced from one another in the circumferential direction Cd. The multiple gate resistors RG1 to RG12 are arranged so as to be equally spaced from one another in the circumferential direction Cd. The plurality of transistors Q1 to Q12, the plurality of dividing resistors RL1 to RL12, and the plurality of gate resistors RG1 to RG12 are not arranged in a straight line in the radial direction Rd. In the second and subsequent insulating substrates 31, the waveform stabilization circuits 6 are arranged in the same manner as in the top layer.

[0095] In the cathode power supply 3 including the waveform stabilization circuit 6, the charge accumulated in the capacitance within the power supply is discharged by flowing a current through the waveform stabilization circuit 6. This makes it possible to more stably reduce overshoots that occur in the output voltage Vout, for example. Furthermore, as shown in FIG. 18, by placing the waveform stabilization circuit 6 between the second multi-stage voltage doubler rectifier circuit unit 33 and the detection resistor circuit 37, noise is less likely to be superimposed, enabling stable operation.

[0096] The arrangement of the waveform stabilization circuit 6 on the insulating substrate 31 may be changed from the example shown in FIG. 18 . For example, by suppressing the potential difference between the waveform stabilization circuit 6 and the second multi-stage voltage doubler rectifier circuit unit 33, discharge can be suppressed, and more stable operation of the waveform stabilization circuit 6 can be achieved. FIG. 19 is a graph showing an example of the transition of the potential of the second multi-stage voltage doubler rectifier circuit unit 33. The horizontal axis indicates the position of the second multi-stage voltage doubler rectifier circuit unit 33 in degrees. The input terminal of the second multi-stage voltage doubler rectifier circuit unit 33 on the insulating substrate 31 is set to 0°, and the output terminal of the second multi-stage voltage doubler rectifier circuit unit 33 is set to 360°. Assuming that multiple insulating substrates 31 are stacked in six layers, up to 2160° is shown. The vertical axis indicates the potential corresponding to the position of the second multi-stage voltage doubler rectifier circuit unit 33. 19 indicates the transition of the potential of the second multistage voltage doubler rectifier circuit unit 33, and the solid line indicates the intermediate potential VP1, which is a line connecting the midpoints of these potentials. For example, by changing the arrangement of the waveform stabilization circuit 6 on the insulating substrate 31 so that the potential of the waveform stabilization circuit 6 approaches the intermediate potential VP1, more stable operation of the waveform stabilization circuit 6 can be achieved.

[0097] Fig. 20 is a graph comparing the potential VP2 and intermediate potential VP1 of the waveform stabilization circuit 6 in the arrangement example shown in Fig. 18. It can be said that the potential VP2 fluctuates greatly when switching from the second insulating substrate 31 to the third insulating substrate 31 (at an angle of 720°) and when switching from the fourth insulating substrate 31 to the fifth insulating substrate 31 (at an angle of 1440°).

[0098] Therefore, the layout of the waveform stabilization circuit 6 on the insulating substrate 31 may be changed as shown in FIGS. 21 and 22 . FIG. 21 is a diagram showing an example of the layout of the front surface of the top insulating substrate 31 after the layout change. FIG. 22 is a diagram showing an example of the layout of the rear surface of the top insulating substrate 31 after the layout change. In the layout example shown in FIG. 21 , the number of each element of the multiple transistors, multiple dividing resistors, and multiple gate resistors is reduced compared to the layout example shown in FIG. 18 , with nine of each element being provided. In the layout example shown in FIG. 21 , the multiple transistors Q1 to Q9 are arranged so that their spacing is random in the circumferential direction Cd. The multiple dividing resistors RL1 to RL9 are arranged so that their spacing is random in the circumferential direction Cd. The multiple gate resistors RG1 to RG9 are arranged so that their spacing is random in the circumferential direction Cd. The multiple transistors Q1 to Q9 and the multiple dividing resistors RL1 to RL9 are aligned linearly and overlapping in the radial direction Rd. 21 and 22, the waveform stabilization circuit 6 is mounted on the surface of the top insulating substrate 31. The arrangement of the waveform stabilization circuit 6 on the third insulating substrate 31 and the fifth insulating substrate 31 is the same as that on the first layer.

[0099] FIG. 23 shows an example of the layout of the front surface of the second-layer insulating substrate 31 after the layout change. FIG. 24 shows an example of the layout of the rear surface of the second-layer insulating substrate 31 after the layout change. Compared to the top-layer insulating substrate 31, the number of each element of the multiple transistors, multiple divider resistors, and multiple gate resistors has increased. In the example of FIG. 24, there are 15 transistors, 15 divider resistors, and 14 gate resistors. In the second-layer insulating substrate 31, the waveform stabilization circuit 6 is mounted on the rear surface. Furthermore, the multiple transistors Q1 to Q15, the multiple divider resistors RL1 to RL14, and the multiple gate resistors RG1 to RG15 may have densely arranged portions and sparsely arranged portions in the circumferential direction Cd. The multiple transistors Q1 to Q15, the multiple divider resistors RL1 to RL14, and the multiple gate resistors RG1 to RG15 may be densely arranged in a portion of the circumferential direction Cd where the potential is low and sparsely arranged in a portion of the circumferential direction Cd where the potential is high. 23 and 24 , the number of waveform stabilization circuits 6 arranged on the first voltage doubler rectifier circuit unit 35 side is greater than the number arranged on the second voltage doubler rectifier circuit unit 36 ​​side. The arrangement of the waveform stabilization circuits 6 on the fourth insulating substrate 31 and the bottom (sixth) insulating substrate 31 is the same as the arrangement on the second layer.

[0100] 25 is a graph comparing the potential VP3 and intermediate potential VP1 of the waveform stabilization circuit 6 in the arrangement examples shown in FIGS. 21 to 24. The potential difference between potential VP3 and intermediate potential VP1 is smaller than the potential difference between potential VP2 and intermediate potential VP1 over the entire angle range. In particular, it can be said that potential fluctuations are suppressed when switching from the second insulating substrate 31 to the third insulating substrate 31 (at an angle of 720°) and when switching from the fourth insulating substrate 31 to the fifth insulating substrate 31 (at an angle of 1440°).

[0101] In the layout examples shown in FIGS. 21 to 24, the layout of the detection resistor circuit 37 is also changed from the layout example in FIG. 18. Specifically, the layout of the detection resistor circuit 37 is shifted by 45° in the circumferential direction Cd from the layout example in FIG. 18. In the insulating substrate 31 on the top layer, the resistor R4 is deleted. In the insulating substrate 31 on the second layer, a resistor R5 is added. Additionally, in the layout examples shown in FIGS. 21 to 24, the detection resistor circuit 37 is mounted on the back surface. FIG. 26 is a graph comparing the potential VP4 and the intermediate potential VP1 of the detection resistor circuit 37. It can be said that optimizing the layout of the detection resistor circuit 37 keeps the potential difference between the potential VP4 and the intermediate potential VP1 small. This enables even more stable operation of the waveform stabilization circuit 6 to be achieved. [Other Modifications]

[0102] In the embodiment, the cathode power supply 3 is included in the oil-immersion unit 2, but the cathode power supply 3 may be molded with insulating resin. For example, the high-voltage generation circuit unit 30 may be resin-molded on each insulating substrate 31. The insulating substrate 31 may have a shape other than a circle when viewed from the height direction Hd. The insulating substrate 31 may have, for example, a rectangular shape when viewed from the height direction Hd. Each of the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33 may have only one of the first voltage doubler rectifier circuit unit 35 and the second voltage doubler rectifier circuit unit 36. In this case, only the first voltage doubler rectifier circuit unit 35 in the first multistage voltage doubler rectifier circuit unit 32 and the first voltage doubler rectifier circuit unit 35 in the second multistage voltage doubler rectifier circuit unit 33 may be mounted on one side of the center CP on each insulating substrate 31. Alternatively, only the first voltage doubler rectifier circuit unit 35 in the first multistage voltage doubler rectifier circuit unit 32 and the second voltage doubler rectifier circuit unit 36 ​​in the second multistage voltage doubler rectifier circuit unit 33 may be mounted on each insulating substrate 31 so as to be linearly symmetrical with each other.

[0103] The detection resistor circuit 37 may be arranged in a circular shape closer to the outer edge of the insulating substrate 31 than the first multi-stage voltage doubler rectifier circuit unit 32. The detection resistor circuit 37 may also be arranged closer to the center CP than the third support member 40. Even in this case, the effect of stress caused by deflection of the insulating substrate 31 on the detection resistor circuit 37 can be suppressed, thereby improving the detection accuracy of the output voltage Vout. The detection resistor circuit 37 does not necessarily have to be mounted on each insulating substrate 31. For example, it may be mounted only on the insulating substrate 31 closest to the top surface 20a among the multiple insulating substrates 31. The detection resistor circuit 37 may include five or more resistors. However, it is conceivable that the resistance value of the detection resistor circuit 37 may become larger than the creepage resistance of each insulating substrate 31, or that it may detect even minute noise that does not need to be detected. Therefore, it is preferable to set the resistance value of the detection resistor circuit 37 to approximately 10 gigaohms to 20 gigaohms. [Experimental Example]

[0104] An example of the results of an electric field analysis performed on a cathode power supply 3 according to an embodiment of the present disclosure will be described. FIG. 27 is a diagram illustrating an example of a model for electric field analysis of the cathode power supply 3. FIG. 27( a) is an example of a cross-sectional image of the cathode power supply 3 cut along a plane defined by the radial direction Rd and the height direction Hd. FIG. 27( b) is an example of an electric field analysis model in which only the cross-sectional portion of the cross-sectional image is displayed as a two-dimensional image. An electric field analysis was performed on the electric field analysis model shown in FIG. 27( b). FIG. 28( a) is an example of the results of an electric field analysis performed on the cathode power supply 3 according to the present embodiment. FIG. 28( b) is an example of the results of an electric field analysis performed on a cathode power supply according to a comparative example. In the cathode power supply according to the comparative example, the phase of the AC voltage input to the first multistage voltage doubler rectifier circuit unit 32 is the same as the phase of the AC voltage input to the second multistage voltage doubler rectifier circuit unit 33. Otherwise, it is the same as the cathode power supply 3 according to the embodiment. In FIG. 28, lighter colors indicate stronger electric field strength, and darker colors indicate weaker electric field strength. As shown in FIGS. 28(a) and 28(b), the electric field strength increases toward the bottom surface 20c for both the cathode power supply 3 according to this embodiment and the cathode power supply according to the comparative example. However, the cathode power supply according to the comparative example has a stronger electric field strength than the cathode power supply 3 according to this embodiment. It can be seen that the cathode power supply 3 according to this embodiment has less bias in the electric field strength distribution than the cathode power supply according to the comparative example. In the cathode power supply 3 according to this embodiment, it was shown that the electric field is canceled between the first multistage voltage doubler rectifier circuit unit 32 and the second multistage voltage doubler rectifier circuit unit 33.

[0105] 1...High voltage power supply, 30, 30A, 30B...High voltage generation circuit section, 31...Insulating substrate, 31a...First surface, 31b...Second surface, 32...First multi-stage voltage doubler rectifier circuit section, 33...Second multi-stage voltage doubler rectifier circuit section, 35...First voltage doubler rectifier circuit section, 36...Second voltage doubler rectifier circuit section, 34...DC arm section, 37...Detection resistor circuit, 38...First support member, 39...Second support member, C1...First capacitor (third boost rectifier capacitor), C2...Second capacitor (third boost rectifier capacitor), C3...Third capacitor (first boost rectifier capacitor), C5...Fifth capacitor (first boost rectifier capacitor) capacitor), C4...fourth capacitor (second boost rectifier capacitor), C6...sixth capacitor (second boost rectifier capacitor), Cd...circumferential direction, D1...first diode (first boost rectifier diode), D4...fourth diode (first boost rectifier diode), D2...second diode (first boost rectifier diode), D5...fifth diode (second boost rectifier diode), D3...third diode (first boost rectifier diode), D6...sixth diode (third boost rectifier diode), Hd...height direction (vertical direction), Rd...radial direction, TH...through hole, Vout...output voltage.

Claims

1. A power supply comprising: at least one insulating substrate; and a high-voltage generation circuit unit formed on the at least one insulating substrate, wherein the high-voltage generation circuit unit comprises: a first multi-stage voltage-doubler rectifier circuit unit that generates a first DC voltage by boosting and rectifying an input AC voltage; a second multi-stage voltage-doubler rectifier circuit unit that generates a second DC voltage by boosting and rectifying the input AC voltage in an opposite phase to that of the first multi-stage voltage-doubler rectifier circuit unit; and a DC arm unit that combines the first DC voltage and the second DC voltage, wherein the first multi-stage voltage-doubler rectifier circuit unit, the second multi-stage voltage-doubler rectifier circuit unit, and the DC arm unit are concentrically arranged on the insulating substrate, and the DC arm unit is arranged between the first multi-stage voltage-doubler rectifier circuit unit and the second multi-stage voltage-doubler rectifier circuit unit, The second multi-stage voltage doubler rectifier circuit is arranged closer to the center of the insulating substrate than the first multi-stage voltage doubler rectifier circuit unit.

2. The high-voltage power supply according to claim 1, wherein the at least one insulating substrate comprises a plurality of insulating substrates, the high-voltage generating circuit section is provided across the plurality of insulating substrates, and the plurality of insulating substrates are stacked in a direction perpendicular to the surfaces of the plurality of insulating substrates.

3. The high-voltage power supply according to claim 2, wherein the AC voltages input to the first multi-stage voltage doubler rectifier circuit unit of each of the plurality of insulating substrates are in phase with each other between the plurality of insulating substrates, and the AC voltages input to the second multi-stage voltage doubler rectifier circuit unit of each of the plurality of insulating substrates are in phase with each other between the plurality of insulating substrates.

4. The high-voltage power supply according to claim 2 or 3, wherein each of the first multi-stage voltage doubler rectifier circuit section, the second multi-stage voltage doubler rectifier circuit section, and the DC arm section includes a plurality of capacitors for each of the insulating substrates, and each of the plurality of capacitors provided on each insulating substrate is arranged alternately along the circumferential direction of the concentric circles with each of the plurality of capacitors provided on another insulating substrate adjacent to the insulating substrate in the perpendicular direction.

5. The high-voltage power supply according to claim 4, wherein each of the plurality of insulating substrates has a first surface and a second surface opposite to the first surface, and some of the plurality of capacitors are mounted on the first surface, and the remaining capacitors except for the some of the capacitors are mounted on the second surface.

6. The high-voltage power supply according to claim 4, wherein each of the plurality of insulating substrates has a first surface, the plurality of capacitors are mounted only on the first surface, and the first surface of each of the plurality of insulating substrates faces the first surface of another of the adjacent insulating substrates.

7. The high-voltage power supply according to any one of claims 2 to 6, further comprising a detection resistor circuit for detecting the output voltage of the high-voltage generation circuit section, wherein the detection resistor circuit is arranged in a circular shape on each of the plurality of insulating substrates, closer to the center of the insulating substrate than the second multi-stage voltage doubler rectifier circuit section, or closer to the outer edge of the insulating substrate than the first multi-stage voltage doubler rectifier circuit section.

8. The high-voltage power supply according to claim 7, further comprising a first support member provided between the plurality of insulating substrates, the first support member being disposed between the first multi-stage voltage doubler rectifier circuit unit and the detection resistor circuit when viewed in the perpendicular direction.

9. The high-voltage power supply according to claim 8, further comprising second support members arranged between the plurality of insulating substrates and positioned closer to the center of the insulating substrates than the first support members when viewed in the perpendicular direction, the second support members electrically connecting the detection resistor circuits mounted on each of the plurality of insulating substrates to the detection resistor circuits mounted on another insulating substrate adjacent to the insulating substrate in question, and the second support members are arranged in a straight line along the perpendicular direction across the plurality of insulating substrates.

10. The high-voltage power supply according to any one of claims 2 to 9, wherein the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit include a plurality of capacitors for each of the insulating substrates, and each of the plurality of capacitors included in the first multi-stage voltage doubler rectifier circuit unit is aligned with each of the plurality of capacitors included in the second multi-stage voltage doubler rectifier circuit unit on a straight line along the radial direction of the concentric circles.

11. The high-voltage power supply according to claim 7, wherein the first multi-stage voltage doubler rectifier circuit unit and the second multi-stage voltage doubler rectifier circuit unit include a plurality of capacitors for each of the insulating substrates, each of the plurality of capacitors included in the first multi-stage voltage doubler rectifier circuit unit is aligned with each of the plurality of capacitors included in the second multi-stage voltage doubler rectifier circuit unit on a straight line along the radial direction of the concentric circle, and the detection resistor circuit is arranged at a distance from the straight line along the circumferential direction of the concentric circle.

12. The high-voltage power supply according to any one of claims 2 to 11, wherein the first multistage voltage doubler rectifier circuit unit and the second multistage voltage doubler rectifier circuit unit have a first voltage doubler rectifier circuit unit for each of the insulating substrates, and the first voltage doubler rectifier circuit unit generates a voltage that is twice the magnitude of the input AC voltage.

13. The high-voltage power supply according to claim 12, wherein the first multistage voltage doubler rectifier circuit unit and the second multistage voltage doubler rectifier circuit unit further include a second voltage doubler rectifier circuit unit for each of the insulating substrates, the first voltage doubler rectifier circuit unit and the second voltage doubler rectifier circuit unit are connected in series with each other, the second voltage doubler rectifier circuit unit generates a voltage that is twice the magnitude of the input AC voltage, and the first voltage doubler rectifier circuit unit and the second voltage doubler rectifier circuit unit are arranged on the insulating substrate so as to be line-symmetrical with each other.

14. A high-voltage power supply according to any one of claims 1 to 13, wherein the insulating substrate has a through-hole in the center of the insulating substrate.

15. A high-voltage power supply according to any one of claims 2 to 13, wherein the insulating substrate has a through-hole at the center thereof, and the distance between the insulating substrates is smaller than the diameter of the through-hole.

16. The first multistage voltage doubler rectifier circuit unit and the second multistage voltage doubler rectifier circuit unit have two voltage doubler rectifier circuit units connected in series to each other for each insulating substrate, each of the two voltage doubler rectifier circuit units including a first boost rectifier capacitor, a second boost rectifier capacitor, a first boost rectifier diode, a second boost rectifier diode, and a third boost rectifier diode, the DC arm includes a third boost rectifier capacitor, the first boost rectifier diode connects a high-voltage side electrode of the first boost rectifier capacitor to a high-voltage side electrode of the second boost rectifier capacitor in a forward direction, and the second boost rectifier diode connects a high-voltage side electrode of the second boost rectifier capacitor to a low-voltage side electrode of the third boost rectifier capacitor in a forward direction, The third boost rectifier diode connects a high-voltage side electrode of the third boost rectifier capacitor and a high-voltage side electrode of the first boost rectifier capacitor in a forward direction. The high-voltage power supply according to any one of claims 1 to 15.

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