Power module and power device

Abstract

Provided in the present application are a power module and a power device. The power module comprises a substrate, a first pre-packaged body, a first metal lead-out layer and a plastic packaging body, wherein the substrate, the first pre-packaged body and the first metal lead-out layer are sequentially stacked in a first direction, and the plastic packaging body packages the substrate, the first pre-packaged body and the first metal lead-out layer. The first pre-packaged body comprises a first chip, a first trace layer and an insulating medium, wherein the first chip and the first trace layer are stacked and are both located in the insulating medium; the first chip is located between the substrate and the first trace layer in the first direction; the first trace layer is electrically connected to the first chip; and the first trace layer is electrically connected to the first metal lead-out layer. Since an embedded first pre-packaged body is used, a reduction in the parasitic inductance and parasitic resistance inside a power module is facilitated. By means of providing the first metal lead-out layer, electrical interconnection outside the power module is realized, thereby facilitating an improvement in the layout flexibility of electrical connection points of the power module.

Description

Power module and power device

[0001] The present application claims priority to the Chinese patent application No. 202410882178.7, filed on July 2, 2024, and entitled "Power module and power device", the whole content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the technical field of electronic products, in particular to a power module and a power device. BACKGROUND

[0003] The power module is widely used in the industry due to its high integration, small average area, simplified processing, easy application, and better product performance. The elements in the power module are usually plastic encapsulated by a plastic encapsulation body, and the elements inside the power module are electrically connected by wire bonding. However, the electrical connection by wire bonding can easily cause large parasitic inductance of the power module. SUMMARY

[0004] The present application provides a power module and a power device capable of reducing parasitic inductance.

[0005] In a first aspect, the present application provides a power module, comprising a substrate, a first pre-encapsulation body, a first metal lead-out layer, and a plastic encapsulation body. The substrate, the first pre-encapsulation body, and the first metal lead-out layer are sequentially stacked along a first direction, and the plastic encapsulation body encapsulates the substrate, the first pre-encapsulation body, and the first metal lead-out layer. The surface of the first metal lead-out layer facing away from the first pre-encapsulation body is at least partially exposed from the plastic encapsulation body. The first pre-encapsulation body comprises a first chip, a first trace layer, and an insulating medium. The first chip is electrically connected to the substrate, and the first chip and the first trace layer are stacked and located in the insulating medium. The first chip is located between the substrate and the first trace layer along the first direction. The first trace layer is electrically connected to the first chip, and the first trace layer is electrically connected to the first metal lead-out layer.

[0006] The power module provided by the present application has the first chip and the first trace layer stacked and located in the insulating medium, i.e., the first pre-encapsulation body is a buried embedding type first pre-encapsulation body. Since the first trace layer is used to electrically connect the first chip and the first metal lead-out layer, it is beneficial to reduce the parasitic inductance and parasitic resistance of the power loop in which the power module works, thereby reducing the oscillation and improving the working efficiency of the power module and reducing the electrical stress.

[0007] In addition, the first chip and the like are embedded in the insulating medium by the embedding process to form a first pre-packaging body in a module mode, which is beneficial to improve the integration of the power module. When the power module needs to be prepared, the first pre-packaging body can be directly mounted on the substrate, thereby simplifying the preparation steps of the power module.

[0008] The first metal lead layer is at least partially exposed from the surface of the first pre-packaging body in the first direction, which means that at least part of the first metal lead layer is not covered by the plastic packaging body in the first direction away from the surface of the first pre-packaging body. In this way, the power module forms an electrical connection point on the side away from the substrate in the first direction, which can realize the electrical interconnection between the power module and the outside of the power module, for example, by electrically connecting the electrical connection point in the first direction with a circuit board or other electronic device, thereby improving the layout flexibility of the electrical connection point of the power module and facilitating the electrical interconnection between the power module and the outside. The power module can also be electrically led out in a second direction perpendicular to the first direction without setting a pin or the like as an electrical connection point, which is beneficial to reduce the length occupied by the power module in the second direction.

[0009] Furthermore, the first metal lead layer has a large area due to the use of a metal layer, which is beneficial to lead out the heat generated by the first chip and the like in the first pre-packaging body to the outside of the power module, thereby improving the heat dissipation efficiency of the power module.

[0010] According to the first aspect, in this possible implementation manner, the first pre-packaging body further includes a second chip located in the insulating medium, the first chip and the second chip are arranged in a second direction perpendicular to the first direction, the first wiring layer is located on the side of the second chip away from the substrate, the first wiring layer is electrically connected with the second chip, the second chip is electrically connected with the substrate, and the first metal lead layer is electrically connected with the side of the second chip away from the substrate.

[0011] In this possible implementation manner, the first pre-packaging body further embeds the second chip, that is, the first pre-packaging body supports at least two chip application scenarios. The second chip can also be electrically led out in the first direction through the first metal lead layer.

[0012] According to a first aspect, in a possible implementation manner, the first chip and the second chip each include a drain and a source, the drain of the first chip is arranged at a surface of the first chip facing away from the substrate, and the source of the first chip is arranged at a surface of the first chip facing the substrate; the drain of the second chip is arranged at a surface of the second chip facing the substrate, and the source of the second chip is arranged at a surface of the second chip facing away from the substrate; the first wiring layer is connected to the drain of the first chip and to the source of the second chip, and the part of the first wiring layer between the drain of the first chip and the source of the second chip is used to form a switching dynamic point of the power module. The wiring layer on the side of the substrate facing the first pre-packaged body includes a first wiring part and a second wiring part, the first wiring part is electrically connected to the source of the first chip, and the second wiring part is electrically connected to the drain of the second chip; the side of the substrate facing away from the first pre-packaged body is used to be connected to the metal heat sink, and the first electrode lead-out layer is used to be electrically connected to the circuit board.

[0013] When the power module is applied in a photovoltaic optimizer, if the metal shell is grounded, relatively complex wiring is generally involved, resulting in high cost and difficult maintenance, so the industry usually omits the grounding line. However, if the metal shell is not grounded, the power module inside will generate a large dv / dt and di / dt in the process of turning on and off, which enhances electromagnetic noise and causes the electromagnetic compatibility (EMC) to deteriorate, reducing reliability.

[0014] The part of the first wiring layer between the drain of the first chip and the source of the second chip is used to form a switching dynamic point of the power module. The switching dynamic point refers to a point where the potential relative to ground will change abruptly. The first wiring part is electrically connected to the source of the first chip, and the second wiring part is electrically connected to the drain of the second chip, so the first wiring part and the second wiring part are electrically connected to a switching static point.

[0015] In the possible implementation, the drain of the first chip is arranged on the surface of the first chip away from the substrate, and the drain of the second chip is arranged on the surface of the second chip facing the substrate, that is, the first chip and the second chip are arranged on the substrate in a positive-negative manner, so that the switch moving point is arranged on the side of the first chip away from the substrate, and the switch static point is arranged on the side of the first chip and the second chip facing the substrate. In the process of turning on and turning off the first chip, the first wiring layer (moving point) connected with the first chip forms a charging and discharging capacitor between the metal shell of the photovoltaic optimizer or other metal layers, thereby generating electromagnetic noise. However, in the process of turning on and turning off the second chip, the second wiring part (static point) connected with the drain of the second chip does not form a charging and discharging capacitor between the metal shell of the photovoltaic optimizer or other metal layers, thereby not generating electromagnetic noise. The wiring layer, while being electrically connected with the first pre-packaged body, also serves as an electromagnetic shielding layer between the first wiring layer and the metal shell, which can improve the reliability of the power module. Since no additional electromagnetic shielding layer, such as an aluminum plate, is needed, the structure of the power module is simplified, the thickness of the power module in the first direction is reduced, and the integration of the power module is improved.

[0016] In addition, the heat generated by the first pre-packaged body is directly conducted to the metal shell through the substrate for heat dissipation, and compared with the power module provided with a uniform aluminum plate and a heat-conducting glue, the heat dissipation path is shorter, which is conducive to improving the heat dissipation efficiency of the power module and simplifying the heat dissipation link of the power module.

[0017] According to the first aspect, in a possible implementation, the first chip and the second chip each further include a gate, the gate of the first chip is arranged on the side of the first chip facing the substrate, and the gate of the second chip is arranged on the side of the second chip away from the substrate. The wiring layer further includes a third wiring part electrically connected with the gate of the first chip. The first wiring layer includes a first connecting part and a second connecting part spaced apart, the first connecting part is electrically connected between the drain of the first chip and the source of the second chip, and the second connecting part is electrically connected with the gate of the second chip. The first metal lead-out layer includes a first lead-out part and a second lead-out part arranged spaced apart, the first lead-out part is electrically connected with the first connecting part, and the second lead-out part is electrically connected with the second connecting part.

[0018] In the possible implementation, the switch moving point is electrically led out in the first direction through the first lead-out part, and the gate of the second chip is electrically led out in the first direction through the second lead-out part, which is conducive to improving the layout flexibility of the electrical connection points of the power module and facilitating the electrical interconnection between the power module and the external.

[0019] According to the first aspect, in a possible implementation manner, the soldering layer is arranged between the first lead-out part and the first connecting part, and between the second lead-out part and the second connecting part, the power module further comprises a solder resist layer, the solder resist layer covers a surface of the first pre-packaging body away from the substrate, and at least part of the solder resist layer is located between the first connecting part and the second connecting part. The plastic package further encapsulates the soldering layer and the solder resist layer.

[0020] In this possible implementation manner, the solder resist layer is used to play a solder resist role when the first connecting part and the first lead-out part, and the second connecting part and the second lead-out part are connected through a soldering process, and the solder resist layer can block the electrical connection between the first connecting part and the second connecting part.

[0021] According to the first aspect, in a possible implementation manner, the first pre-packaging body further comprises a second wiring layer, the second wiring layer is located in the insulating medium, the second wiring layer is arranged on a side of the first chip facing the substrate, the second wiring layer comprises a first part and a second part, the first part is electrically connected between the source electrode of the first chip and the first wiring part, and the second part is electrically connected between the drain electrode of the second chip and the second wiring part.

[0022] In this possible implementation manner, while realizing the electrical connection between the first pre-packaging body and the substrate, the second wiring layer and the wiring layer can form a double-layer electromagnetic shielding layer, which is beneficial to enhance the electromagnetic shielding capability between the metal shell and the switch moving point, thereby further enhancing the reliability of the power module.

[0023] In this possible implementation manner, the first pre-packaging body further comprises a first metal layer located in the insulating medium, the first metal layer is located between the second chip and the second wiring layer in the first direction, and the first metal layer is electrically connected between the second chip and the second wiring layer.

[0024] In this possible implementation manner, the first metal layer is located between the second chip and the second wiring layer in the first direction and is attached to the second wiring layer, and the arrangement of the first metal layer increases the heat diffusion area, thereby being beneficial to improve the heat dissipation performance of the power module.

[0025] According to the first aspect, in a possible implementation manner, the first pre-packaging body further comprises a second metal layer located in the insulating medium, the second metal layer is located between the first chip and the first wiring layer in the first direction, and the second metal layer is electrically connected between the first wiring layer and the first chip.

[0026] In this possible implementation manner, the second metal layer is arranged between the first wiring layer and the first chip, and the second metal layer increases the diffusion area, thereby being beneficial to improve the heat dissipation performance of the power module.

[0027] According to the first aspect, in a possible implementation manner, the insulating medium is provided with a first connecting hole located on the side of the first chip away from the substrate, the first connecting hole is filled with a metal material, and the metal material in the first connecting hole is electrically connected between the first wiring layer and the first chip.

[0028] In the possible implementation manner, the electrical connection between the first wiring layer and the first chip is achieved by providing the insulating medium with the blind hole type first connecting hole.

[0029] According to the second aspect, the application provides a power device, which comprises a circuit board and the power module according to the first aspect and any possible implementation manner thereof, and the first metal lead-out layer is at least partially exposed outside the plastic package in the first direction away from the surface of the first pre-packaged body and is electrically connected to the circuit board.

[0030] The power device provided by the application has improved flexibility of electrical connection between the power module and the circuit board, because the first metal lead-out layer is at least partially exposed outside the plastic package in the first direction away from the surface of the first pre-packaged body. The electrical connection point is arranged on the surface of the power module in the first direction, so that the power module in the second direction is not occupied, which is beneficial to miniaturization of the power device.

[0031] According to the second aspect, in the possible implementation manner, the power device further comprises a metal shell connected to the side of the substrate away from the circuit board.

[0032] In the possible implementation manner, the metal shell is used for heat dissipation of the power module and the circuit board, and the reliability of the power device is improved.

[0033] According to the second aspect, in the possible implementation manner, the power module further comprises a pin, a part of the pin is located in the plastic package and is electrically connected to the substrate, another part of the pin protrudes outside the plastic package from the surface of the power module in the second direction and is electrically connected to the circuit board, and the second direction is perpendicular to the first direction. A soldering layer is arranged between the pin and the circuit board, or the circuit board is provided with a plug-in hole, and the pin is plugged into the plug-in hole.

[0034] In the possible implementation manner, the pin is led out in the second direction of the power module, which facilitates electrical connection between the substrate and the circuit board.

[0035] According to the second aspect, in the possible implementation manner, the power device is a photovoltaic optimizer.

[0036] In a third aspect, the embodiments of the present application provide a power module, comprising a substrate, a first pre-packaging body and a plastic packaging body. The substrate and the first pre-packaging body are arranged in a stack along a first direction, and the plastic packaging body encapsulates the substrate and the first pre-packaging body. The first pre-packaging body comprises a first chip, a first trace layer and an insulating medium. The first chip and the first trace layer are stacked and both are located in the insulating medium. The first chip is located between the substrate and the first trace layer along the first direction, and the first trace layer is electrically connected with the first chip.

[0037] The power module provided by the present application has the first chip and the first trace layer stacked and both located in the insulating medium, i.e., the first pre-packaging body is a buried embedded first pre-packaging body. Since the first trace layer is used to realize the electrical connection between the first chip and the first metal lead layer, it is beneficial to reduce the parasitic inductance and parasitic resistance inside the power module.

[0038] In addition, the first chip, the first trace layer and other devices are embedded in the insulating medium through a buried embedding process to form a module type first pre-packaging body, which is beneficial to improve the integration of the power module. When the power module needs to be prepared, the first pre-packaging body can be directly installed on the substrate, which simplifies the preparation steps of the power module. BRIEF DESCRIPTION OF DRAWINGS

[0039] FIG. 1 is a schematic diagram of an application scene of a power device provided by an embodiment of the present application applied to a photovoltaic system;

[0040] FIG. 2 is a schematic diagram of a stack structure of a first power device provided by a first embodiment of the present application;

[0041] FIG. 3 is an enlarged schematic diagram of a local area A of FIG. 2;

[0042] FIG. 4 is a schematic diagram of a circuit topology of the connection between the first power device and a photovoltaic module;

[0043] FIG. 5 is an enlarged schematic diagram of a local area B of FIG. 2;

[0044] FIG. 6 is a schematic diagram of a stack structure of a first power device provided by a second embodiment of the present application;

[0045] FIG. 7 is an enlarged schematic diagram of a local area C of FIG. 6;

[0046] FIG. 8 is a schematic diagram of a stack structure of a first power device provided by a third embodiment of the present application.

[0047] 100 - photovoltaic module; 200 - first power device; 201 - circuit board; 2011 - plug hole; 203 - power module; 205 - metal shell; 2051 - heat dissipation tooth; 207 - solder layer; 300 - second power device; 10 - substrate; 12 - insulating base material; 14 - wiring layer; 141 - first wiring part; 143 - second wiring part; 145 - third wiring part; 16 - heat dissipation layer; 20 - first pre-encapsulation; V1 - first chip; D1, D2 - drain; S1, S2 - source; G1, G2 - gate; V2 - second chip; 22 - first trace layer; 222 - first connecting part; 224 - second connecting part; 226 - first connecting hole; 23 - insulating medium; 24 - second trace layer; 241 - first part; 243 - second part; 245 - third part; 26 - solder mask layer; 28 - second metal layer; 30 - first metal lead-out layer; 31 - first lead-out part; 32 - second lead-out part; 40 - plastic encapsulation; 50 - second pre-encapsulation; 52 - third trace layer; 522 - second connecting hole; D3 - third chip; D4 - fourth chip; 54 - first metal layer; 60 - second metal lead-out layer; 70 - pin; Z - first direction; X - second direction. DETAILED DESCRIPTION

[0048] FIG. 1 is a schematic diagram of an application scenario of a power device applied to a photovoltaic system according to an embodiment of the present application. The photovoltaic system includes a photovoltaic module 100, a first power device 200 and a second power device 300. The first power device 200 can be a photovoltaic optimizer. The second power device 300 can be a power converter. An input end of the first power device 200 is connected with the photovoltaic module 100, and an output end of the first power device 200 is connected with an input end of the second power device 300. In the photovoltaic system, the photovoltaic module 100 can convert sunlight into direct current through photovoltaic effect. Exemplarily, the photovoltaic module 100 can be a photovoltaic array or a photovoltaic module group. One photovoltaic module group can be composed of one or more photovoltaic module strings in parallel connection. One photovoltaic module string can be obtained by connecting one or more photovoltaic panels in series. Here, the photovoltaic module 100 can also be referred to as a solar cell module. In other words, the above-mentioned photovoltaic module 100 can be composed of all photovoltaic modules 100 in one solar cell panel in series and / or parallel connection, or can be composed of part of photovoltaic modules 100 in one solar cell panel in series and / or parallel connection.

[0049] Further, the first power device 200 has a maximum power point tracking (MPPT) function, i.e., the first power device 200 can track the maximum power point of the photovoltaic module 100, so that the photovoltaic module 100 can maintain a high output power. The direct current output by the photovoltaic module 100 is converted by the first power device 200 and then output to the second power device 300. The second power device 300 can convert the received direct current into alternating current or direct current and then output. For example, the second power device 300 can include an inverter or a direct current converter. The specific configuration can be determined according to the actual application scenario, which is not limited here. The inverter can convert the received direct current into alternating current to supply power to the load 600. The load 600 can include an alternating current load such as a communication base station or a household device in an alternating current grid. Alternatively, the inverter can convert the received direct current into alternating current, and the alternating current is converted by the grid-connected transformer 400 and then output to the alternating current grid 500 to realize grid connection. The direct current converter can convert the received direct current into another direct current that meets the load demand to supply power to the load. The load can include a direct current load such as a storage battery. In addition, the first power device 200 uses the MPPT function to make the photovoltaic system work in global MPPT, thereby improving the power generation efficiency.

[0050] It can be understood that in the photovoltaic system, the number of photovoltaic modules 100 and the number of first power devices 200 can be multiple, each first power device 200 can be connected to one or more photovoltaic modules 100, and the output ends of the multiple first power devices 200 are connected in series and / or parallel to the power converter. When the cost of the first power device 200 is low, the photovoltaic system can configure one first power device 200 for each photovoltaic module 100, so that the output power of each photovoltaic module 100 reaches the maximum output power, thereby improving the power generation efficiency of the system.

[0051] The first power device 200 realizes the MPPT function by using a software algorithm and a circuit topology, so as to solve the problem that the power generation of the photovoltaic system is reduced due to the shading and orientation difference of the photovoltaic module 100, realize the maximum power output of the photovoltaic module 100, and improve the power generation efficiency of the photovoltaic system.

[0052] Referring to FIG. 2, a first power device 200 provided by the first embodiment of the present application includes a circuit board 201, a power module 203, and a metal shell 205. At least part of the metal shell 205, the power module 203, and the circuit board 201 are arranged in a first direction Z in a stacked manner. The circuit board 201 is configured to carry the power module 203 and realize electrical connection between the power module 203 and the photovoltaic module 100, a second power device 300, or other devices. In the embodiment, the power module 203 can be configured to monitor and adjust the voltage and current of the photovoltaic module 100 in real time to realize maximum power output of the photovoltaic module 100. The power module 203 generates heat during operation, and the metal shell 205 is provided with cooling fins 2051 for cooling the power module 203. It can be understood that the metal shell 205 can omit the cooling fins 2051.

[0053] The power module is widely used in the industry due to its high integration, small average area, simplified processing, easy application, and better product performance. The elements in the power module are usually plastic encapsulated by a plastic encapsulation body, and the elements in the power module are electrically connected by wire bonding. However, the electrical connection by wire bonding can easily cause large parasitic inductance of the power module. In addition, the substrate and the chip in the power module are arranged in a stacked manner (for example, longitudinally) along the first direction Z, and the power module is usually provided with a pin, part of the pin is located in the plastic encapsulation body and is electrically connected with the substrate, and the pin is out of the pin from the second direction X (for example, transversely) of the power module to protrude outside the plastic encapsulation body, which increases the length of the power module in the second direction X.

[0054] Based on this, referring to FIGS. 2 and 3, a power module 203 provided by the first embodiment of the present application includes a substrate 10, a first pre-encapsulation body 20, a first metal lead-out layer 30, and a plastic encapsulation body 40. The substrate 10, the first pre-encapsulation body 20, and the first metal lead-out layer 30 are arranged in a stacked manner along the first direction Z. The plastic encapsulation body 40 encapsulates the substrate 10, the first pre-encapsulation body 20, and the first metal lead-out layer 30. The first metal lead-out layer 30 at least partially exposes the plastic encapsulation body 40 from the surface of the first pre-encapsulation body 20 in the first direction Z to electrically connect with the circuit board 201 or other electronic devices. The first pre-encapsulation body 20 includes a first chip V1, a first wiring layer 22, and an insulating medium 23, the first chip V1 and the first wiring layer 22 are stacked and located in the insulating medium 23, the first chip V1 is electrically connected with the substrate 10, the first chip V1 is located between the substrate 10 and the first wiring layer 22 in the first direction Z, the first wiring layer 22 is electrically connected with the first chip V1, and the first wiring layer 22 is electrically connected with the first metal lead-out layer 30.

[0055] The power module 203 provided in the present application, the first chip V1 is stacked with the first wiring layer 22 and is located in the insulating medium 23, that is, the first pre-packaging body 20 is a buried first pre-packaging body 20. Since the first wiring layer 22 is used to realize the electrical connection between the first chip V1 and the first metal lead layer 30, it is beneficial to reduce the parasitic inductance and parasitic resistance of the power loop in which the power module 203 works.

[0056] In addition, the first chip V1 and other devices are embedded in the insulating medium 23 by the embedding process to form a modular first pre-packaging body 20, which is beneficial to improve the integration of the power module 203. When the power module 203 needs to be prepared, the first pre-packaging body 20 can be directly installed on the substrate 10, which simplifies the preparation steps of the power module 203.

[0057] The first metal lead layer 30 is at least partially exposed from the surface of the first pre-packaging body 20 in the first direction Z, which means that at least part of the first metal lead layer 30 is not covered by the plastic packaging body 40. In this way, the power module 203 forms an electrical connection point on the side away from the substrate 10 in the first direction Z, which can realize the electrical interconnection between the power module 203 and the outside of the power module 203, for example, by setting a solder layer 207 on the electrical connection point to be electrically connected with the circuit board 201 or other electronic devices in the first direction Z, thereby improving the layout flexibility of the electrical connection point of the power module 203 and facilitating the electrical interconnection between the power module 203 and the outside. The power module 203 can also be electrically led out without setting a pin 70 or other electrical connection point in the second direction X perpendicular to the first direction Z, which is beneficial to reduce the length occupied by the power module 203 in the second direction X.

[0058] Furthermore, the first metal lead layer 30 is made of a metal layer and has a large area, which is beneficial to lead out the heat generated by the first chip V1 and other devices in the first pre-packaging body 20 to the outside of the power module 203, thereby improving the heat dissipation efficiency of the power module 203.

[0059] In some embodiments of the present application, the side of the plastic packaging body 40 away from the metal shell 205 and the side of the first metal lead layer 30 away from the metal shell 205 can be but are not limited to located in the same plane, and the side of the plastic packaging body 40 away from the circuit board 201 and the side of the substrate 10 away from the circuit board 201 can be but are not limited to located in the same plane.

[0060] The power module 203 can be applied to a photovoltaic optimizer, and can also be applied to a power converter and other power devices. The power module 203 can also be applied to a power supply module, a vehicle-mounted charger, an energy storage system, and other application scenarios. The power module can also be applied to devices such as radio frequency, power amplifier, AI, CPU, GPU, and the like, which require high frequency and high power and intelligent control.

[0061] The substrate 10 can be a copper-clad ceramic substrate 10 (DBC), an active metal brazing substrate 10 (AMB, such as Al2O3-AMB, Si3N4-AMB, or AlN-AMB), or an insulated metal substrate 10 (IMS), and the like. For example, in order to further improve the power density, the substrate 10 can be formed of AlN-DBC, Si3N4-AMB, or AlN-AMB with high thermal conductivity, which is not limited herein.

[0062] In some embodiments of the present application, the substrate 10 includes an insulating base material 12, a wiring layer 14, and a heat dissipation layer 16. The insulating base material 12 can be, but is not limited to, an insulating ceramic or the like. The wiring layer 14 is disposed on one side of the insulating base material 12 facing the first pre-packaged body 20, and the heat dissipation layer 16 is disposed on one side of the insulating base material 12 facing the metal shell 205. The wiring layer 14 and the heat dissipation layer 16 are both metal layers. The first pre-packaged body 20 is disposed on the side of the wiring layer 14 away from the insulating base material 12, and the first pre-packaged body 20 is electrically connected to the wiring layer 14. The heat dissipation layer 16 is connected to the metal shell 205 through the solder layer 207. The present application does not limit the heat dissipation layer 16 to be connected to the metal shell 205 through the solder layer 207, and the heat dissipation layer 16 can also be connected to the metal shell 205 by pasting or the like.

[0063] The first pre-packaged body 20 further includes a second chip V2. The first chip V1 and the second chip V2 are arranged along a second direction X perpendicular to the first direction Z. The first wiring layer 22 is located on the side of the second chip V2 away from the substrate 10, and the first wiring layer 22 is electrically connected to the second chip V2. The second chip V2 is electrically connected to the wiring layer 14.

[0064] The first chip V1 and the second chip V2 can be, but are not limited to, one of a metal-oxide-semiconductor field-effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), and a diode.

[0065] Referring to FIG. 4, in some embodiments of the present application, the first chip V1 includes a source S1, a gate G1, and a drain D1, and the second chip V2 includes a source S2, a gate G2, and a drain D2.

[0066] The source S1 of the first chip V1 can be connected to the negative pole of the DC power supply through the negative DC bus, and the DC power supply can be the photovoltaic module 100 shown in FIG. 1. The voltage of the source S1 of the first chip V1 is subject to the negative DC bus voltage of the DC power supply and can be stabilized within a certain range. The connection part between the source S1 of the first chip V1 and the negative pole is a switching static point. The switching static point refers to a point where the potential relative to the ground does not change abruptly. Similarly, the drain D2 of the second chip V2 can be connected to the positive pole of the DC power supply through the positive DC bus, and the voltage of the drain D2 of the second chip V2 is subject to the positive DC bus voltage and can be stabilized within a certain range. Therefore, the connection part between the drain D2 of the second chip V2 and the positive pole is a switching static point. In addition, the source S2 of the second chip V2 is connected to the drain D1 of the first chip V1. During the conduction and turn-off of the second chip V2 and the first chip V1, the voltage between the source S2 of the second chip V2 and the drain D1 of the first chip V1 will fluctuate. Therefore, the circuit connection part between the source S2 of the second chip V2 and the drain D1 of the first chip V1 is a switching dynamic point. The switching dynamic point refers to a point where the potential relative to the ground changes abruptly, and the switching dynamic point is the main cause of electromagnetic radiation.

[0067] It can be understood that the circuit topology diagram shown in FIG. 4 is only an example. In actual application, the power conversion circuit can also be set as a Boost circuit, a Buck-Boost circuit, or a Cuk circuit, or a full-bridge circuit, etc. The present application does not limit this.

[0068] In recent years, the design of photovoltaic optimizers, power modules and other power converters has gradually evolved towards miniaturization and high power density. For photovoltaic optimizers, if the metal shell of the photovoltaic optimizer is grounded, it generally involves relatively complex wiring, resulting in high cost and difficult maintenance, so the grounding line is usually omitted. However, if the metal shell is not grounded, the power module inside the photovoltaic optimizer will generate a large dv / dt and di / dt during turn-on and turn-off, i.e., the voltage and current will fluctuate, which will enhance electromagnetic noise and cause electromagnetic compatibility (EMC) to deteriorate, reducing reliability.

[0069] Please refer to Fig. 3 again, the first wiring layer 22 is located on the side of the second chip V2 away from the substrate 10, and the first wiring layer 22 is electrically connected with the second chip V2. In some embodiments of the present application, the drain D1 of the first chip V1 is arranged on the surface of the first chip V1 away from the substrate 10. The gate G1 of the first chip V1 and the source S1 of the first chip V1 are arranged on the surface of the first chip V1 facing the substrate 10. The drain D2 of the second chip V2 is arranged on the surface of the second chip V2 facing the substrate 10. The gate G2 and the source S2 are arranged on the surface of the second chip V2 away from the substrate 10. The first wiring layer 22 is connected with the drain D1 of the first chip V1, the first wiring layer 22 is connected with the source S2 of the second chip V2, and the part of the first wiring layer 22 between the drain D1 of the first chip V1 and the source S2 of the second chip V2 forms the switching dynamic point of the power module 203. The first metal lead layer 30 is electrically connected with the first wiring layer 22 in the first direction Z, that is, the switching dynamic point is electrically led out through the first metal lead layer 30.

[0070] In some embodiments of the present application, the first wiring layer 22 includes a first connecting part 222 and a second connecting part 224, and the power module 203 further includes a solder layer 207 arranged between the first connecting part 222 and the first metal lead layer 30 in the first direction Z. The solder layer 207 is used to fix the connection between the first connecting part 222 and the first metal lead layer 30, so as to improve the electrical connection stability between the first connecting part 222 of the first wiring layer 22 and the first metal lead layer 30.

[0071] The first connecting portion 222 is electrically connected to the drain D1 of the first chip V1 and the source S2 of the second chip V2, and the second connecting portion 224 is electrically connected to the gate G2 of the second chip V2, i.e., the first connecting portion 222 is electrically connected between the drain D1 of the first chip V1 and the source S2 of the second chip V2. In some embodiments of the present application, the insulating medium 23 is provided with a plurality of first connecting holes 226 arranged along the second direction X. The plurality of first connecting holes 226 are located on the side of the first chip V1 away from the substrate 10. The plurality of first connecting holes 226 are each filled with a metal material, and the metal material of at least one of the plurality of first connecting holes 226 is electrically connected between the first connecting portion 222 and the drain D1 of the first chip V1 to achieve electrical connection between the first connecting portion 222 and the drain D1 of the first chip V1. The metal material of at least one of the plurality of first connecting holes 226 is electrically connected between the first connecting portion 222 and the source S2 of the second chip V2 to achieve electrical connection between the first connecting portion 222 and the source S2 of the second chip V2. The metal material of at least one of the plurality of first connecting holes 226 is electrically connected between the second connecting portion 224 and the gate G2 of the second chip V2 to achieve electrical connection between the second connecting portion 224 and the gate G2 of the second chip V2. By providing the first connecting holes 226 in the insulating medium 23 and filling the first connecting holes 226 with the metal material, i.e., by providing blind holes to achieve electrical interconnection between the first pre-packaged body 20 and the first metal lead layer 30, the planarity during preparation of the first pre-packaged body 20 can be improved.

[0072] The present application does not limit the shape of the first connecting hole 226, which can be a regular or irregular hole such as a trapezoidal hole or a square hole. It can be understood that the first connecting hole 226 can be omitted, i.e., the first chip V1 and the second chip V2 are directly electrically connected by the first wiring layer 22, and the present application does not limit the shape and structure of the first wiring layer 22. It can be understood that the present application does not limit the structure of the first wiring layer 22, for example, the first wiring layer 22 can include a larger number of connecting portions.

[0073] The first pre-packaging body 20 further comprises a second trace layer 24 of the insulating medium 23, which is arranged on the side of the first chip V1 and the second chip V2 facing the substrate 10. The second trace layer 24 comprises a first part 241, a second part 243 and a third part 245. The first part 241 is electrically connected between the source S1 of the first chip V1 and the wiring layer 14 of the substrate 10, and the first part 241 is in electrical connection with the static point of the switch. The second part 243 is electrically connected between the drain D2 of the second chip V2 and the wiring layer 14 of the substrate 10, and the second part 243 is in electrical connection with the static point of the switch. The third part 245 is electrically connected between the gate G1 of the first chip V1 and the wiring layer 14. It can be understood that the second trace layer 24 can also be electrically connected to the first chip V1 and / or the second chip V2 in the form of a blind hole. It can be understood that the structure of the second trace layer 24 is not limited in the present application, for example, the second trace layer 24 can comprise one part or a larger number of parts.

[0074] In some embodiments of the present application, the second trace layer 24 can be covered on the first chip V1 and the second chip V2 by an electroplating process. The second trace layer 24 can be connected to the wiring layer 14 of the substrate 10 through a solder layer 207, and the connection of the substrate 10 and the second trace layer 24 through the solder layer 207 can improve the stability of the electrical connection between the second trace layer 24 and the substrate 10. The present application does not limit the connection of the second trace layer 24 to the wiring layer 14 of the substrate 10 through the solder layer 207, and the electrical connection between the second trace layer 24 and the wiring layer 14 is sufficient.

[0075] The first trace layer 22 is connected between the drain D1 of the first chip V1 and the source S2 of the second chip V2 to form the dynamic point of the switch of the power module 203. During the conduction and turn-off process of the first chip V1, the first trace layer 22 and the metal shell 205 can form a charging and discharging capacitor, thereby generating electromagnetic noise. The first part 241 and the second part 243 are both in electrical connection with the static point of the switch, and during the conduction and turn-off process of the second chip V2, the second part 243 and the metal shell 205 will not form a charging and discharging capacitor, thereby not generating electromagnetic noise. The first trace layer 22 and the second trace layer 24 are both connected to the first chip V1 and the second chip V2, which is equivalent to grounding the charging and discharging capacitor, thereby absorbing the electromagnetic noise generated by the charging and discharging capacitor, that is, the second trace layer 24 is electrically connected to the first chip V1 and the substrate 10, and the second chip V2 and the substrate 10, and also serves as an electromagnetic shielding layer of the power module 203.

[0076] The wiring layer 14 includes a first wiring portion 141, a second wiring portion 143, and a third wiring portion 145. The first wiring portion 141 is electrically connected to the first portion 241. The second wiring portion 143 is electrically connected to the second portion 243. The third wiring portion 145 is electrically connected to the third portion 245. In order to have a self-shielding effect, the power module 203 electrically connects the first portion 241 between the source S1 of the first chip V1 and the wiring layer 14 of the substrate 10, and electrically connects the second portion 243 between the drain D2 of the second chip V2 and the wiring layer 14 of the substrate 10. The double-layer structure formed by the second wiring layer 24 and the wiring layer 14 becomes a double-layer electromagnetic shielding layer, thereby increasing the electromagnetic shielding effect of the power module 203 on the switching dynamic point. It can be understood that the structure of the wiring layer 14 is not limited in the present application. For example, the wiring layer 14 can include more portions.

[0077] In the power module 203 provided by the present application, the drain D1 of the first chip V1 is arranged on the surface of the first chip V1 away from the substrate 10, and the drain D2 of the second chip V2 is arranged on the surface of the second chip V2 facing the substrate 10. That is, the first chip V1 and the second chip V2 are arranged on the substrate 10 in a positive-negative manner, so that the switching dynamic point is arranged on the side of the first chip V1 away from the substrate 10, and the switching static point is arranged on the side of the first chip V1 and the second chip V2 facing the substrate 10. Since the wiring layer 14 and the second wiring layer 24 are both located between the switching dynamic point and the metal shell 205 in the first direction Z, the wiring layer 14 and the second wiring layer 24 can shield the electromagnetic field between the switching dynamic point and the metal shell 205, which is conducive to improving the reliability of the power module 203. The wiring layer 14 and the second wiring layer 24 not only electrically connect the substrate 10 and the first pre-packaged body 20, but also serve as an electromagnetic shielding layer between the first wiring layer 22 and the metal shell 205. Since there is no need to additionally arrange an electromagnetic shielding layer such as an aluminum plate, the structure of the power module 203 is simplified, the thickness of the power module 203 in the first direction Z is reduced, and the integration of the power module 203 is improved.

[0078] In addition, since the heat generated by the first pre-packaged body 20 is directly conducted to the metal shell 205 through the substrate 10 for heat dissipation, the heat dissipation path is shorter than that of the power module 203 provided with a uniform aluminum plate and heat-conducting glue, which is conducive to improving the heat dissipation efficiency of the power module 203 and simplifying the heat dissipation link of the power module 203.

[0079] It can be understood that in some possible implementations, the second wiring layer 24 in the first pre-packaged body 20 can be omitted, for example, the first wiring portion 141 is directly electrically connected to the source S1 of the first chip V1, and the second wiring portion 143 is directly electrically connected to the drain D2 of the second chip V2. The wiring layer 14 is electrically connected to the first chip V1 and the second chip V2, and can also be used as an electromagnetic shielding layer.

[0080] The first trace layer 22, the second trace layer 24 and the first metal lead layer 30 can be made of copper, silver, copper-aluminum alloy or other materials with high conductivity. The application does not limit the material of the first metal lead layer 30.

[0081] In some embodiments of the application, the first metal lead layer 30 includes a first lead part 31 and a second lead part 32. The first lead part 31 is electrically connected between the first connecting part 222 and the circuit board 201. The second lead part 32 is electrically connected between the second connecting part 224 and the circuit board 201. The first lead part 31 and the first connecting part 222, and the second lead part 32 and the second connecting part 224 can be connected by the solder layer 207. It can be understood that the application does not limit the structure of the first metal lead layer 30. For example, the first metal lead layer 30 can include one lead part or more lead parts.

[0082] The first lead part 31 and the first connecting part 222, and the second lead part 32 and the second connecting part 224 are both provided with the solder layer 207. The power module 203 further includes a solder mask layer 26. The solder mask layer 26 covers the surface of the first pre-packaged body 20 away from the substrate 10. At least part of the solder mask layer 26 is located between the first connecting part 222 and the second connecting part 224.

[0083] The solder mask layer 26 is used to prevent unnecessary electrical connection between the first connecting part 222 and the second connecting part 224 during the soldering process of connecting the first connecting part 222 and the first lead part 31, and the second connecting part 224 and the second lead part 32. The solder mask layer 26 can prevent unnecessary electrical connection between the first connecting part 222 and the second connecting part 224. The plastic package 40 also encapsulates the solder layer 207 and the solder mask layer 26. The solder mask layer 26 can be insulating ink or other solder mask materials.

[0084] When preparing the first pre-packaged body 20, the source S1 of the first chip V1, the gate G1 of the first chip V1 and the drain D1 of the second chip V2 are all covered by the second trace layer 24. The first chip V1 and the second chip V2 can be embedded in the first layer of insulating medium 23. The second layer of insulating medium 23 is formed on the side of the first chip V1 and the second chip V2 away from the second trace layer 24. A plurality of first connecting holes 226 are formed on the second layer of insulating medium 23. The trace metal material is filled in the first connecting holes 226. The first trace layer 22 is formed on the second layer of insulating medium 23. Then, the third layer of insulating medium 23 is formed, which surrounds the first trace layer 22 in the second direction X.

[0085] Referring to FIGS. 2 and 5, the power module 203 further comprises a second pre-packaging body 50 and a second metal lead layer 60. The second pre-packaging body 50 serves as a protective bypass in the power module 203. The substrate 10, the second pre-packaging body 50 and the second metal lead layer 60 are stacked in the first direction Z. The second pre-packaging body 50 is spaced apart from the first pre-packaging body 20 in the second direction X. The second metal lead layer 60 is at least partially exposed from the surface of the second pre-packaging body 50 in the first direction Z, so as to be electrically connected to the circuit board 201. In some embodiments of the present application, a solder layer 207 is arranged between the second metal lead layer 60 and the circuit board 201 in the first direction Z, i.e., the second metal lead layer 60 is connected to the circuit board 201 through the solder layer 207.

[0086] The second pre-packaging body 50 comprises a third chip D3, a third trace layer 52 and an insulating medium 23. The third chip D3 and the first trace layer 22 are stacked and both are located in the insulating medium 23. The third chip D3 is located between the wiring layer 14 of the substrate 10 and the third trace layer 52 in the first direction Z. The third trace layer 52 is electrically connected to the third chip D3, and the third trace layer 52 is electrically connected to the second metal lead layer 60. The second metal lead layer 60 and the third trace layer 52 can be made of materials with high electrical conductivity, such as copper, silver or copper-aluminum alloy. The present application does not limit the materials of the second metal lead layer 60 and the third trace layer 52.

[0087] The insulating medium 23 in the second pre-packaging body 50 is provided with a second connecting hole 522. The second connecting hole 522 is located on the side of the third chip D3 away from the substrate 10, and is filled with a metal material to electrically connect the third trace layer 52 and the third chip D3. By arranging the blind hole type second connecting hole 522 in the insulating medium 23 of the second pre-packaging body 50, the third trace layer 52 and the third chip D3 are electrically connected, which is beneficial to reduce the parasitic inductance and parasitic resistance of the power module 203. It can be understood that the second connecting hole 522 can be omitted.

[0088] The second pre-packaging body 50 further comprises a fourth chip D4 located in the insulating medium 23. The third chip D3 and the fourth chip D4 are arranged in the second direction X perpendicular to the first direction Z. The third trace layer 52 is located on the side of the third chip D3 away from the substrate 10 in the first direction Z, and the third trace layer 52 is electrically connected to the fourth chip D4. The third chip D3 and the fourth chip D4 both comprise diodes.

[0089] The plastic package 40 encapsulates the first pre-package 20, the second pre-package 50, the substrate 10, the first metal lead layer 30 and the second metal lead layer 60, so as to protect the first pre-package 20, the second pre-package 50, the substrate 10, the first metal lead layer 30 and the second metal lead layer 60 from the external environment. The plastic package is also called hard package, and the encapsulation material is mainly epoxy plastic encapsulation material. The epoxy plastic encapsulation material is usually prepared by mixing a certain proportion of curing agent, curing accelerator, coupling agent, release agent, filler, flame retardant and other additives according to a certain process. The material used for plastic package generally has strong mechanical properties and can play a certain mechanical fixing function. However, due to the difference in thermal expansion coefficient between the material and the metal conductor, the material is prone to thermal fatigue cracking. Therefore, in addition to high insulation performance, high thermal conductivity and low thermal expansion coefficient are also required. The potting is also called soft package. The material used for potting is usually an organic filling medium, including epoxy resin, polyurethane and silicone gel. These organic filling media are filled into the functional modules of power electronic devices and form an elastic gel state after curing under certain conditions. Through potting, the devices and circuits in the module can be protected from moisture, dust, shock and vibration, corrosion and impact of the environment, and the failure probability of the module devices can be reduced. Potting has good insulation, shock absorption and isolation effects, and can reduce the adverse factors from the outside world to a very low level.

[0090] It can be understood that the second pre-package 50 in the power module 203 can be omitted, or more pre-packages can be arranged in the power module 203.

[0091] The power module 203 further includes a pin 70. Part of the pin 70 is located in the plastic package 40 and electrically connected to the wiring layer 14 of the substrate 10. Another part of the pin 70 protrudes out of the plastic package 40 from the surface of the power module 203 in the second direction X and is electrically connected to the circuit board 201. The pin 70 can be electrically connected to the wiring layer 14 through a solder layer 207. The pin 70 can be surface-mounted on the circuit board 201. For example, the pin 70 is approximately in the shape of a gull wing. A solder layer 207 is arranged between the pin 70 and the circuit board 201. The application does not limit the connection mode of the pin 70 and the circuit board 201. For example, in some embodiments, the circuit board 201 is provided with a plug-in hole, and the part of the pin 70 away from the substrate 10 is plugged into the plug-in hole. The power module 203 can further include other elements, for example, the power module 203 further includes a negative temperature coefficient thermistor (NTC thermistor) arranged on the wiring layer 14. The thermistor is used to monitor the temperature of the power module 203.

[0092] Referring to FIG. 6 and FIG. 7, the power module 203 provided by the second embodiment of the present application has substantially the same structure as the power module 203 provided by the first embodiment of the present application, and the difference is at least that the first pre-packaging body 20 further comprises a first metal layer 54 located in the insulating medium 23, the first metal layer 54 is located between the second chip V2 and the second trace layer 24 in the first direction Z, and the first metal layer 54 is electrically connected between the second chip V2 and the second part 243 of the second trace layer 24. The second embodiment adds the first metal layer 54 located between the second chip V2 and the second trace layer 24 in the first direction Z, and the first metal layer 54 increases the heat diffusion area, thereby facilitating the improvement of the heat dissipation performance of the power module 203.

[0093] The first pre-packaging body 20 further comprises a second metal layer 28 located in the insulating medium 23, the second metal layer 28 is located between the first chip V1 and the first trace layer 22 in the first direction Z, and the second metal layer 28 is electrically connected between the first trace layer 22 and the first chip V1. The second metal layer 28 is arranged between the first trace layer 22 and the first chip V1, and the second metal layer 28 increases the heat diffusion area, thereby facilitating the improvement of the heat dissipation performance of the power module 203.

[0094] In some embodiments of the present application, the circuit board 201 is provided with a plug hole 2011, and the part of the pin 70 away from the substrate 10 is plugged into the plug hole 2011.

[0095] Referring to FIG. 8, the power module 203 provided by the third embodiment of the present application has substantially the same structure as the power module 203 provided by the first embodiment of the present application, and the difference is at least that the power module 203 provided by the third embodiment of the present application omits the first metal lead-out layer and the second metal lead-out layer, and the power module 203 provided by the third embodiment of the present application realizes external interconnection through the pin 70 and the circuit board 201 or external device, and the first pre-packaging body 20 and the second pre-packaging body 50 realize electrical interconnection inside the pre-packaging body through the metal trace layer instead of the wire bonding, which can effectively reduce the parasitic inductance and resistance.

[0096] In the case of no conflict, the first embodiment to the third embodiment of the present application can be combined with each other.

[0097] In addition, in the present application, the expression "and / or" includes any and all combinations of the associated listed words. For example, the expression "A and / or B" can include A, can include B, or can include both A and B.

[0098] In this application, expressions such as "first" and "second" are used to modify various elements. These elements should not be limited by these expressions. For example, the expressions do not limit the order and / or the importance of the elements. The expressions are only used to distinguish one element from another. For example, a first user equipment and a second user equipment indicate different user equipments, although both the first user equipment and the second user equipment are user equipments. Similarly, a first element can be referred to as a second element, and similarly, a second element can be referred to as a first element, without departing from the scope of the present application.

[0099] When a component is referred to as being "connected" or "accessed" to another component, it should be understood that there can be another component between the component and the other component. On the other hand, when a component is referred to as being "directly connected" or "directly accessed" to another component, it should be understood that there is no component between them.

[0100] The above description is merely a specific implementation of the present application, but the scope of the protection of the present application is not limited thereto. Any person skilled in the art within the scope of the technology disclosed in the present application can easily think of changes or replacements, which should be covered by the scope of protection of the present application. Therefore, the scope of protection of the present application should be limited by the scope of protection of the claims.

Claims

1. A power module, characterized by The power module comprises a substrate, a first pre-packaged body, a first metal lead-out layer and a plastic package body; The substrate, the first pre-packaged body and the first metal lead-out layer are sequentially stacked in a first direction, and the plastic package body encapsulates the substrate, the first pre-packaged body and the first metal lead-out layer, and the first metal lead-out layer is at least partially exposed from the plastic package body in the first direction away from a surface of the first pre-packaged body. The first pre-packaged body comprises a first chip, a first wiring layer and an insulating medium, the first chip and the first wiring layer are stacked and located in the insulating medium, the first chip is electrically connected to the substrate, and the first chip is located between the substrate and the first wiring layer in the first direction, the first wiring layer is electrically connected to the first chip, and the first wiring layer is electrically connected to the first metal lead-out layer.

2. The power module of claim 1, wherein The first pre-packaged body further comprises a second chip located in the insulating medium, the first chip and the second chip are arranged in a second direction perpendicular to the first direction, the first wiring layer is located on a side of the second chip away from the substrate, the first wiring layer is electrically connected to the second chip, and the first metal lead-out layer is electrically connected to a side of the second chip away from the substrate.

3. The power module of claim 2, wherein The first chip and the second chip each comprise a drain and a source, the drain of the first chip is arranged on a surface of the first chip away from the substrate, and the source of the first chip is arranged on a surface of the first chip facing the substrate; The drain of the second chip is arranged on a surface of the second chip facing the substrate, and the source of the second chip is arranged on a surface of the second chip away from the substrate; The first wiring layer is electrically connected to the drain of the first chip and the source of the second chip, and a portion of the first wiring layer between the drain of the first chip and the source of the second chip is used to form a switching dynamic point of the power module; A wiring layer on a side of the substrate facing the first pre-packaged body comprises a first wiring portion and a second wiring portion spaced apart, the first wiring portion is electrically connected to the source of the first chip, and the second wiring portion is electrically connected to the drain of the second chip, and a side of the substrate away from the first pre-packaged body is used to arrange a metal shell.

4. The power module of claim 3, wherein, The first chip and the second chip each further comprise a gate, the gate of the first chip is arranged on a side of the first chip facing the substrate, and the gate of the second chip is arranged on a side of the second chip away from the substrate; The wiring layer further comprises a third wiring portion, the third wiring portion is electrically connected to the gate of the first chip; The first wiring layer comprises a first connection portion and a second connection portion spaced apart, the first connection portion is electrically connected between the drain of the first chip and the source of the second chip, and the second connection portion is electrically connected to the gate of the second chip. The first metal lead-out layer comprises a first lead-out part and a second lead-out part arranged at intervals, the first lead-out part is electrically connected with the first connecting part, and the second lead-out part is electrically connected with the second connecting part.

5. The power module of claim 4, wherein, a welding layer is arranged between the first lead-out part and the first connecting part and between the second lead-out part and the second connecting part, the power module further comprises a solder resist layer, the solder resist layer covers a surface of the first pre-packaging body away from the substrate, at least part of the solder resist layer is located between the first connecting part and the second connecting part, and the plastic package body further encapsulates the welding layer and the solder resist layer.

6. The power module of claim 3, wherein, the first pre-packaging body further comprises a second wiring layer, the second wiring layer is located in the insulating medium, the second wiring layer is arranged on a side of the first chip facing the substrate, the second wiring layer comprises a first part and a second part, the first part is electrically connected between the source of the first chip and the first wiring part, and the second part is electrically connected between the drain of the second chip and the second wiring part.

7. The power module of claim 6, wherein, the first pre-packaging body further comprises a first metal layer located in the insulating medium, the first metal layer is located between the second chip and the second wiring layer in the first direction, and the first metal layer is electrically connected between the second chip and the second wiring layer.

8. The power module of any one of claims 1-7, wherein, the first pre-packaging body further comprises a second metal layer located in the insulating medium, the second metal layer is located between the first chip and the first wiring layer in the first direction, and the second metal layer is electrically connected between the first wiring layer and the first chip.

9. The power module of any one of claims 1-8, wherein, the insulating medium is provided with a first connecting hole located on a side of the first chip away from the substrate, the first connecting hole is filled with a metal material, and the metal material in the first connecting hole is electrically connected between the first wiring layer and the first chip.

10. A power device, characterized by the power device comprises a circuit board and the power module according to any one of claims 1-9, the first metal lead-out layer is at least partially exposed from a surface of the first pre-packaging body in the first direction and is electrically connected with the circuit board.

11. The power device of claim 10, wherein, the power device further comprises a metal shell connected with a side of the substrate away from the circuit board.

12. The power device of claim 10, wherein, the power module further comprises a pin, a part of the pin is located in the plastic package body and is electrically connected with the substrate, another part of the pin protrudes out of the plastic package body from a surface of the power module in a second direction and is electrically connected with the circuit board, and the second direction is perpendicular to the first direction; a welding layer is arranged between the pin and the circuit board, or the circuit board is provided with a plug-in hole, and the pin is plugged into the plug-in hole.

13. The power device according to any of claims 10-12, characterized by the power device is a photovoltaic optimizer.

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