Power conversion device

Abstract

Provided is a three-level power conversion device capable of suppressing a surge voltage generated in association with commutation. This power conversion device comprises a first circuit board (301), a second circuit board (302), and a third circuit board (303). The first circuit board (301) has first circuit board sections, equal in number to the number of phases, in which an upper arm circuit is configured, and each first circuit board section has a first flat-plate conductor that serves as wiring in the upper arm circuit. The second circuit board (302) has second circuit board sections, equal in number to the number of phases, in which a clamp circuit is configured, and each second circuit board section has a second flat-plate conductor that serves as wiring in the clamp circuit. The third circuit board (303) has third circuit board sections, equal in number to the number of phases, in which a lower arm circuit is configured, and each third circuit board section has a third flat-plate conductor that serves as wiring in the lower arm circuit. The first circuit board, the second circuit board, and the third circuit board are stacked on each other such that the second circuit board is positioned between the first circuit board and the third circuit board.

Description

Power Conversion Device

[0001] The present invention relates to a power conversion device having a power conversion circuit including a semiconductor element.

[0002] In a three-level power converter, the high potential, intermediate potential, and low potential on the DC side are connected to the AC terminals via semiconductor elements. During inverter operation, the three-level power converter outputs three-level phase voltages consisting of two levels, positive and negative, with the intermediate potential at zero. The voltage applied to the semiconductor elements is half that of a two-level power converter. This reduces power loss generated by the semiconductor elements. In addition, because the waveform of the line voltage is closer to a sine wave, the filter connected to the AC side can be made smaller.

[0003] As a conventional technique relating to a three-level power conversion device, the technique described in Patent Document 1 is known.

[0004] In the technique described in Patent Document 1 (FIG. 1), the potential of the AC terminal is clamped to an intermediate potential by a diode, and in the technique described in Patent Document 1 (FIG. 11), the potential of the AC terminal is clamped to an intermediate potential by a semiconductor switching element.

[0005] JP 2014-57520 A

[0006] In the above-described conventional technology, when the current flowing through the AC terminal is commutated between the clamp circuit and the arm circuit, a surge voltage occurs.

[0007] Therefore, the present invention provides a power conversion device that can suppress surge voltages that occur due to commutation.

[0008] In order to solve the above problems, a power conversion device according to the present invention includes power conversion circuits, the number of which corresponds to the number of AC phases, each of which includes an upper arm circuit connecting a high potential on the DC side to an AC terminal, a clamp circuit clamping the potential of the AC terminal to a DC intermediate potential, and a lower arm circuit connecting a low potential on the DC side to the AC terminal, the power conversion device including: a first circuit board on which the upper arm circuits corresponding to the number of AC phases are formed; a second circuit board on which the clamp circuits corresponding to the number of AC phases are formed; and a third circuit board on which the lower arm circuits corresponding to the number of AC phases are formed. The first circuit board includes first circuit board portions each corresponding to the number of AC phases, each of which includes the upper arm circuits, and each of the first circuit board portions includes a first flat conductor that serves as wiring in the upper arm circuit. The second circuit board includes second circuit board portions each corresponding to the number of AC phases, each of which includes the clamp circuits, and each of the second circuit board portions includes a second flat conductor that serves as wiring in the clamp circuit. The third circuit board includes third circuit board portions each corresponding to the number of AC phases, each of which includes the lower arm circuits, and each of the third circuit board portions includes a third flat conductor that serves as wiring in the lower arm circuit. The first circuit board, the second circuit board, and the third circuit board are stacked on top of each other such that the second circuit board is located between the first circuit board and the third circuit board.

[0009] According to the present invention, the first circuit board, the second circuit board, and the third circuit board are stacked on top of each other so that the second circuit board is located between the first circuit board and the third circuit board. Therefore, the mutual inductance between the flat conductors in each circuit board section can suppress surge voltages that occur due to commutation. Note that problems, configurations, and effects other than those described above will become clear from the description of the embodiments below.

[0010] 1 is a circuit diagram showing a configuration of a power conversion device according to an embodiment; FIG. 2 is a circuit diagram showing commutation of a current flowing through an AC terminal between an upper arm circuit and a clamp circuit; FIG. 3 is a circuit diagram showing commutation of a current flowing through an AC terminal between a lower arm circuit and a clamp circuit; FIG. 4 is a circuit diagram showing commutation of a current flowing through an AC terminal between an upper arm circuit and a clamp circuit; FIG. 5 is a circuit diagram showing commutation of a current flowing through an AC terminal between a lower arm circuit and a clamp circuit; FIG. 6 is an exploded perspective view showing a schematic configuration of a circuit board on which a main circuit of a power conversion device according to an embodiment is mounted; and FIG. 7 is a plan view showing a pattern configuration of flat conductors of a first circuit board portion and a second circuit board portion on which IGBTs 101a, 101b, 101c, and 101d are mounted, respectively, on a first circuit board 301 and a second circuit board 302. 10A and 10B are plan views showing the pattern configurations of flat conductors of the second circuit board portion and the third circuit board portion, respectively, on which IGBTs 101a, 101b, 101c, and 101d are mounted, in the second circuit board 302 and the third circuit board 303.

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. In the drawings, the same reference numerals indicate the same components or components having similar functions.

[0012] FIG. 1 is a circuit diagram showing the configuration of a power conversion device according to an embodiment of the present invention.

[0013] As shown in Fig. 1, the power conversion device 100 is connected to a storage battery 104 and a power grid 103 on the DC side and the AC side, respectively. The power conversion device 100 converts DC power from the storage battery 104 into a plurality of semiconductor switching elements (IGBTs in Fig. 1) in response to control signals S from a control device 112. Ｃ The power is converted into three-phase AC power by performing switching control using the inverter 104 and supplied to the power grid 103 .

[0014] On the DC side of the power conversion device 100, a storage battery 104 is connected across a series-connected circuit of a capacitor 104a and a capacitor 104b. The potentials at one end (the capacitor 104a side in FIG. 1 ) and the other end (the capacitor 104b side in FIG. 1 ) of the series-connected circuit of the capacitors 104a and 104b are a high potential P and a low potential N on the DC side, respectively. The potential at the series connection point of the capacitors 104a and 104b is an intermediate potential M.

[0015] A power conversion circuit for one phase is formed by the IGBTs 101a to 101d. Diodes 102a, 102b, 102c, and 102d are connected in antiparallel to the IGBTs 101a, 101b, 101c, and 101d, respectively.

[0016] The IGBT 101a is connected between a high potential P on the DC side and the AC terminal AC to form an upper arm circuit. The IGBT 101b is connected between a low potential N on the DC side and the AC terminal AC to form a lower arm circuit. The IGBT 101c and the IGBT 101d are connected in series so that the current flows in opposite directions. The series connection circuit of the IGBT 101c and the IGBT 101d is connected between an intermediate potential M on the DC side and the AC terminal AC to form a clamp circuit that clamps the potential of the AC terminal AC to the intermediate potential.

[0017] When the IGBTs 101a to 101d are switching-controlled, the potential of the AC terminal is set to one of a high potential P, an intermediate potential N, and a low potential N on the DC side. Therefore, the power conversion circuit in the power conversion device 100 operates as a three-level power conversion circuit. Note that the three-level power conversion circuit in this embodiment is a so-called T-type three-level power conversion circuit.

[0018] Next, the commutation operation of the three-level power conversion circuit in this embodiment will be described with reference to FIGS.

[0019] In each of Figures 2 to 5, L ａＣ , L ａＥ , L ｂＥ , L ｂＣ , L ｃＥ , L ｃＣ , L ｄＣ , L ｄＥrepresents the parasitic inductance of each wiring.

[0020] L ａＣ is the parasitic inductance of the wiring connecting the high potential P on the DC side and the collector terminal of the IGBT 101a in the upper arm circuit.

[0021] L ａＥ is the parasitic inductance of the wiring connecting the emitter terminal of the IGBT 101a and the AC terminal AC in the upper arm circuit.

[0022] L ｂＥ is the parasitic inductance of the wiring connecting the low potential N on the DC side and the emitter terminal of the IGBT 101b in the lower arm circuit.

[0023] L ｂＣ is the parasitic inductance of the wiring connecting the collector terminal of the IGBT 101b and the AC terminal AC in the lower arm circuit.

[0024] L ｃＥ is the parasitic inductance of the wiring connecting the intermediate potential M on the DC side and the emitter terminal of the IGBT 101c in the clamp circuit.

[0025] L ｃＣ and L ｄＣ is the parasitic inductance of the wiring connecting the collector terminal of the IGBT 101c and the collector terminal of the IGBT 101d in the clamp circuit.

[0026] L ｄＥ is the parasitic inductance of the wiring connecting the emitter terminal of the IGBT 101d and the AC terminal AC in the clamp circuit.

[0027] 2 to 5, the arrows indicate the direction of current flow.

[0028] FIG. 2 is a circuit diagram showing the commutation of current flowing through the AC terminal AC between the upper arm circuit and the clamp circuit.

[0029] When the IGBT 101a in the upper arm circuit is turned off, the current flowing in the AC terminal AC is commutated from the upper arm circuit to the clamp circuit. In this case, the current flowing from the high potential P to the AC terminal AC in the upper arm circuit decreases, and the current flowing from the intermediate potential M to the AC terminal AC in the clamp circuit increases. That is, the values ​​of the time rate of change of the current (di / dt) in the upper arm circuit and the clamp circuit are negative and positive, respectively. The magnitudes (absolute values) of the time rate of change of the current in the upper arm circuit and the clamp circuit are equal. Therefore, if the magnitude (absolute value) of the time rate of change of the current is expressed as di / dt, then the upper arm circuit and the clamp circuit have a combined current (L ａＣ +L ａＥ +L ｃＥ +L ｃＣ +L ｄＣ +L ｄＥ ) × (di / dt) is generated.

[0030] This induced electromotive force generates a steady voltage between the high potential P and the intermediate potential, which in this embodiment is a surge voltage superimposed on half the voltage of the storage battery 104, and this surge voltage is applied to the IGBT 101a, which is turned off.

[0031] FIG. 3 is a circuit diagram showing the commutation of the current flowing through the AC terminal AC between the lower arm circuit and the clamp circuit.

[0032] When the IGBT 101b in the lower arm circuit is turned off, the current flowing through the AC terminal AC is commutated from the lower arm circuit to the clamp circuit. In this case, the current flowing from the AC terminal AC toward the low potential N in the lower arm circuit decreases, while the current flowing from the AC terminal AC toward the intermediate potential M in the clamp circuit increases. That is, the values ​​of the time rate of change of current (di / dt) in the lower arm circuit and the clamp circuit are negative and positive, respectively. The magnitudes (absolute values) of the time rate of change of current in the lower arm circuit and the clamp circuit are equal. Therefore, if the magnitude (absolute value) of the time rate of change of current is expressed as di / dt, then the lower arm circuit and the clamp circuit will have a combined current (L) due to the parasitic inductance of the wiring. ｂＥ +LｂＣ +L ｃＥ +L ｃＣ +L ｄＣ +L ｄＥ ) × (di / dt) is generated.

[0033] This induced electromotive force generates a steady voltage between the intermediate potential and the low potential N, which in this embodiment is a surge voltage superimposed on half the voltage of the storage battery 104, and is applied to the IGBT 101b, which is turned off.

[0034] FIG. 4 is a circuit diagram showing the commutation of the current flowing through the AC terminal AC between the upper arm circuit and the clamp circuit.

[0035] When the IGBT 101c in the clamp circuit is turned off, the current flowing through the AC terminal AC is commutated from the clamp circuit to the upper arm circuit. In this case, the current flowing from the AC terminal AC toward the intermediate potential M in the clamp circuit decreases, while the current flowing from the AC terminal AC toward the high potential P in the upper arm circuit increases. That is, the values ​​of the time rate of change of current (di / dt) in the clamp circuit and the upper arm circuit are negative and positive, respectively. The magnitudes (absolute values) of the time rate of change of current in the clamp circuit and the upper arm circuit are equal. Therefore, if the magnitude (absolute value) of the time rate of change of current is expressed as di / dt, then the clamp circuit and the upper arm circuit will have a combined current (L ａＣ +L ａＥ +L ｃＥ +L ｃＣ +L ｄＣ +L ｄＥ ) × (di / dt) is generated.

[0036] This induced electromotive force generates a steady voltage between the high potential P and the intermediate potential, which in this embodiment is a surge voltage superimposed on half the voltage of the storage battery 104, and this surge voltage is applied to the IGBT 101c which turns off.

[0037] FIG. 5 is a circuit diagram showing the commutation of the current flowing through the AC terminal AC between the lower arm circuit and the clamp circuit.

[0038] When the IGBT 101d in the clamp circuit is turned off, the current flowing through the AC terminal AC is commutated from the clamp circuit to the lower arm circuit. In this case, the current flowing from the intermediate potential M to the AC terminal AC in the clamp circuit decreases, and the current flowing from the low potential N to the AC terminal AC in the lower arm circuit increases. That is, the values ​​of the time rate of change of the current (di / dt) in the clamp circuit and the lower arm circuit are negative and positive, respectively. The magnitudes (absolute values) of the time rate of change of the current in the clamp circuit and the lower arm circuit are equal. Therefore, if the magnitude (absolute value) of the time rate of change of the current is expressed as di / dt, then the clamp circuit and the lower arm circuit will have a combined current (L ｂＥ +L ｂＣ +L ｃＥ +L ｃＣ +L ｄＣ +L ｄＥ ) × (di / dt) is generated.

[0039] This induced electromotive force generates a steady voltage between the intermediate potential M and the low potential N, which in this embodiment is a surge voltage superimposed on half the voltage of the storage battery 104, and is applied to the IGBT 101d, which turns off.

[0040] As described above, when the current flowing through the AC terminals is commutated between the upper and lower arm circuits and the clamp circuit, a surge voltage due to the parasitic inductance of the wiring is applied to the IGBTs 101a to 101d. Therefore, the rated voltage of the IGBTs 101a to 101d is set to be equal to or greater than this surge voltage. When the speed of the IGBTs 101a to 101d increases, the magnitude (absolute value) of the time rate of change of the current increases, resulting in a larger surge voltage. Therefore, the rated voltage of the IGBTs 101a to 101d also increases.

[0041] Therefore, in this embodiment, as will be described below, the surge voltage is suppressed by the mutual inductance between the wirings having different positive and negative time rates of change of current as described above.

[0042] FIG. 6 is an exploded perspective view showing a schematic configuration of a circuit board on which the main circuit of the three-level power conversion device of this embodiment is mounted.

[0043] The first circuit board 301, the second circuit board 302, and the third circuit board 303 are stacked so that the entire flat surfaces of each board overlap each other. The first circuit board 301, the second circuit board 302, and the third circuit board 303 are connected to a high potential (P), an intermediate potential (M), and a low potential (N) on the DC side, respectively.

[0044] Each of the first circuit board 301, the second circuit board 302, and the third circuit board 303 includes a thin flat conductor layer used as wiring, and an insulating layer that covers the flat conductor layer and prevents electrical shorts between the flat conductor layers between the circuit boards.

[0045] For example, each of the first circuit board 301, the second circuit board 302, and the third circuit board 303 is made up of a printed circuit board or a laminate bus bar.

[0046] The flat conductor layer may be, for example, a copper foil having a thickness of 18 to 210 micrometers, and the insulating layer may be, for example, an insulating film made of epoxy resin.

[0047] Each of the first circuit board 301, the second circuit board 302, and the third circuit board 303 has a main circuit board portion having a flat conductor layer to which capacitors 104a and 104b are connected, and a plurality of circuit board portions (= the same number as the number of AC phases (three phases in FIG. 6)) extending from the circuit board. Each circuit board portion has a flat conductor layer to which a plurality of semiconductor switching elements (IGBTs in this embodiment) that constitute a power conversion circuit for one phase are connected. Therefore, as shown in FIG. 6, each of the first circuit board 301, the second circuit board 302, and the third circuit board 303 has circuit board portions for three phases.

[0048] In the following, the circuit board portions of first circuit board 301, second circuit board 302, and third circuit board 303 will be referred to as the first circuit board portion, the second circuit board portion, and the third circuit board portion, respectively. Also, the main circuit board portions of first circuit board 301, second circuit board 302, and third circuit board 303 will be referred to as the first main circuit board portion, the second main circuit board portion, and the third main circuit board portion, respectively.

[0049] A high-potential terminal of capacitor 104a is connected to the flat conductor in the first main circuit board portion of first circuit board 301. In this embodiment, the high-potential terminal of each of the plurality of capacitors that make up capacitor 104a is connected to the flat conductor in the first main circuit board portion of first circuit board 301.

[0050] The low potential side terminal of capacitor 104a and the low potential side terminal of capacitor 104b are connected to the flat conductor in the second main circuit board portion of second circuit board 302. In this embodiment, the low potential side terminal of each of the plurality of capacitors that make up capacitor 104a and the high potential side terminal of each of the plurality of capacitors that make up capacitor 104b are connected to the flat conductor in the second main circuit board portion of second circuit board 302.

[0051] A low-potential side terminal of capacitor 104b is connected to the flat conductor in the third main circuit board portion of third circuit board 303. In this embodiment, the low-potential side terminal of each of the plurality of capacitors constituting capacitor 104b is connected to the flat conductor in the third main circuit board portion of third circuit board 303.

[0052] The flat conductor in the first circuit board portion of the first circuit board 301 is patterned so as to form an upper arm circuit including the IGBT 101a.

[0053] The flat conductor in the second circuit board portion of the second circuit board 302 is patterned so as to form a clamp circuit including the IGBT 101c and the IGBT 101d.

[0054] The flat conductor in the third circuit board portion of the third circuit board 303 is patterned so as to form a lower arm circuit including the IGBT 101b.

[0055] The flat conductors on the first, second, and third main circuit boards are electrically connected to the flat conductors on the first, second, and third circuit boards, respectively. The flat conductors on the first, second, and third circuit boards extend from connection portions with the flat conductors on the first, second, and third main circuit boards, respectively, and have AC terminals at ends opposite the connection portions in the extending direction.

[0056] As shown in FIG. 6, first circuit board 301, second circuit board 302, and third circuit board 303 are stacked such that second circuit board 302 is located between first circuit board 301 and third circuit board 303.

[0057] Therefore, the plane of the patterned flat conductor layer of the first circuit board portion of first circuit board 301 and the plane of the patterned flat conductor layer of the second circuit board portion of second circuit board 302 are arranged closely and parallel to each other. In other words, the wiring in the upper arm circuit and the wiring in the clamp circuit are arranged closely and parallel to each other.

[0058] This makes it possible to suppress surge voltages that occur due to the inductance of the wiring in the upper arm circuit and the clamp circuit when current is commutated between the upper arm circuit and the clamp circuit.

[0059] Furthermore, the plane of the patterned flat conductor layer of the third circuit board portion of third circuit board 303 and the plane of the patterned flat conductor layer of the second circuit board portion of second circuit board 302 are arranged closely and parallel to each other. That is, the wiring in the lower arm circuit and the wiring in the clamp circuit are arranged closely and parallel to each other.

[0060] This makes it possible to suppress surge voltages that occur due to the inductance of the wiring in the lower arm circuit and the clamp circuit when current is commutated between the lower arm circuit and the clamp circuit.

[0061] In this embodiment, each of the IGBTs 101a, 101b, 101c, and 101d (including the diodes connected in antiparallel) is a discrete IGBT that is packaged (for example, TO-220 or TO-247) and has at least three terminals (collector terminal, emitter terminal, and gate terminal).

[0062] In this embodiment, the IGBT 101a constituting the upper arm circuit and one of the IGBTs 101c and 101d constituting the clamp circuit (the IGBT 101d in FIG. 6) are mounted on one heat sink 202. The IGBT 101b constituting the lower arm circuit and the other of the IGBTs 101c and 101d constituting the clamp circuit (the IGBT 101c in FIG. 6) are mounted on another heat sink 202.

[0063] In a so-called T-type three-level power conversion device, when DC power is converted to AC power, the semiconductor switching elements constituting the upper arm circuit and the lower arm circuit have larger losses than the semiconductor switching elements constituting the clamp circuit. Also, when AC power is converted to DC power, the semiconductor switching elements constituting the clamp circuit have larger losses than the semiconductor switching elements constituting the upper arm circuit and the lower arm circuit.

[0064] Therefore, by mounting the IGBT 101a and the IGBT 101d that constitutes the clamp circuit on one heat sink 202 and the IGBT 101b that constitutes the lower arm circuit and the IGBT 101c that constitutes the clamp circuit on another heat sink 202, the amount of loss borne by each heat sink is averaged. This allows the IGBTs 101a, 101b, 101c, and 101d to be efficiently cooled even when the cooling air 201 reaches the heat sink via the capacitors 104a and 104b. Therefore, the power conversion circuit unit composed of the IGBTs 101a, 101b, 101c, and 101d can be located close to the capacitors 104a and 104b while minimizing a decrease in cooling efficiency. This reduces the wiring inductance between the power conversion circuit unit and the capacitors 104a and 104b, thereby suppressing surge voltages.

[0065] FIG. 7 is a plan view showing the pattern configuration of flat conductors of the first circuit board portion and the second circuit board portion on which the IGBTs 101a, 101b, 101c, and 101d are mounted, respectively, in the first circuit board 301 and the second circuit board 302.

[0066] The direction of the current indicated by the arrow in FIG. 7 is the same as the direction of the current shown in FIG. 2 described above.

[0067] The flat conductor layer in the first circuit board portion of the first circuit board 301 extends from a connection portion with the DC side high potential P toward the AC terminal AC. On one of the left and right sides of the direction in which the flat conductor layer extends, i.e., on one of the two edge portions of the first circuit board portion extending toward the AC terminal AC, the IGBT 101a of the upper arm circuit and the IGBT 101d of the clamp circuit are arranged in this order toward the AC terminal AC.

[0068] At the other of the two edges of the first circuit board portion extending toward the AC terminal AC, the IGBT 101b of the lower arm circuit and the IGBT 101c of the clamp circuit are arranged in this order toward the AC terminal AC.

[0069] The flat conductor layer includes a portion (hereinafter referred to as the "first conductor portion for the upper arm circuit") that serves as wiring electrically connecting the high potential P on the DC side and the collector terminal C of the IGBT 101a, and a portion (hereinafter referred to as the "second conductor portion for the upper arm circuit") that serves as wiring electrically connecting the emitter terminal E of the IGBT 101a and the AC terminal AC.

[0070] L shown in FIG. ａＣ and L ａＥ are the parasitic inductances of the first conductor portion for the upper arm circuit and the second conductor portion for the upper arm circuit, respectively. ａＣ and L ａＥ are the parasitic inductances L of the wiring shown in FIG. ａＣ and L ａＥ is equivalent to

[0071] The flat conductor layer in the second circuit board portion of the second circuit board 302 extends from a connection portion with the DC side intermediate potential M toward the AC terminal AC. On one of the left and right sides of the direction in which the flat conductor layer extends, i.e., on one of the two edge portions of the second circuit board portion extending toward the AC terminal AC, the IGBT 101a of the upper arm circuit and the IGBT 101d of the clamp circuit are arranged in this order toward the AC terminal AC.

[0072] In addition, on the other of the left and right sides of the direction in which the flat conductor layer extends, i.e., on one of the two edge portions extending toward the AC terminal AC in the second circuit board portion, the IGBT 101b of the lower arm circuit and the IGBT 101c of the clamp circuit are arranged in the order IGBT 101b, IGBT 101c toward the AC terminal AC.

[0073] The flat conductor layer includes a portion that serves as wiring electrically connecting the DC side intermediate potential M and the emitter terminal E of IGBT 101c (hereinafter referred to as the "first conductor portion for clamp circuit"), a portion that serves as wiring electrically connecting the collector terminal C of IGBT 101c and the collector terminal C of IGBT 101d (hereinafter referred to as the "second conductor portion for clamp circuit"), and a portion that serves as wiring electrically connecting the emitter terminal E of IGBT 101d and the AC terminal AC (hereinafter referred to as the "third conductor portion for clamp").

[0074] L shown in FIG. ｃＥ , L ｃＣ +L ｄＣ and L ｄＥ are the parasitic inductances of the first conductor portion for the clamp circuit, the second conductor portion for the clamp circuit, and the third conductor portion for the clamp circuit, respectively. ｃＥ , L ｃＣ +L ｄＣ and L ｄＥ are the parasitic inductances L of the wiring shown in FIG. ｃＥ , L ｃＣ +L ｄＣ and L ｄＥ is equivalent to

[0075] In this embodiment, the first conductor portion for the upper arm circuit (L ａＣ) and the upper arm circuit second conductor portion (L ａＥ ) and the first conductor portion for clamp circuit (L ｃＥ ) are arranged close to each other so that the planes of the upper arm circuit first conductor portion (L ａＣ ) and the first conductor portion for clamp circuit (L ｃＥ ) the mutual inductance l between ｍ１ and the second conductor portion for the upper arm circuit (L ａＥ ) and the first conductor portion for clamp circuit (L ｃＥ ) the mutual inductance l between ｍ２ This affects the surge voltage generated in the upper arm circuit and the clamp circuit.

[0076] When the IGBT 101a is turned off and the current flowing through the AC terminal AC is commutated from the upper arm circuit to the clamp circuit, the first conductor portion (L ａＣ ) and the upper arm circuit second conductor portion (L ａＥ The time rate of change of the current flowing through the first conductor portion (L) for the clamp circuit is negative (di / dt<0). ｃＥ The current flowing through the first conductor portion (L ａＣ ) and the upper arm circuit second conductor portion (L ａＥ ) but the time rate of change is positive (di / dt>0). Therefore, the mutual inductance l ｍ１ and l ｍ２ acts to suppress surge voltages.

[0077] In this embodiment, the IGBT 101c and the IGBT 101d for the clamp circuit are adjacent to the AC terminal AC, so that the first conductor portion (L ｃＥ ) can be lengthened toward the AC terminal. ａＣ ) and the upper arm circuit second conductor portion (L ａＥ ) and the direction of the current flowing through the first conductor portion for clamp circuit (L ｃＥ ) can be made larger. This increases the mutual inductance l ｍ１ and l ｍ２This makes the surge voltage suppression effect more effective.

[0078] 8 is a plan view showing the pattern configuration of the flat conductors of the second circuit board portion and the third circuit board portion on which the IGBTs 101a, 101b, 101c, and 101d are mounted, respectively, in the second circuit board 302 and the third circuit board 303. The configuration of the second circuit board portion of the second circuit board 302 is the same as the configuration shown in FIG.

[0079] The direction of the current indicated by the arrow in FIG. 8 is the same as the direction of the current shown in FIG. 5 described above.

[0080] The flat conductor layer in the third circuit board portion of the third circuit board 303 extends from a connection portion with the DC side low potential N toward the AC terminal AC. On one of the left and right sides of the direction in which the flat conductor layer extends, i.e., on one of the two edge portions of the third circuit board portion extending toward the AC terminal AC, the IGBT 101b of the lower arm circuit and the IGBT 101c of the clamp circuit are arranged in this order toward the AC terminal AC.

[0081] In addition, on the other of the left and right sides of the direction in which the flat conductor layer extends, i.e., on one of the two edge portions extending toward the AC terminal AC in the third circuit board portion, the IGBT 101a of the upper arm circuit and the IGBT 101d of the clamp circuit are arranged in the order of IGBT 101a, IGBT 101d toward the AC terminal AC.

[0082] The flat conductor layer includes a portion (hereinafter referred to as the "first conductor portion for the lower arm circuit") that serves as wiring electrically connecting the low potential N on the DC side and the emitter terminal E of IGBT 101b, and a portion (hereinafter referred to as the "second conductor portion for the lower arm circuit") that serves as wiring electrically connecting the collector terminal C of IGBT 101b and the AC terminal AC.

[0083] L shown in FIG. ｂＥ and L ｂＣ are the parasitic inductances of the first conductor portion for the lower arm circuit and the second conductor portion for the lower arm circuit, respectively. ｂＥ and L ｂＣ are the parasitic inductances L of the wiring shown in FIG.ｂＥ and L ｂＣ is equivalent to

[0084] In this embodiment, the first conductor portion for the lower arm circuit (L ｂＥ ) and the second conductor portion for the lower arm circuit (L ｂＣ ) and the first conductor portion for clamp circuit (L ｃＥ ) are arranged close to each other so that the planes of the first conductor portion (L ｂＥ ) and the first conductor portion for clamp circuit (L ｃＥ ) the mutual inductance l between ｍ３ and the second conductor portion for the lower arm circuit (L ｂＣ ) and the first conductor portion for clamp circuit (L ｃＥ ) the mutual inductance l between ｍ４ This affects the surge voltage generated in the lower arm circuit and the clamp circuit.

[0085] When the IGBT 101d is turned off and the current flowing through the AC terminal AC is commutated from the clamp circuit to the lower arm circuit, the first conductor portion (L ｂＥ ) and the second conductor portion for the lower arm circuit (L ｂＣ The time rate of change of the current flowing through the first conductor portion (L) for the clamp circuit is positive (di / dt>0). ｃＥ The current flowing through the first conductor portion for the lower arm circuit (L ｂＥ ) and the upper arm circuit second conductor portion (L ｂＣ ) but the time rate of change is negative (di / dt<0). Therefore, the mutual inductance l ｍ３ and l ｍ４ acts to suppress surge voltages.

[0086] In this embodiment, the IGBT 101c and the IGBT 101d for the clamp circuit are adjacent to the AC terminal AC, so that the first conductor portion (L ｃＥ ) can be lengthened toward the AC terminal. ｂＥ ) and the second conductor portion for the lower arm circuit (L ｂＣ ) and the direction of the current flowing through the first conductor portion for clamp circuit (L ｃＥ) can be made larger. This increases the mutual inductance l ｍ３ and l ｍ４ This makes the surge voltage suppression effect more effective.

[0087] In the above-described embodiment, the first circuit board 301 has first circuit board portions for the respective phases, each of which constitutes an upper arm circuit, and each of the first circuit board portions has a first flat conductor that serves as wiring in the upper arm circuit, the second circuit board 302 has second circuit board portions for the respective phases, each of which constitutes a clamp circuit, and each of the second circuit board portions has a second flat conductor that serves as wiring in the clamp circuit, and the third circuit board 303 has third circuit board portions for the respective phases, each of which constitutes a lower arm circuit, and each of the third circuit board portions has a third flat conductor that serves as wiring in the lower arm circuit. Furthermore, the first circuit board 301, the second circuit board 302, and the third circuit board 303 are stacked on top of each other such that the second circuit board 302 is located between the first circuit board 301 and the third circuit board 303.

[0088] According to this embodiment, it is possible to suppress surge voltages that occur when current flowing through the AC terminals AC is commutated between the upper and lower arm circuits and the clamp circuit due to the mutual inductance between the flat conductors. Therefore, limitations on the switching speed of the semiconductor switching elements due to surge voltages can be alleviated, allowing the semiconductor switching elements to be operated at a higher speed and reducing power loss in the three-level power converter. Furthermore, it is possible to reduce the rated voltage of the semiconductor switching elements, and to downsize or eliminate surge absorption circuits (e.g., snubber circuits).

[0089] Although the above-described power conversion device has a T-type three-level power conversion circuit, the power conversion device is not limited to this and may have an I-type (diode clamp type) three-level power conversion circuit. In this case, two IGBTs constituting one arm circuit and one clamp diode are mounted on one heat sink.

[0090] The present invention is not limited to the above-described embodiments, but includes various modifications. For example, the above-described embodiments have been described in detail to clearly explain the present invention, and the present invention is not necessarily limited to those including all of the described configurations. Furthermore, it is possible to add, delete, or replace part of the configuration of the embodiment with other configurations.

[0091] For example, a modular IGBT may be used instead of the discrete IGBT, and other semiconductor switching elements such as a MOSFET may be used instead of the IGBT.

[0092] 100 Power conversion device, 101a, 101b, 101c, 101d IGBT, 102a, 102b, 102c, 102d Diode, 103 Power system, 104 Storage battery, 104a, 104b Capacitor, 201 Cooling air, 202 Heat sink, 301 First circuit board, 302 Second circuit board, 303 Third circuit board

Claims

1. A power conversion device including power conversion circuits, each including an upper arm circuit connecting a high potential on the DC side to an AC terminal, a clamp circuit clamping the potential of the AC terminal to an intermediate potential on the DC side, and a lower arm circuit connecting a low potential on the DC side to the AC terminal, for the same number of phases on the AC side, the power conversion device comprising: a first circuit board on which the upper arm circuits are configured for the same number of phases; a second circuit board on which the clamp circuits are configured for the same number of phases; and a third circuit board on which the lower arm circuits are configured for the same number of phases, wherein the first circuit board has first circuit board sections on which the upper arm circuits are configured for the same number of phases, the first circuit board sections having first flat conductors that become wiring in the upper arm circuits; the second circuit board has second circuit board sections on which the clamp circuits are configured for the same number of phases, the second circuit board sections having second flat conductors that become wiring in the clamp circuits; the third circuit board has third circuit board portions, on which the lower arm circuits are configured, corresponding to the number of phases, and the third circuit board portions have third flat conductors that become the wiring in the lower arm circuits; and the first circuit board, the second circuit board, and the third circuit board are stacked on top of each other such that the second circuit board is located between the first circuit board and the third circuit board.

2. A power conversion device as described in claim 1, characterized in that the plane of the first flat conductor and the plane of the second flat conductor are adjacent to each other, facing parallel to each other, and the plane of the second flat conductor and the plane of the third flat conductor are adjacent to each other, facing parallel to each other.

3. A power conversion device as described in claim 1, wherein the first circuit board, the second circuit board, and the third circuit board are connected to the high potential, the intermediate potential, and the low potential, respectively, and the first circuit board portion, the second circuit board portion, and the third circuit board portion are extensions of the first circuit board, the second circuit board, and the third circuit board, respectively, that extend toward the AC terminals.

4. A power conversion device as claimed in claim 3, characterized in that the plane of the first flat conductor and the plane of the second flat conductor are adjacent to each other, facing parallel to each other, and the plane of the second flat conductor and the plane of the third flat conductor are adjacent to each other, facing parallel to each other.

5. A power conversion device as claimed in claim 3, characterized in that the semiconductor elements for the upper arm circuit and the semiconductor elements for the first clamp circuit are located at one of the two edge portions extending towards the AC terminal of the first circuit board portion, the second circuit board portion and the third circuit board portion which are stacked on top of each other, and the semiconductor elements for the lower arm circuit and the semiconductor elements for the second clamp circuit are located at the other of the two edge portions.

6. A power conversion device according to claim 5, wherein the semiconductor elements for the upper arm circuit and the semiconductor elements for the first clamp circuit are mounted on a first heat sink, and the semiconductor elements for the lower arm circuit and the semiconductor elements for the second clamp circuit are mounted on a second heat sink.

7. A power conversion device according to claim 5, wherein the semiconductor element for the first clamp circuit is closer to the AC terminal than the semiconductor element for the upper arm circuit, and the semiconductor element for the second clamp circuit is closer to the AC terminal than the semiconductor element for the lower arm circuit.

8. A power conversion device as claimed in claim 2, characterized in that when the current flowing through the AC terminal is commutated between the upper arm circuit and the clamp circuit, the currents flowing through the first flat conductor and the second flat conductor have the same direction and have opposite positive and negative current change rates, and when the current flowing through the AC terminal is commutated between the clamp circuit and the lower arm circuit, the currents flowing through the second flat conductor and the third flat conductor have the same direction and have opposite current change rates.

9. A power conversion device according to claim 3, comprising a first capacitor and a second capacitor connected in series, the first circuit board being connected to the high potential terminal of the first capacitor, the second circuit board being connected to the series connection point of the first capacitor and the second capacitor, and the third circuit board being connected to the low potential terminal of the second capacitor.

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