Sensor system, sensor data processing device, method for controlling sensor data processing device, computer program, and computer-readable recording medium having computer program recorded thereon

Abstract

The present invention suppresses processing from being unable to be performed on sensor data output by a sensor. This sensor system comprises: a first sensor; a second sensor; a dynamic reconfiguration circuit for selectively reconfiguring a first processing configuration for processing first sensor data output by the first sensor and a second processing configuration for processing second sensor data output by the second sensor; a memory; and a controller. The controller stores the first sensor data output by the first sensor in the memory, and stores the second sensor data output by the second sensor in the memory. The dynamic reconfiguration circuit processes the first sensor data stored in the memory in the first processing configuration, and processes the second sensor data stored in the memory in the second processing configuration.

Description

Sensor system, sensor data processing device, control method for sensor data processing device, computer program, and computer-readable recording medium having computer program recorded thereon

[0001] The technology disclosed in this specification relates to a sensor system, a sensor data processing device, a control method for a sensor data processing device, a computer program, and a computer-readable recording medium on which a computer program is recorded.

[0002] For example, with the advancement of autonomous driving (AD) systems and advanced driver assistance systems (ADAS), vehicles are equipped with multiple sensors. Examples of sensors include light detection and ranging (LiDAR), complementary metal oxide semiconductor (CMOS) sensors, and millimeter-wave radar, which are used to grasp the surrounding environment and estimate the vehicle's position while the vehicle is traveling. Different processes (e.g., arithmetic processing) may be performed on the sensor data output from each of the multiple sensors.

[0003] Conventionally, there has been known a sensor data processing device having a dynamic reconfiguration circuit, which is configured to reconfigure the dynamically reconfigurable circuit to a first processing configuration for processing the first sensor data when a first sensor outputs first sensor data, and to reconfigure the dynamically reconfigurable circuit to a second processing configuration for processing the second sensor data when a second sensor outputs second sensor data.

[0004] JP 2010-282563 A

[0005] In the conventional sensor data processing device, for example, there is a problem that the first sensor data output by the first sensor cannot be processed during a period when the dynamically reconfigurable circuit is not reconfigured to the first processing configuration. This problem is not limited to vehicles, but is common to sensor data processing devices and sensor systems for multiple sensors mounted on other devices, etc.

[0006] This specification discloses a technique that can solve the above-mentioned problems.

[0007] The technology disclosed in this specification can be realized, for example, in the following forms.

[0008] (1) A sensor system disclosed in the present specification includes a first sensor, a second sensor, a dynamically reconfigurable circuit selectively reconfiguring the first sensor data output by the first sensor into a first processing configuration for processing first sensor data output by the first sensor and a second processing configuration for processing second sensor data output by the second sensor, a memory, and a controller, wherein the controller stores the first sensor data output by the first sensor in the memory and stores the second sensor data output by the second sensor in the memory, and the dynamically reconfigurable circuit processes the first sensor data stored in the memory with the first processing configuration and processes the second sensor data stored in the memory with the second processing configuration. With this configuration, since the sensor data is stored in the memory, the first sensor data can be processed with the first processing configuration after the fact, for example, at a timing after the first sensor outputs the first sensor data.

[0009] (2) In the sensor system, the controller may store in the memory reconfiguration period data, which is the first sensor data output by the first sensor during a first reconfiguration period during which the dynamically reconfigurable circuit is reconfigured from the second processing configuration to the first processing configuration, and the dynamically reconfigurable circuit may process the reconfiguration period data stored in the memory in the first processing configuration after the first reconfiguration period. With this configuration, the first sensor data output by the first sensor during the first reconfiguration period during which the dynamically reconfigurable circuit is reconfigured from the second processing configuration to the first processing configuration can be processed in the first processing configuration.

[0010] (3) The sensor system may further include a simplified processing unit that executes auxiliary processing simpler than the first processing configuration, wherein the controller stores in the memory reconfiguration period data, which is the first sensor data output by the first sensor during a first reconfiguration period in which the dynamically reconfigurable circuit is reconfigured from the second processing configuration to the first processing configuration, and the simplified processing unit executes the auxiliary processing on at least a portion of the reconfiguration period data stored in the memory as needed during the first reconfiguration period. With this configuration, even during the first reconfiguration period in which the dynamically reconfigurable circuit is reconfigured from the second processing configuration to the first processing configuration, it is possible to continue processing the first sensor data output by the first sensor.

[0011] (4) In the sensor system, the simplified processing unit may stop the auxiliary processing after the first reconfiguration period, and the dynamically reconfigurable circuit may process the reconfiguration period data remaining in the memory without being processed by the simplified processing unit after the first reconfiguration period using the first processing configuration. With this configuration, for example, more reconfiguration period data can be processed using an advanced processing configuration using the dynamically reconfigurable circuit than in a configuration in which the simplified processing unit continues auxiliary processing even after the first reconfiguration period has elapsed.

[0012] (5) In the sensor system, the controller may store in the memory processing period data, which is the second sensor data output by the second sensor during a first processing period in which the dynamically reconfigurable circuit processes the first sensor data using the first processing configuration, and the dynamically reconfigurable circuit may process the processing period data stored in the memory using the second processing configuration after a second reconfiguration period in which the dynamically reconfigurable circuit is reconfigured from the first processing configuration to the second processing configuration. With this configuration, the second sensor data output by the second sensor during the processing period in which the dynamically reconfigurable circuit processes the first sensor data using the first processing configuration can be processed using the second processing configuration.

[0013] The technology disclosed in this specification can be realized in various forms, such as a sensor system, a sensor data processing device, a control method for a sensor data processing device, a computer program for controlling a floodlight, and a computer-readable recording medium on which the computer program is recorded.

[0014] 1 is a block diagram showing a schematic configuration of a sensor system according to an embodiment; 2 is a block diagram showing a flow of data exchange in a first case; 3 is a sequence diagram showing a processing process in the first case; 4 is a block diagram showing a flow of data exchange in a second case; 5 is a sequence diagram showing a processing process in the second case; 6 is a block diagram showing a flow of data exchange in a modified example of the embodiment;

[0015] A. Embodiments: A-1. Configuration of Sensor System 1: This embodiment will be described with reference to Figures 1 to 3. The sensor system 1 of this embodiment is mounted on a vehicle equipped with, for example, an AD (automated drive) system or an ADAS (advanced driver assistance system). The sensor system 1 includes a plurality of sensors and a sensor data processing device 10.

[0016] A-1-1. Sensors: As shown in FIG. 1 , the multiple sensors include, for example, external sensors 20 (20A, 20B, 20C) disposed outside the sensor interface 14 and internal sensors 22 (22A, 22B, 22C) disposed inside the sensor interface 14. Examples of sensors include optical sensors such as LiDAR, image sensors such as CMOS sensors, cameras, millimeter-wave radar, sensors that detect changes in the external environment (such as outside air temperature), GPS (Global Positioning System) sensors, crank angle sensors, rotational speed sensors, knock sensors, motor rotation speed sensors, motor torque sensors, current sensors, acceleration sensors, and gyro sensors. In this embodiment, the internal sensors 22 are disposed in the sensor interface 14 together with the input determination circuit 50, which will be described below.

[0017] A-1-2. Sensor Data Processing Device: The sensor data processing device 10 includes a dynamically reconfigurable processor (Dynamically Reconfigurable Processor) 30 ("DRP" in FIG. 1), a memory 40 ("RAM" in FIG. 1), an input judgment circuit 50 ("IJC" in FIG. 1), and a CPU (central processing unit) 60. The input judgment circuit 50, the dynamically reconfigurable processor 30, the memory 40, and the input judgment circuit 50 are connected to each other via a bus 12 so that data communication is possible. The dynamically reconfigurable processor 30 is an example of a dynamically reconfigurable circuit.

[0018] The dynamically reconfigurable processor 30 has a plurality of arithmetic units (also referred to as PEs (Processing Elements), not shown) and wiring (not shown) connecting the arithmetic units. The processing configuration for executing a plurality of different sensor data processes is reconfigured by switching the wiring pattern between the plurality of arithmetic units. The sensor data processes are processes executed on the sensor data output by each of the plurality of sensors 20 and 22. In this embodiment, the sensor data processes corresponding to the plurality of sensors are different from each other. For example, if the first sensor 20A is a LiDAR and the second sensor 22A is a CMOS sensor, at least a portion of the first sensor data process SP1 for the LiDAR executed on the first sensor data SD1 from the first sensor 20A (see FIG. 3 ) and the second sensor data process SP2 for the CMOS sensor executed on the second sensor data SD2 from the second sensor 22A (see FIG. 7 ) are different from each other. Furthermore, even if the first sensor 20A and the second sensor 22A are the same type of sensors, at least a portion of the sensor data processing corresponding to the first sensor 20A and the sensor data processing (processing configuration) corresponding to the second sensor 22A may be different from each other.

[0019] The dynamic reconfigurable processor 30 has a flash ROM 32. The flash ROM 32 stores reconfiguration correspondence information. The reconfiguration correspondence information is information (such as a data table) in which a plurality of sensors are associated with a plurality of object codes corresponding to the sensor data output by each of the plurality of sensors. The object codes include, for example, connection / disconnection information between the arithmetic units. The dynamic reconfigurable processor 30 can switch the wiring between the arithmetic units based on the object codes.

[0020] The dynamically reconfigurable processor 30 may be implemented as, for example, a programmable logic device (PLD), a field programmable gate array (FPGA), or a reconfigurable chip. The arithmetic unit is capable of performing operations such as an arithmetic logic unit (ALU), a load store unit (LSU), a multiply (MUL), and a divide (DIV). The results of the operations are stored in a register file (not shown) and written to a memory (not shown) via a register set in accordance with instructions from a program.

[0021] The input determination circuit 50 is connected to each of the multiple sensors 20, 22 so as to be able to communicate data with them. In this embodiment, the multiple sensors 20, 22 each output sensor data at a specific timing. The sensor data output by the multiple sensors 20, 22 is input to the input determination circuit 50 at an arbitrary timing. The input determination circuit 50 has a storage unit 52 that temporarily stores the input sensor data. The input determination circuit 50 is an example of a controller.

[0022] The CPU 60 can execute auxiliary processing AP (see FIG. 5 ) on the sensor data. The auxiliary processing is simple processing that is slower in processing speed and simpler in calculation than the sensor data processing executed by the dynamic reconfiguration processor 30. The CPU 60 is an example of a simple processing unit. The memory 40 is, for example, a RAM (random access memory) or the like.

[0023] A-2. Sensor Data Processing: (When Only One Sensor Outputs Sensor Data at the Same Time): FIGS. 2 and 3 show an example in which the first sensor 20A sequentially outputs the first sensor data SD1 at a predetermined time interval. The input judgment circuit 50 ("IJC" in FIG. 3) sequentially receives the first sensor data SD1 from the first sensor 20A, but does not receive sensor data from other sensors. When the first sensor 20A starts outputting the first sensor data SD1, the dynamic reconfiguration processor 30 ("DRP" in FIG. 3) is configured with another processing configuration (e.g., a second processing configuration) different from the first processing configuration. The first processing configuration is a processing configuration that executes first sensor data processing SP1 that processes the first sensor data SD1 from the first sensor 20A. Another processing configuration is a processing configuration that executes sensor data processing (e.g., second sensor data processing SP2) that processes sensor data (e.g., second sensor data SD2) from another sensor (e.g., second sensor 22A) different from the first sensor 20A.

[0024] When the input determination circuit 50 receives sensor data from a sensor, it determines from which sensor the sensor data was received based on the received sensor data, stores sensor information identifying the sensor that sent the data in the storage unit 52, and transmits the sensor information to the dynamic reconfiguration processor 30. In the examples of FIGS. 2 and 3 , the input determination circuit 50 determines based on the received first sensor data SD1 that the first sensor data SD1 has been received from the first sensor 20A, and transmits first sensor information ND1 indicating that the sensor that sent the data is the first sensor 20A to the dynamic reconfiguration processor 30.

[0025] As described above, when the output of the first sensor data SD1 starts, the dynamic reconfiguration processor 30 is configured with the second processing configuration. Therefore, the dynamic reconfiguration processor 30 cannot execute the first sensor data processing SP1 on the first sensor data SD1. The dynamic reconfiguration processor 30 reconfigures from the second processing configuration to the first processing configuration based on the reception of the first sensor information ND1. Hereinafter, the period from when the dynamic reconfiguration processor 30 reconfigures from the second processing configuration to the first processing configuration is referred to as the "first reconfiguration period DR1." The dynamic reconfiguration processor 30 cannot execute the first sensor data processing SP1 until the first reconfiguration period DR1 has elapsed.

[0026] When the input determination circuit 50 receives sensor data from a sensor, it stores the received sensor data in the memory 40 ("RAM" in FIG. 3). The input determination circuit 50 stores the sensor data in association with the identification information of the sensor that is the sender of the sensor data and the reception timing. In the examples of FIGS. 2 and 3, the input determination circuit 50 sequentially stores the multiple first sensor data SD1 received from the first sensor 20A in the memory 40. Hereinafter, the sensor data stored in the memory 40 during the first reconstruction period DR1 will be referred to as "reconstruction period data."

[0027] After the first reconfiguration period DR1 has elapsed, the dynamic reconfiguration processor 30 reads the reconfiguration period data from the memory 40 and executes sensor data processing on the reconfiguration period data. In the examples of Figures 2 and 3, after the reconfiguration of the first processing configuration is completed, the dynamic reconfiguration processor 30 reads the first sensor data SD1 (reconfiguration period data) from the memory 40 and executes first sensor data processing SP1 on the first sensor data SD1.

[0028] (When Multiple Sensors Output Sensor Data Simultaneously): FIGS. 4 and 5 show an example in which the second sensor 22A outputs the second sensor data SD2 while the first sensor 20A outputs the first sensor data SD1. Specifically, the first sensor 20A sequentially outputs the first sensor data SD1 at predetermined time intervals. At this time, the dynamic reconfiguration processor 30 has already configured the first processing configuration. Therefore, the dynamic reconfiguration processor 30 is executing the first sensor data processing SP1 on the first sensor data SD1. Note that this may also be the case when the output of the first sensor data SD1 from the first sensor 20A has finished and the dynamic reconfiguration processor 30 is executing the first sensor data processing SP1 on the unprocessed first sensor data SD1 remaining in the memory 40. In this way, it is assumed that the second sensor 22A outputs the second sensor data SD2 during the first processing period in which the dynamic reconfiguration processor 30 is executing the first sensor data processing SP1.

[0029] When the second sensor 22A receives the second sensor data SD2 during the first processing period, the input determination circuit 50 determines, based on the received second sensor data SD2, that the second sensor data SD2 has been received from the second sensor 22A, and checks the storage unit 52 for second sensor information ND5 indicating that the sensor that sent the second sensor data SD2 is the second sensor 22A. The input determination circuit 50 also stores the received second sensor data SD2 in association with the identification information of the second sensor 22A. Hereinafter, the sensor data stored in the memory 40 during the first processing period will be referred to as "processing period data."

[0030] When the dynamic reconfiguration processor 30 completes the first sensor data processing SP1 on the first sensor data SD1 stored in the memory 40, it transmits processing completion information ND4 indicating the completion of the sensor data processing to the input determination circuit 50. Upon receiving the processing completion information ND4, the input determination circuit 50 transmits the second sensor information ND5 stored in the storage unit 52 to the dynamic reconfiguration processor 30. Based on the reception of the second sensor information ND5, the dynamic reconfiguration processor 30 reconfigures the first processing configuration to the second processing configuration. Hereinafter, the period from when the dynamic reconfiguration processor 30 reconfigures the first processing configuration to when the dynamic reconfiguration processor 30 reconfigures the second processing configuration is referred to as a "second reconfiguration period DR2." The dynamic reconfiguration processor 30 cannot execute the second sensor data processing SP2 until the second reconfiguration period DR2 has elapsed.

[0031] After the second reconfiguration period DR2 has elapsed, the dynamic reconfiguration processor 30 reads the second sensor data SD2 (processing period data) from the memory 40 and executes second sensor data processing SP2 on the second sensor data SD2.

[0032] A-3. Effects of this Embodiment: In this embodiment, the input determination circuit 50 stores the first sensor data SD1 (reconfiguration period data) output by the first sensor 20A in the memory 40 in association with the identification information of the first sensor 20A during the first reconfiguration period DR1 in which the dynamic reconfiguration processor 30 reconfigures from the second processing configuration to the first processing configuration. After the first reconfiguration period DR1 has elapsed, the dynamic reconfiguration processor 30 processes the first sensor data SD1 stored in the memory 40 using the first processing configuration. Therefore, according to this embodiment, the first sensor data SD1 output by the first sensor 20A during the first reconfiguration period DR1 can be processed later using the first processing configuration without any loss (see FIGS. 2 and 3).

[0033] Furthermore, according to this embodiment, the second sensor data SD2 output by the second sensor 22A during the processing period in which the dynamic reconfiguration processor 30 processes the first sensor data SD1 with the first processing configuration can be processed later with the second processing configuration without any leakage (see FIGS. 4 and 5).

[0034] A-4. Modification of this Embodiment: A modification of this embodiment will be described with reference to FIGS. 6 and 7. This modification differs from the above embodiment in the processing content executed by the sensor data processing device 10. In this modification, during the first reconstruction period DR1, the CPU 60 executes auxiliary processing AP on the first sensor data SD1 (reconstruction period data) output by the first sensor 20A during the first reconstruction period DR1.

[0035] 6 and 7 , similar to FIG. 3 and the like, an example is shown in which the first sensor 20A sequentially outputs the first sensor data SD1 at a predetermined time interval. The input determination circuit 50 sequentially receives the first sensor data SD1 from the first sensor 20A, but does not receive sensor data from other sensors. When the first sensor 20A starts outputting the first sensor data SD1, the dynamically reconfigurable processor 30 is configured with another processing configuration (e.g., a second processing configuration) different from the first processing configuration.

[0036] The input determination circuit 50 determines, based on the received first sensor data SD1, that the first sensor data SD1 has been received from the first sensor 20A, and transmits first sensor information ND1 indicating that the sensor that transmitted the first sensor data SD1 is the first sensor 20A to the dynamic reconfiguration processor 30. The input determination circuit 50 sequentially stores the plurality of first sensor data SD1 received from the first sensor 20A in the memory 40.

[0037] During the first reconstruction period DR1, the CPU 60 reads the first sensor data SD1 (reconstruction period data) from the memory 40 and executes auxiliary processing AP on the first sensor data SD1. That is, the CPU 60 performs processing (auxiliary processing AP) on the multiple pieces of first sensor data SD1 (reconstruction period data) stored in the memory 40 before the first reconstruction period DR1 has elapsed.

[0038] Thereafter, after the reconfiguration of the first processing configuration is completed, the dynamic reconfiguration processor 30 transmits reconfiguration completion information ND2 indicating the completion of the reconfiguration to the CPU 60. Upon receiving the reconfiguration completion information ND2, the CPU 60 stops the auxiliary processing AP. The CPU 60 transmits stop information ND3 indicating that the auxiliary processing AP has been stopped to the dynamic reconfiguration processor 30. Note that the stop information ND3 preferably includes information indicating up to which data, of the plurality of first sensor data SD1 (reconfiguration period data) stored in the memory 40, the auxiliary processing AP has been executed.

[0039] When the dynamic reconfiguration processor 30 receives the stop information ND3, it executes first sensor data processing SP1 on unprocessed first sensor data SD1, among the plurality of first sensor data SD1 stored in the memory 40, for which auxiliary processing AP processing has not been executed.

[0040] As described above, according to this modification, processing on the first sensor data SD1 (auxiliary processing AP) can be continued even during the first reconfiguration period DR1. Furthermore, in this modification, as soon as the reconfiguration of the first processing configuration is completed, the dynamic reconfiguration processor 30 executes the first sensor data processing SP1 on the first sensor data SD1 that remains in the memory 40 without having been executed with the auxiliary processing AP. Therefore, according to this modification, it is possible to process a larger amount of reconfiguration period data with an advanced processing configuration by the dynamic reconfiguration processor 30, compared to a configuration in which the auxiliary processing AP by the CPU 60 continues even after the first reconfiguration period DR1 has elapsed.

[0041] B. Modifications: The technology disclosed in this specification is not limited to the above-described embodiment, and can be modified in various forms without departing from the spirit of the invention. For example, the following modifications are also possible.

[0042] In the above embodiment, an example has been described in which the sensor system 1 and the sensor data processing device 10 are mounted on a vehicle, but this is not limiting and the sensor system 1 and the sensor data processing device 10 may be mounted on a moving body, device, fixed body, etc. other than a vehicle.

[0043] In the above embodiment, the controller is configured with dedicated hardware such as the input determination circuit 50. However, the controller may also be a control device including a processor such as a CPU and a storage device such as a ROM (read only memory) or RAM. The storage device stores various programs and data, and is used as a work area and data storage area when executing various processes. For example, the storage device stores a computer program for the processes executed by the controller (the input determination circuit 50 or the CPU 60). This computer program is provided in a state stored on a computer-readable recording medium (not shown), such as a CD-ROM, DVD-ROM, or USB memory, or is provided in a state where it can be retrieved from an external device (e.g., a cloud server) via a communication interface and stored in the storage device.

[0044] In the above embodiment, when the input determination circuit 50 receives sensor data from a plurality of sensors at the same time, the input determination circuit 50 may store the sensor data from the plurality of sensors in the memory 40, and may sequentially reconfigure the sensor data in a predetermined order into processing configurations corresponding to the plurality of sensors, while reading the sensor data from the memory 40 and executing sensor data processing. The predetermined order may be the first-come, first-served order in which the sensor data is received by the input determination circuit 50, or may be an order according to the priorities assigned to the plurality of sensors.

[0045] 4 and 5 of the above embodiment, when the second sensor 22A receives the second sensor data SD2 during the first processing period, the input determination circuit 50 may interrupt the first sensor data SD1 with the second sensor data SD2. That is, before the dynamic reconfiguration processor 30 completes the first sensor data processing SP1, the dynamic reconfiguration processor 30 may interrupt the first sensor data processing SP1, reconfigure the dynamic reconfiguration processor 30 from the first processing configuration to the second processing configuration, and execute the second sensor data SD2.

[0046] This international application claims priority based on Japanese Patent Application No. 2024-106514, filed on July 2, 2024, the entire contents of which are incorporated herein by reference.

[0047] The above descriptions of specific embodiments of the present invention have been presented for purposes of illustration. They are not intended to be exhaustive or to limit the invention to the precise forms described. Numerous modifications and variations will be apparent to those skilled in the art in light of the above description.

[0048] 1: Sensor system 10: Sensor data processing device 12: Bus 14: Sensor interface 20A: First sensor 22A: Second sensor 30: Dynamic reconfiguration processor 32: Flash ROM 40: Memory 50: Input determination circuit 52: Storage unit 60: CPU AP: Auxiliary processing DR1: First reconfiguration period DR2: Second reconfiguration period ND1: First sensor information ND2: Reconfiguration completion information ND3: Stop information ND4: Processing completion information ND5: Second sensor information SD1: First sensor data SD2: Second sensor data SP1: First sensor data processing SP2: Second sensor data processing

Claims

1. A sensor system comprising: a first sensor; a second sensor; a dynamically reconfigurable circuit selectively reconfiguring the first sensor into a first processing configuration for processing first sensor data output by the first sensor and a second processing configuration for processing second sensor data output by the second sensor; a memory; and a controller, wherein the controller stores the first sensor data output by the first sensor in the memory, and stores the second sensor data output by the second sensor in the memory, and the dynamically reconfigurable circuit processes the first sensor data stored in the memory with the first processing configuration, and processes the second sensor data stored in the memory with the second processing configuration.

2. A sensor system according to claim 1, wherein the controller stores in the memory reconfiguration period data, which is the first sensor data output by the first sensor during a first reconfiguration period in which the dynamically reconfigurable circuit reconfigures from the second processing configuration to the first processing configuration, and the dynamically reconfigurable circuit processes the reconfiguration period data stored in the memory in the first processing configuration after the first reconfiguration period.

3. A sensor system according to claim 1, further comprising a simplified processing unit that executes auxiliary processing simpler than the first processing configuration, wherein the controller stores in the memory reconstruction period data, which is the first sensor data output by the first sensor during a first reconstruction period in which the dynamic reconfiguration circuit reconfigures from the second processing configuration to the first processing configuration, and wherein the simplified processing unit executes the auxiliary processing on at least a portion of the reconstruction period data stored in the memory as needed during the first reconstruction period.

4. A sensor system according to claim 3, wherein the simple processing unit stops the auxiliary processing after the first reconfiguration period, and the dynamic reconfiguration circuit processes the reconfiguration period data remaining in the memory without being processed by the simple processing unit after the first reconfiguration period using the first processing configuration.

5. A sensor system according to claim 1, wherein the controller stores in the memory processing period data, which is the second sensor data output by the second sensor during a first processing period in which the dynamically reconfigurable circuit processes the first sensor data using the first processing configuration, and the dynamically reconfigurable circuit processes the processing period data stored in the memory using the second processing configuration after a second reconfiguration period in which the dynamically reconfigurable circuit is reconfigured from the first processing configuration to the second processing configuration.

6. A sensor data processing device comprising: a dynamically reconfigurable circuit that selectively reconfigures into a first processing configuration that processes first sensor data output by a first sensor and a second processing configuration that processes second sensor data output by a second sensor; a memory; and a controller, wherein the controller: stores the first sensor data output by the first sensor in the memory; and stores the second sensor data output by the second sensor in the memory; and the dynamically reconfigurable circuit: processes the first sensor data stored in the memory with the first processing configuration; and processes the second sensor data stored in the memory with the second processing configuration.

7. A control method for a sensor data processing device comprising a dynamically reconfigurable circuit selectively reconfiguring into a first processing configuration for processing first sensor data output by a first sensor and a second processing configuration for processing second sensor data output by a second sensor, and a memory, the method comprising: storing in the memory reconfiguration period data, which is the first sensor data output by the first sensor during a first reconfiguration period in which the dynamically reconfigurable circuit reconfigures from the second processing configuration to the first processing configuration; and after the first reconfiguration period, causing the dynamically reconfigurable circuit to process the reconfiguration period data stored in the memory in the first processing configuration.

8. A computer program for causing a computer possessed by a sensor data processing device including a dynamically reconfigurable circuit that selectively reconfigures into a first processing configuration that processes first sensor data output by a first sensor and a second processing configuration that processes second sensor data output by a second sensor, and a memory, to store in the memory reconfiguration period data, which is the first sensor data output by the first sensor during a first reconfiguration period in which the dynamically reconfigurable circuit reconfigures from the second processing configuration to the first processing configuration, and after the first reconfiguration period, to cause the dynamically reconfigurable circuit to process the reconfiguration period data stored in the memory in the first processing configuration.

9. A computer-readable recording medium having recorded thereon a computer program for controlling a sensor data processing device comprising a dynamically reconfigurable circuit selectively reconfiguring into a first processing configuration for processing first sensor data output by a first sensor and a second processing configuration for processing second sensor data output by a second sensor, and a memory, the computer program causing the sensor data processing device to store in the memory reconfiguration period data, which is the first sensor data output by the first sensor during a first reconfiguration period in which the dynamically reconfigurable circuit reconfigures from the second processing configuration to the first processing configuration, and after the first reconfiguration period, causing the dynamically reconfigurable circuit to process the reconfiguration period data stored in the memory with the first processing configuration.

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