Single-photon avalanche diode pixel array having heterojunction structure and manufacturing method therefor

Abstract

One embodiment of the present invention provides a single-photon avalanche diode pixel array having a heterojunction structure, comprising: a substrate which has a trench and an avalanche amplification region formed, and is doped with a first conductive-type dopant; and a short wavelength absorption layer which is disposed inside the trench and is doped with the first conductive-type dopant, wherein the short wavelength absorption layer comprises a first region which is doped with the first conductive-type dopant, and a second region which is disposed on the first region and is formed on the upper surface of the short wavelength absorption layer by being heavily doped with the first conductive-type dopant, and the first conductive-type dopant has a concentration gradient increasing from the substrate toward the second region.

Description

Single-photon avalanche diode pixel array and electrode fabrication method having a heterojunction structure

[0001] The present invention relates to an image sensor, and more particularly, to an image sensor including a single-photon avalanche diode pixel array having a heterojunction structure.

[0002] Time of Flight (TOF) technology irradiates pulsed light from a light source positioned within or near the sensor, receives the reflected light, measures the time between these pulses, and derives the distance based on the law of constancy of the speed of light. Precise TOF measurements require a highly sensitive photoelectric conversion element, as a response must occur immediately upon reaching the light-receiving element. To achieve this, active research is underway on single-photon avalanche diodes (SPADs) that can be fabricated using CMOS process technology.

[0003] A single-photon avalanche diode (SAD) is a structure that repeats operation and recovery (quenching) in Geiger mode by applying a reverse voltage significantly higher than the breakdown voltage (also referred to as the avalanche voltage) to the photodiode. Since the SAD is subjected to a reverse voltage exceeding the breakdown voltage, electron avalanche occurs due to carriers generated by photoelectric conversion, and the SAD enters a breakdown state. As a result, carrier amplification due to photoelectric conversion occurs, which can improve the sensitivity of imaging devices.

[0004] Germanium (Ge) has a smaller band gap than silicon, providing enhanced absorption in the short-wavelength infrared (SWIR) compared to silicon. However, when implementing single-photon avalanche diodes based on Ge, high dark current can lead to low yield and poor image quality.

[0005] Recently, research has been continuously conducted to implement single-photon avalanche diodes using germanium (Ge) while obtaining yield and image quality.

[0006] One embodiment of the present invention provides a single-photon avalanche diode pixel array having a heterojunction structure with improved high dark current.

[0007] One embodiment of the present invention provides a single-photon avalanche diode pixel array having a heterojunction structure capable of sensing both visible light and short-wave infrared light.

[0008] One embodiment of the present invention provides a single-photon avalanche diode pixel array having a heterojunction structure with high quantum efficiency (QE).

[0009] In order to achieve the above-described technical problem, one embodiment of the present invention provides a single-photon avalanche diode pixel array having a heterojunction structure, including: a substrate in which a trench and an avalanche amplification region are formed, and doped with a dopant of a first conductivity type; and a short-wavelength absorbing layer disposed inside the trench and doped with a dopant of the first conductivity type; wherein the short-wavelength absorbing layer includes: a first region doped with a dopant of the first conductivity type; and a second region disposed on the first region and formed by being highly doped with a dopant of the first conductivity type on an upper surface of the short-wavelength absorbing layer, wherein the dopant of the first conductivity type has a concentration gradient that increases from the substrate toward the second region.

[0010] Another embodiment of the present invention may provide a method for manufacturing a single-photon avalanche diode pixel array having a heterojunction structure, the method comprising: forming a trench in a substrate having a first conductivity type; growing a short-wavelength absorbing layer having the first conductivity type within the trench; wherein the short-wavelength absorbing layer includes: a first region doped with a dopant of the first conductivity type; and a second region formed on the first region and highly doped with a dopant of the first conductivity type on an upper surface of the short-wavelength absorbing layer, wherein the dopant of the first conductivity type has a concentration gradient that increases in a direction from the substrate toward the second region.

[0011] A single-photon avalanche diode pixel array having a heterojunction structure according to one embodiment of the present invention can improve high dark current by forming a doping concentration gradient in a region adjacent to a short-wavelength absorption layer.

[0012] A single-photon avalanche diode pixel array having a heterojunction structure according to one embodiment of the present invention can sense both visible light and short-wave infrared light by forming a first metal pad and a second metal pad on a surface opposite to a surface on which external light is incident.

[0013] A single-photon avalanche diode pixel array having a heterojunction structure according to one embodiment of the present invention can have high quantum efficiency (QE) by arranging an avalanche amplification region, a well region, and a high-concentration doping region side by side in the thickness direction.

[0014] In addition to the effects mentioned above, other features and advantages of the present invention are described below or may be clearly understood by those skilled in the art to which the present invention pertains from such description and explanation.

[0015] FIG. 1 is a plan view of a single-photon avalanche diode pixel array having a heterojunction structure according to one embodiment of the present invention.

[0016] Figure 2 is a cross-sectional view taken along line I-I' of Figure 1.

[0017] FIG. 3 is a plan view of a single-photon avalanche diode pixel array having a heterojunction structure according to another embodiment of the present invention.

[0018] Figure 4 is a cross-sectional view taken along line II-II' of Figure 3.

[0019] FIG. 5 is a block diagram of an image sensor having a single-photon avalanche diode pixel array having the heterojunction structure illustrated in FIGS. 1 and 2.

[0020] FIGS. 6A to 6I are process diagrams showing a manufacturing process of a single-photon avalanche diode pixel array having a heterojunction structure according to one embodiment of the present invention.

[0021] The advantages and features of the present invention, and the methods for achieving them, will become clearer with reference to the embodiments described in detail below, along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be implemented in various different forms. These embodiments are provided solely to ensure that the disclosure of the present invention is complete and to inform those skilled in the art of the scope of the invention.

[0022] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining embodiments of the present invention are merely illustrative, and the present invention is not limited to the details depicted in the drawings. Throughout the specification, identical components may be designated by identical reference numerals. Furthermore, in describing the present invention, if a detailed description of a related known technology is deemed to unnecessarily obscure the gist of the present invention, the detailed description will be omitted.

[0023] In this specification, when the words "include," "have," and "consist of" are used, other parts may be added, unless the expression "only" is used. When a component is expressed in the singular, the plural is included unless otherwise explicitly stated.

[0024] When interpreting a component, it is interpreted as including the error range even if there is no separate explicit description.

[0025] For example, when the positional relationship between two parts is described as ‘on top of’, ‘upper part of’, ‘lower part of’, ‘next to’, etc., one or more other parts may be located between the two parts unless the expression ‘right away’ or ‘directly’ is used.

[0026] Spatially relative terms such as "below," "beneath," "lower," "above," and "upper" can be used to easily describe the relationship of one element or component to another element or component as depicted in the drawings. Spatially relative terms should be understood to include different orientations of the elements during use or operation in addition to the orientations depicted in the drawings. For example, if an element depicted in the drawings were flipped over, an element described as "below" or "beneath" another element could end up being placed "above" the other element. Thus, the exemplary term "below" can include both the above and below directions. Similarly, the exemplary term "above" or "above" can include both the above and below directions.

[0027] When describing a temporal relationship, for example, when the temporal order is described as 'after', 'following', 'next to', 'before', etc., it can also include cases where it is not continuous, as long as the expression 'immediately' or 'directly' is not used.

[0028] While terms like "first" and "second" are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, a "first" component referred to below may also be a "second" component within the technical scope of the present invention.

[0029] The term "at least one" should be understood to include all possible combinations of one or more associated items. For example, "at least one of the first, second, and third items" can mean any combination of items that can be represented by two or more of the first, second, and third items, as well as each of the first, second, and third items.

[0030] The features of each of the various embodiments of the present invention can be partially or wholly combined or combined with each other, and various technical connections and operations are possible, and each embodiment can be implemented independently of each other or implemented together in a related relationship.

[0031] In adding reference numerals to components of each drawing describing embodiments of the present invention, the same components may have the same numerals as much as possible even if they are shown in different drawings.

[0032] FIG. 1 is a plan view of a single-photon avalanche diode pixel array (100) having a heterojunction structure according to one embodiment of the present invention. FIG. 2 is a cross-sectional view taken along line I-I' of FIG. 1.

[0033] According to one embodiment of the present invention, a single-photon avalanche diode pixel array (100) having a heterojunction structure may include a substrate (130), a pixel separation structure (120), a short-wavelength absorbing layer (160), and a separation structure (121). The substrate (130), the pixel separation structure (120), the short-wavelength absorbing layer (160), and the separation structure (121) are described in detail below.

[0034] According to one embodiment of the present invention, the lower surface (130a) of the substrate (130) may be a surface onto which light is incident from the outside, and the upper surface (130b) may be an opposite surface to the surface onto which light is incident from the outside.

[0035] According to one embodiment of the present invention, the substrate (130) may include a well region (150) and a high concentration doping region (152).

[0036] According to one embodiment of the present invention, the substrate (130) may be formed by epitaxial growth as a region in which a dopant of a first conductivity type or a dopant of a second conductivity type is doped at a low concentration. When the substrate (130) is doped with a dopant of the first conductivity type, the PN junction region side with the well region (150) formed by doping with a dopant of a second conductivity type opposite to the first conductivity type within the substrate (130) becomes an avalanche amplification region (140). The substrate (130) may include silicon (Si).

[0037] According to one embodiment of the present invention, the dopant of the first conductive type may be a P-type dopant, and the dopant of the second conductive type may be an N-type dopant. However, as another example, the dopant of the first conductive type may be an N-type dopant, and the dopant of the second conductive type may be a P-type dopant.

[0038] When the dopant of the first conductive type is a P-type dopant and the dopant of the second conductive type is an N-type dopant, the P-type dopant may include at least one of boron, aluminum, gallium, and indium, and the N-type dopant may include at least one of phosphorus, arsenic, and antimony.

[0039] A pixel separation structure (120) is formed on the substrate (130) to electrically isolate each pixel (P1, P2). That is, a pixel area in which each pixel (P1, P2) is formed is defined by the pixel separation structure (120), and the pixels (P1, P2) formed in each pixel area are electrically isolated from each other by the pixel separation structure (120). In one embodiment, the pixel separation structure (120) extends from the upper surface (130b) of the substrate (130) to the lower surface (130a) of the substrate (130).

[0040] According to one embodiment of the present invention, the lower surface (130a) of the substrate (130) may be a surface on which light is incident from the outside, and the upper surface (130b) of the substrate (130) may be an opposite surface of the lower surface (130a).

[0041] According to one embodiment of the present invention, the pixel separation structure (120) may be formed as a deep trench isolation structure (DTI) formed by filling an insulating film in a deep trench formed by penetrating the substrate (130) from the upper surface (130b) of the substrate (130) toward the lower surface (130a).

[0042] In this way, according to the present invention, since the pixel separation structure (120) for isolating each pixel (P1, P2) is continuously formed from the upper surface (130b) to the lower surface (130a) of the substrate (130), leakage current generation between adjacent pixels (P1, P2) can be prevented.

[0043] According to one embodiment of the present invention, a short-wavelength absorbing layer (160) doped with a first conductive type dopant may be formed on a substrate (130). The short-wavelength absorbing layer (160) may be formed by being inserted into a trench formed by etching the substrate (130). Specifically, the short-wavelength absorbing layer (160) may be formed by epitaxial growth.

[0044] According to one embodiment of the present invention, the short-wavelength absorbing layer (160) may include a first region (161) and a second region (162) doped with a first conductive type dopant. The second region (162) may be disposed on the first region (161) and formed by being highly doped with the first conductive type dopant on the upper surface (160a) of the short-wavelength absorbing layer (160).

[0045] According to one embodiment of the present invention, a well region (150) may be formed, which is buried in the substrate (130) and doped with a dopant of a second conductivity type opposite to the first conductivity type. An avalanche amplifying region (140) is formed by forming a PN junction between a region formed by doping the first conductivity type dopant and a well region (150) formed by doping the second conductivity type dopant within the substrate (130). The well region (150) may be formed by doping with a dopant of the second conductivity type on an upper surface (130b) of the substrate (130). According to one embodiment of the present invention, the avalanche amplifying region (140) may be formed in a region spaced apart from a trench (T) (see FIGS. 2 and 6b). Specifically, the avalanche amplifying region (140) may be formed in a region spaced apart from a short-wavelength absorbing layer (160). Forming in the above-mentioned spaced areas may mean that they do not overlap each other.

[0046] The avalanche amplification region (140) is a region where amplification of electrons and holes occurs. In the avalanche amplification region (140), a very strong electric field is formed in a reverse bias state, so that electrons can move quickly. Therefore, an electron-hole pair generated by a single photon generates additional electrons, and the generated electrons are accelerated by this electric field and collide with other atoms, and the process of generating additional electron-hole pairs occurs in a chain reaction, generating a very high current.

[0047] Due to this avalanche amplification region (140), the single-photon avalanche diode is capable of single photon detection, and thus can detect extremely low light signals, and can be particularly usefully applied to sensing in low-light environments.

[0048] According to one embodiment of the present invention, the well region (150) and the short-wavelength absorption layer (160) may be arranged in a row and in parallel. Specifically, the well region (150) and the short-wavelength absorption layer (160) may be arranged in a horizontal relationship rather than a vertical relationship. More specifically, the well region (150) and the short-wavelength absorption layer (160) may not overlap.

[0049] According to one embodiment of the present invention, a high-concentration doping region (152) formed by high-concentration doping with a second conductive type dopant may be formed on the upper surface (150a) of the well region (150). The high-concentration doping region (152) may be formed to a constant thickness that is not greater than the thickness of the well region (150).

[0050] According to one embodiment of the present invention, a second region (162) may be formed by being highly doped with a first conductive type dopant on the upper surface (160a) of the short-wavelength absorbing layer (160). The second region (162) may be formed to a constant thickness that is not greater than the thickness of the short-wavelength absorbing layer (160).

[0051] Referring to FIGS. 1 and 2, the high-concentration doping region (152) may have a closed-loop shape surrounding the second region (162) in a plan view, and the high-concentration doping region (152) may have a closed-loop shape surrounding the short-wavelength absorbing layer (160). However, the present invention is not limited thereto, and the second region (262) may have a closed-loop shape surrounding the high-concentration doping region (252) in a plan view, and the second region (262) may have a closed-loop shape surrounding the well region (250) (see FIGS. 3 and 4).

[0052] According to one embodiment of the present invention, an insulating film (170) may be formed on a substrate (130). The insulating film (270) may include an oxide such as SiO2.

[0053] According to one embodiment of the present invention, first and second contact portions (170a, 170b) penetrating an insulating film (170) on a substrate (130) can be formed.

[0054] According to one embodiment of the present invention, a first metal pad (181) and a second metal pad (182) may be formed on an insulating film (170). For example, the first metal pad (181) and the second metal pad (182) may be connected to the well region (150) and the short-wavelength absorption layer (160) using the first and second contact portions (170a, 170b), respectively. Referring to FIG. 2, the first metal pad (181) is connected to the well region (150) using the first contact portion (170a), and the second metal pad (182) is connected to the short-wavelength absorption layer (160) using the second contact portion (170b).

[0055] According to one embodiment of the present invention, the high-concentration doping region (152) may be a cathode region of a single-photon avalanche diode, and the second region (162) may be an anode region of the single-photon avalanche diode.

[0056] According to one embodiment of the present invention, one end of the second metal pad (181) may be electrically connected to a driving circuit (not shown) for driving the image sensor. The driving circuit may be a quench circuit or a photodetector output circuit (ROIC: ReadOut Integrated Circuit). The quench circuit is used to cut off the avalanche effect and reset the single-photon avalanche diode pixel. The photodetector output circuit receives and transmits a signal current.

[0057] According to one embodiment of the present invention, a micro lens (110) may be formed on the lower surface (130a) of the substrate (130). The micro lens (110) collects light incident from the outside. The micro lens (110) may be arranged to correspond to each pixel (P). That is, one micro lens (110) may be arranged on one pixel (P). The lower surface of the micro lens (110) may have a curved surface.

[0058] Although not shown in the drawing, a color filter may be placed between the micro lens (110) and the substrate (130).

[0059] According to one embodiment of the present invention, the substrate (130) may be disposed between the micro lens (110) and the first metal pad (181), and may be disposed between the micro lens (110) and the second metal pad (182). Specifically, the micro lens (110) may be disposed on the lower surface (130a) of the substrate (130) so as to overlap the first metal pad (181) and the second metal pad (182).

[0060] According to the present invention, the lower surface (130a) of the substrate (130) may be a surface onto which light is incident from the outside, and visible light incident on the lower surface (130a) may be absorbed in the avalanche amplification region (140). At this time, short wavelength infrared (SWIR) may not be absorbed in the avalanche amplification region (140) or the substrate (130). The short wavelength infrared that is not absorbed may be reflected from the first metal pad (181) or the second metal pad (182) disposed on the upper portion of the substrate (130) and absorbed in the short wavelength absorption layer (160). According to one embodiment of the present invention, the short wavelength absorption layer (160) may include germanium (Ge).

[0061] In other words, the single-photon avalanche diode pixel array (100) having a heterojunction structure according to the present invention includes a first metal pad (181) and a second metal pad (182) arranged on the opposite side to the side on which light is incident from the outside, thereby sensing both visible light and short-wave infrared rays and absorbing a wide spectrum from 400 to 1,600 nm.

[0062] Because germanium has a smaller bandgap than silicon, the short wavelength absorber layer (160) provides enhanced absorption of short wavelength infrared (SWIR) compared to silicon. However, the high voltage applied to the short wavelength absorber layer (160) can result in high dark current and noise, which can result in low yield and poor image quality at room temperature.

[0063] According to the present invention, in order to solve the above problem, a doping gradient can be formed in a region adjacent to the short-wavelength absorbing layer (160). For example, the doping concentration in the second region (162) of the short-wavelength absorbing layer (160) may be greater than the doping concentration in the first region (161) of the short-wavelength absorbing layer (160), and the doping concentration in the first region (161) of the short-wavelength absorbing layer (160) may be greater than the doping concentration in the substrate (130). In other words, the doping concentration may decrease from the second region (162) to the substrate (130) in the thickness direction of the substrate (130). More specifically, the dopant of the first conductive type may have a concentration gradient that increases from the substrate (130) to the second region (162).

[0064] For example, an electron-hole pair formed in a short-wavelength absorption layer (160) by a single photon is transferred to an avalanche amplification region (140) by a doping gradient, and a high voltage can be concentrated in the avalanche amplification region (140). As a result, the high voltage concentrated in the short-wavelength absorption layer (160) can be reduced, thereby improving a high dark current.

[0065] According to one embodiment of the present invention, a separation structure (121) may be formed between the well region (150) and the short-wavelength absorption layer (160).

[0066] The separation structure (121) can electrically isolate the well region (150) and the short-wavelength absorption layer (160). The separation structure (121) is a structure formed by filling an insulating film in a trench formed by etching the substrate (130) in a direction from the upper surface (130b) of the substrate (130) toward the lower surface (130a).

[0067] Referring to FIG. 2, the depth of the separation structure (121) may be deeper than the depth of the pixel separation structure (120). The separation structure (121) may prevent lateral leakage between the avalanche amplification region (140) and the short-wavelength absorption layer (160).

[0068] Although FIG. 2 shows that the depth of the separation structure (121) is the same as the depth of the short-wavelength absorption layer (160), the present invention is not limited thereto, and the depth of the separation structure (121) may be deeper than the depth of the short-wavelength absorption layer (160).

[0069] In addition, according to the present invention, since the avalanche amplification region (140), the well region (150), and the high-concentration doping region (152) are arranged side by side in the thickness direction of the substrate (130), a strong magnetic field is applied in the thickness direction (or vertical direction) of the substrate (130) in the corresponding region, so that additional electron-hole pairs can be strongly captured.

[0070] According to one embodiment of the present invention, by widely arranging the avalanche amplification region (140) on the lower surface of the well region (150), more electron-hole pairs are generated and photons can be detected at a higher rate, so that the quantum efficiency (QE) of the single-photon avalanche diode pixel array (100) having a heterojunction structure can be improved.

[0071] Referring to FIGS. 1 and 2, the separation structure (121) in a planar view may have a closed loop shape surrounding the second region (162), and the separation structure (121) may have a closed loop shape surrounding the short-wavelength absorbing layer (160). However, the present invention is not limited thereto, and the separation structure (221) in a planar view may have a closed loop shape surrounding the high-concentration doping region (252), and may have a closed loop shape surrounding the well region (250) (see FIGS. 3 and 4).

[0072] Fig. 3 is a plan view of a single-photon avalanche diode pixel array (200) having a heterojunction structure according to another embodiment of the present invention. Fig. 4 is a cross-sectional view taken along line II-II' of Fig. 3.

[0073] The single-photon avalanche diode pixel array (200) having the heterojunction structure illustrated in FIGS. 3 and 4 has the positions of the well region (250) and the short-wavelength absorption layer (260) swapped compared to the single-photon avalanche diode pixel array (100) having the heterojunction structure illustrated in FIGS. 1 and 2. Specifically, the positions of the high-concentration doping region (252) and the second region (262) are swapped.

[0074] Referring to FIGS. 3 and 4, the second region (262) may have a closed loop shape surrounding the high-concentration doping region (252) in a planar manner, and the second region (262) may have a closed loop shape surrounding the well region (250).

[0075] Referring to FIGS. 3 and 4, the configurations shown in FIGS. 3 and 4 correspond to the configurations shown in FIGS. 1 and 2, except for the positions of the well region (250) and the short-wavelength absorbing layer (260) and the positions of the high-concentration doping region (252) and the second region (262).

[0076] FIG. 5 is a block diagram of an image sensor having a single-photon avalanche diode pixel array (100) having a heterojunction structure as illustrated in FIGS. 1 and 2. As illustrated in FIG. 5, an image sensor (600) including a single-photon avalanche diode pixel array (100) having a heterojunction structure according to an embodiment of the present invention emits an optical signal to an object, converts an optical signal reflected from the object into an electrical signal, and outputs the converted signal to a processor (610) of an electronic device (not illustrated) to which the image sensor (600) is applied.

[0077] At this time, the electronic device may include, in addition to the aforementioned automotive lidar sensor, tablet PC, or portable terminal, a camera, a wearable device, an Internet of Things (IoT) device, a home appliance, a robot, a robot vacuum cleaner, a portable multimedia player (PMP), navigation, a drone, an advanced driver assistance system (ADAS), etc. In addition, the electronic device may be an electronic device provided as a component in a vehicle, furniture, manufacturing equipment, door, or various measuring devices.

[0078] As illustrated in FIG. 5, the image sensor (600) includes a single-photon avalanche diode pixel array (100) having a heterojunction structure, a row driver (630), a timing generator (640), an analog processing circuit (650), an analog-to-digital converter (660), and an output buffer (670).

[0079] A single-photon avalanche diode pixel array (100) having a heterojunction structure includes a plurality of pixels (P). The plurality of pixels (P) may be arranged two-dimensionally. For example, the plurality of pixels (P) may be arranged in a matrix form composed of M (M is an integer greater than or equal to 2) rows and N (N is an integer greater than or equal to 2) columns. Each pixel (P) included in the single-photon avalanche diode pixel array (100) having a heterojunction structure detects an optical signal using a single-photon avalanche diode and converts it into a pixel signal, which is an electrical signal.

[0080] A detailed description of a single-photon avalanche diode pixel array (100) having a heterojunction structure is omitted because it has been described in the description of FIGS. 1 and 2.

[0081] Each pixel (P) can be driven by control signals received from a row driver (630). A signal converted by each pixel (P) and a reset signal corresponding to the reset component are provided to an analog processing circuit (650).

[0082] The row driver (630) drives each pixel (P) included in the single-photon avalanche diode pixel array (100) having a heterojunction structure based on the control of the timing generator (640). In one embodiment, the row driver (630) may simultaneously control all pixels (P) of the single-photon avalanche diode pixel array (100) having a heterojunction structure or control unit pixels (P) of the single-photon avalanche diode pixel array (100) having a heterojunction structure in units of rows. To this end, the row driver (630) may transmit control signals to the pixels (P).

[0083] In one embodiment, the row driver (630) can transmit a control signal to each pixel (P) based on the control of the timing generator (640).

[0084] A timing generator (640) controls a single-photon avalanche diode pixel array (100) having a heterojunction structure through a row driver (630), and can output a control signal that controls an analog processing circuit (650), an analog-to-digital converter (660), and an output buffer (670).

[0085] The analog processing circuit (650) can sample and hold an output signal provided from a pixel (P) according to a correlated double sampling (CDS) method, and can double sample a specific noise level, for example, a reset level and a signal level.

[0086] The analog processing circuit (650) can generate a comparison result signal corresponding to a reset level and a comparison result signal corresponding to a signal level. Here, a method of reading out a signal level after reading out a reset level may be referred to as a complete CDS method, and a method of reading out a reset level after reading out a signal level may be referred to as an incomplete CDS method or a DRS (Delta Reset Sampling) method.

[0087] The analog-to-digital converter (660) can convert an output signal output from the analog processing circuit (650) into a digital signal and provide it to the output buffer (670). In FIG. 5, the analog processing circuit (650) and the analog-to-digital converter (660) are illustrated as independent components, but in other embodiments, the analog-to-digital converter (660) may be included in or integrated with the analog processing circuit (650).

[0088] The output buffer (670) can latch a digital signal transmitted from the analog-to-digital converter (660) and sequentially output the latched signal.

[0089] The processor (610) of the electronic device can process a digital signal output from the output buffer (670) and output it to an external device or store it in a storage device such as a memory.

[0090] FIGS. 6A to 6I are process diagrams showing a manufacturing process of a single-photon avalanche diode pixel array (100) having a heterojunction structure according to one embodiment of the present invention.

[0091] The cross-sectional views of the single-photon avalanche diode pixel array (100) having the heterojunction structure illustrated in FIGS. 6a to 6i correspond to the cross-sectional views of the single-photon avalanche diode pixel array (100) having the heterojunction structure illustrated in FIG. 2.

[0092] Descriptions of configurations that overlap with those illustrated in FIGS. 1 and 2 are omitted.

[0093] Referring to FIG. 6a, a pixel isolation structure (120) for isolating each pixel (P) can be formed on a substrate (130) doped with a first conductive type dopant. The substrate (130) can be formed by epitaxial growth.

[0094] Referring to FIG. 6b, a portion of the upper surface of the substrate (130) may be etched to form a trench (T). The depth of the trench (T) may be smaller than the depth of the pixel separation structure (120).

[0095] Referring to FIG. 6c, a short-wavelength absorption layer (160) having a first conductive type can be formed by epitaxial growth within a trench (T).

[0096] Referring to FIG. 6d, a separation structure (121) can be formed by partially etching the upper surface of the substrate (130) and filling the etched area with an insulating material. The separation structure (121) can be arranged to surround the short-wavelength absorbing layer (160).

[0097] Figures 6c and 6d illustrate the formation of a separation structure (121) after forming a short-wavelength absorbing layer (160). However, the present invention is not limited thereto, and an insulating material may be filled into a trench (T), a portion of the insulating material filled into the trench (T) may be etched, and then a short-wavelength absorbing layer (160) may be formed in the etched area.

[0098] Referring to FIG. 6e, a well region (150) can be formed by doping the upper surface of the substrate (130) with a dopant of a second conductive type opposite to the first conductive type. The well region (150) can be formed using an ion implant technique.

[0099] Referring to FIG. 6e, the separation structure (121) can be placed between the well region (150) and the short-wavelength absorption layer (160).

[0100] Referring to FIGS. 6f and 6g, a second region (162) may be formed by doping a first conductive type dopant at a high concentration on the upper surface of the short-wavelength absorbing layer (160), and a high-concentration doping region (152) may be formed by doping a second conductive type dopant at a high concentration on the upper surface of the well region (150). Although FIGS. 6f and 6g illustrate the formation of the high-concentration doping region (152) after the formation of the second region (162), the present invention is not limited thereto, and the second region (162) may be formed after the formation of the high-concentration doping region (152).

[0101] According to the present invention, when the substrate (130) is doped with a dopant of the first conductive type, the PN junction region side with the well region (150) formed by doping with a dopant of the second conductive type opposite to the first conductive type within the substrate (130) becomes an avalanche amplification region (140).

[0102] Referring to FIG. 6h, an insulating film (170) may be formed on a substrate (130), a plurality of contact portions (170a, 170b) penetrating the insulating film (170) may be formed, and a first metal pad (181) and a second metal pad (182) disposed on the insulating film (170) may be formed. The first metal pad (181) may be connected to a cathode, and the second metal pad (182) may be connected to an anode.

[0103] Referring to FIG. 6i, a micro lens (110) can be formed for each pixel (P1, P2) on the lower surface of the substrate (130). Specifically, a short-wavelength absorption layer (160) can be formed for each pixel (P1, P2).

[0104] The present invention described above is not limited to the aforementioned embodiments and the attached drawings, and it will be apparent to those skilled in the art that various substitutions, modifications, and changes are possible without departing from the technical scope of the present invention. Therefore, the scope of the present invention is indicated by the claims below, and all changes or modifications derived from the meaning, scope, and equivalent concepts of the claims should be interpreted as being included within the scope of the present invention.

Claims

1. A substrate doped with a first conductive type dopant, in which a trench and avalanche amplification region are formed; and A short-wavelength absorbing layer disposed inside the trench and doped with a dopant of the first conductive type; The above short-wavelength absorption layer is, a first region doped with a dopant of the first challenging type; and A second region is formed by being disposed on the first region and being highly doped with a dopant of the first conductive type on the upper surface of the short-wavelength absorption layer, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the dopant of the first conductive type has a concentration gradient that increases from the substrate toward the second region.

2. In paragraph 1, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the substrate comprises silicon (Si) and the short-wavelength absorbing layer comprises germanium (Ge).

3. In paragraph 1, The above substrate is, A well region formed by doping with a dopant of a second conductive type opposite to the first conductive type on the upper surface of the substrate; and A single-photon avalanche diode pixel array having a heterojunction structure, comprising a high-concentration doping region formed by high-concentration doping with a dopant of the second conductive type on the upper surface of the well region.

4. In paragraph 3, Including a separation structure disposed between the short-wavelength absorption layer and the well region, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the above separation structure extends in a direction from the upper surface of the substrate toward the lower surface of the substrate.

5. In paragraph 1, The substrate includes a well region formed by doping a dopant of a second conductive type opposite to the first conductive type on an upper surface of the substrate, An insulating film disposed on the above substrate; A first metal pad connected to the well region using a first contact portion penetrating the insulating film; A single-photon avalanche diode pixel array having a heterojunction structure, comprising a second metal pad connected to the short-wavelength absorbing layer using a second contact portion penetrating the insulating film.

6. In paragraph 3, Including a separation structure disposed between the short-wavelength absorption layer and the well region, A plurality of pixels are formed on the above substrate, The above short-wavelength absorption layer is formed for each pixel, Further comprising a pixel separation structure that electrically isolates each of the plurality of pixels, The above pixel separation structure extends from the upper surface of the substrate to the lower surface of the substrate, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the depth of the pixel separation structure is deeper than the depth of the separation structure.

7. In paragraph 3, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the high-concentration doping region is a cathode region of the single-photon avalanche diode and the second region is an anode region of the single-photon avalanche diode.

8. In paragraph 3, Including a separation structure disposed between the short-wavelength absorption layer and the well region, In terms of the plane, the high-concentration doping region has a closed loop shape surrounding the separation structure and the second region, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the separation structure is a closed-loop shape surrounding the second region on a planar surface.

9. In paragraph 3, Including a separation structure disposed between the short-wavelength absorption layer and the well region, In terms of the plane, the second region has a closed loop shape surrounding the separation structure and the high-concentration doping region, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the separation structure is a closed-loop shape surrounding the high-concentration doping region on a planar surface.

10. In paragraph 1, a micro lens disposed on the lower surface of the substrate; and Further comprising a first metal pad and a second metal pad arranged on the upper surface of the substrate, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the micro lens is arranged on the lower surface of the substrate so as to overlap the first metal pad and the second metal pad.

11. In paragraph 3, An avalanche amplification region is formed in an area spaced apart from the trench, A single-photon avalanche diode pixel array having a heterojunction structure, wherein the avalanche amplification region, the well region, and the high-concentration doping region are arranged side by side in the thickness direction of the substrate.

12. A step of forming a trench in a substrate having a first conductive type; A step of growing a short-wavelength absorbing layer having the first conductive type within the trench; The above short-wavelength absorption layer is, a first region doped with a dopant of the first conductive type; and A second region is formed by being disposed on the first region and being highly doped with a dopant of the first conductive type on the upper surface of the short-wavelength absorption layer, A method for manufacturing a single-photon avalanche diode pixel array having a heterojunction structure, wherein the dopant of the first conductive type has a concentration gradient that increases in a direction from the substrate toward the second region.

13. In paragraph 12, A method for manufacturing a single-photon avalanche diode pixel array having a heterojunction structure, wherein the substrate comprises silicon (Si) and the short-wavelength absorbing layer comprises germanium (Ge).

14. In paragraph 12, The above substrate is, A well region formed by doping with a dopant of a second conductive type opposite to the first conductive type on the upper surface of the substrate; and A method for manufacturing a single-photon avalanche diode pixel array having a heterojunction structure, the heterojunction structure including a high-concentration doping region formed by high-concentration doping with a dopant of the second conductive type on the upper surface of the well region.

15. In paragraph 14, Including a separation structure disposed between the short-wavelength absorption layer and the well region, A method for manufacturing a single-photon avalanche diode pixel array having a heterojunction structure, wherein the above separation structure extends in a direction from the upper surface of the substrate toward the lower surface of the substrate.

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