Control device, optical system, and lithography installation

Abstract

The invention relates to a control device (100) for controlling a number N, where N = 1, of actuators (200) for actuating N optical elements of an optical system, comprising a control node (K2), which can be coupled to the actuator (200), for providing a control voltage (V2) for the actuator (200), and an amplifier (110), which is designed to receive a supply voltage (V1) provided at an input node (K1) and to provide an output voltage (V3) at an output node (K3). The amplifier (110) has a plurality M, where M ≥ 2, of power sources (111, 112), comprising at least one charge-controlled power source (112) and a hold capacitor (113) for maintaining the level of the provided output voltage (V3). The control device also comprises a buffer (120) which is coupled between the output node (K3) and the control node (K2) and is designed to decouple the control node (K2) from the output node (K3) and provide the control voltage (V2) for the actuator (200) on the basis of the level of the output voltage (V3) of the hold capacitor (113).

Description

[0001] CONTROL DEVICE, OPTICAL SYSTEM AND LITHOGRAPHY -

[0002] ATTACHMENT

[0003] The present invention relates to a control device for controlling at least one actuator of an optical system, an optical system with such a control device and a lithography system with such an optical system.

[0004] The content of priority application DE 10 2024 206 494.7 is fully incorporated by reference.

[0005] Microlithography systems are known that incorporate actuated optical elements, such as microlens arrays or micromirror arrays. Microlithography is used to fabricate microstructured components, such as integrated circuits. The microlithography process is performed using a lithography system that includes an illumination system and a projection system.

[0006] Driven by the pursuit of ever smaller structures in the fabrication of integrated circuits, EUV lithography systems are currently being developed that use light with a wavelength in the range of 0.1 nm to 30 nm, particularly 13.5 nm. Since most materials absorb light of this wavelength, such EUV lithography systems must use reflective optics, i.e., mirrors, instead of the refracting optics, i.e., lenses, used previously.

[0007] The image of a mask (reticule) illuminated by the illumination system is projected by the projection system onto a substrate, such as a silicon wafer, coated with a photosensitive layer (photoresist) and positioned in the image plane of the projection system. This transfers the mask structure onto the photosensitive coating of the substrate. Actuable optical elements can improve the imaging of the mask onto the substrate. For example, wavefront errors during exposure, which lead to magnified and / or blurred images, can be compensated for.

[0008] For example, a MEMS actuator (MEMS; Microelectromechanical System) or a PMN actuator (PMN; Lead-Magnesium Niobate) can be used. A PMN actuator enables positioning in the sub-micrometer or sub-nanometer range. The actuator, whose actuator elements are stacked on top of each other, experiences a force when a DC voltage is applied, causing a specific linear expansion. The position set by the DC voltage can be negatively affected by external electromechanical crosstalk at the inherent resonance points of the actuator driven by the DC voltage. MEMS mirrors and actuators suitable for driving them are described, for example, in DE 10 2016 213 025 A1.

[0009] For controlling the actuator, a control device is used, which includes an amplifier, for example a class-A amplifier. Such a control device for controlling an actuator to actuate an optical element of an optical system is described, for example, in patent application DE 10 2023 206 070.

[0010] Furthermore, the applicant is internally aware of a control device for controlling at least one actuator for actuating an optical element of an optical system, which comprises an amplifier configured to receive a supplied voltage at an input node and to provide a control voltage for the actuator at an output node, wherein the amplifier has a resistive voltage divider for adjusting the gain of the amplifier with a first resistor and a second resistor. The amplifier is, for example, a class-A amplifier with an operational amplifier controllable by a control voltage and a transistor. The center tap of the resistive voltage divider is connected to the non-inverting input of the operational amplifier via a feedback branch.The inverting input of the operational amplifier is connected to an input node of the control device to receive a control voltage.

[0011] A precise feedback loop is necessary to provide high output accuracy and linearity. As explained above, such a feedback loop is implemented using a voltage divider. Resistive voltage dividers are typically implemented with passive resistors, as these provide simple and linear scaling of the voltage levels. Furthermore, integrated passive resistors are available in various materials, resistance values, and high-voltage capabilities. Depending on the application, active resistors based on transistors can also be a suitable choice.

[0012] Problems can arise, however, if, for example, the quiescent current through the resistors of the resistive voltage divider needs to be kept in the microampere range or below to minimize power consumption. For this purpose, the resistance values ​​of the resistors in the resistive voltage divider are determined as a function of the high-voltage level of the supply voltage, particularly within a range of 10 6 To choose ohms.

[0013] A high-voltage voltage divider, however, continuously consumes current from a high-voltage supply. This drastically increases the power consumption of the overall system. To circumvent this problem of increased power consumption, the resistance values ​​of the resistors in the resistive voltage divider are adjusted depending on the high-voltage level of the supply voltage, particularly within a range of 10 6 Ohm selected.

[0014] However, these high-impedance resistors cause the resistive voltage divider to generate thermal noise, also known as thermal noise. This problem becomes particularly clear when considering the equation below for the thermal noise power and voltage density for a single passive resistor: where k is the Boltzmann constant (k = 1.38e-23 J / K), T = 300 K for room temperature and R is an equivalent resistance value.

[0015] Some exemplary values ​​for the increase in thermal noise for high-impedance resistors are shown in Table 1 below:

[0016] Table 1

[0017] Furthermore, the thermal noise of resistors can be amplified if these resistors are used in the amplifier's feedback path. For a non-inverting amplifier with a control-voltage high-voltage operational amplifier, which has a resistive divider with a series connection of two resistors between the amplifier's output node and ground, the output noise at the amplifier's output node due to the resistors can be approximately calculated as follows: where Sn2 = 4KTR2 denotes the noise power of resistor R2 and Aci the control loop gain of the non-inverting amplifier. Assuming that the non-inverting amplifier is an ideal amplifier with infinite gain and zero output impedance, the values ​​for the resistance of resistor R2 and the voltage noise Vnout can be estimated as follows:

[0018] Table 2

[0019] Table 2 shows thermal noise of high-impedance resistors amplified by a gain Aci of 100 in the closed-loop control of the amplifier, where Aci of 100 is obtained from the equation 1+R2 / R1.

[0020] Furthermore, high-voltage resistors and high-precision resistors require a very large chip area. However, the consumption of large chip areas is disadvantageous in terms of cost and yield.

[0021] Against this background, one object of the present invention is to improve the control of a number of actuators of an optical system. According to a first aspect, a control device for a number N, with N > 1, of actuators for actuating N optical elements of an optical system is proposed. The control device comprisesa control node that can be coupled to the actuator for providing a control voltage for the actuator, an amplifier configured to receive a supply voltage provided at an input node and to provide an output voltage at an output node, wherein the amplifier has a plurality M, with M > 2, of current sources comprising at least one charge-controlled current source and a holding capacitor for maintaining the level of the provided output voltage, and a buffer coupled between the output node and the control node, which is configured to decouple the control node from the output node and to provide the control voltage for the actuator based on the level of the output voltage of the holding capacitor.

[0022] Advantageously, the present drive device dispenses with a noisy amplifier, such as a class-A amplifier, as well as with a necessary feedback loop comprising a resistive voltage divider. This saves chip area and reduces the power consumption of the drive device. Instead, the present drive device uses an amplifier with a holding capacitor, which is preferably configured as a high-voltage capacitor, wherein the holding capacitor is charged by the M current sources. The current sources are suitable for providing predictive charge packets to set a specific charge on the holding capacitor, representing the desired level of the output voltage. The holding capacitor, preferably configured as a high-voltage capacitor, ideally produces no noise and maintains the level of the output voltage provided by the amplifier.The holding capacitor is decoupled from the drive node for controlling the actuator via the buffer. The buffer can also be called a buffer amplifier or buffer (buffer circuit or isolation circuit) and its primary function here is to decouple circuit components, in this case, the drive node from the output node. The actuator is connected to the decoupled drive node, and the drive voltage is given in particular by V2 = V3 - VGS, where V2 is the drive voltage at the drive node, V3 is the output voltage at the output node of the amplifier, and VGS is a gate-source voltage of the buffer. At least one of the M current sources is designed as a charge-controlled current source, so that the M current sources can drive the output voltage of the amplifier up and down by charging and discharging the holding capacitor without loss, and in a predictable manner.The amount of capacitor charge can be predicted by a control unit of the drive device, which can control both the amplitude of the current sources and their activation time. In this way, these two parameters, amplitude and time, provide two degrees of freedom that simultaneously reduce the resolution requirements of a digital-to-analog converter (DAC) necessary for driving the amplifier, while ensuring the high resolution required by the system.

[0023] The supply voltage is in particular a high voltage (or high voltage) and is, for example, in a range of 40 V to 200 V.

[0024] The actuator is, in particular, a MEMS actuator, a capacitive actuator, for example, a PMN actuator (PMN; lead magnesium niobate), a PZT actuator (PZT; lead zirconate titanate), or a LiNbO3 actuator (lithium niobate). The actuator is specifically configured to actuate an optical element of the optical system. Examples of such an optical element include lenses, mirrors, and adaptive mirrors. The optical system is preferably a projection optic of the lithography system or a projection exposure system. However, the optical system can also be an illumination system. The projection exposure system can be an EUV lithography system. EUV stands for "Extreme Ultraviolet" and refers to a wavelength of the working light between 0.1 nm and 30 nm. The projection exposure system can also be a DUV lithography system. DUV stands for "Deep Ultraviolet" and refers to a wavelength of the working light between 30 nm and 250 nm.

[0025] According to one embodiment, the holding capacitor is coupled between the amplifier's output node and ground. The amplifier's current sources are configured to maintain a charge on the holding capacitor that depends on a desired level of the drive voltage.

[0026] The specific charge on the holding capacitor represents the desired level of the output voltage to be provided by the amplifier. By using the M current sources, this specific charge on the holding capacitor can be set very precisely without the use of a feedback circuit. The M current sources, by virtue of their ability to provide predictive charge packets, ensure that the specific charge on the holding capacitor can be set with high accuracy without the use of a feedback circuit.

[0027] According to a further embodiment, the amplifier comprises a constant current source coupled between the input node and the output node, and a controlled current source coupled between the output node and ground, which is in particular a charge-controlled current source. For example, M = 2. This embodiment is particularly simple from a control engineering perspective, since only a single current source is configured as the controlled current source.

[0028] According to a further embodiment, the amplifier comprises a controlled current source, preferably a charge-controlled current source, coupled between the input node and the output node, and a controlled current source, preferably a charge-controlled current source, coupled between the output node and ground. Here, for example, M = 2. In this embodiment, both current sources are designed as controlled current sources, thus enabling increased flexibility in charging the holding capacitor.

[0029] According to another embodiment, the buffer comprises a source-follower circuit with at least one transistor, in particular a field-effect transistor. The source-follower circuit can also be referred to as a source follower or common-drain amplifier. In this context, the source follower is used in particular for decoupling and as a voltage buffer. In the source follower, the gate terminal of the transistor serves as the signal input, the source terminal as the output, and the drain terminal as the common terminal. To increase the performance of the source follower, a resistor, in particular an adjustable resistor, or an adjustable current source is coupled to its output node, in this case the drive node. The adjustable current source has the advantage of requiring little chip area.

[0030] According to another embodiment, the source-follower circuit has a plurality of protection diodes coupled between the gate terminal and the source terminal of the transistor. According to another embodiment, the amplifier comprises at least three current sources, with M > 3. In this embodiment, three or more interconnected current sources are used to charge the holding capacitor.

[0031] According to a further embodiment, the control device is configured to control a plurality N, with N > 2, of actuators by means of a time multiplex signal determined by a time multiplex scheme.

[0032] According to a further embodiment, the amplifier for controlling the plurality N of actuators comprises the plurality M of current sources, N output nodes, and N holding capacitors. Furthermore, N buffers and N control nodes are provided, wherein each of the N actuators is assigned a circuit section with one of the N output nodes, one of the N buffers, and one of the N control nodes.

[0033] In this context, a time-division multiplexing scheme means, in particular, that each of the N circuit sections is assigned a fixed time slot within the time-division multiplexing period of the time-division multiplexing signal. For example, if N = 4, then the control device has four circuit sections for controlling four actuators, and the multiplexing frame accordingly has four time slots. For instance, the first time slot of the multiplexing frame is then assigned to a first circuit section, the second time slot of the multiplexing frame is assigned to a second circuit section, the third time slot of the multiplexing frame is assigned to a third circuit section, and the fourth time slot is assigned to a fourth circuit section. Any other periodically repeating assignment of the time slots within a time-division multiplexing period is also possible.

[0034] For the duration of the respective time slot, the respective circuit part assigned to the time slot is activated and its output signal, the respective control voltage, is used to control the assigned actuator.

[0035] By using circuit components controlled by the time-division multiplexing scheme, the thermal load caused by the present control device when driving the actuators is significantly reduced compared to conventional solutions. Due to the large number of actuators (several milhones) in the optical systems of a lithography system and the relatively high required drive voltage of, for example, 140 V, this results in a very large potential for savings in electrical power consumption and the associated thermal load.

[0036] According to a further embodiment, the amplifier comprises a first current source connected between the input node and a first amplifier node, and a second current source connected between a second amplifier node and ground. The respective circuit section assigned to each actuator can be connected to the first amplifier node via a first switch and to the second amplifier node via a second switch for selective connection of the circuit section to the amplifier's current sources.

[0037] According to a further embodiment, a control unit is provided which is configured to control the first and second switches of the N circuit sections for the N actuators according to the time-division multiplexing scheme. The control unit is implemented, in particular, in software, as a discrete circuit, or as an ASIC, and implements the control of the switches of the circuit sections. A discrete circuit is, in particular, a circuit built on a printed circuit board from standard components, for example, comprising resistors, transistors, capacitors, operational amplifiers, and the like. In a software implementation, the control unit can be a computer program product, a function, a routine, or part of a

[0038] Program code or be structured as an executable object.

[0039] The above embodiment utilizes time-division multiplexing of the current sources across N circuit sections and N associated actuators. For example, the control device can be implemented on an ASIC, which, for instance, controls nine MEMS mirrors. Assuming that four actuators are required to control one MEMS mirror, this means that the present control device can control 36 actuators. The present embodiment is therefore optimal in terms of chip area optimization.

[0040] The control unit of the actuator ensures that only the circuit section selected according to the time-division multiplexing scheme is connected to the power sources. This design advantageously reduces the required energy consumption.

[0041] According to a further embodiment, the control device comprises a measuring circuit that can be coupled to the control node for measuring the control voltage provided at the control node and a calibration and / or test unit that can be coupled to the measuring circuit and is configured to calibrate and / or test at least part of the control device based on the control voltage measured by the measuring circuit.

[0042] According to a further embodiment, the buffer comprises a source-follower circuit having an n-channel transistor and a p-channel transistor connected between the input node and the drive node of the control device, wherein the gate terminal of the n-channel transistor is connected to the output node of the amplifier. According to a further embodiment, the amplifier is configured as a class-A amplifier. The class-A amplifier comprises an n-channel transistor. Preferably, a capacitor is connected between the gate terminal and the drain terminal of the n-channel transistor. In particular, a current source is connected between the input node for providing the supply voltage and the drain terminal of the n-channel transistor.

[0043] According to a further embodiment, the control device comprises: a measuring circuit that can be coupled to the control node for providing a measuring voltage indicative of the control voltage provided at the control node, and an analog-to-digital converter connected downstream of the measuring circuit, which is configured to convert the measuring voltage provided by the measuring circuit into a digital measuring voltage, wherein the control unit has a digital controller unit and a digital-to-analog converter connected downstream of the digital controller unit, wherein the digital controller unit is configured to provide a regulated digital time-division multiplex control signal to the digital-to-analog converter based on a digital set-point signal and the digital measuring voltage, and wherein the digital-to-analog converter is configured to convert the regulated digital time-division multiplex control signal into a regulated analog time-division multiplex control signal.

[0044] According to a second aspect, an optical system with a number of actuable optical elements is proposed, wherein each of the actuable optical elements is associated with an actuator, and each actuator is associated with a control device for controlling the actuator according to the first aspect or according to one of the embodiments of the first aspect. The optical system particularly comprises a micromirror array and / or a microlens array with a plurality of independently actuable optical elements.

[0045] In embodiments, groups of actuators can be defined, wherein all actuators in a group are assigned the same control device.

[0046] According to one embodiment, the optical system is designed as an illumination optic or as a projection optic of a lithography system.

[0047] According to another embodiment, the optical system has a vacuum housing in which the actuable optical elements, the associated actuators and the control device are arranged.

[0048] According to a third aspect, a lithography system is proposed which has an optical system according to the second aspect or according to one of the embodiments of the second aspect.

[0049] The lithography system is, for example, an EUV lithography system whose working light lies in a wavelength range of 0.1 nm to 30 nm, or a DUV lithography system whose working light lies in a wavelength range of 30 nm to 250 nm.

[0050] According to a fourth aspect, a method for operating a control device is proposed, wherein the control device is configured according to the first aspect or according to one of the embodiments of the first aspect. The method comprises the steps: a) charging the holding capacitor to set a desired level of the amplifier's output voltage by the M current sources using a plurality of current pulses; b) measuring a test voltage indicative of the output voltage provided at the output node; and c) calibrating or deriving at least one parameter of the control device based on a comparison of the measured test voltage and the desired level of the output voltage.

[0051] In step a), the current sources preferably charge the holding capacitor to the predetermined charge using predictive charge packets. In particular, the current pulses for driving the current sources are generated based on a constant current supplied by a reference current source. Preferably, current mirrors are also provided, which reflect the current supplied by the reference current source to the controlled current sources. In step b), the measurement voltage, which is indicative of the output voltage supplied at the output node, is then measured. For this purpose, the measurement circuit discussed above can be used, which provides the measurement voltage that is indicative of the drive voltage supplied at the control node. The drive voltage supplied at the control node is, in turn, indicative, i.e., it is in a fixed and predetermined ratio, to the output voltage of the amplifier supplied at the output node.In step c), at least one parameter of the control device is calibrated or derived based on a comparison of the measured measurement voltage and the desired level of the control voltage.

[0052] According to a further embodiment, the current pulses for controlling the M current sources are generated by a control unit based on a constant current supplied by a reference current source. A current pulse is specifically defined by a particular current i with a particular duration t. If, for example, the control device according to the embodiment above is implemented with a measuring circuit and current pulses with a current i and a duration t are used to control the current sources, then the respective next setpoint value V can be determined. p The output voltage Vc at the holding capacitor with capacitance Cc can be predicted according to equation (1):

[0053] For example, if Vc = 20 V, Cc = 2.5 pF, i = 200 nA, t = 250 ps and n = 1, then V p as

[0054] (2) V P p = 20 V + (200 nA} ' (25 ° p5) (-1) = 40 V 2.5 pF

[0055] According to another embodiment, step c) has:

[0056] Determining a voltage difference between the desired output voltage level and the measured measurement voltage, and

[0057] Calibrating a target value for the constant current strength of the current to be provided by the reference current source to generate the current pulses using the determined voltage difference.

[0058] According to another embodiment, step c) has:

[0059] Determining a voltage difference between the desired output voltage level and the measured measurement voltage,

[0060] Determining a temperature-dependent setpoint for the constant current of the current to be supplied by the reference current source for generating the current pulses using the determined voltage difference, and

[0061] Determining the current ambient temperature of the reference current source based on the determined temperature-dependent setpoint for the constant current of the reference current source, the constant current used in step a) by the reference current source to charge the holding capacitor, and a temperature profile specific to the reference current source, which indicates the current of the reference current source as a function of the ambient temperature.

[0062] A high-voltage control device with predictive control uses, in particular, a current reference circuit (IREF) which can be mirrored in the high-voltage range. IREF is then converted into a high-side current and a low-side current, which are used to charge and discharge the holding capacitor. The holding capacitor can also be referred to as a control capacitor (Ccontroi or Cc). As described above, the holding capacitor is charged, in particular, by a plurality of current pulses.

[0063] In particular, the variable i (current from IREF) is designed to provide a temperature-independent or temperature-compensated current value over a large temperature range. The variable t (time) can be made large to make time fluctuations irrelevant. This results in a pre- (fictitious) charge Qt, which is also temperature-independent. Vc is the actual voltage across the holding capacitor. Assuming that the temperature coefficient of the holding capacitor is negligible, the next setpoint value V can be pcan be predicted in a well-defined manner. Using multiple current pulses makes it possible to converge to the final setpoint for the voltage across the holding capacitor by utilizing several predictive current pulses. However, temperature-independent or temperature-compensated reference current sources, such as IREF, are highly complex, require a lot of space, and can exhibit large voltage-temperature fluctuations. The present predictive charge update of the charge across the holding capacitor is based on Q. pThe equation i • t inherently allows for two degrees of freedom, namely the current i and the time t. These two degrees of freedom make it possible to use a less complex and temperature-dependent reference current source, specifically one based on a standard current source solution such as IPTAT and / or ICTAT. Furthermore, the prevailing method of predictively charging the holding capacitor over several current pulses until the final target voltage value in the holding capacitor is reached allows these predictive intermediate charging pulses (or intermediate current pulses) to be used for various purposes.

[0064] These various purposes include – as shown above – deriving the current ambient temperature of the reference current source and calibrating a setpoint for the constant current strength of the current to be provided by the reference current source, which will be explained in detail below using an example.

[0065] The resolution of the temperature measurement can be increased for large charge updates or voltage setpoints, e.g. from 20 V to 120 V, as shown in the following steps:

[0066] 1) A new intermediate target value V p is predicted at a temperature of 80°C (last measurement), and the charge Q p is sent to the holding capacitor in the form of n = 3 pulses:

[0067] (3)

[0068] 2) However, the measuring circuit (see, for example, Fig. 8) will produce a different value V. m (m stands for measured value) obtained:

[0069] 3) A voltage difference of 6 V results from the difference between the 80 V in equation (3) and the 74 V in equation (4) due to the temperature-dependent current deviation. The temperature-dependent current i(T) can be calculated using the following equation:

[0070] Based on the temperature profile shown in the diagram below for the example of an IPTAT, which indicates the current of the reference current source as a function of the ambient temperature, the ambient temperature of the reference current source can be determined, for example based on IPTAT, by interpolation (if linear) or by curve fitting (if non-linear).

[0071] 200nA- -- - —1- — predicted at T (80°C) according to equation (3)

[0072] The example shown in the diagram indicates that at a temperature of 80°C, a current of 200 nA should be present (i(T = 80°C) = 200 nA). However, the calculation above yields a current of i(T) = 180 nA. A look at the temperature profile shows that a temperature of 27°C must then be present. Consequently, it is deduced that the current ambient temperature of the reference current source is 27°C (with i(T = 27°C) = 180 nA).

[0073] Overall, this enables increased and targeted chip temperature coverage. This means that the smaller chip area of ​​a simpler reference current source, such as IPTAT, allows for multiple such reference current sources to be distributed across the chip. Furthermore, calibration effort is distributed, for example, when N actuators (e.g., N = 4 or N = 16) are sensibly grouped around a single reference current source. Moreover, sensibly grouping N actuators for at least M > 2 reference current sources results in increased robustness and reliability. If, for example, one reference current source degrades during operation, the second or third can be used. Additionally, there is no need to take the actuators out of commission for temperature calibration, as this can be performed during operation at a new set point.

[0074] According to a fifth aspect, a control device for controlling a plurality N of actuators for actuating N optical elements of an optical system is proposed. The control device comprises:

[0075] N driver stages controlled by means of a time-division multiplex signal determined by a time-division multiplexing scheme, wherein each driver stage of the N driver stages is assigned to one of the N actuators and a specific time slot of the time-division multiplexing signal and has an amplifier which is configured to amplify a signal component of the assigned time slot of the time-division multiplexing signal to a drive voltage for controlling the assigned actuator and to provide this at a control node that can be coupled to the actuator, and a control loop whose feedback branch has a voltage divider which is selectively connected to one of the N driver stages based on the time-division multiplexing scheme.

[0076] Stages can be connected, wherein each driver stage has a buffer coupled between the control node and an input node of the voltage divider, which is configured to decouple the control node from the input node of the voltage divider.

[0077] In this context, a time-division multiplexing scheme means, in particular, that each of the N driver stages is assigned a fixed time slot within the time-division multiplexing period of the time-division multiplexing signal. For example, if N = 4, then the control device has four driver stages for controlling four actuators, and the multiplexing frame accordingly has four time slots. For instance, the first time slot of the multiplexing frame is then assigned to the first driver stage, the second time slot of the multiplexing frame is assigned to the second driver stage, the third time slot of the multiplexing frame is assigned to the third driver stage, and the fourth time slot is assigned to the fourth driver stage. Any other periodically repeating assignment of the time slots within a time-division multiplexing period is also possible.

[0078] For the duration of the respective time slot, the respective driver stage assigned to the time slot is controlled and its output signal, the respective control voltage, is fed back for control via the feedback branch of the control loop.

[0079] By employing time-division multiplexed (TDM) controlled driver stages and a control loop whose feedback branch is selectively connected to the current TDM-controlled driver stage via a voltage divider, the thermal load caused by the present control device when driving the actuators is significantly reduced compared to conventional solutions. Due to the large number of actuators (several milhones) in the optical systems of a lithography system and the relatively high required drive voltage of, for example, 140 V, this results in a very large potential for savings in electrical power consumption and the associated thermal load.

[0080] Furthermore, the buffer of the present control device is suitable for decoupling the control node from the input node of the voltage divider, thereby preventing a current flowing through the voltage divider from interfering with the control voltage for the actuator. In particular, the buffer prevents backflow currents from the voltage divider towards the control node of the control device.

[0081] In one embodiment, the voltage divider is designed as a capacitive voltage divider. The combination of buffer and capacitive voltage divider offers the advantage of particularly effective noise reduction for the present control device.

[0082] According to another embodiment, the voltage divider (420) is designed as a resistive voltage divider.

[0083] According to another embodiment, the voltage divider (420) is designed as a parallel connection of a capacitive voltage divider and a resistive voltage divider.

[0084] According to another embodiment, an output switch is provided at the output of each driver stage. The output switches of the driver stages are coupled to the input node of the voltage divider. At any given time, only one of the output switches of the driver stages is closed, thus ensuring that only the driver stage associated with the closed switch is coupled to the voltage divider during that time.For example, if the first time slot of the multiplex frame of the time-division multiplex signal of the first driver stage is assigned, then for the duration of the first time slot the output-side switch of the first driver stage is closed, all other output-side switches are open, and thus only the first driver stage is coupled to the voltage divider, which ensures that the output signal of the first driver stage is fed back via the feedback branch of the control loop.

[0085] According to a further embodiment, the control device comprises: a D / A converter, which is configured to convert an input-side digital representation of the time-division multiplex signal into an analog time-division multiplex signal and to provide the analog time-division multiplex signal at a first node on the output side; and an operational amplifier, whose inverting input is coupled to the first node and whose non-inverting input is coupled to the center tap of the voltage divider, and which is configured to generate a zero difference between the analog time-division multiplex signal applied to the non-inverting input and a voltage provided via the center tap, and depending on this, to provide an amplified time-division multiplex control signal at a second node on the output side.

[0086] According to a further embodiment, the N driver stages are connected in parallel between the second node and the input node of the voltage conductor, with an input-side switch assigned to each driver stage being arranged between the second node and the amplifier of the respective driver stage for selectively connecting the driver stage to the output of the operational amplifier. According to a further embodiment, a control unit is provided which is configured to control the switches of the driver stages according to the time-division multiplexing scheme. The control unit is implemented, in particular, in software, as a discrete circuit, or as an ASIC and implements the control of the switches of the driver stages. A discrete circuit is, in particular, a circuit built on a printed circuit board from standard components, for example, comprising resistors, transistors, capacitors, operational amplifiers, and the like.

[0087] The above embodiment utilizes time-division multiplexing of the voltage divider across multiple driver stages. For example, the driver can be implemented on an ASIC, which, for instance, drives nine MEMS mirrors. Assuming that four actuators are required to drive one MEMS mirror, this means that the present driver can control 36 actuators. In this embodiment, the control loop is an analog control loop with an additional capacitor, the hold capacitor, to maintain the voltage level. The present embodiment with the analog control loop is optimal in terms of chip area optimization.

[0088] According to another embodiment, a holding capacitor is connected between the node connecting the amplifier of the respective driver stage and the respective associated input-side switch, and ground. The holding capacitor is designed to maintain the level of the provided time-division multiplexed control signal when the associated input-side switch is in the open state.

[0089] The control unit of the driver device ensures that only the driver stage selected according to the time-division multiplexing scheme (TDM) is connected to the voltage divider. The operational amplifier adjusts the output of the currently selected amplifier to the desired output voltage. The input voltage required for the desired output voltage is held constant by the holding capacitor while the operational amplifier is not connected to the corresponding amplifier. This design advantageously reduces the required power consumption.

[0090] According to another embodiment, the buffer comprises a source-follower circuit with at least one transistor, in particular a field-effect transistor.

[0091] According to another embodiment, an output node connected to the output of the buffer is connected to ground via a current source, and the output node is also connected to the input node of the voltage section via the output-side switch and a downstream diode.

[0092] According to another embodiment, the source-follower circuit has a plurality of high-voltage transistors.

[0093] According to another embodiment, the source-follower circuit comprises an n-channel transistor and a p-channel transistor, which are connected between the input node of the drive device and the output node of the buffer. The gate terminal of the n-channel transistor is connected to the drive node.

[0094] According to a further embodiment, an additional current source is connected between the output node of the buffer and the output switch. The power consumption and bandwidth can advantageously be adjusted by means of the at least one current source provided at the output node of the buffer.

[0095] According to a sixth aspect, a control device for controlling a plurality N of actuators for actuating N optical elements of an optical system is proposed. The control device comprises:

[0096] N driver stages controlled by means of a time-division multiplexing (TDM) control signal determined by a time-division multiplexing scheme, wherein each driver stage of the N driver stages is assigned to one of the N actuators and a specific time slot of the TDM control signal and has an amplifier which is configured to amplify a signal component of the assigned time slot of the TDM control signal to a control voltage for controlling the assigned actuator and to provide this voltage at a control node that can be coupled to the actuator, wherein a holding capacitor is connected between the node connecting the amplifier of the respective driver stage and the respective assigned input-side switch and ground to maintain a specific level of the provided signal component of the TDM control signal in the open state of the assigned input-side switch, and a plurality M, with M > 2,comprising at least one charge-controlled current source configured to provide predictive charge packets to set a specific charge on the holding capacitor, representing the specific level of the signal component of the time-division multiplexing drive signal.

[0097] The holding capacitor is, in particular, a low-voltage (LV) capacitor. The current sources are preferably connected between a low voltage, for example the supply voltage VDD, and ground. This allows the current sources to be operated in the low-voltage range VDD and, consequently, to be implemented with minimal space requirements.

[0098] According to one embodiment, a control unit is provided which is configured to control the current sources with a respective control signal. The control signals are specifically designed as predetermined current pulses in order to set the charge on the holding capacitor, which is determined depending on the specific level of the signal component of the time-division multiplex control signal.

[0099] According to a further embodiment, the control device comprises a control loop whose feedback branch includes a voltage divider that can be selectively connected to one of the N driver stages based on the time-division multiplexing scheme and that provides a measuring voltage indicative of the drive voltage supplied at the control node of the selected N driver stage. The control unit is preferably configured to generate the drive signals for the current sources using the provided measuring voltage.

[0100] According to another embodiment, an output-side switch is provided at the output of the respective driver stage, wherein the output-side switches of the driver stages are coupled to an input node of the voltage divider.

[0101] According to a further embodiment, the respective driver stage comprises a buffer coupled between the drive node and the input node of the voltage divider, which is configured to decouple the drive node from the input node of the voltage divider. According to a further embodiment, the holding capacitor is a low-voltage capacitor.

[0102] A capacitor is formed. The LV capacitor can also be called a low-voltage capacitor.

[0103] The term "one" here should not necessarily be understood as restricting the number to exactly one element. Rather, it can also refer to multiple elements, such as two, three, or more. Similarly, every other counter used here should not be interpreted as restricting the number to the exact number stated. Instead, numerical deviations, both higher and lower, are possible unless otherwise specified.

[0104] Other possible implementations of the invention also include combinations of features or embodiments described previously or subsequently with regard to the exemplary embodiments, even if not explicitly mentioned. In such cases, the person skilled in the art will also add individual aspects as improvements or additions to the respective basic form of the invention.

[0105] Further advantageous embodiments and aspects of the invention are the subject of the dependent claims and the exemplary embodiments of the invention described below. The invention will be explained in more detail below with reference to preferred embodiments and the accompanying figures.

[0106] Fig. 1 shows a schematic meridional section of a projection exposure system for EUV projection lithography;

[0107] Fig. 2 shows a schematic representation of an embodiment of an optical system; Fig. 3 shows a schematic block diagram of a first embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system!

[0108] Fig. 4 shows a schematic block diagram of a second embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system!

[0109] Fig. 5 shows a schematic block diagram of a third embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system!

[0110] Fig. 6 shows a schematic block diagram of a fourth embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system!

[0111] Fig. 7 shows a schematic diagram of an embodiment of a time-division multiplex signal determined according to the time-division multiplex scheme used in Fig. 6!

[0112] Fig. 8 shows a schematic block diagram of a fifth embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system!

[0113] Fig. 9 shows a schematic block diagram of a sixth embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system. Fig. 10 shows a schematic block diagram of a seventh embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system.

[0114] Fig. 11 shows a schematic flowchart of an embodiment of a method for operating a control device;

[0115] Fig. 12 shows a schematic block diagram of an eighth embodiment of a control device for controlling a plurality of actuators for actuating optical elements of an optical system!

[0116] Fig. 13 shows a schematic block diagram of a ninth embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system!

[0117] Fig. 14 shows a schematic block diagram of a tenth embodiment of a control device for controlling a plurality of actuators for actuating optical elements of an optical system!

[0118] Fig. 15 shows a schematic block diagram of an eleventh embodiment of a control device for controlling a plurality of actuators for actuating optical elements of an optical system!

[0119] Fig. 16 shows a schematic block diagram of a twelfth embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system! and

[0120] Fig. 17 shows a schematic block diagram of a thirteenth embodiment of a control device for controlling a number of actuators for actuating optical elements of an optical system. In the figures, identical or functionally equivalent elements have been designated with the same reference numerals unless otherwise indicated. Furthermore, it should be noted that the representations in the figures are not necessarily to scale.

[0121] Fig. 1 shows an embodiment of a projection exposure system 1 (lithography system), in particular an EUV lithography system. One embodiment of the illumination system 2 of the projection exposure system 1 has, in addition to a light or radiation source 3, an illumination optic 4 for illuminating an object field 5 in an object plane 6. In an alternative embodiment, the light source 3 can also be provided as a separate module from the rest of the illumination system 2. In this case, the illumination system 2 does not include the light source 3.

[0122] A reticule 7 arranged in the object field 5 is exposed. The reticule 7 is held by a reticule holder 8. The reticule holder 8 can be moved, particularly in a scanning direction, via a reticule displacement drive 9.

[0123] Figure 1 illustrates a Cartesian coordinate system with an x-direction x, a y-direction y, and a z-direction z. The x-direction x runs perpendicular to the plane of the drawing. The y-direction y runs horizontally, and the z-direction z runs vertically. In Figure 1, the scan direction runs along the y-direction y. The z-direction z runs perpendicular to the object plane 6.

[0124] The projection exposure system 1 comprises a projection optic 10. The projection optic 10 serves to image the object field 5 onto an image field 11 in an image plane 12. The image plane 12 is parallel to the object plane 6. Alternatively, an angle other than 0° between the object plane 6 and the image plane 12 is also possible.

[0125] A structure on the reticulum 7 is imaged onto a photosensitive layer of a wafer 13 located in the image plane 12 within the image field 11. The wafer 13 is held by a wafer holder 14. The wafer holder 14 can be moved, particularly along the y-direction y, via a wafer transfer drive 15. The movement of the reticulum 7 via the reticulum transfer drive 9 and of the wafer 13 via the wafer transfer drive 15 can be synchronized.

[0126] Light source 3 is an EUV radiation source. Light source 3 emits, in particular, EUV radiation 16, which is also referred to below as useful radiation, illumination radiation, or illumination light. The useful radiation 16 has a wavelength in the range between 5 nm and 30 nm. Light source 3 can be a plasma source, for example, an LPP source (Laser Produced Plasma, plasma generated using a laser) or a DPP source (Gas Discharged Produced Plasma, plasma generated by gas discharge). It can also be a synchrotron-based radiation source. Light source 3 can be a free-electron laser (FEL).

[0127] The illumination radiation 16 emanating from the light source 3 is focused by a collector 17. The collector 17 can be a collector with one or more ellipsoidal and / or hyperboloid reflective surfaces. The at least one reflective surface of the collector 17 can be illuminated by the illumination radiation 16 at grazing incidence (Gl), i.e., with angles of incidence greater than 45°, or at normal incidence (NI), i.e., with angles of incidence less than 45°. The collector 17 can be structured and / or coated to optimize its reflectivity for the useful radiation and to suppress stray light.

[0128] After the collector 17, the illumination radiation 16 propagates through an intermediate focus in an intermediate focal plane 18. The intermediate focal plane 18 can represent a separation between a radiation source module, comprising the light source 3 and the collector 17, and the illumination optics 4.

[0129] The illumination optics 4 comprise a deflecting mirror 19 and, downstream in the beam path, a first faceted mirror 20. The deflecting mirror 19 can be a planar deflecting mirror or, alternatively, a mirror with an effect that influences the beam shape beyond the mere deflection effect. Alternatively or additionally, the deflecting mirror 19 can be designed as a spectral filter that separates a useful wavelength of the illumination radiation 16 from stray light of a different wavelength. If the first faceted mirror 20 is arranged in a plane of the illumination optics 4 that is optically conjugate to the object plane 6 as the field plane, it is also referred to as a field faceted mirror. The first faceted mirror 20 comprises a plurality of individual first facets 21, which can also be referred to as field facets. Only a few of these first facets 21 are shown in Fig. 1 as examples.

[0130] The first facets 21 can be designed as macroscopic facets, in particular as rectangular facets or as facets with an arcuate or semicircular border contour. The first facets 21 can be designed as planar facets or alternatively as convexly or concavely curved facets.

[0131] As is known, for example, from DE 10 2008 009 600 Al, the first facets 21 can themselves each be composed of a plurality of individual mirrors, in particular a plurality of micromirrors. The first facet mirror 20 can in particular be designed as a microelectromechanical system (MEMS system). For details, reference is made to DE 10 2008 009 600 Al.

[0132] Between the collector 17 and the deflecting mirror 19, the illumination radiation 16 runs horizontally, i.e. along the y-direction y.

[0133] In the beam path of the illumination optics 4, a second faceted mirror 22 is arranged downstream of the first faceted mirror 20. If the second faceted mirror 22 is arranged in a pupil plane of the illumination optics 4, it is also referred to as a pupil faceted mirror. The second faceted mirror 22 can also be arranged at a distance from a pupil plane of the illumination optics 4. In this case, the combination of the first faceted mirror 20 and the second faceted mirror 22 is also referred to as a specular reflector. Specular reflectors are known from US 2006 / 0132747 A1, EP 1 614 008 B1, and US 6,573,978.

[0134] The second facet mirror 22 comprises a plurality of second facets 23. In the case of a pupil facet mirror, the second facets 23 are also referred to as pupil facets.

[0135] The second facets 23 can also be macroscopic facets, which may, for example, have round, rectangular, or hexagonal edges, or alternatively, facets composed of micromirrors. Reference is also made to DE 10 2008 009 600 Al in this regard.

[0136] The second facets 23 can have planar or, alternatively, convex or concave curved reflective surfaces. The illumination optics 4 thus form a doubly faceted system. This basic principle is also known as a honeycomb condenser (EnglJ Fly's Eye Integrator).

[0137] It can be advantageous not to arrange the second faceted mirror 22 exactly in a plane that is optically conjugate to a pupil plane of the projection optics 10. In particular, the second faceted mirror 22 can be arranged tilted relative to a pupil plane of the projection optics 10, as described, for example, in DE 10 2017 220 586 A1.

[0138] With the aid of the second faceted mirror 22, the individual first facets 21 are imaged into the object field 5. The second faceted mirror 22 is the last beam-shaping, or indeed the last, mirror for the illumination radiation 16 in the beam path before the object field 5.

[0139] In another embodiment of the illumination optics 4, not shown, a transmission optic can be arranged in the beam path between the second facet mirror 22 and the object field 5, which contributes in particular to imaging the first facets 21 into the object field 5. The transmission optic can have exactly one mirror, or alternatively two or more mirrors, which are arranged one behind the other in the beam path of the illumination optics 4. The transmission optic can in particular comprise one or two mirrors for normal incidence (Ni mirrors, normal incidence mirrors) and / or one or two mirrors for grazing incidence (GF mirrors, grazing incidence mirrors).

[0140] In the embodiment shown in Fig. 1, the lighting optics 4 has exactly three mirrors after the collector 17, namely the deflecting mirror 19, the first faceted mirror 20, and the second faceted mirror 22. In a further embodiment of the lighting optics 4, the deflecting mirror 19 can also be omitted, so that the lighting optics 4 can then have exactly two mirrors after the collector 17, namely the first faceted mirror 20 and the second faceted mirror 22.

[0141] The mapping of the first facets 21 by means of the second facets 23 or with the second facets 23 and a transmission optic into the object plane 6 is regularly only an approximate mapping.

[0142] The projection optics 10 comprise a plurality of mirrors Mi, which are numbered according to their arrangement in the beam path of the projection exposure system 1.

[0143] In the example shown in Fig. 1, the projection optics 10 comprises six mirrors M1 to M6. Alternatives with four, eight, ten, twelve, or any other number of mirrors Mi are also possible. The projection optics 10 is a double-obscured optic. The penultimate mirror M5 and the last mirror M6 each have a passage aperture for the illumination radiation 16. The projection optics 10 has an image-side numerical aperture that is greater than 0.5 and can also be greater than 0.6, for example, 0.7 or 0.75.

[0144] The reflective surfaces of the mirrors Mi can be designed as freeform surfaces without an axis of rotational symmetry. Alternatively, the reflective surfaces of the mirrors Mi can be designed as aspherical surfaces with exactly one axis of rotational symmetry of the reflective surface shape. The mirrors Mi, like the mirrors of the illumination optics 4, can have highly reflective coatings for the illumination radiation 16. These coatings can be designed as multilayer coatings, in particular with alternating layers of molybdenum and silicon. The projection optics 10 has a large object-image offset in the y-direction y between a y-coordinate of a center of the object field 5 and a y-coordinate of the center of the image field 11. This object-image offset in the y-direction y can be approximately as large as a z-distance between the object plane 6 and the image plane 12.

[0145] The projection optics 10 can be anamorphic. In particular, they have different image scales βx, βy in the x and y directions. The two image scales βx, βy of the projection optics 10 are preferably (βx, βy) = (+ / - 0.25, ± 0.125). A positive image scale β indicates a projection without image inversion. A negative sign for the image scale β indicates a projection with image inversion.

[0146] The projection optics 10 thus lead to a reduction in the x-direction x, that is, in the direction perpendicular to the scan direction, in a ratio of 4 .

[0147] The projection optics 10 lead to a reduction of 84 in the y-direction y, that is, in the scan direction.

[0148] Other magnification ratios are also possible. Magnification ratios with the same sign and absolute values ​​in the x and y directions (x, y), for example with absolute values ​​of 0.125 or 0.25, are also possible.

[0149] The number of intermediate image planes in the x and y directions x, y in the beam path between the object field 5 and the image field 11 can be the same or, depending on the design of the projection optics 10, different. Examples of projection optics with different numbers of such intermediate images in the x and y directions x, y are known from US 2018 / 0074303 A1. Each of the second facets 23 is assigned to exactly one of the first facets 21 to form an illumination channel for illuminating the object field 5. This can result, in particular, in illumination according to Köhler's principle. The far field is divided into a plurality of object fields 5 with the help of the first facets 21. The first facets 21 generate a plurality of images of the intermediate focus on the second facets 23 assigned to them.

[0150] The first facets 21 are each superimposed on a corresponding second facet 23 to illuminate the object field 5 on the reticle 7. The illumination of the object field 5 is particularly homogeneous. It preferably exhibits a uniformity error of less than 2%. Field uniformity can be achieved by superimposing different illumination channels.

[0151] The illumination of the entrance pupil of the projection optics 10 can be geometrically defined by arranging the second facets 23. By selecting the illumination channels, in particular the subset of the second facets 23 that carry light, the intensity distribution in the entrance pupil of the projection optics 10 can be adjusted. This intensity distribution is also referred to as the illumination setting or illumination pupil filling.

[0152] Another preferred pupil uniformity in the area of ​​defined illuminated sections of an illumination pupil of the illumination optics 4 can be achieved by a redistribution of the illumination channels.

[0153] Further aspects and details of the illumination of the object field 5, and in particular of the entrance pupil of the projection optics 10, are described below. The projection optics 10 may, in particular, have a homocentric entrance pupil. This may be accessible. It may also be inaccessible.

[0154] The entrance pupil of the projection optics 10 cannot always be illuminated exactly by the second faceted mirror 22. When the projection optics 10 image the center of the second faceted mirror 22 telecentrically onto the wafer 13, the aperture rays often do not intersect at a single point. However, a surface can be found where the pairwise determined separation of the aperture rays is minimized. This surface represents the entrance pupil or a surface conjugate to it in real space. In particular, this surface exhibits a finite curvature.

[0155] The projection optics 10 may have different entrance pupil positions for the tangential and sagittal beam paths. In this case, an imaging element, in particular an optical component of the transmission optics, should be provided between the second faceted mirror 22 and the reticle 7. This optical element can accommodate the different positions of the tangential and sagittal entrance pupils.

[0156] In the arrangement of the components of the illumination optics 4 shown in Fig. 1, the second faceted mirror 22 is arranged in a plane conjugate to the entrance pupil of the projection optics 10. The first faceted mirror 20 is arranged tilted relative to the object plane 6. The first faceted mirror 20 is arranged tilted relative to an arrangement plane defined by the deflecting mirror 19. The first faceted mirror 20 is arranged tilted relative to an arrangement plane defined by the second faceted mirror 22.

[0157] Fig. 2 shows a schematic representation of an embodiment of an optical system 300 for a lithography system or projection exposure system 1, as shown, for example, in Fig. 1. Furthermore, the optical system 300 of Fig. 2 can also be used, for example, in a DUV lithography system.

[0158] The optical system 300 of Fig. 2 has a plurality of actuable optical elements 310. The optical system 300 is configured here as a micromirror array, wherein the optical elements 310 are micromirrors. Each micromirror 310 can be actuated by means of an associated actuator 200. For example, each micromirror 310 can be tilted about two axes and / or displaced in one, two, or three spatial axes by means of the associated actuator 200. For clarity, reference numerals are shown only for the top row of these elements.

[0159] The control device 100 controls the respective actuator 200, for example, with a control voltage V2 (see Figs. 3 to 8 and Figs. 10 to 12). This sets a position of the respective micromirror 310. The control device 100 is described in particular with reference to Figs. 3 to 10 and Figs. 12 to 17.

[0160] Figure 3 shows a schematic block diagram of a first embodiment of a control device 100 for controlling a number N, with N > 1, of actuators 200 for actuating N optical elements 310 of an optical system 300. Without loss of generality, N = 1 in Figure 3, and the control device 100 controls one actuator 200. In the embodiments shown in Figures 3 to 10 and Figures 12 to 17, the actuator 200 is a capacitive actuator and is shown as a capacitive in Figures 3 to 10 and 12 to 17.

[0161] The control device 100 comprises an input node Kl for receiving the supply voltage VI and a control node K2 that can be coupled to the actuator 200 for providing the control voltage V2 for the actuator 200.

[0162] Furthermore, the control device 100 includes an amplifier 110, which is configured to receive the supply voltage VI provided at the input node Kl and to provide an output voltage V3 at an output node K3 of the amplifier 110.

[0163] As illustrated in Fig. 3, the amplifier 110 has a plurality M, with M > 2, of current sources 111, 112, including at least one charge-controlled current source 112. In the embodiment shown in Fig. 3, the lower current source 112, coupled to ground GND, is configured as a charge-controlled current source 112, which can be controlled by means of the control signal AS. The control signal AS is specifically configured as a current pulse. The current pulse is defined by pulses of a specific duration and a specific current amplitude.

[0164] Furthermore, amplifier 110 has a holding capacitor 113 for maintaining the level of the provided output voltage V3. The holding capacitor 113 is coupled between the output node K3 of amplifier 110 and ground GND. The current sources 111 and 112 of amplifier 110 are specifically configured to set a charge on the holding capacitor 113 that depends on a desired level of the drive voltage V2. Consequently, the two current sources 111 and 112 are capable of adjusting the charge of the holding capacitor 113 such that the desired drive voltage V2 is provided at the drive node K2 for the actuator 200.

[0165] As further shown in Fig. 3, a buffer 120 is provided between the output node K3 and the control node K2. The buffer 120 is configured to decouple the control node K2 from the output node K3 and to provide the control voltage V2 for the actuator 200 based on the level of the output voltage V3 of the holding capacitor 113.

[0166] As already explained above, at least one of the M current sources 111, 112 is configured as a charge-controlled current source. As further explained above, the lower current source 112 in Fig. 3 is configured as a charge-controlled current source. Accordingly, the upper current source 111, in particular, can be configured as a constant current source. The buffer 120 can also be referred to as a buffer amplifier or buffer and here has the function, in particular, of decoupling circuit components, in this case the input node K2 from the output node K3.

[0167] Figure 4 shows a schematic block diagram of a second embodiment of a control device 100 for controlling a number N of actuators 200 for actuating N optical elements 310 of an optical system 300. The second embodiment according to Figure 4 is based on the first embodiment according to Figure 3 and differs from it in that, in the second embodiment according to Figure 4, both current sources 111 and 112 are designed as charge-controlled current sources. For controlling the two current sources 111, 112 with a respective control signal AS1, AS2, the control device 100 of Figure 4 comprises a control unit 140. The control signals AS1, AS2 provided by the control unit 140 are designed, in particular, as predetermined current pulses in order to set a charge on the holding capacitor 113 that is determined depending on the desired level of the control voltage V2.In other words, the two current sources 111, 112 are suitable for providing predictive charge packets to set the said specific charge on the holding capacitor 113.

[0168] Figure 5 shows a schematic block diagram of a third embodiment of a control device 100 for controlling a number N of actuators 200 for actuating N optical elements 310 of an optical system 300. The third embodiment according to Figure 5 is based on the second embodiment according to Figure 4 and differs from it, in particular, in the design of the buffer 120. In the third embodiment according to Figure 5, the buffer 120 comprises a source-follower circuit 130 with at least one transistor 131, in particular a field-effect transistor. To increase the performance of the source-follower circuit 130, a resistor 210, in particular an adjustable resistor, or an adjustable current source is coupled to the output node of the source-follower circuit 130, in this case the control node K2.Furthermore, the source-follower circuit 130 preferably has a plurality of protection diodes 132-135 coupled between the gate terminal of the transistor 131 and the source terminal of the transistor 131.

[0169] Fig. 6 shows a schematic block diagram of a fourth embodiment of a control device 100 for controlling a plurality N, with N > 2, of actuators 200 for actuating N optical elements 310 of an optical system 300. Without limiting generality, only two actuators 200 are explicitly shown in Fig. 6. A larger number is indicated by the three points shown in Fig. 6 (see top right and bottom right of Fig. 6). The control device 100 of Fig. 6 is configured to control the plurality N of actuators 200 by means of a time-division multiplex signal ZM (see Fig. 7) determined by a time-division multiplexing scheme Z.

[0170] In the fourth embodiment according to Fig. 6, the amplifier 110 for controlling the plurality N of actuators 200 comprises the plurality M of current sources 111, 112 (M = 2 is shown as an example in Fig. 6), N output nodes K3, and N holding capacitors 113. Furthermore, the control device 100 according to Fig. 6 comprises N buffers 120 and N control nodes K2. Each of the N actuators 200 is assigned a circuit section TI, T2 according to Fig. 6, comprising one of the N output nodes K3, one of the N buffers 120, and one of the N control nodes K2. For the sake of clarity and to maintain readability, only two circuit sections TI and T2 for two assigned actuators 200 are explicitly shown in Fig. 6.

[0171] As illustrated in Fig. 6, the amplifier 100 has a first current source 111, which is connected between the input node Kl and a first amplifier node K4, and a second current source 112, which is connected between a second amplifier node K5 and ground GND. The respective circuit section TI, T2, assigned to one of the actuators 200, can be connected to the first amplifier node K4 via a first switch S1 and to the second amplifier node K5 via a second switch S2 for selective connection of circuit section TI or T2 to the current sources 111, 112 of the amplifier 110.

[0172] To control the switches Si, S2 and to provide the control signals AS1, AS2 for the two current sources 111, 112, the control device 100 according to Fig. 6 has a control unit 140. The control unit 140 is configured to control the first and second switches Si, S2 of the N circuit sections TI, T2 for the N actuators 200 according to the time-division multiplexing scheme Z. For this purpose, Fig. 7 shows an embodiment of a time-division multiplexing signal ZM determined according to the time-division multiplexing scheme Z used in Fig. 6. If, as explicitly shown in the example of Fig. 6, the control device 100 has two circuit sections TI and T2 for controlling two actuators 200, then the time-division multiplexing frame MR according to Fig. 7 has two time slots ZI and Z2. For example, the first time slot ZI of the multiplex frame MR is assigned to the first circuit part TI, and the second time slot Z2 of the multiplex frame MR is assigned to the second circuit part T2.This means that at the first time ZI, the switches S1 and S2 assigned to the first circuit part TI are closed by means of the time-division multiplex signal ZM, whereas in the second time slot Z2, the switches S1 and S2 assigned to the second circuit part T2 are closed by means of the time-division multiplex signal ZM. Fig. 8 illustrates a schematic block diagram of a fifth embodiment of a control device 100 for controlling a number N, with N > 1, of actuators 200 for actuating N optical elements 310 of an optical system 300. The fifth embodiment according to Fig. 8 is based on the second embodiment according to Fig. 4, but could also be based on one of the other embodiments. As Fig. 8 shows, the fifth embodiment of the control device 100 has a measuring circuit 150 coupled to the control node K2 for measuring the control voltage V2 provided at the control node K2.For this purpose, the measuring circuit 150 includes a voltage divider comprising resistors RI and R2. The voltage divider can also be designed as a capacitive voltage divider.

[0173] An analog-to-digital converter 152 is connected to the center tap MA of the voltage divider consisting of resistors RI and R2. This converter transforms the measurement voltage VFB provided by the voltage divider RI, R2, which is indicative of the drive voltage V2 provided at the control node K2, from an analog signal into a digital signal. The digital measurement voltage VFB is then provided to a calibration and / or test unit 141. As shown in Fig. 8, the calibration and / or test unit 141 can be implemented as part of the control unit 140. The calibration and / or test unit 141 is configured to calibrate and / or test at least part of the control device 100 based on the drive voltage V2 measured by the measuring circuit 150 or the measurement voltage VFB indicative of it. Examples of possible functions of the calibration and / or test unit 141 are explained with reference to the method shown in Fig. 9.

[0174] Fig. 9 shows a schematic block diagram of a sixth embodiment of a control device 100 for controlling a number of actuators 200 for actuating optical elements 310 of an optical system 300. The sixth embodiment of the control device 100 according to Fig. 9 is based on the fifth embodiment according to Fig. 8 and differs from it in the design of the buffer 120. According to Fig. 9, the buffer 120 has a source-follower circuit 121. The source-follower circuit 121 preferably comprises a plurality of high-voltage transistors 122, 123. Without limiting the generality, the source-follower circuit 121 of Fig. 9 has two high-voltage transistors, in particular an n-channel transistor 122 and a p-channel transistor 123. The n-channel transistor 122 and the p-channel transistor 123 are connected between the input node Kl and the control node K2.The gate terminal of the n-channel transistor 122 is connected to the output node K3 of the amplifier 110.

[0175] As illustrated in Fig. 9, the control node K2 is the output node of the source-follower circuit 121. This output node K2 is connected to ground via a current source 124.

[0176] Furthermore, as shown in Fig. 9, an additional current source 125 can be connected between the input node Kl and the transistors 122, 123. This additional current source 124 can be used to reduce noise and / or adjust performance.

[0177] Fig. 10 shows a schematic block diagram of a seventh embodiment of a control device 100 for controlling a number of actuators 200 for actuating optical elements 310 of an optical system 300.

[0178] The seventh embodiment according to Fig. 10 is based on the sixth embodiment according to Fig. 9 and includes all of its features. Furthermore, the control device 100 according to Fig. 10 has an additional current source 126, which is connected between the control node K2, which in this case forms the output node of the buffer 120, and the measuring circuit 150. In addition, the voltage divider of the measuring circuit 150 in Fig. 10 is designed as a capacitive voltage divider with capacitors C1 and C2. The combination of buffer 120 and capacitive voltage divider C1 and C2 has the advantage of particularly effective noise reduction for the control device 100 according to Fig. 10.

[0179] Figure 11 shows a schematic flowchart of a method for operating a control device 100. An example of such a control device 100 is shown in Figure 8. The method according to Figure 11 comprises steps 1101-1103:

[0180] In step 1101, the holding capacitor 113 is charged by the current sources 111, 112 using a plurality of current pulses to set a desired level of the output voltage V3 of the amplifier 110. The current sources 111, 112 charge the holding capacitor 113 to the predetermined charge by means of predictive charge packets. In particular, the current pulses for driving the current sources 111, 112 are generated based on a constant current supplied by a reference current source. Preferably, current mirrors are also provided, which reflect the current supplied by the reference current source to the controlled current sources 111, 112.

[0181] In step 1102, a measuring voltage VFB, indicative of the output voltage V3 provided at output node K3, is measured. For this purpose, the measuring circuit 150 can be used, as shown in Fig. 8. This circuit provides the measuring voltage VFB, which is indicative of the drive voltage V2 provided at control node K2. The drive voltage V2 provided at control node K2 is, in turn, indicative, i.e., it bears a fixed and predetermined ratio, to the output voltage V3 of amplifier 110 provided at output node K3. In step 1103, at least one parameter of the control device 100 is calibrated or derived based on a comparison of the measured measuring voltage VFB and the desired level of the drive voltage V3. Two examples of a specific implementation of step 1103 are explained below.

[0182] According to a first example, step 1103 is formed by:

[0183] Determining a voltage difference between the desired level of the output voltage V3 and the measured measurement voltage VFB, and

[0184] Calibrating a target value for the constant current strength of the current to be provided by the reference current source to generate the current pulses using the determined voltage difference.

[0185] According to a second example, step 1103 can be formed by:

[0186] Determining a voltage difference between the desired level of the output voltage V3 and the measured measurement voltage VFB,

[0187] Determining a temperature-dependent setpoint for the constant current of the current to be supplied by the reference current source for generating the current pulses using the determined voltage difference, and

[0188] Determining the current ambient temperature of the reference current source based on the determined temperature-dependent setpoint for the constant current of the reference current source, the constant current used by the reference current source in step 1101 to charge the holding capacitor 113, and a temperature profile specific to the reference current source, which indicates the current of the reference current source as a function of the ambient temperature. Fig. 12 shows a schematic block diagram of an eighth embodiment of a control device 100 for controlling a plurality N of actuators 200 for actuating optical elements 310 of an optical system 300, with N > 2.

[0189] The control device 100 comprises N driver stages D1-D4. Without limiting generality, only one driver stage D1 is shown in detail in Fig. 12; three further driver stages D2-D4 are indicated. A larger number results from the three points shown in Fig. 12. Each driver stage D1-D4 is assigned to one of the N actuators 200 and is furthermore assigned to a specific time slot (see, for example, ZI, Z2 in Fig. 7) of the time-division multiplex signal ZMD, ZMA. Each driver stage D1-D4 comprises an amplifier 110. The amplifier 110 is configured to amplify a signal component of the assigned time slot of the time-division multiplex signal ZMD, ZMA to a control voltage V2 for controlling the assigned actuator 200 and to provide this control voltage V2 at a control node K2 that can be coupled to the actuator 200.

[0190] Furthermore, the control device 100 of Fig. 12 has a control loop 400, whose feedback branch 410 includes a voltage divider 420. The voltage divider 420 can be selectively connected to one of the N driver stages D1-D4 based on the time-division multiplexing scheme Z. The voltage divider 420 is configured, for example, as a capacitive voltage divider, a resistive voltage divider, or as a parallel connection of a capacitive voltage divider and a resistive voltage divider. The resistances of the voltage divider 420 in Fig. 12 are shown as complex resistances ZI and Z2.

[0191] For the sake of clarity, the following discussion focuses primarily on driver stage D1. Driver stages D2-D4 are constructed analogously. Driver stage D1 has a buffer 500 coupled between the control node K2 and an input node K6 of the voltage divider 420. The buffer 500 is configured to decouple the control node K2 from the input node K6 of the voltage divider 420. An output switch S3 is provided at the output of driver stage D1. The output switches S3 of driver stages D1-D4 are connected to the input node K6 of the voltage divider 420. An output node K10, connected to the output of the buffer 500, is connected to ground via a current source 510. Furthermore, this output node K10 is connected to the input node K6 of the voltage divider 420 via the output-side switch S3 and a downstream diode 520.The adjustable current setting of the 510 power source allows for two functions: firstly, a low current setting for energy saving purposes, and secondly, a slightly higher current setting to create more bandwidth.

[0192] As shown in Fig. 12, the control device 100 further comprises a D / A converter 600 and an operational amplifier 700. The D / A converter 600 is configured to convert an input-side digital representation ZMD of the time-division multiplex signal ZMD, ZMA to an analog time-division multiplex signal ZMA and to provide the analog time-division multiplex signal ZMA at a first node K7.

[0193] The operational amplifier 700 has a non-inverting input and an inverting input. The inverting input is connected to the first node K7. The non-inverting input is connected to the center tap MA of the voltage divider 420. The operational amplifier 700 is configured to generate a zero difference between the time-division multiplex signal ZMA applied to the non-inverting input and a voltage V4 supplied across the center tap MA, and, depending on this, to provide an amplified time-division multiplexing drive signal V5 at a second node K8. As shown in Fig. 12, the N driver stages D1-D4 are connected in parallel between the second node K8 and the input node K6 of the voltage divider 420. Exactly one of the driver stages D1-D4 is driven for each time slot of the time-division multiplexing scheme Z.For this purpose, an input switch S4, assigned to each driver stage D1-D4, is arranged between the second node K8 and the amplifier 110 of the respective driver stage D1-D4 to selectively connect the driver stage D1-D4 to the output of the operational amplifier 700. Switches S3 and S4 of the driver stages D1-D4 are controlled according to the time multiplex scheme Z. For example, when the first driver stage D1 is selected, the new set point is provided by the voltage ZMA at node K7 and by the voltage V4. For this, switch S3 is closed to allow the control voltage V2 to be measured at the control node K2. Switch S4 remains open as long as possible until the voltage V5 at node K8, i.e., at the output of the operational amplifier 700, has stabilized. Only then is switch S4 closed, thus closing the control loop 410.The output voltage V5 at the output of operational amplifier 700 is then immediately applied to node K9. It is advantageous, among other things with regard to the stability of the control loop 410, if switch S4 is closed for a very short time, for example, less than 10 jxs. After switch S4 has been opened, switch S3 can be opened after a certain time.

[0194] If, as explicitly shown in the example of Fig. 12, the control device 100 has four driver stages D1-D4 for controlling four actuators 200, then the time-division multiplex frame MR (analogous to Fig. 7) has four time slots. For example, the first time slot of the time-division multiplex frame MR is assigned to the first driver stage D1, and in this first time slot, switches S3 and S4 of the first driver stage D1 are closed, while in all three subsequent time slots, they are open. Furthermore, in this example, the second time slot of the time-division multiplex frame MR is assigned to the second driver stage D2, the third time slot of the time-division multiplex frame MR is assigned to the third driver stage D3, and the fourth time slot of the time-division multiplex frame MR is assigned to the fourth driver stage D4.

[0195] Furthermore, Fig. 12 illustrates that a holding capacitor 114 is connected between node K9, which connects the amplifier 110 of the respective driver stage D1 and the respective input-side switch S4, and ground. The holding capacitor 114 is designed to maintain the level of the provided time-division multiplex control signal V5 in the open state of the associated input-side switch S4.

[0196] Fig. 13 shows a schematic block diagram of a ninth embodiment of a control device 100 for controlling a number of actuators 200 for actuating optical elements 310 of an optical system 300.

[0197] The ninth embodiment according to Fig. 13 is based on the eighth embodiment according to Fig. 12 and differs from it in the design of the amplifier 110. In the ninth embodiment according to Fig. 13, the amplifier 110 is designed as a class-A amplifier comprising an n-channel transistor 115. A capacitor 116 is connected between the gate terminal and the drain terminal of the n-channel transistor 115. The capacitor 116 serves as a high-voltage compensation capacitor. A current source 117 is connected between the input node Kl, which provides the supply voltage VI, and the drain terminal of the n-channel transistor 115.

[0198] Furthermore, Fig. 14 shows a schematic block diagram of a tenth embodiment of a control device 100 for controlling a plurality N of actuators 200 for actuating optical elements 310 of an optical system 300. The tenth embodiment according to Fig. 14 is based on the eighth embodiment according to Fig. 12 and differs from it in the design of the buffer 500. According to Fig. 14, the buffer 500 has a source-follower circuit 530. The source-follower circuit 530 preferably comprises a plurality of high-voltage transistors 540, 550. Without limiting the generality, the source-follower circuit 530 of Fig. 14 has two high-voltage transistors, in particular an n-channel transistor 540 and a p-channel transistor 550. The n-channel transistor 540 and the p-channel transistor 550 are connected between the input node Kl and the output node K10.The gate terminal of the n-channel transistor 540 is connected to the control node K2, to which the actuator 200 is coupled.

[0199] Furthermore, as illustrated in Fig. 14, an additional current source 560 can be connected between the input node Kl and the transistors 540, 550. This additional current source 560 can be used to reduce noise and / or adjust performance.

[0200] Figure 15 shows a schematic block diagram of an eleventh embodiment of a control device 100 for controlling a plurality N of actuators 200 for actuating optical elements 310 of an optical system 300. The eleventh embodiment according to Figure 15 is based on the tenth embodiment according to Figure 14 and includes all its features. Furthermore, the control device 100 according to Figure 15 has an additional current source 570, which is connected between the output node K10 of the buffer 500 and the output switch S3 of the respective driver stage D1. The current source 570 serves to charge the capacitors C1 and C2 in a controlled manner. This reduces the disturbances at node C1 and node C2.

[0201] Fig. 16 shows a schematic block diagram of a twelfth embodiment of a control device 100 for controlling a number of actuators 200 for actuating optical elements 310 of an optical system 300. The twelfth embodiment of the control device 100 according to Fig. 16 is based on the eighth embodiment according to Fig. 12 and differs from it in the provision of the time-division multiplex control signal V5 at node K8.

[0202] In the twelfth embodiment according to Fig. 16, the time-division multiplexing (TDM) control signal V5 is provided by the control unit 140, which is specifically designed as a digital control unit 140. The control unit 140 of Fig. 16 comprises a controller unit 142 and a digital-to-analog converter 143. The controller unit 142 can also be referred to as a controller. The digital-to-analog converter 143 can also be referred to as a DAC (digital-to-analog converter).

[0203] As shown in Fig. 12, the control device 100 according to Fig. 16 has a voltage divider 420, which, as shown in Fig. 16, can serve as a measuring circuit 150. The measuring circuit 150 is configured to provide an indicative measuring voltage VFB for the control voltage V2 supplied at the control node K2. An analog-to-digital converter 152 is connected downstream of the measuring circuit 150, which is configured to convert the measuring voltage VFB supplied by the measuring circuit 150 into a digital measuring voltage VFB. The digital controller unit 142 receives a digital set-point signal VIN and the digital measuring voltage VFB supplied by the analog-to-digital converter 152 as inputs. Depending on the received signals, the digital controller unit 142 provides a regulated digital time-division multiplexed control signal GZM as outputs.The digital-to-analog converter 143 receives the provided regulated digital time-division multiplex (TDM) control signal and converts it to provide a regulated analog time-division multiplex (TDM) control signal V5 at node K8. Specifically, the output of the controller unit 142 is an N-bit output, and the digital-to-analog converter 143 thus provides a high-resolution voltage, specifically with a pV resolution, for highly accurate voltage adjustment at capacitor 114 when switch S4 is closed.

[0204] Fig. 17 shows a schematic block diagram of a thirteenth embodiment of a control device 100 for controlling a plurality of actuators 200 for actuating optical elements 310 of an optical system 300, with N > 2.

[0205] The control device 100 of Fig. 17 comprises N driver stages D1-D4. Without limiting the generality, only one driver stage D1 is shown in detail in Fig. 17. Three further driver stages D2-D4 are indicated. A larger number results from the three points shown in Fig. 17. Each driver stage D1-D4 is assigned to one of the N actuators 200, and furthermore, it is assigned to a specific time slot (see, for example, Z1, Z2 in Fig. 7) of a time-division multiplexed control signal V5.

[0206] Each driver stage D1-D4 comprises an amplifier 110. The amplifier 110 is configured to amplify a signal component of the assigned time slot of the time-division multiplexing (TDM) control signal V5 to a control voltage V2 for controlling the assigned actuator 200 and to provide this signal at a control node K2 that can be coupled to the actuator 200. A hold capacitor 114 is connected between node K9, which connects the amplifier 110 of each driver stage D1-D4, and ground, to maintain a specific level of the provided signal component of the TDM control signal V5 when the assigned input switch S4 is open. The hold capacitor 114 is specifically a low-voltage (LV) capacitor.

[0207] Furthermore, the control device 100 of Fig. 17 has a plurality M, with M > 2, of current sources 111, 112, comprising at least one charge-controlled current source 112. Without loss of generality, M = 2 in Fig. 17, and both current sources 111, 112 are configured as charge-controlled current sources. The two current sources 111, 112 are configured to provide predictive charge packets to set a specific charge on the holding capacitor 114, which represents the specific level of the signal component of the time-multiplexed control signal V5.

[0208] As shown in Fig. 17, the two current sources 111, 112 are connected between a low voltage, in this case the supply voltage VDD, and ground. The node K8 is connected to the center tap between the two current sources 111, 112, and the N driver stages D1-D4 are connected to this node. As Fig. 17 thus shows, the charge-controlled current sources 111, 112 are operated in the low-voltage range VDD and can be implemented with a small footprint. The holding capacitor 114 is, as explained, a low-voltage capacitor and, unlike a high-voltage capacitor, exhibits a particularly high capacitance density.

[0209] The control unit 114 is provided in Fig. 17 for controlling the charge-controlled current sources 111, 112 with a respective control signal AS1, AS2. The control signals AS1, AS2 are designed in particular as predetermined current pulses in order to set the charge on the holding capacitor 114, which is determined as a function of the specific level of the signal component of the time-division multiplex control signal V5.

[0210] As further illustrated in Fig. 17, the control device 100 has a control loop 400. Its feedback branch 410 includes a voltage divider 420, which, as further shown in Fig. 17, can function as a measuring circuit 150. The voltage divider 420 can be selectively connected to one of the N driver stages D1-D4 based on the time-division multiplexing scheme Z (see, for example, Fig. 7). The voltage divider 420 is configured to provide a measuring voltage VFB that is indicative of the drive voltage V2 supplied at the control node K2 of the selected N driver stages D1-D4. The control unit 140 can then be configured to generate the control signals AS1, AS2 for the charge-controlled current sources 111, 112 using the provided measuring voltage VFB.

[0211] As further shown in Fig. 17, an output-side switch S3 is provided at the output of the respective driver stage D1-D4, wherein the output-side switches S3 of the driver stages D1-D4 are coupled to an input node K6 of the voltage divider 420.

[0212] Each driver stage D1-D4 has a buffer 500 coupled between the drive node K2 and the input node K6 of the voltage divider 420. The buffer 500 is configured to decouple the drive node K2 from the input node K6 of the voltage divider 420. An output node K10, connected to the output of the buffer 500, is connected to ground via an adjustable current source 510. The adjustable current source 510 allows for two functions: a low current setting for energy conservation and a slightly higher current setting to create greater bandwidth.

[0213] Although the present invention has been described using exemplary embodiments, it can be modified in many ways.

[0214] REFERENCE MARK LIST

[0215] 1 Projection exposure system

[0216] 2 lighting systems

[0217] 3 light source

[0218] 4 Lighting optics

[0219] 5 object field

[0220] 6 Object level

[0221] 7 reticles

[0222] 8 label holders

[0223] 9 Reticle displacement drive

[0224] 10 Projection optics

[0225] 11 Image field

[0226] 12 Image plane

[0227] 13 wafers

[0228] 14 wafer holders

[0229] 15 wafer transfer drive

[0230] 16 Lighting radiation

[0231] 17 Collector

[0232] 18 Intermediate focus plane

[0233] 19 deflecting mirrors

[0234] 20 first faceted mirror

[0235] 21 first facet

[0236] 22 second faceted mirror

[0237] 23 second facet

[0238] 100 Control device

[0239] 110 amplifiers

[0240] 111 Power source

[0241] 112 Power source

[0242] 113 Holding capacitor 114 Holding capacitor

[0243] 115 n-channel transistor

[0244] 116 Capacitor

[0245] 117 Power source

[0246] 120 buffers

[0247] 121 Source-Follower Circuit

[0248] 122 n-channel transistor

[0249] 123 p-channel transistor

[0250] 124 Power source

[0251] 125 Power source

[0252] 126 Power source

[0253] 130 Source-Follower Circuit

[0254] 131 transistor

[0255] 132 Diode

[0256] 133 Diode

[0257] 134 Diode

[0258] 135 Diode

[0259] 140 control unit

[0260] 141 Calibration and / or test unit

[0261] 142 government unit

[0262] 143 Digital-to-Analog Converters

[0263] 150 measuring circuit

[0264] 152 Analog-to-Digital Converters

[0265] 200 actuator

[0266] 210 Resistor

[0267] 300 optical system

[0268] 310 optical element

[0269] 400 control loop

[0270] 410 Feedback branch

[0271] 420 voltage dividers 500 buffers

[0272] 510 power source

[0273] 520 diode

[0274] 530 Source-Follower Circuit

[0275] 540 n-channel transistor

[0276] 550 p-channel transistor

[0277] 600 digital-to-analog converters

[0278] 700 operational amplifiers

[0279] 1101 Procedure step

[0280] 1102 Procedure step

[0281] 1103 Procedure step

[0282] AS control signal

[0283] AS 1 control signal

[0284] AS2 control signal

[0285] DL driver stage

[0286] D2 driver stage

[0287] D3 driver stage

[0288] D4 driver stage

[0289] GND Ground

[0290] GZM controlled time-division multiplex control signal

[0291] Kl Entrance Node

[0292] K2 control node

[0293] K3 Exit Node

[0294] K4 Amplifier Node

[0295] K5 Amplifier Node

[0296] K6 Input node of the voltage section

[0297] K7 first node

[0298] K8 second node

[0299] K9 node K10 exit node

[0300] MA central tap

[0301] MR Multiplex frame

[0302] 51 switches

[0303] 52 switches

[0304] 53 switches

[0305] 54 switches

[0306] TI circuit section

[0307] T2 circuit section

[0308] VI Supply voltage

[0309] V2 control voltage

[0310] V3 output voltage

[0311] V4 voltage

[0312] V5 Time Division Multiplex Control Signal

[0313] VDD supply voltage

[0314] VFB measuring voltage

[0315] VIN digital set point signal

[0316] Z time-division multiplex scheme

[0317] Z 1 Time slot

[0318] Z2 Time slot

[0319] ZM Time Division Multiplex Signal

Claims

PATENT CLAIMS 1. Control device (100) for controlling a number N, with N > 1, of actuators (200) for actuating N optical elements (310) of an optical system (300), comprising: a control node (K2) coupling to the actuator (200) for providing a control voltage (V2) for the actuator (200), an amplifier (110) configured to receive a supply voltage (V1) provided at an input node (K1) and to provide an output voltage (V3) at an output node (K3), wherein the amplifier (110) comprises a plurality M, with M > 2, of current sources (111, 112) comprising at least one charge-controlled current source (112) and a holding capacitor (113) for maintaining the level of the provided output voltage (V3), and a connection between the output node (K3) and the control node (K2). coupled buffer (120), which is designed toto decouple the control node (K2) from the output node (K3) and to provide the control voltage (V2) for the actuator (200) based on the level of the output voltage (V3) of the holding capacitor (113).

2. Control device according to claim 1, wherein the holding capacitor (113) is coupled between the output node (K3) of the amplifier (110) and ground (GND), wherein the current sources (111, 112) of the amplifier (110) are configured to set a charge on the holding capacitor (113) depending on a desired level of the control voltage (V2).

3. Control device according to claim 1 or 2, wherein the amplifier (110) comprises a constant current source (111) coupled between the input node (Kl) and the output node (K3) and a a controlled current source (112) coupled to the output node (K3) and ground (GND), in particular a charge-controlled current source (112), especially with M=2.

4. Control device according to claim 1 or 2, wherein the amplifier (110) comprises a controlled current source (111), in particular a charge-controlled current source (111), coupled between the input node (K1) and the output node (K3), and a controlled current source (112), in particular a charge-controlled current source (112), coupled between the output node (K3) and ground (GND), in particular with M=2.

5. Control device according to one of claims 1 to 4, wherein the buffer (120) comprises a source-follower circuit (130) with at least one transistor (131), in particular a field-effect transistor.

6. Control device according to claim 5, wherein the source follower circuit (130) has a plurality of protection diodes (132-135) coupled between the gate terminal of the transistor (131) and the source terminal of the transistor (131).

7. Control device according to one of claims 1 to 6, wherein the amplifier (110) comprises at least three current sources (111, 112), with M > 3.

8. Control device according to one of claims 1 to 7, wherein the control device (100) is configured to control a plurality N, with N > 2, of actuators (200) by means of a time-division multiplex signal (ZM) determined by a time-division multiplex scheme (Z).

9. Control device according to claim 8, wherein the amplifier (110) for controlling the plurality N of actuators (200) comprises the plurality M of current sources (111, 112), N output nodes (K3) and N holding capacitors (113), and wherein N buffers (120) and N control nodes (K2) are provided, wherein each of the N actuators (200) is assigned a circuit section (TI, T2) with one of the N output nodes (K3), one of the N buffers (120) and one of the N control nodes (K2).

10. Control device according to claim 9, wherein the amplifier (110) has a first current source (111) which is connected between the input node (Kl) and a first amplifier node (K4), and a second current source (112) which is connected between a second amplifier node (K5) and ground (GND), wherein the respective circuit part (TI, T2) assigned to one of the actuators (200) can be connected to the first amplifier node (K4) via a first switch (Sl) and to the second amplifier node (K5) via a second switch (S2) for selectively connecting the circuit part (TI, T2) to the current sources (111, 112) of the amplifier (110).

11. Control device according to claim 10, wherein a control unit (140) is provided which is configured to control the first and second switches (S1, S2) of the N circuit parts (TI, T2) for the N actuators (200) according to the time-division multiplexing scheme (Z).

12. Control device according to one of claims 1 to 11, comprising a measuring circuit (150) that can be coupled to the control node (K2) for measuring the control voltage (V2) provided at the control node (K2) and a calibration and / or test unit (141) that can be coupled to the measuring circuit (150) and which is configured to calibrate and / or test at least a part of the control device (100) based on the control voltage (V2) measured by the measuring circuit (150).

13. Control device according to claim 12, wherein the buffer (120) comprises a source-follower circuit (121) which has an n-channel transistor (122) and a p-channel transistor (123) which are connected between the input node (K1) and the control node (K2) of the control device (100), wherein the gate terminal of the n-channel transistor (122) is connected to the output node (K3) of the amplifier (110).

14. Control device according to one of claims 1 to 13, wherein the amplifier (110) is designed as a class-A amplifier which has an n-channel transistor (115), wherein a capacitor (116) is coupled between the gate terminal and the drain terminal of the n-channel transistor (115), wherein in particular a current source (117) is coupled between the input node (Kl) for providing the supply voltage (Vl) and the drain terminal of the n-channel transistor (115).

15. Control device according to one of claims 1 to 11, comprising a measuring circuit (150) that can be coupled to the control node (K2) for providing a measuring voltage (VEB) indicative of the control voltage (V2) provided at the control node (K2), and an analog-to-digital converter (152) connected downstream of the measuring circuit (150), which is configured to convert the measuring voltage (VEB) provided by the measuring circuit (150) into a digital measuring voltage (VEB), wherein the control unit (140) comprises a digital control unit (142) and a digital-to-analog converter (143) connected downstream of the digital control unit (142), wherein the digital control unit (142) is configured to output a controlled digital time-division multiplex (TDM) control signal (GZM) based on a digital set-point signal (VIN) and the digital measuring voltage (VEB). to provide a digital-to-analog converter (143), wherein the digital-to-analog converter (143) is used for this purpose is set up to convert the regulated digital time-division multiplex (TDM) control signal into a regulated analog time-division multiplex (V5) control signal.

16. Control device (100) for controlling a plurality N of actuators (200) for actuating N optical elements (310) of an optical system (300), comprising: N driver stages (D1-D4) controlled by a time-division multiplex signal (ZMD, ZMA) determined by a time-division multiplexing scheme (Z) scheme (Z), wherein each driver stage (D1-D4) of the N driver stages (D1-D4) is assigned to one of the N actuators (200) and a specific time slot of the time-division multiplexing signal (ZMD, ZMA) and has an amplifier (110) which is configured to amplify a signal component of the assigned time slot of the time-division multiplexing signal (ZMD, ZMA) to a drive voltage (V2) for controlling the assigned actuator (200) and to provide this at a control node (K2) that can be coupled to the actuator (200), and a control loop (400) whose feedback branch (410) has a voltage divider (420) which is selectively connected to one of the N driver stages based on the time-division multiplexing scheme (Z). (D1-D4) is connectable,wherein each driver stage (D1-D4) has a buffer (500) coupled between the control node (K2) and an input node (K6) of the voltage divider (420), which is configured to decouple the control node (K2) from the input node (K6) of the voltage divider (420).

17. Control device according to claim 16, wherein the voltage divider (420) is configured as a capacitive voltage divider or as a resistive voltage divider or as a parallel connection of a capacitive voltage divider and a resistive voltage divider.

18. Control device according to claim 16 or 17, wherein an output-side switch (S3) is provided at the output of the respective driver stage (D1-D4), wherein the output-side switches (S3) of the driver stages (D1-D4) are coupled to the input node (K6) of the voltage divider (420).

19. Control device according to one of claims 16 to 18, wherein the control device (100) comprises: a D / A converter (600) configured to convert an input-side digital representation (ZMD) of the time-division multiplex signal (ZMD, ZMA) into an analog time-division multiplex signal (ZMA) and to provide the analog time-division multiplex signal (ZMA) at a first node (K7) on the output side, and an operational amplifier (700) whose inverting input is coupled to the first node (K7) and whose non-inverting input is coupled to the center tap (MA) of the voltage divider (420) and which is configured to generate a zero difference between the analog time-division multiplex signal (ZMA) applied to the non-inverting input and a voltage (V4) provided via the center tap (MA) and, depending thereon, to output an amplified time-division multiplex control signal. (V5) to be provided at a second node (K8).

20. Control device according to claim 19, wherein the N driver stages (D1-D4) are connected in parallel between the second node (K8) and the input node (K6) of the voltage conductor (420), wherein an input-side switch (S4) assigned to each driver stage (D1-D4) is arranged between the second node (K8) and the amplifier (110) of the respective driver stage (D1-D4) for selectively connecting the driver stage (D1-D4) to the output of the operational amplifier (700).

21. Control device according to claim 20, wherein a control unit (140) is provided which is configured to the Switches (S3, S4) of the driver stages (D1-D4) are to be controlled according to the time-division multiplex scheme (Z).

22. Control device according to claim 20 or 21, wherein a holding capacitor (114) is connected between the node (K9) connecting the amplifier (110) of the respective driver stage (D1-D4) and the respective associated input-side switch (S4) and ground to hold the level of the provided time-division multiplex control signal (V5) in the open state of the associated input-side switch (S4).

23. Control device according to one of claims 16 to 22, wherein the buffer (500) comprises a source-follower circuit (530) with at least one transistor, in particular a field-effect transistor.

24. Control device according to claim 23, wherein an output node (K10) connected to the output of the buffer (500) is connected to ground via an adjustable current source (510) and is connected to the input node (K6) of the voltage part (420) via the output-side switch (S3) and a downstream diode (520).

25. Control device according to claim 23 or 24, wherein the source follower circuit (530) comprises a plurality of high-voltage transistors (540, 550).

26. Control device according to one of claims 23 to 25, wherein the source-follower circuit (530) comprises an n-channel transistor (540) and a p-channel transistor (550) which are connected between the input node (K1) of the control device (100) and the output node (K10) of the buffer (500) are interconnected, with the gate terminal of the n-channel transistor (540) being connected to the control node (K2).

27. Control device according to claim 26, wherein a further current source (570) is connected between the output node (K10) of the buffer (500) and the output-side switch (S3).

28. Control device (100) for controlling a plurality N of actuators (200) for actuating N optical elements (310) of an optical system (300), comprising: N driver stages (D1-D4) controlled by a time-division multiplex control signal (V5) determined by a time-division multiplex control signal (Z), wherein each driver stage (D1-D4) of the N driver stages (D1-D4) is assigned to one of the N actuators (200) and a specific time slot of the time-division multiplex control signal (V5) and has an amplifier (110) which is configured to amplify a signal component of the assigned time slot of the time-division multiplex control signal (V5) to a control voltage (V2) for controlling the assigned actuator (200) and to provide this at a control node (K2) that can be coupled to the actuator (200),wherein a holding capacitor (114) is connected between the node (K9) connecting the amplifier (110) of the respective driver stage (D1-D4) and the respective associated input-side switch (S4) and ground, for maintaining a specific level of the provided signal component of the time-division multiplexing control signal (V5) in the open state of the associated input-side switch (S4), and a plurality M, with M > 2, of current sources (111, 112) comprising at least one charge-controlled current source (112) which are configured to provide predictive charge packets to set a specific charge on the holding capacitor (114) which represents the specific level of the signal component of the time-division multiplexing control signal (V5).

29. Control device according to claim 28, wherein a control unit (140) is provided which is configured to control the current sources (111, 112) with a respective control signal (AS1, AS2), wherein the control signals (AS1, AS2) are in particular designed as such predetermined current pulses in order to set the charge on the holding capacitor (114) as a function of the specific level of the signal component of the time-division multiplex control signal (V5).

30. Control device according to claim 29, wherein the control device (100) comprises a control loop (400) whose feedback branch (410) has a voltage divider (420) which is selectively connectable to one of the N driver stages (D1-D4) based on the time-division multiplexing scheme (Z) and which is configured to provide an indicative measurement voltage (VFB) for the control voltage (V2) provided at the control node (K2) of the selected N driver stages (D1-D4), wherein the control unit (140) is configured to generate the control signals (AS1, AS2) for the current sources (111, 112) using the provided measurement voltage (VFB).

31. Control device according to claim 30, wherein an output-side switch (S3) is provided at the output of the respective driver stage (D1-D4), wherein the output-side switches (S3) of the driver stages (D1-D4) are coupled to an input node (K6) of the voltage divider (420).

32. Control device according to claim 30 or 31, wherein the respective driver stage (D1-D4) has a buffer (500) coupled between the control node (K2) and the input node (K6) of the voltage divider (420), which is configured to decouple the control node (K2) from the input node (K6) of the voltage divider (420).

33. Control device according to one of claims 28 to 32, wherein the holding capacitor (114) is designed as an LV capacitor.

34. Optical system (300) with a number of actuable optical elements (310), wherein each of the actuable optical elements (310) is assigned an actuator (200), wherein each actuator (200) is assigned a control device (100) for controlling the actuator (200) according to one of claims 1 to 33.

35. Lithography system (1) with an optical system (300) according to claim 34.

36. Method for operating a control device (100) according to any one of claims 1 to 15, comprising: a) charging (1101) the holding capacitor (113) to set a desired level of the output voltage (V3) of the amplifier (110) by the M current sources (111, 112) using a plurality of current pulses, b) measuring (1102) an indicative measurement voltage (VFB) for the output voltage (V3) provided at the output node (K3), and c) calibrating or deriving (1103) at least one parameter of the control device (100) based on a comparison of the measured measurement voltage (VFB) and the desired level of the output voltage (V3).

37. Method according to claim 36, wherein the current pulses for controlling the M current sources (111, 112) are generated by a control unit (140) based on a constant current provided by a reference current source.

38. Method according to claim 37, where step c) (1103) contains: Determining a voltage difference between the desired output voltage level (V3) and the measured measurement voltage (VFB), and Calibrating a target value for the constant current strength of the current to be provided by the reference current source to generate the current pulses using the determined voltage difference.

39. Method according to claim 37, wherein step c) comprises (1103): Determining a voltage difference between the desired level of the output voltage (V3) and the measured measurement voltage (VFB), Determining a temperature-dependent setpoint for the constant current of the current to be supplied by the reference current source for generating the current pulses using the determined voltage difference, and Determining a current ambient temperature of the reference current source based on the determined temperature-dependent setpoint for the constant current of the reference current source, the constant current used in step a) by the reference current source to charge the holding capacitor (113) and a temperature profile specific to the reference current source which specifies the current of the reference current source as a function of the ambient temperature.

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