Integrated metal and metal nitride deposition

Abstract

Metal-containing films and metal nitride films are deposited without an intervening vacuum break. In some embodiments, the films are deposited in the same chamber. In some embodiments, the metal nitride films are titanium nitride films. In the same or other embodiments, the metal-containing films may be molybdenum-containing films, such as molybdenum silicide films. Examples of applications include buried wordline (bWL) and 2D and 3D DRAM, including bottom and top electrodes. In some embodiments, the methods may be used for source / drain contacts.

Description

INTEGRATED METAL AND METAL NITRIDE DEPOSITIONINCORPORATION BY REFERENCE

[0000] A PCT Request Form is filed concurrently with this specification as part of the present application. Each application that the present application claims benefit of or priority to as identified in the concurrently filed PCT Request Form is incorporated by reference herein in its entirety and for all purposes.BACKGROUND

[0001] In semiconductor fabrication, metal nitride films may be deposited for various reasons including as barrier layers. The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.SUMMARY

[0002] One aspect of the disclosure relates to a method including: providing a substrate including a feature having a silicon feature bottom and feature sidewalls to a substrate processing tool under vacuum; depositing a molybdenum-containing layer selectively on the silicon feature bottom to form a molybdenum silicide layer in the substrate processing tool; and depositing a titanium nitride layer conformally in the feature in the substrate processing tool.

[0003] In some embodiments, the feature is one of a plurality of features oriented horizontally with respect to the substrate. In some embodiments, the depositing a molybdenum-containing layer selectively on the silicon feature bottom includes introducing pulses of a molybdenum halide to selectively deposit the molybdenum-containing layer by thermal atomic layer deposition (ALD). In some embodiments, the thermal ALD deposition includes reacting molybdenum halide with hydrogen (H2). In some embodiments, the molar ratio of the Hi to the molybdenum halide is at least 10:1.

[0004] In some embodiments, depositing the molybdenum-containing layer selectively on the silicon feature bottom to form a molybdenum silicide layer is performed in a first chamber of the substrate processing tool and depositing a titanium nitride layer conformally in the feature is performed in a second chamber of the substrate processing tool. In some embodiments, the further includes transferring the substrate from a first chamber to a second chamber of the substrateprocessing tool using a transfer chamber.

[0005] In some embodiments, apressure in the transfer chamber is no more than 10’6Torr during transfer. In some embodiments, a partial pressure of water in the transfer chamber is no more than IO'7Torr during transfer.

[0006] In some embodiments, the method further includes performing a nitridation surface treatment on the molybdenum silicide layer prior to depositing titanium nitride. In some embodiments, the method further includes exposing the silicon feature bottom to a chemistry to remove native oxide from the silicon feature bottom.

[0007] In some embodiments, depositing a molybdenum-containing layer selectively on the silicon feature bottom to form a molybdenum silicide and depositing a titanium nitride layer conformally in the feature are performed in the same chamber of the substrate processing tool.

[0008] Another aspect of the disclosure relates to a method including providing a substrate including a feature having a feature bottom and feature sidewalls to a substrate processing tool under vacuum; depositing a metal-containing layer in the feature; and depositing a metal nitride layer on the metal-containing layer.

[0009] In some embodiments, the feature bottom includes an oxidized semiconductor surface and the method further including removing oxide from the semiconductor surface in the substrate processing tool. In some embodiments, the metal-containing layer is a molybdenum-containing layer. In some embodiments, the feature bottom includes a silicon surface and the molybdenum is deposited on the silicon surface to form a molybdenum silicide.

[0010] In some embodiments, the metal nitride layer is a titanium nitride layer. In some embodiments depositing a metal-containing layer and depositing a metal nitride layer are performed in different chambers of the substrate processing tool.

[0011] In some embodiments, depositing a metal-containing layer and depositing a metal nitride layer are performed in different stations of a multi-station chamber. In some embodiments, the metal nitride layer further includes silicon. In some embodiments, the metal nitride layer conformally coats a recessed feature.

[0012] These and other aspects of the disclosure are described below with reference to the figures.BRIEF DESCRIPTION OF DRAWINGS

[0013] Figures 1 A and IB are process diagram showing certain operations in a method according to various embodiments.

[0014] Figure 2 is a process diagram showing an example of titanium nitride deposition by a thermal atomic layer deposition (ALD) process.

[0015] Figure 3 is a process diagram showing an example of titanium nitride deposition by a plasma-enhanced atomic layer deposition (PEALD) process.

[0016] Figure 4 is a process diagram showing a method of depositing a silicon-containing metal nitride layer.

[0017] Figures 5 and 6 are process diagram showing examples of method of depositing a metal layer.

[0018] Figure 7 is a process flow illustrating a method to form a metal silicide ohmic contact with crystalline silicon from a metal layer according to some embodiments.

[0019] Figures 8A-8D illustrates operations in a process of forming an ohmic contact and capping layer for a 3D DRAM structure.

[0020] Figure 8E is a process flow diagram illustrating operations in certain embodiments of the integration scheme illustrated in Figures 8A-8D.

[0021] Figures 9A-9C show examples of a process of metallization in a vertically oriented feature according to various embodiments.

[0022] Figures 10A-10D show another example of a metallization process in a vertically oriented feature.

[0023] Figure 11 A and Figure 1 IB show examples of substrate processing tools.

[0024] Figure 12 depicts a schematic illustration of an embodiment of a process station.DESCRIPTION

[0025] Provided are methods of depositing metal nitride films on metal-containing films. The metal-containing films may be metallic (pure) metal films or metal compound films. In some embodiments, the metal-containing films and metal nitride films are deposited without an intervening vacuum break. In some embodiments, the films are deposited in the same chamber. In some embodiments, the metal nitride films are titanium nitride films. In the same or other embodiments, the metal-containing films may be molybdenum-containing films, such as molybdenum silicide films. Examples of applications include buried wordline (bWL) and 2D and 3D DRAM, including bottom and top electrodes. In some embodiments, the methods may be used for source / drain contacts.

[0026] Figure 1A is a process diagram showing certain operations in a method according tovarious embodiments. First, a substrate is provided to a processing tool in an operation 101. The substrate may be a silicon wafer, e.g., a 200-mm wafer, a 300-mm wafer, or a 450-mm wafer, including wafers having one or more layers of material, such as dielectric, conducting, or semiconducting material deposited thereon. In various embodiments, the substrate is patterned. A patterned substrate may have “features” such as pillars, poles, trenches, via or contact holes, which may be characterized by one or more of narrow and / or re-entrant openings, constrictions within the feature, and high aspect ratios. The feature(s) may be formed in one or more of the abovedescribed layers. One example of a feature is a pillar or pole in a semiconductor substrate or a layer on the substrate. Another example is a trench in a substrate or layer.

[0027] In some embodiments, the feature(s) such as a pillar may have an aspect ratio of at least about 1 :1, at least about 2:1, at least about 4:1, at least about 6:1, at least about 10:1, or higher. The feature(s) may also have a dimension near the opening, e.g., an opening diameter or line width of between about 10 nm to 500 nm, for example between about 25 nm and about 300 nm. Disclosed methods may be performed on substrates with feature(s) having an opening less than about 150 nm. A via, trench or other recessed feature may be referred to as an unfilled feature or a feature. According to various embodiments, the feature profile may narrow gradually and / or include an overhang at the feature opening. A re-entrant profile is one that narrows from the bottom, closed end, or interior of the feature to the feature opening. A re-entrant profile may be generated by asymmetric etching kinetics during patterning and / or the overhang due to non- conformal film step coverage in the previous film deposition. In various examples, the feature may have a width smaller in the opening at the top of the feature than the width of the bottom of the feature. The feature may be a trench or via that is formed in a dielectric layer.

[0028] The surface on which the metal-containing layer is to be deposited may be a dielectric layer as described above, a semiconductor material, or a conductive material. Examples of dielectric materials include oxides, such as silicon oxide (SiOi) and aluminum oxide (A12O3); nitrides, such as silicon nitride (SiN); carbides, such as nitrogen-doped silicon carbide (NDC) and oxygen-doped silicon carbide (ODC); and low K dielectrics, such as carbon-doped SiO . Examples of underlying layers include metals, metal silicides, and semiconductors. Examples of metals include Co, Ru, copper (Cu), W, Mo, nickel (Ni), iridium (Ir), rhodium (Rh), tantalum (Ta), and titanium (Ti). Examples of metal silicides include TiSix, nickel silicide (NiSix), molybdenum silicide (MoSix), cobalt silicide (CoSix), platinum silicide (PtSix), ruthenium silicide (RuSix), and nickel platinum silicide (NiPtySix). Examples of semiconductors include silicon (Si), silicon germanium (SiGe), and gallium arsenide (GaAs) with or without semiconductor dopants such as carbon (C), arsenic (As), boron (B), phosphorus (P), tin (Sn), and antimony (Sb).

[0029] A vertically-oriented feature may have sidewall surfaces and a bottom surface. In some embodiments, the sidewall surfaces may be the same material as the bottom surface. In some embodiments, the sidewall surfaces is a different material than the material of the bottom surface.

[0030] Performing operation 101 can involve transferring the substrate to the process tool from another tool or from storage using a loadlock. In some embodiments, the substrate is present in the tool, e.g., for one or more prior processing operations and performing operation 101 can involve maintaining the substrate in the tool.

[0031] Returning to Figure 1A, a metal-containing layer is formed in an operation 103. Formation of a metal-containing layer generally involves deposition of a metal-containing layer from a metal-containing precursor. In some embodiments, that results in formation of the layer. In some embodiments, operation 103 involves deposition on a surface to form a compound film. For example, deposition of a metal on a silicon surface may form a metal silicide. In some embodiments, a deposition operation may be followed by one or more treatment operations, e.g., form a metal compound film.

[0032] In embodiments in which deposition of the metal-containing layer is in a feature that includes two or more material types, the deposition may be selective or non-selective. Non- selective deposition refers to deposition that occurs to roughly the same extent on all surfaces (e.g., on both dielectric and conductive surfaces.) Selective deposition refers to deposition that occurs preferentially one surface with respect to another.

[0033] A metal nitride layer is deposited on the metal-containing layer in an operation 105. Like operation 103, operation 105 involves deposition from a metal-containing precursor. The metalcontaining precursor may or may not include nitrogen and may be some or all of the source of nitrogen. In some embodiments, the metal nitride is deposited from a metal halide and a nitrogencontaining reactant. Nitrogen-containing reactants can include, but not limited to, nitrogen (N2), ammonia (NH3), and hydrazine (N2H4). The deposition may be selective or non-selective if there are two or more material types (e.g., a dielectric and the metal-containing surface).

[0034] Depositions in operations 103 and 105 may be independently thermal or plasma-activated operations. In some embodiments, the process depicted in Figure 1A is a multi-temperature process with operation 103 and operation 105 occurring at different temperatures in the same processing tool. As described further below, in some embodiments, or both of operations 103 and 105 is preceded by a preclean.

[0035] Operations 103 and 105 are performed in the same tool without an air break and under a common vacuum environment. According to various embodiments, operations 103 and 105 mayinvolve chemical vapor deposition (CVD) or atomic layer deposition (ALD) reactions. ALD is a technique that deposits thin layers of material using sequential self-limiting reactions. ALD processes use surface-mediated deposition reactions to deposit films on a layer by-layer basis in cycles. As an example, an ALD cycle may include the following operations: (i) delivery / adsorption of a precursor, (ii) purging of precursor from the chamber, (iii) delivery of a second reactant and optionally ignite plasma, and (iv) purging of byproducts from the chamber. The reaction between the second reactant and the adsorbed precursor to form a film on the surface of a substrate affects the film composition and properties, such as nonuniformity, stress, wet etch rate, dry etch rate, electrical properties (e.g., breakdown voltage and leakage current), etc. In ALD deposition of metal films, this reaction involves reacting oxygen plasma with carbon and nitrogen to form a gaseous species; oxidizing metal to metal oxide; eliminating trace carbon, nitrogen, and hydrogen impurities; and increasing bonding and densification of the fdm.

[0036] Unlike CVD techniques that involve gas-phase deposition reactions, ALD processes use surface mediated deposition reactions to deposit films on a layer-by-layer basis. In one example of an ALD process, a substrate surface that includes a population of surface- active sites is exposed to a gas phase distribution of a first precursor, such as a metal-containing precursor, in a dose provided to a chamber housing a substrate. Molecules of this first precursor are adsorbed onto the substrate surface. When a compound is described as being adsorbed onto the substrate surface, the adsorbed layer may include the compound as well as derivatives of the compound. For example, an adsorbed layer of a metal-containing precursor may include the metal-containing precursor as well as derivatives of the metal-containing precursor. After a first precursor dose, the chamber is then evacuated to remove most or all of first precursor remaining in gas phase so that mostly or only the adsorbed species remain. In some implementations, the chamber may not be fully evacuated. For example, the reactor may be evacuated such that the partial pressure of the first precursor in gas phase is sufficiently low to mitigate a reaction. A second reactant, such as an nitrogen-containing gas, is introduced to the chamber so that some of these molecules react with the first precursor adsorbed on the surface. In some processes, the second precursor reacts immediately with the adsorbed first precursor. In other embodiments, the second reactant reacts only after a source of activation is applied temporally. The chamber may then be evacuated again to remove unbound second reactant molecules. As described above, in some embodiments the chamber may not be completely evacuated. Additional ALD cycles may be used to build film thickness. In some implementations, the ALD methods include plasma activation.

[0037] Also provided herein are methods of depositing metal nitride layers on other surfaces. Figure IB is a process diagram showing certain operations in a method according to variousembodiments. First, a substrate is provided to a processing tool in an operation 107. This may be performed as described above with respect to operation 101 of Figure 1A. The surface on which the metal nitride is to be deposited depends on the particular application. For example, in a buried wordline (bWL) application, a metal nitride layer may be deposited on a gate oxide layer. A metal nitride layer is then deposited on substrate in an operation 109. Like operation 103 of Figure 1 A, operation 105 involves deposition from a metal-containing precursor. The metal-containing precursor may or may not include nitrogen and may be some or all of the source of nitrogen. In some embodiments, the metal nitride is deposited from a metal halide and a nitrogen-containing reactant.

[0038] A metal-containing layer is deposited on the metal nitride layer in an operation 111. This involves deposition of a metal-containing layer from a metal-containing precursor. The deposition may be selective or non-selective. The depositions in operations 109 and 111 may be independently thermal or plasma-activated operations. In some embodiments, the process depicted in Figure IB is a multi-temperature process with operation 19 and operation 111 occurring at different temperatures in the same processing tool. As described further below, in some embodiments, or both of operations 109 and 111 is preceded by a preclean.

[0039] The metal nitride deposition and metal-containing layer deposition are performed in the same processing tool without air break. According to various embodiments, operations 109 and 111 in Figure IB may involve chemical vapor deposition (CVD) or atomic layer deposition (ALD) reactions.Titanium nitride deposition

[0040] In some embodiments, the metal nitride is titanium nitride. According to various embodiments, titanium nitride is deposited from a titanium-containing precursor. Examples of titanium-containing precursors include titanium halides including titanium chlorides, titanium fluorides, titanium bromides, and titanium iodides. In particular embodiments, titanium tetrachloride (TiCL) may be used. Other examples of titanium halides include titanium tetrabromide (TiBrA, titanium tetrafluoride (TiF4), titanium tetraioide (TiL). Further examples include TiB TiCh, TiL, Ti Bn, TiCL, and TiL. In some embodiments, the titanium-containing precursor is an inorganic compound with examples including the titanium halides listed. In some embodiments, organometallic compounds may be used with examples including tetrakisdiethylamidotitanium. In some embodiments in which the titanium-containing precursor includes nitrogen, a co-reactant may not necessarily be used. However, in some embodiments with these precursors and for non-nitrogen-containing precursors, a nitrogen-containing reactant reacts with the titanium-containing reactants to form titanium nitride. Examples of nitrogen-containing reactants include, but not limited to, nitrogen (N2), ammonia (NH3), and hydrazine (N2H4).

[0041] Figure 2 shows an example of titanium nitride deposition by a thermal atomic layer deposition (ALD) process. In the example of Figure 2, a substrate is exposed to a process gas including the titanium-containing precursor in an operation 201. In the first iteration of the process, the substrate includes the metal-containing surface on which the titanium nitride is to be deposited. A purge operation is then performed in an operation 203. An adsorbed layer of titanium-containing precursor remains, with the gas phase precursor removed. The substrate is then exposed to a nitrogen-containing reactant in an operation 205. The nitrogen-containing compound reacts with the adsorbed precursor to form a layer of titanium nitride. A purge operation is then performed in an operation 207. Operations 201-207 may then be repeated until the titanium nitride film is at a target thickness in an operation 209. Example substrate temperatures for thermal ALD of TiN are 300° to 500°C or 380°C to 450°C. Example chamber pressures are 1 to 10 Torr.

[0042] Modifications of the process described in Figure 2 can include exposing the substrate to the nitrogen-containing compound as the first operation in each cycle, followed by a purge, exposure to the titanium-containing compound, and purge. Further modifications can include each cycle forming less than a monolayer. This can be performed by limiting the amount of one or both reactants. In some embodiments, the ALD process may not be strictly self-limiting. For example, one or both of the purge operations may be omitted or shortened such that some gas-phase reactant remains and reacts in the gas phase. This can increase deposition rate. Further modifications can include repeating operation 201 (with or without an intervening purge) prior to performing operation 205 within a cycle. In some embodiments, operation 205 is repeated one or more times within a cycle. Such modifications can help tune the amount of nitrogen in a layer or portion thereof and / or facilitate diffusion through a feature.

[0043] For thermal ALD, a relatively strong nitrogen-containing reactant may be used, with ammonia and hydrazine as examples.

[0044] Figure 3 shows an example of titanium nitride deposition by a plasma-enhanced atomic layer deposition (PEALD) process. In the example of Figure 3, a substrate is exposed to a process gas including the titanium-containing precursor in an operation 301. In the first iteration of the process, the substrate includes the metal-containing surface on which the titanium nitride is to be deposited. A purge operation is then performed in an operation 303. An adsorbed layer of titanium-containing precursor remains, with the gas phase precursor removed. The substrate is then exposed to a nitrogen-containing plasma in an operation 305. The plasma may be remotely- generated or direct. Further it may be generated by any appropriate plasma generator including acapacitively-coupled plasma generator or an inductively-coupled plasma generators. A microwave plasma generator may be used.

[0045] Activated nitrogen species, including radicals, ions, and / or high energy molecules, react with the adsorbed precursor to form a layer of titanium nitride. The plasma can be extinguished and a purge operation can then performed in an operation 307. Operations 301-307 may then be repeated until the titanium nitride film is at a target thickness in an operation 309. Example substrate temperatures for thermal ALD of TiN are 100° to 400°C, e.g., 200°C.

[0046] Modifications of the process described in Figure 3 can include each cycle forming less than a monolayer. This can be performed by limiting the amount of one or both reactants. In some embodiments, the ALD process may not be strictly self-limiting. For example, one or both of the purge operations may be omitted. This can increase deposition rate. Further modifications can include repeating operation 301 (with or without an intervening purge) prior to performing operation 305 within a cycle. In some embodiments, operation 305 is repeated one or more times within a cycle. Such modifications can help tune the amount of nitrogen in a layer or portion thereof and / or facilitate diffusion through a feature. For plasma ALD, nitrogen gas may be used to generate the reactant in some examples.Silicon-containing metal nitride layers

[0047] In some embodiments, ternary films including metal, nitrogen, and silicon are provided. Applications include work function layers. For example, a ternary film TiSisNy, where x and y are non-zero numbers, may be deposited. Quaternary and higher order films containing one or more of boron (B), germanium (Ge), and carbon (C) may also be deposited. More generally, a work function layer may include metal and one or more of nitrogen, silicon, carbon, boron, and germanium.

[0048] In some embodiments, a silicon-containing metal nitride layer involves deposition of a metal nitride layer (e.g., as in Figure 2 or 3) is followed by a thermal soak and / or plasma treatment with a silicon-containing compound. Examples of silicon-containing compounds include silane (SiEL) and disilane (SizEfc).

[0049] In some embodiments, a silicon-containing reactant is introduced as part of a deposition cycle in an ALD process. Figure 4 shows an example of a deposition cycle including a sequence of a nitrogen-containing reactant pulse (operation 401), a metal precursor pulse (operation 403), and a silicon-containing reactant pulse (operation 405). Each operation may be separated by a purge as discussed above. The order of reactants may be modified. In some embodiments, one or more operations is repeated (with or without an intervening pulse) in the cycle. In the same orother embodiments, one or more operations may be omitted in a cycle. For example, to tune the amount of silicon in the layer, the silicon-containing reactant pulse may be employed every second cycle or every third cycle, etc. Operations 401-405 may be repeated to reach a target thickness in an operation 407. Each cycle of the operation 407 may repeat or omit an operation as described above. In the example of Figure 4, the silicon-containing reactant incorporates silicon into the film after the metal nitride layer is formed. This is distinct from using a silicon-containing reactant as a reducing agent to reduce the metal-containing precursor.

[0050] In other embodiments, a metal-containing precursor pulse may be reduced by any of the nitrogen-containing reactant, the silicon-containing reactant, or a separate reducing agent (e.g., Hi). However, the amount of nitrogen-containing reactant and / or silicon-containing reactant is sufficient to introduce a quantity of nitrogen and silicon into the formed film.Metal-containing layer deposition

[0051] Figure 5 shows an example of metal-containing layer deposition by a thermal atomic layer deposition (AED) process. In the example of Figure 5, a substrate is exposed to a process gas including a metal-containing precursor in an operation 501. In the first iteration of the process, the substrate includes the surface on which the metal-containing layer is to be deposited. A purge operation is then performed in an operation 503. An adsorbed layer of metal-containing precursor remains, with the gas phase precursor removed. The substrate is then exposed to a reactant in an operation 505. The reactant reacts with the adsorbed precursor to form a layer of metal nitride. A purge operation is then performed in an operation 507. Operations 501-507 may then be repeated until the metal-containing film is at a target thickness in an operation 509.

[0052] Modifications of the process described in Figure 5 can include exposing the substrate to the reactant as the first operation in each cycle, followed by a purge, exposure to the metalcontaining precursor, and purge. Further modifications can include each cycle forming less than a monolayer. This can be performed by limiting the amount of one or both reactants. In some embodiments, the AED process may not be strictly self-limiting. For example, one or both of the purge operations may be omitted or shortened such that some gas-phase reactant remains and reacts in the gas phase. This can increase deposition rate. Further modifications can include repeating operation 501 (with or without an intervening purge) prior to performing operation 505 within a cycle.

[0053] Depending on the film to be deposited, the reactant may or may not be incorporated into the film. For deposition of an elemental film, the reactant may be a reducing agent such as hydrogen (Hi), silane (SifE), and diborane (BiHe) that is not incorporated in appreciable amountsin the film. For deposition of a compound film, other reactants may be used - a nitrogencontaining reactant to deposit a nitride, a carbon-containing reactant to deposit a carbide, etc. Examples of other reactants are provided below.

[0054] Figure 6 shows an example of metal-containing layer deposition by PEALD process. In the example of Figure 6, a substrate is exposed to a process gas including a metal-containing precursor in an operation 601. A purge operation is then performed in an operation 603. An adsorbed layer of metal-containing precursor remains, with the gas phase precursor removed. The substrate is then exposed to a reactant-containing plasma in an operation 605. The plasma may be remotely-generated or direct. Further it may be generated by any appropriate plasma generator including a capacitively-coupled plasma generator or an inductively-coupled plasma generators.

[0055] Activated species, including radicals, ions, and / or high energy molecules, react with the adsorbed precursor to form a layer of metal-containing film. Depending on the film to be deposited, the reactant may or may not be incorporated into the film. For deposition of an elemental film, the reactant may be a reducing agent such as hydrogen (H2), silane (SiFU), and diborane (EFHe) that is not incorporated in appreciable amounts in the film. For deposition of a compound film, other reactants may be used - a nitrogen-containing reactant to deposit a nitride, a carbon-containing reactant to deposit a carbide, etc. Examples of other reactants are provided below.

[0056] The plasma can be extinguished and a purge operation can then performed in an operation 607. Operations 601-607 may then be repeated until the metal-containing film is at a target thickness in an operation 609.

[0057] Modifications of the process described in Figure 6 can include each cycle forming less than a monolayer. This can be performed by limiting the amount of one or both reactants. In some embodiments, the AED process may not be strictly self-limiting. For example, one or both of the purge operations may be omitted. This can increase deposition rate. Further modifications can include repeating operation 601 (with or without an intervening purge) prior to performing operation 605 within a cycle. In some embodiments, operation 605 is repeated one or more times within a cycle.

[0058] Figures 2-6 describe examples of thermal ALD and PEAED processes. Thermal and plasma-enhanced chemical vapor deposition processes may also be used. These may be co-flow or pulsed CVD processes. In co-flow CVD, a metal-containing precursor and a reactant (e.g., nitrogen-containing reactant to deposit a metal nitride or a reducing agent to deposit an elemental metal layer) are continuously flowed such that a substrate is continuously exposed to a metal-containing and the reactant. The flows may continue until a metal layer with a predetermined thickness is formed. Alternately, a metal-containing precursor and a reactant may be pulsed for a co-flow with a carrier gas such as inert gas purging between co-flow pulses. In a pulsed CVD process, a reactant or the metal-containing precursor may be flowed continuously while the other of the reactant and the metal-containing precursor is pulsed with intervals between pulses.Metal silicide formation

[0059] In some embodiments, a metal silicide layer is formed. For example, operation 103 in Figure 1 A may involve forming a metal silicide layer. In one example, the metal silicide layer is a metal silicide ohmic contact with crystalline silicon. Examples of applications include 3D- NAND, 3D-DRAM, 2D-DRAM, and logic applications.

[0060] Figure 7 is a process flow diagram illustrating a method to form a metal silicide ohmic contact with crystalline silicon from a metal layer according to some embodiments. The method begins with providing a substrate including a feature having bottom silicon surface and oxide or nitride sidewalls, in which a metal (e.g., molybdenum or tungsten), depending on the device and / or processing requirements, is to be deposited in an operation 701. The substrate may be provided to a semiconductor processing tool.

[0061] After providing a substrate including a feature having a bottom crystalline silicon surface and oxide or nitride sidewalls, an optional clean, operation 703, may be performed. The optional clean may be used to remove oxide layer formed on the feature’s surfaces. In some embodiments, an atomic layer clean with a Cl-based plasma, a hydrogen fluoride (HF) vapor clean, an ammonium fluoride (NH4F) clean, or a treatment using other reducing agents may be used to reduce oxide of Si at the feature bottom. In some embodiments, a hydrogen fluoride may be diluted to about 100: 1 prior to cleaning. The optional clean may be performed in the deposition chamber. Alternately the optional clean may be done in a separate process prior to being provided to a deposition chamber. If so, the optional clean may be performed in a chamber under common vacuum as the deposition chamber such that the substrate can be transferred to the deposition chamber without air break. Other preclean operations may be performed as described further below.

[0062] Once the substrate is provided in a deposition chamber, a metal layer is selectively deposited on the silicon surface in an operation 705. The metal layer, including tungsten or molybdenum layer, may be deposited by co-flow CVD, pulsed CVD, or ALD. These may be thermal or plasma depositions, with examples of ALD processes described above with respect to Figures 5 and 6.

[0063] In some embodiments, a metal layer may be formed conformally to the bottom crystallinesilicon surface. The metal layer may be about 2-20 nm or 2-10 nm thick in some embodiments. After the metal layer is selectively deposited on the silicon surface, the feature is annealed to convert a metal layer to a metal silicide layer in operation 304. In some embodiments, the metal layer may be annealed by rapid thermal annealing. In some embodiments, the thickness of the metal silicide layer after annealing may range from about 2-10 nm. The annealing is generally conducted at between 500°C and 800°C, e.g., between 500°C and 700°C. A metal layer may be annealed in-situ in a deposition chamber where a metal layer is formed, without exposing a metal layer to ambient atmosphere. In some embodiments, a substrate including metal layer is transferred from one pedestal to another pedestal for annealing. After metal silicide layer formation, a metal nitride barrier layer (or bottom electrode) may be formed on the metal silicide layer and sidewalls. This may be performed as described above with respect to operation 105 of Figure 1 , for example.

[0064] In some embodiments, operation 707 is not performed. For example, for formation of molybdenum silicide, a thermal ALD deposition of Mo using M0CI5 and H2 may be performed at temperature between 350°C and 550°C on silicon. At those temperatures, the conversion of molybdenum to molybdenum silicide is immediate, without a subsequent anneal.

[0065] In some embodiments, the gas flow rates for a metal halide precursor, e.g., MoFr, or M0CI5, and a reducing agent, e.g., H2, or SiF , during metal layer formation may be controlled. In some embodiments, flow rate of a reducing agent is at least 10 times higher than the flow rate of a metal halide precursor. For example, the gas flow rate of H2 may be controlled to be at least 10 times higher than the gas flow rate of M0CI5 to achieve high H2 flow rate condition. In some embodiments, the gas flow rate of H2 to M0CI5 may be set to be 10:1-10,000:1. This high H2 flow rate condition may be also applied to forming other metal layers.

[0066] In this high H2 flow rate condition, the rates of reactions (1) and (2) may be controlled such that reaction (1) lasts only for a limited time before reaction (2) predominates.

[0067] 4MOC15(g) + 5Si (s) 4Mo (s) + 5SiCl4(g) (1)

[0068] 2MoCl5(g) + 5H2(g) 2Mo(s) + 6C1 (g) (2)In a situation where reaction (1) is quickly outcompeted, formation of defects in the silicon may be minimized or significantly suppressed.Metal-containing precursors

[0069] In some embodiments, the metal-containing layer is a molybdenum-containing layer. Depositing a molybdenum-containing layer involves using a molybdenum-containing precursor.Generally, molybdenum-containing precursors can include molybdenum in a wide range of oxidation states ranging from 0 to +6. In some embodiments, molybdenum compounds have molybdenum in low oxidation states of +3, +4 and +5. Provided methods are particularly useful for depositing molybdenum containing materials from halogen-containing molybdenum- containing compounds, because silicon-containing reactants can assist in halogen scavenging, but halogen-free molybdenum-containing precursors can be used as well. Suitable molybdenum containing precursors include molybdenum halides and oxyhalides, such as fluorides, chlorides, bromides, oxy fluorides, oxychlorides, and oxybromides where molybdenum may be in any of the oxidation states from +2 to +6.

[0070] Molybdenum chloride precursors are given by the formula MoClx, where x is 2, 3, 4, 5, or 6, and include molybdenum dichloride (MoCh), molybdenum trichloride (MoCh), molybdenum tetrachloride (M0CI4), molybdenum pentachloride (M0CI5), and molybdenum hexachloride (MoCh). In some embodiments, M0CI5 or MoCh are used. While the description chiefly refers to MoClxprecursors, in other embodiments, other molybdenum halide precursors may be used. Molybdenum halide precursors are given by the formula MoXz, where X is a halogen (fluorine (F), chlorine (Cl), bromine (Br), or iodine (I)) and z is 2, 3, 4, 5, or 6. Examples of MoXzprecursors include molybdenum fluoride (MoFe). In some embodiments, a non-fluorine- containing MoXzprecursor is used to prevent fluorine etch or incorporation. In some embodiments, a non-bromine-containing and / or a non-iodine-containing MoXzprecursor is used to prevent etch or bromine or iodine incorporation.

[0071] When using MoFe, the concentration of MoFe in the MoFe dose may be very low to prevent etching, e.g., 0.01% or less, 0.008% or less, 0.005% or less, or 0.004% or less of the total gas flowed into the chamber.

[0072] Molybdenum oxyhalide precursors are given by the formula MoOyXz, where X is a halogen (fluorine (F), chlorine (Cl), bromine (Br), or iodine (I)) and y and z are numbers greater than 0 such that MoOyXzforms a stable compound. Examples of molybdenum oxyhalides include molybdenum dichloride dioxide (MOO2CI2), molybdenum tetrachloride oxide (MoOCF), molybdenum tetrafluoride oxide (M00F4), molybdenum dibromide dioxide (MoC B^), and the molybdenum iodides MOO2I, and MO4O11I.

[0073] In some embodiments discussed herein, the precursors having molecular weights of less than about 450 g / mol, such as less than about 400 g / mol.

[0074] In some embodiments the molybdenum containing precursor has a formula MoXnYm, wherein X is a chalcogen (e.g., oxygen or sulfur), Y is a halogen (e.g., fluorine, chlorine, bromine,or iodine), n is 0, 1, or 2 and m is 2, 3, 4, 5, or 6. Examples of halogen-containing molybdenum- containing precursors include without limitation M0CI5, M02Q10, M0O2O2, and MoOCU. Another example of a halogen-containing molybdenum-containing precursor is MoFe.

[0075] In some embodiments molybdenum-containing precursor includes carbonyl ligands. An example of a carbonyl-containing precursor is Mo(CO)e.

[0076] In some embodiments, the processes include deposition of a thin, protective Mo layer using a molybdenum chloride (MoClx) precursor. This may be followed by Mo deposition using a molybdenum oxyhalide (MoOyXz) precursor. The protective Mo layer enables Mo deposition using an MoOyXzprecursor without oxidation of an underlying surface. This can be useful for oxygen- sensitive surfaces such as silicon (Si), silicon germanium (SiGe), titanium (Ti), titanium nitride (TiN) and titanium silicide (TiSi2).

[0077] Organometallic molybdenum-containing compounds and / or sulfur-containing molybdenum-containing compounds may be used as molybdenum precursors in some embodiments. Examples of these are given in PCT publication W02023250500, incorporated by reference herein.

[0078] Cobalt-containing films can be deposited using a variety of cobalt precursors, where cobalt may be in +1, +2 or +3 oxidation states. Examples of cobalt precursors include cobalt acetate, cobalt acetylacetonates (e.g., cobalt (III) bis(acetylacetonate)), cobalt amidinates (e.g., bis(N-t-butyl-N’-ethylpropanimidamidato)cobalt(II),) cobaltocene, and carbonyl-containing cobalt precursors (e.g., cobalt tricarbonyl nitrosyl, and cyclopentadienylcobalt dicarbonyl). An example of a halogen-containing cobalt precursor is CoCh(TMEDA), where TMEDA is N, N, N', N' tetramethylethylenediamine.

[0079] Ruthenium-containing films metal can be deposited, for example, using vaporizable ruthenium precursors, such as bis(ethylcyclopentadienyl)ruthenium(II), bis(pentamethylcyclopentadienyl)ruthenium, ruthenocene, and cyclopentadienylpropylcyclopentadienylruthenium(II).

[0080] Tungsten-containing films can be deposited using a variety of volatile precursors. In some embodiments halogen-containing tungsten precursors, such as WXx, where X is a halogen (e.g., F, Cl, Br, and / or I) and x is from 2 to 6, are used. In some embodiments tungsten chloride is used. Tungsten chloride includes tungsten pentachloride (WCI5), tungsten hexachloride (WCE), tungsten tetrachloride (WCI4), tungsten dichloride (WCI2), and mixtures thereof. In other examples tungsten fluoride, such as tungsten hexafluoride may be used.

[0081] In some embodiments, other useful precursors include vanadium-containing precursorssuch as tetrakis(dimethylamino)vanadium, tris(dimethylamino)cyclopentadienylvanadium, tetrakis(ethylmethylamino)vanadium; niobium-containing precursors such as (tert- butylimido)bis(diethylamino)niobium, (tert-butylimido)bis(dimethylamino)niobium and (tert- butylimido)bis(ethylmethylamino)niobium; tantalum-containing precursors such as tert- butylimidotris(dimethylamido)tantalum and tantalum pentachloride; iron-containing precursors such as iron (III) tert-butoxide dimer, ferrocene and iron pentcarbonyl; nickel-containing precursors such as allyl(cyclopentadienyl)nickel(II) and nickel(II) bis(acetylacetonate); zinc- containing precursors such as zinc acetate and diethylzinc; and chromium-containing precursors such as chromium carbonyl and bis(cyclopentadienyl)chromium (II).Preclean

[0082] In some embodiments, a preclean is performed to prior to any or both of operation 103 and operation 105 in Figure 1 A. In some embodiments, a preclean is performed to prior to any or both of operation 109 and operation 111 in Figure 1 A. A preclean can be used to remove an oxide that has formed (e.g., as a result of air exposure) on a surface.

[0083] In some embodiments, it is performed only before operation 103 in Figure 1A. With operation 105 performed in the same tool as operation 103 without air break between the two operations, there may not be a need to clean the deposited surface of the metal-containing layer. In some embodiments, a preclean may be performed prior to operation 105, e.g., to remove impurities that may be present from the previous operation.

[0084] In some embodiments, a preclean is performed only before operation 109 in Figure IB. With operation 111 performed in the same tool as operation 109 without air break between the two operations, there may not be a need to clean the deposited surface of the metal-containing layer. In some embodiments, a preclean may be performed prior to operation 111, e.g., to remove impurities that may be present from the previous operation.

[0085] A native oxide may be present on a surface on which a metal-containing or metal-nitride is to be deposited. For example, an incoming metal surface may have a surface oxide. An incoming silicon surface may have a surface oxide. These may be selectively removed by the preclean. Selective removal refers to removing the surface oxide or other impurities on the surface on which a material is to be deposited with the removal preferential to the oxide with respect to other surfaces such as sidewall surfaces and / or to the material underlying the surface oxide. In some embodiments, it can involve exposure to one or more of: molybdenum pentachloride (MoCls), chlorine (Ch), boron trichloride (BCh), carbon tetrachloride (CCI4), hydrogen fluoride (HF), tungsten hexafluoride (WFe), and nitrogen trifluoride (NF3).

[0086] In some embodiments, a preclean may involve exposure to a chemistry includes (1) a halogen source such as HF or other source listed above, (2) one or more organic solvent and / or water, (3) one or more additive, and (4) one or more carrier gas. The reactants are provided to the reaction chamber and exposed to the substrate while they are in vapor phase. This chemistry is highly selective to oxide with respect to underlying silicon for example.

[0087] Appropriate hardware may be provided to ensure that the reactants are adequately vaporized before and during delivery to the reaction chamber, as described further below. Two or more of the reactants may be mixed before delivery to the reaction chamber. In other embodiments, each of the reactants may be delivered to the reaction chamber individually, for example in separate lines or at separate times.

[0088] The vapor phase species delivered to the reaction chamber may be collectively referred to as a gas mixture. The non-inert species delivered to the reaction chamber (e.g., the reactants other than the carrier gas) may be collectively referred to as a reactant mixture. The gas mixture includes the reactant mixture and the carrier gas. In some cases, the reactant mixture and / or the gas mixture may have a particular composition. For example, hydrogen fluoride or other halogen source may be provided in the reactant mixture at a concentration between about 20-100% (by volume), or between about 20-99% (by volume). In these or other cases, hydrogen fluoride or other halogen source may be provided in the gas mixture at a concentration between about 0.5- 20% (by volume). The organic solvent and / or water may be provided in the reactant mixture at a concentration between about 10-100% (by volume), or between about 10-99% (by volume). In these or other cases, the organic solvent and / or water may be provided in the gas mixture at a concentration between about 0-10% (by volume). The additive may be provided in the reactant mixture at a concentration between about 0.2-5% (by volume). In these or other cases, the additive may be provided in the gas mixture at a concentration between about 0-0.2%, or between about 0.0001-0.2% (by volume). The carrier gas may be provided in the gas mixture at a concentration between about 0-99% (by volume).

[0089] In some embodiments, the additive and organic solvent and / or water are mixed such that the additive is between about 0.1-5% (by weight) of the additive / organic solvent and / or water mixture. A reactant mixture regardless of the order of mixing may be characterized by the additive being about 0.1-5% (by weight) of the total of the amounts of additive and organic solvent and / or water.

[0090] In the same or alternate embodiments, the reactant mixture may be characterized by halogen source: additive ratio (by volume). As described further below, in some embodiments, the selectivity can be tuned by the halogen source: additive vol. ratio, with selectivity increasing withan increasing amount of additive (and thus a decreasing ratio). In some embodiments, the halogen source: additive ratio is less than or equal to 10. In some embodiments, the halogen source: additive ratio is greater than 10.

[0091] According to various embodiments, the reactant mixture may include a halogen source, an alcohol, and an amine, where the amine is between 0.1-5% wt of the total alcohol and amine amounts. In some embodiments, the halogen source:amine volumetric ratio is no more than 10. In other embodiments, the halogen source: amine volumetric ratio is 10 or higher. In some embodiments, the amine is pyridine. In some embodiments, the alcohol is isopropyl alcohol. In some embodiment the halogen source is HF.

[0092] As described above, according to various implementations, the etch may be selective to one material on a substrate with respect to another material. In other implementations, the etch may be non-selective with respect to multiple materials on a substrate.

[0093] In some embodiments, oxides are selectively etched with respect to one or more of nitrides and epitaxial materials such as Si and SiGe. The etch selectivity of the reactant mixture to silicon oxide can be tuned by the amount of additive in the mixture. For example, very high (at least 50: 1 or at least 400: 1) etch selectivity of native oxide with respect to silicon oxide is achieved with a reactant mixture having a halogen source: additive (e.g., HF:pyridine) volumetric ratio of no more than 10. The etch selectivity decreases with increasing ratio such that no selectivity is observed in the case where there is no additive. Similar effects may be observed for etch selectivity of native oxide with respect to SiGe.

[0094] In other embodiments, a preclean may involve a reducing plasma. For example, a remote or direct plasma generated from H2 may be used to remove oxide.Selective Deposition

[0095] Selective deposition refers to preferential deposition on a first material with respect to a second material. For some metals including molybdenum and tungsten, metal deposition and growth may be easier on a metal material relative to metal deposition and growth on a dielectric material. For example, a feature may have a sidewall surface of S i O 2 and a TiN plug in a bottom portion of the feature. In selective deposition, molybdenum is deposited into the feature and may grow on the TiN plug but not grow (or grow to a lesser extent) on the SiCh sidewall surfaces.

[0096] Process conditions such as the precursor gas, the reducing agent, process temperature, process pressure, and exposure time may affect the selectivity of the molybdenum film being deposited. Different precursor gases may have different process windows in which molybdenum film may be selectively deposited. Generally speaking, M0CI5 gas has a large process window,i.e., large temperature and pressure range, where the precursor gas retains its selectivity. For example, M0CI5 may be selectively deposited on a metal material with respect to a dielectric material where the process temperature is 200°C to 800°C, e.g., 250°C to 550°C, or 300°C to 500°C. Generally speaking, higher process temperatures and higher process pressures reduce the selectivity of the deposited gas. For example, at higher temperatures, a precursor gas such as M0CI5 may lose its selectivity and deposit molybdenum film on both a metal surface and a dielectric surface within a feature. M0CI5 may be reacted with different reactant to deposit a molybdenum film. Described below are examples of deposition of molybdenum film within a feature using a M0CI5 precursor and different process controls. In a first example, the M0CI5 precursor is reacted with a hydrogen (H2) reactant using the deposition methods described above. In the description herein, the metal precursors are reacted with H2 as a co-reactant (also referred to as a hydrogen reactant or H2 reactant). However, other reactants may be used instead of hydrogen including other hydrogen-containing reactants such SiH4, B2H6, NH3, as appropriate. While reactants such as B2H6 and / or SiH4 are stronger reducing agents, they can also result in higher resistivity. Thus, in some embodiments, using H2 as described herein is advantageous. Process temperatures for selective deposition of the molybdenum film may be between 200°C to 800°C, e.g., 250°C to 550°C, or 300°C to 500°C. At these temperatures, the molybdenum film is selectively deposited on conductive metal or metal compound surfaces, such as a TiN surface, in a feature relative to dielectric surfaces. The molybdenum film grows from the locations where the conductive surfaces are located in a feature. If the conductive surface is a TiN plug at the bottom of the feature, the molybdenum film may be deposited and grown from the bottom of the feature. In a second example, the molybdenum film may be deposited using the M0CI5 precursor and the H2 reactant, but at higher temperatures, i.e., above 800°C. This process window may have the molybdenum film deposited on both the dielectric and conductive surfaces within the feature. The deposition of the molybdenum film on the dielectric surface may be used to create a barrierless molybdenum layer in the feature.

[0097] In some embodiments, selective deposition is performed using a MoFxprecursor. Molybdenum fluoride precursors are given by the formula MoFxas described above. As indicated above, MoFo can be advantageous for ease of delivery. Deposition of molybdenum from MoFe at the low concentrations disclosed above results in high (at least 100:1) selectivity of one elemental metal surfaces (e.g., W, Mo, Cu) relative to oxides and nitrides such as silicon oxide and titanium nitride. This is shown in Figure 6, which shows thickness of Mo after a MoFe / H2 process with MoFe at 0.004% molar concentration on various surfaces. It also shows that selective deposition of Mo on silicon oxide with respect to titanium nitride may be performed at long enough exposuretimes.

[0098] Process temperatures for selective deposition of the molybdenum film may be between 200°C to 800°C, e.g., 250°C to 550°C, or 300°C to 500°C. At these temperatures, the molybdenum film is selectively deposited on conductive metal or metal compound surfaces, such as a TiN surface, in a feature relative to dielectric surfaces.

[0099] For selective deposition, generally this a thermal, non-plasma process may be used though there may be some instances in which a plasma-enhanced process is used. Plasma- enhanced processes may have lower selectivity than thermal processes, but higher throughput and the ability to be performed at lower temperatures. Exposing the substrate to an oxidant has the effect of resetting the surface and enhancing the selectivity. An oxidant can be replaced with another surface reset agent depending on the composition of the surfaces on the substrate, with examples including nitriding agents. Examples of oxidants include thermal oxygen (O2), O2 plasmas, and ozone.Non-selective Deposition

[0100] The selectivity described above may be reduced or eliminated using plasma deposition in some embodiments, such that the metal is conformally deposited on different materials. This may be referred to as non-selective or conformal deposition. In some embodiments, a plasmabased process is used for conformal deposition. Examples of plasma processes include plasma- enhanced ALD (PEALD) or plasma enhanced CVD (PECVD) processes. Remote or direct plasmas may be used. In some embodiments, a capacitively-coupled direct plasma that is generated in the chamber is employed.

[0101] In some embodiments, nucleation layer deposition can be used to reduce or eliminate selectivity. For nucleation layer deposition, a stronger reducing agent than hydrogen may employed. This can allow the film to grow on surfaces that face nucleation delay with hydrogen as reducing agent. As described further below, such a reducing agent can be a silicon-containing or boron-containing reducing agent such as silane (SiFE) or diborane (B2H6). Germanium- containing reducing agents (e.g., GeFU) may be used. In other embodiments, a reducing agent such as ammonia (NH3) may be used. For molybdenum deposition, the resulting nucleation layer may be a molybdenum nitride or molybdenum oxynitride layer, depending on the presence of oxygen in the molybdenum precursor. This oxynitride layer or nitride layer may be converted into an elemental molybdenum layer in the subsequent process.When using MoFe, the concentration of MoFr, in the MoF<(dose may as described above, i.e., 0.01% or less, 0.008% or less, 0.005% or less, or 0.004% or less of the total gas flowed into thechamber. Alternatively, because a stronger reducing agent than hydrogen is used in the subsequent operation, a higher concentration (e.g., up to 0.1% molar) may be used during the MoFe. Some amount of a reducing agent may be present to suppress etching. As described above, this can be between 0.5% and 10% or between 1% and 9% Hi.Nucleation Layer

[0102] In some embodiments, depositing a bulk layer can involve depositing a nucleation layer. A nucleation layer is a thin layer that supports bulk deposition. It may be conformal to the feature. In many embodiments, a nucleation layer is deposited by an ALD process. For example, in some embodiments, a Mo nucleation layer is deposited using one or more of a boron-containing reducing agent (e.g., BiHe) or a silicon-containing reducing agent (e.g., SiH4) as a co-reactant. For example, one or more S / Mo cycles or Mo / S cycles may be used to deposit a Mo nucleation layer. In another example, one or more B / Mo cycles or Mo / B cycles may be used to deposit a Mo nucleation layer on which a bulk Mo layer is deposited. B refers to a pulse of diborane or other boron-containing reducing agent and S to a pulse of silane or other silicon-containing reducing agent, such that S / Mo refers to a pulse of silane followed by a pulse of a Mo-containing precursor. B / Mo and S / Mo cycles (or Mo / B and / or Mo / S) may both be used to deposit a Mo nucleation layer, e.g., x(B / Mo) + y(S / Mo), with x and y being integers. Examples of boron-containing reactants include diborane (BzHe), alkyl boranes, alkyl boron, aminoboranes (CHshNBiCHzh, carboranes such as C2BnHn+2, and other boranes. Examples of boranes include BnHn+4, BnHn+6, BnHn+s, BnHm, where n is an integer from 1 to 10, and m is a different integer than m. Examples of silicon-containing reducing agents including silane (SiH*) and other silanes such as disilane (Si2He).

[0103] In some embodiments, deposition of a Mo nucleation layer may involve using a non- oxy gen-containing precursor, e.g., molybdenum hexafluoride (MoFe) or molybdenum pentachloride (M0CI5). Oxygen in oxygen-containing precursors may react with a silicon- or boron-containing reducing agent to form MoSixOyor MoBxOy, which are impure, high resistivity films. In some embodiments, oxygen-containing precursors may be used for nucleation layer deposition with oxygen incorporation minimized. Oxygen incorporation can be minimized by high reducing agent flows (e.g., greater than 100:1 volumetric flow rate of reducing agent to oxygen-containing Mo precursor).

[0104] In some embodiments, H2 may be used as a reducing gas for Mo nucleation layer deposition instead of a boron-containing or silicon-containing reducing gas. Example thicknesses for deposition of a Mo nucleation layer range from 5 A to 30 A. Films at the lower end of this range may not be continuous; however, as long as they can help initiate continuous bulk Mo growth, the thickness may be sufficient.

[0105] In some embodiments, the reducing agent pulses during deposition of a nucleation or bulk Mo layer may be done at lower substrate temperatures than the Mo precursor pulses. For example, or EFHe or a Si H4 (or other boron- or silicon-containing reducing agent) pulse may be performed at a temperature below 300°C, with the Mo pulse at temperatures greater than 300°C.

[0106] In some embodiments, the reducing agent is NH3 or other nitrogen-containing reducing agents such as hydrazine (N2H4). NH3 chemisorption on dielectrics is more favorable than that of H2. In some embodiments, the reducing agent and precursor are selected such that they react without reducing agent dissociation. NH3 reacts with metal oxychlorides and metal chlorides without dissociation. This is in contrast to, for example, ALD from metal oxychlorides that use H2 as a reducing agent; H2 dissociates on the surface to form adsorbed atomic hydrogen, which results in very low concentrations of reactive species and low surface coverage during initial nucleation of metal on the dielectric surface. By using NH3 and metal oxychloride or metal chloride precursors, nucleation delay is reduced or eliminated at deposition temperatures up to hundreds of degrees lower than used by H2 reduction of the same metal precursors.

[0107] In some embodiments, the reducing agent may be a boron-containing or silicon- containing reducing agent such as B2H6 or SiFU These reducing agents may be used with metal chloride precursors, with metal oxychlorides; however, the B2H6 and Si H4 may react with water formed as a byproduct during the ALD process and form solid B2O3 and Si O2 These are insulating and can remain in the film, increasing resistivity. Use of NH3 also has improved adhesion over B2H6 and SiH4 ALD processes on certain surfaces including AI2O3. The resulting nucleation layer is generally not a pure elemental film but a metal nitride or metal oxynitride film. In some embodiments, there may be residual chlorine or fluorine from the deposition, particularly if the deposition is performed at low temperatures. In some embodiments, there may be no more than a trace amount of residual chlorine or fluorine. In some embodiments, the nucleation layer is an amorphous layer. Impurities in the film (e.g., oxygen, NH3, chlorine, or other halogens) facilitate the growth of an amorphous microstructure. In some embodiments, the nucleation layer as deposited is an amorphous molybdenum oxynitride layer or an amorphous molybdenum nitride layer. The amorphous character templates large grain growth in the subsequently deposited conductor. The surface energy of nitride or oxynitride relative to an oxide surface is much more favorable than that of a metal on an oxide surface, facilitating formation of a continuous and smooth film on the dielectric. This allows formation of thin, continuous layers. Example thicknesses of the nucleation layer range from 5-30A as deposited. Depending on the temperature, this may be about 5-50 ALD cycles, for example.Etch

[0108] Etch operations may be used in the methods for filling features. Etch operations remove materials such as metals and nitrides from the feature. For example, an etch process may partially or completely remove a liner layer from a feature. In another example, the etch process may be used to reduce the thickness of a liner layer. The etch operation, in some embodiments, may involve soaking the feature soaked in a Mo halide. In some embodiments, an etch operation involves soaking the feature with a MoClxsuch as M0CI5 or a MoFxsuch as MoFe. In some embodiments, the soak may be done continuously with the Mo halide gas. In some embodiments, the soak may be pulsed, cycling the Mo halide with a purge gas, such as argon (Ar).

[0109] A metal halide precursor such as WFX, MoClxor MoFxprecursor may be used for both deposition and etch operations. For example, in certain process windows, a M0CI5 or MoFe precursor may concurrently grow a Mo film and etch away a metal or metal compound film in the feature. The process is considered a net etch operation if the rate of material removed is greater than the material deposited by the precursor. The speed at which the precursor deposits material and etches material may be controlled by a variety of process conditions, including the type of reactant used and the process temperature. Generally speaking, the lower the temperature, the higher the ratio of etching away material is relative to deposition of material. At higher temperatures, the same precursor and reactant may be used as a net deposition operation, i.e., the amount of material deposited is greater than the material removed. For example, M0CI5 precursor and H2 reactant may be used in an etch operation when the process temperature is below 400°C. The same precursor of M0CI5 and H2 reactant may be used in a deposition operation when the process temperature is above 55O°C.

[0110] In some embodiments, the MoClxprecursor at high temperatures, e.g., above 55O°C, may continue to etch material at a faster rate than depositing material. For example, M0CI5 may be used to etch a feature by a soak without a reactant. In this example, the temperature may be as high as 700°C and will continue to etch away material from the feature. In operations where the feature is soaked in a M0CI5 without a reactant, the increased temperature may increase the rate at which material is etched from the feature.

[0111] A feature may have surface oxide or contaminants on it. For example, the surface of an underlying TiN, WN, or W layer may be oxidized. If left, the oxidized surface can result in higher resistivity. Clean operations are used to remove such oxides and contaminants. In some embodiments, the clean operation may have the feature soaked in a Mo precursor gas, typically a Mo halide. Similar to the etch operations described above, the precursor gas may be a MoClxprecursor. In some embodiments, the soak may be done continuously. In some embodiments, the soak may be pulsed, cycling MoClxand a purge gas, such as argon (Ar). The precursor may be anon-oxygen Cl-containing Mo compound able to remove oxidation from the feature’s surfaces. Examples of MoClxcompounds are given above. A Cl-containing precursor may be used where traditional cleaning with thermal or plasma H2 does not work, such as where the oxidized surface is stable on the surface material. A Cl-containing precursor is less likely to over-etch a feature’s liner layer or attack a feature’s surfaces than a F-containing compound.

[0112] Integration processes including etch and / or inhibition

[0113] Also provided herein are deposition-etch-deposition (DED) techniques and deposition- inhibition-deposition (DID) techniques. These may be used to tailor deposition into features during interconnect metallization and for memory applications.

[0114] The DED and DID operations described herein may be used for logic applications such as interconnects as well as memory applications. In some embodiments, multiple DED operations are used to fill a feature. The same or different chemistries may be used for each deposition. The molybdenum precursor may be a molybdenum halide or molybdenum oxyhalide as described above or a molybdenum organometallic precursor. The same or different chemistries may be used for each etch operation.

[0115] During the etch, a high flow short dose time may be employed to achieve an anisotropic etch. As indicated above, a pre-treatment may be used to increase etch rate as well as tailor etch profile. For example, etch may be preceded by an anisotropic oxidation or nitridation. This can help etch only in the top of the feature (for vertical features) or outer part of the feature (e.g., outer wordlines in a 3D NAND structure). Examples of oxidation operations include exposure to O2 or O3 or oxygen-containing plasmas. Examples of nitridation operations include exposure to NH3 or N2 or nitrogen-containing plasmas. Post-treatments can be used to remove impurities after etch. For example, exposure to a halosilane may be used to remove fluorine or chlorine.

[0116] In some embodiments, a feature fill sequence may include one or more inhibition operations. An inhibition operation is an operation to inhibit nucleation or formation of film in a subsequent deposition. It may be used to tune a deposition profile. As an example, it may be used to inhibit deposition at the top of a feature.

[0117] Examples of inhibition chemistries include nitrogen-containing chemistries including NF3, N2, and NH3, and well as halide-containing chemistries such as alkyl halides and B2H6. An inhibitor such as N2 may be co-flowed with a metal precursor and / or H2, for example. The inhibition may be a plasma or thermal operation. If plasma, a remote or direct plasmas may be used. Other examples of inhibition operations can include exposure to oxygen-containing, carbon- containing, and phosphorous-containing plasmas.

[0118] De-inhibition operations may be used to reduce the effect of inhibition, either before or after the subsequent deposition. This can be used to further tailor the fill profile. Examples of deinhibition operations include Hi soak, NH3 soak, and Hi plasma exposure. Soak operations may be continuous flow or pulsed.

[0119] A process may use various permutations of Depositoin, Etch, Inhibition and de- Inhibition operations to tailor fill. Examples of process sequences are:Dep - Etch - DepDep - Inhibition - DepDep - Etch(x) - Inhibition(y) - DepDep - Etch(x) - Inhibition(y) - Dep - de-Inhibition - DepDep - Inhibition - Etch - DepDep - Etch - Dep - Inhibition - DepDep - Etch - Dep - Inhibition - Dep - de-inhibition - DepDep - Inhibition - Dep - Etch - Dep

[0120] In some embodiments, the dep-etch-dep operations disclosed herein may be integrated into single chamber metallization processes. In other embodiments, any one or more of the operations may occur in different chambers. These may be connected by vacuum in some embodiments.Example Processes

[0121] Figures 8A-10C show examples of processes according to various embodiments. First turning to Figures 8A-8D, which illustrates operations in a process of forming an ohmic contact and capping layer for a 3D DRAM structure. In Figure 8A, a recessed feature 802 has sidewalls 806 with sidewall surfaces 816 and a bottom including crystalline silicon 808. Crystalline silicon 808 includes a crystalline silicon surface 810. It should be noted that the term “bottom” is used with respect to the feature orientation - for a feature that is horizontally-oriented (also referred to as laterally-oriented) with respect to the plane of the substrate, the “top” and “bottom” of the feature may both be in a plane parallel to that of a substrate. In the example of Figure 8A, all features are horizontally-oriented, with the bottom of the feature being disposed opposite that of the feature opening 805. There may be an arbitrary number of pairs of features, e.g., over 100 as shown in Figure 8A.

[0122] The sidewalls 806 may be made of one or more layers. Sidewalls 106 include a dielectriclayer. Examples of dielectric materials include oxides, such as silicon oxide (Si O2) and aluminum oxide (AI2O3); nitrides, such as silicon nitride (SiN); carbides, such as nitrogen-doped silicon carbide (NDC) and oxygen-doped silicon carbide (ODC); and low k dielectrics, such as carbon- doped SiCh. In some embodiments, the sidewalls 806 are ALD oxide layers. In some embodiments, the sidewalls 806 are nitride layers.

[0123] The crystalline silicon 808 may extend from a first sidewall in the feature to a second sidewall in the feature and may be made of one or more layers. The crystalline silicon 108 of the crystalline silicon surface 810 may be doped or undoped single crystalline silicon or doped or undoped polycrystalline silicon. In one embodiment, crystalline silicon 808 may be doped polycrystalline silicon (doped poly Si). In some embodiments, the crystalline silicon 808 may form a gate electrode. When the substrate is provided to a processing tool (e.g., at operation 101 in Figure 1A), a layer of native oxide 811 on the crystalline silicon surface 810 may be present.

[0124] A preclean operation is performed to selectively remove the layer of native oxide 811 from the crystalline silicon surface 810 without etching the underlying crystalline silicon 808. In some embodiments, a chemistry includes HF or other halogen source, an organic solvent and / or water, one or more amines or additives may be used, with the halogen source: additive (e.g., HF:pyridine) volumetric ratio being no more than 10:1. This chemistry is highly selective to the native oxide with respect to underlying silicon. The DRAM structure without the native oxide 811 is shown in Figure 8B.

[0125] Turning to Figure 8C, a metal silicide layer 812 is selectively formed on crystalline silicon 808 to form an ohmic contact. In some embodiments, a thickness of the metal silicide layer 812 on crystalline silicon 108 may range from 2-10 nm, or in embodiments, no more than 50 Angstroms. As described above, the metal silicide layer 812 may be formed by selectively forming a metal layer on crystalline silicon 808. In some embodiments, the metal is converted to metal silicide at the deposition temperature. In other embodiments, the deposition can be followed by annealing to convert the metal layer to the metal silicide layer 812. The entire metal layer is converted to the metal silicide. This metal silicide is the ohmic silicide contact.

[0126] Following formation of metal silicide layer 812, a conformal TiN layer 814 is formed on the metal silicide layer 812 and the sidewall surfaces 816. In some embodiments, the conformal layer TiN 814 may be a capping layer and a bottom electrode.

[0127] A challenge associated with the 3D DRAM fabrication process described above is formation of metal silicide contact at the bottom of each recessed feature. Controlled selective formation of a metal layer on the bottom of each recessed feature to before the metal layer isconverted to a metal silicide layer can be difficult. Forming a metal layer selectively and uniformly on a Si may be affected by the dimension of the feature in which a metal layer is formed. In some embodiments, the recessed feature 802 has a depth ‘A’ of 100-300 nm, and a height ‘B’ of 10-30 nm, resulting in an aspect ratio (depth to height) of 3-30. These small feature sizes and high aspect ratios present challenges in forming a metal layer. In some embodiments, a 3D-DRAM structure may include a stack including more than 400 layers (features) that are vertically stacked. A total stack height ‘C’ may range about 6-12 pm.

[0128] The 3D DRAM structures shown in Figures 8A-8D also present challenges due to the horizontal (with respect to the substrate) orientation of the features. Plasma deposition techniques for forming titanium silicides, for example, selectively on silicon contacts in vertically-oriented features cannot be used. However, selective deposition of molybdenum to form molybdenum silicides can be performed by thermal ALD processes, as described above. Oxidation of the molybdenum silicide or other metal silicide is kept extremely low to keep the contact resistance low.

[0129] Figure 8E is a process flow diagram illustrating operations in certain embodiments of the integration scheme illustrated in Figures 8A-8D. In the example of Figure 8E, a 3D DRAM structure having features including silicon surfaces and sidewalls is provided to a first module of a processing tool in an operation 851. An example of a 3D DRAM structure is shown above in Figure 8 A. If a pre-clean is performed, it may be performed in the first module or prior to operation 851. Next, a thermal ALD process to selectively deposit molybdenum on the silicon surface and form a molybdenum silicide layer is performed in an operation 853. Selective deposition of a molybdenum is described below and can involve alternating pulses of M0CI5 and H2. In some embodiments, a ratio of H2 to M0CI5 volumetric flowrates can be between 10: 1 to 10000:1. Deposition temperature can range from 350°C to 550°C. At these temperatures, the molybdenum reacts to form a molybdenum silicide layer. Examples of layer thickness 10 to 100 Angstroms, or 10 to 50 Angstroms. During deposition, chamber pressure may be between 20 to 100 Torr, e.g., 30 to 80 Torr.

[0130] Molybdenum silicides have low contact resistance when connecting silicon contacts. However, the contact resistance is extremely sensitive to oxidation. At the chamber pressures described, oxidation can occur if there are any pauses during deposition. If the tool is subject to an unforeseen condition that pauses deposition, a reducing agent or other treatment may be applied to remove any oxide formed during the downtime. After formation of the molybdenum silicide layer, the substrate is transferred to a second module (also referred to as a chamber) of the processing tool under conditions to prevent oxidation in an operation 855. In some embodiments,operation 855 involves transferring the substrate using a transfer chamber having a pressure of no more than 10’6Torr. Further, the humidity is controlled such that water partial pressure is no more than 10'7Torr. In some embodiments, the oxygen content of the molybdenum silicide layer as measured by secondary ion mass spectrometry (SIMS) is no more than 0.01%. Once in the second module, thermal ALD is performed to conformally deposit a TiN layer on the molybdenum silicide and sidewall surfaces in an operation 857. The thickness is sufficient to protect the underlying contact from oxidation and to function as an electrode. In some embodiments, the thickness is at least about 50 Angstroms. Chamber pressure is lower than in operation 851 and is about 1 and 10 Torr in some embodiments.

[0131] Various modifications may be made to the method of Figure 8E. In some embodiments, molybdenum silicide formation is succeeded by a surface nitridation treatment. This may be performed in the same module as operation 851, prior to transfer to the transfer chamber. It can involve exposure to a nitrogen-containing compound such as ammonia or hydrazine or to a nitrogen-containing plasma such as a plasma generated from nitrogen gas (N2) or ammonia. Nitriding the surface to form a molybdenum silicide nitride surface can protect the surface from oxidation and in some embodiments allow a lower vacuum level (higher pressure) in the transfer chamber. For example, a pressure of no more than 10’5Torr, 10’4Torr, 10’3Torr, or 10’2Torr may be used. Nitridation of the surface will result in higher resistivity than an untreated molybdenum silicide, but lower resistivity than a surface that is oxidized. Moreover, unlike oxidation during transfer, the nitridation can be controlled. In the same or other embodiments, surface nitridation may be employed in situations in which there is non-deposition time (planned or unplanned) in the deposition chamber to avoid oxidation.

[0132] As described herein, in alternate embodiments, deposition of molybdenum and deposition of titanium nitride may be performed in the same module. This can facilitate preventing oxidation as the time between depositions can be minimized. However, it can be challenging due to the different pressures at which the depositions may be performed. In some embodiments, a single station of a multi-station module may be dedicated to molybdenum deposition and surrounded by a physical shield to maintain a higher pressure within the station. The remaining one or more stations may be dedicated to titanium nitride deposition, which is slower than the molybdenum deposition. An optional nitridation surface treatment may be employed.

[0133] Figures 9A-9C show examples of a process of metallization in a vertically oriented feature according to various embodiments. In Figure 9A, a vertically-oriented feature recessed 901 is shown. Such a feature may be used in DRAM or logic devices, for example. A device may include one or more recessed features 901 having dielectric sidewalls 906. In the example ofFigure 9A, the feature includes a metal silicide (e.g., TiSixor MoSix) layer 912. The underlying metal silicide layer 912 is connected to a semiconductor layer 908, e.g., silicon (Si) or silicongermanium (SiGe). According to various embodiments, the metal silicide layer may be formed during an operation 103 described above with reference to Figure 1A. In some embodiments, a process according to Figure 7 may be used. In some embodiments, a preclean may be used to remove oxide or other contaminants from the metal silicide layer 912. This stack may be used in a transistor junction structure. In Figure 9B, a conformal TiN layer 914 is deposited in the feature. This may be performed during an operation 105 in Figure 1 A, for example.

[0134] The TiN liner layer 914 lines the feature and is a barrier layer used on top of a metal silicide layer 912 in trench contacts for source / drain applications. One purpose of the TiN layer is to prevent the metal silicide layer 912 from any potential reaction with the overlying metal. Another purpose is to protect from a fluorine attack. It can also prevent the metal silicide from being oxidized in air during subsequent processing.

[0135] In some embodiments, deposition of the TiN layer 914 is performed as part of operation 109 in Figure IB. It may be about 1-10 Angstroms thick in some embodiments. Figure 9C shows after an initial Mo layer 921 is deposited. The initial Mo layer 921 can be deposited using an ALD process. The result is a thin initial Mo layer 321 selectively deposited on the TiN liner layer 914. The initial Mo layer 921 may be less than 5 nm thick or less than 2 nm thick in some embodiments. The precursor is non-oxygen containing molybdenum precursor. Thus, as shown in Figure 9C, there is no re-oxidation of the feature 901. Nor is the initial Mo layer 921 oxidized. The feature is left with an unoxidized TiN liner layer 915 covered by an unoxidized initial Mo layer 921. Molybdenum fill may continue in the processing tool with the same or different Mo precursor according to various embodiments.

[0136] Figures 10A-10D show another example of a metallization process in a vertically oriented feature. Figure 10A depicts an insulating layer 1013 formed in a trench in a silicon substrate 1009. The insulating layer 1013 may be a gate oxide layer, formed from a high-k dielectric material such as a silicon oxide or silicon nitride material. In Figure 10B, a conformal TiN layer is 1014 is formed in a trench. The TiN layer forms a “cup” in that it extends only partway up the sidewalls of the trench. Formation of the TiN layer in this manner can involve inhibition at the top of trench before and / or during deposition of the TiN layer and / or etch at the top of the trench during or after deposition of the TiN layer. Deposition of the TiN layer can be performed as part of operation 111 of Figure IB, for example.

[0137] Figure 10C shows the structure after selective deposition of a metal-containing layer 1013. Examples of metal-containing layers include Mo and W films. Deposition of the metal-containing layer can be performed as part of operation 111 of Figure IB, for example. The metalcontaining layer 1013 can be a buried wordline (bWL) in some embodiments. Figure 10D shows the resulting DRAM architecture including the buried wordline (bWL).Apparatus

[0138] Figure 11A and Figure 1 IB show examples of substrate processing tools. Figure 11A shows an example of a substrate processing tool that includes multiple chambers. The tool 1100 includes a transfer module 1103. The transfer module 1103 provides a clean, vacuum environment to minimize risk of contamination of substrates being processed as they are moved between various modules. Mounted on the transfer module 1103 is a multi-station chamber 1109 capable of performing in-situ clean, deposition, etch, and inhibition processes described above.

[0139] Once a substrate is in a substrate processing tool, there is no air break. It can be exposed to different chamber pressures as described above, with the lowest pressure withing the transfer module. Higher (sub-atmospheric) pressures are used within the deposition chambers according to the particular deposition employed. The movement within the tool is without an intervening vacuum break, although the vacuum level can change.

[0140] Chamber 1109 may include multiple stations 1111, 1113, 1115, and 1117 that may sequentially perform operations in accordance with disclosed embodiments. For example, chamber 1109 may be configured such that station 1111 performs deposition of a metal-containing layer. Station 1113 may be configured to perform an inhibition operation. Station 1115 may be configured to perform deposition of a metal nitride film. Station 1117 may be configured to perform an etch operation. In another example, station 1111 and 1113 may be configured to deposit a molybdenum-containing layer and stations 1115 and 1117 configured to deposit a TiN layer.

[0141] In embodiments in which concurrent deposition of different materials is performed in a multi-station chamber such as chamber 1109, pressure is the same throughout the chamber. In such embodiments, it may be advantageous to use plasma for one material and thermal deposition for another material. In this manner, materials that have higher pressure requirements for thermal deposition may be deposited at lower pressures by employing plasma deposition. In some embodiments, a multi-station chamber is used to deposit TiN by thermal deposition at 1-10 Torr and a molybdenum-containing material by plasma-enhanced deposition. These depositions may overlap in time.

[0142] In some embodiments, a single station may be used to deposit different materials at different times. In such embodiments, a multi-plenum showerhead may be used along withseparate pumping lines.

[0143] Two or more stations may be included in a multi-station chamber, e.g., 2-6, with the operations appropriately distributed. Stations may include a heated pedestal or substrate support, one or more gas inlets or showerhead or dispersion plate. Also mounted on the transfer module 1103 may be one or more single or multi-station modules 1107. In some embodiments, a preclean as described above may be performed in a module 1107, after which the substrate is transferred under vacuum to another module (e.g., another module 1107 or chamber 1109) for ALD of the metal-containing layer and / or metal nitride layer. In another example, a module for selective treatment of a film may be mounted on the transfer module.

[0144] The tool 1100 also includes one or more wafer source modules 1101, where wafers are stored before and after processing. An atmospheric robot (not shown) in the atmospheric transfer chamber 1119 may first remove wafers from the source modules 1101 to loadlocks 1121. A wafer transfer device (generally a robot arm unit) in the transfer module 1103 moves the wafers from loadlocks 1121 to and among the modules mounted on the transfer module 1103.

[0145] Figure 1 IB is an embodiment of a substrate processing tool 1100. The tool 1100 in Figure 11 B has wafer source modules 1101 , a transfer module 1103, atmospheric transfer chamber 1119, and loadlocks 1121 , as described above with reference to Figure 11 A. The system in Figure 1 IB has three single station modules 1157a— 1175c. The tool may be configured to sequentially perform operations in accordance with disclosed embodiments. For example, the single station modules 1157a— 1157c may be configured so that a first module 957a performs a pre-clean, a second module 957b performs deposition of a metal-containing film, and a third module 957c performs deposition of TiN. Stations may include a heated pedestal or substrate support, one or more gas inlets or showerhead or dispersion plate as described above.

[0146] Referring to Figures 11 A and 1 IB, in various embodiments, a system controller 1129 is employed to control process conditions during deposition. The controller 1129 will typically include one or more memory devices and one or more processors. A processor may include a CPU or computer, analog and / or digital input / output connections, stepper motor controller boards, etc. Such a system controller may be employed in control of any of the processes and apparatus described herein.

[0147] The controller 1129 may control all the activities of the apparatus. The system controller 1129 executes system control software, including sets of instructions for controlling the timing, mixture of gases, chamber pressure, chamber temperature, wafer temperature, radio frequency (RF) power levels, wafer chuck or pedestal position, and other parameters of a particular process.Other computer programs stored on memory devices associated with the controller 1129 may be employed in some embodiments.

[0148] Typically, there will be a user interface associated with the controller 1129. The user interface may include a display screen, graphical software displays of the apparatus and / or process conditions, and user input devices such as pointing devices, keyboards, touch screens, microphones, etc.

[0149] System control logic may be configured in any suitable way. In general, the logic can be designed or configured in hardware and / or software. The instructions for controlling the drive circuitry may be hard coded or provided as software. The instructions may be provided by “programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general-purpose processor. System control software may be coded in any suitable computer readable programming language.

[0150] The computer program code for controlling the Mo precursor pulses, hydrogen pulses, and argon flow, and other processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.

[0151] The controller parameters relate to process conditions, such as, for example, process gas composition and flow rates, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe and may be entered utilizing the user interface.

[0152] Signals for monitoring the process may be provided by analog and / or digital input connections of the system controller 1129. The signals for controlling the process are output on the analog and digital output connections of the deposition apparatus.

[0153] The system software may be designed or configured in many ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the deposition processes in accordance with the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

[0154] In some implementations, a controller 1129 is part of a system, which may be part of theabove-described examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and / or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller 1129, depending on the processing requirements and / or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and / or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and / or load locks connected to or interfaced with a specific system.

[0155] Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and / or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and / or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and / or dies of a wafer.

[0156] The controller 1129, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller 1129 may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or theInternet. The remote computer may include a user interface that enables entry or programming of parameters and / or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. The parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus, as described above, the controller may be distributed, such as by including one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

[0157] Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a PVD chamber or module, a CVD chamber or module, an ALD chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and / or manufacturing of semiconductor wafers.

[0158] As noted above, depending on the process step or steps to be performed by the tool, the controller might communicate with one or more of other tool circuits or modules, other tool components, cluster tools, other tool interfaces, adjacent tools, neighboring tools, tools located throughout a factory, a main computer, another controller, or tools used in material transport that bring containers of wafers to and from tool locations and / or load ports in a semiconductor manufacturing factory.

[0159] The controller 1129 may include various programs. A substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other parts of the chamber such as a gas inlet. A substrate tilt and rotation program may include for tilt and rotation. A process gas control program may include code for controlling gas composition, flow rates, pulse times, and optionally for flowing gas into the chamber prior to deposition in order to stabilize the pressure in the chamber. A pressure control program may include code for controlling the pressure in the chamber by regulating, e.g., a throttle valve in the exhaust system of the chamber. A heater control program may include code for controlling the current to a heating unit that is used to heat the substrate. Alternatively, the heater control program may control delivery of a heat transfer gassuch as helium to the wafer chuck.

[0160] Examples of chamber sensors that may be monitored during deposition include mass flow controllers, pressure sensors such as manometers, and thermocouples located in the pedestal or chuck. Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain desired process conditions.

[0161] Figure 12 depicts a schematic illustration of an embodiment of a station of a process tool 1200 having a process chamber 1202 for maintaining a low pressure environment. In some embodiments, a plurality of process stations may be included in a common low-pressure process tool environment. For example, Figure 11 depicts an embodiment of a multi-station processing tool 1109. In some embodiments, one or more hardware parameters of process tool 1200, including those discussed in detail below, may be adjusted programmatically by one or more computer controllers 1250. In some other embodiments, a process chamber may be a single station chamber.

[0162] Process tool 1200 fluidly communicates with reactant delivery system 1201a for delivering process gases to a distribution showerhead 1206. Reactant delivery system 1201a includes a mixing vessel 1204 for blending and / or conditioning process gases, such as a Mo precursor containing gas, a hydrogen-containing gas, an argon or other carrier gas, or other reactant-containing gas, for delivery to showerhead 1226. One or more mixing vessel valves 1220 may control introduction of process gases to mixing vessel 1204.

[0163] As an example, the embodiment of Figure 12 includes a vaporization point 1203 for vaporizing liquid reactant to be supplied to the mixing vessel 1204. In some embodiments, vaporization point 1203 may be a heated vaporizer. In some embodiments, a liquid precursor or liquid reactant may be vaporized at a liquid injector (not shown). For example, a liquid injector may inject pulses of a liquid reactant into a carrier gas stream upstream of the mixing vessel 1204. In one embodiment, a liquid injector may vaporize the reactant by flashing the liquid from a higher pressure to a lower pressure. In another example, a liquid injector may atomize the liquid into dispersed microdroplets that are subsequently vaporized in a heated delivery pipe. Smaller droplets may vaporize faster than larger droplets, reducing a delay between liquid injection and complete vaporization. Faster vaporization may reduce a length of piping downstream from vaporization point 1203. In one scenario, a liquid injector may be mounted directly to mixing vessel 804. In another scenario, a liquid injector may be mounted directly to showerhead 806.

[0164] In some embodiments, a liquid flow controller (LFC) upstream of vaporization point 1203 may be provided for controlling a mass flow of liquid for vaporization and delivery to processchamber 1202. For example, the LFC may include a thermal mass flow meter (MFM) located downstream of the LFC. A plunger valve of the LFC may then be adjusted responsive to feedback control signals provided by a proportional-integral-derivative (PID) controller in electrical communication with the MFM. However, it may take one second or more to stabilize liquid flow using feedback control. This may extend a time for dosing a liquid reactant. Thus, in some embodiments, the LFC may be dynamically switched between a feedback control mode and a direct control mode. In some embodiments, this may be performed by disabling a sense tube of the LFC and the PID controller.

[0165] Showerhead 806 distributes process gases toward substrate 1212. In the embodiment shown in Figure 12, the substrate 1212 is located beneath showerhead 1206 and is shown resting on a pedestal 1208. Showerhead 1206 may have any suitable shape and may have any suitable number and arrangement of ports for distributing process gases to substrate 1212. The substrate 1212 may be considered to be nominally flat with the thickness (including variations from different deposited layers) much thinner than its other dimensions. As described above, it can be for example, a 300 mm circular wafer. A vertical feature has an opening that faces the showerhead 1206 and is oriented such that plasma species can be attracted to a feature bottom by biasing the substrate 1212. A horizontal feature, such as a 3D DRAM feature, is oriented parallel to the plane of the wafer, with an opening facing about ninety degrees away from the showerhead.

[0166] In some embodiments, pedestal 1208 may be raised or lowered to expose substrate 1212 to a volume between the substrate 1212 and the showerhead 1206. In some embodiments, pedestal 808 may be temperature controlled via heater 1210. Pedestal 1208 may be set to any suitable temperature, such as between about 300°C and about 500°C during operations for performing various disclosed embodiments. It will be appreciated that, in some embodiments, pedestal height may be adjusted programmatically by a suitable computer controller 1250. At the conclusion of a process phase, pedestal 1208 may be lowered during another substrate transfer phase to allow removal of substrate 1212 from pedestal 1208.

[0167] In some embodiments, a position of showerhead 1206 may be adjusted relative to pedestal 1208 to vary a volume between the substrate 1212 and the showerhead 1206. Further, it will be appreciated that a vertical position of pedestal 1208 and / or showerhead 1206 may be varied by any suitable mechanism within the scope of the present disclosure. In some embodiments, pedestal 1208 may include a rotational axis for rotating an orientation of substrate 1212. It will be appreciated that, in some embodiments, one or more of these example adjustments may be performed programmatically by one or more suitable computer controllers 1250. The computer controller 1250 may include any of the features described above with respect to controller 1129 ofFigure 11A or 1 IB. Delivery of a solid precursor may be from an ampoule box 1213.

[0168] In some embodiments where plasma may be used as discussed above, showerhead 1206 and pedestal 1208 electrically communicate with a radio frequency (RF) power supply 1214 and matching network 1216 for powering a plasma. In some embodiments, the plasma energy may be controlled by controlling one or more of a process station pressure, a gas concentration, an RF source power, an RF source frequency, and a plasma power pulse timing. For example, RF power supply 1214 and matching network 1216 may be operated at any suitable power to form a plasma having a desired composition of radical species. Likewise, RF power supply 1214 may provide RF power of any suitable frequency. In some embodiments, RF power supply 1214 may be configured to control high- and low-frequency RF power sources independently of one another. Example low-frequency RF frequencies may include, but are not limited to, frequencies between 0 kHz and 900 kHz. Example high-frequency RF frequencies may include, but are not limited to, frequencies between 1.8 MHz and 2.45 GHz, or greater than about 13.56 MHz, or greater than 27 MHz, or greater than 80 MHz, or greater than 60 MHz. It will be appreciated that any suitable parameters may be modulated discretely or continuously to provide plasma energy for the surface reactions.

[0169] In some embodiments, the plasma may be monitored in-situ by one or more plasma monitors. In one scenario, plasma power may be monitored by one or more voltage, current sensors (e.g., VI probes). In another scenario, plasma density and / or process gas concentration may be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters may be programmatically adjusted based on measurements from such in-situ plasma monitors. For example, an OES sensor may be used in a feedback loop for providing programmatic control of plasma power. It will be appreciated that, in some embodiments, other monitors may be used to monitor the plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

[0170] In some embodiments, instructions for a controller 1250 may be provided via input / output control (IOC) sequencing instructions. In one example, the instructions for setting conditions for a process phase may be included in a corresponding recipe phase of a process recipe. In some cases, process recipe phases may be sequentially arranged, so that all instructions for a process phase are executed concurrently with that process phase. In some embodiments, instructions for setting one or more reactor parameters may be included in a recipe phase. For example, a first recipe phase may include instructions for setting a flow rate of an inert and / or a reactant gas (e.g., a Mo or Ti precursor), instructions for setting a flow rate of a carrier gas (suchas argon), and time delay instructions for the first recipe phase. A second, subsequent recipe phase may include instructions for modulating or stopping a flow rate of an inert and / or a reactant gas, and instructions for modulating a flow rate of a carrier or purge gas and time delay instructions for the second recipe phase. A third recipe phase may include instructions for modulating a flow rate of a second reactant gas such as NH3 or H2, instructions for modulating the flow rate of a carrier or purge gas, instructions for igniting a plasma, and time delay instructions for the third recipe phase. A fourth, subsequent recipe phase may include instructions for modulating or stopping a flow rate of an inert and / or a reactant gas, and instructions for modulating a flow rate of a carrier or purge gas and time delay instructions for the fourth recipe phase. It will be appreciated that these recipe phases may be further subdivided and / or iterated in any suitable way within the scope of the present disclosure.

[0171] Further, in some embodiments, pressure control for process tool 1200 may be provided by butterfly valve 1218. As shown in the embodiment of Figure 12, butterfly valve 1218 throttles a vacuum provided by a downstream vacuum pump (not shown). However, in some embodiments, pressure control of process tool 1200 may also be adjusted by varying a flow rate of one or more gases introduced to the process tool 1200.

[0172] In some embodiments, a single station may be used to deposit different materials at different times. In such embodiments, a multi-plenum showerhead may be used along with separate pumping lines.

[0173] The foregoing describes implementation of disclosed embodiments in a single or multichamber semiconductor processing tool. The apparatus and process described herein may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels, and the like. Typically, though not necessarily, such tools / processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically includes some or all of the following steps, each step provided with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

Claims

CLAIMS1. A method comprisin : providing a substrate comprising a feature having a silicon feature bottom and feature sidewalls to a substrate processing tool under vacuum; depositing a molybdenum-containing layer selectively on the silicon feature bottom to form a molybdenum silicide layer in the substrate processing tool; and depositing a titanium nitride layer conformally in the feature in the substrate processing tool.

2. The method of claim 1 , wherein the feature is one of a plurality of features oriented horizontally with respect to the substrate.

3. The method of claim 2, wherein the depositing a molybdenum-containing layer selectively on the silicon feature bottom comprises introducing pulses of a molybdenum halide to selectively deposit the molybdenum-containing layer by thermal atomic layer deposition (ALD).

4. The method of claim 3, wherein the thermal ALD deposition comprises reacting molybdenum halide with hydrogen (H2).

5. The method of claim 4, wherein the molar ratio of the H2 to the molybdenum halide is at least 10:1.

6. The method of claim 1 , wherein depositing the molybdenum-containing layer selectively on the silicon feature bottom to form a molybdenum silicide layer is performed in a first chamber of the substrate processing tool and depositing a titanium nitride layer conformally in the feature is performed in a second chamber of the substrate processing tool.

7. The method of claim 1 , further comprising transferring the substrate from a first chamber to a second chamber of the substrate processing tool using a transfer chamber.

8. The method of claim 7, wherein a pressure in the transfer chamber is no more than 10’6Torr during transfer.

9. The method of claim 7, wherein a partial pressure of water in the transfer chamber is nomore than 10’7Torr during transfer.

10. The method of claim 1 , further comprising performing a nitridation surface treatment on the molybdenum silicide layer prior to depositing titanium nitride.

11. The method of claim 1 , further comprising exposing the silicon feature bottom to a chemistry to remove native oxide from the silicon feature bottom.

12. The method of claim 1 , wherein depositing a molybdenum-containing layer selectively on the silicon feature bottom to form a molybdenum silicide and depositing a titanium nitride layer conformally in the feature are performed in the same chamber of the substrate processing tool.

13. A method, comprising: providing a substrate comprising a feature having a feature bottom and feature sidewalls to a substrate processing tool under vacuum; depositing a metal-containing layer in the feature in the substrate processing tool; and depositing a metal nitride layer on the metal-containing layer in the substrate processing tool.

14. The method of claim 13, wherein the feature bottom comprises an oxidized semiconductor surface and the method further comprising removing oxide from the semiconductor surface in the substrate processing tool.

15. The method of claim 14, wherein the metal-containing layer is a molybdenum-containing layer.

16. The method of claim 15, wherein the feature bottom comprises a silicon surface and the molybdenum is deposited on the silicon surface to form a molybdenum silicide.

17. The method of claim 16, wherein the metal nitride layer is a titanium nitride layer.

18. The method of claim 13, wherein depositing a metal-containing layer and depositing a metal nitride layer are performed in different chambers.

19. The method of claim 13, wherein depositing a metal-containing layer and depositing a metal nitride layer are performed in different stations of a multi- station chamber.

20. The method of claim 13, wherein the metal nitride layer further comprises silicon.

21. The method of claim 13, wherein the metal nitride layer conformally coats a recessed feature.

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