Drive backplane and manufacturing method therefor, display panel and display apparatus

By setting multiple passivation layers and a high-oxygen-content interlayer dielectric layer in the drive backplane, the channel conductivity problem caused by hydrogen atom diffusion is solved, ensuring the normal operation of the drive backplane.

WO2026015996A1PCT designated stage Publication Date: 2026-01-22BOE TECHNOLOGY GROUP CO LTD +1
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Patent Information

Application Number
PCT/CN2024/105406
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-07-15
Publication Date
2026-01-22

AI Technical Summary

Technical Problem

During the manufacturing process of the display panel, hydrogen atoms diffuse into the active layer, causing the channel to become conductive, which affects the normal operation of the drive backplane.

Method used

Multiple passivation layers, including a first passivation layer and a second passivation layer, are provided in the drive backplane, and a high oxygen content material is introduced in the interlayer dielectric layer to block the diffusion of hydrogen atoms.

Benefits of technology

It effectively blocks the downward diffusion of hydrogen atoms, improves the channel conductivity problem caused by hydrogen atoms diffusing into the active layer, and ensures the normal operation of the drive backplane.

✦ Generated by Eureka AI based on patent content.

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Abstract

Disclosed is a drive backplane relating to the technical field of display. The drive backplane comprises a base substrate, and a first active layer, a first gate electrode, a first interlayer dielectric layer, a first source / drain electrode, a first passivation layer, and a second passivation layer that are arranged in a direction away from the base substrate. The orthographic projection of the first active layer on the base substrate at least partially overlaps with the orthographic projection of the first interlayer dielectric layer on the base substrate. The manufacturing material of the first interlayer dielectric layer comprises an oxide. The hydrogen content of the first passivation layer is less than the hydrogen content of the second passivation layer. The present application can improve the problem of channel conductivity caused by diffusion of hydrogen atoms to the first active layer.
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Description

Drive backplate and its manufacturing method, display panel, display device Technical Field

[0001] This application relates to the field of display technology, and in particular to a driving backplate and its manufacturing method, a display panel, and a display device. Background Technology

[0002] Display devices have a wide range of applications in daily life, such as mobile phones, tablets, and other electronic devices. The display panel is an important component of a display device, and it includes a driver backplane.

[0003] In related technologies, the driving backplane includes a substrate and an active layer, a gate, an interlayer dielectric layer, a source / drain electrode, and a passivation layer that are sequentially stacked on the substrate.

[0004] However, during the manufacturing process of the display panel, such as when making the encapsulation layer above the source and drain electrodes, a large number of hydrogen atoms may be introduced. These hydrogen atoms may diffuse into the active layer and cause channel conductors, affecting the normal operation of the drive backplane.

[0005] Summary of the Invention

[0006] This application provides a driving backplane and its manufacturing method, a display panel, and a display device. The technical solution is as follows:

[0007] On one hand, a driving backplane is provided, the driving backplane including a substrate, and a first active layer, a first gate, a first interlayer dielectric layer, a first source / drain, a first passivation layer and a second passivation layer disposed in a direction away from the substrate, wherein the orthographic projection of the first active layer on the substrate at least partially coincides with the orthographic projection of the first interlayer dielectric layer on the substrate, the material of the first interlayer dielectric layer includes an oxide, and the hydrogen content of the first passivation layer is less than the hydrogen content of the second passivation layer.

[0008] Optionally, the oxygen content of the first interlayer dielectric layer is greater than or equal to 50%.

[0009] Optionally, the first interlayer dielectric layer is in contact with the first active layer.

[0010] Optionally, the material used to fabricate the first passivation layer includes nitride, and the material used to fabricate the second passivation layer also includes nitride, wherein the density of the first passivation layer is less than the density of the second passivation layer.

[0011] Optionally, the material used to fabricate the first passivation layer includes nitrides, and the density of the first passivation layer is greater than the density of the first interlayer dielectric layer.

[0012] Optionally, the material used to fabricate the first passivation layer includes an oxide, and the oxygen content of the first interlayer dielectric layer is greater than the oxygen content of the first passivation layer.

[0013] Optionally, the material used to fabricate the first passivation layer includes an oxide, and the oxygen content of the first passivation layer is greater than or equal to 50%.

[0014] Optionally, the drive backplane further includes a third passivation layer, which is located on the side of the second passivation layer away from the substrate, and the density of the third passivation layer is greater than that of the second passivation layer.

[0015] Optionally, the drive backplane further includes a second interlayer dielectric layer, which is located between the first interlayer dielectric layer and the first source / drain electrode, and the density of the second interlayer dielectric layer is greater than that of the first interlayer dielectric layer.

[0016] Optionally, the drive backplane further includes a third interlayer dielectric layer, which is located between the second interlayer dielectric layer and the first source / drain electrode. The material of the third interlayer dielectric layer includes oxide, and the oxygen content of the third interlayer dielectric layer is greater than or equal to 50%.

[0017] Optionally, the drive backplane further includes a fourth interlayer dielectric layer, which is located between the third interlayer dielectric layer and the first source / drain electrode, and the density of the fourth interlayer dielectric layer is greater than that of the third interlayer dielectric layer.

[0018] Optionally, the drive backplane further includes a first gate insulating layer located between the first active layer and the first gate, wherein the material of the first gate insulating layer includes oxide, and the oxygen content of the first gate insulating layer is greater than or equal to 50%.

[0019] Optionally, the drive backplane further includes a first buffer layer located between the substrate and the first active layer, the first buffer layer being in contact with the first active layer, the first buffer layer being made of an oxide material, and the oxygen content of the first buffer layer being greater than or equal to 50%.

[0020] Optionally, the material used to fabricate the first interlayer dielectric layer includes one of silicon oxide, hafnium oxide, zirconium oxide, and aluminum oxide.

[0021] Optionally, the mobility of the material used to fabricate the first active layer is greater than or equal to 20 square centimeters / (volts per second), and the channel length of the first active layer is less than or equal to 4 micrometers.

[0022] On the other hand, a method for fabricating a drive backplane is provided, the method comprising: providing a substrate; forming a first active layer on the substrate; forming a first gate on the first active layer; forming a first interlayer dielectric layer on the first gate; forming a first source / drain on the first interlayer dielectric layer; forming a first passivation layer on the first source / drain; forming a second passivation layer on the first passivation layer; wherein the orthographic projection of the first active layer on the substrate at least partially overlaps with the orthographic projection of the first interlayer dielectric layer on the substrate, the material of the first interlayer dielectric layer comprising an oxide, and the hydrogen content of the first passivation layer being less than the hydrogen content of the second passivation layer.

[0023] Optionally, forming the first interlayer dielectric layer includes: forming the first interlayer dielectric layer using an atomic layer deposition apparatus; or, forming the first interlayer dielectric layer includes: forming a first interlayer dielectric material layer; and performing surface treatment on the first interlayer dielectric material layer using a target gas source, wherein the target gas source is nitrous oxide.

[0024] Optionally, forming the first passivation layer includes: forming a first passivation material layer on the first source and drain electrodes; and performing surface treatment on the first passivation material layer using a target gas source to form the first passivation layer, wherein the target gas source is nitrous oxide.

[0025] In another aspect, a display panel is provided, the display panel including any of the aforementioned driving backplates, and a plurality of light-emitting units located on the driving backplates.

[0026] In another aspect, a display device is provided, the display device including a power supply circuit and the aforementioned display panel, wherein the power supply circuit supplies power to the display panel.

[0027] The beneficial effects of the technical solution provided in this application include at least the following: by fabricating multiple passivation layers, namely a first passivation layer and a second passivation layer, the downward diffusion of hydrogen atoms can be better blocked, thereby improving the problem of channel conductor formation caused by hydrogen atoms diffusing to the first active layer. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 is a schematic cross-sectional view of a drive backplate provided in an embodiment of this application;

[0030] Figure 2 is a schematic diagram of a planar structure of a drive backplate provided in an embodiment of this application;

[0031] Figure 3 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0032] Figure 4 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0033] Figure 5 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0034] Figure 6 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0035] Figure 7 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0036] Figure 8 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0037] Figure 9 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0038] Figure 10 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0039] Figure 11 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0040] Figure 12 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0041] Figure 13 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0042] Figure 14 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0043] Figure 15 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0044] Figure 16 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0045] Figure 17 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0046] Figure 18 is a schematic cross-sectional view of another drive backplate provided in an embodiment of this application;

[0047] Figure 19 is a flowchart illustrating a method for manufacturing a drive backplane according to an embodiment of this application;

[0048] Figures 20 and 21 are schematic flowcharts of another method for manufacturing a drive backplane provided in the embodiments of this application;

[0049] Figure 22 is a schematic cross-sectional view of a display panel provided in an embodiment of this application;

[0050] Figure 23 is a schematic diagram of the planar structure of a display panel provided in an embodiment of this application. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0052] In related technologies, the driving backplane includes a substrate and an active layer, a gate layer, an interlayer dielectric layer, a source / drain electrode, and a passivation layer that are sequentially stacked on the substrate.

[0053] However, during the manufacturing process of the display panel, such as when making the encapsulation layer above the source and drain electrodes, a large number of hydrogen atoms may be introduced. These hydrogen atoms may diffuse into the active layer and cause channel conductors, affecting the normal operation of the drive backplane.

[0054] Therefore, embodiments of this application provide a driving backplate that, by providing multiple passivation layers, effectively blocks downward-diffusing hydrogen atoms.

[0055] Figure 1 is a cross-sectional schematic diagram of a driving backplane provided in an embodiment of this application, and Figure 2 is a planar schematic diagram of a driving backplane provided in an embodiment of this application. Figure 1 is a cross-sectional schematic diagram of Figure 2 at section line AA. As shown in Figures 1 and 2, the driving backplane includes a substrate 1, and a first active layer 21, a first gate 31, a first interlayer dielectric layer 41, a first source / drain 51, a first passivation layer 71, and a second passivation layer 72 disposed along a direction z away from the substrate 1. The orthographic projection of the first active layer 21 on the substrate 1 at least partially coincides with the orthographic projection of the first interlayer dielectric layer 41 on the substrate 1. The material of the first interlayer dielectric layer 41 includes oxide, and the hydrogen content of the first passivation layer is less than the hydrogen content of the second passivation layer.

[0056] During the manufacturing process of the display panel, such as when fabricating the encapsulation layer above the first source / drain 51, a relatively large number of hydrogen atoms may be introduced. This is because the encapsulation layer typically includes a dense silicon nitride layer to prevent moisture from the air from entering the display panel, thereby improving the product reliability of the display panel. However, since the silicon nitride layer is usually fabricated using plasma-enhanced chemical vapor deposition (PECVD), and the gas source includes silane and ammonia, a relatively large number of hydrogen atoms are generated during the fabrication of the silicon nitride layer within the encapsulation layer. Hydrogen atoms carry electrons, and if these hydrogen atoms diffuse to the first active layer 21, it may cause channel conductor problems, thereby affecting the switching characteristics of the thin-film transistor and causing abnormal operation of the driving backplane.

[0057] This embodiment of the application utilizes multiple passivation layers, specifically a first passivation layer 71 and a second passivation layer 72, to effectively block downward-diffusing hydrogen atoms. Since hydrogen atoms pass through the second passivation layer 72 before the first passivation layer 71 during downward diffusion, the hydrogen content of the first passivation layer 71 is lower than that of the second passivation layer 72. This mitigates the channel conductivity problem caused by hydrogen atoms diffusing into the first active layer. Furthermore, by using an oxide as the material for the first interlayer dielectric layer 41, hydrogen atoms can combine with oxygen atoms in the first interlayer dielectric layer 41 and connect to silicon atoms in the form of hydroxyl groups during diffusion towards the first active layer 21.

[0058] It should be noted that the hydrogen content mentioned above refers to the molar percentage of oxygen. For example, a dynamic secondary ion mass spectrometer (DSIMS) can be used to detect the hydrogen content in the first passivation layer 71 and the second passivation layer 72.

[0059] It should be noted that Figure 1 only illustrates a cross-sectional view of a thin-film transistor in the driving backplane.

[0060] For example, the substrate 1 includes a peripheral region C and a display region D, with the peripheral region C surrounding the display region D. The thin-film transistor containing the first active layer 21 in this embodiment can be a thin-film transistor located in the display region D as shown in Figures 1 and 2, or it can be a thin-film transistor located in the peripheral region C, such as a thin-film transistor in the gate driving circuit located in the peripheral region C.

[0061] In summary, the driving backplane provided in this application embodiment, by fabricating multiple passivation layers, namely a first passivation layer and a second passivation layer, can better block downward diffusion of hydrogen atoms, thereby improving the channel conductivity problem caused by hydrogen atoms diffusing to the first active layer.

[0062] Figure 3 is a schematic cross-sectional view of a drive backplane provided in an embodiment of this application. As shown in Figure 3, the oxygen content of the first interlayer dielectric layer 41 is greater than or equal to 50%. It should be noted that, compared with the embodiment shown in Figure 1, the first interlayer dielectric layer 41 in Figure 3 is patterned to indicate that the oxygen content of the first interlayer dielectric layer 41 is greater than or equal to 50%. Optionally, the oxygen content of the first interlayer dielectric layer 41 is greater than or equal to 50% and less than or equal to 60%.

[0063] In related technologies, the oxygen content of the interlayer dielectric layer is low, typically less than or equal to 40%. Therefore, during the diffusion of hydrogen atoms towards the active layer, the hydrogen atoms cannot fully combine with the oxygen atoms in the first interlayer dielectric layer 41, resulting in some hydrogen atoms still diffusing to the active layer and causing channel conductivity. This embodiment increases the oxygen content of the first interlayer dielectric layer, allowing hydrogen atoms generated above the first interlayer dielectric layer to fully combine with the oxygen atoms in the first interlayer dielectric layer during downward diffusion. This improves the channel conductivity problem caused by hydrogen atoms diffusing to the first active layer. Optionally, the first interlayer dielectric layer 41 is also called an oxygen storage layer.

[0064] It should be noted that the oxygen content of 50% or more mentioned above refers to the molar percentage of oxygen in the first interlayer dielectric layer 41 being greater than or equal to 50%. For example, the oxygen content in the first interlayer dielectric layer 41 can be detected using an energy dispersive spectrometer (EDS).

[0065] For example, the material used to fabricate the first interlayer dielectric layer 41 includes one of silicon oxide, hafnium oxide, zirconium oxide, and aluminum oxide. All four materials are oxides, which helps to increase the oxygen content of the first interlayer dielectric layer 41. Furthermore, since the first interlayer dielectric layer 41 is close to the first active layer 21, it is necessary to introduce as few hydrogen atoms as possible during the fabrication of the first interlayer dielectric layer 41, i.e., during the fabrication of structural layers such as silicon oxide, hafnium oxide, zirconium oxide, or aluminum oxide. Taking silicon oxide as an example, silicon oxide layers are typically fabricated using plasma-enhanced chemical vapor deposition, and the gas source includes silane and nitrous oxide. Therefore, the gas source used to fabricate the silicon oxide layer contains fewer hydrogen atoms than the gas source used to fabricate the silicon nitride layer, resulting in fewer hydrogen atoms being generated during the fabrication of the silicon oxide layer. For example, by using nitrous oxide surface treatment, such as plasma treatment, the oxygen content of the first interlayer dielectric layer 41 can be increased to greater than or equal to 50%.

[0066] For example, as shown in FIG3, the driving backplane also includes a first gate insulating layer 61 located between the first active layer 21 and the first gate 31.

[0067] In one possible embodiment, as shown in FIG3, the orthographic projection of the first gate insulating layer 61 on the substrate 1 is located within the orthographic projection of the first active layer 21 on the substrate 1. That is, the outer edge of the orthographic projection of the first active layer 21 on the substrate 1 surrounds the outer edge of the orthographic projection of the first gate insulating layer 61 on the substrate 1.

[0068] For example, as shown in FIG3, the first interlayer dielectric layer 41 is in contact with the first active layer 21. For the first interlayer dielectric layer 41 located above and in contact with the first active layer 21, by setting the oxygen content of the first interlayer dielectric layer 41 to be greater than or equal to 50%, the first interlayer dielectric layer 41 can sufficiently absorb downwardly diffused hydrogen elements, minimizing the diffusion of hydrogen atoms to the first active layer 21 and thus preventing channel conductivity. Furthermore, compared to embodiments where the high-oxygen-content first interlayer dielectric layer 41 is not in contact with the first active layer 21, the high-oxygen-content first interlayer dielectric layer 41 in contact with the first active layer 21 can further prevent hydrogen atoms from diffusing to the first active layer 21 and causing channel conductivity.

[0069] In another possible embodiment, the outer edge of the orthogonal projection of the first gate insulating layer 61 on the substrate 1 may surround the outer edge of the orthogonal projection of the first active layer 21 on the substrate 1. In this embodiment, the first interlayer dielectric layer 41 does not contact the first active layer 21.

[0070] In this embodiment of the application, as shown in FIG3, the first passivation layer 71 is made of an oxide material, and the oxygen content of the first interlayer dielectric layer 41 is greater than that of the first passivation layer 71. By making the oxygen content of the first interlayer dielectric layer 41 greater than that of the first passivation layer 71, during the diffusion of hydrogen atoms toward the first active layer 21, the hydrogen atoms can fully combine with the oxygen atoms in the first interlayer dielectric layer 41 and connect with silicon atoms in the form of hydroxyl groups. In this way, the channel conductivity problem caused by the diffusion of hydrogen atoms to the first active layer can be improved. Optionally, the first passivation layer 71 is made of silicon oxide.

[0071] Figure 4 is a schematic cross-sectional view of another drive backplane provided in an embodiment of this application. As shown in Figure 4, the material used to fabricate the first passivation layer 71 includes oxides, and the oxygen content of the first passivation layer 71 is greater than or equal to 50%. By providing a high-oxygen-content first passivation layer 71 above the high-oxygen-content first interlayer dielectric layer 41, it is possible to further ensure that during the diffusion of hydrogen atoms towards the first active layer 21, hydrogen atoms can fully combine with oxygen atoms in the first passivation layer 71, and hydrogen atoms can fully combine with oxygen atoms in the first interlayer dielectric layer 41. In this way, the channel conductivity problem caused by hydrogen atoms diffusing to the first active layer can be further improved. The first passivation layer 71 in the embodiment shown in Figure 4 can also be referred to as an oxygen storage layer.

[0072] It should be noted that the first passivation layer 71 in Figure 4 has the same pattern filling as the first interlayer dielectric layer 41 with high oxygen content, to show that the oxygen content of the first passivation layer 71 is also high, greater than or equal to 50%.

[0073] Figure 5 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. As shown in Figure 5, the density of the first passivation layer 71 is greater than that of the first interlayer dielectric layer 41. By providing a dense first passivation layer 71 above the high-oxygen-content first interlayer dielectric layer 41, the first passivation layer 71 can block the diffusion of hydrogen atoms, which helps to further improve the channel conductivity problem caused by hydrogen atoms diffusing to the first active layer. Optionally, the material used to fabricate the first passivation layer 71 includes silicon nitride to make the density of the first passivation layer 71 relatively large. Here, as mentioned above, even if hydrogen atoms may be introduced during the fabrication of the first passivation layer 71 including silicon nitride, since the hydrogen atoms introduced during the fabrication of the first passivation layer 71 can combine with the oxygen atoms in the high-oxygen-content first interlayer dielectric layer 41, the hydrogen atoms introduced during the fabrication of the first passivation layer 71 will not affect the channel region of the first active layer 61 or will have a very small impact. It should be noted that high density means that the distance between two adjacent atoms is smaller. Therefore, the higher the density, the better the effect of blocking hydrogen atoms from diffusing downwards.

[0074] It should be noted that the first passivation layer 71 in Figure 5 has a different pattern filling than the first interlayer dielectric layer 41, in order to show that the density of the first passivation layer 71 is greater than that of the first interlayer dielectric layer 41.

[0075] Figure 6 is a schematic cross-sectional view of another drive backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 3, in the embodiment shown in Figure 6, the material used to fabricate the first passivation layer 71 includes nitride, and the material used to fabricate the second passivation layer 72 includes nitride. The density of the first passivation layer 71 is less than the density of the second passivation layer 72. By providing a second passivation layer 72 with higher density on the first passivation layer 71, the second passivation layer 72 can block downward diffusion of hydrogen atoms as much as possible, thereby minimizing the number of hydrogen atoms that continue to diffuse downward through the second passivation layer 72. This helps to further improve the channel conductivity problem caused by hydrogen atoms diffusing to the first active layer.

[0076] Optionally, both the first passivation layer 71 and the second passivation layer 72 are made of silicon nitride. Optionally, the density of the first passivation layer 71 is greater than the density of the first interlayer dielectric layer 41. Here, as mentioned above, even if hydrogen atoms may be introduced during the fabrication of the second passivation layer 72 comprising silicon nitride, since the hydrogen atoms introduced during the fabrication of the second passivation layer 72 can combine with oxygen atoms in the first interlayer dielectric layer 41 with high oxygen content, the hydrogen atoms introduced during the fabrication of the second passivation layer 72 will not affect the channel region of the first active layer 61 or will have a very small impact.

[0077] Optionally, the first passivation layer 71 and the second passivation layer 72 can be fabricated by means of, for example, plasma-enhanced chemical vapor deposition. By changing the process parameters, the first passivation layer 71 and the second passivation layer 72 with different densities can be formed.

[0078] The following provides an exemplary description of various possible structures of the interlayer dielectric layer located between the first gate 31 and the first source / drain 51.

[0079] Figure 7 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 3, in the embodiment shown in Figure 7, the driving backplane further includes a second interlayer dielectric layer 42, which is located between the first interlayer dielectric layer 41 and the first source / drain electrode 51, and the density of the second interlayer dielectric layer 42 is greater than that of the first interlayer dielectric layer 41. By providing a high-density second interlayer dielectric layer 42 above the high-oxygen-content first interlayer dielectric layer 41, the second interlayer dielectric layer 42 can block the diffusion of hydrogen atoms, which is beneficial to further improve the channel conductor problem caused by the diffusion of hydrogen atoms to the first active layer 21.

[0080] Optionally, the material used to fabricate the second interlayer dielectric layer 42 includes silicon nitride to achieve a higher density. Here, as mentioned earlier, even if hydrogen atoms may be introduced during the fabrication of the silicon nitride-based second interlayer dielectric layer 42, these hydrogen atoms can combine with oxygen atoms in the high-oxygen-content first interlayer dielectric layer 41. Therefore, the hydrogen atoms introduced during the fabrication of the second interlayer dielectric layer 42 will not affect the channel region of the first active layer 61, or will have a minimal impact.

[0081] Furthermore, since silicon nitride layers offer better coverage compared to silicon oxide layers, the inventors discovered in experiments that silicon nitride layers are less prone to cracking at step locations. Therefore, two interlayer dielectric layers were fabricated, with the second interlayer dielectric layer 42 made of silicon nitride. This helps mitigate the problem of cracks appearing at step locations in the interlayer dielectric layer, thereby improving the short circuit problem between the first gate 31 and the first source / drain 51. Even if cracks appear in the first interlayer dielectric layer 41 at the step location, the material of the second interlayer dielectric layer 42 can fill the cracks in the first interlayer dielectric layer 41, thus improving the problem of cracks appearing at step locations. Here, the step location refers to the edge of the first gate 31.

[0082] For example, as shown in FIG7, a first interlayer dielectric layer 41 is formed by plasma-enhanced chemical vapor deposition, and the thickness of the first interlayer dielectric layer 41 is 200 nanometers to 400 nanometers, and the thickness of the second interlayer dielectric layer 42 is 100 nanometers to 200 nanometers.

[0083] For example, as shown in FIG7, an atomic layer deposition (ALD) device is used to form a first interlayer dielectric layer 41, and the thickness of the first interlayer dielectric layer 41 is 30 nanometers to 50 nanometers, and the thickness of the second interlayer dielectric layer 42 is 200 nanometers to 500 nanometers.

[0084] Figure 8 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 7, in the embodiment shown in Figure 8, the driving backplane further includes a third interlayer dielectric layer 43. The third interlayer dielectric layer 43 is located between the second interlayer dielectric layer 42 and the first source / drain electrode 51. The material of the third interlayer dielectric layer 43 includes oxide, and the oxygen content of the third interlayer dielectric layer 43 is greater than or equal to 50%. By providing a high-oxygen-content third interlayer dielectric layer 43 above the second interlayer dielectric layer 42, the oxygen atoms in the third interlayer dielectric layer 43 can fully combine with hydrogen atoms diffused towards the first active layer 21. Furthermore, the oxygen atoms in the third interlayer dielectric layer 43 can also fully combine with hydrogen atoms introduced during the fabrication of the second interlayer dielectric layer 42, which helps to further improve the channel conductivity problem caused by hydrogen atoms diffusing to the first active layer. The third interlayer dielectric layer 43 can also be called an oxygen storage layer.

[0085] For example, as shown in FIG8, the thickness of the first interlayer dielectric layer 41 is 100 nanometers to 200 nanometers, the thickness of the second interlayer dielectric layer 42 is 100 nanometers to 200 nanometers, and the thickness of the third interlayer dielectric layer 43 is 100 nanometers to 200 nanometers.

[0086] Figure 9 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 8, in the embodiment shown in Figure 9, the driving backplane further includes a fourth interlayer dielectric layer 44, which is located between the third interlayer dielectric layer 43 and the first source / drain electrode 51, and the density of the fourth interlayer dielectric layer 44 is greater than that of the third interlayer dielectric layer 43. By providing a high-density fourth interlayer dielectric layer 44 above the high-oxygen-content third interlayer dielectric layer 43, the fourth interlayer dielectric layer 44 can block the diffusion of hydrogen atoms, which is beneficial to further improve the channel conductor problem caused by the diffusion of hydrogen atoms to the first active layer 21.

[0087] Optionally, the fourth interlayer dielectric layer 44 is made of silicon nitride to achieve a higher density. Here, as mentioned earlier, even though hydrogen atoms may be introduced during the fabrication of the silicon nitride-based fourth interlayer dielectric layer 44, these hydrogen atoms can combine with oxygen atoms in the high-oxygen-content third interlayer dielectric layer 43. Therefore, the hydrogen atoms introduced during the fabrication of the fourth interlayer dielectric layer 44 will not affect the channel region of the first active layer 61, or will have a minimal impact.

[0088] Furthermore, similar to the embodiment shown in FIG7, by fabricating a second interlayer dielectric layer 42 and a fourth interlayer dielectric layer 44 with better coverage, it is beneficial to improve the problem of cracks appearing at the step of the interlayer dielectric layer, thereby improving the problem of short circuit between the first gate 31 and the first source drain 51.

[0089] For example, as shown in FIG9, the thickness of the first interlayer dielectric layer 41 is 100 nanometers to 300 nanometers, the thickness of the second interlayer dielectric layer 42 is 50 nanometers to 100 nanometers, the thickness of the third interlayer dielectric layer 43 is 50 nanometers to 100 nanometers, and the thickness of the fourth interlayer dielectric layer 44 is 50 nanometers to 100 nanometers.

[0090] In other possible embodiments, more high-oxygen-content interlayer media layers and / or high-density interlayer media layers may be disposed above the fourth interlayer media layer 44, which will not be elaborated here.

[0091] In the embodiment shown in Figure 6, the materials used to fabricate the first passivation layer 71 and the second passivation layer 72 both include nitrides, and the density of the first interlayer dielectric layer 41, the first passivation layer 71, and the second passivation layer 72 increases sequentially. Other possible structural combinations of the first interlayer dielectric layer 41 and the passivation layer located on the first source / drain electrode 51 will be illustrated below.

[0092] Figure 10 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 3, in the embodiment shown in Figure 10, the first interlayer dielectric layer 41 is made of an oxide material with a high oxygen content, the first passivation layer 71 is made of an oxide material, the second passivation layer 72 is made of a nitride material, and the density of the second passivation layer 72 is greater than that of the first passivation layer 71. By providing a high-density second passivation layer 72 above the first passivation layer 71, the second passivation layer 72 can block the diffusion of hydrogen atoms, which is beneficial to further improve the channel conductivity problem caused by the diffusion of hydrogen atoms to the first active layer 21. Optionally, the second passivation layer 72 is made of silicon nitride to make the second passivation layer 72 have a higher density. Here, as mentioned earlier, even if hydrogen atoms may be introduced during the fabrication of the second passivation layer 72, which includes silicon nitride, the hydrogen atoms introduced during the fabrication of the second passivation layer 72 can combine with oxygen atoms in the first interlayer dielectric layer 41 with high oxygen content. Therefore, the hydrogen atoms introduced during the fabrication of the second passivation layer 72 will not affect the channel region of the first active layer 61 or will have a very small impact.

[0093] Figure 11 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 4, in the embodiment shown in Figure 11, the first interlayer dielectric layer 41 is made of an oxide material with a high oxygen content, the first passivation layer 71 is made of an oxide material with a high oxygen content, and the second passivation layer 72 is made of a nitride material. The density of the second passivation layer 72 is greater than that of the first passivation layer 71. By providing a high-density second passivation layer 72 above the first passivation layer 71, the second passivation layer 72 can block the diffusion of hydrogen atoms, which is beneficial to further improve the channel conductivity problem caused by the diffusion of hydrogen atoms to the first active layer 21. Optionally, the second passivation layer 72 is made of silicon nitride to make the second passivation layer 72 have a higher density. Here, as mentioned earlier, even if hydrogen atoms may be introduced during the fabrication of the second passivation layer 72, which includes silicon nitride, the hydrogen atoms introduced during the fabrication of the second passivation layer 72 can combine with oxygen atoms in the first passivation layer 71 with high oxygen content. Therefore, the hydrogen atoms introduced during the fabrication of the second passivation layer 72 will not affect the channel region of the first active layer 61 or will have a very small impact.

[0094] Figure 12 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 10, in the embodiment shown in Figure 12, the driving backplane further includes a third passivation layer 73. The third passivation layer 73 is located on the side of the second passivation layer 72 away from the substrate 1, and the density of the third passivation layer 73 is greater than that of the second passivation layer 72. By providing a higher density third passivation layer 73 above the high-density second passivation layer 72, the third passivation layer 73 can block the diffusion of hydrogen atoms, which is beneficial to further improve the channel conductivity problem caused by the diffusion of hydrogen atoms to the first active layer 21. Optionally, the material used to fabricate the third passivation layer 73 includes silicon nitride to achieve a higher density of the third passivation layer 73. Here, as mentioned earlier, even if hydrogen atoms may be introduced during the fabrication of the third passivation layer 73, which includes silicon nitride, the hydrogen atoms introduced during the fabrication of the third passivation layer 73 can combine with oxygen atoms in the first interlayer dielectric layer 41 with high oxygen content. Therefore, the hydrogen atoms introduced during the fabrication of the third passivation layer 73 will not affect the channel region of the first active layer 61 or will have a very small impact.

[0095] Figure 13 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application, and Figure 14 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. In other possible embodiments, based on the embodiment shown in Figure 11, a third passivation layer 73 with even higher density can be provided above the high-density second passivation layer 72 to obtain the embodiment shown in Figure 13; or, based on the embodiment shown in Figure 6, a third passivation layer 73 with even higher density can be provided above the high-density second passivation layer 72 to obtain the embodiment shown in Figure 14. In the embodiments shown in Figures 13 and 14, by providing a third passivation layer 73 with even higher density above the high-density second passivation layer 72, the third passivation layer 73 can block the diffusion of hydrogen atoms, which is beneficial to further improve the channel conductor problem caused by the diffusion of hydrogen atoms to the first active layer 21.

[0096] In the embodiments shown in Figures 7 to 9, other interlayer dielectric layers are disposed above the first interlayer dielectric layer 41 with high oxygen content, namely, a high-density second interlayer dielectric layer 42, or a high-density second interlayer dielectric layer 42 and a high-oxygen-content third interlayer dielectric layer 43, or a high-density second interlayer dielectric layer 42, a high-oxygen-content third interlayer dielectric layer 43 and a high-density fourth interlayer dielectric layer 44, to further improve the channel conductor problem caused by the downward diffusion of hydrogen atoms to the first active layer 21.

[0097] In the embodiments shown in Figures 12 to 14, the channel conductor problem caused by the downward diffusion of hydrogen atoms to the first active layer 21 is further improved by providing another passivation layer above the second passivation layer 72, namely a third passivation layer 73 with higher density.

[0098] The designs of the multiple interlayer dielectric layers shown in Figures 7 to 9 can be arbitrarily combined with the designs of the multiple passivation layers shown in Figures 12 and 13. For example, Figure 15 is a schematic cross-sectional structure of another drive backplane provided in an embodiment of this application. The drive backplane shown in Figure 15 includes a first interlayer dielectric layer 41 with high oxygen content, a second interlayer dielectric layer 42 with high density, a third interlayer dielectric layer 43 with high oxygen content, and a fourth interlayer dielectric layer 44 with high density, as shown in Figure 9. It also includes a first passivation layer 71, a second passivation layer 72 with high density, and a third passivation layer 73 with even higher density, as shown in Figure 12. Other possible embodiments are similar and will not be described in detail here.

[0099] In this embodiment, not only can the interlayer dielectric layer located between the first gate 31 and the first source / drain 51 be designed, and / or the passivation layer located on the first source / drain 51 be designed, but other structural layers in the driving backplane can also be designed to further improve the channel conductor problem caused by hydrogen atoms diffusing to the first active layer 21.

[0100] Figure 16 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. Compared with the embodiment shown in Figure 3, in the embodiment shown in Figure 16, the material used to fabricate the first gate insulating layer 61 includes oxide, and the oxygen content of the first gate insulating layer 61 is greater than or equal to 50%. Since the first gate insulating layer 61 is in contact with the first active layer 21, a first gate insulating layer 61 with a high oxygen content is provided, so that the oxygen atoms in the first gate insulating layer 61 can fully combine with the hydrogen atoms diffusing towards the first active layer, thereby further improving the channel conductor problem caused by the downward diffusion of hydrogen atoms to the first active layer.

[0101] In other possible embodiments, such as based on any of the embodiments shown in Figures 4 to 15, a first gate insulating layer 61 with a high oxygen content may be provided to further improve the channel conductor problem caused by hydrogen atoms diffusing into the first active layer.

[0102] Figure 17 is a schematic cross-sectional view of another driving backplane provided in an embodiment of this application. As shown in Figure 17, the driving backplane also includes a first buffer layer 81 located between the substrate 1 and the first active layer 21. The first buffer layer 81 is in contact with the first active layer 21. Compared with the embodiment shown in Figure 3, in the embodiment shown in Figure 17, the material of the first buffer layer 81 includes oxide, and the oxygen content of the first buffer layer 81 is greater than or equal to 50%. Since the first buffer layer 81 is in contact with the first active layer 21, a first buffer layer 81 with a high oxygen content is provided to avoid the generation of more hydrogen atoms during the fabrication of the first buffer layer 81 and the diffusion of hydrogen atoms towards the first active layer 21, thereby improving the channel conductor problem caused by the upward diffusion of hydrogen atoms to the first active layer.

[0103] In other possible embodiments, such as based on any of the embodiments shown in Figures 4 to 16, a first buffer layer 81 with a high oxygen content can be provided to improve the channel conductor problem caused by hydrogen atoms diffusing upward to the first active layer.

[0104] For example, the mobility of the material used to fabricate the first active layer 21 is greater than or equal to 20 square centimeters / (volt-seconds), and the channel length of the first active layer 21 is less than or equal to 4 micrometers. Mobility refers to the speed of electron movement and conductivity in a semiconductor, that is, the average distance an electron travels per unit time after being subjected to an electric field in a semiconductor. The higher the mobility, the faster the electrons move in the semiconductor, and the stronger the conductivity. Therefore, compared to active layers made of low-mobility materials, the first active layer 21, made of high-mobility materials, is more susceptible to channel conductor formation, thereby affecting the switching characteristics of the thin-film transistor and causing abnormal operation of the drive backplane. The shorter the channel length, the greater the possibility of channel conductor formation due to hydrogen atom diffusion. That is, compared to short-channel thin-film transistors, even if hydrogen atoms diffuse to the first active layer in a long-channel thin-film transistor, the possibility of channel conductor formation is smaller. Therefore, the embodiments of this application are particularly applicable to short-channel thin-film transistors where the material used to fabricate the first active layer 21 is a high-mobility material and the channel length is less than or equal to 4 micrometers.

[0105] For example, the size of the first active layer 21 in the direction z away from the substrate is between 10 nanometers and 50 nanometers, that is, the thickness of the first active layer 21 is between 10 nanometers and 50 nanometers.

[0106] The channel length of the first active layer 21 is illustrated below. Taking the first active layer 21 shown in FIG1 as an example, the portion of the first active layer 21 covered by the first gate 31 is the channel. As shown in FIG1, the first source-drain electrode 51 includes a source and a drain located on the left and right sides of the channel, respectively; or, the first source-drain electrode 51 includes a drain and a source located on the left and right sides of the channel, respectively. The dimension 'a' of the channel in the direction from the source to the drain is the channel length.

[0107] For example, the region in the first active layer 21 connected to the source of the first source-drain electrode 51 is formed into a source region after being conductiveized, and the region in the first active layer 21 connected to the drain of the first source-drain electrode 51 is formed into a drain region after being conductiveized.

[0108] For example, the first active layer 21 is fabricated from one of indium gallium oxide (IGO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium zinc oxide (IGZO). Among these, IGO, IZO, and IGTO have higher mobility than IGZO, but are more susceptible to channel conductor formation issues and have lower stability. Therefore, compared to active layers made of IGZO, the embodiments of this application are particularly suitable for driving backplanes having a first active layer 21 made of a high-mobility metal oxide. Furthermore, a thin-film transistor with the aforementioned metal oxide as the active layer is also called a metal oxide thin-film transistor (MOTS). MOTS features low leakage current and good uniformity; here, good uniformity refers to the good uniformity of the large-area metal oxide film layer formed by methods such as sputtering.

[0109] This application embodiment is not only applicable to the above-mentioned driving backplane, which only includes thin-film transistors with active layers of semiconductor oxide, but also applicable to low-temperature polycrystalline oxide (LTPO) driving backplanes. Figure 18 is a schematic cross-sectional structure diagram of another driving backplane provided by this application embodiment. As shown in Figure 18, the driving backplane also includes a second buffer layer 82, a second active layer 22, a second gate insulating layer 62, a second gate 32, a third gate insulating layer 63, and a third gate 33. In the direction z away from the substrate 1, the second buffer layer 82, the second active layer 22, the second gate insulating layer 62, the second gate 32, the third gate insulating layer 63, the third gate 33, the first buffer layer 81, the first active layer 21, the first gate insulating layer 61, the first gate 31, the first interlayer dielectric layer 41, the first source / drain electrode 51, the first passivation layer 71, and the second passivation layer 72 are stacked sequentially.

[0110] It should be noted that in the actual production process, each structure is usually named according to the stacking order of each structure in the direction z away from the substrate 1, such as each gate layer, active layer, etc. For example, in the embodiment shown in FIG18, the second active layer 22 is usually called the first active layer, the second gate insulating layer 62 is usually called the first gate insulating layer, the second gate 32 is usually called the first gate, the third gate insulating layer 63 is usually called the second gate insulating layer, the third gate 33 is usually called the second gate, the first active layer 21 is usually called the second active layer, the first gate insulating layer 63 is usually called the third gate insulating layer, and the first gate 31 is usually called the third gate.

[0111] For example, as shown in FIG18, in an LTPO display panel, the first gate insulating layer 61 is typically a monolithic structure, that is, the orthographic projection of the first active layer 21 on the substrate 1 at least partially overlaps with the orthographic projection of the first gate insulating layer 61 on the substrate 1, and the outer edge of the orthographic projection of the first gate insulating layer 61 on the substrate 1 surrounds the outer edge of the orthographic projection of the first active layer 21 on the substrate 1.

[0112] For example, the first active layer 21 is made of one of indium gallium oxide (IGO), indium zinc oxide (IZO), indium gallium tin oxide (IGTO), and indium gallium zinc oxide (IGZO). The second active layer 22 is made of low-temperature polycrystalline silicon. By setting the first interlayer dielectric layer 41 in the LTPO driver backplane to a high-oxygen content first interlayer dielectric layer 41, the oxygen atoms in the first interlayer dielectric layer can be fully combined with the hydrogen atoms diffusing towards the first active layer. This improves the channel conductivity problem caused by hydrogen atoms diffusing into the first active layer.

[0113] For example, in an LTPO display panel, the channel conductor problem caused by the downward diffusion of hydrogen atoms to the first active layer 21 can be further improved by providing other high-density and / or high-oxygen-content interlayer dielectric layers above the first interlayer dielectric layer 41 with high oxygen content.

[0114] For example, in an LTPO display panel, other passivation layers with higher density can also be provided above the first passivation layer 71 to further improve the channel conductor problem caused by hydrogen atoms diffusing downward to the first active layer 21.

[0115] For example, in an LTPO display panel, a first gate insulating layer 61 with a high oxygen content and / or a first buffer layer 81 with a high oxygen content may also be provided to further improve the channel conductor problem caused by hydrogen atoms diffusing downwards to the first active layer 21. Specific configuration methods are described in the foregoing embodiments and will not be repeated here.

[0116] For example, the LTPO display panel also includes a fifth interlayer dielectric layer (not shown) located between the first buffer layer 81 and the third gate 33.

[0117] For example, the substrate 1 can be any transparent substrate, such as a glass substrate, quartz substrate, plastic substrate, other transparent rigid substrate, or other transparent flexible substrate, and can be a single-layer or multi-layer structure. Taking a multi-layer structure as an example, the substrate 1 includes a first PI (polyimide) layer, a first protective layer, a second PI (polyimide) layer, and a second protective layer stacked sequentially from bottom to top. The two protective layers are used to protect the PI layer and prevent damage to the PI layer by subsequent processes. A buffer layer is also covered on the second protective layer to block water and oxygen and to block alkaline ions.

[0118] For example, the material used to fabricate the second gate insulating layer 62 includes at least one of silicon oxide and silicon nitride. Since the material used to fabricate the second active layer 22 is low-temperature polysilicon, which has a low mobility, the second active layer 22 is less prone to channel conductor formation problems compared to the first active layer 21. Therefore, the material used to fabricate the second gate insulating layer 62 can include silicon nitride. For example, the material used to fabricate the third gate insulating layer 63 includes at least one of silicon oxide and silicon nitride.

[0119] For example, the first gate 31 may be made of a metallic material, such as one or more of molybdenum, copper, and aluminum, and the second gate 32 may be made of a metallic material, such as one or more of molybdenum, copper, and aluminum.

[0120] Figure 19 is a flowchart illustrating a method for manufacturing a drive backplane according to an embodiment of this application. As shown in Figure 19, the method includes:

[0121] Step 1901: Provide a substrate.

[0122] Step 1902: Form a first active layer on the substrate.

[0123] Step 1903: Form a first gate on the first active layer.

[0124] Step 1904: Form a first interlayer dielectric layer on the first gate.

[0125] Step 1905: Form the first source and drain electrodes on the first interlayer dielectric layer.

[0126] Step 1906: Form a first passivation layer on the first source and drain electrodes.

[0127] Step 1907: Form a second passivation layer on the first passivation layer.

[0128] Wherein, the orthographic projection of the first active layer on the substrate at least partially overlaps with the orthographic projection of the first interlayer dielectric layer on the substrate, the material of the first interlayer dielectric layer includes oxide, and the hydrogen content of the first passivation layer is less than the hydrogen content of the second passivation layer.

[0129] In summary, the driving backplane fabricated by the method provided in this application includes multiple passivation layers. By fabricating multiple passivation layers, namely a first passivation layer and a second passivation layer, the downward diffusion of hydrogen atoms can be effectively blocked. In this way, the problem of channel conductor formation caused by hydrogen atoms diffusing to the first active layer can be improved.

[0130] In one possible embodiment, forming the first interlayer dielectric layer includes using an atomic layer deposition (ALD) apparatus. Since the gas source of the ALD apparatus does not contain hydrogen atoms, the hydrogen content of the first interlayer dielectric layer formed using the ALD apparatus is close to zero, thereby minimizing the number of hydrogen atoms introduced during the fabrication of the first interlayer dielectric layer and thus minimizing the diffusion of hydrogen atoms to the first active layer.

[0131] In another possible embodiment, forming the first interlayer dielectric layer includes:

[0132] The first step is to form the first interlayer dielectric material layer. For example, the first interlayer dielectric material layer can be formed by plasma-enhanced chemical vapor deposition. Optionally, the material used to fabricate the first interlayer dielectric material layer is silicon oxide.

[0133] The second step involves surface treatment of the first interlayer dielectric material layer using a target gas source, namely nitrous oxide. Since nitrous oxide gas does not contain hydrogen atoms, surface treatment of the first interlayer dielectric material layer using nitrous oxide, such as plasma treatment, can increase the oxygen atom concentration in the first interlayer dielectric material layer, thereby forming a high-oxygen-content first interlayer dielectric layer, such as the high-oxygen-content first interlayer dielectric layer 41 shown in the embodiment of Figure 3.

[0134] For example, forming the first passivation layer includes:

[0135] The first step is to form a first passivation material layer on the first source and drain electrodes. For example, the first interlayer dielectric material layer can be formed by plasma-enhanced chemical vapor deposition. Optionally, the material for the first interlayer dielectric material layer is silicon oxide.

[0136] The second step involves surface treatment of the first passivation material layer using a target gas source, namely nitrous oxide. Since nitrous oxide gas does not contain hydrogen atoms, surface treatment of the first passivation material layer using nitrous oxide, such as plasma treatment, can increase the oxygen atom concentration in the first passivation material layer, thereby forming a high-oxygen-content first passivation material layer. For example, a high-oxygen-content first passivation material layer 71 can be formed in the embodiment shown in Figure 4.

[0137] Figures 20 and 21 are schematic flowcharts illustrating another method for manufacturing a drive backplane according to an embodiment of this application, which can produce the drive backplane shown in Figure 7. The manufacturing process of the drive backplane will be further explained below using the process of manufacturing the drive backplane shown in Figure 7 as an example.

[0138] Step 1, as shown in part (a) of FIG20, a substrate 1 is provided, and a buffer layer 81 and a first active material layer are sequentially formed on the substrate 1. The first active material layer is patterned to obtain a first active layer 21. Optionally, the buffer layer 81 is formed by, for example, deposition, and the first active material layer is formed by, for example, deposition. Optionally, the patterning process includes photoresist coating, exposure, development, etching, and lift-off processes.

[0139] The second step, as shown in part (b) of Figure 20, involves forming a first gate insulating material layer and patterning it to obtain a first gate insulating layer 61. A first source / drain material layer is then formed and patterned to obtain a first source / drain 31. Optionally, the first gate insulating material layer and the first source / drain material layer can be formed, for example, by deposition. Optionally, the first gate insulating layer 61 can be used as a mask to etch the first gate insulating material layer.

[0140] The third step, as shown in part (c) of Figure 20, is to form a first interlayer dielectric material layer 410. Optionally, the first interlayer dielectric material layer 410 may be formed by, for example, plasma-enhanced chemical vapor deposition.

[0141] Fourth step, as shown in part (a) of Figure 21, the first interlayer dielectric material layer 410 is surface treated with a target gas source, such as plasma treatment, to form a first interlayer dielectric layer 41 with high oxygen content. The target gas source is nitrous oxide.

[0142] Step 5, as shown in part (b) of Figure 21, forms the second interlayer dielectric layer 42. Optionally, the second interlayer dielectric layer 42 is formed by plasma-enhanced chemical vapor deposition.

[0143] Step 6: As shown in part (c) of Figure 21, vias are formed penetrating the first interlayer dielectric layer 41 and the second interlayer dielectric layer 42 to form a first source / drain material layer. The first source / drain material layer is then patterned to obtain a first source / drain 51. The first source / drain 51 contacts the first active layer 21 through the vias penetrating the first interlayer dielectric layer 41 and the second interlayer dielectric layer 42. A first passivation layer 71 is formed on the first source / drain 51, and a second passivation layer 72 is formed on the first passivation layer 71. Optionally, the first source / drain material layer is formed by deposition. Optionally, the patterning process includes photoresist coating, exposure, development, etching, and stripping. Optionally, the first passivation layer 71 and the second passivation layer 72 are formed by plasma-enhanced chemical vapor deposition.

[0144] For example, in the fabrication process shown in Figures 20 and 21, not only can the first interlayer dielectric material layer 410 be surface-treated with a target gas source, such as plasma treatment, in the fourth step to form a first interlayer dielectric layer with high oxygen content, but also in the fifth step, after the formation of the second interlayer dielectric layer 42, the second interlayer dielectric layer 42 can be surface-treated with a target gas source, such as plasma treatment, to increase the oxygen content of the second interlayer dielectric layer 42, thereby reducing the downward diffusion of hydrogen atoms.

[0145] For example, in the process of fabricating the drive backplane shown in FIG9, not only can a first interlayer dielectric layer 41 and a third interlayer dielectric layer 43 with high oxygen content be formed by deposition and surface treatment using a target gas source (e.g., plasma treatment), but the second interlayer dielectric layer 42 can also be surface treated (e.g., plasma treatment) after its formation to increase its oxygen content, thereby reducing the downward diffusion of hydrogen atoms, and the fourth interlayer dielectric layer 44 can be surface treated (e.g., plasma treatment) after its formation to increase its oxygen content, thereby reducing the downward diffusion of hydrogen atoms.

[0146] Similarly, in the embodiment shown in Figure 8, after the second interlayer dielectric layer 42 is formed, a surface treatment (e.g., plasma treatment) can be performed on the second interlayer dielectric layer 42 to increase the oxygen content of the second interlayer dielectric layer 42, thereby reducing the downward diffusion of hydrogen atoms.

[0147] For the embodiments shown in Figures 1 to 18, during the fabrication of the passivation layers, a surface treatment (e.g., plasma treatment) can be performed after each passivation layer is fabricated to increase the oxygen content of the passivation layer. For example, during the fabrication of the drive backplane shown in Figure 14, a surface treatment (e.g., plasma treatment) can be performed after the formation of the first passivation layer 71 to increase the oxygen content of the first passivation layer 71, thereby reducing the downward diffusion of hydrogen atoms; a surface treatment (e.g., plasma treatment) can be performed after the formation of the second passivation layer 72 to increase the oxygen content of the second passivation layer 72, thereby reducing the downward diffusion of hydrogen atoms; and a surface treatment (e.g., plasma treatment) can be performed after the formation of the third passivation layer 73 to increase the oxygen content of the third passivation layer 73, thereby reducing the downward diffusion of hydrogen atoms.

[0148] For example, multiple interlayer dielectric layers as shown in FIG15 can be fabricated using the same mask, i.e., the first interlayer dielectric layer 41, the second interlayer dielectric layer 42, the third interlayer dielectric layer 43, and the fourth interlayer dielectric layer 44 shown in FIG15 can be fabricated using the same mask. For example, multiple passivation layers as shown in FIG15 can be fabricated using the same mask, i.e., the first passivation layer 71, the second passivation layer 72, and the third passivation layer 73 shown in FIG14 can be fabricated using the same mask. Other embodiments are similar and will not be described in detail here. Using the same mask to fabricate multiple interlayer dielectric layers or multiple passivation layers helps to reduce costs.

[0149] Figure 22 is a cross-sectional structural diagram of a display panel provided in an embodiment of this application, and Figure 23 is a planar structural diagram of a display panel provided in an embodiment of this application. Figure 22 is a cross-sectional structural diagram of Figure 23 at section line BB. As shown in Figures 22 and 23, the display panel includes any of the aforementioned driving backplates and a plurality of light-emitting units 9 located on the driving backplates. This display panel has the same effects as the aforementioned driving backplates, which will not be described in detail here.

[0150] For example, the display panel can be one of a liquid crystal display panel, an organic light-emitting diode (OLED) display panel, or a quantum dot light-emitting diode (QLED).

[0151] The structure of the display panel is illustrated below using organic light-emitting diodes or quantum dot light-emitting diodes as examples. For example, as shown in Figures 22 and 23, multiple light-emitting units 9 are arrayed on a driving backplane, and each light-emitting unit includes a first electrode 91, a light-emitting layer 92, and a second electrode 93.

[0152] For example, the material used to fabricate the light-emitting layer 92 is an organic light-emitting material or a quantum dot light-emitting material. Optionally, there are at least two light-emitting units 9, and the light emitted by the light-emitting layer 92 in these two light-emitting units 9 is of a different color. Optionally, all light-emitting units 9 may emit light of the same color from their light-emitting layers 92.

[0153] For example, one of the first electrode 91 and the second electrode 93 is an anode, and the other is a cathode. Optionally, the second electrode 93 is made of a transparent conductive material, such as indium tin oxide, indium zinc oxide, etc.

[0154] For example, as shown in FIG22, the second electrodes 93 of different light-emitting units 9 are connected to form an integral structure.

[0155] For example, as shown in FIG23, each light-emitting unit is located in a sub-pixel unit, and three sub-pixel units containing multiple adjacent light-emitting units form a pixel unit.

[0156] For example, as shown in FIG23, the display panel further includes a pixel definition layer 94, which includes a plurality of pixel openings, and the light-emitting layers 92 of the plurality of light-emitting units 9 are located in the plurality of pixel openings.

[0157] Exemplarily, the display panel further includes an encapsulation layer 10, which includes a first encapsulation layer 101, a second encapsulation layer 102, and a third encapsulation layer 103 sequentially stacked on the substrate 1. Optionally, the first encapsulation layer 101 and the third encapsulation layer 103 are made of silicon nitride, and the second encapsulation layer 102 is made of an organic material to achieve planarization. A relatively large number of hydrogen atoms are generated during the fabrication of the first encapsulation layer 101 and / or the third encapsulation layer.

[0158] For example, the display panel further includes a color filter layer located on the side of the encapsulation layer 10 away from the substrate 1. The color filter layer includes color resist blocks of different colors and a black matrix located between two adjacent color resist blocks.

[0159] For example, the display panel also includes a transition electrode (not shown) located between the first electrode 91 and the first source / drain electrode 51 to electrically connect the first electrode 91 and the first source / drain electrode 51.

[0160] This application embodiment also provides a display device, which includes a power supply circuit and the aforementioned display panel, wherein the power supply circuit is used to supply power to the display panel.

[0161] For example, the display device provided in the embodiments of this application can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0162] This display device has the same effect as the aforementioned display panel, which will not be described in detail here.

[0163] It should be noted that the terminology used in the implementation section of the embodiments of this application is only for explaining the embodiments of this application and is not intended to limit the embodiments of this application. Unless otherwise defined, the technical or scientific terms used in the implementation of the embodiments of this application should have the ordinary meaning understood by a person skilled in the art to which the embodiments of this application pertain. The words "first," "second," "third," and similar terms used in the patent application specification and claims of the embodiments of this application do not indicate any order, quantity, or importance, but are only used to distinguish different components. Similarly, the words "a" or "an" and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The words "comprising" or "including" and similar terms mean that the elements or objects preceding "comprising" or "including" cover the elements or objects listed after "comprising" or "including" and their equivalents, and do not exclude other elements or objects. The directional terms mentioned in the embodiments of this application, such as "top", "bottom", "up", "down", "left" or "right", are only for reference to the directions in the accompanying drawings. Therefore, the directional terms used are for better and clearer explanation and understanding of the embodiments of this application, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0164] The above are merely optional embodiments of this application and are not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A drive backplane, characterized by, The driving backplane comprises a substrate, and a first active layer, a first gate, a first interlayer dielectric layer, a first source-drain electrode, a first passivation layer and a second passivation layer arranged in a direction away from the substrate, a projection of the first active layer on the substrate at least partially overlaps with a projection of the first interlayer dielectric layer on the substrate, a material of the first interlayer dielectric layer comprises an oxide, and a hydrogen content of the first passivation layer is less than a hydrogen content of the second passivation layer.

2. The drive backplane of claim 1, wherein, An oxygen content of the first interlayer dielectric layer is greater than or equal to 50%.

3. The drive backplane of claim 2, wherein, The first interlayer dielectric layer is in contact with the first active layer.

4. The drive backplane of claim 2, wherein, A material of the first passivation layer comprises a nitride, and a material of the second passivation layer comprises a nitride, a density of the first passivation layer is less than a density of the second passivation layer.

5. The drive backplane of claim 2, wherein, A material of the first passivation layer comprises a nitride, and a density of the first passivation layer is greater than a density of the first interlayer dielectric layer.

6. The drive backplane of claim 2, wherein, A material of the first passivation layer comprises an oxide, and an oxygen content of the first interlayer dielectric layer is greater than an oxygen content of the first passivation layer.

7. The drive backplane of claim 2, wherein, A material of the first passivation layer comprises an oxide, and an oxygen content of the first passivation layer is greater than or equal to 50%.

8. The drive backsheet of any one of claims 2-7, wherein, The driving backplane further comprises a third passivation layer located on a side of the second passivation layer away from the substrate, and a density of the third passivation layer is greater than a density of the second passivation layer.

9. The drive backplane of claim 2, wherein, The driving backplane further comprises a second interlayer dielectric layer located between the first interlayer dielectric layer and the first source-drain electrode, and a density of the second interlayer dielectric layer is greater than a density of the first interlayer dielectric layer.

10. The drive backplane of claim 9, wherein, The driving backplane further comprises a third interlayer dielectric layer located between the second interlayer dielectric layer and the first source-drain electrode, a material of the third interlayer dielectric layer comprises an oxide, and an oxygen content of the third interlayer dielectric layer is greater than or equal to 50%.

11. The drive backplane of claim 10, wherein, The driving backplane further comprises a fourth interlayer dielectric layer located between the third interlayer dielectric layer and the first source-drain electrode, and a density of the fourth interlayer dielectric layer is greater than a density of the third interlayer dielectric layer.

12. The drive backplane of claim 2, wherein, The driving backplane further comprises a first gate insulating layer located between the first active layer and the first gate, a material of the first gate insulating layer comprises an oxide, and an oxygen content of the first gate insulating layer is greater than or equal to 50%.

13. The drive backplane of claim 2, wherein, The driving backplane further comprises a first buffer layer located between the substrate and the first active layer, the first buffer layer is in contact with the first active layer, a material of the first buffer layer comprises an oxide, and an oxygen content of the first buffer layer is greater than or equal to 50%.

14. The drive backplane of claim 1, wherein, A material of the first interlayer dielectric layer comprises one of silicon oxide, hafnium oxide, zirconium oxide and aluminum oxide.

15. The drive backplane of claim 1, wherein, A material of the first active layer has a mobility greater than or equal to 20 square centimeters / (volt*second), and a channel length of the first active layer is less than or equal to 4 microns.

16. A method of fabricating a drive backplane, comprising: The method comprises: providing a substrate; forming a first active layer on the substrate substrate; forming a first gate on the first active layer; forming a first interlayer dielectric layer on the first gate; forming a first source-drain electrode on the first interlayer dielectric layer; forming a first passivation layer on the first source-drain electrode; forming a second passivation layer on the first passivation layer; wherein a projection of the first active layer on the substrate substrate at least partially overlaps with a projection of the first interlayer dielectric layer on the substrate substrate, a material of the first interlayer dielectric layer comprises an oxide, and a hydrogen content of the first passivation layer is less than a hydrogen content of the second passivation layer.

17. The method of manufacturing according to claim 16, wherein, The forming of the first interlayer dielectric layer comprises: forming the first interlayer dielectric layer by using an atomic layer deposition device; or The forming of the first interlayer dielectric layer comprises: forming a first interlayer dielectric material layer; performing surface treatment on the first interlayer dielectric material layer by using a target gas source to form the first interlayer dielectric layer, the target gas source being dinitrogen monoxide.

18. The method of manufacturing of claim 16, wherein, The forming of the first passivation layer comprises: forming a first passivation material layer on the first source-drain electrode; performing surface treatment on the first passivation material layer by using a target gas source to form the first passivation layer, the target gas source being dinitrogen monoxide.

19. A display panel, characterized by The display panel comprises the driving backplane as claimed in any one of claims 1 to 15, and a plurality of light-emitting units located on the driving backplate.

20. A display device comprising: The display device comprises a power supply circuit and the display panel as claimed in claim 19, the power supply circuit being configured to supply power to the display panel.

Citation Information

Patent Citations

  • Array substrate, manufacture method thereof and display device

    CN107516647A

  • OLED display panel and preparation method thereof

    CN113745243A

  • Display substrate, preparation method thereof and display device

    CN113948534A

  • Array substrate, preparation method thereof and display device

    CN115662999A

  • Array substrate and display device

    CN220934081U