Hardware information transmission method, product, device, and medium

Abstract

The present application relates to the technical field of servers, and discloses a hardware information transmission method, a product, a device, and a medium. A solution uses an MCTP over MMBI protocol to establish a communication link between a BMC and a host. The host reads target data of a target hardware device, and stores same to an H2B circular buffer mapped by MMBI. Finally, the BMC reads from the H2B circular buffer by means of the MCTP over MMBI protocol, thereby implementing acquisition of the target data of the target hardware device. The present solution is based on the software level of the host, acquisition of target hardware device data by the BMC is implemented by means of in-band acquisition, and in addition, transmission of the target hardware device data of the BMC is implemented, so that the problem that a current BMC cannot directly acquire some hardware device data out-of-band, which is not conducive to monitoring of the hardware by the BMC, is solved; hardware device data can be efficiently and reliably transmitted, reducing delay, and and improving the overall performance of the system.

Description

A hardware information transmission method, product, device and medium

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202410954802.X, filed on July 17, 2024, entitled "A Hardware Information Transmission Method, Product, Device and Medium", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of server technology, and in particular to a hardware information transmission method, product, device and medium. Background Technology

[0004] A Baseboard Management Controller (BMC) is a standalone management processor in a computer system, typically used for tasks such as monitoring and managing system hardware status, remote management, and control. The Memory-Mapped BMC Interface (MMBI) is an interface that enables communication between the BMC and the host system via memory mapping. MMBI provides a direct and efficient data transfer method, making communication between the host system and the BMC more flexible and faster.

[0005] Currently, the BMC can communicate with hardware and obtain hardware information through the Management Component Transport Protocol (MCTP) over Peripheral Component Interconnect Express (PCIE) / Inter-Integrated Circuit (I2C) and other pathways. However, there are limitations to some hardware information that cannot be directly obtained out of band. For example, the BMC cannot properly read Self-Monitoring, Analysis and Reporting Technology (SMART) data from Non-Volatile Memory Express (NVME) hard drives through MCTP over PCIE / I2C, which is detrimental to the BMC's hardware monitoring. Summary of the Invention

[0006] The purpose of this application is to provide a hardware information transmission method, product, device, and medium to solve the problem that current BMCs cannot directly obtain data from some hardware devices out of the band, which is not conducive to BMC monitoring of hardware.

[0007] To address the aforementioned technical problems, this application provides a hardware information transmission method applied to a baseboard management controller; the method includes:

[0008] When the server powers on normally, configure the register information related to the memory-mapped substrate management controller interface;

[0009] Start the operation shared memory data thread based on the management component transmission protocol of the memory-mapped substrate management controller interface;

[0010] The target data is read from the host to the circular buffer of the baseboard management controller by operating the shared memory data thread, and the target data is displayed through a web page;

[0011] The target data refers to the data of the target hardware device that the baseboard management controller cannot directly read out of the band; the target data is read from the target hardware device by the host and stored in the baseboard management controller's circular buffer.

[0012] On the one hand, configure the register information related to the memory-mapped substrate management controller interface, including:

[0013] Configure the total size of the memory-mapped substrate management controller interface;

[0014] Configure interrupt states and enable / disable related to data transmission with the memory-mapped substrate management controller interface;

[0015] Configure the host writable status bit, and configure the host-to-board management controller circular buffer and the board management controller-to-host circular buffer.

[0016] On the other hand, the operation shared memory data thread is initiated based on the management component transfer protocol of the memory-mapped substrate management controller interface, including:

[0017] Set both the source electronic ID identifier and the destination electronic ID identifier to 0;

[0018] Select the physical channel between the host and the host as the memory-mapped substrate management controller interface;

[0019] Set the physical transport binding identifier to 0x07.

[0020] On the other hand, the host reads the target data from the target hardware device and stores it in the host's circular buffer of the board management controller, including:

[0021] The target data of the target hardware device is obtained through the host system software;

[0022] When an interrupt is triggered indicating that the target data acquisition is complete, the target data is written to the host's circular buffer of the baseboard management controller via the host's system software.

[0023] The host system software sends an interrupt indicating that the target data acquisition is complete to the baseboard management controller, so that the baseboard management controller can read the target data from the host to the baseboard management controller's circular buffer.

[0024] On the other hand, before acquiring the target data of the target hardware device through the host's system software, the process also includes:

[0025] When the host is powered on, the memory-mapped input / output is initialized through the host's basic input / output system;

[0026] A path to the memory-mapped substrate management controller interface is established through the host computer;

[0027] Configure the general-purpose input / output pins corresponding to the interrupt so that the corresponding interrupt can be triggered by switching the level state of the general-purpose input / output pins.

[0028] On the other hand, it also includes:

[0029] Monitor the server's health index;

[0030] The server's health index is stored in the host circular buffer of the baseboard management controller via the management component transmission protocol based on the memory-mapped baseboard management controller interface.

[0031] An interrupt indicating that the health index has been acquired and stored is sent to the host so that the host can read the health index through the system software.

[0032] On the other hand, the host computer reads health indicators through system software, including:

[0033] When an interrupt indicating that the health index has been acquired and stored is received, the host system software reads the server's health index from the baseboard management controller to the host circular buffer through memory-mapped input / output.

[0034] The health index of the server is displayed through the host's system software.

[0035] On the other hand, it also includes:

[0036] Obtain user requests for operations on server hardware;

[0037] The operation request is stored in the host circular buffer of the baseboard management controller through the management component transmission protocol based on the memory-mapped baseboard management controller interface;

[0038] An interrupt is sent to the host after the representation operation request has been acquired and stored, so that the host can read the operation request through the system software.

[0039] On the other hand, the host reads operation requests through system software, including:

[0040] When an interrupt is received and the characterization operation request has been acquired and stored, the host system software reads the operation request from the baseboard management controller to the host circular buffer of the server hardware through memory-mapped input / output.

[0041] The host system software processes user requests for operations on the server hardware.

[0042] On the other hand, the host reads the target data from the target hardware device and stores it in the host's circular buffer of the board management controller, including:

[0043] Host-based system software acquires self-monitoring, analysis, and reporting data of non-volatile memory standard hard disks through self-monitoring, analysis, and reporting technology monitoring tools;

[0044] When the interrupt is triggered after the completion of the self-monitoring analysis and reporting technology data acquisition, the self-monitoring analysis and reporting technology data is written to the host's circuit board management controller's circular buffer through the host's system software;

[0045] The host system software sends an interrupt indicating that the acquisition of self-monitoring analysis and reporting technology data has been completed to the baseboard management controller, so that the baseboard management controller can read the self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk in the circular buffer of the baseboard management controller.

[0046] On the other hand, after the baseboard management controller reads the self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk from the host to the baseboard management controller's circular buffer, it also includes:

[0047] The health status of the non-volatile memory standard hard drive is determined based on self-monitoring analysis and reporting technology data;

[0048] Determine if the non-volatile memory standard hard drive is faulty;

[0049] If a fault exists in the non-volatile memory standard hard drive, an alarm message will be output, and the hard drive failover mechanism of the non-volatile memory standard hard drive will be triggered.

[0050] On the other hand, it also includes:

[0051] When the server powers on normally, the management component and communication component monitoring process are started.

[0052] The monitoring process based on the communication components of the management component acquires data from hardware devices other than the target hardware device through the management component transmission protocol path based on the high-speed serial computer extended bus standard or the management component transmission protocol path based on the serial communication bus.

[0053] To address the aforementioned technical problems, this application also provides a computer program product, including a computer program / instructions, which, when executed by a processor, implements the steps of the aforementioned hardware information transmission method.

[0054] To address the aforementioned technical problems, this application also provides a hardware information transmission device, comprising:

[0055] Memory, used to store computer programs;

[0056] A processor is used to implement the steps of the hardware information transmission method described above when executing a computer program.

[0057] To address the aforementioned technical problems, this application also provides a computer non-volatile readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the aforementioned hardware information transmission method.

[0058] The hardware information transmission method provided in this application is applied to a baseboard management controller. Specifically, when the server is powered on normally, register information related to the memory-mapped baseboard management controller interface is configured; an operation shared memory data thread based on the management component transmission protocol of the memory-mapped baseboard management controller interface is started; target data is read from the host to the baseboard management controller's circular buffer through the operation shared memory data thread, and the target data is displayed through a webpage; wherein, the target data is data of a target hardware device that the baseboard management controller cannot directly read out of the band; the target data is read from the target hardware device by the host and stored in the host's circular buffer of the baseboard management controller.

[0059] The beneficial effect of this application lies in the adoption of a management component transmission protocol based on the memory-mapped substrate management controller interface (MMBI) to establish a communication link between the BMC and the host system software. When the BMC needs to acquire target data from target hardware devices that cannot be directly acquired out-of-band, the host reads the target data from the target hardware device and stores it in the MMBI-mapped host-to-substrate management controller circular buffer. Finally, the BMC reads the data from the host-to-substrate management controller circular buffer through the management component transmission protocol based on the MMBI interface, thus achieving the acquisition of target data from the target hardware device. This solution, based on the host software layer, achieves the acquisition of target hardware device data by the BMC through in-band acquisition, and simultaneously achieves the transmission of target hardware device data from the BMC. This solves the problem that current BMCs cannot directly acquire some hardware device data out of band, which is detrimental to BMC hardware monitoring. It can efficiently and reliably transmit hardware device data, reduce latency, and improve the overall system performance.

[0060] On the other hand, in specific implementations, this application configures the register information related to the memory-mapped substrate management controller interface by configuring the total size of the interface; configuring the interrupt status and enable related to data transmission through the interface; configuring the host writable status bit; and configuring the host-to-substrate management controller circular buffer and the substrate management controller-to-host circular buffer. Both the source and destination electronic ID identifiers are set to 0; the physical channel between the host and the host is selected as the memory-mapped substrate management controller interface; and the physical transfer binding identifier is set to 0x07, ensuring data transmission between the BMC and the host via the MCTP over MMBI protocol. The host's system software acquires the target data from the target hardware device; upon triggering an interrupt indicating the completion of target data acquisition, the host's system software writes the target data into the host-to-substrate management controller circular buffer; and the host's system software sends an interrupt indicating the completion of target data acquisition to the substrate management controller, allowing the substrate management controller to read the target data from the host-to-substrate management controller circular buffer. This enables the host to read and store the target data from the target hardware device. When the host computer powers on, it initializes the memory-mapped input / output (MMO) system via its basic input / output (BIO) system. It establishes a path to the MMO interface with the memory-mapped substrate management controller (MLC controller). It configures the corresponding general-purpose input / output (GPIO) pins for interrupts, enabling the triggering of these interrupts by switching their voltage levels. This pre-configuration of the host ensures smooth data reading from the target hardware device and triggers interrupts after data transmission. The system monitors the server's health index and stores it in the host's circular buffer via a management component transmission protocol based on the MMO interface. It sends an interrupt indicating that the health index acquisition and storage are complete to the host. When the host receives this interrupt, its system software reads the server's health index from the MMO in the host's circular buffer via the MMO and displays it. This allows the host to acquire and display the server's health index, providing users with a better understanding of the server's health status.The system acquires user operation requests for server hardware; stores these requests in the host circular buffer of the baseboard management controller via a management component transmission protocol based on the memory-mapped baseboard management controller interface; sends an interrupt indicating that the operation request acquisition and storage is complete to the host, allowing the host to read the operation request through its system software; when the host receives the interrupt indicating that the operation request acquisition and storage is complete, the host's system software reads the server hardware operation request from the baseboard management controller in the host circular buffer via memory-mapped input / output; and processes the user's operation requests for server hardware through the host's system software. This enables the host to acquire and process user operation requests for the server, allowing users to better control the server's operation. The host-based system software acquires self-monitoring, analysis, and reporting (SMART) data of the non-volatile memory standard hard drive (NVMe drive) through a self-monitoring, analysis, and reporting (SMART) technology monitoring tool. When an interrupt indicating the completion of SMART data acquisition is triggered, the host system software writes the SMART data to the baseboard management controller's (BMC) circular buffer. The host system software also sends an interrupt indicating the completion of SMART data acquisition to the BMC, allowing the BMC to read the SMART data from the host's BMC circular buffer. This acquisition of SMART data from the NVMe drive by the BMC is achieved through in-band acquisition at the host software level. Based on the SMART data, the system determines the health status of the NVMe drive and identifies any faults. If a fault is found, an alarm is output, and the drive's failover mechanism is triggered, ensuring data security. When the server powers on normally, the management component communication component monitoring process is started. Based on the management component communication component monitoring process, data from other hardware devices besides the target hardware device is obtained through the management component transmission protocol path based on the high-speed serial computer extended bus standard or the management component transmission protocol path based on the serial communication bus, thus realizing the direct reading of data from other hardware devices.

[0061] In addition, this application also provides a computer program product, a hardware information transmission device and a medium, with the same effect as above. Attached Figure Description

[0062] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0063] Figure 1 is a flowchart of a hardware information transmission method provided in an embodiment of this application;

[0064] Figure 2 is a diagram of the MCTP over MMBI communication architecture provided in an embodiment of this application;

[0065] Figure 3 is an architecture diagram of an NVME hard drive SMART data capture example provided in this application embodiment;

[0066] Figure 4 is a schematic diagram of a hardware information transmission device provided in an embodiment of this application;

[0067] Figure 5 is a schematic diagram of a hardware information transmission device provided in an embodiment of this application. Detailed Implementation

[0068] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.

[0069] The core of this application is to provide a hardware information transmission method, product, device, and medium to solve the problem that current BMCs cannot directly obtain data from some hardware devices out of the band, which is not conducive to BMC monitoring of hardware.

[0070] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0071] MMBI is an interface for communication between the host system and the BMC (Browser Memory Management System). It utilizes memory mapping technology to achieve efficient data transfer. MMBI maps BMC registers or buffers to specific memory address spaces of the host system, allowing the host system to directly access these resources.

[0072] Currently, the BMC can communicate with hardware and obtain hardware information through channels such as MCTP over PCIe / I2C. However, there are limitations to some hardware information that cannot be directly obtained out of band; for example, the BMC cannot normally read SMART data from NVMe hard drives through MCTP over PCIe / I2C, which is detrimental to the BMC's hardware monitoring. To solve the above problems, this application provides a hardware information transmission method, specifically applied to the BMC of a server.

[0073] Figure 1 is a flowchart of a hardware information transmission method provided in an embodiment of this application. As shown in Figure 1, the method includes:

[0074] S10: When the server is powered on normally, configure the register information related to the memory-mapped baseboard management controller interface.

[0075] First, when the server powers on normally, the BMC starts up and configures the register information related to the MMBI. It should be noted that this embodiment does not limit the specific register information configured related to the MMBI; for example, the MMBI size and the memory blocks mapped to the MMBI can be configured, depending on the specific implementation.

[0076] S11: Start the operation shared memory data thread based on the management component transfer protocol of the memory-mapped substrate management controller interface.

[0077] Further, a shared memory data thread for operation based on the Management Component Transfer Protocol (MCTP over MMBI) based on the Memory Mapped Baseboard Management Controller Interface was initiated.

[0078] Figure 2 is a communication architecture diagram of MCTP over MMBI provided in an embodiment of this application. As shown in Figure 2, the MCTP over MMBI protocol in this application is a communication protocol applied between the BMC and the host's Platform Controller Hub (PCH). MMBI is the function of exchanging data between the PCH and BMC through the peripheral channel memory loop of the Enhanced Serial Peripheral Interface (ESPI). In this embodiment, there are no restrictions on the startup method of the MCTP over MMBI shared memory data operation thread; it depends on the specific implementation.

[0079] S12: Read the target data from the host to the circular buffer of the baseboard management controller by operating the shared memory data thread, and display the target data through a webpage.

[0080] The target data refers to the data of the target hardware device that the baseboard management controller cannot directly read out of the band; the target data is read from the target hardware device by the host and stored in the baseboard management controller's circular buffer.

[0081] After the BMC starts the MCTP over MMBI operation shared memory data thread, the target data is read from the host to the board management controller (H2B) circular buffer based on the operation shared memory data thread, that is, through the MCTP over MMBI protocol.

[0082] It's important to note that an H2B circular buffer is a buffer used for data transfer between the host and the BMC. In this structure, the host writes data to the buffer, and the BMC reads data from the buffer. Because the buffer is circular, when the write pointer reaches the end of the buffer, it automatically wraps back to the beginning, thus achieving circular storage and transfer of data.

[0083] Furthermore, the target data refers to data from target hardware devices that the BMC cannot directly read out of band, such as SMART data from NVMe hard drives. In this solution, the host reads the target data from the target hardware device and stores it in an H2B circular buffer, allowing the BMC to directly read the target data from the H2B circular buffer via the MCTP over MMBI protocol, thus enabling the reading of data from the target hardware device.

[0084] It should be noted that this embodiment does not limit the specific process of the host reading the target data from the target hardware device and storing it in the H2B circular buffer; it depends on the specific implementation. The MCTP over MMBI protocol used in this application can significantly improve the efficiency and reliability of data transmission. Using a memory-mapped interface can provide faster access speeds and lower latency, making the transmission of hardware information more real-time. Hardware information can be obtained by directly reading memory without a complex communication process.

[0085] In this embodiment, a management component transmission protocol based on the memory-mapped substrate management controller interface (MMBI) is used to establish a communication link between the BMC and the host system software. When the BMC needs to acquire target data from target hardware devices that cannot be directly acquired out-of-band, the host reads the target data from the target hardware device and stores it in the host-to-substrate management controller circular buffer mapped by the MMBI. Finally, the BMC reads the data from the host-to-substrate management controller circular buffer through the management component transmission protocol based on the MMBI, thus acquiring the target data from the target hardware device. This solution, based on the host software layer, achieves the BMC's acquisition of target hardware device data through in-band acquisition, and simultaneously achieves the transmission of the target hardware device data from the BMC. This solves the problem that the current BMC cannot directly acquire some hardware device data out of band, which is detrimental to the BMC's hardware monitoring. It can efficiently and reliably transmit hardware device data, reduce latency, and improve the overall system performance.

[0086] Based on the above embodiments, in some embodiments, register information related to the memory-mapped substrate management controller interface is configured, including:

[0087] S101: Configures the total size of the memory-mapped substrate management controller interface;

[0088] S102: Configure interrupt status and enable / disable related to data transmission with the memory-mapped substrate management controller interface;

[0089] S103: Configure the host writable status bit, and configure the host-to-board management controller circular buffer and the board management controller-to-host circular buffer.

[0090] In practical implementation, the total size of the MMBI is configured to control the register information related to the MMBI. Generally, the total size of the MMBI can be set to 64KB, 128KB, 256KB, 512KB, 1MB, 2MB, 4MB, or 8MB, depending on the specific implementation. To store a large amount of hardware device data, this application chooses to set the total size of the MMBI to 8MB, thereby storing a large amount of hardware information, interrupt information, and fault information.

[0091] Furthermore, configure the interrupt status and enable / disable related to MMBI data transmission. It is understood that configuring interrupts and enabling / disables enables the BMC to efficiently handle various events and requests, improving the system's real-time performance and concurrency. In this embodiment, configuring the interrupt status and enabling / disabled related to MMBI data transmission can specifically configure 16 interrupt groups: Host RWP 0~1 of Instance#0~#7. For example, enabling the Host RWP 0Instance#0 interrupt allows the host to trigger an interrupt after reading this portion of the content, proceeding with subsequent processes.

[0092] Finally, the host writable status bit is configured, along with the H2B circular buffer and the Baseboard Management Controller to Host (B2H) circular buffer. Understandably, the host writable status bit typically indicates whether the host has write permissions to registers or status words; in this embodiment, it indicates whether the host has write permissions to the H2B circular buffer. The B2H circular buffer is similar to the H2B circular buffer, but in the opposite direction. In this structure, the BMC writes data to the buffer, while the host reads data from it. Similarly, when the write pointer reaches the end of the buffer, it automatically wraps back to the beginning, thus achieving circular storage and transmission of data. Both the H2B and B2H circular buffers utilize the characteristics of circular queues, enabling efficient data flow processing within limited memory space without frequent memory allocation or copying operations.

[0093] In this embodiment, the configuration of register information related to the memory-mapped substrate management controller interface is achieved by configuring the total size of the memory-mapped substrate management controller interface; configuring the interrupt status and enable related to data transmission of the memory-mapped substrate management controller interface; configuring the host writable status bit; and configuring the host-to-substrate management controller circular buffer and the substrate management controller-to-host circular buffer.

[0094] Based on the above embodiments, in some embodiments, the operation shared memory data thread is initiated based on the management component transmission protocol of the memory-mapped substrate management controller interface, including:

[0095] S111: Set both the source electronic ID identifier and the destination electronic ID identifier to 0;

[0096] S112: Select the physical channel between the host and the host as the memory-mapped substrate management controller interface;

[0097] S113: Set the physical transport binding identifier to 0x07.

[0098] In practice, the BMC initiates an MCTP over MMBI shared memory data operation thread, following the MCTP over MMBI protocol. To ensure data transmission between the BMC and the host via the MCTP over MMBI protocol, both the Source EID and Destination EID are set to 0, thus not specifying the source and destination addresses of the transmitted data packets. Simultaneously, the physical channel between the BMC and the host is selected as MMBI, and the physical transport binding identifier is set to 0x07. This ensures data transmission between the BMC and the host via the MCTP over MMBI protocol.

[0099] Based on the above embodiments, in some embodiments, the host reads the target data of the target hardware device and stores it in the host's circular buffer of the baseboard management controller, including:

[0100] S131: Obtain target data of the target hardware device through the host's system software;

[0101] S132: When an interrupt indicating the completion of target data acquisition is triggered, the target data is written to the host's circular buffer of the baseboard management controller through the host's system software;

[0102] S133: The host system software sends an interrupt indicating that the target data acquisition is complete to the baseboard management controller, so that the baseboard management controller can read the target data from the host to the baseboard management controller's circular buffer.

[0103] As described in the above embodiments, the host pre-reads the target data of the target hardware device and stores it in the H2B circular buffer. In specific implementations, the host obtains the target data of the target hardware device through system software, that is, it reads the data of the target hardware device through in-band fetching. After the data of the target hardware device is read, an interrupt is triggered.

[0104] When an interrupt indicating the completion of target data acquisition is triggered, the host writes the target data into the H2B circular buffer through system software. After writing is completed, an interrupt indicating the completion of target data acquisition is sent to the BMC, so that the BMC can read the target data in the H2B circular buffer after receiving the interrupt.

[0105] In this embodiment, the target data of the target hardware device is acquired through the host's system software; when an interrupt indicating the completion of target data acquisition is triggered, the target data is written into the circular buffer of the baseboard management controller by the host's system software; the host's system software sends an interrupt indicating the completion of target data acquisition to the baseboard management controller, so that the baseboard management controller can read the target data from the host into the circular buffer of the baseboard management controller. In this way, the host can read and store the target data of the target hardware device.

[0106] To ensure that the host can successfully read the data from the target hardware device and trigger an interrupt after the data transmission structure, based on the above embodiments, in some embodiments, before obtaining the target data from the target hardware device through the host's system software, the following is also included:

[0107] S134: When the host is powered on, the memory-mapped input / output is initialized through the host's basic input / output system;

[0108] S135: Establish a path for the memory-mapped substrate management controller interface through the host;

[0109] S136: Configure the general-purpose input / output pin corresponding to the interrupt so that the corresponding interrupt can be triggered by switching the level state of the general-purpose input / output pin.

[0110] Specifically, when the host computer powers on, it initializes the Memory-Mapped Input / Output (MMIO) via the host's Basic Input / Output System (BIOS). Then, the host establishes a normal access path to the MMIO. Finally, the corresponding General Purpose Input / Output (GPIO) pins are configured to trigger interrupts by switching the level states of the GPIO pins. For example, when data communication is complete, pulling the GPIO pin high or low triggers the corresponding interrupt.

[0111] In this embodiment, when the host is powered on, the memory-mapped input / output is initialized through the host's basic input / output system; a path for the memory-mapped board management controller interface is established through the host; and the general-purpose input / output pins corresponding to the interrupt are configured so that the corresponding interrupt can be triggered by switching the level state of the general-purpose input / output pins. This realizes the pre-configuration of the host, ensuring that the host can successfully read the data of the target hardware device and trigger the interrupt after the data transmission structure.

[0112] In order for the host to obtain and display relevant data of the server, such as the server's health index, in some embodiments, based on the above embodiments, the method further includes:

[0113] S141: Monitor the server's health index;

[0114] S142: Store the server's health index into the host circular buffer of the baseboard management controller via the management component transmission protocol based on the memory-mapped baseboard management controller interface.

[0115] S143: Send an interrupt to the host indicating that the health index has been acquired and stored, so that the host can read the health index through the system software.

[0116] First, the BMC monitors the server's health index in real time and stores the health index in a B2H circular buffer via the MCTP over MMBI protocol. Then, the BMC sends an interrupt to the host indicating that the health index acquisition and storage are complete, allowing the host to read the health index through system software.

[0117] In order for the host to obtain and display the server's health index, in specific implementations, the host reads the health index through system software, including:

[0118] S144: When an interrupt indicating that the health index has been acquired and stored is received, the host system software reads the server's health index from the baseboard management controller to the host circular buffer through memory-mapped input / output.

[0119] S145: Displays the server's health index through the host's system software.

[0120] Specifically, when the host receives an interrupt indicating that the health index has been acquired and stored, the host's system software reads the server's health index from the B2H circular buffer through MMIO and displays the server's health index through the host's system software, which can be done through a web page.

[0121] This enables the host to obtain and display the server's health index, allowing users to better understand the server's health status.

[0122] In order for the host to acquire and process user requests for operations on the server, in some embodiments, in addition to the above embodiments, the method further includes:

[0123] S151: Obtain user requests for operations on server hardware;

[0124] S152: Store the operation request into the host circular buffer of the board management controller via the management component transmission protocol based on the memory-mapped board management controller interface;

[0125] S153: Send an interrupt to the host indicating that the operation request has been acquired and stored, so that the host can read the operation request through the system software.

[0126] First, the BMC acquires the user's operation request for the server hardware. In this embodiment, the specific type of operation request is not limited and depends on the specific implementation. The operation request is then stored in the B2H circular buffer via the MCTP over MMBI protocol, and an interrupt indicating that the operation request has been acquired and stored is sent to the host, so that the host can read the operation request through the system software.

[0127] In order for the host to obtain and process user operation requests to the server, in specific implementations, the host reads the operation requests through system software, including:

[0128] S154: When an interrupt is received indicating that the characterization operation request has been acquired and stored, the host system software reads the operation request of the server hardware from the baseboard management controller to the host circular buffer through memory-mapped input / output.

[0129] S155: Processes user requests for server hardware operations through the host's system software.

[0130] Specifically, when the host receives an interrupt indicating that the operation request has been acquired and stored, the host's system software reads the server hardware operation request from the B2H circular buffer via MMIO and processes the user's operation request for the server hardware. This embodiment does not limit the specific processing method of the operation request by the host software system; it depends on the specific implementation.

[0131] This enables the host to acquire and process user requests for server operations, allowing users to better control the server's operation.

[0132] It is understandable that in specific implementations, the BMC cannot directly read the SMART data of the NVMe hard drive out of band. Figure 3 is an architecture diagram of an example of NVMe hard drive SMART data capture provided in this application embodiment. In order to enable the BMC to acquire the SMART data of the NVMe hard drive, based on the above embodiments, in some embodiments, based on the architecture shown in Figure 3, the host reads the target data of the target hardware device and stores it in the host's circular buffer of the baseboard management controller, including:

[0133] S161: Host-based system software that acquires self-monitoring analysis and reporting technology data of non-volatile memory standard hard disks through self-monitoring analysis and reporting technology monitoring tools;

[0134] S162: When an interrupt is triggered indicating that the self-monitoring analysis and reporting technology data acquisition is complete, the self-monitoring analysis and reporting technology data is written to the host's circuit board management controller's circular buffer through the host's system software;

[0135] S163: The host system software sends an interrupt indicating that the acquisition of self-monitoring analysis and reporting technology data has been completed to the baseboard management controller, so that the baseboard management controller can read the self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk in the circular buffer of the baseboard management controller.

[0136] Specifically, the host system software first acquires SMART data from the NVMe hard drive using the SmartCTL self-monitoring, analysis, and reporting technology. Once an interrupt indicating the completion of SMART data acquisition is triggered, the host system software writes the SMART data into the H2B circular buffer.

[0137] Furthermore, the host system software sends an interrupt indicating the completion of SMART data acquisition to the BMC, informing the BMC that the current SMART data has been stored in the H2B circular buffer. This allows the BMC to read the SMART data from the NVMe hard drive from the H2B circular buffer. In this way, the BMC acquires SMART data from the NVMe hard drive in an in-band manner at the host software level.

[0138] To ensure the data security of NVMe hard drives, based on the above embodiments, in some embodiments, after the baseboard management controller reads the self-monitoring analysis and reporting technology data of the non-volatile memory standard hard drive from the host to the baseboard management controller's circular buffer, the following is also included:

[0139] S164: Determine the health status of non-volatile memory standard hard drives based on self-monitoring analysis and reporting technology data;

[0140] S165: Determine whether the non-volatile memory standard hard disk is faulty; if the non-volatile memory standard hard disk is faulty, proceed to step S166.

[0141] S166: Output alarm information and trigger the hard disk failover mechanism of the non-volatile memory standard hard disk.

[0142] Specifically, after reading the SMART data of the NVMe hard drive, the BMC determines the health status of the NVMe hard drive based on the SMART data and judges whether the NVMe hard drive is faulty.

[0143] If the NVMe hard drive is confirmed to be functioning correctly, the system continues to monitor its SMART data. If a failure is confirmed, an alarm message is output to notify the user of the failure and the NVMe hard drive's failover mechanism is triggered to transfer the data currently on the NVMe hard drive, preventing data loss due to the failure. This ensures the data security of the NVMe hard drive.

[0144] Furthermore, in practical implementation, besides diagnosing NVMe hard drives based on their SMART data, the BMC can also optimize system performance based on performance metrics (such as read / write speeds and latency) within the SMART data. For example, if a hard drive's performance degrades, the BMC can rebalance the load or adjust I / O priorities to ensure critical tasks are unaffected. Simultaneously, the BMC can check firmware version information in the SMART data and manage firmware updates as needed. If the firmware version is outdated or has known issues, the BMC can automatically download and install new firmware to ensure hard drive stability and security.

[0145] Based on the above embodiments, in some embodiments, the method further includes:

[0146] S171: When the server powers on normally, start the management component communication component monitoring process;

[0147] S181: Based on the monitoring process of the management component communication component, data of other hardware devices besides the target hardware device is obtained through the management component transmission protocol path based on the high-speed serial computer extended bus standard or the management component transmission protocol path based on the serial communication bus.

[0148] Understandably, for some hardware devices, the BMC can directly obtain the corresponding data through certain pathways, without needing to indirectly obtain it through the host and circular buffer. Therefore, in specific implementations, when the server powers on normally, the management component communication component monitoring process is started; based on the management component communication component monitoring process, data from other hardware devices besides the target hardware device is obtained through the MCTP over PCIE protocol pathway or the MCTP over I2C protocol pathway, realizing direct reading of hardware device information.

[0149] In the above embodiments, the hardware information transmission method has been described in detail. This application also provides embodiments corresponding to the hardware information transmission device.

[0150] Figure 4 is a schematic diagram of a hardware information transmission device provided in an embodiment of this application. The device is applied to a baseboard management controller; as shown in Figure 4, the device includes:

[0151] Configuration module 10 is used to configure register information related to the memory-mapped substrate management controller interface when the server is powered on normally.

[0152] Startup module 11 is used to start the operation shared memory data thread based on the management component transmission protocol of the memory-mapped substrate management controller interface.

[0153] The reading module 12 is used to read the target data from the host to the circular buffer of the baseboard management controller by operating the shared memory data thread, and to display the target data through a webpage.

[0154] The target data refers to the data of the target hardware device that the baseboard management controller cannot directly read out of the band; the target data is read from the target hardware device by the host and stored in the baseboard management controller's circular buffer.

[0155] In some embodiments, the configuration module 10 includes:

[0156] The first configuration submodule is used to configure the total size of the memory-mapped substrate management controller interface;

[0157] The second configuration submodule is used to configure the interrupt status and enable / disable related to data transmission with the memory-mapped substrate management controller interface.

[0158] The third configuration submodule is used to configure the host writable status bit and configure the host-to-board management controller circular buffer and the board management controller-to-host circular buffer.

[0159] In some embodiments, the startup module 11 includes:

[0160] The first setting submodule is used to set both the source electronic ID card identifier and the destination electronic ID card identifier to 0;

[0161] The second setting submodule is used to select the physical channel between the host and the host as the memory-mapped substrate management controller interface;

[0162] The third setting submodule is used to set the physical transport binding identifier to 0x07.

[0163] In some embodiments, the host reads target data from the target hardware device and stores it in the host-to-board management controller circular buffer. Specifically, this includes: acquiring the target data from the target hardware device through the host's system software; writing the target data into the host-to-board management controller circular buffer through the host's system software after triggering an interrupt indicating that the target data acquisition is complete; and sending an interrupt indicating that the target data acquisition is complete to the board management controller through the host's system software, so that the board management controller can read the target data from the host-to-board management controller circular buffer.

[0164] In some embodiments, before acquiring the target data of the target hardware device through the host's system software, the method further includes: initializing the memory-mapped input / output through the host's basic input / output system when the host is powered on; establishing a path for the memory-mapped board management controller interface through the host; and configuring the general-purpose input / output pins corresponding to the interrupt so as to trigger the corresponding interrupt by switching the level state of the general-purpose input / output pins.

[0165] In some embodiments, it also includes:

[0166] The monitoring submodule is used to monitor the health index of the server;

[0167] The first storage submodule is used to store the server's health index into the host circular buffer of the baseboard management controller through the management component transmission protocol based on the memory-mapped baseboard management controller interface.

[0168] The first sending submodule is used to send an interrupt indicating that the health index has been acquired and stored to the host, so that the host can read the health index through the system software.

[0169] In some embodiments, the host reads the health index through system software, including: when receiving an interrupt indicating that the health index has been acquired and stored, the host's system software reads the server's health index from the baseboard management controller to the host's circular buffer through memory-mapped input / output; and displays the server's health index through the host's system software.

[0170] In some embodiments, it also includes:

[0171] The first acquisition submodule is used to acquire user requests for operations on server hardware;

[0172] The second storage submodule is used to store operation requests into the host circular buffer of the substrate management controller via the management component transmission protocol based on the memory-mapped substrate management controller interface.

[0173] The second sending submodule is used to send an interrupt indicating that the operation request has been acquired and stored to the host, so that the host can read the operation request through the system software.

[0174] In some embodiments, the host reads operation requests through system software, including: when receiving an interrupt indicating that the operation request has been acquired and stored, the host's system software reads the operation request of the server hardware from the baseboard management controller to the host circular buffer through memory-mapped input / output; and processes the user's operation request for the server hardware through the host's system software.

[0175] In some embodiments, the host reads target data from the target hardware device and stores it in the host-to-board management controller circular buffer, including: acquiring self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk through a self-monitoring analysis and reporting technology monitoring tool based on the host's system software; writing the self-monitoring analysis and reporting technology data into the host-to-board management controller circular buffer through the host's system software after triggering an interrupt indicating the completion of self-monitoring analysis and reporting technology data acquisition; and sending an interrupt indicating the completion of self-monitoring analysis and reporting technology data acquisition to the board management controller through the host's system software, so that the board management controller can read the self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk from the host-to-board management controller circular buffer.

[0176] In some embodiments, it also includes:

[0177] The first determination submodule is used to determine the health status of the non-volatile memory standard hard disk based on self-monitoring analysis and reporting technology data;

[0178] The judgment submodule is used to determine whether the non-volatile memory standard hard disk is faulty; if the non-volatile memory standard hard disk is faulty, the alarm module is triggered.

[0179] The alarm module is used to output alarm information and trigger the hard disk failover mechanism of the non-volatile memory standard hard disk.

[0180] In some embodiments, it also includes:

[0181] The startup submodule is used to start the management component, communication component, and monitoring process when the server is powered on normally.

[0182] The second acquisition submodule is used to monitor the process based on the management component communication component, and to acquire data from hardware devices other than the target hardware device through the management component transmission protocol path based on the high-speed serial computer extended bus standard or the management component transmission protocol path based on the serial communication bus.

[0183] Since the embodiments of the apparatus and the embodiments of the method correspond to each other, please refer to the description of the embodiments of the method for the embodiments of the apparatus, which will not be repeated here.

[0184] In addition, this application also provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the hardware information transmission method described above.

[0185] Figure 5 is a schematic diagram of a hardware information transmission device provided in an embodiment of this application. As shown in Figure 5, the hardware information transmission device includes:

[0186] Memory 20 is used to store computer programs;

[0187] The processor 21 is used to implement the steps of the hardware information transmission method mentioned in the above embodiments when executing a computer program.

[0188] The hardware information transmission device provided in this embodiment may include, but is not limited to, smartphones, tablets, laptops, or desktop computers.

[0189] The processor 21 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 21 may be implemented using at least one of the following hardware forms: Digital Signal Processor (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). The processor 21 may also include a main processor and a coprocessor. The main processor, also known as the Central Processing Unit (CPU), is used to process data in the wake-up state; the coprocessor is a low-power processor used to process data in the standby state. In some embodiments, the processor 21 may integrate a Graphics Processing Unit (GPU), which is responsible for rendering and drawing the content to be displayed on the screen. In some embodiments, the processor 21 may also include an Artificial Intelligence (AI) processor, which handles computational operations related to machine learning.

[0190] The memory 20 may include one or more computer-defined non-volatile readable storage media, which may be non-transitory. The memory 20 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 20 is used to store at least the following computer program 201, which, after being loaded and executed by the processor 21, is capable of implementing the relevant steps of the hardware information transmission method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 20 may also include an operating system 202 and data 203, and the storage method may be temporary storage or permanent storage. The operating system 202 may include Windows, Unix, Linux, etc. The data 203 may include, but is not limited to, the data involved in the hardware information transmission method.

[0191] In some embodiments, the hardware information transmission device may further include a display screen 22, an input / output interface 23, a communication interface 24, a power supply 25, and a communication bus 26.

[0192] Those skilled in the art will understand that the structure shown in Figure 5 does not constitute a limitation on the hardware information transmission device and may include more or fewer components than shown.

[0193] Finally, this application also provides an embodiment corresponding to a computer non-volatile readable storage medium. The computer non-volatile readable storage medium stores a computer program, which, when executed by a processor, implements the steps described in the above method embodiments.

[0194] It is understood that if the methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0195] The foregoing has provided a detailed description of a hardware information transmission method, product, device, and medium provided in this application. The various embodiments in the specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section. It should be noted that those skilled in the art can make several improvements and modifications to this application without departing from the principles of this application, and these improvements and modifications also fall within the protection scope of this application.

[0196] It should also be noted that, in this specification, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

Claims

1. A hardware information transmission method, characterized by, The application is applied to a substrate management controller, and the method comprises the following steps: When the server is normally powered on, register information related to a memory-mapped substrate management controller interface is configured; An operation shared memory data thread based on a management component transmission protocol of the memory-mapped substrate management controller interface is started; Target data in a host-to-substrate management controller circular buffer is read through the operation shared memory data thread, and the target data is displayed through a webpage; The target data is data of a target hardware device that cannot be directly read by the substrate management controller out of band; the target data is read from the target hardware device by a host and stored in the host-to-substrate management controller circular buffer.

2. The hardware information transfer method according to claim 1, wherein The register information related to the memory-mapped substrate management controller interface is configured, comprising: The total size of the memory-mapped substrate management controller interface is configured; An interrupt state and an enable related to data transmission of the memory-mapped substrate management controller interface are configured; A host-writable state bit is configured, and a host-to-substrate management controller circular buffer and a substrate management controller-to-host circular buffer are configured.

3. The hardware information transfer method of claim 1, wherein, The operation shared memory data thread based on the management component transmission protocol of the memory-mapped substrate management controller interface is started, comprising: Both a source electronic identity certificate identifier and a destination electronic identity certificate identifier are set to 0; A physical channel between the host is selected as the memory-mapped substrate management controller interface; A physical transmission binding identifier is set to 0x07.

4. The hardware information transfer method of claim 1, wherein, The host reads the target data of the target hardware device and stores the target data in the host-to-substrate management controller circular buffer, comprising: The target data of the target hardware device is acquired through system software of the host; After an interrupt representing completion of acquisition of the target data is triggered, the target data is written into the host-to-substrate management controller circular buffer through the system software of the host; The interrupt representing completion of acquisition of the target data is sent to the substrate management controller through the system software of the host, so that the substrate management controller reads the target data in the host-to-substrate management controller circular buffer.

5. The hardware information transfer method according to claim 4, wherein Before the target data of the target hardware device is acquired through the system software of the host, the following steps are further included: When the host is powered on, memory-mapped input / output is initialized through basic input / output system of the host; A path of the memory-mapped substrate management controller interface is established through the host; A general input / output pin corresponding to an interrupt is configured, so that a corresponding interrupt is triggered by switching a level state of the general input / output pin.

6. The hardware information transfer method of claim 1, wherein, Further comprising: A health index of the server is monitored; The health index of the server is stored in a substrate management controller-to-host circular buffer through the management component transmission protocol based on the memory-mapped substrate management controller interface; An interrupt representing completion of acquisition and storage of the health index is sent to the host, so that the health index is read by the host through system software.

7. The hardware information transfer method according to claim 6, wherein The health index is read by the host through system software, comprising: When receiving an interrupt indicating that the health index is acquired and stored, the system software of the host reads the health index of the server in the baseboard management controller to host circular buffer through memory mapping input / output; The system software of the host displays the health index of the server.

8. The hardware information transfer method of claim 1, wherein, Further comprising: Acquiring a user's operation request for server hardware; Storing the operation request in a baseboard management controller to host circular buffer through the management component based on the memory mapping baseboard management controller interface transmission protocol; Sending an interrupt indicating that the operation request is acquired and stored to the host, so that the host reads the operation request through system software.

9. The hardware information transfer method of claim 8, wherein, The host reads the operation request through system software, including: When receiving an interrupt indicating that the operation request is acquired and stored, the system software of the host reads the operation request of the server hardware in the baseboard management controller to host circular buffer through memory mapping input / output; The system software of the host processes the operation request of the user for the server hardware.

10. The hardware information transfer method of claim 1, wherein, The host reads the target data of the target hardware device and stores it in the host to baseboard management controller circular buffer, including: Based on the system software of the host, acquiring self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk through a self-monitoring analysis and reporting technology monitoring tool; When an interrupt indicating that the self-monitoring analysis and reporting technology data acquisition is completed is triggered, the system software of the host writes the self-monitoring analysis and reporting technology data into the host to baseboard management controller circular buffer; The system software of the host sends an interrupt indicating that the self-monitoring analysis and reporting technology data acquisition is completed to the baseboard management controller, so that the baseboard management controller reads the self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk in the host to baseboard management controller circular buffer.

11. The hardware information transfer method according to claim 10, wherein After the baseboard management controller reads the self-monitoring analysis and reporting technology data of the non-volatile memory standard hard disk in the host to baseboard management controller circular buffer, further comprising: According to the self-monitoring analysis and reporting technology data, determining the health status of the non-volatile memory standard hard disk; Judging whether the non-volatile memory standard hard disk has a fault; If the non-volatile memory standard hard disk has a fault, outputting an alarm information and triggering a hard disk failover mechanism of the non-volatile memory standard hard disk.

12. The hardware information transfer method according to any one of claims 1 to 11, wherein Further comprising: When the server is normally powered on, starting a management component communication part monitoring process; Based on the management component communication part monitoring process, acquiring data of the remaining hardware devices except the target hardware device through a management component transmission protocol channel based on the high-speed serial computer expansion bus standard or a management component transmission protocol channel based on the serial communication bus.

13. The hardware information transfer method of claim 2, wherein, The host writable state bit is used to indicate whether the host has write permission to the host to baseboard management controller circular buffer.

14. The hardware information transfer method of claim 11, wherein, After outputting the alarm information, the method further comprises: Based on the baseboard management controller, system performance is optimized according to performance indicators in the self-monitoring, analysis, and reporting technology data.

15. The hardware information transfer method of claim 14, wherein, The system performance optimization according to the performance indicators in the self-monitoring, analysis, and reporting technology data comprises: If the self-monitoring, analysis, and reporting technology data indicates that the performance of a hard disk is degraded, the load and / or the input / output priority of the hard disk with degraded performance is adjusted, and / or, according to firmware version information in the self-monitoring, analysis, and reporting technology data, firmware is updated.

16. The hardware information transfer method of claim 7, wherein, The health index of the server is displayed through system software of the host. The health index of the server is displayed through a webpage of the host.

17. A hardware information transfer apparatus, characterized by comprising: Comprise: A configuration module is configured to configure register information related to a memory-mapped baseboard management controller interface when a server is normally powered on. A starting module is configured to start an operation shared memory data thread based on a management component transmission protocol of the memory-mapped baseboard management controller interface. A reading module is configured to read target data in a host-to-baseboard management controller circular buffer through the operation shared memory data thread, and display the target data through a webpage.

18. A computer program product comprising computer programs / instructions, characterized in that, The computer program / instruction is executed by the processor to realize the steps of the hardware information transmission method in any one of claims 1 to 16.

19. A hardware information transfer device, characterized by Comprise: A memory is configured to store a computer program; A processor is configured to execute the computer program to realize the steps of the hardware information transmission method in any one of claims 1 to 16.

20. A computer non-volatile readable storage medium characterized in that, The computer program is stored on the computer non-volatile readable storage medium, and the computer program is executed by the processor to realize the steps of the hardware information transmission method in any one of claims 1 to 16.

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