Stacked structure and semiconductor device

Abstract

This stacked structure comprises: an amorphous substrate; a first orientation layer on the amorphous substrate, the first orientation layer containing titanium; a second orientation layer on the first orientation layer, the second orientation layer containing aluminum; and a nitride semiconductor layer on the second orientation layer. The nitride semiconductor layer is a gallium nitride layer, and the gallium nitride layer may further contain magnesium. The second orientation layer may further contain magnesium. The stacked structure further comprises a buffer layer between the second orientation layer and the gallium nitride layer, and the buffer layer may contain aluminum. The buffer layer may further contain gallium nitride.

Description

Stacked structure and semiconductor device

[0001] One embodiment of the present invention relates to a stacked layer structure including a nitride semiconductor layer (gallium nitride film) formed on a substrate.

[0002] As an example of a nitride semiconductor layer, gallium nitride (GaN) is characterized as a direct transition semiconductor with a wide band gap. Utilizing this characteristic of gallium nitride, light-emitting diodes (LEDs) using gallium nitride have already been put into practical use. Gallium nitride also has the characteristic of high electron saturation mobility and high breakdown voltage. In recent years, utilizing these characteristics of gallium nitride, the development of transistors for high-frequency power devices has been progressing. Gallium nitride films for light-emitting diodes or transistors are generally formed on sapphire substrates at high temperatures of 800°C to 1000°C using MOCVD (Metal Organic Chemical Vapor Deposition) or HVPE (Hydride Vapor Phase Epitaxy).

[0003] Furthermore, a method has been considered in which a selective growth mask is formed on a sapphire substrate and a gallium nitride film is grown epitaxially (see, for example, Patent Document 1). Also, a method has been considered in which a glass substrate is used in addition to a sapphire substrate to form a gallium nitride film, a silicon oxide film is formed on the glass substrate, and a buffer layer made of an amorphous silicon thin film and aluminum gallium nitride is formed thereon, and gallium nitride is grown epitaxially (see, for example, Patent Document 2).

[0004] JP 2018-168029 A JP 2000-124140 A

[0005] As described above, gallium nitride can be used for both front planes (displays) such as LEDs and back planes (drive substrates) such as transistors. Gallium nitride sputtering targets have been developed in recent years, and the manufacturing process for conventional front planes other than LEDs is now compatible with the manufacturing process using gallium nitride. However, although the above-described method for epitaxially growing gallium nitride crystals has been investigated, there are many problems, such as the crystallinity of gallium nitride and the need to increase the area of ​​the backplane, in order to manufacture a backplane using gallium nitride using the manufacturing process for conventional front planes other than LEDs.

[0006] In view of the above problems, one object of one embodiment of the present invention is to provide a stacked structure in which a highly crystalline gallium nitride layer is formed on a substrate that can be made large in area.

[0007] A laminated structure according to one embodiment of the present invention includes an amorphous substrate, a first alignment layer containing titanium on the amorphous substrate, a second alignment layer containing aluminum on the first alignment layer, and a gallium nitride layer on the second alignment layer.

[0008] 1 is a schematic diagram showing the configuration of a laminated structure according to one embodiment of the present invention. 2 is a schematic diagram showing the configuration of a laminated structure according to one embodiment of the present invention. 3 is a schematic diagram showing the configuration of a light-emitting device using the laminated structure according to one embodiment of the present invention. 4 is a schematic diagram showing the configuration of a semiconductor device using the laminated structure according to one embodiment of the present invention. 5 is a diagram showing an X-ray diffraction spectrum of a laminated structure according to an example.

[0009] Hereinafter, each embodiment of the present invention will be described with reference to the drawings. Note that each embodiment is merely an example, and any embodiment that a person skilled in the art could easily come up with by making appropriate modifications while maintaining the gist of the invention is naturally included in the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may show the width, thickness, shape, etc. of each part schematically compared to the actual embodiment. However, the illustrated shapes are merely examples and do not limit the interpretation of the present invention.

[0010] In this specification, unless otherwise specified, expressions such as "α includes A, B, or C," "α includes any of A, B, and C," and "α includes one selected from the group consisting of A, B, and C" do not exclude cases where α includes multiple combinations of A to C. Furthermore, these expressions do not exclude cases where α includes other elements.

[0011] In this specification, for the sake of convenience, the terms "above" or "upper" or "below" or "belower" are used. In principle, the substrate on which the structure is formed is used as the reference, and the direction from the substrate toward the structure is referred to as "above" or "upper." Conversely, the direction from the structure toward the substrate is referred to as "below" or "belower." Therefore, in the expression "structure on a substrate," the surface of the structure facing the substrate is the lower surface of the structure, and the surface opposite to that is the upper surface of the structure. Furthermore, the expression "structure on a substrate" merely describes the vertical relationship between the substrate and the structure, and other components may be disposed between the substrate and the structure. Furthermore, the terms "above" or "upper" or "below" or "belower" refer to the stacking order in a structure in which multiple layers are stacked, and do not necessarily have to be in an overlapping positional relationship in a planar view.

[0012] In this specification, the letters "first," "second," or "third" attached to each component are convenient labels used to distinguish each component, and have no other meaning unless otherwise specified.

[0013] In this specification, when a material is represented by a molecular formula, the x added to the lower right of the element symbol indicates that the number of the element is an integer of 1 or more.

[0014] In this specification and drawings, the same reference numeral is used to collectively represent multiple identical or similar components, and when these multiple components are to be distinguished from one another, lowercase or uppercase letters may be added. Furthermore, when multiple parts of a single component are to be distinguished from one another, a hyphen and a natural number may be used.

[0015] 1 is a schematic diagram showing the configuration of a stacked structure according to one embodiment of the present invention. The stacked structure 10 includes a substrate 100, an underlayer 200, a first alignment layer 300, a second alignment layer 400, and a Group III nitride layer 500. The stacked structure 10 is a structure in which the underlayer 200, the first alignment layer 300, the second alignment layer 400, and the Group III nitride layer 500 are stacked in this order on the substrate 100.

[0016] The substrate 100 is a support substrate for the group III nitride layer 500. Because the group III nitride layer 500 of the stacked structure 10 is formed by sputtering, the substrate 100 only needs to have heat resistance of, for example, about 600°C. Furthermore, because the crystallinity of the group III nitride layer 500 is significantly affected by the first alignment layer 300 and the second alignment layer 400, it is not necessary to use a crystalline substrate for the substrate 100. Therefore, an amorphous substrate is used for the substrate 100. For example, an amorphous glass substrate or an amorphous resin substrate can be used for the substrate 100. A plastic substrate can be used for the amorphous resin substrate, and a polyimide resin substrate can be used for the plastic substrate. Amorphous substrates can be made large in area and can be used for backplanes.

[0017] The underlayer 200 can prevent the diffusion of impurities (e.g., moisture or sodium (Na)) from the substrate 100. Since the layered structure 10 on which the underlayer 200 is formed does not have the impurities diffused from the substrate 100, the crystallinity of the first alignment layer 300 on the underlayer 200 can be improved. For example, silicon oxide (SiO ｘ ) or silicon nitride (SiN ｘ ) or the like can be used. The underlayer 200 may be a single film or a laminated film. As shown in FIG. 1, the underlayer 200 may have a first underlayer 200-1 provided on the substrate 100, and a second underlayer 200-2 provided on the first underlayer 200-1. Here, for example, if the substrate 100 is an amorphous glass substrate, a laminated layer (SiO ) using silicon nitride for the first underlayer 200-1 and silicon oxide for the second underlayer 200-2 may be used. ｘ / SiN ｘIf the substrate 100 is an amorphous resin substrate, a laminated layer in which silicon nitride is sandwiched between silicon oxide layers (SiO ｘ / SiN ｘ / SiO ｘ The underlayer 200 may be provided depending on the properties of the substrate 100, and the laminated structure 10 may not include the underlayer 200.

[0018] The first alignment layer 300 can improve the crystallinity of the group III nitride layer 500 provided on the second alignment layer 400. The first alignment layer 300 preferably has a crystal structure that is highly similar to the crystal structure of gallium nitride. The first alignment layer 300 is a layer containing titanium (Ti), for example, titanium, titanium nitride (TiN), etc. ｘ ), or titanium oxide (TiO ｘ ) or the like can be used. In particular, it is preferable to use titanium for the first alignment layer 300. The thickness of the first alignment layer 300 is, for example, 50 nm or more. The method for forming the first alignment layer 300 is not limited to sputtering. The first alignment layer 300 can be formed using any method (apparatus) such as CVD.

[0019] The second alignment layer 400 can further improve the crystallinity of the group III nitride layer 500. The second alignment layer 400 uses a material that is less likely to react with the first alignment layer 300. In other words, the second alignment layer 400 is less likely to cause unintended bonding between atoms contained in each of the first alignment layers 300.

[0020] Furthermore, the second alignment layer 400 has crystallinity that is highly compatible with that of the first alignment layer 300, and is therefore less likely to cause crystal disorder in the first alignment layer 300. The second alignment layer 400 also has high compatibility with the crystallinity of gallium nitride, and is less likely to react with gallium nitride. Therefore, the second alignment layer 400 can function as a buffer layer between the first alignment layer 300 and the Group III nitride layer 500.

[0021] The second alignment layer 400 may be formed, for example, using a material that has low reactivity with the material used for the first alignment layer 300 and has a crystalline structure that is the same as or highly similar to the crystalline structure of the material used for the first alignment layer 300 and the crystalline structure of gallium nitride. The second alignment layer 400 is a layer containing aluminum. For example, aluminum nitride (AlN) or the like may be used for the second alignment layer 400. The thickness of the second alignment layer 400 is, for example, 50 nm or more. The second alignment layer 400 may be formed using the same method as the first alignment layer 300.

[0022] The Group III nitride layer 500 may be a compound containing a Group 13 element and a Group 15 element. More specifically, it may be a semiconductor containing aluminum, gallium, and / or indium, as well as nitrogen, phosphorus, and / or arsenic. Typical examples include gallium-based materials. Examples include gallium nitride-based materials such as gallium nitride (GaN), aluminum gallium nitride (AlGaN), and indium gallium nitride (InGaN), as well as gallium phosphide-based materials such as gallium phosphide (GaP) and aluminum indium gallium phosphide (AlGaInP).

[0023] As described above, the group III nitride layer 500 is formed by sputtering. Here, the formation of the group III nitride layer 500 using sputtering will be described.

[0024] The substrate 100 is placed in a vacuum chamber facing the gallium nitride target. The composition ratio of gallium nitride in the gallium nitride target is preferably 0.7 or more and 2 or less of gallium to nitrogen.

[0025] Nitrogen can be supplied to the vacuum chamber separately from the sputtering gas (argon, krypton, etc.). In this case, the gallium nitride composition ratio of the gallium nitride target is preferably higher than that of nitrogen. For example, nitrogen can be supplied using a nitrogen radical source. The sputtering power source can be a DC power source, an RF power source, or a pulsed DC power source.

[0026] The substrate 100 in the vacuum chamber may be heated, for example, to a temperature of 400°C or higher and lower than 600°C.

[0027] After the vacuum chamber is thoroughly evacuated, a sputtering gas is supplied. A voltage is applied between the substrate 100 and the gallium nitride target at a predetermined pressure to generate plasma, which deposits a group III nitride layer 500. The group III nitride layer 500 is formed on the second oriented layer 400, which has a crystalline structure highly similar to that of gallium nitride, and therefore is a layer with high c-axis orientation and crystallinity.

[0028] In the stacked structure 10, by providing the second alignment layer 400 between the Group III nitride layer 500 and the first alignment layer 300, it is possible to form a highly crystalline Group III nitride layer 500 on the substrate 100 that uses an amorphous substrate. By applying this embodiment, it is possible to increase the area of ​​a highly crystalline gallium nitride film, and it is possible to manufacture highly productive LEDs containing gallium nitride or backplanes on which transistors containing gallium nitride are formed.

[0029] <Modification> In the present embodiment, an example has been described in which only gallium nitride is used for the group III nitride layer 500. In a modification, an example will be described in which the group III nitride layer 500 is doped with impurities so that the group III nitride layer 500 functions as an n-type semiconductor layer and a p-type semiconductor layer.

[0030] When doping the Group III nitride layer 500 with an impurity, the Group III nitride layer 500 is doped with an n-type or p-type impurity. Examples of n-type impurities that can be used include silicon (Si) and germanium (Ge). Examples of p-type impurities that can be used include magnesium (Mg) and zinc (Zn).

[0031] Here, when the above-mentioned aluminum nitride is used for the second alignment layer 400, the large band gap of aluminum nitride results in a large potential barrier between the second alignment layer 400 and the impurity-doped Group III nitride layer 500. Therefore, when the Group III nitride layer 500 is doped with n-type impurities, the second alignment layer 400 can also be doped with n-type impurities. For example, when the Group III nitride layer 500 is doped with silicon, the second alignment layer 400 can also be doped with silicon. Furthermore, when the Group III nitride layer 500 is doped with p-type impurities, the second alignment layer 400 can also be doped with p-type impurities. For example, when the Group III nitride layer 500 is doped with magnesium, the second alignment layer 400 can also be doped with magnesium.

[0032] The second alignment layer 400 may be doped with the above-mentioned impurities even when the Group III nitride layer 500 is not doped with impurities. By doping the second alignment layer 400 with the above-mentioned impurities, the electrical conductivity of the second alignment layer 400 increases, and the conductivity of the stacked structure 10 in the stacking direction increases.

[0033] Second Embodiment Fig. 2 is a schematic diagram showing the configuration of a stacked structure 20 according to one embodiment of the present invention. The stacked structure 20 includes an underlayer 200, a first alignment layer 300, a second alignment layer 400, a buffer layer 450, and a Group III nitride layer 500. The buffer layer 450 is provided between the second alignment layer 400 and the Group III nitride layer 500. In the following, when the configuration of the stacked structure 20 is similar to that of the stacked structure 10, its description may be omitted.

[0034] The buffer layer 450 can further improve the crystallinity of the gallium nitride layer. When the second alignment layer 400 and the III nitride layer 500 have the same crystal structure but a difference in lattice constant, the buffer layer 450 can alleviate distortion between the crystal structure of the second alignment layer 400 and the crystal structure of the III nitride layer 500.

[0035] The buffer layer 450 is preferably made of a material whose lattice constant is closer to that of the crystal structure of the Group III nitride layer 500 than to that of the crystal structure of the second alignment layer 400. The buffer layer 450 preferably contains aluminum, and more preferably contains gallium nitride. The buffer layer 450 can be made of, for example, aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), indium gallium nitride (InGaN), or aluminum indium gallium nitride (AlInGaN).

[0036] In the stacked structure 10, by providing a buffer layer between the Group III nitride layer 500 and the second alignment layer 400, it is possible to form a Group III nitride layer 500 with higher crystallinity on the substrate 100 that uses an amorphous substrate. Therefore, by applying this embodiment, it is possible to increase the area of ​​the stacked structure 10, and it is possible to manufacture LEDs containing gallium nitride or backplanes on which transistors containing gallium nitride are formed with high productivity.

[0037] Third Embodiment FIG. 3 is a schematic diagram showing the configuration of a light emitting device 1000 using a stacked structure 10 according to one embodiment of the present invention.

[0038] 3, the light-emitting element 1000 includes a stacked structure 10, an n-type semiconductor layer 1040, a light-emitting layer 1050, a p-type semiconductor layer 1060, an n-type electrode 1070, and a p-type electrode 1080. The light-emitting element 1000 is a so-called LED (Light Emitting Diode), but is not limited to this.

[0039] The n-type semiconductor layer 1040 may be a silicon-doped gallium nitride film or the like. The light-emitting layer 1050 may be a stack of alternating indium gallium nitride films and gallium nitride films. The p-type semiconductor layer 1060 may be a magnesium-doped gallium nitride film or the like. The n-type electrode 1070 may be a metal such as indium. The p-type electrode 1080 may be a metal such as palladium or gold.

[0040] The light-emitting device 1000 is manufactured as follows. A silicon-doped gallium nitride film is formed on the stacked structure 10. Furthermore, indium gallium nitride films and gallium nitride films are alternately formed on the silicon-doped gallium nitride film to form a stacked body. Furthermore, a magnesium-doped gallium nitride film is formed on the stacked body. Next, the magnesium-doped gallium nitride film, the stacked body, and the silicon-doped gallium nitride film are etched using photolithography to form a p-type semiconductor layer 1060, a light-emitting layer 1050, and an n-type semiconductor layer 1040. At this time, etching is performed so as to expose a portion of the surface of the silicon-doped gallium nitride film. An n-type electrode 1070 and a p-type electrode 1080 are formed on the n-type semiconductor layer 1040 and the p-type semiconductor layer 1060, respectively.

[0041] Silicon-doped gallium nitride films, indium gallium nitride films, and magnesium-doped gallium nitride films can be deposited using a sputtering ring. Furthermore, silicon-doped gallium nitride films, indium gallium nitride films, and magnesium-doped gallium nitride films can be deposited continuously by connecting multiple vacuum chambers via a substrate transport unit without breaking the vacuum.

[0042] As described above in this embodiment, the light-emitting element 1000 can be fabricated using the stacked structure 10. The stacked structure 10 includes the substrate 100 that can be made large in area, and the light-emitting element 1000 is fabricated using a large-area substrate, so that the manufacturing cost of the light-emitting element 1000 can be reduced.

[0043] Fourth Embodiment FIG. 4 is a schematic diagram showing the configuration of a semiconductor device 2000 using the stacked structure 10 according to one embodiment of the present invention.

[0044] 4 , the semiconductor device 2000 includes a stacked structure 10, a first aluminum gallium nitride layer 2050, a second aluminum gallium nitride layer 2060, a third aluminum gallium nitride layer 2070, a source electrode 2080, a drain electrode 2090, a gate electrode 2100, a first insulating layer 2110, a second insulating layer 2120, and a shield electrode 2130. The semiconductor device 2000 is a so-called HEMT (High Electron Mobility Transistor), but is not limited to this.

[0045] The first aluminum gallium nitride layer 2050 may be an aluminum gallium nitride film. The second aluminum gallium nitride layer 2060 may be, for example, a silicon-doped aluminum gallium nitride film. The third aluminum gallium nitride layer 2070 may be an aluminum gallium nitride film. The source electrode 2080 and the drain electrode 2090 may be made of a metal such as titanium or aluminum. The gate electrode 2100 may be made of a metal such as nickel or gold. The first insulating layer 2110 may be made of, for example, a silicon nitride film. The second insulating layer 2120 may be made of, for example, a silicon oxide film. The shield electrode 2130 may be made of, for example, a laminated metal such as aluminum / titanium (Al / Ti).

[0046] The semiconductor device 2000 is manufactured as follows. A first aluminum gallium nitride layer 2050 is formed on the stacked structure 10. A silicon-doped aluminum gallium nitride film and an aluminum gallium nitride film are formed on the first aluminum gallium nitride layer 2050. Next, the aluminum gallium nitride film and the silicon-doped aluminum gallium nitride film are etched using photolithography to form a third aluminum gallium nitride layer 2070 and a second aluminum gallium nitride layer 2060. At this time, etching is performed so as to expose a portion of the surface of the silicon-doped aluminum gallium nitride film. A source electrode 2080 and a drain electrode 2090 are formed on the second aluminum gallium nitride layer 2060. A gate electrode 2100 is formed on the third aluminum gallium nitride layer 2070. A silicon nitride film and a silicon oxide film are deposited in this order to cover the source electrode 2080, the drain electrode 2090, and the gate electrode 2100, thereby forming a first insulating layer 2110 and a second insulating layer 2120. A shield electrode 2130 is formed on the second insulating layer 2120.

[0047] Aluminum gallium nitride films and silicon-doped aluminum gallium nitride films can be deposited using sputtering.

[0048] As described above in this embodiment, the semiconductor device 2000 can be fabricated using the stacked structure 10. The stacked structure 10 has the highly crystalline group III nitride layer 500 provided on the substrate 100, which can be made large in area, and therefore it is possible to fabricate a large-area backplane on which the semiconductor devices 2000 are integrated.

[0049] The above-described embodiments of the present invention may be combined as appropriate as long as they are not mutually inconsistent. Furthermore, even if a person skilled in the art appropriately adds or deletes components or modifies the design based on each embodiment, or adds or omits steps or modifies conditions, such combinations are included within the scope of the present invention as long as they include the gist of the present invention.

[0050] Even if there are other effects and advantages different from those brought about by the above-mentioned embodiments, if they are clear from the description in this specification or can be easily predicted by a person skilled in the art, they are naturally understood to be brought about by the present invention.

[0051] EXAMPLES The present invention will now be described in more detail with reference to the following examples. The following examples are provided to further illustrate the present invention in detail, but are not intended to limit the scope of the present invention.

[0052] Example 1 A method for manufacturing a stacked structure according to Example 1 will be described below. A silicon nitride film was formed on a glass substrate as a first underlayer using chemical vapor deposition (CVD) to a thickness of 100 nm. Furthermore, a silicon oxide film was formed on the first underlayer using CVD to a thickness of 148 nm as a second underlayer. Furthermore, a titanium film was formed on the second underlayer using sputtering to a thickness of 100 nm as a first alignment layer. Furthermore, an aluminum nitride film was formed on the first alignment layer using sputtering to a thickness of 100 nm as a second alignment layer. Finally, a gallium nitride layer was formed on the second alignment layer using sputtering to a thickness of 100 nm. Thus, the stacked structure according to Example 1 was constructed by laminating a glass substrate, silicon nitride (100 nm), silicon oxide (148 nm), titanium (100 nm), aluminum nitride (100 nm), and gallium nitride (100 nm) in this order.

[0053] Next, the configurations of the laminated structures of Comparative Examples 1 and 2 will be described.

[0054] [Comparative Example 1] The stacked structure shown in Comparative Example 1 differs from the stacked structure according to the present invention in that a second alignment layer is not formed. That is, the stacked structure shown in Comparative Example 1 is formed by stacking a glass substrate, a first undercoat film, a second undercoat film, a first alignment layer, and a gallium nitride layer in this order. The thickness of each layer is the same as that of the stacked structure according to the present invention. Therefore, the stacked structure of Comparative Example 1 is formed by stacking a glass substrate, silicon nitride (100 nm), silicon oxide (148 nm), titanium (100 nm), and gallium nitride (100 nm) in this order.

[0055] [Comparative Example 2] The stacked structure shown in Comparative Example 2 differs from the stacked structure according to the present invention in that the first alignment layer is not formed. That is, the stacked structure shown in Comparative Example 2 is stacked in the following order: glass substrate, first base film, second base film, second alignment layer, and gallium nitride layer. The thickness of each layer is the same as that of the stacked structure according to the present invention. Therefore, the stacked structure of Comparative Example 2 is composed of a glass substrate, silicon nitride (100 nm), silicon oxide (148 nm), aluminum nitride (100 nm), and gallium nitride (100 nm), in that order.

[0056] Next, evaluation of the crystallinity of the laminated structure will be described.

[0057] [Evaluation of Crystallinity] X-ray diffraction (XRD) measurement was performed using the laminate structure obtained in Example 1 and the laminate structure obtained in Comparative Example 1. The XRD measurement was performed using an X-ray diffraction measurement device (Smart Lab) manufactured by Rigaku Corporation. The measurement conditions were 2θχ0°, φ0°, tube voltage 45 kV, tube current 200 mA, rotating anode X-ray source Cu, detector scintillation counter, slit system light receiving slit 1 mm, and air atmosphere.

[0058] 5 shows an X-ray diffraction spectrum of the laminate structure according to the example, in which the vertical axis represents the diffracted X-ray intensity (relative XRD intensity) in arbitrary units (au) and the horizontal axis represents the incident angle ω (deg.).

[0059] 5 shows that in Example 1, Comparative Example 1, and Comparative Example 2, diffraction peaks appear at an angle of about 17 degrees, and the half-widths thereof become narrower in the order of Comparative Example 2, Comparative Example 1, and Example 1. Therefore, it can be seen that Example 1 has a higher c-axis orientation of the crystal than Comparative Examples 1 and 2. This high degree of orientation suggests that the gallium nitride of Example 1 has grown more epitaxially than the gallium nitride of Comparative Examples 1 and 2.

[0060] 10: laminated structure, 20: laminated structure, 100: substrate, 200: underlayer, 200-1: first underlayer, 200-2: second underlayer, 300: first alignment layer, 400: second alignment layer, 450: buffer layer, 500: group III nitride layer, 1000: light emitting element, 1040: n-type semiconductor layer, 1050: light emitting layer, 1060: p-type semiconductor layer, 1070: n-type electrode, 1080: p-type electrode, 2000: semiconductor device, 2050: first aluminum gallium nitride layer, 2060: second aluminum gallium nitride layer, 2070: third aluminum gallium nitride layer, 2080: source electrode, 2090: drain electrode, 2100: gate electrode, 2110: first insulating layer, 2120: second insulating layer, 2130: shield electrode

Claims

1. A stacked structure comprising: an amorphous substrate; a first alignment layer containing titanium on the amorphous substrate; a second alignment layer containing aluminum on the first alignment layer; and a nitride semiconductor layer on the second alignment layer.

2. The stacked structure according to claim 1, wherein the nitride semiconductor layer is a gallium nitride layer.

3. The stacked structure according to claim 2, wherein the gallium nitride layer further contains silicon.

4. The laminated structure according to claim 3, wherein the second alignment layer further comprises silicon.

5. The stacked structure according to claim 2, wherein the gallium nitride layer further contains magnesium.

6. The laminated structure according to claim 5, wherein the second alignment layer further contains magnesium.

7. The stacked structure according to claim 2, further comprising a buffer layer between the second alignment layer and the gallium nitride layer, the buffer layer comprising aluminum.

8. The stacked structure according to claim 7, wherein the buffer layer further contains gallium nitride.

9. The laminated structure according to claim 1, wherein the amorphous substrate is an amorphous glass substrate or a plastic substrate.

10. A semiconductor device comprising the laminated structure according to claim 1.

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