Electrostatic discharge protection structure and manufacturing method therefor, and semiconductor device and manufacturing method therefor

Abstract

The technical solution of the present invention provides an electrostatic discharge protection structure and a manufacturing method therefor, and a semiconductor device and a manufacturing method therefor. A first P-type doped region and a first N-type doped region arranged in sequence are provided in a first region, so as to form a diode; a second P-type doped region, a fourth N-type doped region, a second N-type doped region, a fifth N-type doped region, and a third P-type doped region arranged in sequence are provided in a second region, so as to form an SCR device; and a third N-type doped region and a fourth P-type doped region arranged in sequence are provided in a third region, so as to form a diode. On the basis of the above-mentioned technical means, the electrostatic discharge protection structure integrates the diodes and the SCR structure, thereby reducing the clamping voltage of the electrostatic discharge protection structure under high-current conditions. In addition, because the diodes and the SCR structure which are integrated form a symmetrical structure, the positive and negative connection of a first electrode and a second electrode can be ignored.

Description

An electrostatic discharge protection structure and its preparation method, and a semiconductor device and its preparation method. Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to an electrostatic protection structure and its preparation method, as well as a semiconductor device and its preparation method. Background Technology

[0002] With the advancement of semiconductor chip manufacturing processes, integrated circuit chips are trending towards miniaturization and narrower linewidths. Simultaneously, the pursuit of higher integration density, lower operating voltages, and faster signal transmission makes integrated circuit chips more sensitive and highly susceptible to damage from electrostatic discharge (ESD) and surges. Therefore, protective devices must meet characteristics such as low capacitance and low voltage to effectively protect integrated circuit chips from ESD and surge damage. This presents a significant challenge to the design of protective devices, especially when requirements include a voltage of 1V, capacitance within 0.2pF, and a relatively large IPP (Integrated Circuit Power) requirement, making implementation even more difficult.

[0003] However, existing electrostatic discharge protection structures often suffer from excessive clamping voltage of devices under high current conditions.

[0004] Therefore, providing an electrostatic discharge protection structure with low clamping voltage under high current conditions has become a technical problem that the industry urgently needs to solve.

[0005] Summary of the Invention

[0006] The technical problem solved by this invention is to provide an electrostatic protection structure and its preparation method, as well as a semiconductor device and its preparation method, which solves the problem of clamping voltage in the device structure under high current conditions.

[0007] To address the aforementioned technical problems, embodiments of the present invention provide an electrostatic protection structure, comprising:

[0008] Substrate;

[0009] An epitaxial layer is formed on the substrate, and the epitaxial layer is divided into a first region, a second region and a third region in sequence along a first direction, and a trench isolation structure is provided on both sides of each region;

[0010] A first P-type doped region and a first N-type doped region are formed in the first region and arranged along the first direction; a second P-type doped region, a first P-type well region, a second N-type doped region, a second P-type well region, and a third P-type doped region are formed in the second region and arranged along the first direction; wherein a fourth N-type doped region is formed in the first P-type well region and a fifth N-type doped region is formed in the second P-type well region; and a third N-type doped region and a fourth P-type doped region are formed in the third region and arranged along the first direction.

[0011] a first metal connecting structure, a second metal connecting structure and a third metal connecting structure; the first metal connecting structure is connected with the first P-type doped region, the second N-type doped region and the fourth P-type doped region respectively; the second metal connecting structure is connected with the first N-type doped region, the fourth N-type doped region and the third P-type doped region respectively; the third metal connecting structure is connected with the second P-type doped region, the fifth N-type doped region and the third N-type doped region respectively;

[0012] a first electrode and a second electrode, the first electrode is electrically connected with the first metal connecting structure, and the second electrode is electrically connected with the second metal connecting structure.

[0013] Optionally, each of the trench isolation structures penetrates the epitaxial layer and extends into the substrate.

[0014] Optionally, the electrostatic protection structure further comprises a first N-type well region and a second N-type well region; the second P-type doped region is arranged in the first N-type well region, and the third P-type doped region is arranged in the second N-type well region.

[0015] Optionally, the first metal connecting structure comprises a first contact hole and a first metal connecting line; the first contact hole is arranged on the surface of the first P-type doped region, the second N-type doped region and the fourth P-type doped region respectively; the first end of the first metal connecting line is electrically connected with the first contact hole.

[0016] the second metal connecting structure comprises a second contact hole and a second metal connecting line; the second contact hole is arranged on the surface of the first N-type doped region, the fourth N-type doped region and the third P-type doped region respectively; the first end of the second metal connecting line is electrically connected with the second contact hole; the second end of the second metal connecting line is electrically connected with the second electrode;

[0017] the third metal connecting structure comprises a third contact hole and a third metal connecting line; the third contact hole is arranged on the surface of the second P-type doped region, the fifth N-type doped region and the third N-type doped region respectively; the first end of the third metal connecting line is electrically connected with the third contact hole; the second end of the third metal connecting line is electrically connected with the first electrode.

[0018] Correspondingly, the technical scheme of the present application further provides a preparation method of the electrostatic protection structure, which is used for preparing the electrostatic protection structure provided by the technical scheme of the present application, and the method comprises the following steps:

[0019] providing a substrate;

[0020] forming an epitaxial layer on the surface of the substrate;

[0021] forming a first P-type well region and a second P-type well region on the epitaxial layer;

[0022] forming a first P-type doped region, a first N-type doped region, a second P-type doped region, a fourth N-type doped region, a second N-type doped region, a fifth N-type doped region, a third P-type doped region, a third N-type doped region and a fourth P-type doped region on the epitaxial layer in a first direction, the fourth N-type doped region is arranged in the first P-type well region, and the fifth N-type doped region is arranged in the second P-type well region;

[0023] forming a plurality of trench isolation structures on the epitaxial layer;

[0024] forming a first metal connection structure on the first P-type doped region, the second N-type doped region and the fourth P-type doped region, forming a second metal connection structure on the first N-type doped region, the fourth N-type doped region and the third P-type doped region, and forming a third metal connection structure on the second P-type doped region, the fifth N-type doped region and the third N-type doped region;

[0025] forming a first electrode on the third metal connection structure and forming a second electrode on the second metal connection structure.

[0026] Optionally, the first P-type well region and the second P-type well region are formed on the epitaxial layer, and specifically comprising:

[0027] forming a patterned photoresist layer on the surface of the epitaxial layer, the photoresist layer comprising a first window region, a second window region and a resistance region;

[0028] performing ion implantation with the photoresist layer as a mask, forming the first P-type well region in the first window region and forming the second P-type well region in the second window region;

[0029] removing the photoresist layer;

[0030] performing thermal annealing on the epitaxial layer.

[0031] Optionally, the first metal connection structure, the second metal connection structure and the third metal connection structure are formed, and specifically comprising:

[0032] forming a first contact hole on the surface of the first P-type doped region, the second N-type doped region and the fourth P-type doped region;

[0033] forming a second contact hole on the surface of the first N-type doped region, the fourth N-type doped region and the third P-type doped region;

[0034] forming a third contact hole on the surface of the second P-type doped region, the fifth N-type doped region and the third N-type doped region;

[0035] forming a first metal connection line on the first contact hole after forming the first contact hole;

[0036] forming a second metal connection line on the second contact hole after forming the second contact hole;

[0037] forming a third metal connection line on the third contact hole after forming the third contact hole.

[0038] Correspondingly, the technical scheme of the present application also provides a static protection circuit, comprising: a first silicon controlled rectifier unit, a second silicon controlled rectifier unit, a first diode unit and a second diode unit;

[0039] the first end of the first silicon controlled rectifier unit is used as the first electrode of the static protection circuit, the second end of the first silicon controlled rectifier unit is connected to the first end of the first diode unit, and the third end of the first silicon controlled rectifier unit is used as the second electrode of the static protection circuit; the second end of the first diode unit and the first end of the second silicon controlled rectifier unit are both connected to the third end of the first silicon controlled rectifier unit; the second end of the second silicon controlled rectifier unit is connected to the first end of the second diode unit, and the third end of the second silicon controlled rectifier unit is connected to the first end of the first silicon controlled rectifier unit.

[0040] Optionally, the first silicon controlled rectifier unit comprises a first triode and a second triode, the emitter of the first triode is used as the first end of the first silicon controlled rectifier unit, the base of the first triode is used as the second end of the first silicon controlled rectifier unit and is connected to the collector of the second triode, the collector of the first triode is connected to the base of the second triode, and the emitter of the second triode is used as the third end of the first silicon controlled rectifier unit;

[0041] the third end of the first silicon controlled rectifier unit; the second silicon controlled rectifier unit comprises a third triode and a fourth triode, the emitter of the third triode is used as the first end of the second silicon controlled rectifier unit, the base of the third triode is used as the second end of the second silicon controlled rectifier unit and is connected to the collector of the fourth triode, the collector of the third triode is connected to the base of the fourth triode, and the emitter of the fourth triode is used as the third end of the second silicon controlled rectifier unit.

[0042] Optionally, the first diode unit comprises a plurality of first diodes connected in series, the anode of the first first diode is used as the first end of the first diode unit, the cathode of each first diode is connected to the anode of the adjacent first diode, and the cathode of the last first diode is used as the second end of the first diode unit;

[0043] The second diode unit comprises a plurality of second diodes connected in series, a positive electrode of a first second diode being a first end of the second diode unit, a negative electrode of each second diode being connected to a positive electrode of an adjacent second diode, and a negative electrode of a last second diode being a second end of the second diode unit.

[0044] Correspondingly, the technical scheme of the present application also provides a semiconductor device comprising the electrostatic protection structure provided by the technical scheme of the present application.

[0045] Compared with the prior art, the technical scheme of the embodiment of the present application has the following beneficial effects:

[0046] In the electrostatic protection structure of the technical scheme of the present application, the first P-type doped region and the first N-type doped region are arranged in sequence in the first region to form a diode; the second P-type doped region, the fourth N-type doped region, the second N-type doped region, the fifth N-type doped region and the third P-type doped region are arranged in sequence in the second region to form an SCR (Silicon Controlled Rectifier) device; and the third N-type doped region and the fourth P-type doped region are arranged in sequence in the third region to form a diode. Based on the above technical means, the electrostatic protection structure integrates a diode and an SCR structure, thereby reducing the clamping voltage of the electrostatic protection structure under a large current. At the same time, because the integrated diode and SCR structure form a symmetrical structure, the positive and negative connections of the first electrode and the second electrode can be ignored.

[0047] Further, by arranging the first N-type well region and the second N-type well region, the resistivity of the current path is further reduced, thereby further reducing the clamping voltage of the electrostatic protection structure under a large current. BRIEF DESCRIPTION OF DRAWINGS

[0048] Fig. 1 is a schematic diagram of a cross-sectional structure of an embodiment of an electrostatic protection structure;

[0049] Fig. 2 is a TLP curve diagram of the electrostatic protection structure shown in Fig. 1;

[0050] Fig. 3 is a schematic diagram of a cross-sectional structure of an electrostatic protection structure provided by the technical scheme of the present application;

[0051] Fig. 4 is a TLP curve diagram of the electrostatic protection structure shown in Fig. 3;

[0052] Fig. 5 is a schematic diagram of a cross-sectional structure of an electrostatic protection structure provided by the technical scheme of the present application;

[0053] Fig. 6 is a module structure diagram of an electrostatic protection circuit provided by the technical scheme of the present application;

[0054] Fig. 7 is a circuit structure diagram of the electrostatic protection circuit according to the present application;

[0055] Fig. 8 is a flow chart I of the preparation method of the electrostatic protection structure according to the present application;

[0056] Fig. 9 is a flow chart II of the preparation method of the electrostatic protection structure according to the present application;

[0057] Fig. 10 is a flow chart III of the preparation method of the electrostatic protection structure according to the present application. DETAILED DESCRIPTION

[0058] As described in the background, the existing electrostatic protection structure has the problem of excessive clamping voltage under the condition of large current. The following will be described in detail in combination with the drawings.

[0059] Fig. 1 is a sectional structure diagram of an embodiment of the electrostatic protection structure. Fig. 2 is a TLP (Transmission Line Pulse) curve diagram of the electrostatic protection structure shown in Fig. 1.

[0060] Please refer to Fig. 1 and Fig. 2, the electrostatic protection structure in this embodiment is composed of two series-connected diodes. The voltage is reduced to 1V through the series-connected diodes. However, due to the large resistance of the series-connected diodes, the clamping voltage of the series-connected diodes will surge under the condition of large current.

[0061] In view of this, the present application provides a new electrostatic protection structure.

[0062] Fig. 3 is a sectional structure diagram I of the electrostatic protection structure according to the present application.

[0063] Please refer to Fig. 3, the electrostatic protection structure according to the present application comprises a substrate;

[0064] an epitaxial layer 101 formed on the substrate 100, the epitaxial layer 101 is divided into a first region a1, a second region a2 and a third region a3 along a first direction BB' in sequence, and a trench isolation structure 103 is arranged on both sides of each region;

[0065] The first P-type doped region 104 and the first N-type doped region 105 arranged along the first direction BB' in the first region a1, the second P-type doped region 106, the first P-type well region 107, the second N-type doped region 109, the second P-type well region 110 and the third P-type doped region 112 arranged along the first direction BB' in the second region a2, wherein the fourth N-type doped region 108 is formed in the first P-type well region 107, and the fifth N-type doped region 111 is formed in the second P-type well region 110; the third N-type doped region 113 and the fourth P-type doped region 114 arranged along the first direction BB' in the third region a3;

[0066] The first metal connection structure 115, the second metal connection structure 116 and the third metal connection structure 117; the first metal connection structure 115 is connected with the first P-type doped region 104, the second N-type doped region 109 and the fourth P-type doped region 114 respectively; the second metal connection structure 116 is connected with the first N-type doped region 105, the fourth N-type doped region 108 and the third P-type doped region 112 respectively; and the third metal connection structure 117 is connected with the second P-type doped region 106, the fifth N-type doped region 111 and the third N-type doped region 113 respectively;

[0067] The first electrode E1 and the second electrode E2; the first electrode E1 is electrically connected with the third metal connection structure 117, and the second electrode E2 is electrically connected with the second metal connection structure 116.

[0068] Through the above technical means, the technical scheme of the present application can reduce the clamping voltage of the electrostatic protection structure under the condition of large current, without considering the positive and negative connection of the first electrode E1 and the second electrode E2. The specific principle is as follows:

[0069] Referring to Fig. 3, the technical scheme of the present application comprises the following steps: arranging the first P-type doped region 104 and the first N-type doped region 105 in the first region a1 in sequence to form a diode; arranging the second P-type doped region 106, the fourth N-type doped region 108, the second N-type doped region 109, the fifth N-type doped region 111 and the third P-type doped region 112 in the second region a2 in sequence to form an SCR structure; and arranging the third N-type doped region 113 and the fourth P-type doped region 114 in the third region a3 in sequence to form a symmetrical diode. Therefore, the static protection structure provided by the technical scheme of the present application integrates the symmetrical diode and the SCR, and no matter whether the current is input from the first electrode E1 or the second electrode E2, the current can be output from the other electrode, i.e. the positive and negative electrodes of the first electrode E1 and the second electrode E2 do not need to be considered. Meanwhile, by using the negative impedance characteristic of the SCR, after the current input into the static protection structure triggers the SCR, the clamping voltage of the structure decreases with the increase of the current, thereby reducing the clamping voltage of the static protection structure under the condition of large current and improving the current-carrying capacity of the device structure. As shown in Fig. 4, when the input current increases from 0 to 6A, the clamping voltage of the static protection structure increases from 2V to 4V. However, when the input current is greater than 6A, the clamping voltage decreases from 4V and finally stabilizes at about 4V after the SCR is turned on. Fig. 4 is a TLP curve diagram of the static protection structure shown in Fig. 3. Of course, Fig. 4 is only the TLP curve diagram of the static protection structure of the present application under one specific embodiment, and the specific data in Fig. 4 can vary with the parameters of the integrated device and is not limited herein.

[0070] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application will be described in detail below with reference to the accompanying drawings.

[0071] Referring to Fig. 3, as one specific embodiment, each of the trench isolation structures 103 penetrates the epitaxial layer 101 and extends into the substrate 100.

[0072] Fig. 5 is a schematic diagram of the cross-sectional structure of the static protection structure provided by the technical scheme of the present application.

[0073] As a specific embodiment, the static electricity protection structure further comprises a first N-type well region 118 and a second N-type well region 119; the second P-type doped region 106 is arranged in the first N-type well region 118, and the third P-type doped region 112 is arranged in the second N-type well region 119. The first N-type well region 118 and the second N-type well region 119 have the beneficial effect of reducing the resistivity of the current path of the static electricity protection structure, thereby further reducing the clamping voltage of the static electricity protection structure under a large current.

[0074] As a specific embodiment, the first metal connection structure 115 comprises a first contact hole and a first metal connection line; the first contact hole is arranged on the surface of the first P-type doped region 104, the second N-type doped region 109 and the fourth P-type doped region 114 respectively; the first end of the first metal connection line is electrically connected with the first contact hole.

[0075] The second metal connection structure 116 comprises a second contact hole and a second metal connection line; the second contact hole is arranged on the surface of the first N-type doped region 105, the fourth N-type doped region 108 and the third P-type doped region 112 respectively; the first end of the second metal connection line is electrically connected with the second contact hole; and the second end of the second metal connection line is electrically connected with the second electrode E2.

[0076] The third metal connection structure 117 comprises a third contact hole and a third metal connection line; the third contact hole is arranged on the surface of the second P-type doped region 106, the fifth N-type doped region 111 and the third N-type doped region 113 respectively; the first end of the third metal connection line is electrically connected with the third contact hole; and the second end of the third metal connection line is electrically connected with the first electrode E1.

[0077] As a specific embodiment, the epitaxial layer 101 can further continue to divide a plurality of regions along the first direction BB' on the right side of the third region a3, each region is provided with a trench isolation structure 103 on both sides, and each trench isolation structure 103 is the same as the trench isolation structure 103 shown in FIG. 3 or FIG. 5. Each region is provided with N-type doped regions and P-type doped regions arranged along the first direction BB', and the P-type doped region of each region is electrically connected with the N-type doped region of the adjacent region to form a series connection of a plurality of diode structures.

[0078] The epitaxial layer 101 can also continue to divide several regions along the reverse direction of the first direction BB' on the left side of the first region a1, and each region is provided with a trench isolation structure 103 on both sides, and each trench isolation structure 103 is the same as the trench isolation structure 103 shown in FIG. 3 or FIG. 5. Each region is provided with a P-type doped region and an N-type doped region arranged along the first direction BB', and the P-type doped region of each region is electrically connected to the N-type doped region of the adjacent region to form a series connection of several diode structures.

[0079] The working process of the electrostatic protection structure provided by the embodiment of the present application is described below taking the electrostatic protection structure shown in FIG. 3 as an example.

[0080] The first stage: after the first electrode E1 is connected to the current, because the opening voltage of the diode is very low, the current will first flow through the diode structure on the left side of the second region a2 and flow out from the second electrode E2. The first path through which the current flows is specifically: the current flows into the second P-type doped region 106 from the first current, and flows into the second N-type doped region 109 through the epitaxial layer 101. After flowing into the second N-type doped region 109, the current flows into the first P-type doped region 104 through the first metal connection structure 115. After flowing into the first P-type doped region 104, the current flows into the first N-type doped region 105 through the epitaxial layer 101. After flowing into the first N-type doped region 105, the current flows out from the second electrode E2 through the second metal connection structure 116.

[0081] The second stage: after the current gradually increases to the opening of the integrated SCR structure in the electrostatic protection structure, because the SCR has a negative resistance characteristic, the voltage of the electrostatic protection structure will decrease with the increase of the current until the SCR is completely opened and saturated. In this stage, in addition to flowing through the first path, the current also flows through the integrated SCR structure in the second region a2 of the epitaxial layer 101. The second path through which the current flows is specifically: the current flows into the second P-type doped region 106 from the first current, and flows into the fourth N-type doped region 108 through the epitaxial layer 101. After flowing into the fourth N-type doped region 108, the current flows out from the second electrode E2 through the second metal connection structure 116.

[0082] The third stage: after the SCR is completely opened, most of the current will flow through the second path. At the same time, a small part of the current will also flow through the first path.

[0083] It should be noted that because the electrostatic protection structure provided by the embodiment of the present application has symmetry, the working process of the current flowing into the second electrode E2 and flowing out from the first electrode E1 is similar to the above working process, which is not described here.

[0084] In summary, the electrostatic protection structure provided by the embodiment of the application comprises the first P-type doped region and the first N-type doped region arranged in sequence in the first region to form a diode; the second P-type doped region, the fourth N-type doped region, the second N-type doped region, the fifth N-type doped region and the third P-type doped region arranged in sequence in the second region to form an SCR structure; and the third N-type doped region and the fourth P-type doped region arranged in sequence in the third region to form a diode. Based on the above technical means, the electrostatic protection structure integrates the diode and the SCR structure, thereby reducing the clamping voltage of the electrostatic protection structure under a large current. Meanwhile, because the integrated diode and SCR structure form a symmetrical structure, the positive and negative connections of the first electrode and the second electrode can be ignored.

[0085] Further, the first N-type well region and the second N-type well region are arranged to further reduce the resistivity of the current path, thereby further reducing the clamping voltage of the electrostatic protection structure under a large current.

[0086] The technical scheme of the application further provides a new electrostatic protection circuit.

[0087] In the technical scheme of the application, the electrostatic protection circuit comprises a first silicon controlled rectifier unit 10, a second silicon controlled rectifier unit 30, a first diode unit 20 and a second diode unit 40.

[0088] Please refer to FIG. 6. The electrostatic protection circuit provided by the technical scheme of the application comprises a first silicon controlled rectifier unit 10, a second silicon controlled rectifier unit 30, a first diode unit 20 and a second diode unit 40.

[0089] The first end of the first silicon controlled rectifier unit 10 serves as a first electrode E1 of the electrostatic protection circuit, the second end of the first silicon controlled rectifier unit 10 is connected to the first end of the first diode unit 20, and the third end of the first silicon controlled rectifier unit 10 serves as a second electrode E2 of the electrostatic protection circuit; the second end of the first diode unit 20 and the first end of the second silicon controlled rectifier unit 30 are both connected to the third end of the first silicon controlled rectifier unit 10; the second end of the second silicon controlled rectifier unit 30 is connected to the first end of the second diode unit 40, and the third end of the second silicon controlled rectifier unit 30 is connected to the first end of the first silicon controlled rectifier unit 10.

[0090] It should be noted that the first end of the first silicon controlled rectifier unit 10 corresponds to the second P-type doped region in the electrostatic protection structure. The third end of the first silicon controlled rectifier unit 10 corresponds to the fourth N-type doped region in the electrostatic protection structure. The second end of the first silicon controlled rectifier unit 10 corresponds to the second N-type doped region in the electrostatic protection structure. The first end of the first diode unit 20 corresponds to the first P-type doped region in the electrostatic protection structure, and the second end of the first diode unit 20 corresponds to the first N-type doped region in the electrostatic protection structure.

[0091] The first end of the second silicon controlled rectifier unit 30 corresponds to the third P-type doped region in the electrostatic protection structure. The third end of the second silicon controlled rectifier unit 30 corresponds to the fifth N-type doped region in the electrostatic protection structure. The second end of the second silicon controlled rectifier unit 30 also corresponds to the second N-type doped region in the electrostatic protection structure. The first end of the second diode unit 40 corresponds to the fourth P-type doped region in the electrostatic protection structure, and the second end of the second diode unit 40 corresponds to the third N-type doped region in the electrostatic protection structure.

[0092] FIG. 7 is a circuit structure diagram of the electrostatic protection circuit provided by the technical scheme of the present application.

[0093] Referring to FIG. 7, as a specific embodiment, the first silicon controlled rectifier unit 10 includes a first triode Q1 and a second triode Q2. The emitter of the first triode Q1 serves as the first end of the first silicon controlled rectifier unit 10. The base of the first triode Q1 serves as the second end of the first silicon controlled rectifier unit 10 and is connected to the collector of the second triode Q2. The collector of the first triode Q1 is connected to the base of the second triode Q2. The emitter of the second triode Q2 serves as the third end of the first silicon controlled rectifier unit 10.

[0094] The second silicon controlled rectifier unit 30 includes a third triode Q3 and a fourth triode Q4. The emitter of the third triode Q3 serves as the first end of the second silicon controlled rectifier unit 30. The base of the third triode Q3 serves as the second end of the second silicon controlled rectifier unit 30 and is connected to the collector of the fourth triode Q4. The collector of the third triode Q3 is connected to the base of the fourth triode Q4. The emitter of the fourth triode Q4 serves as the third end of the second silicon controlled rectifier unit.

[0095] As a specific embodiment, the first diode unit 20 includes a plurality of first diodes D1 connected in series, a positive electrode of a first first diode D1 as a first end of the first diode unit 20, a negative electrode of each first diode D1 connected to a positive electrode of an adjacent first diode D1, and a negative electrode of a last first diode D1 as a second end of the first diode unit 20.

[0096] The second diode unit 40 includes a plurality of second diodes D2 connected in series, a positive electrode of a first second diode D2 as a first end of the second diode unit 40, a negative electrode of each second diode D2 connected to a positive electrode of an adjacent second diode D2, and a negative electrode of a last second diode D2 as a second end of the second diode unit 40.

[0097] The number of the first diodes D1 connected in series in the first diode unit 20 and the number of the second diodes D2 connected in series in the second diode unit 40 can be set according to requirements, which are not limited herein.

[0098] The technical scheme of the application further provides a preparation method of the electrostatic protection structure.

[0099] FIG. 8 is a flowchart of the preparation method of the electrostatic protection structure according to the technical scheme of the application.

[0100] The preparation method of the electrostatic protection structure according to the technical scheme of the application includes the following specific steps, as shown in FIG. 8.

[0101] S1: providing a substrate.

[0102] S2: forming an epitaxial layer on a surface of the substrate.

[0103] S3: forming a first P-type well region and a second P-type well region on the epitaxial layer.

[0104] S4: sequentially forming a first P-type doped region, a first N-type doped region, a second P-type doped region, a fourth N-type doped region, a second N-type doped region, a fifth N-type doped region, a third P-type doped region, a third N-type doped region, and a fourth P-type doped region in a first direction on the epitaxial layer, the fourth N-type doped region being arranged in the first P-type well region, and the fifth N-type doped region being arranged in the second P-type well region.

[0105] S5: forming a plurality of trench isolation structures on the epitaxial layer.

[0106] S6: forming a first metal connection structure on the first P-type doped region, the second N-type doped region and the fourth P-type doped region, forming a second metal connection structure on the first N-type doped region, the fourth N-type doped region and the third P-type doped region, forming a third metal connection structure on the second P-type doped region, the fifth N-type doped region and the third N-type doped region.

[0107] S7: forming a first electrode on the third metal connection structure, forming a second electrode on the second metal connection structure.

[0108] Fig. 9 is a flow chart II of the preparation method of the electrostatic protection structure according to the present application.

[0109] As a specific embodiment, S3 of forming the first P-type well region and the second P-type well region on the epitaxial layer specifically includes:

[0110] S31: forming a patterned photoresist layer on the surface of the epitaxial layer, the photoresist layer including a first window region, a second window region and a resist region.

[0111] S32: using the photoresist layer as a mask, performing ion implantation to form the first P-type well region in the first window region and the second P-type well region in the second window region.

[0112] S33: removing the photoresist layer.

[0113] S34: performing thermal annealing on the epitaxial layer.

[0114] In S32, the dose of ion implantation ranges from 1e13cm-2to 1e15cm-2. In S34, the thermal annealing is performed on the epitaxial layer to push the first P-type well region and the second P-type well region to a desired depth, for example, 1um to 2um.

[0115] Fig. 10 is a flow chart III of the preparation method of the electrostatic protection structure according to the present application.

[0116] As a specific embodiment, S6 of forming the first metal connection structure, the second metal connection structure and the third metal connection structure specifically includes:

[0117] S61: forming a first contact hole on the surface of the first P-type doped region, the second N-type doped region and the fourth P-type doped region.

[0118] S62: forming a second contact hole on the surface of the first N-type doped region, the fourth N-type doped region and the third P-type doped region.

[0119] S63: Forming a third contact hole on the surface of the second P-type doped region, the fifth N-type doped region and the third N-type doped region.

[0120] S64: After forming the first contact hole, forming a first metal connecting line on the first contact hole.

[0121] S65: After forming the second contact hole, forming a second metal connecting line on the second contact hole.

[0122] S66: After forming the third contact hole, forming a third metal connecting line on the third contact hole.

[0123] As a specific embodiment, the depth of the trench isolation structure in S5 is in the range of 10um-25um.

[0124] As a specific embodiment, in S4, the dose of ion implantation in the process of forming each doped region is in the range of 5e15cm-2-1e16cm-2. After the ion implantation is completed, the impurities need to be activated by rapid annealing. The temperature and time of the rapid annealing are in the range of 1000℃-1030℃ and 10s-30s.

[0125] Although the present application has been disclosed with reference to the above embodiments, the present application is not limited to the above embodiments. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various modifications and changes, and the scope of protection of the present application should be limited by the scope defined in the claims.

Claims

1. An electrostatic discharge protection structure, characterized by, include: Substrate; An epitaxial layer is formed on the substrate, and the epitaxial layer is divided into a first region, a second region and a third region in sequence along a first direction, and a trench isolation structure is provided on both sides of each region; A first P-type doped region and a first N-type doped region are formed in the first region and arranged along the first direction; a second P-type doped region, a first P-type well region, a second N-type doped region, a second P-type well region, and a third P-type doped region are formed in the second region and arranged along the first direction; wherein a fourth N-type doped region is formed in the first P-type well region and a fifth N-type doped region is formed in the second P-type well region; and a third N-type doped region and a fourth P-type doped region are formed in the third region and arranged along the first direction. A first metal connection structure, a second metal connection structure, and a third metal connection structure; the first metal connection structure connects the first P-type doped region, the second N-type doped region, and the fourth P-type doped region, respectively; the second metal connection structure connects the first N-type doped region, the fourth N-type doped region, and the third P-type doped region, respectively; the third metal connection structure connects the second P-type doped region, the fifth N-type doped region, and the third N-type doped region, respectively. A first electrode and a second electrode, wherein the first electrode is electrically connected to the third metal connection structure, and the second electrode is electrically connected to the second metal connection structure.

2. The electrostatic discharge protection structure of claim 1, wherein Each of the trench isolation structures penetrates the epitaxial layer and extends into the substrate.

3. The electrostatic discharge protection structure of claim 1, wherein, It also includes a first N-type well region and a second N-type well region; the second P-type doped region is disposed within the first N-type well region, and the third P-type doped region is disposed within the second N-type well region.

4. The electrostatic discharge protection structure of claim 1, wherein The first metal connection structure includes a first contact hole and a first metal connection line. The first contact hole is respectively disposed on the surface of the first P-type doped region, the second N-type doped region and the fourth P-type doped region. The first end of the first metal connection line is electrically connected to the first contact hole. The second metal connection structure includes a second contact hole and a second metal connection line. The second contact hole is respectively disposed on the surface of the first N-type doped region, the fourth N-type doped region and the third P-type doped region. The first end of the second metal connection line is electrically connected to the second contact hole, and the second end of the second metal connection line is electrically connected to the second electrode. The third metal connection structure includes a third contact hole and a third metal connection line. The third contact hole is respectively disposed on the surface of the second P-type doped region, the fifth N-type doped region and the third N-type doped region. The first end of the third metal connection line is electrically connected to the third contact hole, and the second end of the third metal connection line is electrically connected to the first electrode.

5. A method for producing an electrostatic protection structure according to any one of claims 1 to 4, characterized by, The method includes: Provide a substrate; An epitaxial layer is formed on the surface of the substrate; A first P-type well region and a second P-type well region are formed on the epitaxial layer; forming a first P-type doped region, a first N-type doped region, a second P-type doped region, a fourth N-type doped region, a second N-type doped region, a fifth N-type doped region, a third P-type doped region, a third N-type doped region and a fourth P-type doped region on the epitaxial layer in a first direction, the fourth N-type doped region is arranged in the first P-type well region, and the fifth N-type doped region is arranged in the second P-type well region; forming a plurality of trench isolation structures on the epitaxial layer; forming a first metal connection structure on the first P-type doped region, the second N-type doped region and the fourth P-type doped region, forming a second metal connection structure on the first N-type doped region, the fourth N-type doped region and the third P-type doped region, and forming a third metal connection structure on the second P-type doped region, the fifth N-type doped region and the third N-type doped region; forming a first electrode on the third metal connection structure and forming a second electrode on the second metal connection structure.

6. The method of claim 5, wherein the method further comprises: forming a first P-type well region and a second P-type well region on the epitaxial layer, specifically comprising: forming a patterned photoresist layer on the surface of the epitaxial layer, the photoresist layer comprising a first window region, a second window region and a resistance region; performing ion implantation with the photoresist layer as a mask to form the first P-type well region in the first window region and the second P-type well region in the second window region; removing the photoresist layer; performing thermal annealing on the epitaxial layer.

7. The method of claim 6, wherein the method further comprises: forming the first metal connection structure, the second metal connection structure and the third metal connection structure, specifically comprising: forming a first contact hole on the surface of the first P-type doped region, the second N-type doped region and the fourth P-type doped region; forming a second contact hole on the surface of the first N-type doped region, the fourth N-type doped region and the third P-type doped region; forming a third contact hole on the surface of the second P-type doped region, the fifth N-type doped region and the third N-type doped region; forming a first metal connection line on the first contact hole after forming the first contact hole; forming a second metal connection line on the second contact hole after forming the second contact hole; forming a third metal connection line on the third contact hole after forming the third contact hole.

8. An electrostatic discharge protection circuit, characterized by, comprising: a first silicon controlled rectifier unit, a second silicon controlled rectifier unit, a first diode unit and a second diode unit; a first end of the first silicon controlled rectifier unit as a first electrode of the electrostatic protection circuit, a second end of the first silicon controlled rectifier unit connected to a first end of the first diode unit, and a third end of the first silicon controlled rectifier unit as a second electrode of the electrostatic protection circuit; a second end of the first diode unit and a first end of the second silicon controlled rectifier unit are both connected to the third end of the first silicon controlled rectifier unit, a second end of the second silicon controlled rectifier unit connected to a first end of the second diode unit, and a third end of the second silicon controlled rectifier unit connected to the first end of the first silicon controlled rectifier unit.

9. The electrostatic discharge protection circuit of claim 8, wherein, The first thyristor unit comprises a first triode and a second triode, an emitter of the first triode is a first end of the first thyristor unit, a base of the first triode is a second end of the first thyristor unit and is connected to a collector of the second triode, a collector of the first triode is connected to a base of the second triode, and an emitter of the second triode is a third end of the first thyristor unit; The second thyristor unit comprises a third triode and a fourth triode, an emitter of the third triode is a first end of the second thyristor unit, a base of the third triode is a second end of the second thyristor unit and is connected to a collector of the fourth triode, a collector of the third triode is connected to a base of the fourth triode, and an emitter of the fourth triode is a third end of the second thyristor unit.

10. The electrostatic discharge protection circuit of claim 9, wherein, The first diode unit comprises a plurality of first diodes connected in series, a positive pole of a first first diode is a first end of the first diode unit, a negative pole of each first diode is connected to a positive pole of an adjacent first diode, and a negative pole of a last first diode is a second end of the first diode unit; The second diode unit comprises a plurality of second diodes connected in series, a positive pole of a first second diode is a first end of the second diode unit, a negative pole of each second diode is connected to a positive pole of an adjacent second diode, and a negative pole of a last second diode is a second end of the second diode unit.

11. A semiconductor device, characterized by comprising: The electrostatic protection structure comprises the electrostatic protection structure according to any one of claims 1 to 4.

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