Display panel and display apparatus

Abstract

A display panel and a display apparatus. Data lines (1) are arranged in a display area and extend to a non-display area (NA); and a shielding electrode (4) is arranged in the display area and extends to the non-display area (NA). The display panel further comprises a spacer portion (21) provided in the non-display area (NA); in the non-display area (NA), the data lines (1) and the shielding electrode (4) partially overlap in the thickness direction of the display panel, and the spacer portion (21) is arranged between the overlapping data lines (1) and the shielding electrode (4).

Description

Display panel and display device TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] In a liquid crystal display panel, a data line may generate an electric field after loading a voltage, which may further cause the liquid crystal around the data line to deflect, resulting in a light leakage phenomenon, and the data line may also cause signal crosstalk to adjacent pixels.

[0003] At present, a transparent electrode is usually formed on the data line as a shielding electrode, and a common voltage signal is loaded on the shielding electrode to improve the light leakage and crosstalk phenomenon caused by the data line. However, since the static electricity accumulated in the process of the shielding electrode and the data line on the side of the display area is easy to break through the insulating layer between the shielding electrode and the data line, the shielding electrode and the data line are short-circuited, resulting in a dark line phenomenon of the display panel. SUMMARY

[0004] The embodiments of the present application provide a display panel and a display device, which can reduce the probability of short circuit of the shielding electrode and the data line and improve the display uniformity of the display panel.

[0005] The embodiments of the present application provide a display panel, which comprises a display area and a non-display area adjacent to the display area, and further comprises:

[0006] a substrate;

[0007] a first metal layer disposed on the substrate, the first metal layer comprising a plurality of data lines, the data lines being disposed in the display area and extending to the non-display area;

[0008] a first insulating layer disposed on a side of the first metal layer away from the substrate;

[0009] a second metal layer disposed on a side of the first insulating layer away from the first metal layer, the second metal layer comprising a shielding electrode, the shielding electrode being disposed in the display area and extending to the non-display area;

[0010] The display panel further comprises a spacer disposed in the non-display area, in the non-display area, the data lines and the shielding electrode partially overlap in the thickness direction of the display panel, and the spacer is disposed between the partially overlapping data lines and the shielding electrode.

[0011] According to the above purposes of the present application, the display device provided by the embodiments of the present application comprises a backlight module and a display panel, wherein the display panel is arranged on the light exit side of the backlight module.

[0012] The display panel comprises a display area and a non-display area adjacent to the display area, and further comprises:

[0013] a substrate;

[0014] a first metal layer arranged on the substrate, wherein the first metal layer comprises a plurality of data lines, and the data lines are arranged in the display area and extend to the non-display area;

[0015] a first insulating layer arranged on the side of the first metal layer away from the substrate;

[0016] a second metal layer arranged on the side of the first insulating layer away from the first metal layer, wherein the second metal layer comprises a shielding electrode, and the shielding electrode is arranged in the display area and extends to the non-display area;

[0017] In the non-display area, the data lines and the shielding electrode partially overlap in the thickness direction of the display panel, and the spacer is arranged between the overlapping data lines and shielding electrode. BRIEF DESCRIPTION OF DRAWINGS

[0018] The technical solutions and other beneficial effects of the present application will become apparent through the following detailed description of the specific embodiments of the present application in conjunction with the accompanying drawings.

[0019] FIG. 1 is a structural schematic diagram of a display panel in a display area according to an embodiment;

[0020] FIG. 2 is a planar distribution schematic diagram of a display panel according to an embodiment;

[0021] FIG. 3 is a structural schematic diagram of a display panel in a non-display area according to an embodiment;

[0022] FIG. 4 is a planar distribution schematic diagram of a display panel according to an embodiment;

[0023] FIG. 5 is a cross-sectional structural schematic diagram of the display panel along the AA line in FIG. 4 according to an embodiment;

[0024] FIG. 6 is another planar distribution schematic diagram of a display panel according to an embodiment;

[0025] FIG. 7 is a cross-sectional structural schematic diagram of the display panel along the BB line in FIG. 6 according to an embodiment;

[0026] FIG. 8 is a cross-sectional structure diagram of the display panel along the CC line in FIG. 4 according to an embodiment of the present application;

[0027] FIG. 9 is another cross-sectional structure diagram of the display panel along the CC line in FIG. 4 according to an embodiment of the present application;

[0028] FIG. 10 is a planar distribution diagram of the display panel in the display area according to an embodiment of the present application;

[0029] FIG. 11 is another planar distribution diagram of the display panel according to an embodiment of the present application;

[0030] FIG. 12 is another cross-sectional structure diagram of the display panel along the AA line in FIG. 4 according to an embodiment of the present application;

[0031] FIG. 13 is another cross-sectional structure diagram of the display panel along the AA line in FIG. 4 according to an embodiment of the present application. Embodiments of the present application

[0032] The technical solutions in the embodiments of the present application will be clearly and completely described with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person skilled in the art without creative work fall within the scope of protection of the present application.

[0033] The following disclosure provides many different embodiments, or examples, for implementing different structures of the present application. For the purpose of simplifying the present application, the components and settings of specific examples are described in the following. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeatedly refer to numbers and / or letters in different examples, and such repetition is for the purpose of simplification and clarity, which itself does not indicate the relationship between the various embodiments and / or settings discussed. In addition, the present application provides various specific examples of processes and materials, but a person skilled in the art can realize the application of other processes and / or the use of other materials.

[0034] Please refer to FIG. 1, FIG. 2 and FIG. 3, the liquid crystal display panel includes a data line 1, a pixel electrode 2 arranged above the data line 1, and a common electrode 3 arranged on the side of the pixel electrode 2 away from the data line 1. After the pixel electrode 2 and the common electrode 3 are powered on, an electric field can be formed to cause the liquid crystal between the pixel electrode 2 and the common electrode 3 to deflect. However, when the data line 1 is loaded with a voltage, an electric field can be formed between the data line 1 and the oppositely arranged common electrode 3, which in turn causes the liquid crystal around the data line 1 to deflect, resulting in a light leakage phenomenon, and the data line 1 also causes crosstalk to the signal on the adjacent pixel electrode 2. At present, a transparent electrode is usually formed as a shielding electrode 4 on the data line 1, and a common voltage signal is loaded on the shielding electrode 4 to improve the light leakage and crosstalk phenomena caused by the data line 1. However, since only an insulating layer 5 of a certain thickness is arranged between the shielding electrode 4 and the data line 1 in the non-display area NA on the side of the display area, the static electricity accumulated in the shielding electrode 4 and the data line 1 during the process is likely to break through the insulating layer 5 between the shielding electrode 4 and the data line 1, which in turn causes the shielding electrode 4 and the data line 1 to be short-circuited, resulting in a dark line phenomenon on the display panel.

[0035] Please refer to FIG. 4 and FIG. 5, the embodiment of the present application provides a display panel, which includes a display area 101 and a non-display area 102 adjacent to the display area 101, and further includes a substrate, a first metal layer 10, a first insulating layer 41 and a second metal layer 30.

[0036] The first metal layer 10 is arranged on the substrate, and includes a plurality of data lines 11. The data lines 11 are arranged in the display area 101 and extend to the non-display area 102. The first insulating layer 41 is arranged on the side of the first metal layer 10 away from the substrate. The second metal layer 30 is arranged on the side of the first insulating layer 41 away from the first metal layer 10, and includes a shielding electrode 31. The shielding electrode 31 is arranged in the display area 101 and extends to the non-display area 102.

[0037] Further, the display panel further includes a separation pad 21 arranged in the non-display area 102. In the non-display area 102, the data lines 11 and the shielding electrode 31 partially overlap in the thickness direction of the display panel, and the separation pad 21 is arranged between the overlapping data lines 11 and the shielding electrode 31.

[0038] In the application, the spacer 21 is added in the non-display area 102, and the spacer 21 is located between the overlapped data line 11 and the shielding electrode 31, so that the probability of electrostatic breakdown of the first insulating layer 41 between the data line 11 and the shielding electrode 31 is reduced, the probability of short circuit between the shielding electrode 31 and the data line 11 is reduced, and the display uniformity of the display panel is improved.

[0039] In an embodiment of the application, the display panel further comprises a color resist layer arranged between the first insulating layer and the second metal layer, and the color resist layer comprises display color resist arranged in the display area and the spacer arranged in the non-display area.

[0040] In an embodiment of the application, in the display area, the orthogonal projection of the data line on the substrate is located in the orthogonal projection of the shielding electrode on the substrate, and the display color resist is arranged between the data line and the shielding electrode in the display area.

[0041] The data line comprises a first line segment extending into the non-display area and overlapping with the shielding electrode, the orthogonal projection of the first line segment on the substrate is located in the orthogonal projection of the spacer on the substrate, and the orthogonal projection of the spacer on the substrate at least partially overlaps with the orthogonal projection of the shielding electrode on the substrate in the non-display area.

[0042] In an embodiment of the application, a plurality of data lines extend along a first direction and are arranged along a second direction, the first direction and the second direction intersect, and the spacer comprises a plurality of first color resist arranged along the second direction.

[0043] One of the first color resist is located between two adjacent first line segments and extends to the adjacent first line segment along the second direction, and two adjacent first color resist are connected to cover the first line segment between the two adjacent first color resist.

[0044] In an embodiment of the application, the orthogonal projections of two adjacent first color resist on the substrate are connected or partially overlap.

[0045] In an embodiment of the application, the display area comprises a plurality of pixel areas arranged along the first direction and the second direction, and the display color resist comprises a plurality of second color resist arranged along the second direction, and one of the second color resist covers a plurality of pixel areas arranged along the first direction.

[0046] One of the second color resist is connected with one of the first color resist along the first direction, and the color of the connected first color resist and second color resist is the same, and the color of the adjacent second color resist is different.

[0047] In an embodiment of the present application, the spacer part comprises one of a first color resist, a second color resist and a third color resist, and the colors of the first color resist, the second color resist and the third color resist are different from each other.

[0048] Alternatively, the spacer part comprises a stacked structure of at least two of the first color resist, the second color resist and the third color resist.

[0049] In an embodiment of the present application, the display area comprises a plurality of pixel areas arranged along a first direction and a second direction, and the first direction intersects the second direction.

[0050] The display color resist comprises a plurality of the first color resist, a plurality of the second color resist and a plurality of the third color resist arranged in the plurality of pixel areas, and one of the first color resist, the second color resist and the third color resist is arranged in one of the pixel areas.

[0051] In an embodiment of the present application, the display panel further comprises a third metal layer arranged between the substrate and the first metal layer, and the third metal layer comprises a signal line arranged in the non-display area, and in the non-display area, the shielding electrode is connected with the signal line through the color resist layer.

[0052] In an embodiment of the present application, the data line extends to the non-display area along the first direction, and the non-display area comprises a first sub-area and a second sub-area located on opposite sides of the display area along the first direction, and the spacer part is arranged in the first sub-area and / or the second sub-area.

[0053] Specifically, please continue to refer to FIG. 4 and FIG. 5, the display panel further comprises a color resist layer 20 arranged between the first insulating layer 41 and the second metal layer 30, and an interlayer dielectric layer 42 arranged on a side of the second metal layer 30 away from the color resist layer 20.

[0054] In some embodiments, the display panel further comprises an array substrate and an opposite substrate arranged oppositely, and a liquid crystal layer between the array substrate and the opposite substrate; the array substrate comprises the first metal layer 10, the color resist layer 20 and the second metal layer 30.

[0055] Further, the display area 101 includes a plurality of pixel areas 1011, and the array substrate includes a substrate, a thin film transistor layer disposed on the substrate, and a pixel electrode disposed in each of the pixel areas 1011, and the thin film transistor layer includes a plurality of thin film transistors; for example, the first metal layer 10 can further include a source and a drain of the thin film transistor, one of the source and the drain is connected to the data line 11, and the data line 11 is used to transmit a data signal to the source or the drain, and the other of the source and the drain is connected to the pixel electrode and transmits the data signal to the pixel electrode to control the deflection of liquid crystal molecules in the liquid crystal layer.

[0056] It should be noted that the electric field generated by the data line 11 is easy to cause the liquid crystal molecules in the liquid crystal layer to produce deflection other than the preset, resulting in light leakage phenomenon; in addition, the signal in the data line 11 is also easy to cause crosstalk to the signal in the pixel electrode, which will also affect the display effect of the display panel.

[0057] Therefore, the display panel provided by the embodiment of the present application further includes a second metal layer 30 located above the first metal layer 10, and the second metal layer 30 includes a shielding electrode 31, the shielding electrode 31 can cover the display area 101 and extend into the non-display area 102, and the shielding electrode 31 can be prepared by using a transparent conductive material, so as not to affect the light output of the display panel.

[0058] It can be understood that in the display area 101, the orthogonal projection of the data line 11 on the substrate is located in the orthogonal projection of the shielding electrode 31 on the substrate, and thus the shielding electrode 31 can shield the signal in the data line 11, which can avoid the electric field generated by the data line 11 and the electrode on the opposite substrate to affect the deflection of the liquid crystal molecules, and can also improve the crosstalk of the signal in the data line 11 to the signal in the pixel electrode.

[0059] In some embodiments, the material of the shielding electrode 31 can include ITO material, and the shielding electrode 31 can be loaded with a common voltage signal.

[0060] In some embodiments, the plurality of data lines 11 extend along a first direction M and are arranged along a second direction N, and the first direction M and the second direction N intersect; preferably, the first direction M and the second direction N overlap. It should be noted that the data line 11 is arranged in the display area 101 and extends along the first direction M into the non-display area 102; and the shielding electrode 31 also partially extends into the non-display area 102, so that in the non-display area 102, the data line 11 and the shielding electrode 31 partially overlap in the thickness direction of the display panel. Since the data line 11 and the shielding electrode 31 can both accumulate static electricity during the process of the display panel, the first insulating layer 41 in the data line 11 and the shielding electrode 31 is easily broken down by static electricity, resulting in short circuit between the data line 11 and the shielding electrode 31, and thus causing the display panel to have display unevenness such as dark lines.

[0061] In the embodiments of the present application, the spacer 21 is additionally arranged between the overlapping first metal layer 10 and the second metal layer 30, and the spacer 21 is located between the first insulating layer 41 and the second metal layer 30, i.e. the spacer 21 is also located between the data line 11 and the shielding electrode 31, and simultaneously located between the first insulating layer 41 and the shielding electrode 31, and located on the side of the first insulating layer 41 away from the data line 11. On the one hand, the distance between the data line 11 and the shielding electrode 31 can be increased, and on the other hand, the thickness of the film layer spacing between the data line 11 and the shielding electrode 31 can be increased, so that the probability of the film layer spacing between the data line 11 and the shielding electrode 31 being broken down by static electricity can be effectively reduced, the probability of short circuit between the data line 11 and the shielding electrode 31 can be reduced, and the display uniformity of the display panel can be improved.

[0062] In some embodiments, the color resistance layer 20 includes the spacer 21 arranged in the non-display area 101, and in the non-display area 102, the spacer 21 is arranged between the overlapping data line 11 and shielding electrode 31. In the embodiments of the present application, the color resistance layer 20 is used to prepare the spacer 21 in the non-display area 101, so that no additional film layer needs to be added, the process procedure can be saved, and the process cost can be reduced.

[0063] It should be noted that the display panel provided in the embodiments of the present application can be a COA type (Color Filter On Array) display panel, i.e. the color resistance layer 20 is arranged on the array substrate.

[0064] Further, the data line 11 includes a first line segment 111 extending into the non-display region 102 and overlapping with the shielding electrode 31, a projection of the first line segment 111 on the substrate is located within a projection of the spacer 21 on the substrate, and the projection of the spacer 21 on the substrate at least partially overlaps with a projection of the shielding electrode 31 on the substrate within the non-display region 102.

[0065] In some embodiments, the data line 11 extends in the first direction M by a distance greater than a distance by which the shielding electrode 31 extends in the first direction M within the non-display region 102, and therefore, the spacer 21 needs to extend in the first direction M by a distance greater than or equal to a distance by which the shielding electrode 31 extends in the first direction M within the non-display region 102, so that the spacer 21 is arranged between the data line 11 and the shielding electrode 31 overlapping with each other within the non-display region 102.

[0066] In some embodiments, within the non-display region 102, a projection of the shielding electrode 31 on the substrate overlaps with a projection of the spacer 21 on the substrate, or the projection of the shielding electrode 31 on the substrate is located within a coverage range of the projection of the spacer 21 on the substrate.

[0067] In some embodiments, the data line 11 extends in the first direction M to the non-display region 102, the non-display region 102 includes a first sub-region 1021 and a second sub-region 1022 located on opposite sides of the display region 101 in the first direction M, the spacer 21 is arranged in the first sub-region 1021 and / or the second sub-region 1022, and the embodiments provided in the drawings of the present application take the data line 11 extending in the first direction M to the first sub-region 1021 and the second sub-region 1022 and the data line 11 being located in the first sub-region 1021 and the second sub-region 1022 as examples for description.

[0068] In some embodiments, referring to FIG. 6 and FIG. 7, the display panel further comprises a substrate 43, a third metal layer 50 disposed between the substrate 43 and the first metal layer 10, and a second insulating layer 44 disposed between the first metal layer 10 and the third metal layer 50; the third metal layer 50 comprises a signal line 51 disposed in the non-display area 102, in the non-display area 102, the shielding electrode 31 is connected with the signal line 51 through the color resist layer 20; specifically, the shielding electrode 31 is connected with the signal line 51 through a via hole 310, the via hole 310 is connected with the signal line 51 through the separation pad 21, the first insulating layer 41 and the second insulating layer 44, and the signal line 51 is used for transmitting the common voltage signal.

[0069] In some embodiments, the third metal layer 50 can further comprise a scan line, a common voltage signal line and a gate of the thin film transistor.

[0070] In an embodiment of the present application, referring to FIG. 4, FIG. 5 and FIG. 6, the separation pad 21 comprises a plurality of first color resists 211 arranged along the second direction N, and the plurality of first color resists 211 are connected to cover the plurality of first line segments 111.

[0071] In some embodiments, one of the first color resists 211 is located between two adjacent first line segments 111 and extends to the adjacent first line segment 111 along the second direction N, and two adjacent first color resists 211 are connected to cover the first line segment 111 between the two adjacent first color resists 211, that is, there is a first line segment 111 between two adjacent first color resists 211, and the connection between the two adjacent first color resists 211 is located on the first line segment 111 to separate the first line segment 111 and the shielding electrode 31.

[0072] In some embodiments, the first line segment 111 between two adjacent first color resists 211 can also be covered by any one of the two adjacent first color resists 211.

[0073] In some embodiments, the orthographic projections of two adjacent first color resists 211 on the substrate 43 are connected, as shown in FIG. 8.

[0074] In some embodiments, the orthographic projections of two adjacent first color resists 211 on the substrate 43 overlap, as shown in FIG. 9.

[0075] In some embodiments, the first color resist 211 can be selected from at least one of a red color resist, a green color resist and a blue color resist.

[0076] Further, in some embodiments, please refer to FIG. 4, FIG. 5, FIG. 6, FIG. 10 and FIG. 11, the display area 101 comprises a plurality of pixel areas 1011 arranged along the first direction M and the second direction N, and the pixel area 1011 is provided with a thin film transistor and a pixel electrode, and a data signal can be transmitted to the thin film transistor and the pixel electrode through the data line 11.

[0077] The color resistance layer 20 comprises a display color resistance 22 arranged in the display area 101, and the display color resistance 22 is used to cover a plurality of pixel areas 1011, so that the light passing through each pixel area 1011 is colored light.

[0078] In addition, the display color resistance 22 is arranged between the data line 11 and the shielding electrode 31 in the display area 101.

[0079] In some embodiments, the display color resistance 22 comprises a plurality of second color resistances 221 arranged along the second direction N, and one second color resistance 221 covers a plurality of pixel areas 1011 arranged along the first direction M; wherein one second color resistance 221 is connected with one first color resistance 211 along the first direction M, and the connected first color resistance 211 and second color resistance 221 have the same color, and the colors of adjacent second color resistances 221 are different.

[0080] The second color resistance 221 can comprise a red color resistance, a green color resistance and a blue color resistance, and along the second direction N, a plurality of second color resistances 221 can be arranged in a cycle of red color resistance, green color resistance and blue color resistance in sequence, so as to realize the color display of a plurality of pixel areas 1011.

[0081] Correspondingly, since the colors of the connected first color resistance 211 and second color resistance 221 along the first direction M are the same, along the second direction N, the first color resistance 211 can also be arranged in a cycle of red color resistance, green color resistance and blue color resistance in sequence; it should be noted that the connected first color resistance 211 and second color resistance 221 along the first direction M can be integrally formed, that is, the preparation of the connected first color resistance 211 and second color resistance 221 is completed in the same process, thereby effectively reducing the process and reducing the process cost.

[0082] As described above, by adding the spacer 21 in the color resist layer 20 at the non-display area 102, and the spacer 21 is located between the overlapped data line 11 and the shielding electrode 31, the probability of electrostatic breakdown of the film layer between the data line 11 and the shielding electrode 31 is reduced, the probability of short circuit between the shielding electrode 31 and the data line 11 is reduced, and the display uniformity of the display panel is improved. In addition, the spacer 21 in the non-display area 102 and the display color resist 22 in the display area 101 can be prepared in the same process, thereby effectively reducing the process and reducing the process cost.

[0083] In another embodiment of the present application, please refer to FIG. 4, FIG. 12 and FIG. 13, the color resist layer 20 can include a first color color resist, a second color color resist and a third color color resist, and the colors of the first color color resist, the second color color resist and the third color color resist are different from each other. For example, the first color color resist can be a red color resist, the second color color resist can be a green color resist, and the third color color resist can be a blue color resist.

[0084] The display color resist 22 includes a plurality of first color color resists, a plurality of second color color resists and a plurality of third color color resists arranged in a plurality of pixel areas 1011, and one of the first color color resist, the second color color resist and the third color color resist is arranged in one pixel area 1011. Thus, the color display of the display panel can be realized.

[0085] In some embodiments, the spacer 21 includes one of a first color color resist, a second color color resist and a third color color resist. Similarly, the spacer 21 can be completed in the same process of the display color resist 22.

[0086] For example, when the spacer 21 is the first color color resist, the display panel can form the first color color resist in some pixel areas 1011 in the display area 101 and form the first color color resist in the non-display area 102 at the same time when the first color color resist is prepared. The first color color resist in the non-display area 101 can be used as the spacer 21. The second color color resist and the third color color resist can be prepared in other pixel areas 1011 in the display area 101 in another process.

[0087] Alternatively, when the spacer 21 is the second color color resist, the display panel can form the second color color resist in the partial pixel area 1011 in the display area 101 and the second color color resist in the non-display area 102 at the same time during the preparation of the second color color resist, and the second color color resist in the non-display area 101 can be used as the spacer 21; and the preparation of the first color color resist and the third color color resist in the other pixel areas 1011 in the display area 101 can be completed in another process.

[0088] Alternatively, when the spacer 21 is the third color color resist, the display panel can form the third color color resist in the partial pixel area 1011 in the display area 101 and the third color color resist in the non-display area 102 at the same time during the preparation of the third color color resist, and the third color color resist in the non-display area 101 can be used as the spacer 21; and the preparation of the first color color resist and the second color color resist in the other pixel areas 1011 in the display area 101 can be completed in another process.

[0089] In some embodiments, the spacer 21 includes a stacked structure of at least two of the first color color resist, the second color color resist, and the third color color resist.

[0090] For example, as shown in FIG. 12, when the spacer 21 is a stacked structure of the first color color resist and the second color color resist, the display panel can form the first color color resist in the partial pixel area 1011 in the display area 101 and the first color color resist in the non-display area 102 at the same time during the preparation of the first color color resist; the display panel can form the second color color resist in another partial pixel area 1011 in the display area 101 and the second color color resist on the first color color resist in the non-display area 102 at the same time during the preparation of the second color color resist; and the first color color resist and the second color color resist in the non-display area 101 and stacked can be used as the spacer 21; and the preparation of the third color color resist in the other pixel areas 1011 in the display area 101 can be completed in another process.

[0091] Or, when the spacer 21 is a stacked structure of the first color color resist and the third color color resist, the display panel, when preparing the first color color resist, can simultaneously form the first color color resist in some pixel areas 1011 in the display area 101 and the first color color resist in the non-display area 102; the display panel, when preparing the third color color resist, can simultaneously form the third color color resist in another some pixel areas 1011 in the display area 101 and the third color color resist on the first color color resist in the non-display area 102; and the first color color resist and the third color color resist in the non-display area 101 and stacked can be the spacer 21; and the preparation of the second color color resist in other pixel areas 1011 of the display area 101 is completed in another process.

[0092] Or, when the spacer 21 is a stacked structure of the second color color resist and the third color color resist, the display panel, when preparing the second color color resist, can simultaneously form the second color color resist in some pixel areas 1011 in the display area 101 and the second color color resist in the non-display area 102; the display panel, when preparing the third color color resist, can simultaneously form the third color color resist in another some pixel areas 1011 in the display area 101 and the third color color resist on the second color color resist in the non-display area 102; and the second color color resist and the third color color resist in the non-display area 101 and stacked can be the spacer 21; and the preparation of the first color color resist in other pixel areas 1011 of the display area 101 is completed in another process.

[0093] Or, as shown in FIG. 13, when the spacer 21 is a stacked structure of the first color color resist, the second color color resist and the third color color resist, the display panel can form the first color color resist in the partial pixel area 1011 in the display area 101 and the first color color resist in the non-display area 102 at the same time when preparing the first color color resist; the display panel can form the second color color resist in another partial pixel area 1011 in the display area 101 and the second color color resist on the first color color resist in the non-display area 102 at the same time when preparing the second color color resist; the display panel can form the third color color resist in the remaining pixel area 1011 in the display area 101 and the third color color resist on the second color color resist in the non-display area 102 at the same time when preparing the third color color resist; and the first color color resist, the second color color resist and the third color color resist in the non-display area 101 and stacked can be the spacer 21.

[0094] As described above, the present application adds the spacer 21 in the color resist layer 20 in the non-display area 102, and the spacer 21 is located between the overlapped data line 11 and the shielding electrode 31, thereby reducing the probability of electrostatic breakdown of the film layer between the data line 11 and the shielding electrode 31, reducing the probability of short circuit of the shielding electrode 31 and the data line 11, and improving the display uniformity of the display panel. In addition, the spacer 21 in the non-display area 102 and the display color resist 22 in the display area 101 can be prepared in the same process, thereby effectively reducing the process and reducing the process cost.

[0095] In addition, the present application also provides a display device, which comprises the display panel as described in the above embodiments.

[0096] In some embodiments, the display device is also a liquid crystal display device, and the display device further comprises a backlight module, and the display panel is arranged on the light emitting side of the backlight module.

[0097] It can be understood that, since the display device contains the same display panel as in the above embodiments, the display device has the same beneficial effects as the display panel described in the above embodiments, which will not be described here.

[0098] In the above embodiments, the description of each embodiment has its own focus, and the parts not described in detail in an embodiment can be referred to the related description of other embodiments.

[0099] The above has carried out the detailed introduction to the display panel and the display device provided by the embodiment of the application, the principle and the implementation mode of the application are described in the text by applying specific examples, the above embodiment is only used for helping understanding the technical scheme of the application and its core idea; the ordinary skilled in the art should understand that: it can still modify the technical scheme recorded by the foregoing each embodiment, or equivalent replacement is carried out to part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical scheme deviate from the scope of the technical scheme of the embodiments of the application.

Claims

1. A display panel, comprising a display area and a non-display area adjacent to the display area, the display panel further comprising: a substrate; a first metal layer disposed on the substrate, the first metal layer comprising a plurality of data lines, the data lines being disposed in the display area and extending to the non-display area; a first insulating layer disposed on a side of the first metal layer away from the substrate; a second metal layer disposed on a side of the first insulating layer away from the first metal layer, the second metal layer comprising a shielding electrode, the shielding electrode being disposed in the display area and extending to the non-display area; wherein the display panel further comprises a spacer disposed in the non-display area, in the non-display area, the data lines and the shielding electrode partially overlap in a thickness direction of the display panel, and the spacer is disposed between the overlapping data lines and the shielding electrode. The display panel further comprises a color resist layer disposed between the first insulating layer and the second metal layer, the color resist layer comprising display color resist disposed in the display area and the spacer disposed in the non-display area. In the display area, a projection of the data lines on the substrate is located within a projection of the shielding electrode on the substrate, and the display color resist is disposed between the data lines and the shielding electrode in the display area. The data lines comprise a first line segment extending into the non-display area and overlapping the shielding electrode, a projection of the first line segment on the substrate is located within a projection of the spacer on the substrate, and the projection of the spacer on the substrate at least partially overlaps a projection of the shielding electrode on the substrate in the non-display area. The plurality of data lines extend in a first direction and are arranged in a second direction, the first direction and the second direction intersect, and the spacer comprises a plurality of first color resist arranged in the second direction. One first color resist is located between two adjacent first line segments and extends to the adjacent first line segment in the second direction, and two adjacent first color resist are connected to cover the first line segment between them.

2. The display panel of claim 1, wherein, The projections of two adjacent first color resist on the substrate are connected or partially overlap.

3. The display panel of claim 2, wherein, The display area comprises a plurality of pixel areas arranged in the first direction and the second direction, and the display color resist comprises a plurality of second color resist arranged in the second direction, one second color resist covering a plurality of pixel areas arranged in the first direction. One second color resist is connected to one first color resist in the first direction, and the connected first color resist and second color resist have the same color, and adjacent second color resist have different colors.

4. The display panel of claim 3, wherein, The spacer comprises one of a first color color resist, a second color color resist, and a third color color resist, and the first color color resist, the second color color resist, and the third color color resist have different colors. ​ 5. The display panel of claim 4, wherein, ​ 6. The display panel of claim 4, wherein, ​ ​ 7. The display panel of claim 2, wherein, ​ Alternatively, the separation pad comprises a stacked structure of at least two of the first color color resist, the second color color resist and the third color color resist.

8. The display panel of claim 7, wherein, The display area comprises a plurality of pixel areas arranged along a first direction and a second direction, the first direction intersecting the second direction; The display color resist comprises a plurality of the first color color resist, a plurality of the second color color resist and a plurality of the third color color resist arranged in a plurality of the pixel areas, and one of the first color color resist, the second color color resist and the third color color resist is arranged in one of the pixel areas.

9. The display panel of claim 2, wherein, The display panel further comprises a third metal layer arranged between the substrate and the first metal layer, the third metal layer comprising a signal line arranged in the non-display area, in the non-display area, the shielding electrode is connected with the signal line through the color resist layer.

10. The display panel of claim 1, wherein, The data line extends to the non-display area along the first direction, the non-display area comprises a first sub-area and a second sub-area located on opposite sides of the display area along the first direction, and the separation pad is arranged in the first sub-area and / or the second sub-area.

11. A display device, comprising a backlight module and a display panel arranged on the light emitting side of the backlight module; The display panel comprises a display area and a non-display area adjacent to the display area, and further comprises: a substrate; a first metal layer arranged on the substrate, the first metal layer comprising a plurality of data lines arranged in the display area and extending to the non-display area; a first insulating layer arranged on a side of the first metal layer away from the substrate; a second metal layer arranged on a side of the first insulating layer away from the first metal layer, the second metal layer comprising a shielding electrode arranged in the display area and extending to the non-display area; The display panel further comprises a separation pad arranged in the non-display area, in the non-display area, the data line and the shielding electrode partially overlap in the thickness direction of the display panel, and the separation pad is arranged between the partially overlapping data line and shielding electrode.

12. The display device of claim 11, wherein, The display panel further comprises a color resist layer arranged between the first insulating layer and the second metal layer, the color resist layer comprising a display color resist arranged in the display area and the separation pad arranged in the non-display area.

13. The display device of claim 12, wherein, In the display area, the orthogonal projection of the data line on the substrate is located within the orthogonal projection of the shielding electrode on the substrate, and the display color resist is arranged between the data line and the shielding electrode located in the display area; The data line comprises a first line segment extending into the non-display area and overlapping with the shielding electrode, the orthogonal projection of the first line segment on the substrate is located within the orthogonal projection of the separation pad on the substrate, and the orthogonal projection of the separation pad on the substrate at least partially overlaps with the orthogonal projection of the shielding electrode on the substrate located in the non-display area.

14. The display device of claim 13, wherein, A plurality of the data lines extend along a first direction and are arranged along a second direction, the first direction and the second direction intersect, and the spacer portion includes a plurality of first color resists arranged along the second direction; One of the first color resists is located between two adjacent first line segments and extends along the second direction to the first line segment adjacent thereto, and two adjacent first color resists are connected to cover the first line segment between the two adjacent first color resists.

15. The display device of claim 14, wherein, The projections of two adjacent first color resists on the substrate are connected or partially overlap.

16. The display device of claim 14, wherein, The display area includes a plurality of pixel areas arranged along the first direction and the second direction, and the display color resist includes a plurality of second color resists arranged along the second direction, one of the second color resists covering a plurality of the pixel areas arranged along the first direction; One of the second color resists is connected to one of the first color resists along the first direction, and the connected first color resist and second color resist are of the same color, and adjacent second color resists are of different colors.

17. The display device of claim 12, wherein, The spacer portion includes one of a first color resist, a second color resist, and a third color resist, and the first color resist, the second color resist, and the third color resist are of different colors; Alternatively, the spacer portion includes a stacked structure of at least two of the first color resist, the second color resist, and the third color resist.

18. The display device of claim 17, wherein, The display area includes a plurality of pixel areas arranged along a first direction and a second direction, the first direction intersecting the second direction; The display color resist includes a plurality of the first color resists, a plurality of the second color resists, and a plurality of the third color resists disposed in a plurality of the pixel areas, and one of the pixel areas is provided with one of the first color resist, the second color resist, and the third color resist.

19. The display device of claim 12, wherein, The display panel further includes a third metal layer disposed between the substrate and the first metal layer, the third metal layer including a signal line disposed in the non-display area, in the non-display area, the shielding electrode is connected to the signal line through the color resist layer.

20. The display device of claim 11, wherein, The data line extends along a first direction to the non-display area, the non-display area includes a first sub-area and a second sub-area located on opposite sides of the display area along the first direction, and the spacer portion is disposed in the first sub-area and / or the second sub-area.

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