Analog-digital hybrid computer

Abstract

An analog-digital hybrid computer including an analog part and a digital part that are connected to each other and are capable of mutually exchanging signals, the hybrid computer comprises at least one component for analog calculations, and analog-to-digital (AD) and / or digital-to-analog (DA) converters. The hybrid computer further comprises at least one analog circuit for signal processing as a smart AD interface within the analog part of the hybrid computer, which is used for tasks other than analog calculation of the hybrid computer. The smart AD interface is configured for performing analyzing the signals and / or extracting information from the signals, filtering signals and reducing the amount of data before AD conversion, measuring and digitizing characteristic data of at least one of frequency, periodicity and duration of a process, extracting one or more spectral components from a signal by frequency response filtering or demodulation, processing the signals for enabling use of sub-Nyquist rate AD converter, and digitizing the obtained information and transmitting the digitized information to the digital computer.

Description

[0001] Applicant: ANABRID GMBH TBK ref. : WO 110781

[0002] Analog-digital hybrid computer

[0003] Field

[0004] The present disclosure relates to hybrid computers with mixed analog and digital computing modules. More specifically, the present disclosure relates to a Hybrid- Computer comprising a smart AD-interface.

[0005] Background

[0006] Hybrid computers were introduced already the 1950s, wherein a famous hybrid computer in the late era of analog computers was the 'Simstar' from EAI. The aim was not only to program the patch panel, which had previously been configured by hand, electronically and automatically, but also to control the analog computing processes automatically and to use new mixed analog and digital computing methods. For example, document EP 0 102 152 A2 discloses a hybrid computer having both digital and analog signal circuitry, wherein different interface modules can be inserted without rewiring. Furthermore, US 5 140 538 A refers to a hybrid digital-analog computer for processing multiple digital inputs.

[0007] Today, analog computers offer the potential for energy savings, as shown in Fig. 1. With calculation accuracies of up to around 60 dB, i.e. around 10 bits or 0.1 %, analog computation can in principle be more energy-efficient. However, as the analogue computer is initialized and controlled by the digital computer and the analogue calculation results are further processed in the digital system, AD (analog-to-digital) and DA (digital-to-analog) converters are required at the analogue-digital interface. These AD and DA converters also require energy and have a correspondingly negative effect on the overall energy footprint of the hybrid computing system. Pure scaling does not fundamentally change the situation, because scaling reduces the energy consumption for a digital operation to the same extent as in analog. Although analog circuits do not scale like digital circuits, improved matching, lower noise, digital calibration (digitally assisted analog) and improved signal processing methods also reduce energy consumption.

[0008] As regards the state of the art in mixed analog and digital systems, if hybrid computers are integrated on a chip, this is called mixed-signal system-on-chip integration (SoC). Fig. 2 shows a general mixed-signal system consisting of an analog and a digital part. Both the analog and the digital part have interfaces to the external environment, for example sensor interfaces in the analog part and bus or interface components in the digital part. There are mainly unidirectional signals between the analog and digital parts, but bidirectional signals are also possible. These signals are digital because the analog part is responsible for the analog-to-digital or digital-to-analog conversion. Signals that go from the digital part to the analog part can be quite simple static signals that configure the analog part for an operating mode, or dynamic signals, such as audio or video information. Signals that go from the analog section to the digital section can be AD-converted analog signals, such as audio signals or sensor signals, or simple outputs from comparators that compare analog signals to certain threshold values.

[0009] Similar to a mixed-signal IC, a hybrid computer can be divided into an analog and a digital part, as shown in Fig. 3. The processing components of the analog computer are preferably grouped into so-called macrocells, with each macrocell containing, for example, 16 or 25 processing elements and 4 or 5 integrators. Between the macrocells there are analog routing channels with switches at the intersection points.

[0010] In the hybrid computer, in addition to the macrocells with the analog computing functions, there are also analog-to-digital (ADC) and digital-to-analog (DAC) converters. These AD and DA converters are used to: i) set the integrators of the analog computer to the desired initial values before the calculation cycle, ii) read out the values of the integrators at the end of the calculation cycle and make them available in digital form, iii) digitize an input variable during a calculation cycle, convert it to an output variable in the digital section or in a look-up table and then convert this output variable to an analogue variable in order to feed it into the current calculation cycle in the analogue section; this corresponds to the implementation of a function y=f(x), which is in principle independent of the time axis, iv) convert complex signal curves of the analog computing cycle to a continuous analog-digital one in order to extract further information from the signal curves in the digital part of the hybrid computer, v) calibrate the analog calculation circuit before the actual calculation.

[0011] For the above tasks i) and ii), i.e. initializing the integrators and reading out the final values of the analogue calculation cycle, relatively little energy is required, as only one AD or DA conversion is required for each analogue value and therefore the ADC or DAC does not require high conversion rates.

[0012] For task iii), representation of a function y=f(x) independent of time, in addition to a hybrid solution, there are also purely analog solutions that simulate the function to be represented as piecewise linear functions or generated with an auxiliary differential equation. In principle, solutions with diodes and resistor networks can also be transferred to low supply voltages if comparators and switches are used instead of diodes.

[0013] The most difficult task is the analysis of complex signal curves of the analog computing cycle. In the simplest case, the task is to digitize the signal curve with a sufficiently high sampling rate and then process it in the digital part of the hybrid computer. This approach has two disadvantages:

[0014] The AD converter requires a high sampling rate that is two times higher than the highest expected spectral frequency components of the calculation result (Nyquist-Shannon theorem). During the sampling and AD conversion of the analog signal, large amounts of data are generated, the processing of that data in the digital section requires significant resources and energy.

[0015] Summary

[0016] Various embodiments of the present disclosure aim at addressing at least part of the above issues. In particular, it is an objection of the invention to overcome the drawbacks of the prior art and to provide an analog-digital hybrid computer with improved energy consumption.

[0017] In order to make optimum use of the advantage of analog calculation in the hybrid computer, it is advantageous to prepare and process the sequence and the result of the analog calculation cycle in the analog part in a suitable manner to avoid the energy-intensive AD conversion of the entire sequence of the calculation cycle and to keep the amount of data that has to be processed in the digital part to a minimum.

[0018] Various aspects of embodiments of the present disclosure are set out in the appended claims.

[0019] According to an exemplary aspect of the present disclosure, there is provided an analog-digital hybrid computer including an analog computer and a digital computer that are connected to each other and are capable of mutually exchanging signals, the hybrid computer comprising at least one component for analog calculations, and analog-to-digital (AD) and / or digital-to-analog (DA) converters. The hybrid computer further comprises at least one analog circuit for signal processing, which is used for tasks other than analog calculation of the hybrid computer, wherein said at least one analog circuit for signal processing is configured for performing analyzing the signals and / or extracting information from the signals, filtering signals and reducing the amount of data before AD conversion, measuring and digitizing characteristic data of at least one of frequency, periodicity and duration of a process, extracting one or more spectral components from a signal by frequency response filtering or demodulation, processing the signals for enabling use of sub-Nyquist rate AD converter, and digitizing the obtained information and transmitting the digitized information to the digital computer.

[0020] The at least one analog circuit for signal processing may comprise at least one of analog functions realized by a peak value detector for maximum and / or minimum values, with fixed or adjustable rise and fall times, a voltage divider and / or programmable amplifier for signals and reference voltages, a frequency response filter for smoothing signal peaks, and / or a bandpass filter for extracting characteristic signal components, and / or a high-pass filter for extracting and / or emphasizing signal edges, a demodulator for extracting spectral components of the signal, a bandpass filter with subsequent amplitude demodulation for spectral analysis, and programmable switches in conjunction with resistive or capacitive voltage dividers or programmable amplifiers for setting reference voltages.

[0021] Furthermore, the at least one analog circuit for signal processing may comprise at least one of mixed-signal functions realized by at least one of a comparator, a window comparator, an AD converter, and a voltage-to-frequency converter.

[0022] Still further, the at least one analog circuit for signal processing comprises digital functions realized by at least one of a counter, with or without enable or reset function, a register, latch or flip-flop, with or without clock control or enable function, a configurable and / or preset logic function, and a digital automatic function consisting of logic and clocked registers.

[0023] The at least one analog circuit for signal processing may be configurable via programmable switches and analog and digital buses. Also, the at least one analog circuit for signal processing may be arranged at the transition between the analog and digital computer section of the hybrid computer, or may be arranged as at least one sub-unit together with analog macrocells (macro blocks) in a hierarchically structured analog computer part of the hybrid computer.

[0024] Moreover, the at least one analog circuit for signal processing may be arranged as at least one special macrocell among other macrocells in a hierarchically structured analog computer part of the hybrid computer. In this regard the at least one circuit for signal processing in said at least one special macrocell may be configured to perform signal processing comprising at least one of the features detection of signal levels and peak values, analysis of signals in the time domain, analysis of signals in the frequency domain, and signal filtering for subNyquist rate ADCs. Thereby, different types of macrocells with different focuses in signal processing may be implemented in the same hybrid computer.

[0025] Further developments and / or modifications of the aforementioned exemplary aspects of the present disclosure are set out in the following.

[0026] Brief description of the drawings

[0027] In the following, the present disclosure will be described in greater detail by way of non-limiting examples with reference to the accompanying drawings, in which

[0028] Fig. 1 shows a comparison of power consumption of analog and digital computing,

[0029] Fig. 2 schematically shows an example of a mixed signal SoC according to the prior art,

[0030] Fig. 3 shows schematically shows another example of a mixed signal SoC according to the prior art, Fig. 4 is an illustrative diagram showing signals of a Hindmarsh-Rose neuron and signal processing,

[0031] Fig. 5 shows a 'Simulink'-model of a Hindmarsh-Rose neuron with peak detectors and comparators,

[0032] Fig. 6 schematically shows an analog-digital hybrid computer according to an embodiment of the invention,

[0033] Fig. 7 schematically shows the smart AD-interface according to embodiments of the invention,

[0034] Fig. 8 illustrates an analog-digital hybrid computer with smart AD-Interface at each analog macrocell (dashed frame at bottom of macrocells) according to embodiments on the invention,

[0035] Fig. 9 shows an analog-digital hybrid computer with smart AD-interface in separate macrocells comprising a signal conditioning and an AD converter (ADC) according to embodiments of the invention, and

[0036] Fig. 10 illustrates components of the smart AD-interface according to embodiments of the invention.

[0037] Detailed description

[0038] The present disclosure is described herein with reference to particular nonlimiting examples and to what are presently considered to be conceivable (examples of) embodiments. A person skilled in the art will appreciate that the present disclosure is by no means limited to these examples and embodiments, and may be more broadly applied.

[0039] It is to be noted that the following description mainly refers to specifications being used as non-limiting examples and embodiments for certain exemplifying circuit structures, implementations and technologies. Such description is only used in the context of the presented non-limiting examples and embodiments, and does not limit the present disclosure in any way. Rather, any other circuit structures, implementations and technologies may equally be utilized as long as complying with what is described herein and / or embodiments described herein are applicable thereto.

[0040] Hereinafter, various examples and embodiments of the present disclosure and its aspects are described using several variants and / or alternatives. It is generally to be noted that, according to certain needs and constraints, all of the described variants and / or alternatives may be provided alone or in any conceivable combination (also including combinations of individual features of the various variants and / or alternatives). In this description, the words "comprising" and "including" should be understood as not limiting the described examples and embodiments to consist of only those features that have been mentioned, and such examples and embodiments may also contain structures, units, modules, networks, etc. that have not been specifically mentioned.

[0041] In the drawings, it is to be noted that lines / arrows interconnecting individual blocks or entities are generally meant to illustrate an operational coupling therebetween, which may be a physical and / or logical coupling, which on the one hand is implementation-independent and on the other hand may also comprise an arbitrary number of intermediary functional blocks or entities not shown.

[0042] Herein, an analog circuit may refer to an analog or hybrid computer, an analog or hybrid arithmetic circuit, an analog or hybrid filter, an analog or hybrid signal conditioning system, or the like. More specifically, an analog circuit according to the present disclosure may be or be comprised in or be dedicated for an analog computer, an analog arithmetic circuit, an analog filter, an analog signal conditioning system, or the like. Alternatively, an analog circuit according to the present disclosure may be or be comprised in or be dedicated for a hybrid computer, a hybrid arithmetic circuit, a hybrid filter, a hybrid signal conditioning system, or the like (wherein the term "hybrid" shall refer a combination / mixture of analog and digital implementation or technology). Hence, the present disclosure encompasses an analog or hybrid computer, an analog or hybrid arithmetic circuit, an analog or hybrid filter, an analog or hybrid signal conditioning system, or the like, in or by which an analog circuit, as is disclosed herein, is included.

[0043] Also, an analog circuit according to the present disclosure may be implemented in any way, e.g. as an integrated circuit, such as a system-on-chip integration, a microchip or a microprocessor, or a discrete circuit. Hence, the present disclosure encompasses an integrated circuit, a system-on-chip integration, a microchip, a microprocessor, a discrete circuit, or the like, in or by which an analog circuit, as is disclosed herein, is implemented.

[0044] Further, in the present specification, a bus shall refer to any medium capable of transmitting / transferring any kind of signal. More specifically, a bus may refer to a shared transmission medium which enables signal transmission / transfer between different components, depending on the configuration, operation or control.

[0045] According to embodiments of the present disclosure, in general terms, there is provided an analog-digital hybrid computer including an analog computer and a digital computer that are connected to each other and are capable of mutually exchanging signals.

[0046] Hybrid computers with mixed analog and digital computing modules require digital-analog and analog-digital interfaces. The analog computing units are used to save energy compared to digital computing. This requires the interfaces between the analog and digital computing modules to be energy-efficient. That can be achieved by eliminating normal AD converters, which sample the analog signals accordingly fast: For this purpose, suitable analog pre-processing and signal extraction are carried out in the distributed analog computing units. The pre-processing and signal extraction is based on dynamic signal filtering, simple AD conversion with comparators, minimal local digital processing (e.g. based on counters) and, if necessary, local feedback for analog signal extraction. This means that energy-intensive AD conversion can be avoided and the energy efficiency of the analog computing circuit can be fully exploited. An analog-digital hybrid computer according to an embodiment consists of an analog computer and a digital computer that are connected to each other and mutually exchange signals. According to the invention, in addition to the components for the analog calculations and the optional analog-to-digital and digital-to-analog converters, the hybrid computer contains analog circuits for signal processing, which are not used for the analog calculation of the hybrid computer, but perform at least one of the tasks such as analyzing the signals and / or extracting information from the signals, filtering signals and reduce the amount of data before AD conversion, measuring and digitizing characteristic data such as frequency, periodicity and duration of a process, extracting one or more spectral components from the signal by frequency response filtering or demodulation, processing the signals in such a way that sub-Nyquist rate AD converters can be used, and / or digitizing the information obtained and pass it on to the digital computer. That is, said at least one of analog circuits for signal processing represents a smart AD-interface.

[0047] According to an embodiment of the invention, the circuit for analog signal processing can be configured via programmable switches and analog and digital buses, and may contain at least one of analog functions, which may comprise peak value detectors for maximum and / or minimum values, with fixed or adjustable rise and fall times, voltage dividers and / or programmable amplifiers for signals and reference voltages, frequency response filters for smoothing signal peaks, and / or bandpass filters for extracting characteristic signal components, and / or high-pass filters for extracting / emphasizing signal edges, demodulators for extracting spectral components of the signal, one or more bandpass filters with subsequent amplitude demodulation for spectral analysis, programmable switches in conjunction with resistive or capacitive voltage dividers or programmable amplifiers for setting reference voltages, and at least one of the mixed-signal functions such as comparators, window comparators, AD converters, VCOs (voltage-to-frequency converters), and optionally digital functions such as counters, with or without enable or reset function, registers, latches or flip-flops, with or without clock control or enable function, logic functions, also configurable, and digital automatic functions consisting of logic and clocked registers.

[0048] According to an embodiment of the invention, the analog circuit for signal processing in the hybrid computer can be structured and arranged in different ways depending on the structure and hierarchical design of the analog part of the hybrid computer, e.g. at the transition between the analog and digital computer section of the hybrid computer, as a special macrocell like the other macrocells in the hierarchically structured analog computer part of a hybrid computer, and / or as sub-units together with analog macrocells.

[0049] According to an embodiment of the invention, the circuits for signal processing in the special macrocells or in conjunction with other macro-cells can be designed in different ways, whereby signal processing can have special features such as detection of signal levels and peak values, analysis of signals in the time domain, analysis of signals in the frequency domain, signal filtering for sub-Nyquist rate ADCs, and different types of macrocells with different focuses in signal processing are implemented in the same hybrid computer.

[0050] As already indicated above, Fig. 1 shows a diagram indicating power consumption of digital scaling technology versus analog feature selection over the resolution thereof. With calculation accuracies of up to around 60 dB, i.e. around 10 bits or 0.1 %, analog computation can in principle be more energyefficient.

[0051] Fig. 2 shows a general mixed-signal system (e.g. a system-on-a-chip (SoC)) according to the prior art, consisting of an analog part 2 and a digital part 3. Both the analog part 2 and the digital part 3 have interfaces to the external environment, for example sensor interfaces 4 in the analog part 2 and bus or interface components 5 in the digital part 3. There are mainly unidirectional signals between the analog part 2 and digital part 3, but bidirectional signals are also possible. As referred to above, Fig. 3 shows an analog-digital hybrid computer according to the prior art, which is divided into an analog part 2 and a digital part 3 (similar as in Fig. 2). The processing components of the analog computer are grouped into so-called macrocells 6a-6d, with each macrocell 6 containing, in the example of Fig. 3, sixteen processing elements and four integrators. Between the macrocells 6 there are analog routing channels with switches at the intersection points.

[0052] Analog computers are well suited for calculating systems of differential equations, such as the 'Hindmarsh and Rose neuron model' (cf. J.L. Hindmarsh and R. M. Rose, "A model of neuronal bursting using three coupled first order differential equations," Proceedings of the Royal Society of London. Series B, Biological sciences, vol. 221, no. 1222, pp. 87-102, 1984, doi: 10.1098 / rspb.1984.0024). If the effect of the parameters is to be studied, many simulations must be carried out. The pulse bursts are then examined in the results, whereby the number of pulses per burst, the frequency of the pulses in the burst, the frequency of the bursts and the quiescent potential are evaluated.

[0053] Fig. 4a shows the basic signal curve of a neuron pulse train, as presented therein, although the amplitudes and the time axis are optimized for simulation in the analogue computer. In addition to the signal curve of the neuron, Fig. 4a also shows the signals "Peak Detector High" and "Peak Detector Low" with dotted lines. Two peak detectors are used to record the maximum and minimum values of the pulse series. The levels of the peak detectors are used as reference levels for the comparators, which detect the actual pulses. Fig. 4a also shows a dashed "Peak Detector Low & Slow" signal curve. This is also the signal of a minimum level detector, but the decay time constant is considerably lower than for the "Peak Detector Low".

[0054] The time constant of the peak detectors is adapted to the frequency or period of the peaks in the signal curve. In the case of the neuron, two peak detectors record the maximum and minimum values of the burst. A third peak detector records the minimum level with a decay time constant that is greater than the time interval between the bursts. This records the quiescent potential as a reference level.

[0055] The 30% and 70% thresholds for comparators used to count the pulses within the burst are derived from the levels of the peak detectors for the burst, see dotted lines in Fig. 4b. A 40% threshold above the quiescent potential is derived from the slow peak detector, which allows a comparator to recognize the start and end of a burst.

[0056] Fig. 5 shows the Simulink- (TMby The MathWorks inc.) model of a pulse counter for a Hindmarsh-Rose neuron. The neuron itself is implemented in a sub-block. The Max_Detector, Min_Detector and Min_Detector_Slow are arranged on the left. The difference between the max and min detectors is multiplied by 0.7 and 0.3 and then added to the value of the min detector. These values are then the thresholds for the comparators marked with dotted lines, which control the FF_Clock flip-flop for generating the counting clock.

[0057] The reference level for resetting the counter is obtained with the Min_Detector_Slow, to which the difference between the maximum and minimum values multiplied by 0.4 is added. To prevent low spikes from triggering a false reset, the spikes are filtered with a low-pass filter l / (0.01s+l).

[0058] The counter is realized in the Simulink model with a clock-edge-controlled submodel that implements the memory function. The reset is performed by opening the feedback loop and feeding the value 0 into the memory element.

[0059] Fig. 4c shows an exemplary evaluation result of the Hindmarsh-Rose neuron simulation. Here, the number of pulses in a burst is counted. The counter is reset at the beginning of each burst.

[0060] In the following, the concept of a smart AD interface will be explained.

[0061] The task of an analog-digital interface in an analog-digital hybrid computer is to extract the desired information from the analog signal characteristics. For this purpose, simple circuit concepts with low power consumption and low chip area consumption are to be used, which do not require fast and simultaneously high-precision AD converters, reduce the amount of data that needs to be AD-converted through signal conditioning, extract relevant information through simple comparators and time measurement reduce the cost of digital signal processing, reduce overall energy consumption by reducing the amount of data to be processed as early as possible in the entire signal processing chain from the analog computing units to digital processing.

[0062] These goals are achieved by placing a smart AD interface within the analog part of the hybrid computer. As is shown in Fig. 6, an analog-digital hybrid computer 1 includes an analog part 2 and a digital part 3 that are connected to each other and are capable of mutually exchanging signals. An analog-to-digital (AD) converter 7 and / or a digital-to-analog (DA) converter 8 is provided in the hybrid computer 1. At least one component for analog calculations 2a is provided in the analog part 2. Also, at least one analog circuit for signal processing 9 forming a smart AD-interface is arranged within the analog part 2 of the hybrid computer 1, which is used for tasks other than analog calculation of the hybrid computer 1.

[0063] Fig. 7 schematically shows an analog circuit for signal processing 9 according to an embodiment of the invention. The analog circuit for signal processing 9 may comprise one or plural components for realizing analog functions, such as a peak value detector 10 for maximum and / or minimum values, with fixed or adjustable rise and fall times, a voltage divider 11a and / or programmable amplifier lib for signals and reference voltages, a frequency response filter 12a for smoothing signal peaks, a bandpass filter 12b for extracting characteristic signal components, a high-pass filter 12c for extracting and / or emphasizing signal edges, a demodulator 13 for extracting spectral components of the signal, a bandpass filter 14 with subsequent amplitude demodulation for spectral analysis, and programmable switches 15 in conjunction with resistive or capacitive voltage dividers 15a or programmable amplifiers 15b for setting reference voltages. Furthermore, the analog circuit for signal processing 9 may comprise one or plural components for realizing mixed-signal functions, such as a comparator 16, a window comparator 17, an AD converter 18, and a voltage-to-frequency converter 19.

[0064] Moreover, the analog circuit for signal processing 9 may comprise one or plural components for realizing digital functions, such as a counter 20, with or without enable or reset function, a register 21a, latch 21b or flip-flop 21c, with or without clock control or enable function, a configurable and / or preset logic function 22, and a digital automatic function 23 consisting of logic and clocked registers 23a.

[0065] Using the above-described components, the at least one analog circuit for signal processing 9 is configured for performing tasks including at least one of analyzing the signals and / or extracting information from the signals, filtering signals and reducing the amount of data before AD conversion, measuring and digitizing characteristic data of at least one of frequency, periodicity and duration of a process, extracting one or more spectral components from a signal by frequency response filtering or demodulation, processing the signals for enabling use of sub-Nyquist rate AD converter (wherein the Nyquist rate is a value equal to twice the highest frequency (bandwidth) of a given function or signal), and digitizing the obtained information and transmitting the digitized information to the digital computer.

[0066] Fig. 8 shows an embodiment of the invention, wherein the smart AD interface (the at least one analog circuit for signal processing 9) is arranged below each analog macrocell (as shown in Fig. 3 according to the prior art), which consists of a group of analog functions.

[0067] The smart AD interface can be arranged on each analog macrocell or as a separate cell together with other analog macrocells in the array of cells of the analog computer. Fig. 9 shows an array with analog macrocells of the analog computer and, as an example, two cells of the smart AD interface, which is partitioned into the so-called signal conditioning and an AD converter with low hardware complexity and low energy consumption. In the simplest case, the AD converter is a 1-bit comparator.

[0068] The signal conditioning in the smart AD interface and the AD conversion is shown schematically in more detail in Fig. 10. The following components are preferably used for smart AD conversion:

[0069] Peak detectors with adjustable rise and fall times for maximum and minimum values of time-varying signals; peak detectors measure dynamic range and enable scaling, i.e. optimum utilization of the dynamic range; low-pass filters, band-pass filters or high-pass filters to smooth signal peaks or extract edges, fixed or adjustable bandpass filters or filters that allow coarse spectral analysis with AM demodulation, synchronous demodulators that allow frequency-selective extraction of signal components, adjustable voltage dividers, adders and subtractors to set references or signal levels, adjustable amplifiers for signals and references, comparators, window comparators or comparators with several thresholds that work as AD converters with a few bits, timing devices consisting of clocked counters and comparators, pulse counters that can be reset and controlled, e.g. with a clock enable, simple digital-to-analog converters that provide references for comparators, for example, analog and digital bus systems with programmable switches that connect the analog and digital components of the smart AD interface with each other a programmable logic array with a clocked register that can be used to implement a Mealy or Moore machine so that the smart AD interface can independently monitor signal curves in the analogue computer without the need for an external microcontroller and continuous communication between the microcontroller and the smart AD interface This reduces energy consumption of the IO of the microcontroller.

[0070] Depending on the function of the analog computing units in the hybrid computer, the smart AD interface 9 must perform completely different signal conditioning. For this reason, the analog and digital circuit components are arranged in an array with analog and digital routing channels, as is known from analog functions, circuits and macrocells on analog computer.

[0071] In the following, the arrangement of the smart AD interface in the analog array of the hybrid computer will be explained.

[0072] The smart AD interface 9 can be arranged in various ways in the analog or analog-digital hybrid computer. On the one hand the smart AD interface 9 may be arranged as a block at the edge of the analog computing units, so to speak as an interface between analog signals and digital signals: The smart AD interface is positioned where the AD converters are located in a typical mixed-signal system, as shown in Fig. 2. On the other hand, the smart AD interface 9 can be arranged like other analog blocks or macrocells 6 in the analog part 2 of the hybrid computer 1 in the same way as a regular macrocell 6. This is shown in Fig. 9 with the "Signal Conditioning" and "ADC" blocks. The configurable smart AD interface 9 can be configured in the same way as a regular macrocell 6 of the analog part 2. Still further, the smart AD interface 9 can form a unit with the regular analog macrocells.

[0073] The programmable routing channels of the macrocell 6 can be connected to the analog components of the smart AD interface 9. This is illustrated in Fig. 8.

[0074] In the second case shown in Fig. 9, the smart AD interface 9 is arranged like a general analog macrocell. The crucial difference between a general analog macrocell and the smart AD interface is that the smart AD interface contains special components such as peak detectors, low-pass filters, comparators and counters, which enable relevant information to be extracted from analog signals. The components of the smart AD interface are not intended to calculate analog signals. The smart AD interface may perform feature enhanced filtering. This feature enhanced filtering then allows, for example, the use of a sub-Nyquist ADC or, in the simplest case, a 1-bit AD converter, i.e. a comparator for digitization.

[0075] In the foregoing, various examples and embodiments for realizing a hybrid computer which provides efficient energy consumption. The thus disclosed examples and embodiments are for illustrative purposes, without limiting the present disclosure.

[0076] Particularly, according to a first aspect, there is provided an analog-digital hybrid computer including an analog part and a digital part that are connected to each other and are capable of mutually exchanging signals, the hybrid computer comprising: at least one component for analog calculations; and analog-to-digital (AD) and / or digital-to-analog (DA) converters. The hybrid computer further comprises at least one analog circuit for signal processing within the analog part of the hybrid computer, which is used for tasks other than analog calculation of the hybrid computer, wherein said at least one analog circuit for signal processing is configured for performing: analyzing the signals and / or extracting information from the signals, filtering signals and reducing the amount of data before AD conversion, measuring and digitizing characteristic data of at least one of frequency, periodicity and duration of a process, extracting one or more spectral components from a signal by frequency response filtering or demodulation, processing the signals for enabling use of sub-Nyquist rate AD converter, and digitizing the obtained information and transmitting the digitized information to the digital computer.

[0077] According to a second aspect, in the analog-digital hybrid computer according to the first aspect, said at least one analog circuit for signal processing comprises at least one of analog functions realized by a peak value detector for maximum and / or minimum values, with fixed or adjustable rise and fall times; a voltage divider and / or programmable amplifier for signals and reference voltages; a frequency response filter for smoothing signal peaks, and / or a bandpass filter for extracting characteristic signal components, and / or a high-pass filter for extracting and / or emphasizing signal edges; a demodulator for extracting spectral components of the signal; a bandpass filter with subsequent amplitude demodulation for spectral analysis; and programmable switches in conjunction with resistive or capacitive voltage dividers or programmable amplifiers for setting reference voltages.

[0078] According to a third aspect, in the analog-digital hybrid computer according to the first or the second aspect, said at least one analog circuit for signal processing comprises at least one of mixed-signal functions realized by at least one of a comparator, a window comparator, an AD converter, and a voltage-to- frequency converter.

[0079] According to fourth aspect, in the analog-digital hybrid computer according to any of the first to third aspect, said at least one analog circuit for signal processing comprises digital functions realized by at least one of a counter, with or without enable or reset function, a register, latch or flip-flop, with or without clock control or enable function, a configurable and / or preset logic function, and a digital automatic function consisting of logic and clocked registers.

[0080] According to a fifth aspect, in the analog-digital hybrid computer according to any of the first to fourth aspect, said at least one analog circuit for signal processing is configurable via programmable switches and analog and digital buses.

[0081] According to a sixth aspect, in the analog-digital hybrid computer according to any of the first to fifth aspect, said at least one analog circuit for signal processing is arranged at the transition between the analog and digital computer section of the hybrid computer.

[0082] According to a seventh aspect, in the analog-digital hybrid computer according to any of the first to sixth aspect, said at least one analog circuit for signal processing is arranged as at least one sub-unit together with analog macrocells in a hierarchically structured analog computer part of the hybrid computer.

[0083] According to an eighth aspect, the analog-digital hybrid computer according to any of the first to seventh aspect, said at least one analog circuit for signal processing is arranged as at least one special macrocell among other macrocells in a hierarchically structured analog computer part of the hybrid computer.

[0084] According to a ninth aspect, in the analog-digital hybrid computer according to the eighth aspect, the at least one circuit for signal processing in said at least one special macrocell is configured to perform signal processing comprising at least one of the features detection of signal levels and peak values, analysis of signals in the time domain, analysis of signals in the frequency domain, and signal filtering for sub-Nyquist rate ADCs.

[0085] According to a tenth aspect, in the analog-digital hybrid computer according to the eighth or ninth aspect, different types of macrocells with different focuses in signal processing are implemented in the same hybrid computer.

[0086] The present disclosure also covers any conceivable combination of structural or functional elements described above, as long as the above-described concepts of methodology and structural arrangement are applicable.

[0087] Also, an analog circuit according to the present disclosure may be implemented in any way, e.g. as an integrated circuit, such as a system-on-chip integration, a microchip or a microprocessor, or a discrete circuit. Hence, the present disclosure encompasses an integrated circuit, a system-on-chip integration, a microchip, a microprocessor, a discrete circuit, or the like, in or by which an analog circuit, as is disclosed herein, is implemented. Further, in the present specification, a bus shall refer to any medium capable of transmitting / transferring any kind of signal. More specifically, a bus may refer to a shared transmission medium which enables signal transmission / transfer between different components, depending on the configuration, operation or control. Even though the present disclosure is described above with reference to the examples according to the accompanying drawings, it is to be understood that the present disclosure is not restricted thereto. Rather, it is apparent to those skilled in the art that the present disclosure can be modified in many ways without departing from the scope of the inventive idea as disclosed herein.

Claims

Applicant: ANABRID GMBH TBK ref. : WO 110781CLAIMS1. Analog-digital hybrid computer including an analog part and a digital part that are connected to each other and are capable of mutually exchanging signals, the hybrid computer comprising: at least one component for analog calculations; and analog-to-digital (AD) and / or digital-to-analog (DA) converters, characterized in that the hybrid computer further comprises at least one analog circuit for signal processing within the analog part of the hybrid computer, which is used for tasks other than analog calculation of the hybrid computer, wherein said at least one analog circuit for signal processing is configured for performing: analyzing the signals and / or extracting information from the signals, filtering signals and reducing the amount of data before AD conversion, measuring and digitizing characteristic data of at least one of frequency, periodicity and duration of a process, extracting one or more spectral components from a signal by frequency response filtering or demodulation, processing the signals for enabling use of sub-Nyquist rate AD converter, and digitizing the obtained information and transmitting the digitized information to the digital computer.

2. The analog-digital hybrid computer according to claim 1, wherein said at least one analog circuit for signal processing comprises at least one of analog functions realized by a peak value detector for maximum and / or minimum values, with fixed or adjustable rise and fall times; a voltage divider and / or programmable amplifier for signals and reference voltages;a frequency response filter for smoothing signal peaks, and / or a bandpass filter for extracting characteristic signal components, and / or a high-pass filter for extracting and / or emphasizing signal edges; a demodulator for extracting spectral components of the signal, a bandpass filter with subsequent amplitude demodulation for spectral analysis; and programmable switches in conjunction with resistive or capacitive voltage dividers or programmable amplifiers for setting reference voltages.

3. The analog-digital hybrid computer according to claim 1 or 2, wherein said at least one analog circuit for signal processing comprises at least one of mixed- signal functions realized by at least one of a comparator, a window comparator, an AD converter, and a voltage-to-frequency converter.

4. The analog-digital hybrid computer according to any of claims 1 to 3, wherein said at least one analog circuit for signal processing comprises digital functions realized by at least one of a counter, with or without enable or reset function, a register, latch or flip-flop, with or without clock control or enable function, a configurable and / or preset logic function, and a digital automatic function consisting of logic and clocked registers.

5. The analog-digital hybrid computer according to any of claims 1 to 4, wherein the said at least one analog circuit for signal processing is configurable via programmable switches and analog and digital buses.

6. The analog-digital hybrid computer according to any of claims 1 to 5, wherein said at least one analog circuit for signal processing is arranged at the transition between the analog and digital computer section of the hybrid computer.

7. The analog-digital hybrid computer according to any of claims 1 to 6, wherein said at least one analog circuit for signal processing is arranged as atleast one sub-unit together with analog macrocells in a hierarchically structured analog computer part of the hybrid computer.

8. The analog-digital hybrid computer according to any of claims 1 to 7, wherein said at least one analog circuit for signal processing is arranged as at least one special macrocell among other macrocells in a hierarchically structured analog computer part of the hybrid computer.

9. The analog-digital hybrid computer according to claim 8, wherein the at least one circuit for signal processing in said at least one special macrocell is configured to perform signal processing comprising at least one of the features detection of signal levels and peak values, analysis of signals in the time domain, analysis of signals in the frequency domain, and signal filtering for sub-Nyquist rate ADCs.

10. The analog-digital hybrid computer according to claim 8 or 9, wherein different types of macrocells with different focuses in signal processing are implemented in the same hybrid computer.

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