Packaged device, electronic device, and vehicle

Abstract

A packaged device, comprising a circuit board (1), a chip assembly (2) and a support member (3), wherein the circuit board (1) is used for being fixedly mounted on a vehicle; the chip assembly (2) comprises at least one chip, and the chip assembly (2) is electrically connected to the circuit board (1); and the support member (3) does not have an electrical function, and the support member (3) is arranged between the circuit board (1) and the chip assembly (2). By means of providing a support member that does not have electrical performance, a packaged device can prevent an external environmental stress from acting on a chip in a chip assembly, thereby ensuring the performance of the chip, reducing preparation costs, and improving preparation efficiency. Further provided are an electronic device and a vehicle.

Description

Packaging device, electronic equipment and vehicle

[0001] The present application claims priority to the Chinese patent application No. 202411132837.1, filed on August 16, 2024, and entitled "Packaging device, electronic equipment and vehicle", the whole content of which is incorporated herein by reference. TECHNICAL FIELD

[0002] The present application relates to the chip technical field, in particular to a packaging device, an electronic equipment and a vehicle. BACKGROUND

[0003] The MEMS inertial device is a key chip used in the fields of vehicle intelligent driving, inertial navigation, chassis control, collision detection, etc. The chip in the MEMS inertial device is used to realize the detection of external motion information, wherein the chip has very high sensitivity and precision and is very sensitive to environmental stress. Therefore, when the chip is subjected to unexpected dimensional change due to external stress, the performance of the chip will be greatly reduced.

[0004] CONTENT

[0005] Therefore, the present application provides a packaging device, an electronic equipment and a vehicle to improve the stress resistance of the chip in the packaging device.

[0006] The first aspect of the present application provides a packaging device, comprising a circuit board, a chip assembly and a support, the circuit board is used to be fixedly installed in a vehicle, the chip assembly comprises at least one chip, the chip assembly is electrically connected with the circuit board, the support does not have an electrical function, and the support is arranged between the circuit board and the chip assembly.

[0007] In the present application, the support has high strength, and the support arranged between the chip assembly and the circuit board can provide good support for the chip assembly. When the packaging device is subjected to external environmental stress, the support is not easy to deform, so as to avoid the external environmental stress acting on the chip in the chip assembly, improve the stress resistance of the chip assembly, avoid the chip from being deformed due to external stress, and ensure the performance of the chip. The support does not have an electrical function, has a simple structure and low cost, can reduce the preparation cost of the packaging device, and will not affect the functions of the circuit board and the chip assembly in the packaging device during cutting, thereby improving the preparation efficiency of the packaging device.

[0008] In a possible design, the chip assembly includes two or more chips, the two or more chips include a first chip and a second chip, and the support member is arranged between the first chip and the circuit board and / or arranged between the second chip and the circuit board.

[0009] In this scheme, the positions of the support members can be set according to the stress resistance of each chip in the chip assembly, so that the stress resistance of each chip in the chip assembly can be ensured, and the miniaturization and lightweight design requirements of the packaging device can be met, the preparation cost of the packaging device is saved, and the design freedom of the packaging device is improved.

[0010] In a possible design, the chip assembly includes two or more chips, the two or more chips include a first chip and a second chip, and the support member is arranged between the first chip and the circuit board and / or arranged between the second chip and the circuit board.

[0011] In this scheme, when the chip assembly includes two or more chips, the number of support members can also be two or more, and the support members are arranged between the corresponding chips and the circuit board, so that the thickness or strength of the support members can be set according to the stress resistance of the supported chips, for example, the thickness or strength of the first support member can be adjusted according to the first chip, and the thickness or strength of the second support member can be adjusted according to the second chip, so as to improve the stress resistance of the corresponding chips in the chip assembly, thereby ensuring the performance of each chip in the chip assembly and avoiding interference between the chips. The plurality of support members can also meet the miniaturization and lightweight design requirements of the packaging device, and when the packaging assembly is subjected to external environmental stress, the plurality of support members can concentrate the stress between the intervals of adjacent two support members, thereby further reducing the influence of external environmental stress on each chip in the chip assembly and ensuring the performance of each chip in the chip assembly.

[0012] In a possible design, the chips included in the chip assembly are arranged at intervals in a first direction X of the packaging device, the first direction X is parallel to a length direction or a width direction of the packaging device, and the support member is provided with a first groove, the first groove is located between at least two adjacent chips included in the chip assembly.

[0013] In the scheme, when the packaging assembly is subjected to external environmental stress, the stress is easy to concentrate at the first groove after acting on the support, thereby further avoiding the influence of the stress on each chip in the chip assembly, and effectively reducing the mutual influence between the two adjacent chips, i.e., the first chip and the second chip, thereby realizing the mutual independence of each chip in the chip assembly and improving the performance of each chip.

[0014] In a possible design, the support is provided with a second groove, and the second groove is arranged around part or all of the chip assembly.

[0015] In the scheme, the second groove is arranged around the outside of the chip assembly, so as to constrain the external environmental stress at the second groove, reduce the influence of the stress on the chip assembly, and improve the performance of each chip in the chip assembly.

[0016] In a possible design, the Young's modulus of the support is greater than or equal to a first threshold value.

[0017] In the scheme, the greater the Young's modulus, the higher the hardness, and the better the stress resistance. When the Young's modulus of the support is greater than or equal to the first threshold value, the support has a high hardness, so that the support is less likely to deform when subjected to external environmental stress, thereby reducing the influence of the external environmental stress on each chip in the chip assembly.

[0018] In a possible design, the material of the support is any one or more of alumina ceramic, silicon nitride ceramic, silicon carbide ceramic, and aluminum nitride ceramic.

[0019] In the scheme, the alumina ceramic, the silicon nitride ceramic, the silicon carbide ceramic, and the aluminum nitride ceramic have high Young's modulus, insulation performance, and high-temperature stability. When the material of the support is any one or more of alumina ceramic, silicon nitride ceramic, silicon carbide ceramic, and aluminum nitride ceramic, the support has high strength, thereby avoiding the transmission of external environmental stress to each chip in the chip assembly, ensuring the performance of the chip, and enabling the support to have good insulation performance, preventing the chip assembly from interfering with the circuit board or other electronic devices. Meanwhile, the support also has good high-temperature stability, so that the support is less likely to produce stress at a high temperature, and can better reduce the influence of temperature stress on each chip in the chip assembly, further improving the performance of the chip.

[0020] In a possible design, the packaging device further includes an integrated circuit chip, the integrated circuit chip and the circuit board, the support, and the chip assembly are stacked in a thickness direction Z of the packaging device, and the integrated circuit chip is electrically connected to the chip assembly and the circuit board, respectively.

[0021] In the scheme, the integrated circuit chip is arranged to facilitate the integrated design of the packaging device, and the size of the packaging device is reduced. The integrated circuit chip, the circuit board, the support and the chip assembly are arranged in a stacking manner along the thickness direction Z of the packaging device, which can reduce the occupied space of each electronic device in a plane perpendicular to the thickness direction Z, thereby facilitating the miniaturization design of the packaging device.

[0022] In a possible design, the integrated circuit chip is arranged between the support and the chip assembly.

[0023] In the scheme, the circuit board, the support, the integrated circuit chip and the chip assembly are arranged in a stacking manner along the thickness direction Z, which can improve the stress resistance of the integrated circuit chip and the chip assembly by using the high strength of the support, block the transmission of external environmental stress to the integrated circuit chip and the chip assembly, and ensure the performance of the integrated circuit chip and the chip assembly.

[0024] In a possible design, the integrated circuit chip is arranged between the circuit board and the support.

[0025] In the scheme, since the integrated circuit chip itself is not sensitive to external environmental stress, the circuit board, the integrated circuit chip, the support and the chip assembly are arranged in a stacking manner along the thickness direction Z, so that the support can be directly supported between the chip assembly and the integrated circuit chip, and the support effect on the chip assembly is further improved.

[0026] In a possible design, the chip assembly includes a plurality of chips, and the support is arranged between part of the chips of the chip assembly and the integrated circuit chip, and another part of the chips of the chip assembly is arranged in a stacking manner on a side of the integrated circuit chip away from the circuit board.

[0027] In the scheme, according to the different stress resistance of each chip in the chip assembly, the position of the support can be arranged, so that the stress resistance of each chip in the chip assembly is ensured, the miniaturization and light weight design requirements of the packaging device are facilitated, the preparation cost of the packaging device is saved, and the design freedom of the packaging device is improved.

[0028] In a possible design, the integrated circuit chip, the support and at least part of the chip assembly surround to form an avoiding space 6, the integrated circuit chip is provided with a first pad, the first pad is located in the avoiding space 6, and the circuit board is provided with a second pad, the second pad is electrically connected with the first pad.

[0029] In the scheme, the support is arranged between the chip with large packaging size and the integrated circuit chip, the chip with large size is raised, the integrated circuit chip, the support and at least part of the chip assembly form an avoiding space 6, so that the first pad of the integrated circuit chip can be exposed, the first pad can be electrically connected with the second pad through the metal wire, and normal packaging of the packaged device is ensured. The support can also support the chip with large size, avoid external environmental stress from being transmitted to the chip, and ensure the performance of the chip.

[0030] The second aspect of the embodiment of the present application provides an electronic device, which comprises the packaged device in any one of the above embodiments. Since the packaged device has the above technical effects, the electronic device comprising the packaged device should also have corresponding technical effects, which will not be repeated here.

[0031] The third aspect of the embodiment of the present application provides a vehicle, which comprises the electronic device described above. Since the electronic device has the above technical effects, the vehicle comprising the electronic device should also have corresponding technical effects, which will not be repeated here.

[0032] It should be understood that the above general description and the following detailed description are only exemplary and cannot limit the present application. BRIEF DESCRIPTION OF DRAWINGS

[0033] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0034] FIG. 1 is a structural schematic diagram of a packaged device in an embodiment of the related art;

[0035] FIG. 2 is a structural schematic diagram of a packaged device provided by the present application in a specific embodiment;

[0036] FIG. 3 is a structural schematic diagram of a packaged device provided by the present application in another specific embodiment;

[0037] FIG. 4 is a structural schematic diagram of a packaged device provided by the present application in another specific embodiment;

[0038] FIG. 5 is a partial structural schematic diagram of a packaged device provided by the present application in another specific embodiment;

[0039] FIG. 6 is a sectional view of FIG. 5 along the direction of A-A;

[0040] FIG. 7 is a partial structural schematic diagram of a packaged device provided by the present application in another specific embodiment;

[0041] Fig. 8 is a sectional view of Fig. 7 along the direction of B-B;

[0042] Fig. 9 is a schematic view of a partial structure of a packaging device according to another embodiment of the present application;

[0043] Fig. 10 is a schematic view of a partial structure of a packaging device according to another embodiment of the present application;

[0044] Fig. 11 is a schematic view of a partial structure of a packaging device according to another embodiment of the present application;

[0045] Fig. 12 is a schematic view of a partial structure of a packaging device according to another embodiment of the present application;

[0046] Fig. 13 is a sectional view of Fig. 12 along the direction of C-C;

[0047] Fig. 14 is a schematic view of a structure of a packaging device according to another embodiment of the present application;

[0048] Fig. 15 is a schematic view of a structure of a packaging device according to another embodiment of the present application;

[0049] Fig. 16 is a schematic view of a structure of a packaging device according to another embodiment of the present application;

[0050] Fig. 17 is a schematic view of a structure of a packaging device according to another embodiment of the present application;

[0051] Fig. 18 is a schematic view of a structure of a packaging device according to another embodiment of the present application;

[0052] Fig. 19 is a sectional view of Fig. 18 along the direction of D-D.

[0053] Reference signs: 1'-circuit board; 2'-chip assembly; 4'-integrated circuit chip; 1-circuit board; 11-second pad; 2-chip assembly; 21-first chip; 22-second chip; 3-support; 31-first support; 32-second support; 33-first recess; 34-second recess; 4-integrated circuit chip; 41-first pad; 5-metal wire; 6-clearance; X-first direction; Y-second direction; Z-thickness direction.

[0054] The accompanying drawings, which are incorporated herein and form part of the specification, illustrate embodiments consistent with the present application and, together with the description, further serve to explain the principles of the application. DETAILED DESCRIPTION

[0055] In order to better understand the technical solutions of the present application, the embodiments of the present application are described in detail below with reference to the drawings.

[0056] In the description of the present application, unless explicitly specified and limited, the terms "first", "second" are only for the purpose of description, and cannot be understood as indicating or implying relative importance; unless otherwise specified or stated, the term "multiple" refers to two or more; the terms "connection", "fixation" and the like should be broadly understood, for example, "connection" can be fixed connection, or detachable connection, or integrally connected, or electrically connected; it can be directly connected, or indirectly connected through an intermediate medium. For those skilled in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.

[0057] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments, and are not intended to limit the present application. The singular forms "a", "said" and "the" used in the embodiments of the present application and the appended claims are also intended to include plural forms, unless the context clearly indicates otherwise.

[0058] It should be understood that the term "and / or" used herein is only to describe the association relationship of the associated objects, which means that there can be three relationships, for example, A and / or B, which can represent the three cases of A alone, A and B together, and B alone. In addition, the character " / " in this paper generally represents that the front and rear associated objects are a "or" relationship.

[0059] A series of MEMS inertial devices such as Micro-Electro-Mechanical Inertial measurement unit (MEMSIMU), Micro-Electro-Mechanical Accelerator (MEMS Acc), and Micro-Electro-Mechanical Gyroscope (MEMS Gyro) are key chips used in the fields of intelligent driving of vehicles, inertial navigation, chassis control, collision detection, etc. MEMS inertial devices are usually composed of multiple chip units, which are used to detect external motion information. The distance change of the comb teeth under the action of effective signal is usually in nanometer level, which has very high sensitivity and precision, and is very sensitive to environmental stress. Therefore, when the chip is subjected to external environmental stress and has unexpected size change, the performance of the chip will be greatly reduced. The packaging structure is one of the most critical factors affecting the stress resistance of the chip, and improving the stress resistance of the chip packaging structure is particularly important to ensure the performance and reliability of the chip.

[0060] The external environmental stress can be an external impact stress or a single-board thermal deformation stress originating from the chip patch. Because of the difference in the thermal expansion coefficients of the chip, the solder paste, and the circuit board, when the temperature changes, local deformation of the device is caused, and temperature stress is generated.

[0061] Referring to FIG. 1, a structural schematic diagram of a packaging device in the related art is shown. As shown in FIG. 1, the packaging device in the related art generally includes a circuit board 1', a chip assembly 2', and an integrated circuit chip 4', which are electrically connected in sequence.

[0062] In some related art, as shown in FIG. 1, the local stiffness of the chip is generally improved by increasing the local thickness of the chip in the chip assembly 2' to reduce the deformation of the chip assembly 2' under stress. However, the process of increasing the local thickness is difficult (for example, the process of etching the chip is complex, and the process environment such as cutting and scribing is difficult to achieve), and it is easy to increase the overall thickness of the packaging assembly, which is limited in some use scenarios. In addition, increasing the local thickness of the chip can improve the stiffness of the chip, but after the circuit board assembly 1' or the integrated circuit chip 4' is deformed under stress, the glue used to bond the chip assembly 2' to the circuit board assembly 1' or the integrated circuit chip 4' is easy to peel off and fall off, thereby reducing the structural stability of the packaging device.

[0063] In some related art, as shown in FIG. 1, the bottom circuit board 1' uses a ceramic circuit board, and the stress resistance of the ceramic circuit board is used to improve the overall stiffness of the packaging device to reduce the deformation of the chip assembly 2' under stress. However, the use of a ceramic circuit board as the circuit board 1' or the use of a ceramic package greatly increases the process difficulty, increases the cost of the packaging device, and the ceramic circuit board is easy to crack and the circuit is easy to break. The ceramic circuit board containing the circuit function is also easy to produce debris pollution risk when cutting, which easily affects the circuit function of the ceramic circuit board, thereby easily affecting the normal production of the production line.

[0064] Therefore, the packaging device provided in the embodiments of the present application can be applied to an electronic device, which can be a mobile phone, a tablet computer, a desktop computer, a laptop computer, a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, and a cellular phone, a personal digital assistant (PDA), an augmented reality (AR) device, a virtual reality (VR) device, an artificial intelligence (AI) device, a wearable device, an in-vehicle device, a smart home device, and / or a smart city device, and the embodiments of the present application do not specially limit the specific type of the electronic device.

[0065] The electronic device can be applied in a vehicle, a drone, a helicopter, an airplane, a ship, and the like. Exemplarily, taking the vehicle as an example, the electronic device installed in the vehicle can be built-in as one or more components or units in a vehicle-mounted module, a vehicle-mounted module group, a vehicle-mounted component, a vehicle-mounted chip, or a vehicle-mounted unit, and the like.

[0066] Referring to FIG. 2, FIG. 2 is a structural schematic diagram of the packaging device provided in the embodiments of the present application. As shown in FIG. 2, the packaging device provided in the embodiments of the present application includes a circuit board 1, a chip assembly 2, and a support 3.

[0067] The circuit board 1 can be a printed circuit board (PCB), a flexible circuit board (FPC), or a rigid-flexible combined board, and the like. The circuit board 1 is used to be fixedly installed in the vehicle. Exemplarily, the circuit board 1 in the embodiments of the present application can be a printed circuit board (PCB), thereby having a higher hardness, being able to provide better support for the electronic device arranged on the circuit board 1, and improving the structural strength of the packaging device.

[0068] The chip assembly 2 comprises one or more than two chips, wherein "more than two" includes two. FIG. 2 exemplarily shows that the chip assembly 2 comprises two chips, i.e., a first chip 21 and a second chip 22, wherein the first chip 21 and the second chip 22 can be a Micro-Electro-Mechanical Accelerator (MEMS Acc) and a Micro-Electro-Mechanical Gyroscope (MEMS Gyro) respectively. Of course, the chips can also be other MEMS chips, which are not limited herein. The chip assembly 2 is electrically connected with the circuit board 1.

[0069] The support 3 is a sheet or block structure with a certain supporting capacity, and does not have an electrical function, i.e., the support 3 does not have an electrical conductivity. The support 3 is arranged between the circuit board 1 and the chip assembly 2.

[0070] In the embodiment, as shown in FIG. 2, the support 3 has a high strength, and the support 3 arranged between the chip assembly 2 and the circuit board 1 can provide good support for the chip assembly 2. When the packaged device is subjected to external environmental stress, the support 3 is not easy to deform, thereby avoiding the external environmental stress from acting on the chips in the chip assembly 2, improving the stress resistance of the chip assembly 2, avoiding the chips from being deformed due to external stress, and ensuring the performance of the chips. The support 3 does not have an electrical function, has a simple structure and low cost, can reduce the preparation cost of the packaged device, and will not affect the functions of the circuit board 1 and the chip assembly 2 in the packaged device during cutting, thereby improving the preparation efficiency of the packaged device.

[0071] In addition, compared with the way of improving the stress resistance of the chip by increasing the local thickness of the chip to improve the local rigidity of the chip, in the present application, since the support 3 has a high strength, the stress resistance of the chips in the chip assembly 2 can be improved by using a thinner support 3, thereby facilitating the lightweight design of the packaged device.

[0072] In a specific embodiment, the Young's modulus of the support 3 is greater than or equal to a first threshold value. Exemplarily, the Young's modulus of the support 3 is greater than or equal to 300 GPa.

[0073] The greater the Young's modulus, the higher the hardness and the better the stress resistance. When the Young's modulus of the support 3 is greater than or equal to the first threshold value, the support 3 has a high hardness, thereby being less likely to deform when subjected to external environmental stress, thereby reducing the influence of the external environmental stress on the chips in the chip assembly 2.

[0074] In an embodiment, the support 3 is made of any one or more of alumina ceramic, silicon nitride ceramic, silicon carbide ceramic, and aluminum nitride ceramic.

[0075] In the embodiment, the alumina ceramic, silicon nitride ceramic, silicon carbide ceramic, and aluminum nitride ceramic have high Young's modulus, insulation performance, and high-temperature stability. When the support 3 is made of any one or more of alumina ceramic, silicon nitride ceramic, silicon carbide ceramic, and aluminum nitride ceramic, the support 3 has high strength, thereby avoiding the transmission of external environmental stress to the chips in the chip assembly 2, ensuring the performance of the chips, and enabling the support 3 to have good insulation performance, preventing the chip assembly 2 from interfering with the circuit board 1 or other electronic devices. Meanwhile, the support 3 also has good high-temperature stability, thereby making the support 3 less likely to generate stress at a high temperature, better reducing the influence of temperature stress on the chips in the chip assembly 2, and further improving the performance of the chips.

[0076] Of course, the support 3 can also be made of other materials having high Young's modulus and no electrical function, which is not limited herein.

[0077] For example, in the embodiment, the support 3 is made of alumina ceramic, has a Young's modulus of 400-500 Gpa, and has the advantages of low cost, high hardness, and good thermal stability. Since the Young's modulus of silicon material used to manufacture the chips is about 150 GPa, the Young's modulus of the support 3 is much higher than that of the chip material, and thus the support 3 disposed between the chip assembly 2 and the circuit board 1 can provide good support for the chip assembly 2 and reduce the influence of external environmental stress on the chip assembly 2.

[0078] As shown in FIG. 2, when the chip assembly 2 includes two or more chips, the two or more chips include a first chip 21 and a second chip 22. In an embodiment, the support 3 can be disposed between the two or more chips and the circuit board 1. For example, as shown in FIG. 2, the support 3 is disposed between the first chip 21 and the second chip 22 and the circuit board 1. In another embodiment, the support 3 can be disposed only between one or a part of the chips and the circuit board 1. For example, the support 3 is disposed between the first chip 21 and the circuit board 1. For example, as shown in FIG. 3, which is a structural schematic diagram of a packaging device provided by the present application in another embodiment, the support 3 is disposed between the second chip 22 and the circuit board 1. In some other embodiments, the number of chips can not be limited to the first chip 21 and the second chip 22, but can be other numbers, such as three, four, five, six, etc. The arrangement of the chips can be the same as or different from that of the first chip 21 and the second chip 22, which can be arranged according to actual needs, and thus is not described herein again.

[0079] In this embodiment, the positions of the support members 3 can be set according to the stress resistance of each chip in the chip assembly 2, so that the stress resistance of each chip in the chip assembly 2 can be ensured, and the design requirements of miniaturization and light weight of the packaging device can be met, the preparation cost of the packaging device can be saved, and the design freedom of the packaging device can be improved.

[0080] In another specific embodiment, referring to FIG. 4, FIG. 4 is a structural schematic diagram of a packaging device provided by the present application in another specific embodiment. As shown in FIG. 4, when the chip assembly 2 includes two or more chips, and the two or more chips include a first chip 21 and a second chip 22, the support members 3 can also be two or more, wherein "two or more" includes two. For example, the support members 3 can be respectively arranged between the chips and the circuit board 1. As shown in FIG. 4, the two or more support members 3 include a first support member 31 and a second support member 32. The first support member 31 is arranged between the first chip 21 and the circuit board 1, and the second support member 32 is arranged between the second chip 22 and the circuit board 1. In some other embodiments, the number of support members 3 can not be limited to the first support member 31 and the second support member 32, and can also be other numbers, such as three, four, five, six, etc. The arrangement of each support member 3 can be the same as or different from the first support member 31 and the second support member 32, and the specific arrangement can be set according to actual needs, which will not be described here.

[0081] In this embodiment, when the chip assembly 2 includes two or more chips, the number of support members 3 can also be two or more, and the support members 3 are correspondingly arranged between the corresponding chips and the circuit board 1, so that the support members 3 can be correspondingly arranged in thickness or strength according to the stress resistance of the supported chips. For example, the first support member 31 can adjust the thickness or strength according to the first chip 21, and the second support member 32 can adjust the thickness or strength according to the second chip 22, so as to correspondingly improve the stress resistance of the corresponding chips in the chip assembly 2, so as to ensure the performance of each chip in the chip assembly 2, and avoid mutual interference between the chips. The arrangement of multiple support members 3 can also meet the design requirements of miniaturization and light weight of the packaging device. When the packaging assembly is subjected to external environmental stress, the multiple support members 3 can concentrate the stress in the interval between the adjacent two support members 3, so as to further reduce the influence of the external environmental stress on each chip in the chip assembly 2, and ensure the performance of each chip in the chip assembly 2.

[0082] In this embodiment, the chip assembly 2 includes two or more chips, and the number of support members 3 is also two or more. At least one support member 3 can be arranged between at least two or more chips and the circuit board 1, so as to further improve the design freedom of the packaging device, and the specific arrangement can be set according to actual needs, which is not limited here.

[0083] In an embodiment, referring to FIG. 5, FIG. 5 is a schematic diagram of a partial structure of a packaging device provided by the present application in another embodiment. The packaging device shown in FIG. 5 is a view from a top perspective, and the packaging device has a length and a width, and the length direction can be defined as a first direction X, and the width direction can be defined as a second direction Y. As shown in FIG. 5, the chip assembly 2 includes chips (for example, the first chip 21 and the second chip 22) arranged at intervals in the first direction X of the packaging device. The support 3 is provided with a first groove 33 located between at least two adjacent chips included in the chip assembly 2. In other embodiments, the first direction X can be the width direction, and the second direction Y can be the length direction, which is not limited herein.

[0084] Referring to FIG. 6, FIG. 6 is a sectional view of FIG. 5 along the A-A direction.

[0085] In the embodiment, as shown in FIG. 6, when the packaging assembly is subjected to external environmental stress, the stress acting on the support 3 is easy to concentrate at the first groove 33, thereby further avoiding the influence of the stress on each chip in the chip assembly 2, and effectively reducing the mutual influence between the two adjacent chips, i.e., the first chip 21 and the second chip 22, thereby realizing the mutual independence of each chip in the chip assembly 2 and improving the performance of each chip.

[0086] In another embodiment, referring to FIG. 7, FIG. 7 is a schematic diagram of a partial structure of a packaging device provided by the present application in another embodiment. As shown in FIG. 7, the support 3 is provided with a second groove 34 arranged annularly outside the chip assembly 2.

[0087] Referring to FIG. 8, FIG. 8 is a sectional view of FIG. 7 along the B-B direction.

[0088] In the embodiment, as shown in FIG. 8, the second groove 34 is arranged annularly outside the chip assembly 2, which can constrain the external environmental stress at the second groove 34, reduce the influence of the stress on the chip assembly 2, and improve the performance of each chip in the chip assembly 2.

[0089] For example, as shown in FIG. 7, the second groove 34 can be a continuous closed annular structure arranged annularly around the entire chip assembly 2, which is convenient for the preparation of the second groove 34.

[0090] For example, referring to FIG. 9, FIG. 9 is a schematic diagram of a partial structure of a packaging device provided by the present application in another embodiment. As shown in FIG. 9, the second groove 34 can be provided in multiple, and the multiple second grooves 34 are arranged at intervals outside the chip assembly 2, thereby being able to concentrate the stress at the second groove 34 while ensuring the overall strength of the support 3.

[0091] Exemplarily, refer to FIG. 10, which is a schematic diagram of a partial structure of a packaging device in another specific embodiment provided by the present application. As shown in FIG. 10, two second grooves 34 can be provided, and the two second grooves 34 together form a ring structure, which surrounds the outside of the chip assembly 2, i.e., one second groove 34 surrounds the outside of the first chip 21, and the other second groove 34 surrounds the outside of the second chip 22, thereby being able to constrain the chips acting on the first chip 21 and the second chip 22 respectively, and reducing the influence of stress on the chip assembly 2.

[0092] Exemplarily, refer to FIG. 11, which is a schematic diagram of a partial structure of a packaging device in another specific embodiment provided by the present application. As shown in FIG. 11, the second groove 34 can also be a continuous and non-closed semi-ring structure, for example, a C-shaped structure, which surrounds part of the chip assembly 2, and the structure is simpler, and is able to concentrate stress at the second groove 34 while ensuring the overall strength of the support 3.

[0093] In another specific embodiment, refer to FIG. 12, which is a schematic diagram of a partial structure of a packaging device in another specific embodiment provided by the present application. As shown in FIG. 12, the support 3 can be provided with both the first groove 33 and the second groove 34.

[0094] Refer to FIG. 13, which is a sectional view of FIG. 12 along the direction of C-C.

[0095] In this embodiment, as shown in FIG. 13, the packaging device of this structure is able to concentrate stress acting on the packaging device at the first groove 33 and the second groove 34, thereby being able to further avoid the influence of stress on each chip in the chip assembly 2, and also being able to effectively reduce the mutual influence between the two adjacent chips, i.e., the first chip 21 and the second chip 22, thereby realizing the mutual independence of each chip in the chip assembly 2 and improving the performance of each chip.

[0096] In the above embodiments, the cross section of the first groove 33 and the second groove 34 can be one or a combination of a square groove, an arc-shaped groove, a trapezoidal groove, etc., and the specific setting can be made according to actual needs, which is not limited herein. The shape of the first groove 33 and the second groove 34 can be a straight line shape, a curved line shape, or a combination shape of straight line and curved line, etc., and the specific setting can be made according to actual needs, which is not limited herein.

[0097] In one specific embodiment, refer to FIG. 14, which is a schematic diagram of a structure of a packaging device in another specific embodiment provided by the present application. As shown in FIG. 14, the packaging device further comprises an integrated circuit chip 4, which is stacked with the circuit board 1, the support 3 and the chip assembly 2 along the thickness direction Z of the packaging device, and the integrated circuit chip 4 is electrically connected with the chip assembly 2 and the circuit board 1 respectively.

[0098] In the embodiment, as shown in FIG. 14, the integrated circuit chip 4 (Application Specific Integrated Circuit, ASIC) is arranged to facilitate the integrated design of the packaging device, and the volume of the packaging device is reduced. The integrated circuit chip 4, the circuit board 1, the support 3, and the chip assembly 2 are stacked along the thickness direction Z of the packaging device, which can reduce the space occupied by each electronic device in the plane perpendicular to the thickness direction Z, thereby facilitating the miniaturization design of the packaging device.

[0099] The integrated circuit chip 4 can be electrically connected to the chip of the chip assembly 2 and the circuit board 1 through metal wires.

[0100] For example, as shown in FIG. 14, the integrated circuit chip 4 is arranged between the support 3 and the chip assembly 2.

[0101] In the embodiment, as shown in FIG. 14, the circuit board 1, the support 3, the integrated circuit chip 4, and the chip assembly 2 are sequentially stacked along the thickness direction Z, which can improve the stress resistance of the integrated circuit chip 4 and the chip assembly 2 by using the high strength of the support 3, block the transmission of external environmental stress to the integrated circuit chip 4 and the chip assembly 2, and ensure the performance of the integrated circuit chip 4 and the chip assembly 2.

[0102] For example, as shown in FIG. 15, the integrated circuit chip 4 is arranged between the circuit board 1 and the support 3.

[0103] In the embodiment, as shown in FIG. 15, since the integrated circuit chip 4 itself is not sensitive to external environmental stress, the circuit board 1, the integrated circuit chip 4, the support 3, and the chip assembly 2 are sequentially stacked along the thickness direction Z, so that the support 3 can be directly supported between the chip assembly 2 and the integrated circuit chip 4, thereby further improving the support effect on the chip assembly 2.

[0104] For example, as shown in FIG. 16, the chip assembly 2 includes a plurality of chips, the support 3 is arranged between part of the chips of the chip assembly 2 and the integrated circuit chip 4, and the other part of the chips of the chip assembly 2 is stacked on the side of the integrated circuit chip 4 away from the circuit board 1.

[0105] In this embodiment, as shown in FIG. 16, the positions of the support members 3 can be set according to the stress resistance of each chip in the chip assembly 2, so that the stress resistance of each chip in the chip assembly 2 can be ensured, and the miniaturization and lightweight design of the packaging device can be facilitated, the manufacturing cost of the packaging device can be saved, and the design freedom of the packaging device can be improved.

[0106] For example, referring to FIG. 17, FIG. 17 is a structural schematic diagram of a packaging device provided by the present application in another specific embodiment. As shown in FIG. 17, the chip assembly 2 includes two or more chips, and two or more support members 3 are also provided, which are arranged between each chip of the chip assembly 2 and the integrated circuit chip 4.

[0107] In this embodiment, as shown in FIG. 17, the number of support members 3 can also be two or more, and are arranged between the corresponding chips and the integrated circuit chip 4, so that the thickness or strength of the support members 3 can be set according to the stress resistance of the supported chips, so as to improve the stress resistance of the corresponding chips in the chip assembly 2, so as to ensure the performance of each chip in the chip assembly 2, and avoid interference between the chips. The arrangement of multiple support members 3 is also conducive to the miniaturization and lightweight design of the packaging device. When the packaging assembly is subjected to external environmental stress, the stress can be concentrated between the adjacent two support members 3, so as to further reduce the influence of external environmental stress on each chip in the chip assembly 2, and ensure the performance of each chip in the chip assembly 2.

[0108] In one specific embodiment, referring to FIG. 18 and FIG. 19, FIG. 18 is a structural schematic diagram of a packaging device provided by the present application in another specific embodiment, and FIG. 19 is a sectional view of FIG. 18 along the direction D. As shown in FIG. 18, the circuit board 1 is provided with a second pad 11. As shown in FIG. 19, the integrated circuit chip 4, the support member 3 and at least part of the chip assembly 2 form an avoiding space 6, the integrated circuit chip 4 is provided with a first pad 41, the first pad 41 is located in the avoiding space 6, and the first pad 41 is electrically connected with the second pad 11.

[0109] As shown in FIG. 18, when the packaging size of each chip in the chip assembly 2 is determined, some chips in the chip assembly 2, such as the first chip 21, may have an excessively large packaging size due to the requirement of improving performance, etc. If the first chip 21 is directly stacked above the integrated circuit chip 4, the first chip 21 may directly cover the first pad 41, thereby affecting the electrical connection between the integrated circuit chip 4 and the circuit board 1 and each chip in the chip assembly 2, and affecting the normal packaging of the packaging device.

[0110] In this embodiment, as shown in FIG. 19, by arranging the support 3 between the first chip 21 with large package size and the integrated circuit chip 4, the first chip 21 can be raised, the integrated circuit chip 4 and at least part of the chip assembly 2 are surrounded to form an avoiding space 6, so that the first pad 41 of the integrated circuit chip 4 can be exposed, and the first pad 41 can be electrically connected with the second pad 11 through the metal wire 5, ensuring the normal packaging of the packaged device. The support 3 can also support the first chip 21, avoiding the external environmental stress from being transmitted to the first chip 21, and ensuring the performance of the first chip 21.

[0111] In some other embodiments, on the circuit board 1, the integrated circuit chip 4 can also be arranged with the chip assembly 2 in the first direction X or the second direction Y, so as to improve the design freedom of the packaged device, which can be set according to actual needs, and is not limited herein.

[0112] In the specification, the same or similar parts among various embodiments can be referred to each other. Especially, for the device embodiments and the terminal embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the related parts can be referred to the description in the method embodiments.

[0113] The above merely describes the specific embodiments of the present application, but the protection scope of the present application is not limited thereto. Any change or replacement within the technical scope disclosed in the present application should be covered in the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claims.

Claims

1. A packaged device, comprising: include: Circuit board (1), used for fixed installation on vehicles; A chip assembly (2) includes at least one chip, and the chip assembly (2) is electrically connected to the circuit board (1); The support member (3) has no electrical function and is disposed between the circuit board (1) and the chip assembly (2).

2. The packaged device of claim 1, wherein, The chip assembly (2) includes two or more chips, and the two or more chips include a first chip (21) and a second chip (22); The support member (3) is disposed between the circuit board (1) and the chip assembly (2) and includes: The support member (3) is disposed between the first chip (21) and the circuit board (1); And / or, the support member (3) is disposed between the second chip (22) and the circuit board (1).

3. The packaged device of claim 1, wherein, The chip assembly (2) includes two or more chips, and the two or more chips include a first chip (21) and a second chip (22); There are two or more support members (3), including a first support member (31) and a second support member (32); The first support member (31) is disposed between the first chip (21) and the circuit board (1); The second support member (32) is disposed between the second chip (22) and the circuit board (1).

4. The packaged device of claim 2 or 3, wherein, The chips included in the chip assembly (2) are spaced apart in a first direction (X) of the packaging device, the first direction (X) being parallel to the length or width direction of the packaging device; The support member (3) is provided with a first groove (33), which is located between at least two adjacent chips included in the chip assembly (2).

5. The packaged device of any one of claims 1-4, wherein, The support member (3) is provided with a second groove (34), which is arranged around part or all of the chip assembly (2).

6. The packaged device of any one of claims 1-5, wherein, The Young's modulus of the support member (3) is greater than or equal to the first threshold.

7. The packaged device of any one of claims 1-6, wherein, The material of the support member (3) is any one or more of alumina ceramic, silicon nitride ceramic, silicon carbide ceramic, and aluminum nitride ceramic.

8. The packaged device of claim 1, wherein, The packaging device further includes an integrated circuit chip (4), which is stacked with the circuit board (1), the support member (3) and the chip assembly (2) along the thickness direction (Z) of the packaging device; The integrated circuit chip (4) is electrically connected to the chip assembly (2) and the circuit board (1) respectively.

9. The packaged device of claim 8, wherein, The integrated circuit chip (4) is disposed between the support member (3) and the chip assembly (2).

10. The packaged device of claim 8, wherein, The integrated circuit chip (4) is disposed between the circuit board (1) and the support member (3).

11. The packaged device of claim 8, wherein, The chip assembly (2) includes multiple chips. The support member (3) is disposed between a portion of the chips of the chip assembly (2) and the integrated circuit chip (4). Another portion of the chips of the chip assembly (2) are stacked on the side of the integrated circuit chip (4) away from the circuit board (1).

12. The packaged device of claim 10 or 11, wherein, The integrated circuit chip (4) and the support (3) and at least part of the chip assembly (2) form an avoiding space (6); The integrated circuit chip (4) is provided with a first pad (41), and the first pad (41) is located in the avoiding space (6); The circuit board (1) is provided with a second pad (11), and the second pad (11) is electrically connected with the first pad (41).

13. An electronic device, comprising: The electronic device comprises the packaging device as claimed in any one of claims 1-12.

14. A vehicle, characterized by The vehicle comprises the electronic device as claimed in claim 13.

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