Power chip embedded package module

Abstract

Disclosed in the present invention is a power chip embedded package module. In some embodiments, the power chip embedded package module comprises: a ceramic substrate; a circuit board, comprising a circuit substrate and electrically conductive pieces embedded in the circuit substrate; a plurality of power chips packaged between the circuit board and the ceramic substrate, a first side of each power chip being electrically connected to the circuit substrate and an electrically conductive piece, and a second side of each power chip opposite to the first side being electrically connected to the ceramic substrate; and a plurality of thermally conductive blocks, two opposite sides of each thermally conductive block respectively being connected to an electrically conductive piece and the ceramic substrate, wherein the thermally conductive blocks and the power chips are alternately arranged in the length direction of the electrically conductive pieces. The package module of the present invention not only has the advantages of high integration density and good heat dissipation performance, but also can reduce the circuit loop area of the module, effectively reduce circuit impedance, and reduce the parasitic inductance effect.

Description

Power chip embedded packaging module TECHNICAL FIELD

[0001] The present application relates to the field of power chip packaging, and in particular to a power chip embedded packaging module. BACKGROUND

[0002] Power modules including power chips such as IGBT chips and / or MOSFET chips are widely used in various power electronic devices. Such power chips generate a large amount of heat during operation. If the generated heat cannot be dissipated in time by the packaging module, the operation of the power device and its surrounding electronic components will be seriously affected. Therefore, the packaging module is required to have good heat dissipation performance.

[0003] In the application of switching power supply, the parasitic inductance of the power chip circuit is easy to generate a high peak voltage, which in turn leads to a large electromagnetic interference and increases the switching power loss. Therefore, it is necessary to reduce the parasitic inductance of the power module as much as possible. In addition, with the development of power modules towards miniaturization, the power module is required to have higher packaging integration. SUMMARY

[0004] The main purpose of the present application is to provide a power chip packaging module with good heat dissipation performance, high integration, and low circuit impedance and parasitic effect.

[0005] To achieve the above main purpose, a first aspect of an embodiment of the present application discloses a power chip embedded packaging module, comprising:

[0006] a ceramic substrate;

[0007] a circuit board comprising a circuit substrate and a conductive sheet inlaid in the circuit substrate;

[0008] a plurality of power chips packaged between the circuit board and the ceramic substrate; wherein a first side of the power chip is electrically connected to the circuit substrate and the conductive sheet, and a second side of the power chip opposite to the first side is electrically connected to the ceramic substrate;

[0009] a plurality of heat-conducting blocks, each of which has two opposite sides connected to the conductive sheet and the ceramic substrate, respectively; wherein along the length direction of the conductive sheet, the heat-conducting blocks and the power chips are arranged alternately.

[0010] In the above technical solution, on one hand, the power chip and the heat-conducting block are encapsulated between the ceramic substrate and the circuit board provided with the conductive sheet, and the heat-conducting block and the power chip are arranged alternately, the heat generated by the power chip can be conducted to the ceramic substrate through the conductive sheet and the heat-conducting block on the first side of the power chip, and can be directly conducted to the ceramic substrate on the second side of the power chip, so that the three-dimensional heat dissipation of the power chip is realized, and the heat dissipation performance of the encapsulation module is improved. On the other hand, various circuit elements can be installed on the inside and the outer surface of the circuit substrate, so that the power chip and the circuit elements do not need to be arranged on the same installation surface, which not only helps to improve the packaging integration of the module, but also can reduce the circuit loop area of the power chip, effectively reduce the circuit impedance, and reduce the parasitic inductance effect.

[0011] Further, along the length direction of the conductive sheet, the size of the heat-conducting block located in the middle is twice that of the heat-conducting blocks located at both ends, so as to ensure the uniformity of the module heat dissipation and current distribution, and avoid local overheating of the module.

[0012] In an optional embodiment, the heat-conducting block is a metal block, the inner surface of the ceramic substrate is provided with a conductive part and a plurality of heat-conducting parts separated from the conductive part, the conductive part is electrically connected with the second side of the power chip, and the plurality of heat-conducting parts are respectively connected with the plurality of heat-conducting blocks.

[0013] In an optional embodiment, the conductive sheet is provided with a pin exposed from the outer surface of the circuit substrate, and the pin has an integral molding structure with the conductive sheet.

[0014] Further, the first side of the power chip is provided with a source and a gate, the second side of the power chip is provided with a drain, the source and the gate are respectively electrically connected with the conductive sheet and the circuit substrate, and the drain is electrically connected with the ceramic substrate.

[0015] Further, at least one group of the conductive sheets is provided in the circuit substrate, each group of the conductive sheets includes a first conductive sheet provided with a source pin and a second conductive sheet provided with a switching pin, and the ceramic substrate includes a first ceramic substrate and a second ceramic substrate.

[0016] The plurality of power chips form at least one power chip group, the source, the gate and the drain of a part of the power chips in the power chip group are respectively electrically connected with the first conductive sheet, the circuit substrate and the first ceramic substrate, the source, the gate and the drain of another part of the power chips in the power chip group are respectively electrically connected with the second conductive sheet, the circuit substrate and the second ceramic substrate, and the second ceramic substrate and the first conductive sheet are electrically connected through a first intermediate conductive part.

[0017] In an alternative embodiment, each group of the conductive sheet further comprises a third conductive sheet provided with a drain pin, and the third conductive sheet is electrically connected with the first ceramic substrate through a second intermediate conductive part.

[0018] Further, a side of the circuit board facing the ceramic substrate is provided with a layer of encapsulating material, and the ceramic substrate is inlaid in the layer of encapsulating material.

[0019] Further, the ceramic substrate has a metal heat dissipation layer exposed from the layer of encapsulating material, and the metal heat dissipation layer can be connected with an external heat sink or directly dissipate heat.

[0020] Illustratively, the power chip is an IGBT chip.

[0021] A second aspect of the embodiment of the present application discloses a power chip inlaid encapsulation module, comprising:

[0022] A chip carrier plate comprising a first circuit substrate and a conductive sheet inlaid in the first circuit substrate;

[0023] A ceramic substrate arranged on a first surface side of the chip carrier plate;

[0024] A second circuit substrate arranged on a second surface side of the chip carrier plate;

[0025] A plurality of power chips encapsulated between the chip carrier plate and the ceramic substrate; wherein a first side of the power chip is electrically connected with the first circuit substrate and the conductive sheet, and a second side of the power chip opposite to the first side is electrically connected with the ceramic substrate;

[0026] A plurality of heat-conducting ceramic blocks, opposite sides of each ceramic heat-conducting block are respectively connected with the conductive sheet and the ceramic substrate; wherein along a length direction of the conductive sheet, the heat-conducting ceramic blocks and the power chips are alternately arranged.

[0027] In the above technical solution, on the one hand, the power chips and the heat-conducting ceramic blocks are encapsulated between the ceramic substrate and the chip carrier plate provided with the conductive sheet, and the heat-conducting ceramic blocks and the power chips are alternately arranged, the heat generated by the power chip can be conducted to the ceramic substrate through the conductive sheet and the heat-conducting ceramic block on the first side of the power chip, and can be directly conducted to the ceramic substrate on the second side of the power chip, thereby realizing the three-dimensional heat dissipation of the power chip and improving the heat dissipation performance of the encapsulation module. On the other hand, the second surface side of the chip carrier plate is provided with the second circuit substrate on which various circuit elements can be mounted, so that the power chips and the circuit elements do not have to be arranged on the same mounting surface, which not only helps to improve the packaging integration of the module, but also can reduce the circuit loop area of the power chip, effectively reduce the circuit impedance, and reduce the parasitic inductance effect.

[0028] Further, the size of the heat-conducting ceramic block in the middle of the length direction of the conductive sheet is twice that of the heat-conducting ceramic blocks at the two ends, so as to ensure the uniformity of the heat dissipation and current distribution of the module and avoid local overheating of the module.

[0029] Further, the side edge of the conductive sheet is provided with a lateral protrusion embedded in the first circuit substrate, so as to more firmly connect the conductive sheet to the first circuit substrate.

[0030] Further, the conductive sheet has a pin protruding to the outside of the packaging module, so as to facilitate the connection of an external power supply.

[0031] Further, the ceramic substrate comprises a ceramic core plate, and a metal conductive layer and a metal heat dissipation layer respectively arranged on the opposite sides of the ceramic core plate, and the metal conductive layer is connected with the power chip and the heat-conducting ceramic block.

[0032] Further, the metal heat dissipation layer is connected with a heat sink, and the heat sink is provided with heat dissipation fins.

[0033] Further, the heat sink is formed with a cavity in sealed connection with the ceramic substrate to accommodate a cooling working medium, and the inner wall of the cavity is provided with a capillary structure. In operation, the ceramic substrate forms an evaporation zone, and the heat dissipation fins form a condensation zone. Through the evaporation-cooling cycle of the cooling working medium, the heat of the ceramic substrate can be quickly and uniformly conducted to all the heat dissipation fins.

[0034] Further, the second circuit substrate comprises a plurality of layers of conductive circuits, and the conductive circuits of the first circuit substrate are electrically connected with the conductive circuits of the second circuit substrate, so that part of the circuit elements can be packaged inside the second circuit substrate, further improving the integration of the packaging module.

[0035] Further, the second circuit substrate is provided with a driving assembly and circuit elements.

[0036] Further, at least one group of the conductive sheets is arranged in the first circuit substrate, each group of the conductive sheets comprises a first conductive sheet and a second conductive sheet, and the heat-conducting ceramic blocks and the power chips are alternately arranged on the first conductive sheet and the second conductive sheet.

[0037] Further, the first side of the power chip is provided with a source and a gate, and the second side of the power chip is provided with a drain, the source and the gate are electrically connected with the conductive sheet and the first circuit substrate respectively, and the drain is electrically connected with the ceramic substrate.

[0038] In order to more clearly illustrate the purpose, technical scheme and advantages of the present application, the present application will be further described in detail below with reference to the drawings and specific embodiments. BRIEF DESCRIPTION OF DRAWINGS

[0039] Fig. 1 is a schematic diagram of an overall structure of the embodiment 1 of the present application from a first perspective;

[0040] Fig. 2 is a schematic diagram of an overall structure of the embodiment 1 of the present application from a second perspective;

[0041] Fig. 3 is a schematic diagram of a first exploded structure of the embodiment 1 of the present application;

[0042] Fig. 4 is a schematic diagram of a structure of a ceramic substrate and a heat sink in the embodiment 1 of the present application;

[0043] Fig. 5 is a schematic diagram of a second exploded structure of the embodiment 1 of the present application;

[0044] Fig. 6 is a schematic diagram of a first perspective structure of a chip carrier in the embodiment 1 of the present application;

[0045] Fig. 7 is a schematic diagram of a structure of a conductive sheet assembly in the embodiment 1 of the present application;

[0046] Fig. 8 is a schematic diagram of a structure of a conductive portion on a ceramic substrate in the embodiment 1 of the present application;

[0047] Fig. 9 is a schematic diagram of a perspective structure of a power chip and a heat-conductive ceramic block provided on a chip carrier in the embodiment 1 of the present application;

[0048] Fig. 10 is a schematic diagram of a second perspective structure of a chip carrier in the embodiment 1 of the present application;

[0049] Fig. 11 is a schematic diagram of an elevation structure of Fig. 9;

[0050] Fig. 12 is a schematic diagram of a conductive connection structure of a power chip in the embodiment 1 of the present application;

[0051] Fig. 13 is an equivalent circuit diagram of a power chip group in the embodiment 1 of the present application;

[0052] Fig. 14 is a schematic diagram of an overall structure of the embodiment 2 of the present application;

[0053] Fig. 15 is a schematic diagram of a first exploded structure of the embodiment 2 of the present application;

[0054] Fig. 16 is a schematic diagram of a second exploded structure of the embodiment 2 of the present application;

[0055] Fig. 17 is a schematic diagram of a perspective structure of a chip carrier portion in the embodiment 2 of the present application;

[0056] Fig. 18 is a schematic diagram of an elevation structure of a first surface side of a chip carrier in the embodiment 2 of the present application;

[0057] Fig. 19 is a schematic diagram of an elevation structure of a second surface side of a chip carrier in the embodiment 2 of the present application;

[0058] Fig. 20 is a schematic diagram of the overall structure of the first perspective view of the embodiment 3 of the present application;

[0059] Fig. 21 is a schematic diagram of the overall structure of the second perspective view of the embodiment 3 of the present application;

[0060] Fig. 22 is a schematic diagram of the structure of the power module after removing the encapsulation material layer in the embodiment 3;

[0061] Fig. 23 is a schematic diagram of the local structure of Fig. 22;

[0062] Fig. 24 is a schematic diagram of the structure of the power module after removing the encapsulation material layer and the ceramic substrate in the embodiment 3;

[0063] Fig. 25 is a front projection view of Fig. 24;

[0064] Fig. 26 is an A-A sectional view of Fig. 25

[0065] Fig. 27 is a schematic diagram of the structure of the circuit board in the embodiment 3;

[0066] Fig. 28 is a schematic diagram of the structure of the ceramic substrate in the embodiment 3;

[0067] Fig. 29 is a schematic diagram of the connection structure of the ceramic substrate, the power chip and the heat-conducting block in the embodiment 3. DETAILED DESCRIPTION

[0068] In the following description, many specific details are set forth in connection with particular embodiments in order to provide a thorough understanding of the present application. However, it will be understood by those skilled in the art that the following specific embodiments and the detailed description are not intended to limit the scope of the present application.

[0069] Embodiment 1

[0070] As shown in Figs. 1-5, the power chip embedded packaging module disclosed in the embodiment comprises a chip carrier board 10, a plurality of power chips 21, a ceramic substrate 30 and a second circuit board 40. The ceramic substrate 30 is arranged on the first surface side of the chip carrier board 10, the second circuit board 40 is arranged on the second surface side of the ceramic substrate 30, and the side of the ceramic substrate 30 opposite to the chip carrier board 10 is provided with a heat sink 50.

[0071] As shown in Figs. 3 and 4, the ceramic substrate 30 comprises a ceramic core plate 31 and a metal conductive layer 32 and a metal heat dissipation layer 33 arranged on the opposite sides of the ceramic core plate 31 respectively. The metal conductive layer 32 and the metal heat dissipation layer 33 can typically be a copper foil layer or a composite metal layer comprising a copper foil layer. The metal conductive layer 32 is arranged to face the chip carrier board 10, and the metal heat dissipation layer 33 is connected with the heat sink 50.

[0072] As shown in Fig. 6, the chip carrier 10 comprises a first circuit substrate 11 and conductive pieces 12 embedded in the first circuit substrate 11. The first circuit substrate 11 is used to transmit relatively small current (e.g. control signal), and the conductive pieces 12 are used to transmit relatively large current. The first circuit substrate 11 can be a FR-4 circuit board with conductive circuit layers on both sides (e.g. double-sided circuit board), or a FR-4 circuit board with conductive circuit layers on one side (e.g. single-sided circuit board). The conductive pieces 12 are preferably copper pieces, but the present application is not limited thereto.

[0073] The conductive pieces 12 can have substantially the same thickness as the first circuit substrate 11, and penetrate the first circuit substrate 11 in the thickness direction of the first circuit substrate 11; or the conductive pieces 12 can have a thickness smaller than that of the first circuit substrate 11, and are embedded in the first circuit substrate 11 in the thickness direction of the first circuit substrate 11. Preferably, the surfaces of the conductive pieces 12 and the first circuit substrate 11 facing the ceramic substrate 30 are preferably flush with each other, so as to facilitate the mounting of the power chip 21.

[0074] Further, as shown in Fig. 7, the side edges of the conductive pieces 12 are provided with lateral protrusions 120 embedded in the first circuit substrate 11 in the direction perpendicular to the thickness direction of the first circuit substrate 11, so as to more reliably fix the conductive pieces 12 in the first circuit substrate 11. The thickness of the lateral protrusions 120 is smaller than that of the conductive pieces 12, and each conductive piece 12 can be provided with a plurality of lateral protrusions 120 spaced apart from each other (as shown in Fig. 7), so as to achieve better fixing effect. Alternatively, each conductive piece 12 can have a single lateral protrusion continuously formed along the side edges thereof, so as to facilitate the manufacturing process.

[0075] As shown in Fig. 5, the power chip 21 is encapsulated between the chip carrier 10 and the ceramic substrate 30, and the gap between the chip carrier 10 and the ceramic substrate 30 is filled with an encapsulation material layer 60, e.g. resin. The power chip 21 can be an IGBT (Insulated Gate Bipolar Transistor), MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), GTO (Gate Turn-Off Thyristor), GTR (Power Transistor), BJT (Bipolar Junction Transistor), UJT (Unijunction Transistor), etc., and the embodiment is described by taking the IGBT chip as an example.

[0076] In the present application, the plurality of power chips 21 can form at least one power chip group 20, and the chip carrier board 10 is correspondingly provided with at least one set of conductive sheets 12, and the metal conductive layer 32 of the ceramic substrate 30 is correspondingly provided with at least one set of conductive parts 321. Among them, the first side of the power chip 21 is electrically connected with the first circuit substrate 11 and the conductive sheet 12, and the second side of the power chip 21 relative to the first side is electrically connected with the ceramic substrate 30. Further, a plurality of heat-conducting ceramic blocks 13 are further provided between the chip carrier board 10 and the ceramic substrate 30, and the opposite sides of each heat-conducting ceramic block 13 are respectively connected with the conductive sheet 12 and the ceramic substrate 30; wherein, along the length direction of the conductive sheet 12, the heat-conducting ceramic block 13 and the power chip 21 are alternately arranged.

[0077] In the embodiment, the packaging module is provided with three power chip groups 20, and each power chip group 20 includes 20 power chips 21. The chip carrier board 10 is provided with three sets of conductive sheets 12, and each set of conductive sheets 12 includes a first conductive sheet 121, a second conductive sheet 122 and a third conductive sheet 123; the metal conductive layer 32 of the ceramic substrate 30 is provided with three sets of conductive parts 321, and each set of conductive parts 321 includes a first conductive part 321a and a second conductive part 321b. It should be noted that the specific number of conductive sheets in each set of conductive sheets 12 and the specific number of conductive parts in each set of conductive parts 321 can be designed according to requirements, and the present application does not limit this.

[0078] As shown in FIGS. 9 to 12, a part of the power chips 21 (for example, 10 power chips 21a) in each power chip group 20 are arranged along the length direction of the first conductive sheet 121, and another part of the power chips 21 (for example, another 10 power chips 21b) in each power chip group 20 are arranged along the length direction of the second conductive sheet 122. The length directions of the first conductive sheet 121 and the second conductive sheet 122 can be parallel to each other.

[0079] The equivalent circuit diagram of the power chip group 20 can refer to FIG. 13. Specifically, the first side of the power chip 21 is provided with a source S and a gate G, and the second side of the power chip 21 is provided with a drain D; wherein the source S and the gate G of the first side of the power chip 21a are electrically connected with the first conductive sheet 121 and the first circuit substrate 11 respectively, and the drain D of the second side of the power chip 21a is electrically connected with the first conductive part 321a of the ceramic substrate 30; the source S and the gate G of the first side of the power chip 21b are electrically connected with the second conductive sheet 122 and the first circuit substrate 11 respectively, and the drain D of the second side of the power chip 21b is electrically connected with the second conductive part 321b of the ceramic substrate 30.

[0080] The first conductive sheet 121 has a first pin 121a protruding outside the packaging module and a lateral extension 121b extending to one side of the second conductive sheet 122, and the lateral extension 121b is provided with a first intermediate conductive part 101 connected with the second conductive part 321b of the ceramic substrate 30, so as to realize the electrical connection between the first conductive sheet 121 and the second conductive part 321b through the first intermediate conductive part 101; the second conductive sheet 122 has a second pin 122a protruding outside the packaging module. The first pin 121a can be a SW pin (switching pin), and the second pin 122a can be a source pin. As a variation of the embodiment, the first pin 121a can not be part of the first conductive sheet 121, but is electrically connected to the first conductive sheet 121 by welding or screw fastening or the like; the second pin 122a can not be part of the second conductive sheet 122, but is electrically connected to the second conductive sheet 122 by welding or screw fastening or the like.

[0081] The third conductive sheet 123 is provided with a second intermediate conductive part 102 connected with the first conductive part 321a of the ceramic substrate 30, so as to realize the electrical connection between the third conductive sheet 123 and the first conductive part 321a through the second intermediate conductive part 102. The third conductive sheet 123 has a third pin 123a protruding outside the packaging module, and the third pin 123a can be a drain pin. As a variation of the embodiment, the third conductive sheet 123 can not be embedded in the first circuit substrate 11, but is electrically connected to the first conductive part 321a of the ceramic substrate 30 by welding or screw fastening or the like.

[0082] The first conductive sheet 121 and the second conductive sheet 122 are connected with heat-conducting ceramic blocks 13, and the heat-conducting ceramic blocks 13 are alternately arranged with the power chip 21. The heat-conducting ceramic blocks 13 are connected with the metal conductive layer 32 of the ceramic substrate 30, for example, the heat-conducting ceramic blocks 13 on the first conductive sheet 121 are connected with the first conductive part 321a, and the heat-conducting ceramic blocks 13 on the second conductive sheet 122 are connected with the second conductive part 321b, and the heat of the power chip 21 can be further conducted to the ceramic substrate 30 through the heat-conducting ceramic blocks 13 after being conducted to the first conductive sheet 121 and the second conductive sheet 122 from the first surface. Preferably, the opposite sides of the heat-conducting ceramic blocks 13 can be provided with metal layers such as copper foil layers, so as to facilitate the connection (such as welding) of the opposite sides of the heat-conducting ceramic blocks 13 to the conductive sheet 12 and the metal conductive layer 32 of the ceramic substrate 30.

[0083] In view of the fact that the heat-conducting ceramic block 13b arranged between the adjacent power chips 21 needs to conduct the heat of the adjacent power chips 21 simultaneously, as shown in Fig. 11, in the length direction of the first conductive sheet 121 or the second conductive sheet 122, the size of the heat-conducting ceramic block 13a located at the two ends is preferably half of the size of the heat-conducting ceramic block 13b located between the power chips 21. In this way, the heat dissipation and current distribution uniformity of each power chip 21 in the module can be ensured, and local overheating of the module can be avoided.

[0084] Preferably, as shown in Fig. 10, a plurality of Rg resistors (gate resistors) 14 are arranged on the second surface side of the first circuit substrate 11, and the plurality of Rg resistors 14 are arranged one-to-one corresponding to the plurality of power chips 21 and are electrically connected to the gate G of the corresponding power chip 21.

[0085] Please continue to refer to Figs. 4 and 5. The metal heat dissipation layer 33 of the ceramic substrate 30 is connected with a heat sink 50, and the heat sink 50 has heat dissipation fins 51. The heat sink 50 can be a conventional finned heat sink or a uniform heat sink provided with an evaporation-condensation cavity, and the present application does not limit this.

[0086] Preferably, the heat sink 50 and the heat dissipation fins 51 thereof have a hollow cavity, which is sealed by the ceramic substrate 30 and preferably forms a negative pressure environment. The inner wall of the cavity is preferably provided with a capillary structure. The capillary structure can be a porous metal layer formed by sintering metal powder (such as copper powder), a capillary woven mesh formed by weaving fiber filaments or metal filaments (such as copper filaments or aluminum filaments), and / or a capillary groove machined on the inner wall of the cavity. Similarly, the metal heat dissipation layer 33 can also be provided with a capillary structure.

[0087] When the power module is working, the ceramic substrate 30 forms an evaporation zone, and the heat dissipation fins 51 form a condensation zone. Through the evaporation-cooling cycle of the cooling working medium, the heat of the ceramic substrate 30 can be further quickly and uniformly conducted to all the heat dissipation fins 51.

[0088] The second circuit substrate 40 can be an FR-4 circuit board, which preferably has a multi-layer conductive circuit structure to improve the integration of the packaged module. The second circuit substrate 40 and the first circuit substrate 11 can be considered as an integral multi-layer circuit board, and the conductive circuit of the second circuit substrate 40 can be electrically connected with the conductive circuit of the first circuit substrate 11, for example, through the conductive via commonly used in multi-layer circuit boards.

[0089] In the embodiment, the second circuit substrate 40 can include a first core board 41 having a first circuit layer and a second circuit layer on two opposite surfaces, respectively, and a second core board 42 having a third circuit layer and a fourth circuit layer on two opposite surfaces, respectively; the second core board 42 is located between the first core board 41 and the chip carrier board 10, and is connected together with the first core board 41 and the chip carrier board 10 by an insulating adhesive sheet 43. Circuit elements 44 such as capacitors and resistors can be provided on the first core board 41 and the second core board 42. In addition, a driving component 45 of the power chip 21 and an electrical connector 46 for transmitting control signals can be provided on the circuit substrate 40. A temperature sensor can also be provided on the second circuit substrate 40 to monitor the operating temperature of the module.

[0090] In the embodiment, the second circuit substrate 40 has a multi-layer structure with the first core board 41 and the second core board 42, and the circuit elements can be provided on the first core board 41 and the second core board 42, respectively. Compared with the case where the power chip 21 and the circuit elements 44 are provided on the same surface, the power chip 21 and the circuit elements 44 are provided on different surfaces, and the line length of the power chip 21 and the circuit elements 44 can be made smaller. Therefore, the packaging module of the embodiment can reduce the circuit loop area of the module, effectively reduce the on-resistance, reduce the parasitic inductance effect, and thus obtain better efficiency and electrical performance, while the overall power density of the packaging module can be greatly improved.

[0091] Embodiment 2

[0092] As shown in FIGS. 14-19, in the embodiment 2, each set of conductive sheets 12 includes only a first conductive sheet 121 and a second conductive sheet 122, a first pin 121a is provided separately from the first conductive sheet 121, and a second pin 122a is provided separately from the second conductive sheet 122. The first pin 121a, the second pin 122a and the third pin 123a are all exposed from the front surface of the second circuit substrate 40 (i.e., the surface away from the chip carrier board 10), for example, from the window 40a (see FIG. 15) of the second circuit substrate 40.

[0093] The first pin 121a penetrates the second circuit substrate 40 and is electrically connected to the first conductive sheet 121 (e.g., welded on the first conductive sheet 121), and the second pin 122a penetrates the second circuit substrate 40 and is electrically connected to the second conductive sheet 122 (e.g., welded on the second conductive sheet 122). The third pin 123a penetrates the second circuit substrate 40, the first circuit substrate 11 and the encapsulation layer 60 and is electrically connected to the first conductive part 321a of the ceramic substrate 30. Specifically, the first conductive part 321a has a first lateral protrusion 321a1, and the third pin 123a can be welded on the first lateral protrusion 321a1.

[0094] Further, as shown in FIG. 18 and FIG. 19, the first conductive sheet 121 is provided with an adapter 121c on one side of the second conductive sheet 122, and the adapter 121c is provided with an intermediate conductive part 103 electrically connected with the second conductive part 321b of the ceramic substrate 30, so as to realize the electrical connection between the first conductive sheet 121 and the second conductive part 321b through the intermediate conductive part 103. Specifically, as shown in FIG. 15, the second conductive part 321b is provided with a second lateral protrusion 321b1, and the two ends of the intermediate conductive part 103 can be respectively welded with the second lateral protrusion 321b1 and the adapter 121c. The intermediate conductive part 103 can be a copper block, but is not limited thereto.

[0095] Other descriptions of the embodiment 2 can refer to the embodiment 1, and will not be repeated here.

[0096] Embodiment 3

[0097] Referring to FIG. 20 to FIG. 29, the power chip embedded packaging module of the embodiment 3 includes a circuit board 100, a plurality of power chips 21 and a ceramic substrate 300, and the plurality of power chips 21 are packaged between the circuit board 100 and the ceramic substrate 300. Wherein, the side of the circuit board 100 facing the ceramic substrate 300 can be provided with a packaging material layer 400, and the ceramic substrate 300 is embedded in the packaging material layer 400 such as resin. Exemplarily, the power chip 21 is an IGBT chip.

[0098] As shown in FIG. 22, FIG. 23 and FIG. 28, the ceramic substrate 300 includes a ceramic core plate 310, a metal heat dissipation layer 330, a conductive part 320 and a plurality of heat conduction parts 340; wherein, as shown in FIG. 20, the metal heat dissipation layer 330 is arranged to be at least partially exposed from the packaging material layer 400, and can be directly heat dissipated or connected with an external heat sink for heat dissipation. The conductive part 320 and the plurality of heat conduction parts 340 are arranged on the inner surface (the surface connected with the power chip 21) of the ceramic substrate 300, and the plurality of heat conduction parts 340 are all separated from the conductive part 320.

[0099] In the embodiment 3, the conductive part 320 and the plurality of heat conduction parts 340 can be obtained by etching a metal layer arranged on the inner surface of the ceramic substrate 300, and the metal layer can be a copper foil layer or a composite metal layer including a copper foil layer. The metal heat dissipation layer 330 can also adopt a copper foil layer or a composite metal layer including a copper foil layer, and can not be etched.

[0100] The circuit board 100 comprises a circuit substrate 110 and a conductive sheet 120 embedded in the circuit substrate 110; preferably, the conductive sheet 120 is flush with the inner surface of the circuit substrate 110. The circuit substrate 110 is used to transmit relatively small current (e.g. control signal), and the conductive sheet 120 is used to transmit relatively large current. The circuit substrate 110 can be a FR-4 circuit board with conductive circuit layers on both sides (e.g. double-sided circuit board), and the inner surface of the circuit substrate 110 can also be provided with conductive circuit layers. The conductive sheet 120 is preferably copper sheet, but the present application is not limited thereto.

[0101] The circuit substrate 110 can be provided with circuit elements 44 such as capacitors, resistors, etc. The circuit elements 44 and the power chip 21 can be arranged on different surfaces of the circuit substrate 110, for example, the circuit elements 44 are arranged on the outer surface 100a of the circuit substrate 110 and electrically connected to the conductive circuit on the outer surface 100a; the power chip 21 is arranged on the inner surface of the circuit substrate 110 and electrically connected to the conductive circuit on the inner surface. Compared with arranging the power chip 21 and the circuit elements 44 on the same surface, arranging the power chip 21 and the circuit elements 44 on different surfaces can make the circuit length of the power chip 21 and the circuit elements 44 smaller, thereby reducing the circuit loop area of the module, effectively reducing the on-resistance, reducing the parasitic inductance effect, and thus obtaining better efficiency and electrical performance, while greatly improving the overall power density of the packaged module.

[0102] In embodiment 3, the first side of the power chip 21 is electrically connected to the circuit substrate 110 and the conductive sheet 120, and the second side of the power chip 21 is electrically connected to the ceramic substrate 300. For example, the first side of the power chip 21 is provided with a source electrode S and a gate electrode G, and the source electrode S and the gate electrode G of the first side are electrically connected to the conductive sheet 120 and the circuit substrate 110, respectively; the second side of the power chip 21 is provided with a drain electrode D, and the drain electrode D of the second side is electrically connected to the conductive part 320 of the ceramic substrate 300.

[0103] In embodiment 3, the plurality of power chips 21 form at least one power chip group. Corresponding to each power chip group, a group of conductive sheets 120 is arranged in the circuit substrate 110, and each group of conductive sheets 120 comprises a first conductive sheet 121 provided with a first pin 121a and a second conductive sheet 122 provided with a second pin 122a; wherein the first pin 121a can be a switching pin, and the second pin 122a can be a source electrode pin. Moreover, corresponding to each power chip group, the ceramic substrate 300 comprises a first ceramic substrate 300a and a second ceramic substrate 300b which are separated from each other. As a variation of embodiment 3, the first ceramic substrate 300a and the second ceramic substrate 300b can also be made as an integral ceramic substrate according to embodiment 1, and a plurality of conductive parts 320 are arranged on the inner surface of the integral ceramic substrate.

[0104] Specifically, the source S, the gate G and the drain D of one part of the power chips 21 (for example, the power chip 21a) in each power chip group are electrically connected with the first conductive sheet 121, the circuit substrate 110 and the conductive part 320 of the first ceramic substrate 300a respectively, and the source S, the gate G and the drain D of another part of the power chips 21 (for example, the power chip 21b) in each power chip group are electrically connected with the second conductive sheet 122, the circuit substrate 110 and the conductive part 320 of the second ceramic substrate 300b respectively. The second ceramic substrate 300b and the first conductive sheet 121 are electrically connected through the first intermediate conductive part 101 such as a copper strip or a copper block, for example, the opposite sides of the first intermediate conductive part 101 are welded on and electrically connected with the conductive part 320 of the first conductive sheet 121 and the second ceramic substrate 300b respectively, so that the first pin 121a can be electrically connected to the source S of the power chip 21a and the drain D of the power chip 21b at the same time. In Embodiment 3, the equivalent circuit diagram of the power chip group 20 can also be referred to Figure 13.

[0105] Further, each group of conductive sheets 120 can also include a third conductive sheet 123 provided with a third pin 123a, which can be a drain pin. The third conductive sheet 123 and the first ceramic substrate 300a are electrically connected through the second intermediate conductive part 102 such as a copper strip or a copper block. For example, the opposite sides of the second intermediate conductive part 102 are welded on and electrically connected with the conductive part 320 of the third conductive sheet 123 and the first ceramic substrate 300a respectively, so that the third pin 123a can be electrically connected to the drain D of the power chip 21a. As a variation of Embodiment 3, the third conductive sheet 123 provided with the third pin 123a can not be embedded in the circuit substrate 110, but be electrically connected to the conductive part 320 of the first ceramic substrate 300a in a connection manner such as welding or screw fastening.

[0106] In Embodiment 3, the first pin 121a, the second pin 122a and the third pin 123a are preferably arranged to be exposed from the outer surface 100a of the circuit substrate 100. As a variation of Embodiment 3, the first pin 121a, the second pin 122a and the third pin 123a can also be arranged to protrude from the side surface of the circuit substrate 100. In Embodiment 3, each conductive sheet and the pin arranged thereon can have an integrated structure, or can be connected through welding, screw fastening or the like.

[0107] Further, the packaging module of embodiment 3 further comprises a plurality of heat-conducting blocks 130, each of which is connected with the conductive sheet 120 and the ceramic substrate 300 respectively at opposite sides thereof to establish a heat-conducting channel between the conductive sheet 120 and the ceramic substrate 300; along the length direction of the conductive sheet 120, the heat-conducting blocks 130 are arranged alternately with the power chips 21. Specifically, as shown in FIG. 24, the first conductive sheet 121 and the second conductive sheet 122 are both connected with a plurality of heat-conducting blocks 130, and the plurality of heat-conducting blocks 130 on the first conductive sheet 121 and the second conductive sheet 122 are connected with the plurality of heat-conducting portions 340 of the first ceramic substrate 300a and the second ceramic substrate 300b respectively, and along the length direction of the first conductive sheet 121 and the second conductive sheet 122, the heat-conducting blocks 130 are arranged alternately with the power chips 21.

[0108] The heat-conducting blocks 130 can be arranged completely on the first conductive sheet 121 or the second conductive sheet 122, or can further extend onto the circuit substrate 110 to increase the heat-conducting area. The heat of the power chip 21 can be conducted to the first conductive sheet 121 and the second conductive sheet 122 from the first side thereof, and then further conducted to the first ceramic substrate 300a and the second ceramic substrate 300b through the heat-conducting blocks 130 to improve the heat dissipation efficiency of the module. In embodiment 3, the heat-conducting blocks 130 are preferably metal blocks such as copper blocks, or can be insulating heat-conducting materials such as ceramic blocks, and the metal blocks are lower in cost.

[0109] Considering that the heat-conducting blocks 130 arranged between adjacent power chips 21 need to conduct the heat of the adjacent power chips 21 simultaneously, as shown in FIG. 25, along the length direction of the first conductive sheet 121 or the second conductive sheet 122, the size of the heat-conducting blocks 130a at the two ends is preferably half of the size of the heat-conducting blocks 130b between the power chips 21 (i.e. the size of the heat-conducting blocks 130b in the middle is twice the size of the heat-conducting blocks 130a at the two ends). Such design can ensure the uniformity of the heat dissipation and current distribution of each power chip 21 in the module, and avoid local overheating of the module.

[0110] Although the present application is described above by way of embodiments, the above embodiments are only used for illustratively describing the implementable solutions of the present application, and are not used for limiting the protection scope of the present application, and any equivalent replacement or change made by those skilled in the art according to the present application shall also be covered by the protection scope defined by the claims of the present application.

Claims

1. A power chip embedded package module, comprising: a ceramic substrate; a circuit board comprising a circuit substrate and a conductive sheet inlaid in the circuit substrate; a plurality of power chips packaged between the circuit board and the ceramic substrate; wherein a first side of the power chips is electrically connected with the circuit substrate and the conductive sheet, and a second side of the power chips opposite to the first side is electrically connected with the ceramic substrate; a plurality of heat-conducting blocks, each of which has opposite two sides connected with the conductive sheet and the ceramic substrate respectively; wherein the heat-conducting blocks and the power chips are alternately arranged along the length direction of the conductive sheet.

2. The power chip-in-a-package module of claim 1, wherein, The size of the heat-conducting block in the middle is twice that of the heat-conducting blocks at both ends along the length direction of the conductive sheet.

3. The power-die embedded package module of claim 1, wherein, The heat-conducting blocks are metal blocks, the inner surface of the ceramic substrate is provided with a conductive part and a plurality of heat-conducting parts separated from the conductive part, the conductive part is electrically connected with the second side of the power chips, and the plurality of heat-conducting parts are connected with the plurality of heat-conducting blocks respectively.

4. The power-die embedded package module of claim 1, wherein, The conductive sheet is provided with a pin exposed from the outer surface of the circuit substrate, and the pin has an integral molding structure with the conductive sheet.

5. The power chip-in-a-package module of claim 1, wherein, The first side of the power chip is provided with a source and a gate, and the second side of the power chip is provided with a drain, the source and the gate are electrically connected with the conductive sheet and the circuit substrate respectively, and the drain is electrically connected with the ceramic substrate.

6. The power chip embedded package module according to claim 5, wherein: the circuit substrate is provided with at least one group of the conductive sheets, each group of the conductive sheets comprises a first conductive sheet provided with a switching pin and a second conductive sheet provided with a source pin, and the ceramic substrate comprises a first ceramic substrate and a second ceramic substrate; the plurality of power chips form at least one power chip group, the source, gate and drain of a part of the power chips in the power chip group are electrically connected with the first conductive sheet, the circuit substrate and the first ceramic substrate respectively, the source, gate and drain of another part of the power chips in the power chip group are electrically connected with the second conductive sheet, the circuit substrate and the second ceramic substrate respectively, and the second ceramic substrate is electrically connected with the first conductive sheet through a first intermediate conductive part.

7. The power chip-in-a-package module of claim 6, wherein, each group of the conductive sheets further comprises a third conductive sheet provided with a drain pin, and the third conductive sheet is electrically connected with the first ceramic substrate through a second intermediate conductive part.

8. The power-die embedded package module of claim 1, wherein, The side of the circuit board facing the ceramic substrate is provided with a packaging material layer, and the ceramic substrate is inlaid in the packaging material layer.

9. The power chip-in-a-package module of claim 8, wherein, The ceramic substrate has a metal heat dissipation layer exposed from the packaging material layer.

10. The power-die embedded package module of claim 1, wherein, The power chip is an IGBT chip.

11. A power chip embedded package module, comprising: a chip carrier board comprising a first circuit substrate and a conductive sheet inlaid in the first circuit substrate; a ceramic substrate arranged on a first surface side of the chip carrier board; a second circuit substrate arranged on a second surface side of the chip carrier board; a plurality of power chips, encapsulated between the chip carrier and the ceramic substrate; wherein a first side of the power chips is electrically connected with the first circuit substrate and the conductive sheet, and a second side of the power chips opposite to the first side is electrically connected with the ceramic substrate; a plurality of heat-conducting ceramic blocks, each of which is connected with the conductive sheet and the ceramic substrate respectively at opposite sides; wherein the heat-conducting ceramic blocks and the power chips are arranged alternately along the length direction of the conductive sheet.

12. The power chip-in-a-package module of claim 11, wherein, The size of the heat-conducting ceramic block in the middle is twice that of the heat-conducting ceramic blocks at the two ends along the length direction of the conductive sheet.

13. The power chip-in-a-package module of claim 11, wherein, The side edge of the conductive sheet is provided with a lateral protrusion embedded in the first circuit substrate.

14. The power chip-in-a-package module of claim 11, wherein, The conductive sheet is provided with a pin protruding outside the packaging module.

15. The power chip-in-a-package module of claim 11, wherein, The ceramic substrate comprises a ceramic core plate, and a metal conductive layer and a metal heat dissipation layer arranged on opposite sides of the ceramic core plate respectively, the metal conductive layer being connected with the power chips and the heat-conducting ceramic blocks.

16. The power chip-in-a-package module of claim 15, wherein, The metal heat dissipation layer is connected with a heat sink, and the heat sink is provided with heat dissipation fins.

17. The power chip-in-a-package module of claim 16, wherein, The heat sink is formed with a cavity sealedly connected with the ceramic substrate to accommodate cooling working medium, and the inner wall of the cavity is provided with a capillary structure.

18. The power chip-in-a-package module of claim 11, wherein, The second circuit substrate comprises a plurality of layers of conductive circuits, and the conductive circuits of the first circuit substrate are electrically connected with the conductive circuits of the second circuit substrate.

19. The power-die embedded package module of claim 11, wherein, The second circuit substrate is provided with a driving assembly and circuit elements.

20. The power chip-in-a-package module of claim 11, wherein, The first circuit substrate is provided with at least one group of the conductive sheets, each group of the conductive sheets comprising a first conductive sheet and a second conductive sheet, and the first conductive sheet and the second conductive sheet are alternately provided with the heat-conducting ceramic blocks and the power chips.

21. The power-die embedded package module of claim 11, wherein, The first side of the power chip is provided with a source electrode and a gate electrode, and the second side of the power chip is provided with a drain electrode, the source electrode and the gate electrode being electrically connected with the conductive sheet and the first circuit substrate respectively, and the drain electrode being electrically connected with the ceramic substrate.

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