Arrangement having a first heat sink and a second heat sink

Abstract

The invention relates to a power semiconductor arrangement (2) having a first heat sink (4) and a second heat sink (6), wherein the heat sinks (4, 6) each have a planar surface (8), a first side face (10) and a second side face (12) arranged opposite the first side face (10), wherein at least one power semiconductor circuit (24) is connected to the surface (8) of each of the heat sinks (4, 6). In order to improve the service life of the power semiconductor arrangement (2), it is proposed that the first heat sink (4) has a plurality of first fins (16) and the second heat sink (6) has a plurality of second fins (18) and third fins (20), wherein: the fins (16, 18, 20) of each heat sink (4, 6) extend in parallel from the first side face (10) to the second side face (12) in an air flow direction (22); the second heat sink (6) is arranged downstream of the first heat sink (4) in the air flow direction (22); the second side face (12) of the first heat sink (4) directly adjoins the first side face (10) of the second heat sink (6); and the number of second fins (18) of the second heat sink (6) is equal to the number of first fins (16) of the first heat sink (4).

Description

[0001] 202413138 Foreign version Fair copy

[0002] 1

[0003] Description

[0004] arrangement with a first heat sink and a second heat sink

[0005] The invention relates to a power semiconductor arrangement comprising a first heat sink and a second heat sink.

[0006] Furthermore, the invention relates to a power converter with at least one such power semiconductor arrangement.

[0007] Furthermore, the invention relates to a method for manufacturing a power semiconductor arrangement with a first heat sink and a second heat sink.

[0008] Such power semiconductor arrangements are typically used in a power converter. A power converter can be, for example, a rectifier, an inverter, a converter, or a DC / DC converter. To dissipate the heat generated by such a power semiconductor circuit, heat sinks are commonly used. This heat dissipation can be achieved, for example, through forced air cooling.

[0009] The patent application EP 4 128 337 A1 describes a power module with at least two power units, each comprising at least one power semiconductor and a substrate. To reduce the required installation space of the power module and improve heat dissipation, it is proposed that the at least one power semiconductor be bonded to the respective substrate, in particular by metallurgical bonding, with the substrates of the at least two power units each being directly bonded to a surface of a common heat sink.

[0010] For example, if two identical heat sinks arranged in a row are subjected to a cooling airflow on one side, the heat sink located downstream will heat up more for the same power dissipation of the power semiconductor circuits. The hottest power semiconductor is relevant for the lifetime design of the power semiconductor circuits on the heat sinks. Such a power semiconductor can be, among other things, a transistor. These transistors can be, for example, insulated-gate bipolar transistors (IGBTs) or wide-bandgap transistors. [The following appears to be unrelated and possibly a separate document fragment: 202413138 Foreign version Fair copy]

[0011] 2

[0012] Transistors can be implemented using silicon carbide (SiC) or gallium nitride (GaN) technology, for example, and enable, among other things, higher switching frequencies.

[0013] Against this background, it is an object of the present invention to improve the lifetime of a power semiconductor arrangement comprising two heat sinks cooled on one side.

[0014] This problem is solved according to the invention by a power semiconductor arrangement with a first heat sink and a second heat sink, wherein the heat sinks each have a flat surface, a first side surface and a second side surface arranged opposite the first side surface, wherein at least one power semiconductor circuit is connected on the surfaces of the heat sinks, wherein the first heat sink has a plurality of first fins and the second heat sink has a plurality of second fins and third fins, wherein the fins of the respective heat sink are arranged parallel from the first side surface to the second side surface along an airflow direction, wherein the second heat sink is arranged downstream of the first heat sink along the airflow direction.wherein the second side surface of the first heat sink is directly adjacent to the first side surface of the second heat sink and wherein the number of second fins of the second heat sink is equal to the number of first fins of the first heat sink.

[0015] Furthermore, the problem is solved according to the invention by a power converter with at least one such power semiconductor arrangement.

[0016] Furthermore, the object of the invention is achieved by a method for manufacturing a power semiconductor arrangement with a first heat sink and a second heat sink, wherein the heat sinks each have a flat surface, a first side surface and a second side surface arranged opposite the first side surface, wherein at least one power semiconductor circuit is connected on the surfaces of the heat sinks, wherein the first heat sink has a plurality of first fins and the second heat sink has a plurality of second fins and third fins, wherein the fins of the respective heat sink are arranged parallel from the first side surface to the second side surface along an airflow direction, wherein the second heat sink is arranged downstream of the first heat sink along the airflow direction, wherein the second side surface of the first heat sink is directly adjacent to the first side surface of the second heat sink.

[0017] 3

[0018] is arranged adjacent to the heat sink and wherein the number of second ribs of the second heat sink is equal to the number of first ribs of the first heat sink.

[0019] Furthermore, the object of the invention is achieved by a power semiconductor arrangement with a first heat sink and a second heat sink, wherein the heat sinks each have a flat surface, a first side surface and a second side surface arranged opposite the first side surface, wherein at least one power semiconductor circuit is connected on the surfaces of the heat sinks, wherein the first heat sink and the second heat sink have a plurality of fins, which are each arranged parallel from the first side surface to the second side surface of the respective heat sink along an airflow direction of a cooling airflow, wherein the second heat sink is arranged downstream of the first heat sink along the airflow direction, wherein the second side surface of the first heat sink directly adjoins the first side surface of the second heat sink and wherein the fins of the heat sinks each have a contact surface.which is in a fluid-technical connection to the cooling airflow, wherein the contact area of ​​the fins of the second cooling body is larger than the contact area of ​​the fins of the first cooling body 4.

[0020] The advantages and preferred configurations listed below with regard to the power semiconductor arrangement can be applied analogously to the power converter and the manufacturing process.

[0021] The invention is based on the idea of ​​improving the service life of a power semiconductor arrangement with two heat sinks cooled on one side by ensuring uniform heat dissipation from the power semiconductor circuits. Each heat sink has a flat surface, a first side surface, and a second side surface arranged opposite the first. The heat sinks can, for example, have essentially flat side surfaces. In particular, the heat sinks are essentially cuboid in shape. The first and second heat sinks have a plurality of fins, in particular straight fins, which are arranged parallel to each other from the first side surface to the second side surface of the respective heat sink along an airflow direction.The second heat sink is arranged downstream of the first heat sink along the airflow direction, with the second side surface of the first heat sink directly adjacent to the first side surface of the second heat sink. The heat sinks may touch or be separated by a maximum of 1 mm. 202413138 Foreign version Fair copy.

[0022] 4. In particular, the heat sinks must be spaced a maximum of 500 pm apart. However, the heat sinks are not connected to each other by fasteners such as adhesive or sealant.

[0023] The fins of the heat sinks each have a contact surface that is in fluid communication with the cooling airflow, with the contact surface of the fins of the second heat sink being larger than the contact surface of the fins of the first heat sink. For example, the first heat sink has a plurality of first fins, and the second heat sink has a plurality of second and third fins, where the number of second fins of the second heat sink is equal to the number of first fins of the first heat sink. Due to the additional third fins of the downstream second heat sink, the contact surface with the cooling airflow is increased, resulting in improved heat dissipation from the power semiconductor circuits.Since the cooling airflow is already heated by the first heat sink, the additional third fins of the downstream second heat sink allow for approximately equal temperature conditions for both heat sinks, leading to an improvement in the service life of the power semiconductor arrangement.

[0024] Another embodiment provides that the first fins of the first heat sink and the second fins of the second heat sink are aligned. In this way, the first fins effectively extend the second fins, which is advantageous from a fluid dynamics perspective. Specifically, the first fins of the first heat sink and the second fins of the second heat sink are arranged along a straight line. This ensures uniform heat dissipation from the power semiconductor circuits, leading to an improved lifetime for the power semiconductor assembly.

[0025] Another embodiment provides that at least two, and in particular at least three, power semiconductor circuits are connected on the surfaces of the respective heat sinks, with the power semiconductor circuits arranged along the airflow direction. For example, three identical power semiconductor circuits are connected on each heat sink, which may each comprise a half-bridge and / or be associated with a three-phase power converter. Such an arrangement enables a simple modular design.

[0026] Another embodiment provides that at least one power semiconductor circuit of the first heat sink has the same circuit topology as at least one power semiconductor circuit of the second heat sink. In particular, at least one 202413138 Foreign version Fair copy

[0027] 5

[0028] The power semiconductor circuit of the first heatsink uses the same semiconductor components in the same layout as at least one power semiconductor circuit of the second heatsink. This arrangement allows, for example, simple and cost-effective scalability of the power semiconductor assembly. The additional third fins of the downstream second heatsink ensure uniform heat dissipation even with the same circuit topology, which may involve the same power dissipation, thus extending the lifetime of the power semiconductor assembly.

[0029] Another embodiment provides that the power semiconductor circuits each comprise a substrate which is metallurgically bonded to the surface of the respective heat sink. This metallurgical bond can be achieved, among other methods, by soldering or sintering. Such a direct connection of the substrate to the respective heat sink, in combination with the additional third fins of the downstream second heat sink, results in improved and more uniform thermal contact, particularly compared to power modules with an additional bonding plate that are contacted with thermal paste on the respective heat sink.

[0030] Another embodiment provides that the second and third fins of the second heat sink are arranged alternately. Such an arrangement enables uniform heat dissipation from the power semiconductor circuits perpendicular to the airflow direction, which leads to an improvement in the service life of the power semiconductor assembly.

[0031] Another embodiment provides that the ratio of the number of fins on the second heat sink to the number of fins on the first heat sink is an integer. Such an arrangement enables uniform heat dissipation perpendicular to the airflow direction, which leads to an improvement in the service life of the power semiconductor assembly.

[0032] Another embodiment provides that the heat sinks are each monolithic. In particular, the base plate and fins of each heat sink are formed in one piece. A monolithic design is cost-effective and reduces the thermal resistance between the fins and the base plate, especially compared to pressed-in fins.

[0033] Another embodiment provides that the heat sinks are each manufactured using an extrusion process. In particular, the heat sink is manufactured from an aluminum alloy as a continuous profile using extrusion. For example, in the 202413138 foreign version fair copy

[0034] 6

[0035] Extrusion of an aluminum alloy with a silicon content of 0.1% to 1.0%, particularly 0.1% to 0.6%, is possible. Thus, a lower silicon content can be used in extrusion, especially compared to a cast base, resulting in improved thermal conductivity. Furthermore, extrusion of continuous profiles is cost-effective and simple.

[0036] Another embodiment provides that the first heat sink is manufactured by die casting and the second heat sink by extrusion. In particular, the heat sinks are made of an aluminum alloy. A heat sink manufactured by die casting, especially an aluminum heat sink, has poorer thermal conductivity than a heat sink manufactured by extrusion, especially an aluminum heat sink. This can, in addition to and synergistically with varying the number of fins, contribute to achieving approximately the same temperature conditions for both heat sinks, leading to an improvement in the service life of the power semiconductor assembly.

[0037] Another embodiment provides that the surface of the first heat sink is arranged flush with the surface of the second heat sink, wherein a first length of the first ribs corresponds to a second length of the second and third ribs, so that the ribs are flush on a side opposite the surfaces.

[0038] In particular, the length of the ribs is constant in the direction of airflow. This arrangement saves installation space and also ensures uniform heat dissipation from the power semiconductor circuits.

[0039] Another embodiment provides that a fan configured as a pressure fan is arranged directly adjacent to the first side surface of the first heat sink, or a fan configured as a suction fan is arranged directly adjacent to the second side surface of the second heat sink. This lateral arrangement of the fans saves installation space.

[0040] Another embodiment provides that the fins of the second heat sink have a higher air resistance than the fins of the first heat sink. Increased air resistance can be achieved, among other things, by a greater number and / or a different geometry of the fins of the second heat sink. Increased air resistance due to a different fin geometry is achieved, among other things, by a greater length. 202413138 Foreign version Fair copy

[0041] 7, which allows for uniform heat dissipation from the power semiconductor circuits.

[0042] Another embodiment provides that at least the fins of the second heat sink have a profile. For example, those of the second heat sink have a wave-like profile. In particular, the profiled fins have a consistent cross-sectional profile along the airflow direction, so that the second heat sink can also be manufactured cost-effectively by extrusion. The profile leads to improved heat dissipation from the power semiconductor circuits of the second heat sink.

[0043] The invention will now be described and explained in more detail with reference to the exemplary embodiments shown in the figures.

[0044] They show:

[0045] FIG 1 shows a schematic three-dimensional representation of a first embodiment of a power semiconductor arrangement,

[0046] FIG 2 shows a schematic sectional view of a second embodiment of a power semiconductor arrangement,

[0047] FIG 3 shows a schematic sectional view of a third embodiment of a power semiconductor arrangement,

[0048] FIG 4 shows a schematic sectional view of a fourth embodiment of a power semiconductor arrangement,

[0049] FIG 5 shows a schematic sectional view of a fifth embodiment of a power semiconductor arrangement,

[0050] FIG 6 shows a schematic sectional view of a sixth embodiment of a power semiconductor arrangement,

[0051] FIG 7 is a schematic representation of a power converter. 202413138 Foreign version Fair copy

[0052] 8

[0053] The exemplary embodiments described below are preferred embodiments of the invention. In these exemplary embodiments, the described components each represent individual features of the invention that can be considered independently of one another. Each of these features further develops the invention independently and can therefore be considered part of the invention individually or in a combination other than that shown. Furthermore, the described embodiments can also be supplemented by other features of the invention already described.

[0054] The same reference symbols have the same meaning in the different figures.

[0055] FIG 1 shows a schematic three-dimensional representation of a first embodiment of a power semiconductor arrangement 2, comprising a first heat sink 4 and a second heat sink 6. The heat sinks 4 and 6 each have a flat surface 8, a first side surface 10, and a second side surface 12 arranged opposite the first side surface 10, wherein the second side surface 12 of the first heat sink 4 directly adjoins the first side surface 10 of the second heat sink 6. The flat surface 8 defines an xy-plane. The heat sinks 4 and 6 can be in contact with each other or spaced apart by a maximum of 1 mm, in particular a maximum of 500 pm; however, the heat sinks 4 and 6 are not connected to each other by connecting elements such as adhesive or sealant.Furthermore, the heat sinks 4, 6 each have a base plate 14, the first heat sink 4 having a plurality of first fins 16 and the second heat sink 6 having a plurality of second fins 18 and third fins 20. The fins 16, 18, 20 extend perpendicular to the xy-plane in the z-direction. In addition, the fins 16, 18, 20 of the respective heat sink 4, 6 are arranged in a straight line parallel to each other from the first side surface 10 to the second side surface 12 along an airflow direction 22, with the second heat sink 6 being arranged downstream of the first heat sink 4 along the airflow direction 22. Three power semiconductor circuits are connected by way of example on the flat surfaces 8 of the heat sinks 4, 6 along the airflow direction 22, the power semiconductor circuits being omitted from FIG. 1 for clarity.

[0056] A number of first of the second ribs 18 of the second heat sink 6 corresponds to a number of first ribs 16 of the first heat sink 4. Furthermore, the first ribs 16 of the first heat sink 4 and the second ribs 18 of the second heat sink 6 are arranged in alignment, such that the respective second ribs 18 extend the first ribs 16. Furthermore, the 202413138 foreign version fair copy

[0057] The second heat sink 6 has nine alternating second ribs 18 and third ribs 20. For example, the first heat sink has ten first ribs 16, while the second heat sink 6 has ten second ribs 18 and ten third ribs 20. Thus, the ratio of the number of ribs 18, 20 of the second heat sink 6 to the number of ribs 16 of the first heat sink 4 is an integer. In this way, the temperatures of both heat sinks are adjusted during operation of the power semiconductor circuits.

[0058] The heat sinks 4 and 6 are each monolithic and manufactured from an aluminum alloy using an extrusion process. The aluminum alloy contains, for example, a silicon content of 0.1% to 1.0%, and in particular, 0.1% to 0.6%. Furthermore, the surface 8 of the first heat sink 4 is flush with the surface 8 of the second heat sink 6. The fins 16, 18, and 20 have a constant length 11, I2 in the airflow direction 22. The first length 11 of the first fin 16 corresponds to the second length I2 of the second and third fins 18 and 20, respectively, with the fins 16, 18, and 20 being flush on one side opposite the surface 8.

[0059] FIG. 2 shows a schematic sectional view of a second embodiment of a power semiconductor arrangement 2, wherein the surface 8 of the first heat sink 4 is arranged flush with the surface 8 of the second heat sink 6. At least two, and in particular at least three, power semiconductor circuits 24 are metallurgically bonded to the surfaces 8 of the respective heat sinks 4, 6. The power semiconductor circuits 24 each have a substrate 26, which is connected to the surface 8 of the respective heat sink 4, 6 by a solder joint 28. In FIG. 2, the substrate is designed as a DCB substrate, where DCB stands for "direct copper bonded". Power semiconductor elements 30 are arranged on one side of the substrate 26 facing away from the respective surface 8. By way of example, the semiconductor elements 30 are designed as a transistor T and a diode D. The transistor T is designed as an IGBT by way of example.Alternatively, the transistor T can be implemented as a vertical SiC MOSFET, among other configurations. The second fins 18 and third fins 20 of the second heat sink 6 are arranged alternately, with the second fins 18 defining the boundaries of the second heat sink 6 on both sides in the x-direction. The further configuration of the power semiconductor arrangement 2 in FIG. 2 corresponds to the embodiment in FIG. 1.

[0060] FIG 3 shows a schematic sectional view of a third embodiment of a power semiconductor arrangement 2, wherein two second ribs 18 are arranged alternately with a third rib 20 and wherein the second ribs 18 support the second heat sink 6 on both sides. 202413138 Foreign version Fair copy

[0061] Limit 10 in the x-direction. The further design of the power semiconductor arrangement 2 in FIG. 3 corresponds to the embodiment in FIG. 2.

[0062] FIG. 4 shows a schematic sectional view of a fourth embodiment of a power semiconductor arrangement 2, wherein a second rib 18 is arranged alternately with two third ribs 20, and wherein the second ribs 18 bound the second heat sink 6 on both sides in the x-direction. The further embodiment of the power semiconductor arrangement 2 in FIG. 4 corresponds to the embodiment in FIG. 2.

[0063] FIG. 5 shows a schematic sectional view of a fifth embodiment of a power semiconductor arrangement 2, wherein the fins 18, 20 of the second heat sink 6 have an exemplary wave-shaped profile 32. The profiled fins 18, 20 of the second heat sink 6 have a constant cross-sectional profile along the airflow direction 22, so that the second heat sink 6 can also be manufactured cost-effectively by extrusion. The profile 32 of the fins 18, 20 of the second heat sink 6 increases the surface area, which leads to improved heat dissipation from the power semiconductor circuits 24 of the second heat sink 6. The further embodiment of the power semiconductor arrangement 2 in FIG. 5 corresponds to the embodiment in FIG. 2.

[0064] FIG. 6 shows a schematic sectional view of a sixth embodiment of a power semiconductor arrangement 2, in which, by way of example, two power semiconductor circuits 24 are arranged on a heat sink 4, 6 along the airflow direction 22. The power semiconductor circuits 24 of the first heat sink 4 have the same circuit topology as the power semiconductor circuits 24 of the second heat sink 6. A suction fan 34, configured to generate a cooling airflow in the airflow direction 22, is arranged directly adjacent to the second side surface 12 of the second heat sink 6. Alternatively, a pressure fan can be arranged directly adjacent to the first side surface 10 of the first heat sink 4. The further configuration of the power semiconductor arrangement 2 in FIG. 6 corresponds to the embodiment in FIG. 2.

[0065] FIG 7 shows a schematic representation of a power converter 36, which by way of example includes a power semiconductor arrangement 2.

[0066] In summary, the invention relates to a power semiconductor arrangement 2 with a first heat sink 4 and a second heat sink 6, wherein the heat sinks 4, 6 each have a planar surface.

[0067] 11

[0068] surface 8, a first side surface 10 and a second side surface 12 arranged opposite the first side surface 10, wherein on the surfaces 8 of the

[0069] Each heat sink 4, 6 is connected to at least one power semiconductor circuit 24. To improve the lifetime of the power semiconductor arrangement 2, it is proposed that the first heat sink 4 has a plurality of first fins 16 and the second heat sink 6 has a plurality of second fins 18 and third fins 20, wherein the fins 16, 18, 20 of the respective heat sink 4, 6 are arranged parallel from the first side surface 10 to the second side surface 12 along an airflow direction 22, wherein the second heat sink 6 is arranged downstream of the first heat sink 4 along the airflow direction 22, and wherein the second side surface 12 of the first heat sink 4 is directly adjacent to the first side surface 10 of the second heat sink 6.

[0070] heat sink 6 adjoins and wherein a number of the second ribs 18 of the second heat sink 6 is equal to a number of the first ribs 16 of the first heat sink 4.

Claims

202413138 Foreign version Fair copy 12 Patent claims 1. Power semiconductor arrangement (2) comprising a first heat sink (4) and a second heat sink (6), wherein the heat sinks (4, 6) each have a flat surface (8), a first side surface (10) and a second side surface (12) arranged opposite the first side surface (10), wherein at least one power semiconductor circuit (24) is connected on each of the surfaces (8) of the heat sinks (4, 6), wherein the first heat sink (4) has a plurality of first fins (16) and the second heat sink (6) has a plurality of second fins (18) and third fins (20), wherein the fins (16, 18, 20) of the respective heat sink (4, 6) are arranged parallel from the first side surface (10) to the second side surface (12) along an airflow direction (22), wherein the second heat sink (6) is arranged downstream of the first heat sink (4) along the airflow direction (22).wherein the second side surface (12) of the first heat sink (4) is directly adjacent to the first side surface (10) of the second heat sink (6) and wherein the number of second fins (18) of the second heat sink (6) is equal to the number of first fins (16) of the first heat sink (4).

2. Power semiconductor arrangement (2) according to claim 1, wherein the first ribs (16) of the first heat sink (4) and the second ribs (18) of the second heat sink (6) are arranged in alignment.

3. Power semiconductor arrangement (2) according to one of claims 1 or 2, wherein the heat sinks (4, 6) touch each other or are spaced apart from each other by a maximum of 1 mm, in particular a maximum of 500 pm.

4. Power semiconductor arrangement (2) according to one of the preceding claims, wherein at least two, in particular at least three, power semiconductor circuits (24) are connected on the surfaces (8) of the respective heat sinks (4, 6), wherein the power semiconductor circuits (24) are arranged along the airflow direction (22).

5. Power semiconductor arrangement (2) according to any one of the preceding claims, 202413138 Foreign version Fair copy 13 wherein at least one power semiconductor circuit (24) of the first heat sink (4) has the same circuit topology as at least one power semiconductor circuit (24) of the second heat sink (6).

6. Power semiconductor arrangement (2) according to one of the preceding claims, wherein the power semiconductor circuits (24) each comprise a substrate (26) which is metallurgically bonded to the surface (8) of the respective heat sink (4, 6).

7. Power semiconductor arrangement (2) according to one of the preceding claims, wherein the second ribs (18) and third ribs (20) of the second heat sink (6) are arranged alternately.

8. Power semiconductor arrangement (2) according to one of the preceding claims, wherein the quotient of a number of fins (18, 20) of the second heat sink (6) to a number of fins (16) of the first heat sink (4) is an integer.

9. Power semiconductor arrangement (2) according to one of the preceding claims, wherein the heat sinks (4, 6) are each monolithic.

10. Power semiconductor arrangement (2) according to claim 9, wherein the heat sinks (4, 6) are each manufactured by means of an extrusion process.

11. Power semiconductor arrangement (2) according to claim 9, wherein the first heat sink (4) is manufactured by means of a die-casting process and the second heat sink (6) is manufactured by means of an extrusion process.

12. Power semiconductor arrangement (2) according to one of the preceding claims, wherein the surface (8) of the first heat sink (4) is arranged flush with the surface (8) of the second heat sink (6), wherein a first length (11) of the first ribs (16) corresponds to a second length (12) of the second and third ribs (18, 20), such that the ribs (16, 18, 20) terminate flush on a side opposite the surfaces (8).

13. Power semiconductor arrangement (2) according to one of the preceding claims, wherein a fan (34) configured as a pressure fan is arranged directly adjacent to the first side surface (10) of the first heat sink (4) or 202413138 Foreign version Fair copy 14 a fan (34) configured as a suction fan is arranged directly adjacent to the second side surface (12) of the second heat sink (6).

14. Power semiconductor arrangement (2) according to one of the preceding claims, wherein at least the ribs (18, 20) of the second heat sink (6) have a profile (32).

15. Power converter (36) comprising at least one power semiconductor arrangement (2) according to one of the preceding claims.

16. Method for manufacturing a power semiconductor arrangement (2) with a first heat sink (4) and a second heat sink (6), wherein the heat sinks (4, 6) each have a flat surface (8), a first side surface (10) and a second side surface (12) arranged opposite the first side surface (10), wherein at least one power semiconductor circuit (24) is connected on the surfaces (8) of the heat sinks (4, 6), wherein the first heat sink (4) has a plurality of first fins (16) and the second heat sink (6) has a plurality of second fins (18) and third fins (20), wherein the fins (16, 18) of the respective heat sink (4, 6) are arranged parallel from the first side surface (10) to the second side surface (12) along an airflow direction (22), wherein the second heat sink (6) is arranged downstream of the first heat sink (4) along the airflow direction (22).wherein the second side surface (12) of the first heat sink (4) is arranged directly adjacent to the first side surface (10) of the second heat sink (6) and wherein the number of second fins (18) of the second heat sink (6) is equal to the number of first fins (16) of the first heat sink (4).

17. Power semiconductor arrangement (2) with a first heat sink (4) and a second heat sink (6), wherein the heat sinks (4, 6) each have a flat surface (8), a first side surface (10) and a second side surface (12) arranged opposite the first side surface (10), wherein at least one power semiconductor circuit (24) is connected on each of the surfaces (8) of the heat sinks (4, 6), wherein the first heat sink (4) and the second heat sink (6) have a plurality of fins (16, 18, 20) which each extend parallel from the first side surface (10) to the 202413138 Foreign version Fair copy 15 second side surface (12) of the respective heat sink (4, 6) are arranged along an airflow direction (22) of a cooling airflow, wherein the second heat sink (6) is arranged along the airflow direction (22) downstream of the first heat sink (4), wherein the second side surface (12) of the first heat sink (4) is directly adjacent to the first side surface (10) of the second heat sink (6), and wherein the fins (16, 18, 20) of the heat sinks (4, 6) each have a contact surface which is in a fluid-technical connection to the cooling airflow, wherein the contact surface of the fins (18, 20) of the second heat sink (6) is larger than the contact surface of the fins (16) of the first heat sink (4).

18. Power semiconductor arrangement (2) according to claim 17, wherein the fins (18, 20) of the second heat sink (6) have a higher air resistance than the fins (16) of the first heat sink (4).

19. Power semiconductor arrangement (2) according to one of claims 17 or 18, wherein at least the ribs (18, 20) of the second heat sink (6) have a profile (32), wherein the profiled ribs (18, 20) have a constant cross-sectional profile along the airflow direction (22).

20. Power semiconductor arrangement (2) according to one of claims 17 to 19, wherein the heat sinks (4, 6) touch each other or are spaced apart from each other by a maximum of 1 mm, in particular a maximum of 500 pm.

21. Power semiconductor arrangement (2) according to one of claims 17 to 20, wherein the first heat sink (4) is manufactured by means of a die casting process and the second heat sink (6) is manufactured by means of an extrusion process.

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