Semiconductor composite device

Abstract

A semiconductor composite device 10 comprises: a load 20 that includes a semiconductor element; an electric power supply 30 that is electrically connected to the load 20; a first capacitor 41 that is electrically connected to a ground GND and to a first node N1 that is between the load 20 and the electric power supply 30; a second capacitor 42 that is electrically connected to the ground GND and to a second node N2 that is between the first node N1 and the electric power supply 30; and a wiring board 60 that has a first mounting surface 61, a second mounting surface 62 that is on the opposite side from the first mounting surface 61, and wiring layers 63 that are electrically connected to the load 20, the electric power supply 30, the first capacitor 41, and the second capacitor 42, wherein the load 20 is disposed on the first mounting surface 61 side, the electric power supply 30 is disposed on the second mounting surface 62 side, and the first capacitor 41 has a smaller capacity and is disposed at a position closer to the load 20 in a thickness direction that is orthogonal to the first mounting surface 61 when compared with the second capacitor 42.

Description

Semiconductor composite equipment

[0001] The present invention relates to a semiconductor composite device.

[0002] Patent Document 1 describes a semiconductor composite device comprising: active elements and passive elements that constitute a voltage regulator and are arranged to correspond to a plurality of channels; a load that includes a semiconductor element and is supplied with a DC voltage regulated by the voltage regulator; and a wiring board that is electrically connected to the active elements, the passive elements, and the load; wherein the active elements that constitute the voltage regulator include switching elements, and the passive elements that constitute the voltage regulator include capacitors; the plurality of capacitors arranged in the channels include a capacitor array that is integrally molded and includes a plurality of capacitor portions arranged in a plane, the capacitor array having a plurality of through-hole conductors that penetrate the capacitor array in a direction perpendicular to the mounting surface of the wiring board; and wherein, as viewed from the mounting surface of the wiring board, at least a portion of the capacitor array is arranged in a position that overlaps the load.

[0003] International Publication No. 2022 / 050167

[0004] In designing the power supply for the entire system, including the load, it is necessary to maintain low impedance over a wide frequency band, but it is difficult to ensure the necessary impedance with only one capacitor.

[0005] The semiconductor composite device described in Patent Document 1 is provided with an output capacitor for each of a plurality of channels. Patent Document 1 also describes that these output capacitors may not only be voltage smoothing capacitors corresponding to the switching frequency of the switching elements, but may also be capacitors for decoupling purposes, such as noise suppression and short-circuiting high frequencies, connected in shunt to the output line for each channel.

[0006] However, Patent Document 1 does not describe how to properly use multiple types of capacitors in order to maintain low impedance over a wide frequency band when multiple types of capacitors are provided, or where each type of capacitor should be provided.

[0007] The present invention has been made to solve the above problems, and has as its object to provide a semiconductor composite device that can ensure low impedance over a wide frequency band.

[0008] The semiconductor composite device of the present invention includes: a load including a semiconductor element; a power supply electrically connected to the load; a first node between the load and the power supply and a first capacitor electrically connected to ground; a second node between the first node and the power supply and a second capacitor electrically connected to ground; a wiring board having a first mounting surface, a second mounting surface opposite to the first mounting surface, and a wiring layer electrically connected to the load, the power supply, the first capacitor, and the second capacitor; the load is disposed on the first mounting surface side, the power supply is disposed on the second mounting surface side, and the first capacitor has a smaller capacitance than the second capacitor and is disposed closer to the load in a thickness direction that is a direction perpendicular to the first mounting surface.

[0009] According to the present invention, it is possible to provide a semiconductor composite device that can ensure low impedance over a wide frequency band.

[0010] FIG. 1 is a block diagram showing a semiconductor composite device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view schematically showing the semiconductor composite device according to the first embodiment of the present invention. FIG. 3 is a plan view schematically showing the semiconductor composite device according to the first embodiment of the present invention. FIG. 4 is a cross-sectional view schematically showing a semiconductor composite device according to a second embodiment of the present invention. FIG. 5 is a cross-sectional view schematically showing a semiconductor composite device according to a third embodiment of the present invention. FIG. 6 is a cross-sectional view schematically showing a semiconductor composite device according to a fourth embodiment of the present invention. FIG. 7 is a cross-sectional view schematically showing a semiconductor composite device according to a fifth embodiment of the present invention. FIG. 8 is a cross-sectional view schematically showing an example of a thin-film capacitor having a trench structure that can be used as the first capacitor and / or the second capacitor. FIG. 9 is a cross-sectional view schematically showing an example of an electrolytic capacitor that can be used as the first capacitor and / or the second capacitor. FIG. 10 is a cross-sectional view schematically showing an example of an anode through-hole electrically connected to the anode of the capacitor unit shown in FIG. 9 and its periphery. FIG. 11 is a cross-sectional view schematically showing an example of a cathode through-hole electrically connected to the cathode of the capacitor unit shown in FIG. 9 and its periphery.

[0011] The semiconductor composite device of the present invention will be described below. Note that the present invention is not limited to the following configuration, and may be modified as appropriate within the scope of the present invention. Furthermore, a combination of multiple individual preferred configurations described below also constitutes the present invention.

[0012] The following embodiments are merely examples, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. From the second embodiment onwards, descriptions of matters common to the first embodiment will be omitted, and differences will be mainly described. In particular, similar effects resulting from similar configurations will not be mentioned one after the other for each embodiment.

[0013] In the following description, when there is no need to particularly distinguish between the embodiments, they will simply be referred to as the "composite semiconductor device of the present invention."

[0014] In this specification, terms indicating the relationship between elements (e.g., "perpendicular," "parallel," "orthogonal," etc.) and terms indicating the shape of elements are not expressions that only express a strict meaning, but are expressions that also include a range of substantial equivalence, for example, a difference of about a few percent.

[0015] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, scale, etc. may differ from those of the actual product.

[0016] First Embodiment FIG. 1 is a block diagram showing a semiconductor composite apparatus according to a first embodiment of the present invention.

[0017] As shown in FIG. 1 , the semiconductor composite device 10 according to the first embodiment includes a load 20, a power supply 30 electrically connected to the load 20, a first node N1 between the load 20 and the power supply 30, a first capacitor 41 electrically connected to ground GND, a second node N2 between the first node N1 and the power supply 30, a second capacitor 42 electrically connected to ground GND, and an inductor 50 electrically connected between the second node N2 and the power supply 30.

[0018] The load 20 includes a semiconductor element (not shown), and may be, for example, a semiconductor integrated circuit (IC) such as a logic operation circuit or a memory circuit.

[0019] The power supply 30 is a component that adjusts the DC voltage supplied from an external source to a predetermined voltage level suitable for the load 20, and is configured by a semiconductor integrated circuit (IC) that includes a switching element such as a semiconductor switching element and a control circuit that controls the switching element. Examples of the control circuit include an error amplifier that detects the difference between a reference voltage and an output voltage, a gate driver that drives the switching element, and an oscillation circuit that oscillates at a switching frequency.

[0020] The power supply 30, the inductor 50, the first capacitor 41, and the second capacitor 42 form a voltage control device (voltage regulator (VR)), in particular a chopper-type step-down switching regulator. The inductor 50, the first capacitor 41, and the second capacitor 42 function as a ripple filter for the step-down switching regulator. For example, the switching regulator steps down a DC voltage of 5 V input from an external source to 1 V and supplies the voltage to the load 20.

[0021] For the sake of simplicity, the first capacitor 41 and the second capacitor 42 shown here are only voltage smoothing capacitors (output capacitors) corresponding to the switching frequency of the switching elements, but they may also include capacitors for decoupling purposes, such as noise suppression or short-circuiting high frequencies, that are shunt-connected to the output line, and these may be connected in parallel.

[0022] The passive elements that make up the voltage regulator need only include at least the first capacitor 41 and the second capacitor 42, and do not necessarily need to include the inductor 50.

[0023] FIG. 2 is a cross-sectional view schematically showing the semiconductor composite device according to the first embodiment of the present invention.

[0024] As shown in FIG. 2, the semiconductor composite device 10 according to the first embodiment further includes a wiring board 60 in addition to a load 20, a power supply 30, a first capacitor 41, a second capacitor 42, and an inductor (not shown in FIG. 2).

[0025] The wiring board 60 is a motherboard having a first mounting surface 61 and a second mounting surface 62 opposite to the first mounting surface 61, and the load 20 is disposed on the first mounting surface 61 side, and the power supply 30 is disposed on the second mounting surface 62 side. Here, the load 20 is mounted on the first mounting surface 61, and the power supply 30 is mounted on the second mounting surface 62.

[0026] The first mounting surface 61 and the second mounting surface 62 each have a wiring layer 63 formed thereon, which includes terminals such as lands and pads for mounting components such as the load 20, the power supply 30, and the inductor, as well as wiring for connecting them. The wiring layer 63 is provided on both sides of a core substrate (core layer) 64 including, for example, glass cloth, and the first capacitor 41 and the second capacitor 42 are embedded in cavities that penetrate the core substrate 64. The wiring substrate 60 also has a plurality of through holes (not shown) that penetrate the core substrate 64. The load 20, the power supply 30, the first capacitor 41, the second capacitor 42, and the inductor are electrically connected to each other via the wiring layer 63 and the through holes.

[0027] Each through hole may be provided within the placement area of ​​the first capacitor 41 and / or the second capacitor 42 so as to penetrate the capacitor, or may be provided outside the placement area of ​​the first capacitor 41 or the second capacitor 42 in the in-plane direction.

[0028] The first capacitor 41 and the second capacitor 42 are arranged such that the position of the first capacitor 41 in the thickness direction is closer to the load than the position of the second capacitor 42 in the thickness direction. The first capacitor 41 and the second capacitor 42 are arranged in this order from the first mounting surface 61 side to the second mounting surface 62 side, and at least a portion of the first capacitor 41 is arranged in a position overlapping at least a portion of the second capacitor 42.

[0029] Each of the wiring layers 63 may be formed from a single circuit layer or multiple circuit layers.

[0030] In addition, in addition to the load 20, the power supply 30, and the inductor, electronic devices such as a decoupling capacitor for noise prevention, a choke inductor, a diode element for surge protection, and a resistor element for voltage division may be mounted on the first mounting surface 61 and / or the second mounting surface 62 of the wiring board 60.

[0031] In this specification, the direction perpendicular to the first mounting surface 61 is referred to as the thickness direction, and the direction parallel to the first mounting surface 61 is referred to as the in-plane direction.

[0032] In the semiconductor composite device 10 according to the first embodiment, the first capacitor 41 has a smaller capacitance than the second capacitor 42 and is disposed closer to the load 20 in the thickness direction. Therefore, the two types of capacitors 41 and 42 can ensure low impedance over a wide frequency band.

[0033] More specifically, generally, the closer to the load, the more densely the wiring and through-holes are arranged, and the more limited the space available for arranging a capacitor becomes, but in the semiconductor composite device 10, by arranging the first capacitor 41 with a smaller capacitance in a position closer to the load 20, it is possible to efficiently arrange the capacitor near the load 20. This is because a capacitor with excellent space-saving properties can be used as the first capacitor 41 with a smaller capacitance.

[0034] Furthermore, the first capacitor 41 has a smaller capacitance than the second capacitor 42 and can therefore reduce the impedance on the high frequency side, but by arranging the first capacitor 41 closer to the load 20, the length of the wiring between the first capacitor 41 and the load 20 is shortened, and the inductance L of that wiring is reduced. Therefore, the impedance on the high frequency side where the inductance component is dominant can be more effectively reduced (shifted to the high frequency side).

[0035] On the other hand, since the second capacitor 42 has a larger capacitance, it is preferable that the second capacitor 42 be a capacitor that is less space-saving than the first capacitor 41. However, the further away from the load 20, the more space there is to place a capacitor, so it is possible to secure sufficient space for the second capacitor 42, which has a larger capacitance. Furthermore, since the second capacitor 42 has a larger capacitance than the first capacitor 41, it is possible to more effectively reduce (shift to a lower frequency side) the impedance on the lower frequency side where the capacitance component becomes dominant.

[0036] As described above, the impedance can be effectively reduced over a wide frequency band from the low frequency side to the high frequency side, and therefore low impedance can be ensured over a wide frequency band.

[0037] Furthermore, in the semiconductor composite device 10, the first capacitor 41 and the second capacitor 42 are built into the wiring board 60, which allows for a reduction in size in the thickness direction of the semiconductor composite device 10. Furthermore, the power supply 30 can be disposed directly below the load 20 and connected to the load 20 by wiring over the shortest distance, which allows for power savings. Furthermore, the first capacitor 41 and the second capacitor 42 between the power supply 30 and the load 20 can be connected to each other over the shortest distance, which not only allows for a reduction in size but also enables suppression of wiring impedance (improved performance).

[0038] FIG. 3 is a plan view schematically showing the semiconductor composite device according to the first embodiment of the present invention.

[0039] 2 and 3 , when viewed from the first mounting surface 61 of the wiring board 60, it is preferable that at least a portion of the first capacitor 41 and at least a portion of the second capacitor 42 are disposed in positions that overlap the load 20. This allows the semiconductor composite device 10 to be miniaturized in the in-plane direction. Furthermore, similar to the case where the first capacitor 41 and the second capacitor 42 are built into the wiring board 60, this also leads to power savings and improved performance.

[0040] In the example shown in FIGS. 2 and 3, the load 20 is disposed in a position where the entire load 20 overlaps with the first capacitor 41 and the second capacitor 42 when viewed from the first mounting surface 61 of the wiring board 60.

[0041] 2 and 3 , when viewed from the first mounting surface 61 of the wiring board 60, it is preferable that at least a portion of the first capacitor 41 and at least a portion of the second capacitor 42 are disposed in positions that overlap the power supply 30. This also makes it possible to reduce the size of the semiconductor composite device 10 in the in-plane direction. Furthermore, similar to the case where the first capacitor 41 and the second capacitor 42 are built into the wiring board 60, this also leads to power savings and improved performance.

[0042] In the example shown in FIGS. 2 and 3, when viewed from the first mounting surface 61 of the wiring board 60, the power supply 30 is disposed in a position where it entirely overlaps with the first capacitor 41 and the second capacitor 42, respectively.

[0043] The first capacitor 41 may have a larger capacitance per unit area than the second capacitor 42, but it is preferable that the first capacitor 41 has a smaller capacitance per unit area than the second capacitor 42. This allows a capacitor with better space-saving properties to be used as the first capacitor 41.

[0044] The "capacitance per unit area" refers to the capacitance per unit area of ​​a capacitor in the in-plane direction (capacitance density), and is the value obtained by dividing the capacitance of the capacitor by the area of ​​the capacitor in the in-plane direction. As will be described later, in the case of a capacitor array, the capacitance and area of ​​the capacitor are the total capacitance and total area of ​​all capacitor parts included in the capacitor array.

[0045] The first capacitor 41 and the second capacitor 42 are each composed of only a single type of capacitor. The specific types of the first capacitor 41 and the second capacitor 42 are not particularly limited, but a thin film capacitor having a trench structure is suitable for the first capacitor 41, and an electrolytic capacitor is suitable for the second capacitor 42. A solid electrolytic capacitor is suitable for the electrolytic capacitor.

[0046] More specific combinations of the first capacitor 41 and the second capacitor 42 include, for example, combinations 1 to 6 shown in Table 1 below.

[0047]

[0048] As the ceramic capacitor, for example, a ceramic capacitor using barium titanate can be used. As the thin film capacitor, for example, a ceramic capacitor using silicon nitride (SiN), silicon dioxide (SiO ２ ), hydrogen fluoride (HF), etc. The electrolytic capacitor is preferably an electrolytic capacitor having a base material of a metal such as aluminum, and more preferably an electrolytic capacitor having a base material of aluminum or an aluminum alloy (aluminum electrolytic capacitor).

[0049] Specifically, for example, the capacitance per unit area of ​​the first capacitor 41 is 0.1 to 4 μF / mm ２ The second capacitor 42 may be a thin film capacitor having a trench structure in which the capacitance per unit area is 1 to 10 μF / mm ２ The aluminum electrolytic capacitor may be

[0050] At least one of the first capacitor 41 and the second capacitor 42 may be a multi-terminal capacitor. A multi-terminal capacitor refers to a capacitor having a total of three or more external connection terminals.

[0051] Here, the multi-terminal capacitor may include a capacitor array. A capacitor array includes a plurality of capacitor elements arranged in an in-plane direction (planar arrangement), and the plurality of capacitor elements are connected to each other. The plurality of capacitor elements are preferably integrally molded.

[0052] The capacitor array preferably includes a plurality of capacitor sections formed by dividing a capacitor sheet made of a single aluminum element, which allows for greater flexibility in the arrangement of the capacitor sections, thereby achieving greater benefits in terms of miniaturizing the semiconductor composite device 10.

[0053] The first capacitor 41 and the second capacitor 42 may have substantially the same size (see FIG. 3 ) or may have different sizes. More specifically, the area of ​​the second capacitor 42 in the in-plane direction and the area of ​​the first capacitor 41 in the in-plane direction may be substantially the same or may have different sizes.

[0054] The number of capacitor elements constituting the first capacitor 41 and the second capacitor 42 is not particularly limited as long as it is one or more, and the number of capacitor elements constituting the first capacitor 41 may be the same as or different from the number of capacitor elements constituting the second capacitor 42.

[0055] Second Embodiment FIG. 4 is a cross-sectional view schematically showing a semiconductor composite device according to a second embodiment of the present invention.

[0056] 4 , the semiconductor composite device 10A according to the second embodiment includes a semiconductor package 22 including a load 20 and a semiconductor package substrate 21 on which the load 20 is mounted, and a first capacitor 41 is built into the semiconductor package substrate 21. The first capacitor 41 built into the semiconductor package substrate 21 is disposed at a position overlapping the load 20. The semiconductor package substrate 21 is mounted on a first mounting surface 61 of a wiring substrate 60.

[0057] The semiconductor composite apparatus 10A also includes a power supply module 32 including a power supply 30 and a power supply module substrate 31 on which the power supply 30 is mounted, and a second capacitor 42 is built into the power supply module substrate 31. The second capacitor 42 built into the power supply module substrate 31 is disposed in a position overlapping the power supply 30. The power supply module substrate 31 is mounted on a second mounting surface 62 of a wiring substrate 60.

[0058] Third Embodiment FIG. 5 is a cross-sectional view schematically showing a semiconductor composite device according to a third embodiment of the present invention.

[0059] 5 , a semiconductor composite device 10B according to the third embodiment includes a semiconductor package 22 including a load 20 and a semiconductor package substrate 21 on which the load 20 is mounted, and a first capacitor 41 and a second capacitor 42 are built into the semiconductor package substrate 21. The first capacitor 41 and the second capacitor 42 are arranged in this order from the load 20 side to the wiring substrate 60 side. The first capacitor 41 and the second capacitor 42 built into the semiconductor package substrate 21 are each arranged at a position overlapping the load 20. The semiconductor package substrate 21 is mounted on a first mounting surface 61 of the wiring substrate 60.

[0060] The semiconductor composite device 10B also includes a power supply module 32 including a power supply 30 and a power supply module substrate 31 on which the power supply 30 is mounted. The power supply module substrate 31 does not necessarily have to include the first capacitor 41 and the second capacitor 42. The power supply module substrate 31 is mounted on a second mounting surface 62 of a wiring substrate 60.

[0061] Fourth Embodiment FIG. 6 is a cross-sectional view schematically showing a semiconductor composite device according to a fourth embodiment of the present invention.

[0062] As shown in Figure 6, the semiconductor composite device 10C of the fourth embodiment has one or more discrete capacitors 43 as the first capacitor 41, and a capacitor array 44 as the second capacitor 42, and both the discrete capacitors 43 and the capacitor array 44 are built into the wiring board 60.

[0063] The area of ​​the second capacitor 42 in the in-plane direction (the total area of ​​the capacitor array 44 in the in-plane direction) may be larger than the area of ​​the first capacitor 41 in the in-plane direction (the total area of ​​the discrete capacitors 43 in the in-plane direction and the area of ​​each discrete capacitor 43 in the in-plane direction).

[0064] The number of capacitor elements, i.e., the discrete capacitors 43 included in the first capacitor 41 may be greater than the number of capacitor elements included in the second capacitor 42 (capacitor array 44).

[0065] It should be noted that the plurality of capacitor sections included in the capacitor array 44 do not individually constitute a capacitor element, but together constitute one capacitor element.

[0066] Fifth Embodiment FIG. 7 is a cross-sectional view schematically showing a semiconductor composite device according to a fifth embodiment of the present invention.

[0067] 7 , in a semiconductor composite device 10D according to the fifth embodiment, a first capacitor 41 and a second capacitor 42 are integrated to form a single component (an integrated passive device (IPD)) 40, and the single component 40 is built into a wiring substrate 60. For example, the first capacitor 41 may be a capacitor array 45, and the second capacitor 42 may be one or more discrete capacitors 46.

[0068] FIG. 8 is a cross-sectional view schematically showing an example of a thin film capacitor having a trench structure that can be used as the first capacitor and / or the second capacitor.

[0069] The thin-film capacitor 101 shown in FIG. 8 includes a semiconductor substrate 110. A plurality of trenches 111 are formed in one main surface of the semiconductor substrate 110, forming a recessed and raised structure (deep trench structure). A lower electrode 121, a dielectric film 122, and an upper electrode 123 are formed in this order to cover the trenches 111 of the semiconductor substrate 110. The lower electrode 121, the dielectric film 122, and the upper electrode 123 form a capacitor section 120. A protective layer 130 is formed to cover the capacitor section 120. The protective layer 130 has an opening 131A that exposes the upper electrode 123 and an opening 131B that exposes the lower electrode 121. External connection terminals 140A and 140B are formed on the protective layer 130 so as to be embedded in the openings 131A and 131B of the protective layer 130, respectively. The external connection terminal 140A is connected to the upper electrode 123, and the external connection terminal 140B is connected to the lower electrode 121.

[0070] The semiconductor substrate 110 is preferably a Si substrate made of a Si (silicon)-based material. For example, the Si substrate is preferably made of conductive n-type Si or p-type Si. When the Si substrate is conductive, the Si substrate can also function as a back electrode.

[0071] Examples of materials that can be used to form the lower electrode 121 include metals such as Cu, Ag, Au, Al, Ni, Cr, and Ti, and conductors that contain these metals.

[0072] The dielectric film 122 may be made of a material such as SiO, Al ２ O ３ , HfO ２ , Ta ２ O ５ , ZrO ２ oxides such as Si ３ N ４ Examples of suitable materials include nitrides such as silicon dioxide and silicon dioxide, and other materials having dielectric or insulating properties.

[0073] The material for forming the upper electrode 123 can be preferably the same as the material for forming the lower electrode 121 .

[0074] The protective layer 130 is made of SiO ２ The material is preferably a film, an epoxy resin, a polyimide resin, or the like.

[0075] The external connection terminals 140A and 140B can be produced by forming a seed layer of Ti / W, Ti / Cu, Ti / Al, or the like, and then forming a plating layer of Au, Cu, Sn, or the like on the seed layer.

[0076] FIG. 9 is a cross-sectional view schematically showing an example of an electrolytic capacitor that can be used as the first capacitor and / or the second capacitor.

[0077] 9 is a capacitor array having a plurality of capacitor sections 210 arranged in an in-plane direction (planar arrangement). The electrolytic capacitor 201 is also a multi-terminal capacitor having a plurality of through-holes 220 each penetrating one of the capacitor sections 210 and external connection terminals 230 connected to one end and the other end of each through-hole 220.

[0078] Fig. 10 is a cross-sectional view showing an example of an anode through-hole electrically connected to the anode of the capacitor unit shown in Fig. 9 and its periphery. Fig. 11 is a cross-sectional view showing an example of a cathode through-hole electrically connected to the cathode of the capacitor unit shown in Fig. 9 and its periphery.

[0079] 10 and 11 includes an anode plate 251 having porous layers 253 on both main surfaces of a core 252, a dielectric layer (not shown) provided on the surface of the porous layer 253, and a cathode layer 254 provided on the surface of the dielectric layer. This configuration makes the capacitor 210 an electrolytic capacitor. When the cathode layer 254 includes a solid electrolyte layer 254A, the capacitor 210 becomes a solid electrolytic capacitor.

[0080] The anode plate 251 is preferably in the form of a flat plate, and more preferably in the form of a foil. Thus, in this specification, "plate-like" also includes "foil-like". The anode plate 251 is preferably made of a metal, and particularly preferably made of a valve metal. Examples of valve metals include simple metals such as aluminum, tantalum, niobium, titanium, and zirconium, and alloys containing at least one of these simple metals. Of these, aluminum or an aluminum alloy is preferred.

[0081] The dielectric layer is provided on the surface of the porous layer 253. More specifically, the dielectric layer is provided along the surface (outline) of each hole present in the porous layer 253. The dielectric layer is preferably made of an oxide film of the above-mentioned valve metal.

[0082] The cathode layer 254 is provided on the surface of the dielectric layer. As shown in Figures 10 and 11, the cathode layer 254 preferably has a solid electrolyte layer 254A provided on the surface of the dielectric layer and a conductor layer 254B provided on the surface of the solid electrolyte layer 254A.

[0083] Examples of materials constituting the solid electrolyte layer 254A include conductive polymers such as polypyrroles, polythiophenes, and polyanilines. Among these, polythiophenes are preferred, and poly(3,4-ethylenedioxythiophene) (PEDOT) is particularly preferred. The conductive polymer may also contain a dopant such as polystyrene sulfonate (PSS).

[0084] The conductor layer 254B may include, for example, a carbon layer provided on the surface of the solid electrolyte layer 254A and a copper layer provided on the surface of the carbon layer.

[0085] The capacitor section 210 shown in Figures 10 and 11 is provided with an insulating layer 260 that seals the capacitor section 210, an anode through-hole 220A, an anode external connection terminal 230A, a cathode through-hole 220B, and a cathode external connection terminal 230B.

[0086] The insulating layer 260 is provided on the surface of the capacitor section 210. Examples of materials that can be used to form the insulating layer 260 include resin materials such as epoxy, phenol, and polyimide, and mixtures of resin materials such as epoxy, phenol, and polyimide with inorganic fillers such as silica and alumina.

[0087] Anode through-hole 220A is made of a low-resistance metal such as copper, gold, or silver, and is directly connected to the end face of anode plate 251 in the in-plane direction over its entire periphery, thereby electrically connecting to anode plate 251. The center of anode through-hole 220A may be a resin-filled portion made of a material containing resin.

[0088] The anode external connection terminals 230A are made of a low-resistance metal such as copper, gold, or silver, and are provided at one and the other ends of the anode through-hole 220A in the thickness direction.

[0089] Cathode through-hole 220B is made of a low-resistance metal such as copper, gold, or silver, and is electrically connected to cathode layer 254. The center of cathode through-hole 220B may be a resin-filled portion made of a material containing resin.

[0090] The cathode external connection terminals 230B are made of a low-resistance metal such as copper, gold, or silver, and are provided at one and the other ends of the cathode through-hole 220B in the thickness direction.

[0091] 11 , via conductor 270 is provided to penetrate insulating layer 260 in the thickness direction and connect to cathode external connection terminal 230B and cathode layer 254. Therefore, in the example shown in Fig. 11 , cathode through-hole 220B is electrically connected to cathode layer 254 via cathode external connection terminal 230B and via conductor 270.

[0092] In the above embodiment, an example has been described in which the semiconductor composite device of the present invention is applied to a chopper-type step-down switching regulator. However, the features of each embodiment can also be applied to other semiconductor composite devices that systematize power transmission lines including step-up / step-down circuits.

[0093] In the above embodiment, an example has been described in which a single-phase power supply having one power supply circuit is configured using the semiconductor composite device of the present invention, but a multi-phase power supply having a plurality of power supply circuits connected in parallel may also be configured. For example, a plurality of inductors 50 may be connected in parallel to the second node N2, and a switching element may be connected to each inductor 50.

[0094] In the semiconductor composite device of the present invention, the first capacitor and / or the second capacitor may be used as an interposer for a load, an inductor, or a power supply.

[0095] The present specification discloses the following:

[0096] <1> A semiconductor composite device comprising: a load including a semiconductor element; a power supply electrically connected to the load; a first capacitor electrically connected to a first node between the load and the power supply and to ground; a second capacitor electrically connected to a second node between the first node and the power supply and to ground; and a wiring substrate having a first mounting surface, a second mounting surface opposite the first mounting surface, and a wiring layer electrically connected to the load, the power supply, the first capacitor, and the second capacitor, wherein the load is disposed on the first mounting surface side, the power supply is disposed on the second mounting surface side, and the first capacitor has a smaller capacitance than the second capacitor and is disposed closer to the load in a thickness direction that is a direction perpendicular to the first mounting surface.

[0097] <2> The semiconductor composite device described in <1>, wherein, when viewed from the first mounting surface of the wiring board, at least a portion of the first capacitor and at least a portion of the second capacitor are each arranged in a position overlapping the load.

[0098] <3> The semiconductor composite device according to <1> or <2>, wherein the first capacitor has a smaller capacitance per unit area than the second capacitor.

[0099] <4> The semiconductor composite device according to <1> or <2>, wherein the first capacitor has a larger capacitance per unit area than the second capacitor.

[0100] <5> The semiconductor composite device according to any one of <1> to <4>, wherein the first capacitor is a thin-film capacitor having a trench structure.

[0101] <6> The semiconductor composite device according to any one of <1> to <5>, wherein the second capacitor is an electrolytic capacitor.

[0102] <7> The semiconductor composite device according to any one of <1> to <6>, wherein at least one of the first capacitor and the second capacitor is a multi-terminal capacitor.

[0103] <8> The semiconductor composite device according to <7>, wherein the multi-terminal capacitor includes a capacitor array.

[0104] <9> The semiconductor composite device according to any one of <1> to <8>, wherein the first capacitor and the second capacitor are built into the wiring substrate.

[0105] <10> The semiconductor composite device according to any one of <1> to <9>, wherein an area of ​​the second capacitor in an in-plane direction parallel to the first mounting surface is larger than an area of ​​the first capacitor in the in-plane direction.

[0106] <11> The semiconductor composite device according to any one of <1> to <10>, wherein the number of capacitor elements included in the first capacitor is greater than the number of capacitor elements included in the second capacitor.

[0107] 10, 10A, 10B, 10C, 10D Semiconductor composite device 20 Load 21 Semiconductor package substrate 22 Semiconductor package 30 Power supply 31 Power supply module substrate 32 Power supply module 40 Single component 41 First capacitor 42 Second capacitor 43, 46 Discrete capacitor 44, 45 Capacitor array 50 Inductor 60 Wiring substrate 61 First mounting surface 62 Second mounting surface 63 Wiring layer 64 Core substrate (core layer) 101 Thin film capacitor 110 Semiconductor substrate 111 Trench 120, 210 Capacitor section 121 Lower electrode 122 Dielectric film 123 Upper electrode 130 Protective layer 131A, 131B Opening 140A, 140B External connection terminal 201 Electrolytic capacitor 220 Through hole 220A Anode through hole 220B Cathode through hole 230 External connection terminal 230A Anode external connection terminal 230B Cathode external connection terminal 251 Anode plate 252 Core 253 Porous layer 254 Cathode layer 254A Solid electrolyte layer 254B Conductor layer 260 Insulating layer 270 Via conductor N1 First node N2 Second node GND Ground

Claims

1. A semiconductor composite device comprising: a load including a semiconductor element; a power supply electrically connected to the load; a first capacitor electrically connected to a first node between the load and the power supply and to ground; a second capacitor electrically connected to a second node between the first node and the power supply and to ground; and a wiring board having a first mounting surface, a second mounting surface opposite the first mounting surface, and a wiring layer electrically connected to the load, the power supply, the first capacitor, and the second capacitor, wherein the load is arranged on the first mounting surface side, the power supply is arranged on the second mounting surface side, and the first capacitor has a smaller capacitance than the second capacitor and is arranged closer to the load in a thickness direction that is perpendicular to the first mounting surface.

2. The semiconductor composite device according to claim 1, wherein at least a portion of the first capacitor and at least a portion of the second capacitor are each positioned so as to overlap the load when viewed from the first mounting surface of the wiring board.

3. The semiconductor composite device according to claim 1 or 2, wherein the first capacitor has a smaller capacitance per unit area than the second capacitor.

4. The semiconductor composite device according to claim 1 or 2, wherein the first capacitor has a larger capacitance per unit area than the second capacitor.

5. The semiconductor composite device according to any one of claims 1 to 4, wherein the first capacitor is a thin film capacitor having a trench structure.

6. The semiconductor composite device according to any one of claims 1 to 5, wherein the second capacitor is an electrolytic capacitor.

7. The semiconductor composite device according to any one of claims 1 to 6, wherein at least one of the first capacitor and the second capacitor is a multi-terminal capacitor.

8. The semiconductor composite device according to claim 7, wherein the multi-terminal capacitor includes a capacitor array.

9. The semiconductor composite device according to any one of claims 1 to 8, wherein the first capacitor and the second capacitor are built into the wiring substrate.

10. A semiconductor composite device according to any one of claims 1 to 9, wherein the area of ​​the second capacitor in an in-plane direction parallel to the first mounting surface is larger than the area of ​​the first capacitor in the in-plane direction.

11. The semiconductor composite device according to any one of claims 1 to 10, wherein the number of capacitor elements included in the first capacitor is greater than the number of capacitor elements included in the second capacitor.

Images