Printed circuit board assembly and electronic device comprising same

A multi-layered printed circuit board assembly with interposers and fine pitch connections addresses connectivity challenges, enhancing electronic device performance by reducing interference and complexity.

WO2026038792A1PCT designated stage Publication Date: 2026-02-19SAMSUNG ELECTRONICS CO LTD
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Patent Information

Application Number
PCT/KR2025/011852
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-09-26
Filing Date
2025-08-06
Publication Date
2026-02-19

AI Technical Summary

Technical Problem

Existing printed circuit board assemblies in electronic devices face challenges in efficiently connecting multiple circuit boards with fine pitch requirements, leading to potential signal interference and increased complexity.

Method used

A multi-layered printed circuit board assembly is introduced, utilizing interposers with conductive via pillars to connect multiple circuit boards with pitches of 0.35 mm or less, ensuring precise alignment and reduced signal interference.

Benefits of technology

The solution enhances connectivity and reduces signal interference, improving the efficiency and reliability of electronic device performance by allowing for more compact and integrated circuit board configurations.

✦ Generated by Eureka AI based on patent content.

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    Figure KR2025011852_19022026_PF_FP_ABST
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Abstract

This electronic device may comprise a first printed circuit board, a first interposer, a second interposer, and a second printed circuit board. The first printed circuit board and the second printed circuit board can be electrically connected through the first interposer and the second interposer. The first printed circuit board can include a plurality of conductive pads spaced apart from each other. The first interposer can include a plurality of conductive via pillars aligned on the respective conductive pads of the first printed circuit board. A first conductive via pillar of the plurality of conductive via pillars of the first interposer can include a first conductive pad electrically connected to a first conductive pad from among the plurality of conductive pads of the first printed circuit board. A second conductive via pillar of the plurality of conductive via pillars of the first interposer can include a second conductive pad electrically connected to a second conductive pad from among the plurality of conductive pads of the first printed circuit board.
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Description

Printed circuit board assembly and electronic device including same

[0001] The present disclosure relates to a printed circuit board assembly and an electronic device including the same.

[0002] Electronic devices such as smartphones may include a printed circuit board assembly on which various components are mounted. The printed circuit board assembly may include a plurality of printed circuit boards and an interposer that interconnects them.

[0003] The above information may be provided as background art to aid in understanding the present disclosure. No claim or determination is made as to whether any of the above is applicable as prior art in connection with the present disclosure.

[0004] In one embodiment, an electronic device may include a first printed circuit board, a first interposer disposed on the first printed circuit board, a second interposer disposed on the first interposer, and a second printed circuit board disposed on the second interposer. The first printed circuit board and the second printed circuit board may be electrically connected through the first interposer and the second interposer. The first printed circuit board may include a plurality of conductive pads spaced apart from each other. The first interposer may include a plurality of conductive via pillars respectively aligned with the plurality of conductive pads of the first printed circuit board. A first conductive via pillar of the plurality of conductive via pillars of the first interposer may include a first conductive pad electrically connected to a first conductive pad of the plurality of conductive pads of the first printed circuit board. The second conductive via pillar of the plurality of conductive via pillars of the first interposer may include a second conductive pad electrically connected to a second conductive pad among the plurality of conductive pads of the first printed circuit board. A pitch between the first conductive pad of the first interposer and the second conductive pad of the first interposer may be 0.35 mm or less.

[0005] In one embodiment, a printed circuit board assembly may include a first printed circuit board, a first interposer disposed on the first printed circuit board, a second interposer disposed on the first interposer, and a second printed circuit board disposed on the second interposer. The first printed circuit board may include a first plurality of conductive pads facing in the direction of the first interposer and spaced apart from each other. The first interposer may include a first plurality of conductive via posts, each aligned with the first plurality of conductive pads of the first printed circuit board. The second printed circuit board may include a second plurality of conductive pads facing in the direction of the second interposer, spaced apart from each other, and aligned with the first plurality of conductive pads of the first printed circuit board. The second interposer may include a second plurality of conductive via posts, each aligned with the second plurality of conductive pads of the second printed circuit board. The first plurality of conductive pads of the first printed circuit board may be electrically connected to the second plurality of conductive pads of the second printed circuit board via the first plurality of conductive via pillars of the first interposer and the second plurality of conductive via pillars of the second interposer. Pitches between the first plurality of conductive via pillars of the first interposer may be 0.35 mm or less. Pitches between the second plurality of conductive via pillars of the second interposer may be 0.35 mm or less.

[0006] FIG. 1 is a block diagram of an electronic device within a network environment according to various embodiments.

[0007] FIG. 2A is a diagram illustrating an exemplary electronic device according to one embodiment.

[0008] FIG. 2b is an exploded perspective view of an exemplary electronic device according to one embodiment.

[0009] FIG. 3 illustrates a printed circuit assembly according to one embodiment.

[0010] FIG. 4 illustrates a printed circuit board assembly according to one embodiment.

[0011] FIG. 5 is a drawing showing an interposer according to one embodiment.

[0012] FIGS. 6A and 6B are drawings showing interposers according to one embodiment.

[0013] FIGS. 7A and 7B are drawings showing interposers according to one embodiment.

[0014] FIG. 8 and FIG. 9 are drawings showing a method of combining a first interposer and a second interposer according to one embodiment.

[0015] FIG. 1 is a block diagram of an electronic device (101) within a network environment (100) according to various embodiments.

[0016] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) via a first network (198) (e.g., a short-range wireless communication network), or may communicate with at least one of an electronic device (104) or a server (108) via a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) via the server (108). According to one embodiment, the electronic device (101) may include a processor (120), a memory (130), an input module (150), an audio output module (155), a display module (160), an audio module (170), a sensor module (176), an interface (177), a connection terminal (178), a haptic module (179), a camera module (180), a power management module (188), a battery (189), a communication module (190), a subscriber identification module (196), or an antenna module (197). In some embodiments, the electronic device (101) may omit at least one of these components (e.g., the connection terminal (178)), or may have one or more other components added. In some embodiments, some of these components (e.g., the sensor module (176), the camera module (180), or the antenna module (197)) may be integrated into one component (e.g., the display module (160)).

[0017] The processor (120) may control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) by executing, for example, software (e.g., a program (140)), and may perform various data processing or calculations. According to one embodiment, as at least a part of the data processing or calculation, the processor (120) may store a command or data received from another component (e.g., a sensor module (176) or a communication module (190)) in a volatile memory (132), process the command or data stored in the volatile memory (132), and store the resulting data in a non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or a secondary processor (123) (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor) that can operate independently or together therewith. For example, if the electronic device (101) includes a main processor (121) and a secondary processor (123), the secondary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a specified function. The secondary processor (123) may be implemented separately from the main processor (121) or as a part thereof.

[0018] The auxiliary processor (123) may control at least a part of functions or states associated with at least one component (e.g., a display module (160), a sensor module (176), or a communication module (190)) of the electronic device (101), for example, on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. In one embodiment, the auxiliary processor (123) (e.g., an image signal processor or a communication processor) may be implemented as a part of another functionally related component (e.g., a camera module (180) or a communication module (190)). In one embodiment, the auxiliary processor (123) (e.g., a neural network processing unit) may include a hardware structure specialized for processing artificial intelligence models. The artificial intelligence models may be generated through machine learning. This learning can be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or can be performed through a separate server (e.g., server (108)). The learning algorithm can include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model can include multiple artificial neural network layers.The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to, or alternatively to, a hardware structure, an artificial intelligence model may include a software structure.

[0019] The memory (130) can store various data used by at least one component (e.g., processor (120) or sensor module (176)) of the electronic device (101). The data can include, for example, software (e.g., program (140)) and input data or output data for commands related thereto. The memory (130) can include volatile memory (132) or non-volatile memory (134).

[0020] The program (140) may be stored as software in the memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0021] The input module (150) can receive commands or data to be used in a component of the electronic device (101) (e.g., a processor (120)) from an external source (e.g., a user) of the electronic device (101). The input module (150) can include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0022] The audio output module (155) can output audio signals to the outside of the electronic device (101). The audio output module (155) can include, for example, a speaker or a receiver. The speaker can be used for general purposes, such as multimedia playback or recording playback. The receiver can be used to receive incoming calls. According to one embodiment, the receiver can be implemented separately from the speaker or as part of the speaker.

[0023] The display module (160) can visually provide information to an external party (e.g., a user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling the device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of a force generated by the touch.

[0024] The audio module (170) can convert sound into an electrical signal, or vice versa, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150), output sound through the sound output module (155), or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphone) directly or wirelessly connected to the electronic device (101).

[0025] The sensor module (176) can detect the operating status (e.g., power or temperature) of the electronic device (101) or the external environmental status (e.g., user status) and generate an electrical signal or data value corresponding to the detected status. According to one embodiment, the sensor module (176) can include, for example, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0026] The interface (177) may support one or more designated protocols that may be used to directly or wirelessly connect the electronic device (101) with an external electronic device (e.g., the electronic device (102)). In one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0027] The connection terminal (178) may include a connector through which the electronic device (101) may be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0028] A haptic module (179) can convert electrical signals into mechanical stimuli (e.g., vibration or movement) or electrical stimuli that a user can perceive through tactile or kinesthetic sensations. According to one embodiment, the haptic module (179) can include, for example, a motor, a piezoelectric element, or an electrical stimulation device.

[0029] The camera module (180) can capture still images and videos. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0030] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented as, for example, at least a part of a power management integrated circuit (PMIC).

[0031] A battery (189) may power at least one component of the electronic device (101). In one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0032] The communication module (190) may support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between the electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may operate independently from the processor (120) (e.g., application processor) and may include one or more communication processors that support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., a cellular communication module, a short-range wireless communication module, or a global navigation satellite system (GNSS) communication module) or a wired communication module (194) (e.g., a local area network (LAN) communication module, or a power line communication module). Among these communication modules, the corresponding communication module can communicate with an external electronic device (104) via a first network (198) (e.g., a short-range communication network such as Bluetooth, Wi-Fi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (199) (e.g., a long-range communication network such as a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules can be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can verify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) by using subscriber information (e.g., an international mobile subscriber identity (IMSI)) stored in the subscriber identification module (196).

[0033] The wireless communication module (192) can support 5G networks and next-generation communication technologies following the 4G network, such as NR access technology (new radio access technology). The NR access technology can support high-speed transmission of high-capacity data (eMBB (enhanced mobile broadband)), minimization of terminal power and connection of multiple terminals (mMTC (massive machine type communications)), or high reliability and low latency (URLLC (ultra-reliable and low-latency communications)). The wireless communication module (192) can support, for example, a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The wireless communication module (192) can support various technologies for securing performance in a high-frequency band, such as beamforming, massive multiple-input and multiple-output (MIMO), full dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), an external electronic device (e.g., the electronic device (104)), or a network system (e.g., the second network (199)). According to one embodiment, the wireless communication module (192) may support a peak data rate (e.g., 20 Gbps or more) for eMBB realization, a loss coverage (e.g., 164 dB or less) for mMTC realization, or a U-plane latency (e.g., 0.5 ms or less for downlink (DL) and uplink (UL), or 1 ms or less for round trip) for URLLC realization.

[0034] The antenna module (197) can transmit or receive signals or power to or from an external device (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna including a radiator formed of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as the first network (198) or the second network (199), may be selected from the plurality of antennas by, for example, the communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device via the selected at least one antenna. According to some embodiments, in addition to the radiator, another component (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as a part of the antenna module (197).

[0035] According to various embodiments, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent a first side (e.g., a bottom side) of the printed circuit board and capable of supporting a designated high-frequency band (e.g., a mmWave band), and a plurality of antennas (e.g., an array antenna) disposed on or adjacent a second side (e.g., a top side or a side side) of the printed circuit board and capable of transmitting or receiving signals in the designated high-frequency band.

[0036] At least some of the above components can be interconnected and exchange signals (e.g., commands or data) with each other via a communication method between peripheral devices (e.g., a bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)).

[0037] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) via a server (108) connected to a second network (199). Each of the external electronic devices (102 or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations executed in the electronic device (101) may be executed in one or more of the external electronic devices (102, 104, or 108). For example, when the electronic device (101) is to perform a certain function or service automatically or in response to a request from a user or another device, the electronic device (101) may, instead of or in addition to executing the function or service by itself, request one or more external electronic devices to perform the function or at least a part of the service. One or more external electronic devices that receive the request may execute at least a portion of the requested function or service, or an additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may process the result as is or additionally and provide it as at least a portion of a response to the request. For this purpose, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used, for example. The electronic device (101) may provide an ultra-low latency service by using distributed computing or mobile edge computing, for example. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server utilizing machine learning and / or a neural network. According to one embodiment, the external electronic device (104) or the server (108) may be included in the second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0038] FIG. 2A is a diagram illustrating an exemplary electronic device according to an embodiment. Referring to FIG. 2A, an electronic device (200) according to an embodiment may include a housing (210) that at least partially forms an exterior of the electronic device (200). For example, the housing (210) may include a first side (or front side) (200A), a second side (or back side) (200B), and a third side (or side surface) (200C) that surrounds a space between the first side (200A) and the second side (200B). In an embodiment, the housing (210) may refer to a structure that forms at least a portion of the first side (200A), the second side (200B), and / or the third side (200C).

[0039] An electronic device (200) according to one embodiment may include a substantially transparent front plate (202). In one embodiment, the front plate (202) may form at least a portion of the first surface (200A). In one embodiment, the front plate (202) may include, but is not limited to, a glass plate or a polymer plate including various coating layers, for example.

[0040] An electronic device (200) according to one embodiment may include a substantially opaque back plate (211). In one embodiment, the back plate (211) may form at least a portion of the second surface (200B). In one embodiment, the back plate (211) may be formed of a coated or colored glass, ceramic, polymer, metal (e.g., aluminum, stainless steel, or magnesium), or a combination of at least two of the foregoing materials.

[0041] An electronic device (200) according to one embodiment may include a side bezel structure (e.g., a side member or bracket) (218). In one embodiment, the side bezel structure (218) may be combined with a front plate (202) and / or a rear plate (211) to form at least a portion of a third side (200C) of the electronic device (200). For example, the side bezel structure (218) may form the entire third side (200C) of the electronic device (200), or, for another example, the side bezel structure (218) may form the third side (200C) of the electronic device (200) together with the front plate (202) and / or the rear plate (211).

[0042] Unlike the illustrated embodiment, when the third side (200C) of the electronic device (200) is partially formed by the front plate (202) and / or the rear plate (211), the front plate (202) and / or the rear plate (211) may include a portion extending from its edge and curved toward the rear plate (211) and / or the front plate (202). The extending portion of the front plate (202) and / or the rear plate (211) may be positioned at both ends of a long edge of the electronic device (200), for example, but is not limited to the above-described example.

[0043] In one embodiment, the side bezel structure (218) may include a metal and / or a polymer. In one embodiment, the back plate (211) and the side bezel structure (218) may be formed integrally and may include the same material (e.g., a metal material such as aluminum), but is not limited thereto. For example, the back plate (211) and the side bezel structure (218) may be formed as separate components and / or may include different materials.

[0044] In one embodiment, the electronic device (200) may include a display (201) (e.g., the display module (160) of FIG. 1), an audio module (203, 204, 207) (e.g., the audio module (170) of FIG. 1), a sensor module (e.g., the sensor module (176) of FIG. 1), a camera module (205, 212, 213) (e.g., the camera module (180) of FIG. 1), a key input device (217) (e.g., the input module (150) of FIG. 1), a light-emitting element (not shown), and a connector hole (208). In one embodiment, the electronic device (200) may omit at least one of the above components (e.g., the key input device (217) or the light-emitting element (not shown)), or may additionally include other components.

[0045] In one embodiment, the display (201) may be visually exposed through a substantial portion of the front plate (202). For example, at least a portion of the display (201) may be visible through the front plate (202) forming the first side (200A). The display (201) may be disposed on the back surface of the front plate (202).

[0046] In one embodiment, in order to expand the area to which the display (201) is visually exposed, the outer shape of the display (201) may be formed to be substantially the same as the outer shape of the front plate (202) adjacent to the display (201). In one embodiment, the gap between the outer shape of the display (201) and the outer shape of the front plate (202) may be formed to be substantially the same.

[0047] In one embodiment, the display (201) (or the first surface (200A) of the electronic device (200)) may include a screen display area (201A). In one embodiment, the display (201) may provide visual information to a user through the screen display area (201A). In the illustrated embodiment, when the first surface (200A) is viewed from the front, the screen display area (201A) is depicted as being positioned on the inside of the first surface (200A) and spaced apart from the outer edge of the first surface (200A), but is not limited thereto. For example, when the first surface (200A) is viewed from the front, at least a portion of an edge of the screen display area (201A) may substantially coincide with an edge of the first surface (200A) (or the front plate (202)).

[0048] In one embodiment, the screen display area (201A) may include a sensing area (201B) configured to acquire a user's biometric information. Here, the meaning of "the screen display area (201A) includes the sensing area (201B)" may be understood to mean that at least a portion of the sensing area (201B) may overlap the screen display area (201A). For example, the sensing area (201B) may refer to an area that, like other areas of the screen display area (201A), can display visual information by the display (201) and additionally acquire the user's biometric information (e.g., a fingerprint). Although the sensing area (201B) is illustrated as being formed within the screen display area (201A), it is not limited thereto. For example, the sensing area (201B) may also be formed in the key input device (217).

[0049] In one embodiment, the display (201) may include an area where a first camera module (205) is positioned. For example, an opening may be formed in the area of ​​the display (201), and the first camera module (205) (e.g., a punch hole camera) may be at least partially positioned within the opening so as to face the first surface (200A). In this case, the screen display area (201A) may surround at least a portion of an edge of the opening. In one embodiment, the first camera module (205) (e.g., an under display camera (UDC)) may be positioned below the display (201) so as to overlap the area of ​​the display (201). In this case, the display (201) may provide visual information to the user through the area, and additionally, the first camera module (205) may acquire an image corresponding to a direction facing the first surface (200A) through the area of ​​the display (201).

[0050] In one embodiment, the display (201) may be coupled to or disposed adjacent to a touch sensing circuit, a pressure sensor capable of measuring the intensity (pressure) of a touch, and / or a digitizer capable of detecting a magnetic field-type stylus pen.

[0051] In one embodiment, the audio module (203, 204, 207) may include a microphone hole (203, 204) and a speaker hole (207).

[0052] In one embodiment, the microphone holes (203, 204) may include a first microphone hole (203) formed in a portion of the third surface (200C) and a second microphone hole (204) formed in a portion of the second surface (200B). A microphone for acquiring external sound may be placed inside the microphone holes (203, 204). The microphone may include a plurality of microphones to detect the direction of the sound, but is not limited thereto.

[0053] In one embodiment, a second microphone hole (204) formed in a portion of the second surface (200B) may be positioned adjacent to a camera module (205, 212, 213). For example, the second microphone hole (204) may acquire sound according to the operation of the camera module (205, 212, 213). However, the present invention is not limited thereto.

[0054] In one embodiment, the speaker hole (207) may include an external speaker hole (207) and a call receiver hole (not shown). The external speaker hole (207) may be formed in a part of the third surface (200C) of the electronic device (200). In one embodiment, the external speaker hole (207) may be integrated into the microphone hole (203), and the speaker hole (207) and the microphone hole (203) may be implemented as a single hole. Although not shown, the call receiver hole (not shown) may be formed in another part of the third surface (200C). For example, the call receiver hole may be formed on the opposite side of the external speaker hole (207) on the third surface (200C). For example, based on the city of FIG. 2A, the external speaker hole (207) may be formed on the third surface (200C) corresponding to the lower part of the electronic device (200), and the call receiver hole may be formed on the third surface (200C) corresponding to the upper part of the electronic device (200). However, this is not limited thereto, and in other embodiments, the call receiver hole may be formed at a location other than the third surface (200C). For example, the call receiver hole may be formed by a spaced space between the front plate (202) (or, display (201)) and the side bezel structure (218).

[0055] In one embodiment, the electronic device (200) may include at least one speaker (not shown) (e.g., an audio output module (155) of FIG. 1) configured to output sound to the outside of the housing (210) through an external speaker hole (207) and / or a call receiver hole (not shown).

[0056] In one embodiment, a sensor module (not shown) may generate an electrical signal or data value corresponding to an internal operating state of the electronic device (200) or an external environmental state. For example, the sensor module may include at least one of a proximity sensor, an HRM sensor, a fingerprint sensor, a gesture sensor, a gyro sensor, a barometric pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a color sensor, an IR (infrared) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0057] In one embodiment, the camera modules (205, 212, 213) may include a first camera module (205) arranged to face a first side (200A) of the electronic device (200), a second camera module (212) arranged to face a second side (200B), and a flash (213).

[0058] In one embodiment, the second camera module (212) may include multiple cameras (e.g., dual cameras, triple cameras, or quad cameras). However, the second camera module (212) is not necessarily limited to including multiple cameras and may include one camera.

[0059] In one embodiment, the first camera module (205) and the second camera module (212) may include one or more lenses, image sensors, and / or image signal processors.

[0060] In one embodiment, the flash (213) may include, for example, a light-emitting diode or a xenon lamp. In one embodiment, two or more lenses (infrared camera, wide-angle and telephoto lenses) and image sensors may be arranged on one side of the electronic device (200).

[0061] In one embodiment, the key input device (217) may be arranged on the third side (200C) of the electronic device (200). In one embodiment, the electronic device (200) may not include some or all of the key input devices (217), and the key input devices (217) that are not included may be implemented in another form, such as a soft key, on the display (201).

[0062] In one embodiment, a connector hole (208) may be formed on the third side (200C) of the electronic device (200) so that a connector of an external device can be accommodated. A connection terminal (e.g., a connection terminal (178) of FIG. 1) electrically connected to the connector of the external device may be arranged within the connector hole (208). The electronic device (200) according to one embodiment may include an interface module (e.g., an interface (177) of FIG. 1) for processing an electrical signal transmitted and received through the connection terminal.

[0063] In one embodiment, the electronic device (200) may include a light-emitting element (not shown). For example, the light-emitting element (not shown) may be disposed on a first surface (200A) of the housing (210). The light-emitting element (not shown) may provide status information of the electronic device (200) in the form of light. In one embodiment, the light-emitting element (not shown) may provide a light source that is linked to the operation of the first camera module (205). For example, the light-emitting element (not shown) may include an LED, an IR LED, and / or a xenon lamp.

[0064] FIG. 2B is an exploded perspective view of an exemplary electronic device according to an embodiment. Referring to FIG. 2B, an electronic device (200) according to an embodiment may include a frame structure (240) (e.g., the side bezel structure (218) of FIG. 2A), a first printed circuit board (250), a second printed circuit board (252), and a battery (270) (e.g., the battery (189) of FIG. 1).

[0065] In one embodiment, the frame structure (240) may be positioned between the display (201) and the back plate (211). In one embodiment, the frame structure (240) may support or accommodate components included in the electronic device (200). For example, the display (201) may be disposed on one side of the frame structure (240) facing one direction (e.g., +Z direction). A first printed circuit board (250), a second printed circuit board (252), a battery (270), and a second camera module (212) may be disposed on the other side of the frame structure (240) facing the opposite direction (e.g., -Z direction). The first printed circuit board (250), the second printed circuit board (252), the battery (270), and the second camera module (212) may be disposed within recesses formed in the frame structure (240).

[0066] In one embodiment, the frame structure (240) may include a first part (241) and a second part (243). The periphery of the second part (243) may be surrounded by the first part (241). The first part (241) may surround a space between the back plate (211) and the front plate (202) (and / or the display (201)). The first part (241) surrounding the space may at least partially form a side surface of the electronic device (200) (e.g., the third side (200C) of FIG. 2A), and the second part (243) positioned within the space may extend inwardly from the first part (241). The second part (243) may be positioned below the display (201) (e.g., in the -Z direction). In one embodiment, the first part (241) and / or the second part (243) may be formed of metal and / or polymer.

[0067] In one embodiment, a first part (241) of a frame structure (240) forming the side surface of the electronic device (200) may be referred to as a side member or a lateral structure, and a second part (243) of the frame structure (240) supporting various components of the electronic device (200) may be referred to as a support member, a support structure, or a bracket.

[0068] In one embodiment, the first printed circuit board (250), the second printed circuit board (252), and the battery (270) may be respectively coupled to the frame structure (240). For example, the first printed circuit board (250) and the second printed circuit board (252) may be fixedly disposed to the frame structure (240) via a coupling member such as a screw. For example, the battery (270) may be fixedly disposed to the frame structure (240) via an adhesive member (e.g., double-sided tape). However, the present invention is not limited to the above-described examples.

[0069] In one embodiment, the display (201) may be positioned between a frame structure (240) and a front plate (202). For example, the front plate (202) may be positioned on one side (e.g., in the +Z direction) of the display (201), and the frame structure (240) may be positioned on the other side (e.g., in the -Z direction).

[0070] In one embodiment, the front plate (202) can be coupled with the display (201). For example, the display (201) can be attached to the back surface of the front plate (202) via an optically clear adhesive (e.g., optically clear adhesive (OCA) or optically clear resin (OCR)).

[0071] In one embodiment, the front plate (202) may be coupled to a frame structure (240). For example, the front plate (202) may include an outer portion extending outside the display (201) when viewed in the z-axis direction. The outer portion of the front plate (202) may be coupled to the frame structure (240) (e.g., the first part (241)).

[0072] In one embodiment, a processor (e.g., processor (120) of FIG. 1), a memory (e.g., memory (130) of FIG. 1), and / or an interface (e.g., interface (177) of FIG. 1) may be disposed on the first printed circuit board (250) and / or the second printed circuit board (252). The processor may include, for example, one or more of a central processing unit, an application processor, a graphics processing unit, an image signal processor, a sensor hub processor, or a communication processor. The memory may include, for example, volatile memory or non-volatile memory. The interface may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, and / or an audio interface. The interface may electrically or physically connect the electronic device (200) to an external electronic device, and may include a USB connector, an SD card / MMC connector, or an audio connector. In one embodiment, the first printed circuit board (250) and the second printed circuit board (252) may be operatively or electrically connected to each other via a connecting member (e.g., a flexible printed circuit board).

[0073] In one embodiment, the battery (270) may power at least one component of the electronic device (200). For example, the battery (270) may include a rechargeable secondary battery or a fuel cell.

[0074] In one embodiment, a first camera module (205) (e.g., a front camera) may be disposed in at least a portion of a frame structure (240) (e.g., a second part (243)) such that the lens can receive external light through a portion of the front plate (202) (e.g., the camera area (237)) (e.g., the front (200A) of FIG. 2A).

[0075] In one embodiment, a second camera module (212) (e.g., a rear camera) may be disposed between the frame structure (240) and the rear plate (211). In one embodiment, the second camera module (212) may be electrically connected to the first printed circuit board (250) via a connecting member (e.g., a connector). In one embodiment, the second camera module (212) may be disposed such that the lens can receive external light through the camera area (284) of the rear plate (211) of the electronic device (200).

[0076] In one embodiment, the camera area (284) may be formed on a surface of the rear plate (211) (e.g., the rear surface (200B) of FIG. 2A). In one embodiment, the camera area (284) may be formed to be at least partially transparent so that external light may be incident on the lens of the second camera module (212). In one embodiment, at least a portion of the camera area (284) may protrude from the surface of the rear plate (211) by a predetermined height. However, the present invention is not limited thereto, and in another embodiment, the camera area (284) may form a substantially same plane as the surface of the rear plate (211).

[0077] In one embodiment, the housing (210) of the electronic device (200) may refer to a configuration or structure that forms at least a portion of the exterior of the electronic device (200). In this respect, at least a portion of the front plate (202), the frame structure (240), and / or the rear plate (211) that form the exterior of the electronic device (200) may be referred to as the housing (210) of the electronic device (200).

[0078] Referring to FIGS. 2A and 2B, a bar type electronic device (200) is exemplified, but the shape of the electronic device (200) is not limited thereto. For example, the electronic device (200) may be an electronic device (e.g., a foldable device) that includes housing parts that are foldably coupled to each other and a flexible display (e.g., a foldable display) that is supported by the housing parts and folds or unfolds according to the rotation of the housing parts. For example, the electronic device (200) may be an electronic device (e.g., a slideable device) that includes housing parts that are slidably coupled to each other and a flexible display (e.g., a rollable display) that changes the size of the display area by being pulled inward or pulled outward according to the sliding of the housing parts. For example, the electronic device (200) may be a wearable electronic device such as earbuds, a smart watch, a smart ring, smart glasses, or a head mounted display (HMD).

[0079] According to one embodiment, the first printed circuit board (250) and / or the second printed circuit board (252) may be a printed circuit board assembly (e.g., printed circuit board assembly (301) of FIG. 3). For example, the printed circuit board assembly may include a plurality of interposers (e.g., interposers (320 and 340) of FIG. 3) and a plurality of printed circuit boards (e.g., printed circuit boards (310 and 360) of FIG. 3) joined via the plurality of interposers.

[0080] The printed circuit board assembly will be described in detail with reference to the drawings below. In the drawings, identical components may be designated by the same reference numerals, and duplicate descriptions of components having the same reference numerals may not be repeated. In the description below referring to a specific drawing, reference numerals in other drawings may be referenced.

[0081] FIG. 3 illustrates a printed circuit assembly according to one embodiment.

[0082] The printed circuit board assembly (301) of FIG. 3 may be an example of the first printed circuit board (250) or the second printed circuit board (252) of FIG. 2b. The first direction (1) and the second direction (2) opposite to the first direction (1) illustrated in FIG. 3 and the drawings below may be directions substantially perpendicular to the first printed circuit board (310) and the second printed circuit board (360) of the printed circuit board assembly (301). The first direction (1) and the second direction (2) may correspond to the +Z direction and the -Z direction of FIG. 2b, but are not limited thereto.

[0083] Referring to FIG. 3, according to one embodiment, a printed circuit board assembly (301) may include a first printed circuit board (310), a first interposer (320), a second interposer (340), and a second printed circuit board (360). The first interposer (320) and the second interposer (340) may extend between the first printed circuit board (310) and the second printed circuit board (360). For example, the first interposer (320) may extend from the first printed circuit board (310) toward the second printed circuit board (360) (e.g., to the second interposer (340)). For example, the second interposer (340) may extend from the second printed circuit board (360) toward the first printed circuit board (310) (e.g., to the first interposer (320)).

[0084] In one embodiment, the first printed circuit board (310), the second interposer (320), the second interposer (340), and the second printed circuit board (360) of the printed circuit board assembly (301) may be coupled to each other. For example, the first printed circuit board (310) and the second printed circuit board (360) may be physically and electrically connected via the first interposer (320) and the second interposer (340).

[0085] In one embodiment, the first printed circuit board (310) may include a first side (310A) and a second side (310B). The second side (310B) of the first printed circuit board (310) may be opposite the first side (310A) and may face the direction of the second printed circuit board (360) (e.g., the second direction (2)).

[0086] In one embodiment, the second printed circuit board (360) may include a first side (360A) and a second side (360B). The second side (360B) of the second printed circuit board (360) may be opposite the first side (360A) and may face the direction of the first printed circuit board (310) (e.g., the first direction (1)).

[0087] In one embodiment, the first interposer (320) may be disposed between the first printed circuit board (310) and the second interposer (340). For example, a bottom side of the first interposer (320) facing the first direction (1) may be disposed on the second side (310B) of the first printed circuit board (310), and the second interposer (340) may be disposed on a top side of the first interposer (320) facing the second direction (2). The first interposer (320) may be coupled with the first printed circuit board (310) and the second interposer (340).

[0088] In one embodiment, the second interposer (340) may be disposed between the first interposer (320) and the second printed circuit board (360). For example, the lower side of the second interposer (340) facing the first direction (1) may be disposed on the first interposer (320), and the second side (360B) of the second printed circuit board (360) may be disposed on the upper side of the second interposer (340) facing the second direction (2). The second interposer (340) may be coupled with the first interposer (320) and the second printed circuit board (360).

[0089] In one embodiment, the printed circuit board assembly (301) may include a plurality of components arranged on a first printed circuit board (310) and / or a second printed circuit board (360). For example, the plurality of components may include, but are not limited to, various electronic components such as electronic devices and integrated circuit chips (IC chips), a shielding can that surrounds the electronic components to provide electromagnetic shielding, and connectors for connecting the printed circuit board assembly (301) to other components.

[0090] For example, the plurality of components of the printed circuit board assembly (301) may include a component (391) disposed on a first surface (310A) of a first printed circuit board (310). For example, the plurality of components of the printed circuit board assembly (301) may include a component (392) disposed on a second surface (310B) of the first printed circuit board (310) and / or a component (393) disposed on a second surface (360B) of a second printed circuit board (360). For example, the plurality of components of the printed circuit board assembly (301) may further include a component (394) disposed on a first surface (360A) of a second printed circuit board (360).

[0091] In one embodiment, components (392 and 393) of a printed circuit board assembly (301) may be positioned within a space (305) enclosed by a first printed circuit board (310), a second printed circuit board (360), a first interposer (320), and a second interposer (340). For example, component (392) may be positioned on a portion (or area) of a second side (310B) of the first printed circuit board (310) enclosed by the first interposer (320). For example, component (393) may be positioned on a portion (or area) of a second side (360B) of the second printed circuit board (360) enclosed by the second interposer (340).

[0092] FIG. 4 illustrates a printed circuit board assembly according to one embodiment.

[0093] Referring to FIG. 4, according to one embodiment, a first printed circuit board (310) may include a substrate (311), a plurality of conductive pads (316), and a non-conductive layer (315).

[0094] In one embodiment, the substrate (311) of the first printed circuit board (310) may be formed of a polymer such as phenol, Teflon, epoxy, and polyimide, or a composite material such as flame retardant-4 (FR-4), but is not limited thereto.

[0095] In one embodiment, the first printed circuit board (310) may include a conductor (or conductive traces) formed within and / or on the substrate (311). The conductor of the first printed circuit board (310) may be formed of an electrically conductive material, such as, but not limited to, copper. The conductor of the first printed circuit board (310) may include a plurality of conductive pads (316) of the first printed circuit board (310) formed on a top surface of the substrate (311) (e.g., a side of the substrate (311) facing the second direction (2)).

[0096] In one embodiment, a non-conductive layer (315) of a first printed circuit board (310) may be formed on the upper surface of the substrate (311). A plurality of openings may be formed in the non-conductive layer (315). Each of the plurality of conductive pads (316) may be positioned within a corresponding opening of the plurality of openings of the non-conductive layer (315). The non-conductive layer (315) and the plurality of conductive pads (316) may form at least a portion of the second side (310B) of the first printed circuit board (310). The non-conductive layer (315) may be formed of an electrically non-conductive material, for example, but not limited to, a non-conductive resin such as epoxy. The non-conductive layer (315) may be referred to as a solder mask, a solder mask layer, a solder resist, a solder resist layer, or an insulating layer.

[0097] According to one embodiment, the second printed circuit board (360) may include a substrate (361), a plurality of conductive pads (366), and a non-conductive layer (365).

[0098] In one embodiment, the substrate (361) of the second printed circuit board (360) may be formed of a polymer such as phenol, Teflon, epoxy, and polyimide, or a composite material such as FR-4, but is not limited thereto.

[0099] In one embodiment, the second printed circuit board (360) may include a conductor (or conductive traces) formed within and / or on the substrate (361). The conductor of the second printed circuit board (360) may be formed of an electrically conductive material, such as, but not limited to, copper. The conductor of the second printed circuit board (360) may include a plurality of conductive pads (366) formed on a bottom surface of the second printed circuit board (360) (e.g., a surface of the substrate (361) facing the first direction (1)).

[0100] In one embodiment, a non-conductive layer (365) of a second printed circuit board (360) may be formed on the lower surface of the substrate (361). A plurality of openings may be formed in the non-conductive layer (365) of the second printed circuit board (360). Each of the plurality of conductive pads (366) of the second printed circuit board (360) may be positioned within a corresponding opening of the plurality of openings of the non-conductive layer (365). The non-conductive layer (365) and the plurality of conductive pads (366) may form at least a portion of the second surface (360B) of the second printed circuit board (360). The non-conductive layer (365) may be formed of an electrically non-conductive material, for example, but not limited to, a non-conductive resin such as epoxy. The non-conductive layer (365) may be referred to as a solder mask, a solder mask layer, a solder resist, a solder resist layer, or an insulating layer.

[0101] According to one embodiment, the first interposer (320) may include a substrate (321), a first non-conductive layer (325), a second non-conductive layer (326), and a plurality of conductive via pillars (322).

[0102] In one embodiment, the substrate (321) of the first interposer (320) may include a plurality of dielectric layers (or non-conductive layers). The plurality of dielectric layers of the substrate (321) may be formed of, but are not limited to, a polymer such as phenol, Teflon, epoxy, and polyimide, or a composite material such as FR-4.

[0103] In one embodiment, the first non-conductive layer (325) of the first interposer (320) may be formed on a lower surface of the substrate (321) (e.g., a surface of the substrate (321) facing the first direction (1)). The second non-conductive layer (326) of the first interposer (320) may be formed on an upper surface of the substrate (321) (e.g., a surface of the substrate (321) facing the second direction (2)). The first non-conductive layer (325) and the second non-conductive layer (326) of the first interposer (320) may be formed of an electrically non-conductive material, for example, but not limited to, a non-conductive resin such as epoxy. Each of the first non-conductive layer (325) and the second non-conductive layer (326) of the first interposer (320) may be referred to as a solder mask, a solder mask layer, a solder resist, a solder resist layer, or an insulating layer.

[0104] In one embodiment, a plurality of conductive via pillars (322) of the first interposer (320) may be spaced apart from each other. The plurality of conductive via pillars (322) may each penetrate the substrate (321) of the first interposer (320). The plurality of conductive via pillars (322) may be formed of an electrically conductive material, such as, but not limited to, copper.

[0105] In one embodiment, the first interposer (320) may include a plurality of first conductive pads (336) and a plurality of second conductive pads (337). The plurality of first conductive pads (336) may be disposed on the lower surface of the substrate (321) so as to be spaced apart from one another. For example, the first non-conductive layer (325) may define a plurality of openings, and each of the plurality of first conductive pads (336) may be positioned within a corresponding one of the plurality of openings of the first non-conductive layer (325). The plurality of second conductive pads (337) may be disposed on the upper surface of the substrate (321) so as to be spaced apart from one another. For example, the second non-conductive layer (326) can define a plurality of openings, and each of the plurality of second conductive pads (337) can be positioned within a corresponding opening of the plurality of openings of the second non-conductive layer (326).

[0106] In one embodiment, the plurality of first conductive pads (336) of the first interposer (320) may be aligned with the plurality of second conductive pads (337) of the first interposer (320), respectively. For example, the plurality of first conductive pads (336) may extend from the lower ends of the plurality of conductive via pillars (322), respectively, and the plurality of second conductive pads (337) may extend from the upper ends of the plurality of conductive via pillars (322), respectively. In this respect, the plurality of conductive via pillars (322) may be understood to include the plurality of first conductive pads (336) and the plurality of second conductive pads (337), respectively.

[0107] According to one embodiment, the second interposer (340) may include a substrate (341), a first non-conductive layer (345), a second non-conductive layer (346), and a plurality of conductive via pillars (342).

[0108] In one embodiment, the substrate (341) of the second interposer (340) may include a plurality of dielectric layers (or non-conductive layers). The plurality of dielectric layers of the substrate (341) may be formed of, but are not limited to, a polymer such as phenol, Teflon, epoxy, and polyimide, or a composite material such as FR-4.

[0109] In one embodiment, the first non-conductive layer (345) of the second interposer (340) may be formed on a lower surface of the substrate (341) (e.g., a surface of the substrate (341) facing the first direction (1)). The second non-conductive layer (346) of the second interposer (340) may be formed on an upper surface of the substrate (341) (e.g., a surface of the substrate (341) facing the second direction (2)). The first non-conductive layer (345) and the second non-conductive layer (346) of the second interposer (340) may be formed of an electrically non-conductive material, for example, but not limited to, a non-conductive resin such as epoxy. Each of the first non-conductive layer (345) and the second non-conductive layer (346) of the second interposer (340) may be referred to as a solder mask, a solder mask layer, a solder resist, a solder resist layer, or an insulating layer.

[0110] In one embodiment, the plurality of conductive via pillars (342) of the second interposer (340) may be spaced apart from each other. The plurality of conductive via pillars (342) may each penetrate the substrate (341) of the second interposer (340). The plurality of conductive via pillars (342) may be formed of an electrically conductive material, such as, but not limited to, copper.

[0111] In one embodiment, the second interposer (340) may include a plurality of first conductive pads (356) and a plurality of second conductive pads (357). The plurality of first conductive pads (356) may be disposed on the lower surface of the substrate (341) so as to be spaced apart from one another. For example, the first non-conductive layer (345) may define a plurality of openings, and each of the plurality of first conductive pads (356) may be positioned within a corresponding one of the plurality of openings of the first non-conductive layer (345). The plurality of second conductive pads (357) may be disposed on the upper surface of the substrate (341) so as to be spaced apart from one another. For example, the second non-conductive layer (346) can define a plurality of openings, and each of the plurality of second conductive pads (357) can be positioned within a corresponding opening of the plurality of openings of the second non-conductive layer (346).

[0112] In one embodiment, the plurality of first conductive pads (356) of the second interposer (340) may be aligned with the plurality of second conductive pads (357) of the second interposer (340), respectively. For example, the plurality of first conductive pads (356) may extend from lower ends of the plurality of conductive via pillars (342), respectively, and the plurality of second conductive pads (357) may extend from upper ends of the plurality of conductive via pillars (342), respectively. In this respect, the plurality of conductive via pillars (342) may be understood to include the plurality of first conductive pads (356) and the plurality of second conductive pads (357), respectively.

[0113] In one embodiment, the plurality of conductive via pillars (322) of the first interposer (320) may be aligned with respect to the plurality of conductive pads (316) of the first printed circuit board (310), respectively. For example, each of the plurality of conductive via pillars (322) of the first interposer (320) may be aligned in a vertical direction (e.g., in the first direction (1)) to a corresponding conductive pad among the plurality of conductive pads (316) of the first printed circuit board (310).

[0114] In one embodiment, the plurality of first conductive pads (336) of the first interposer (320) may be aligned with respect to the plurality of conductive pads (316) of the first printed circuit board (310), respectively. For example, each of the plurality of first conductive pads (336) of the first interposer (320) may be aligned in a vertical direction (e.g., in the first direction (1)) with respect to a corresponding conductive pad among the plurality of conductive pads (316) of the first printed circuit board (310). For example, each of the plurality of first conductive pads (336) of the first interposer (320) may face a corresponding conductive pad among the plurality of conductive pads (316) of the first printed circuit board (310).

[0115] In one embodiment, the pitches (P1) of the plurality of first conductive pads (336) of the first interposer (320) may be substantially the same as the pitches between the plurality of conductive pads (316) of the first printed circuit board (310). For example, the pitches (P1) of the plurality of first conductive pads (336) of the first interposer (320) may be 0.35 mm or less. The pitches (P1) of the plurality of first conductive pads (336) may be the distance between the centers of any two adjacent conductive pads among the plurality of first conductive pads (336).

[0116] In one embodiment, the plurality of conductive via pillars (322) of the first interposer (320) may be electrically and physically connected to the plurality of conductive pads (316) of the first printed circuit board (310), respectively. For example, the plurality of first conductive pads (336) of the first interposer (320) may be electrically and physically connected to the plurality of conductive pads (316) of the first printed circuit board (310), respectively. For example, each of the plurality of first conductive pads (336) of the first interposer (320) may be electrically and physically coupled to a corresponding conductive pad among the plurality of conductive pads (316) of the first printed circuit board (310). For example, a plurality of first conductive pads (336) of the first interposer (320) and a plurality of conductive pads (316) of the first printed circuit board (310) may be electrically and physically bonded to each other through a conductive bonding member (or material) such as solder (370), but the present invention is not limited thereto, and various bonding methods may be applied. Through this, the first interposer (320) and the first printed circuit board (310) may be bonded to each other.

[0117] In one embodiment, the first non-conductive layer (325) of the first interposer (320) may be in contact with the non-conductive layer (315) of the first printed circuit board (310). Accordingly, the plurality of openings of the first non-conductive layer (325) where the plurality of first conductive pads (336) of the first interposer (320) are positioned and the plurality of openings of the non-conductive layer (315) where the plurality of conductive pads (316) of the first printed circuit board (310) are positioned may be connected. The first non-conductive layer (325) of the first interposer (320) and the non-conductive layer (315) of the first printed circuit board (310), which are in contact with each other, can function as a dam that can reduce or prevent overflow of the conductive bonding material (e.g., solder (370)) between the plurality of first conductive pads (336) of the first interposer (320) and the plurality of conductive pads (316) of the first printed circuit board (310).

[0118] In one embodiment, the plurality of conductive via pillars (322) of the first interposer (320) may be aligned with the plurality of conductive via pillars (342) of the second interposer (340), respectively. For example, each of the plurality of conductive via pillars (322) of the first interposer (320) may be aligned in a vertical direction (e.g., in the first direction (1)) with a corresponding conductive via pillar among the plurality of conductive via pillars (342) of the second interposer (340). For example, the plurality of second conductive pads (337) of the first interposer (320) may be aligned with the plurality of first conductive pads (356) of the second interposer (340), respectively. For example, each of the plurality of second conductive pads (337) of the first interposer (320) may be aligned in a vertical direction (e.g., in the first direction (1)) with respect to a corresponding first conductive pad among the plurality of first conductive pads (356) of the second interposer (340). For example, each of the plurality of second conductive pads (337) of the first interposer (320) may face a corresponding first conductive pad among the plurality of first conductive pads (356) of the second interposer (340).

[0119] In one embodiment, the pitches of the plurality of second conductive pads (337) of the first interposer (320) may be substantially the same as the pitches (P1) of the plurality of first conductive pads (336) of the first interposer (320). In one embodiment, the pitches of the plurality of first conductive pads (356) of the second interposer (340) may be substantially the same as the pitches (e.g., pitches (P1)) of the plurality of second conductive pads (337) of the first interposer (320). The pitches of the plurality of second conductive pads (337) of the first interposer (320) may be the distance between the centers of any two adjacent conductive pads among the plurality of second conductive pads (337). The pitches of the plurality of first conductive pads (356) of the second interposer (340) may be the distance between the centers of any two adjacent conductive pads among the plurality of first conductive pads (356).

[0120] In one embodiment, the plurality of conductive via pillars (322) of the first interposer (320) may be electrically and physically connected to the plurality of conductive via pillars (342) of the second interposer (340), respectively. For example, the plurality of second conductive pads (337) of the first interposer (320) may be electrically and physically connected to the plurality of first conductive pads (356) of the second interposer (340), respectively. For example, each of the plurality of second conductive pads (337) of the first interposer (320) may be electrically and physically coupled to a corresponding first conductive pad among the plurality of first conductive pads (356) of the second interposer (340). For example, a plurality of second conductive pads (337) of a first interposer (320) and a plurality of first conductive pads (356) of a second interposer (340) may be electrically and physically bonded to each other through a conductive bonding member (or material) such as solder (e.g., solder (370)), but the present invention is not limited thereto, and various bonding methods may be applied. Through this, the first interposer (320) and the second interposer (340) may be bonded to each other.

[0121] In one embodiment, the second non-conductive layer (326) of the first interposer (320) may be in contact with the first non-conductive layer (345) of the second interposer (340). Accordingly, the plurality of openings of the second non-conductive layer (326) where the plurality of second conductive pads (337) of the first interposer (320) are positioned and the plurality of openings of the first non-conductive layer (345) where the plurality of first conductive pads (356) of the second interposer (340) are positioned may be connected. The second non-conductive layer (326) of the first interposer (320) and the first non-conductive layer (345) of the second interposer (340), which are in contact with each other, can function as a dam that can reduce or prevent overflow of the conductive bonding material (e.g., the solder) between the plurality of second conductive pads (337) of the first interposer (320) and the plurality of first conductive pads (356) of the second interposer (340).

[0122] In one embodiment, the plurality of conductive via pillars (342) of the second interposer (340) may be aligned with respect to the plurality of conductive pads (366) of the second printed circuit board (360), respectively. For example, each of the plurality of conductive via pillars (342) of the second interposer (340) may be aligned in a vertical direction (e.g., in the first direction (1)) to a corresponding conductive pad among the plurality of conductive pads (366) of the second printed circuit board (360).

[0123] In one embodiment, the plurality of second conductive pads (357) of the second interposer (340) may be aligned with respect to the plurality of conductive pads (366) of the second printed circuit board (360), respectively. For example, each of the plurality of second conductive pads (357) of the second interposer (340) may be aligned in a vertical direction (e.g., in the first direction (1)) with respect to a corresponding conductive pad among the plurality of conductive pads (366) of the second printed circuit board (360). For example, each of the plurality of second conductive pads (357) of the second interposer (340) may face a corresponding conductive pad among the plurality of conductive pads (366) of the second printed circuit board (360).

[0124] In one embodiment, the pitches (P2) of the plurality of second conductive pads (357) of the second interposer (340) may be substantially the same as the pitches between the plurality of conductive pads (366) of the second printed circuit board (360). In one embodiment, the pitches (P2) of the plurality of second conductive pads (357) of the second interposer (340) may be substantially the same as the pitches of the plurality of first conductive pads (356) of the second interposer (340). For example, the pitches (P2) of the plurality of second conductive pads (357) of the second interposer (340) may be 0.35 mm or less. The pitches (P2) of the plurality of second conductive pads (357) may be the distance between the centers of any two adjacent conductive pads among the plurality of second conductive pads (357).

[0125] In one embodiment, the plurality of conductive via pillars (342) of the second interposer (340) may be electrically and physically connected to the plurality of conductive pads (366) of the second printed circuit board (360), respectively. For example, the plurality of second conductive pads (357) of the second interposer (340) may be electrically and physically connected to the plurality of conductive pads (366) of the second printed circuit board (360), respectively. For example, each of the plurality of second conductive pads (357) of the second interposer (340) may be electrically and physically coupled to a corresponding conductive pad among the plurality of conductive pads (366) of the second printed circuit board (360). For example, a plurality of second conductive pads (357) of a second interposer (340) and a plurality of conductive pads (366) of a second printed circuit board (360) may be electrically and physically bonded to each other through a conductive bonding member (or material) such as solder (e.g., solder (370)), but the present invention is not limited thereto, and various bonding methods may be applied. Through this, the second interposer (340) and the second printed circuit board (360) may be bonded to each other.

[0126] In one embodiment, the second non-conductive layer (346) of the second interposer (340) may be in contact with the non-conductive layer (365) of the second printed circuit board (360). Accordingly, the plurality of openings of the second non-conductive layer (346) where the plurality of second conductive pads (357) of the second interposer (340) are positioned and the plurality of openings of the non-conductive layer (365) where the plurality of conductive pads (366) of the second printed circuit board (360) are positioned may be connected. The second non-conductive layer (346) of the second interposer (340) and the non-conductive layer (365) of the second printed circuit board (360), which are in contact with each other, can function as a dam that can reduce or prevent overflow of the conductive bonding material (e.g., the solder) between the plurality of second conductive pads (357) of the second interposer (340) and the plurality of conductive pads (366) of the second printed circuit board (360).

[0127] In one embodiment, a plurality of conductive pads (316) of a first printed circuit board (310) may be electrically connected to a plurality of conductive pads (366) of a second printed circuit board (360) via a plurality of conductive via pillars (322) of a first interposer (320) and a plurality of conductive via pillars (342) of a second interposer (340), respectively.

[0128] FIG. 5 is a drawing showing an interposer according to one embodiment.

[0129] Referring to FIG. 5 together with FIG. 4, according to one embodiment, the plurality of dielectric layers of the substrate (321) of the first interposer (320) may include a lowermost layer (531), an uppermost layer (533), and a plurality of intermediate layers (532) between the lowermost layer (531) and the uppermost layer (533). The lowermost layer (531) may be adjacent to the first printed circuit board (310). For example, the lowermost layer (531) may face in the direction of the first printed circuit board (310) (e.g., the first direction (1)). The uppermost layer (533) may be adjacent to the second interposer (340). For example, the uppermost layer (533) may face in the direction of the second interposer (340) (e.g., the second direction (2)). The plurality of intermediate layers (532) may include a first intermediate layer (532-1) positioned on the lowest layer (531), a second intermediate layer (532-2) positioned on the first intermediate layer (532-1), and a third intermediate layer (532-3) positioned between the second intermediate layer (532-2) and the uppermost layer (533).

[0130] In one embodiment, the plurality of conductive via pillars (322) of the first interposer (320) may include a first conductive via pillar (322-1) and a second conductive via pillar (322-2) adjacent to the first conductive via pillar (322-1).

[0131] In one embodiment, the first conductive via pillar (322-1) may include a plurality of conductive vias that penetrate each of the plurality of dielectric layers of the substrate (321) and are stacked on top of each other. For example, the first conductive via pillar (322-1) may include a first conductive via (581) penetrating the lowermost layer (531) of the substrate (321), a second conductive via (582) stacked on the first conductive via (581) and penetrating the first intermediate layer (532-1) of the substrate (321), a third conductive via (583) stacked on the second conductive via (582) and penetrating the second intermediate layer (532-2) of the substrate (321), a fourth conductive via (584) stacked on the third conductive via (583) and penetrating the third intermediate layer (532-3) of the substrate (321), and a fifth conductive via (585) stacked on the fourth conductive via (584) and penetrating the uppermost layer (533) of the substrate (321).

[0132] For example, but not limited to, the cross-sectional shape of the first conductive via (591) may have a trapezoidal shape with a long side oriented in the first direction (1) and a short side oriented in the second direction (2). For example, but not limited to, the cross-sectional shape of the second conductive via (592) may have a trapezoidal shape with a long side oriented in the first direction (1) and a short side oriented in the second direction (2). For example, but not limited to, the cross-sectional shape of the third conductive via (593) may include a first portion having a trapezoidal shape with a long side oriented in the first direction (1) and a short side oriented in the second direction (2), and a second portion having a trapezoidal shape with a short side connected to the first portion and a long side oriented in the second direction (2). For example, but not limited to, the cross-sectional shape of the fourth conductive via (594) may have a trapezoidal shape with a short side facing the first direction (1) and a long side facing the second direction (2). For example, but not limited to, the cross-sectional shape of the fifth conductive via (595) may have a trapezoidal shape with a short side facing the first direction (1) and a long side facing the second direction (2).

[0133] In one embodiment, the first conductive via pillar (322-1) may include a conductive pad (586) included in a plurality of first conductive pads (336) of the first interposer (320) and extending from a first conductive via (581), and a conductive pad (587) included in a plurality of second conductive pads (337) of the first interposer (320) and extending from a fifth conductive via (585).

[0134] In one embodiment, the first conductive via pillar (322-1) may further include conductive pads (571, 572, 573, and 574). The conductive pad (571) may be disposed between the lowermost layer (531) of the substrate (321) and the first intermediate layer (532-1), and may extend from the first conductive via (581) and the second conductive via (582). The conductive pad (572) may be disposed between the first intermediate layer (532-1) and the second intermediate layer (532-2) of the substrate (321), and may extend from the second conductive via (582) and the third conductive via (583). The conductive pad (573) may be disposed between the second intermediate layer (532-2) and the third intermediate layer (532-3) of the substrate (321) and may extend from the third conductive via (583) and the fourth conductive via (584). The conductive pad (574) may be disposed between the third intermediate layer (532-3) and the top layer (533) of the substrate (321) and may extend from the fourth conductive via (584) and the fifth conductive via (585). Alternatively, at least one of the conductive pads (571, 572, 573, and 574) of the first conductive via pillar (322-1) may be omitted.

[0135] In one embodiment, the second conductive via pillar (322-2) may include a plurality of conductive vias that penetrate each of the plurality of dielectric layers of the substrate (321) and are stacked on top of each other. For example, the second conductive via pillar (322-2) may include a first conductive via (591) penetrating the lowermost layer (531) of the substrate (321), a second conductive via (592) stacked on the first conductive via (591) and penetrating the first intermediate layer (532-1) of the substrate (321), a third conductive via (593) stacked on the second conductive via (592) and penetrating the second intermediate layer (532-2) of the substrate (321), a fourth conductive via (594) stacked on the third conductive via (593) and penetrating the third intermediate layer (532-3) of the substrate (321), and a fifth conductive via (595) stacked on the fourth conductive via (594) and penetrating the uppermost layer (533) of the substrate (321).

[0136] In one embodiment, the second conductive via pillar (322-2) may include a conductive pad (596) included in a plurality of first conductive pads (336) of the first interposer (320) and extending from a first conductive via (591), and a conductive pad (597) included in a plurality of second conductive pads (337) of the first interposer (320) and extending from a fifth conductive via (595).

[0137] In one embodiment, the second conductive via pillar (322-2) may further include conductive pads (576, 577, 578, and 579).

[0138] In one embodiment, the conductive pad (576) may be positioned between the lowermost layer (531) of the substrate (321) and the first intermediate layer (532-1) and may extend from the first conductive via (591) and the second conductive via (592). The conductive pad (576) may be centered relative to the first conductive via (591) and the second conductive via (592) and may have a larger diameter than the first conductive via (591) and the second conductive via (592).

[0139] In one embodiment, the conductive pad (577) may be disposed between the first intermediate layer (532-1) and the second intermediate layer (532-2) of the substrate (321) and may extend from the second conductive via (592) and the third conductive via (593). The conductive pad (577) may be centered relative to the second conductive via (592) and the third conductive via (593) and may have a larger diameter than the second conductive via (592) and the third conductive via (593).

[0140] In one embodiment, the conductive pad (578) may be disposed between the second intermediate layer (532-2) and the third intermediate layer (532-3) of the substrate (321) and may extend from the third conductive via (593) and the fourth conductive via (594). The conductive pad (578) may be centered with respect to the third conductive via (593) and the fourth conductive via (594) and may have a larger diameter than the third conductive via (593) and the fourth conductive via (594).

[0141] In one embodiment, the conductive pad (579) may be disposed between the third middle layer (532-3) and the top layer (533) of the substrate (321) and may extend from the fourth conductive via (594) and the fifth conductive via (595). The conductive pad (579) may be centered with respect to the fourth conductive via (594) and the fifth conductive via (595) and may have a larger diameter than the fourth conductive via (594) and the fifth conductive via (595). Alternatively, at least one of the conductive pads (576, 577, 578, and 579) of the second conductive via pillar (322-2) may be omitted.

[0142] In one embodiment, the distance (e.g., pitch (P1)) between the center of the conductive pad (586) of the first conductive via pillar (322-1) and the center of the conductive pad (596) of the second conductive via pillar (322-2) may be 0.35 mm or less.

[0143] In one embodiment, the distance (e.g., pitch (P1)) between the center of the conductive pad (587) of the first conductive via pillar (322-1) and the center of the conductive pad (597) of the second conductive via pillar (322-2) may be 0.35 mm or less.

[0144] In one embodiment, the distance (e.g., pitch (P1)) between the center of the first conductive via (581) of the first conductive via pillar (322-1) and the center of the first conductive via (591) of the second conductive via pillar (322-2) may be 0.35 mm or less.

[0145] In one embodiment, the distance (e.g., pitch (P1)) between the center of the fifth conductive via (585) of the first conductive via pillar (322-1) and the center of the fifth conductive via (595) of the second conductive via pillar (322-2) may be 0.35 mm or less.

[0146] For example, but not limitation, the diameters of the conductive vias of the first conductive via pillar (322-1) located on the outer layers of the first interposer (320) may be smaller than the diameters of the conductive vias of the first conductive via pillar (322-1) located on the inner layers of the first interposer (320). For example, the first conductive via (581) and the fourth conductive via (584) of the first conductive via pillar (322-1) may be located within the lowermost layer (531) and the uppermost layer (533), which are the outer layers of the first interposer (320), respectively. The second conductive via (582), the third conductive via (583), and the fourth conductive via (584) of the first conductive via pillar (322-1) may be positioned within the first intermediate layer (532-1), the second intermediate layer (532-2), and the third intermediate layer (532-3), which are inner layers of the first interposer (320), respectively. The diameters (e.g., lengths in the direction perpendicular to the first direction (1)) of the first conductive via (581) and the fourth conductive via (584) may be smaller than the diameters of the second conductive via (582), the third conductive via (583), and the fourth conductive via (584). For example, but not limited to, the diameters of the first conductive via (581) and / or the fourth conductive via (584) may be about 90 μm, and the diameters of the second conductive via (582), the third conductive via (583), and / or the fourth conductive via (584) may be about 100 μm.

[0147] For example, but not limited to, the diameters of the conductive pads of the first conductive via pillar (322-1) located on the outer layers of the first interposer (320) may be smaller than the diameters of the conductive pads of the first conductive via pillar (322-1) located on the inner layers (or inside) of the first interposer (320). For example, the conductive pad (586) of the first conductive via pillar (322-1) may be located on the lowest layer (531), which is an outer layer of the first interposer (320), and the conductive pad (587) may be located on the highest layer (533), which is another outer layer of the first interposer (320). The conductive pads (571, 572, 573, 574) of the first conductive via pillar (322-1) may be located on the inside of the first interposer (320) or on a plurality of intermediate layers (532) that are inner layers of the first interposer (320). The diameters (e.g., lengths in the direction perpendicular to the first direction (1)) of the conductive pads (586 and 587) of the first conductive via pillar (322-1) may be smaller than the diameters of the conductive pads (571, 572, 573, and 574). For example, but not limited to, the diameters of the conductive pads (586 and 587) of the first conductive via pillar (322-1) may be about 180 μm, and the diameters of the conductive pads (571, 572, 573, and 574) may be about 200 μm.

[0148] For example, but not limited to, a first distance between a conductive pad of an outer layer of a first conductive via pillar (322-1) and a conductive pad of an outer layer of a second conductive via pillar (322-2) may be greater than a second distance between a conductive pad of an inner layer of the first conductive via pillar (322-1) and a conductive pad of an inner layer of the second conductive via pillar (322-2). For example, the first distance between an edge of a conductive pad (586) of the first conductive via pillar (322-1) and an edge of a conductive pad (596) of the second conductive via pillar (322-2) may be greater than a second distance between an edge of a conductive pad (571) of the first conductive via pillar (322-1) and an edge of a conductive pad (576) of the second conductive via pillar (322-2). As a non-limiting example, the first distance may be about 120 μm and the second distance may be about 100 μm.

[0149] For example, but not limited to, the thicknesses of the conductive pads of the first conductive via pillar (322-1) located on the outer layers of the first interposer (320) may be greater than the thicknesses of the conductive pads of the first conductive via pillar (322-1) located on the inner layers (or inside) of the first interposer (320). For example, the thicknesses (e.g., lengths along the first direction (1)) of the conductive pads (586 and 587) of the first conductive via pillar (322-1) may be greater than the thicknesses of the conductive pads (571, 572, 573, and 574). For example, but not limited to, the thicknesses of the conductive pads (586 and 587) of the first conductive via pillar (322-1) may be about 25 μm, and the thicknesses of the conductive pads (571, 572, 573, and 574) may be about 20 μm.

[0150] The description of the first interposer (320) provided with reference to FIG. 5 can be applied to the second interposer (340) in a substantially identical or corresponding manner. For example, the plurality of dielectric layers of the substrate (341) of the second interposer (340) can include a lowermost layer (e.g., a lowermost layer (531)), a uppermost layer (e.g., a uppermost layer (533)), and a plurality of intermediate layers (e.g., a plurality of intermediate layers (532)). The lowermost layer of the second interposer (340) can be adjacent to the first interposer (320), and the uppermost layer of the second interposer (340) can be adjacent to the second printed circuit board (360).

[0151] For example, each of the plurality of conductive via pillars (342) of the second interposer (340) may include stacked conductive vias (e.g., conductive vias 581, 582, 583, 584, and 585) penetrating each of the plurality of dielectric layers of the substrate (341). For example, the plurality of conductive via pillars (342) of the second interposer (340) may include a first conductive via pillar (e.g., a first conductive via pillar (322-1)) and a second conductive via pillar (e.g., a second conductive via pillar (322-2)). The first conductive via pillar of the second interposer (340) may include a conductive via (e.g., a fifth conductive via (585)) penetrating the top layer of the substrate (341), and the second conductive via pillar of the second interposer (340) may include another conductive via (e.g., a fifth conductive via (595)) penetrating the top layer of the substrate (341). A pitch (e.g., a pitch (P2)) between the conductive via of the first conductive via pillar of the second interposer (340) and the other conductive via of the second conductive via pillar may be 0.35 mm or less.

[0152] For example, the first conductive via pillar of the second interposer (340) may include a conductive pad (e.g., a conductive pad (587)) included in a plurality of second conductive pads (357) of the second interposer (340) and extending from the conductive via of the first conductive via pillar. For example, the second conductive via pillar of the second interposer (340) may include another conductive pad (e.g., a conductive pad (597)) included in a plurality of second conductive pads (357) of the second interposer (340) and extending from the other conductive via of the second conductive via pillar. For example, the pitch (e.g., pitch (P2)) between the conductive pad of the first conductive via pillar of the second interposer (340) and the other conductive pad of the second conductive via pillar may be 0.35 mm or less.

[0153] Optionally or additionally, the first conductive via pillar and / or the second conductive via pillar of the second interposer (340) may include one or more conductive pads (e.g., conductive pads (571, 572, 573, and 574)) positioned within the substrate (341).

[0154] For example, but not limitation, the diameters of the conductive vias of the first conductive via pillars located on the outer layers of the second interposer (340) may be smaller than the diameters of the conductive vias of the first conductive via pillars located on the inner layers of the second interposer (340). For example, but not limitation, the diameters of the conductive pads of the first conductive via pillars located on the outer layers of the second interposer (340) may be smaller than the diameters of the conductive pads of the first conductive via pillars located on the inner layers (or inside) of the second interposer (340). For example, but not limitation, a third distance between a conductive pad of an outer layer of the first conductive via pillar of the second interposer (340) and a conductive pad of an outer layer of the second conductive via pillar of the second interposer (340) may be greater than a second distance between a conductive pad of an inner layer of the first conductive via pillar of the second interposer (340) and a conductive pad of an inner layer of the second conductive via pillar of the second interposer (340). For example, but not limitation, thicknesses of conductive pads of the first conductive via pillars located on the outer layers of the second interposer (340) may be greater than thicknesses of conductive pads of the first conductive via pillars located on the inner layers (or inside) of the second interposer (340).

[0155] Each of the plurality of conductive via pillars (322) of the first interposer (320) illustrated in FIGS. 4 and 5 is illustrated as being aligned in a vertical direction (e.g., in the first direction (1)), but is not limited thereto. For example, the plurality of conductive via pillars (322) of the first interposer (320) may include a conductive via pillar (e.g., conductive vias 582, 583, and 584) located in an inner layer (e.g., a plurality of middle layers (532)) of the first interposer (320) that is off-centered with respect to a conductive via (e.g., conductive vias 581 and 585) located in an outer layer (e.g., a lowermost layer (531) and a topmost layer (533)) of the first interposer (320).

[0156] As described above, the first interposer (320) and the second interposer (340) can provide conductive vias having pitches (p1 and p2) of 0.35 mm or less. Accordingly, the wiring density of the printed circuit board assembly (301) can be improved, and the miniaturization of the printed circuit board assembly (301) can be possible. The conductive vias of the first interposer (320) and the second interposer (340) can be formed using a laser. In a comparative example, instead of the method using a laser, holes for the conductive vias can be formed using a mechanical method (e.g., CNC (computer numerical control) machining). However, this method has limitations in the pitch of conductive vias that can be implemented (for example, it cannot provide a pitch less than the pitches (p1 and p2) of the first interposer (320) and the second interposer (340)) due to constraints in the size of the drill bit (e.g., at least 150 μm), the processing tolerance (e.g., at least 75 μm), and the thickness of the plating layer on the inner wall of the via hole (e.g., at least 12 μm).

[0157] According to one embodiment, the first interposer (320) and the second interposer (340) may have a predetermined height for arranging components within a space (305) of the printed circuit board assembly (301). The plurality of conductive via pillars (322) of the first interposer (320) and the plurality of conductive via pillars (342) of the second interposer (340) may be formed by stacking conductive vias formed using a laser (hereinafter referred to as laser vias). Even if there is a limitation on the depth of a hole that can be processed using a laser, the required heights of the first interposer (320) and the second interposer (340) may be implemented by stacking multiple layers including laser vias as described above.

[0158] In a comparative example, the printed circuit board assembly (301) may include one interposer between the first printed circuit board (310) and the second printed circuit board (360), instead of the first interposer (320) and the second interposer (340). In order for the one interposer to provide the same height as the first interposer (320) and the second interposer (340), the number of layers of the one interposer must be greater than the number of layers of the first interposer (320) or the number of layers of the second interposer (340). However, process deviation may occur while stacking each layer, and as the number of layers stacked increases, this process deviation may accumulate. According to one embodiment, the printed circuit board assembly (301) has a structure in which two interposers, such as a first interposer (320) and a second interposer (340), are combined, thereby reducing process deviations that may occur during the manufacturing of the printed circuit board assembly (301). In addition, by reducing process deviations, the yield can be improved. However, the number of interposers included in the printed circuit board assembly (301) is not limited to two according to the above-described description. For example, the printed circuit board assembly (301) may include two or more interposers. For example, the printed circuit board assembly (301) may further include one or more interposers disposed between the first interposer (320) and the second interposer (340).

[0159] Meanwhile, depending on the model of the electronic device (200), the height provided by the interposer(s) that connect the first printed circuit board (310) and the second printed circuit board (360) may be different. For example, in the case of the first model, the interposer(s) between the first printed circuit board (310) and the second printed circuit board (360) may require a first height, and in the case of the second model, the interposer(s) between the first printed circuit board (310) and the second printed circuit board (360) may require a second height that is greater than the first height. In the manufacturing of the first model and the second model, a first interposer (320) having a height corresponding to the first height may be common. For example, in the case of the first model, the first height can be satisfied by combining the first printed circuit board (310) and the second printed circuit board (360) through the first interposer (320). In addition, in the case of the second model, the second height, which is greater than the first height, can be satisfied by combining the first printed circuit board (310) and the second printed circuit board (360) through the first interposer (320) and the second interposer (340). In this way, by commonizing the components required depending on the model, the manufacturing cost can be reduced.

[0160] FIGS. 6A and 6B are drawings showing interposers according to one embodiment.

[0161] With reference to FIG. 5, the plurality of intermediate layers (532) of the substrate (321) of the first interposer (320) has been described as including three layers, but is not limited thereto. For example, as illustrated in FIG. 6A, the first interposer (320) (or the substrate (341)) may include three or more intermediate layers (632). For example, but not limited thereto, the first interposer (320) having intermediate layers (632) may include nine dielectric layers and ten conductive layers formed on the nine dielectric layers. The height (h1) of the first interposer (320) including intermediate layers (632) may be about 830 μm, but is not limited thereto.

[0162] Additionally, the second interposer (340) (or substrate (341)) may include three or more intermediate layers (652). For example, but not limited to, the second interposer (340) having intermediate layers (652) may include nine dielectric layers and ten conductive layers formed on the nine dielectric layers. The height (h2) of the second interposer (340) including intermediate layers (652) may be substantially the same as, but not limited to, the height (h1) of the first interposer (320) (e.g., may be different).

[0163] For example, but not limited to, the height (h3) of the joint between the first interposer (320) and the second interposer (340) may be about 50 μm. The height (h3) may be, for example, the distance between the second plurality of conductive pads (337) of the first interposer (320) and the first plurality of conductive pads (356) of the second interposer (340). The height (h3) may be, for example, the thickness or height of a bonding material (e.g., solder) interposed between the second plurality of conductive pads (337) of the first interposer (320) and the first plurality of conductive pads (356) of the second interposer (340).

[0164] Referring to FIG. 6A, according to one embodiment, the first interposer (320) may further include a first conductive layer (628) and a second conductive layer (629) opposite to the first conductive layer (628). The first conductive layer (628) may form an outer side of the first interposer (320), and the second conductive layer (629) may form an inner side of the first interposer (320). The inner side of the first interposer (320) may face an internal space of the printed circuit board assembly (301) (e.g., space (305) of FIG. 3).

[0165] According to one embodiment, the second interposer (340) may further include a first conductive layer (648) and a second conductive layer (649) opposite to the first conductive layer (648). The first conductive layer (648) may form an outer side of the second interposer (340), and the second conductive layer (649) may form an inner side of the second interposer (340). The inner side of the second interposer (340) may face an internal space of the printed circuit board assembly (301) (e.g., space (305) of FIG. 3).

[0166] Referring to FIG. 6b, according to one embodiment, the first interposer (320) and the second interposer (340) may provide a first electrical path (610) that vertically connects the first printed circuit board (310) and the second printed circuit board (360).

[0167] Additionally, the first interposer (320) may provide a second electrical path (620) for connecting the conductive pads (611) and (612) of the first printed circuit board (310). A conductive pad (613) may be positioned between the conductive pads (611) and (612) of the first printed circuit board (310). The second electrical path (620) may include, for example, but not limited to, a first section (621) extending from a conductive pad (611) of the first printed circuit board (310) so as to vertically penetrate a portion of the first interposer (320), a second section (622) extending parallel to the first printed circuit board (310) from the first section (621), and a third section (623) extending from the second section (622) to the conductive pad (612) of the first printed circuit board (310) so as to vertically penetrate a portion of the first interposer (320).

[0168] Additionally, the second interposer (340) may provide a third electrical path (630) for connecting the conductive pads (661) and (662) of the second printed circuit board (360). A conductive pad (663) may be positioned between the conductive pads (661) and (662) of the second printed circuit board (360). The third electrical path (630) may include, for example, but not limited to, a first section (631) extending from a conductive pad (661) of a second printed circuit board (360) to vertically penetrate a portion of the second interposer (340), a second section (632) extending parallel to the second printed circuit board (360) from the first section (631), and a third section (633) extending from the second section (632) to the conductive pad (662) of the second printed circuit board (360) to vertically penetrate a portion of the second interposer (340).

[0169] Additionally, the first interposer (320) and the second interposer (340) may provide a fourth electrical path (640) for connecting a conductive pad (614) of the first printed circuit board (310) and a conductive pad (664) of the second printed circuit board (360). The conductive pad (614) of the first printed circuit board (310) and the conductive pad (664) of the second printed circuit board (360) may not be aligned with each other (e.g., with respect to a direction perpendicular to the first printed circuit board (310). For example, but not limited to, the fourth electrical path (640) may include a first section (641) extending from a conductive pad (614) of the first printed circuit board (310) to vertically penetrate a portion of the first interposer (320), a second section (642) extending parallel to the first printed circuit board (310) from the first section (641), and a third section (643) extending from the second section (642) to a conductive pad (664) of the second printed circuit board (360) to vertically penetrate a portion of the first interposer (320) and all of the second interposer (340).

[0170] Additionally, the first interposer (320) and the second interposer (340) may provide a fifth electrical path (650) for connecting a conductive pad (665) of the second printed circuit board (360) and a conductive pad (615) of the first printed circuit board (310). The conductive pad (665) of the second printed circuit board (360) and the conductive pad (615) of the first printed circuit board (310) may not be aligned with each other (e.g., with respect to a direction perpendicular to the second printed circuit board (360)). For example, but not limited to, the fifth electrical path (650) may include a first section (651) extending from a conductive pad (665) of a second printed circuit board (360) to vertically penetrate a portion of the second interposer (340), a second section (652) extending parallel to the second printed circuit board (360) from the first section (651), and a third section (653) extending from the second section (652) to a conductive pad (615) of the first printed circuit board (310) to vertically penetrate a portion of the second interposer (340) and all of the first interposer (320).

[0171] In one embodiment, at least one of the conductive pads (611, 612, 613, 614, and 615) of the first printed circuit board (310) that are connected to the second electrical path (620), the third electrical path (630), the fourth electrical path (640), and the fifth electrical path (650) may be a conductive pad of another printed circuit board, distinct from the first printed circuit board (310) and the second printed circuit board (360).

[0172] In one embodiment, at least one of the conductive pads (611, 612, 613, 614, and 615) of the first printed circuit board (310) connected to the second electrical path (620), the third electrical path (630), the fourth electrical path (640), and the fifth electrical path (650) may be a conductive pad of another interposer distinct from the first interposer (320) and the second interposer (340).

[0173] In one embodiment, at least one of the conductive pads (661, 662, 663, 664, and 665) of the second printed circuit board (360) connected to the second electrical path (620), the third electrical path (630), the fourth electrical path (640), and the fifth electrical path (650) may be a conductive pad of another printed circuit board, distinct from the first printed circuit board (310) and the second printed circuit board (360).

[0174] In one embodiment, at least one of the conductive pads (661, 662, 663, 664, and 665) of the second printed circuit board (360) connected to the second electrical path (620), the third electrical path (630), the fourth electrical path (640), and the fifth electrical path (650) may be a conductive pad of another interposer distinct from the first interposer (320) and the second interposer (340).

[0175] In one embodiment, the second electrical path (620), the third electrical path (630), the fourth electrical path (640), and the fifth electrical path (650) may be formed at least in part by conductive via pillars (e.g., a plurality of conductive via pillars (322) and / or a plurality of conductive via pillars (342)) included in the first interposer (320) and / or the second interposer (340).

[0176] FIGS. 7A and 7B are drawings showing interposers according to one embodiment.

[0177] Referring to FIG. 7A, according to one embodiment, a first interposer (320) may include a first portion (721) and a second portion (722) extending from the first portion (721). The first portion (721) of the first interposer (320) may overlap with the second interposer (340). For example, the first portion (721) of the first interposer (320) may overlap with the second interposer (340) vertically (e.g., in the first direction (1)).

[0178] In one embodiment, the second portion (722) of the first interposer (320) may not overlap with the second interposer (340). For example, the second portion (722) of the first interposer (320) may extend from the first portion (721) in an outward direction of the second interposer (340) (e.g., away from the space (305)). For example, the second portion (722) of the first interposer (320) may protrude out of the second interposer (340) when viewed from above (e.g., when viewed in the first direction (1)).

[0179] According to one embodiment, the printed circuit board assembly (301) may include one or more connectors (750) disposed on the second portion (722) of the first interposer (320). The one or more connectors (750) may include an antenna contact (e.g., an elastomeric conductor such as a C-clip) and / or a mating connector (e.g., a receptacle) to which a connector external to the printed circuit board assembly (301) (e.g., a plug) may be mated.

[0180] Although not shown, the first interposer (320) may include one or more first conductive traces configured to carry signals associated with one or more connectors (750). The one or more first conductive traces of the first interposer (320) may extend from corresponding one or more of the plurality of conductive via posts (322) of the first interposer (320) to one or more connectors (750).

[0181] According to one embodiment, the first interposer (320) may further include one or more second conductive traces (or conductive patterns) configured to function as an antenna (e.g., antenna radiator) of the electronic device (200). The one or more second conductive traces of the first interposer (320) may extend from corresponding one or more other conductive via posts (322) of the first interposer (320) and may be electrically connected to corresponding one or more conductive pads (316) of the first printed circuit board (310) through the conductive via posts (322). For example, referring to FIG. 7B, the one or more second conductive traces may include a plurality of conductive patches (752). The plurality of conductive patches (752) may be configured to operate as an array antenna. A plurality of conductive patches (752) may be arranged on the second portion (722) of the first interposer (320). The plurality of conductive patches (752) are illustrated as having a rectangular shape, but are not limited thereto, and may have various shapes such as circular shapes. The plurality of conductive patches (752) are illustrated as having a 1x4 arrangement, but are not limited thereto, and may have various arrangements such as 1x3 or 2x2, for example.

[0182] The one or more second conductive traces may further include a plurality of conductive patches (754). The plurality of conductive patches (754) may be configured to operate as an array antenna. The plurality of conductive patches (754) may be disposed on the second portion (722) of the first interposer (320). The plurality of conductive patches (752) are illustrated as having a rectangular shape, but are not limited thereto, and may have various shapes, such as circular shapes. The plurality of conductive patches (754) are illustrated as having a 1x4 arrangement, but are not limited thereto, and may have various arrangements, such as, for example, a 1x3 or a 2x2 arrangement.

[0183] FIG. 8 and FIG. 9 are drawings showing a method of combining a first interposer and a second interposer according to one embodiment.

[0184] Referring to FIG. 8, a first array (851) including first interposers (820) and a second array (852) including second interposers (840) may be provided. Each of the first interposers (820) of the first array (851) may be a first interposer (320). In addition, each of the second interposers (840) of the second array (852) may be a second interposer (340). Thereafter, the first array (851) and the second array (852) may be aligned so that the first interposers (820) face the second interposers (840), respectively. Thereafter, the first array (851) and the second array (852) may be coupled to each other. For example, the first array (851) and the second array (852) may be joined to each other through soldering. For example, surface mount technology may be used for the soldering of the first array (851) and the second array (852). By joining the first array (851) and the second array (852), the first interposers (820) and the second interposers (840) may be joined, respectively. Thereafter, through a routing process, individually separated interposer assemblies (802) may be manufactured. The interposer assemblies (802) may include the first interposers (820) and the second interposers (840), respectively. For example, each of the interposer assemblies (802) may include the first interposer (320) and the second interposer (340) joined to the first interposer (320). By combining the first interposer (320) and the second interposer (340) in an array form, process deviation (e.g., misalignment) can be reduced.

[0185] Unlike the above, among the first interposers (820) and the second interposers (840), only the first interposers (820) may be provided in an array form, and the second interposers (840) may be individually coupled to the first interposers (820). For example, referring to FIG. 9, a first array (951) including the first interposers (920) and second interposers (940) may be provided. Each of the first interposers (920) of the first array (951) may be a first interposer (320). In addition, each of the second interposers (940) may be a second interposer (340). Thereafter, the second interposers (940) may be aligned on the first array (951) so as to face each of the first interposers (920). Thereafter, the first interposers (920) and the second interposers (940) of the first array (951) may be respectively coupled (e.g., via soldering). Thereafter, individually separated interposer assemblies (902) may be manufactured through a routing process. The interposer assemblies (902) may each include the first interposers (920) and the second interposers (940). For example, each of the interposer assemblies (902) may include the first interposer (320) and the second interposer (340) coupled to the first interposer (320).

[0186] The technical problems to be achieved in the present disclosure are not limited to the technical problems mentioned above, and other technical problems not mentioned will be clearly understood by a person having ordinary knowledge in the technical field to which the present disclosure pertains.

[0187] According to one embodiment, an electronic device (200) may include a first printed circuit board (310), a first interposer (320) disposed on the first printed circuit board (310), a second interposer (340) disposed on the first interposer (320), and a second printed circuit board (360) disposed on the second interposer (340). The first printed circuit board (310) and the second printed circuit board (360) may be electrically connected through the first interposer (320) and the second interposer (340). The first printed circuit board (310) may include a plurality of conductive pads (316) spaced apart from each other. The first interposer (320) may include a plurality of conductive via pillars (322) that are respectively aligned with the plurality of conductive pads (316) of the first printed circuit board (310). A first conductive via pillar (322-1) of the plurality of conductive via pillars (322) of the first interposer (320) may include a first conductive pad (586) electrically connected to a first conductive pad among the plurality of conductive pads (316) of the first printed circuit board (310). A second conductive via pillar (322-2) of the plurality of conductive via pillars (322) of the first interposer (320) may include a second conductive pad (596) electrically connected to a second conductive pad among the plurality of conductive pads (316) of the first printed circuit board (310). The pitch between the first conductive pad (586) of the first interposer (320) and the second conductive pad (596) of the first interposer (320) may be 0.35 mm or less.

[0188] In one embodiment, the first interposer (320) may include a plurality of dielectric layers penetrated by the plurality of conductive via pillars (322). The plurality of dielectric layers of the first interposer (320) may include a lowermost layer (531) adjacent to the first printed circuit board (310), a uppermost layer (533) adjacent to the second interposer (340), and a plurality of intermediate layers (532) between the lowermost layer (531) and the uppermost layer (533) of the first interposer (320).

[0189] In one embodiment, the first conductive via pillar (322-1) of the first interposer (320) may include a plurality of conductive vias that are stacked on each other. Each of the plurality of conductive vias of the first interposer (320) may penetrate a corresponding dielectric layer among the plurality of dielectric layers of the first interposer (320).

[0190] In one embodiment, the plurality of conductive vias of the first conductive via pillar (322-1) of the first interposer (320) may include a first conductive via (581) penetrating the lowest layer (531) of the first interposer (320) and extending from the first conductive pad (586) of the first interposer (320). The second conductive via pillar (322-2) of the first interposer (320) may include a second conductive via (591) penetrating the lowest layer (531) of the first interposer (320) and extending from the second conductive pad (596) of the first interposer (320). The pitch between the first conductive via (581) of the first conductive via pillar (322-1) and the second conductive via (591) of the second conductive via pillar (322-2) may be 0.35 mm or less.

[0191] In one embodiment, the plurality of intermediate layers (532) of the first interposer (320) may include a first intermediate layer (532-1) disposed on the lowest layer (531). The first conductive via pillar (322-1) of the first interposer (320) may include a first conductive via (581) penetrating the lowest layer (531) of the first interposer (320), a second conductive via (582) stacked on the first conductive via (581) and penetrating the first intermediate layer (532-1) of the first interposer (320), and a conductive pad (571) disposed between the lowest layer (531) of the first interposer (320) and the first intermediate layer (532-1). The conductive pad (571) of the first interposer (320) may be centered relative to the first conductive via (581) and the second conductive via (582), and may have a larger diameter than the first conductive via (581) and the second conductive via (582).

[0192] In one embodiment, the cross-sectional shape of at least one of the plurality of conductive vias of the first conductive via pillar (322-1) of the first interposer (320) may have a trapezoidal shape.

[0193] In one embodiment, the second printed circuit board (360) may include a plurality of spaced apart conductive pads (366). The second interposer (340) may include a plurality of conductive via pillars (342) aligned with the plurality of conductive pads (366) of the second printed circuit board (360), respectively. A first conductive via pillar of the plurality of conductive via pillars (342) of the second interposer (340) may include a first conductive pad electrically connected to a first conductive pad of the plurality of conductive pads (366) of the second printed circuit board (360). The second conductive via pillar of the plurality of conductive via pillars (342) of the second interposer (340) may include a second conductive pad electrically connected to a second conductive pad among the plurality of conductive pads (366) of the second printed circuit board (360). A pitch between the first conductive pad of the second interposer (340) and the second conductive pad of the second interposer (340) may be 0.35 mm or less.

[0194] In one embodiment, the second interposer (340) may include a plurality of dielectric layers penetrated by the plurality of conductive via pillars (342) of the second interposer (340). The plurality of dielectric layers of the second interposer (340) may include a lowermost layer adjacent to the first interposer (320), a uppermost layer adjacent to the second printed circuit board (360), and a plurality of intermediate layers between the lowermost layer of the second interposer (340) and the uppermost layer of the second interposer (340).

[0195] In one embodiment, the first conductive via pillar of the second interposer (340) may include a plurality of conductive vias that are stacked on each other. Each of the plurality of conductive vias of the second interposer (340) may penetrate a corresponding dielectric layer among the plurality of dielectric layers of the second interposer (340).

[0196] In one embodiment, the plurality of conductive vias of the first conductive via pillar of the second interposer (340) may include a first conductive via penetrating the top layer of the second interposer (340) and extending from the first conductive pad of the second interposer (340). The second conductive via pillar of the second interposer (340) may include a second conductive via penetrating the top layer of the second interposer (340) and extending from the second conductive pad of the second interposer (340). A pitch between the first conductive via of the second interposer (340) and the second conductive via of the second interposer (340) may be 0.35 mm or less.

[0197] In one embodiment, the plurality of intermediate layers of the second interposer (340) may include a first intermediate layer disposed on the lowest layer of the second interposer (340). The first conductive via pillar of the second interposer (340) may include a first conductive via penetrating the lowest layer of the second interposer (340), a second conductive via stacked on the first conductive via of the second interposer (340) and penetrating the first intermediate layer of the second interposer (340), and a conductive pad disposed between the lowest layer of the second interposer (340) and the first intermediate layer of the second interposer (340). The conductive pad of the second interposer (340) may be centered relative to the first conductive via of the second interposer (340) and the second conductive via of the second interposer (340), and may have a larger diameter than the first conductive via of the second interposer (340) and the second conductive via of the second interposer (340).

[0198] In one embodiment, at least one of the plurality of conductive vias of the first conductive via pillar of the second interposer (340) may have a trapezoidal cross-sectional shape.

[0199] In one embodiment, the first printed circuit board (310) may include another conductive pad. The first interposer (320) may include a conductive trace electrically connected to the another conductive pad of the first printed circuit board (310) and configured to function as an antenna of the electronic device (200).

[0200] In one embodiment, the first interposer (320) may include a first portion (721) that overlaps the second interposer (340), and a second portion (722) that extends from the first portion (721) of the first interposer (320) and does not overlap the second interposer (340). The electronic device (200) may include one or more connectors (750) disposed on the second portion (722) of the first interposer (320).

[0201] In one embodiment, the one or more connectors (750) may include one or more antenna contacts.

[0202] In one embodiment, the first printed circuit board (310) may include a first surface (310A) and a second surface (310B) opposite the first surface (310A) of the first printed circuit board (310) and facing in the direction of the second printed circuit board (360). The second surface (310B) of the first printed circuit board (310) may include a first area surrounded by the first interposer (320). The second printed circuit board (360) may include a first surface (360A) and a second surface (360B) opposite the first surface (360A) of the second printed circuit board (360) and facing in the direction of the first printed circuit board (310). The second surface (360B) of the second printed circuit board (360) may include a second region that is surrounded by the second interposer (340) and corresponds to the first region of the second surface of the first printed circuit board (310). The second printed circuit board (360) may further include one or more electronic components arranged on at least one of the first region of the second surface (310B) of the first printed circuit board (310) and the second region of the second surface (360B) of the second printed circuit board (360).

[0203] According to one embodiment, a printed circuit board assembly (301) may include a first printed circuit board (310), a first interposer (320) disposed on the first printed circuit board (310), a second interposer (340) disposed on the first interposer (320), and a second printed circuit board (360) disposed on the second interposer (340). The first printed circuit board (310) may include a first plurality of conductive pads (326) spaced apart from each other and facing the direction of the first interposer (320). The first interposer (320) may include a first plurality of conductive via pillars (322) aligned with the first plurality of conductive pads (316) of the first printed circuit board (310), respectively. The second printed circuit board (360) may include a second plurality of conductive pads (366) facing the direction of the second interposer (340), spaced apart from each other, and aligned with the first plurality of conductive pads (316) of the first printed circuit board (310), respectively. The second interposer (340) may include a second plurality of conductive via pillars (342) aligned with the second plurality of conductive pads (366) of the second printed circuit board (360), respectively. The first plurality of conductive pads (316) of the first printed circuit board (310) may be electrically connected to the second plurality of conductive pads (366) of the second printed circuit board (360) through the first plurality of conductive via pillars (322) of the first interposer (320) and the second plurality of conductive via pillars (342) of the second interposer (340). Pitches between the first plurality of conductive via pillars (322) of the first interposer (320) may be 0.35 mm or less. Pitches between the second plurality of conductive via pillars (342) of the second interposer (340) may be 0.35 mm or less.

[0204] In one embodiment, the first interposer (320) may include a plurality of dielectric layers penetrated by the first plurality of conductive via pillars (322). The plurality of dielectric layers of the first interposer (320) may include a lowermost layer (531) adjacent to the first printed circuit board (310), a uppermost layer (533) adjacent to the second interposer (340), and a plurality of intermediate layers (532) between the lowermost layer (531) and the uppermost layer (533) of the first interposer (320). The second interposer (340) may include a plurality of dielectric layers penetrated by the second plurality of conductive via pillars (342) of the second interposer (340). The plurality of dielectric layers of the second interposer (340) may include a lowermost layer adjacent to the first interposer (320), a uppermost layer adjacent to the second printed circuit board (360), and a plurality of intermediate layers between the lowermost layer of the second interposer (340) and the uppermost layer of the second interposer (340).

[0205] In one embodiment, the first plurality of conductive via pillars (322) of the first interposer (320) may include a first conductive via pillar (322-1). The first conductive via pillar (322-1) of the first interposer (320) may include a plurality of conductive vias that are stacked on each other. The plurality of conductive vias of the first interposer (320) may each penetrate the plurality of dielectric layers of the first interposer (320), and the second plurality of conductive via pillars (342) of the second interposer (340) may include a first conductive via pillar. The first conductive via pillar of the second interposer (340) may include a plurality of conductive vias that are stacked on each other. The plurality of conductive vias of the second interposer (340) can each penetrate the plurality of dielectric layers of the second interposer (340).

[0206] In one embodiment, the first interposer (320) may include a first portion (721) that overlaps the second interposer (340) and a second portion (722) that extends from the first portion (721) of the first interposer (320) and does not overlap the second interposer (340). The printed circuit board assembly (301) may include one or more connectors (750) disposed on the second portion (722) of the first interposer (320).

[0207] The effects that can be obtained from the present disclosure are not limited to the effects mentioned above, and other effects that are not mentioned will be clearly understood by a person having ordinary skill in the art to which the present disclosure pertains.

[0208] Electronic devices according to the various embodiments disclosed in this document may take various forms. Electronic devices may include, for example, portable communication devices (e.g., smartphones), computer devices, portable multimedia devices, portable medical devices, cameras, wearable devices, or home appliances. Electronic devices according to the embodiments disclosed in this document are not limited to the aforementioned devices.

[0209] The various embodiments of this document and the terminology used therein are not intended to limit the technical features described in this document to specific embodiments, but should be understood to include various modifications, equivalents, or substitutes of the embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of the items, unless the context clearly indicates otherwise. In this document, each of the phrases "A or B", "at least one of A and B", "at least one of A or B", "A, B, or C", "at least one of A, B, and C", and "at least one of A, B, or C" can include any one of the items listed together in the corresponding phrase among those phrases, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used merely to distinguish one component from another, and do not limit the components in any other respect (e.g., importance or order). When a component (e.g., a first component) is referred to as "coupled" or "connected" to another component (e.g., a second component), with or without the terms "functionally" or "communicatively," it means that the component can be connected to the other component directly (e.g., wired), wirelessly, or through a third component.

[0210] The term "module" used in various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit. A module may be an integral component, or a minimum unit or part of such a component that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0211] Various embodiments of the present document may be implemented as software (e.g., a program (140)) including one or more commands stored in a storage medium (e.g., an internal memory (136) or an external memory (138)) readable by a machine (e.g., an electronic device (101)). For example, a processor (e.g., a processor (120)) of the machine (e.g., an electronic device (101)) may call at least one command among the one or more commands stored from the storage medium and execute it. This enables the machine to operate to perform at least one function according to the at least one command called. The one or more commands may include code generated by a compiler or code executable by an interpreter. The machine-readable storage medium may be provided in the form of a non-transitory storage medium. Here, 'non-transitory' simply means that the storage medium is a tangible device and does not contain signals (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently or temporarily on the storage medium.

[0212] According to one embodiment, the method according to various embodiments disclosed in the present document may be provided as a computer program product. The computer program product may be traded between sellers and buyers as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)) or may be provided through an application store (e.g., Play Store). TM ) or directly between two user devices (e.g., smart phones), online distribution (e.g., downloading or uploading). In the case of online distribution, at least a portion of the computer program product may be at least temporarily stored or temporarily created in a machine-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or an intermediary server.

[0213] According to various embodiments, each component (e.g., a module or a program) of the above-described components may include one or more entities, and some of the entities may be separated and placed in other components. According to various embodiments, one or more components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Alternatively or additionally, a plurality of components (e.g., a module or a program) may be integrated into a single component. In such a case, the integrated component may perform one or more functions of each of the plurality of components identically or similarly to those performed by the corresponding component among the plurality of components prior to the integration. According to various embodiments, the operations performed by a module, program, or other component may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In electronic devices, First printed circuit board; A first interposer disposed on the first printed circuit board; a second interposer disposed on the first interposer; and A second printed circuit board disposed on the second interposer, The first printed circuit board and the second printed circuit board are electrically connected through the first interposer and the second interposer, The first printed circuit board includes a plurality of conductive pads spaced apart from each other, The first interposer comprises a plurality of conductive via pillars each aligned with the plurality of conductive pads of the first printed circuit board, The first conductive via pillar of the plurality of conductive via pillars of the first interposer includes a first conductive pad electrically connected to a first conductive pad among the plurality of conductive pads of the first printed circuit board, The second conductive via pillar of the plurality of conductive via pillars of the first interposer includes a second conductive pad electrically connected to a second conductive pad among the plurality of conductive pads of the first printed circuit board, The pitch between the first conductive pad of the first interposer and the second conductive pad of the first interposer is 0.35 mm or less. Electronic devices.

2. In claim 1, The first interposer comprises a plurality of dielectric layers penetrated by the plurality of conductive via pillars, The plurality of dielectric layers of the first interposer are: The lowermost layer adjacent to the first printed circuit board; a top layer adjacent to the second interposer; and comprising a plurality of intermediate layers between the lowermost layer and the uppermost layer of the first interposer; Electronic devices.

3. In claim 2, The first conductive via pillar of the first interposer includes a plurality of conductive vias that are stacked on each other, Each of the plurality of conductive vias of the first interposer penetrates a corresponding dielectric layer among the plurality of dielectric layers of the first interposer. Electronic devices.

4. In claim 3, The plurality of conductive vias of the first conductive via pillar of the first interposer include a first conductive via penetrating the lowermost layer of the first interposer and extending from the first conductive pad of the first interposer, The second conductive via pillar of the first interposer includes a second conductive via penetrating the lowermost layer of the first interposer and extending from the second conductive pad of the first interposer, The pitch between the first conductive via of the first conductive via pillar and the second conductive via of the second conductive via pillar is 0.35 mm or less. Electronic devices.

5. In claim 3, The plurality of intermediate layers of the first interposer include a first intermediate layer disposed on the lowest layer, The first conductive via pillar of the first interposer is: A first conductive via penetrating the lowermost layer of the first interposer; A second conductive via stacked on the first conductive via and penetrating the first intermediate layer of the first interposer; and A conductive pad is disposed between the lowermost layer of the first interposer and the first middle layer, The conductive pad of the first interposer is centered relative to the first conductive via and the second conductive via and has a larger diameter than the first conductive via and the second conductive via. Electronic devices.

6. In claim 3, The cross-sectional shape of at least one of the plurality of conductive vias of the first conductive via pillar of the first interposer has a trapezoidal shape. Electronic devices.

7. In any one of claims 1 to 6, The second printed circuit board includes a plurality of conductive pads spaced apart from each other, The second interposer comprises a plurality of conductive via pillars respectively aligned with the plurality of conductive pads of the second printed circuit board, The first conductive via pillar of the plurality of conductive via pillars of the second interposer includes a first conductive pad electrically connected to a first conductive pad among the plurality of conductive pads of the second printed circuit board, The second conductive via pillar of the plurality of conductive via pillars of the second interposer includes a second conductive pad electrically connected to a second conductive pad among the plurality of conductive pads of the second printed circuit board, The pitch between the first conductive pad of the second interposer and the second conductive pad of the second interposer is 0.35 mm or less. Electronic devices.

8. In claim 7, The second interposer comprises a plurality of dielectric layers penetrated by the plurality of conductive via pillars of the second interposer, The plurality of dielectric layers of the second interposer are: The lowest layer adjacent to the first interposer; a top layer adjacent to the second printed circuit board; and comprising a plurality of intermediate layers between the lowermost layer of the second interposer and the uppermost layer of the second interposer; Electronic devices.

9. In claim 8, The first conductive via pillar of the second interposer includes a plurality of conductive vias that are stacked on each other, Each of the plurality of conductive vias of the second interposer penetrates a corresponding dielectric layer among the plurality of dielectric layers of the second interposer. Electronic devices.

10. In claim 9, The plurality of conductive vias of the first conductive via pillar of the second interposer include a first conductive via penetrating the top layer of the second interposer and extending from the first conductive pad of the second interposer, The second conductive via pillar of the second interposer includes a second conductive via penetrating the top layer of the second interposer and extending from the second conductive pad of the second interposer, The pitch between the first conductive via of the second interposer and the second conductive via of the second interposer is 0.35 mm or less. Electronic devices.

11. In claim 9, The plurality of intermediate layers of the second interposer include a first intermediate layer disposed on the lowest layer of the second interposer, The first conductive via pillar of the second interposer is: A first conductive via penetrating the lowermost layer of the second interposer; A second conductive via stacked on the first conductive via of the second interposer and penetrating the first intermediate layer of the second interposer; and A conductive pad is disposed between the lowermost layer of the second interposer and the first middle layer of the second interposer, The conductive pad of the second interposer is centered with respect to the first conductive via of the second interposer and the second conductive via of the second interposer, and has a larger diameter than the first conductive via of the second interposer and the second conductive via of the second interposer. Electronic devices.

12. In claim 9, At least one of the plurality of conductive vias of the first conductive via pillar of the second interposer has a trapezoidal cross-sectional shape. Electronic devices.

13. In any one of claims 1 to 12, The first printed circuit board includes another conductive pad, The first interposer comprises a conductive trace electrically connected to the other conductive pad of the first printed circuit board and configured to function as an antenna of the electronic device. Electronic devices.

14. In any one of claims 1 to 13, The above first interposer: a first portion overlapped with the second interposer; and a second portion extending from the first portion of the first interposer and not overlapping the second interposer; The electronic device comprises one or more connectors disposed on the second portion of the first interposer. Electronic devices.

15. In claim 14, wherein said one or more connectors include one or more antenna contacts, Electronic devices.

Citation Information

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