Display panel and display apparatus

Abstract

A display panel and a display apparatus. The display panel comprises a base substrate, a plurality of sub-pixels, and an inorganic layer. Each sub-pixel comprises a light-emitting functional layer, and a first electrode and a second electrode, which are located on two sides of the light-emitting functional layer in a direction perpendicular to the base substrate. Each sub-pixel further comprises a pixel drive circuit, which is configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel drive circuit, and the inorganic layer comprises a plurality of connection via holes. Each pixel drive circuit comprises a conductive structure, and the first electrode of each sub-pixel is connected to the conductive structure by means of the connection via holes. The plurality of sub-pixels include a first sub-pixel and a second sub-pixel, wherein the luminous efficiency of the first sub-pixel is greater than the luminous efficiency of the second sub-pixel, and the minimum inner diameter of a connection via hole corresponding to the first electrode of the first sub-pixel is not less than 3.5 microns. Therefore, the risk of issues such as uneven picture display occurring during grayscale driving can be reduced.

Description

Display panel and display device

[0001] This application claims priority to Chinese Patent Application No. 202411208164.3, filed on August 30, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This disclosure relates to a display panel and a display device. Background Technology

[0003] Organic light-emitting diode (OLED) displays have attracted widespread attention due to their numerous advantages, including self-illumination, small thickness, fast response speed, high contrast, and wide viewing angle. One OLED display device with a tandem structure improves the lifespan and brightness of the light-emitting device and reduces power consumption by adding at least one light-emitting layer and a charge-generating layer, thereby meeting users' requirements for power consumption and lifespan. Summary of the Invention

[0004] At least one embodiment of this disclosure provides a display panel including a substrate, a plurality of sub-pixels, and an inorganic layer. The plurality of sub-pixels are located on the substrate. Each sub-pixel includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer along a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. Each sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel driving circuit. The inorganic layer includes a plurality of connection vias. The pixel driving circuit includes a conductive structure. The first electrode of the sub-pixel is connected to the conductive structure through the connection vias. The plurality of sub-pixels includes a first sub-pixel and a second sub-pixel. The luminous efficiency of the first sub-pixel is greater than that of the second sub-pixel, and the minimum inner diameter of the connection via corresponding to the first electrode of the first sub-pixel is not less than 3.5 micrometers.

[0005] For example, in a display panel provided according to at least one embodiment of the present disclosure, the minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel is a first inner diameter, and the minimum inner diameter of the connecting via corresponding to the first electrode of the second sub-pixel is a second inner diameter, wherein the first inner diameter is greater than the second inner diameter.

[0006] For example, in a display panel provided according to at least one embodiment of the present disclosure, the plurality of sub-pixels further includes a third sub-pixel, the luminous efficiency of the third sub-pixel is greater than that of the second sub-pixel, the minimum inner diameter of the connecting via corresponding to the first electrode of the third sub-pixel is the third inner diameter, the third inner diameter is not greater than the first inner diameter, and the third inner diameter is greater than the second inner diameter.

[0007] For example, in a display panel provided according to at least one embodiment of the present disclosure, both the first inner diameter and the third inner diameter are greater than 3.5 micrometers, and the second inner diameter is 2.4 to 3.1 micrometers.

[0008] For example, in a display panel provided according to at least one embodiment of the present disclosure, the plurality of sub-pixels include at least two sub-pixels with different luminous efficiencies, and the minimum inner diameter of the connecting via corresponding to the first electrode of each sub-pixel is not less than 3.5 micrometers.

[0009] For example, in a display panel provided according to at least one embodiment of the present disclosure, the ratio of the minimum inner diameter of the connecting via corresponding to the first electrode of sub-pixels with different luminous efficiencies is 0.95 to 1.05.

[0010] For example, according to at least one embodiment of the present disclosure, the display panel further includes a first insulating layer and a pixel defining layer. The first insulating layer is located between the inorganic layer and the substrate and is in contact with the inorganic layer. At least a portion of the pixel defining layer is located between the light-emitting functional layer and the first electrode. The pixel defining layer includes a pixel opening and a pixel defining portion located between adjacent pixel openings. The pixel opening exposes at least a portion of the first electrode. The light-emitting functional layer is disposed in contact with the first electrode through the pixel opening. The inorganic layer includes a plurality of inorganic structures, and the first insulating layer includes a plurality of first insulating layers. The inorganic structure includes a protrusion that protrudes relative to the edge of the first insulating structure. The light-emitting functional layer includes a plurality of film layers. The pixel defining layer also includes a defining opening located between adjacent sub-pixels in at least a portion of the sub-pixels. At least a portion of the protrusion of each of the inorganic structures in at least a portion of the inorganic structure is exposed by the defining opening as a partition, the partition being configured to partition at least one of the light-emitting functional layers. The first insulating layer includes a plurality of first vias, at least a portion of the inner wall of the first vias being covered by the inorganic layer, such that at least a portion of the connecting vias is located within the first vias.

[0011] For example, in a display panel provided according to at least one embodiment of the present disclosure, the surface of the portion of the inorganic layer located in the first via, away from the substrate, has a first slope angle with the conductive structure, the first slope angle being less than 90 degrees.

[0012] For example, in a display panel provided according to at least one embodiment of the present disclosure, the first slope angle is 10 to 80 degrees.

[0013] For example, according to at least one embodiment of the present disclosure, the display panel further includes a second insulating layer located between the inorganic layer and the pixel defining layer; wherein the second insulating layer includes a plurality of second vias, at least a portion of the inner wall of the connecting vias is covered by the second insulating layer, such that at least a portion of the second vias is located in the connecting vias, and the first electrode of the sub-pixel is connected to the conductive structure through the second vias.

[0014] For example, in a display panel provided according to at least one embodiment of the present disclosure, the surface of the portion of the inorganic layer located in the first via, away from the substrate, has a first slope angle with the conductive structure, and the surface of the portion of the second insulating layer located in the connecting via, away from the substrate, has a second slope angle with the conductive structure, the second slope angle being smaller than the first slope angle.

[0015] For example, in a display panel provided according to at least one embodiment of the present disclosure, the average thickness of the first insulating layer and the second insulating layer is 0.5 to 3 micrometers.

[0016] For example, in a display panel provided according to at least one embodiment of the present disclosure, the minimum inner diameter of the second via is greater than 3 micrometers.

[0017] For example, in a display panel provided according to at least one embodiment of the present disclosure, both the first insulating layer and the second insulating layer are organic layers.

[0018] At least one embodiment of this disclosure also provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer, a first insulating layer, and a second insulating layer. The plurality of sub-pixels are located on the substrate. Each sub-pixel includes a light-emitting functional layer, and a first electrode and a second electrode located on either side of the light-emitting functional layer along a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. Each sub-pixel further includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel driving circuit. The first insulating layer is located between the inorganic layer and the substrate. Between the pixel driving circuits; a second insulating layer is located between at least a portion of the inorganic layer and the light-emitting functional layer, wherein the inorganic layer includes a plurality of connection vias, the first insulating layer includes a plurality of first vias, the second insulating layer includes a plurality of second vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, such that at least a portion of the connection via is located within the first via, and at least a portion of the inner wall of the connection via is covered by the second insulating layer, such that at least a portion of the second via is located within the connection via, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

[0019] For example, in a display panel provided according to at least one embodiment of the present disclosure, the inorganic layer completely covers the inner wall of the first via, and the second insulating layer completely covers the inner wall of the connecting via.

[0020] For example, in a display panel provided according to at least one embodiment of the present disclosure, the minimum inner diameter of the second via is not less than 3 micrometers.

[0021] For example, a display panel provided according to at least one embodiment of the present disclosure further includes a pixel defining layer, at least a portion of which is located between the light-emitting functional layer and the first electrode. The pixel defining layer includes a pixel opening and a pixel defining portion located between adjacent pixel openings. The pixel opening exposes at least a portion of the first electrode. The light-emitting functional layer is disposed in contact with the first electrode through the pixel opening. The inorganic layer includes a plurality of inorganic structures. The first insulating layer includes a plurality of first insulating structures. The inorganic structures include protrusions protruding relative to the edges of the first insulating structures. The light-emitting functional layer includes a plurality of film layers. The pixel defining layer further includes a defining opening located between adjacent sub-pixels in at least a portion of the sub-pixels. At least a portion of the protrusion of each of the inorganic structures in at least a portion of the inorganic structures is exposed by the defining opening to serve as a partition. The partition is configured to partition at least one of the light-emitting functional layers. Both the first insulating layer and the second insulating layer include organic materials.

[0022] At least one embodiment of this disclosure also provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer, and a first insulating layer. The plurality of sub-pixels are located on the substrate, each sub-pixel including a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer along a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. The sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel driving circuit. The first insulating layer is located between the inorganic layer and the pixel driving circuit. The inorganic layer includes a plurality of connection vias, and the first insulating layer includes a plurality of first vias. At least a portion of the inner wall of the first vias is covered by the inorganic layer, such that at least a portion of the connection vias is located within the first vias. The pixel driving circuit includes a conductive structure. The first electrode of the sub-pixel is connected to the conductive structure through the connection vias. The surface of the inorganic layer located at the first vias, away from the substrate, has a slope angle with the conductive structure, the slope angle being less than 90 degrees.

[0023] For example, in a display panel provided according to at least one embodiment of the present disclosure, the slope angle is 10 to 80 degrees.

[0024] Another embodiment of this disclosure provides a display device including any of the above-described display panels. Attached Figure Description

[0025] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0026] Figure 1 is a partial plan view of a display panel provided in at least one embodiment of the present disclosure.

[0027] Figure 2 is a schematic diagram of the cross-section of the display panel shown in Figure 1 along line A-A'.

[0028] Figure 3 is an equivalent diagram of a pixel driving circuit according to at least one embodiment of the present disclosure.

[0029] Figure 4 is a schematic diagram of the connection via corresponding to the first sub-pixel in a display panel provided in at least one embodiment of the present disclosure.

[0030] Figure 5 is a schematic diagram of the connection via corresponding to the second sub-pixel in a display panel provided by at least one embodiment of the present disclosure.

[0031] Figures 6 to 8 are schematic diagrams of the display effects of different display devices.

[0032] Figure 9 is a schematic diagram of a connection via corresponding to a sub-pixel in another display panel provided by at least one embodiment of the present disclosure.

[0033] Figure 10 is a schematic diagram of a connection via corresponding to a sub-pixel in a display panel provided by at least one embodiment of the present disclosure.

[0034] Figure 11 is a schematic block diagram of a display device provided in at least one embodiment of the present disclosure. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. Based on the described embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0036] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Features such as “parallel,” “perpendicular,” and “identical” used in embodiments of this disclosure include features in the strict sense of “parallel,” “perpendicular,” and “identical,” as well as cases where “substantially parallel,” “substantially perpendicular,” and “substantially identical” include a certain degree of error, taking into account measurement and errors associated with the measurement of a particular quantity (e.g., limitations of the measurement system), indicating a range of acceptable deviations for a particular value as determined by one of ordinary skill in the art. For example, “substantially” can mean within one or more standard deviations, or within 10% or 5% of said value. Unless otherwise specified in the following embodiments of this disclosure, the quantity of a component means that the component may be one or more, or can be understood as at least one. “At least one” means one or more, and “more” means at least two.

[0037] In organic light-emitting display devices with a tandem structure, the light-emitting layers of two sub-pixels are stacked and connected in series, with a complete charge-generating layer between the stacked light-emitting layers, such as a P-type doped charge-generating layer P-CGL and an N-type doped charge-generating layer N-CGL. For example, a tandem device can replace one light-emitting layer in the light-emitting element of an OLED display panel with two light-emitting layers. Compared to a display panel without a tandem device, the two light-emitting layers in a tandem device are connected in series, thus enabling dual light-emitting devices to be connected in series. Under the same luminous intensity, this reduces the luminous current of the light-emitting device, increases its lifespan, and reduces power consumption. Therefore, in some display panels with tandem devices, by setting isolation pillars located between adjacent sub-pixels to isolate at least one of the light-emitting functional layers, the risk of crosstalk between adjacent sub-pixels can be reduced.

[0038] For example, some isolation pillar structures may include an inorganic layer located between the first electrode of the sub-pixel and the substrate, the inorganic layer being in contact with the first electrode, which is connected to the pixel driving circuit through a via penetrating the inorganic layer. Typically, there are other insulating layers between the inorganic layer and the pixel driving circuit, and the vias in these insulating layers, together with the vias in the aforementioned inorganic layer, form a sleeve (e.g., also called an anode via), through which the first electrode is connected to the pixel driving circuit.

[0039] However, in some display devices, the first electrode of a sub-pixel may break at the edge of the anode hole, resulting in a reduced contact area between the first electrode and the conductive structure in the pixel driving circuit. This can lead to incomplete contact or abrupt changes in the trace, causing uneven image display during low grayscale driving (e.g., mura phenomena), and may even result in some sub-pixels not being fully illuminated. Furthermore, when the contact area between the first electrode and the conductive structure in the pixel driving circuit is small, the corresponding contact resistance is high, making it prone to display defects during low grayscale driving. When multiple sub-pixels have different luminous efficiencies, under the same driving mode, sub-pixels with higher luminous efficiency are more likely to illuminate, thus making them more susceptible to the aforementioned problems.

[0040] At least one embodiment of this disclosure provides a display panel, comprising: a substrate, a plurality of sub-pixels, and an inorganic layer. The plurality of sub-pixels are located on the substrate, and each sub-pixel includes a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer along a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. The sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel driving circuit, and the inorganic layer includes a plurality of connection vias. The pixel driving circuit includes a conductive structure. The first electrode of the sub-pixel is connected to the conductive structure through the connection vias. The plurality of sub-pixels includes a first sub-pixel and a second sub-pixel. The luminous efficiency of the first sub-pixel is greater than that of the second sub-pixel, and the minimum inner diameter of the connection via corresponding to the first electrode of the first sub-pixel is not less than 3.5 micrometers.

[0041] In at least one embodiment of the present disclosure, the first electrode of a sub-pixel is connected to a conductive structure via a connecting via. The minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel with high luminous efficiency is not less than 3.5 micrometers. This increases the contact area between the first electrode of the first sub-pixel and the conductive structure in the pixel driving circuit, thereby reducing the corresponding contact resistance and making the transmission current of the first sub-pixel more stable. This can improve the risk of uneven screen display during low grayscale driving.

[0042] At least one embodiment of this disclosure also provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer, a first insulating layer, and a second insulating layer. The plurality of sub-pixels are located on the substrate. Each sub-pixel includes a light-emitting functional layer, and a first electrode and a second electrode located on either side of the light-emitting functional layer along a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. Each sub-pixel further includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel driving circuit. The first insulating layer is located between the inorganic layer and the substrate. Between the pixel driving circuits; a second insulating layer is located between at least a portion of the inorganic layer and the light-emitting functional layer, wherein the inorganic layer includes a plurality of connection vias, the first insulating layer includes a plurality of first vias, the second insulating layer includes a plurality of second vias, at least a portion of the inner wall of the first via is covered by the inorganic layer, such that at least a portion of the connection via is located within the first via, and at least a portion of the inner wall of the connection via is covered by the second insulating layer, such that at least a portion of the second via is located within the connection via, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

[0043] In at least one embodiment of the present disclosure, in the display panel, at least a portion of the connecting via is located within the first via, and at least a portion of the second via is located within the connecting via. Thus, the first via, the connecting via, and the second via form a via configuration, thereby enabling a good connection between the first electrode and the conductive structure in the pixel driving circuit. Simultaneously, by covering at least a portion of the inner wall of the connecting via with a second insulating layer, the impact of the step difference due to the portion of the inorganic layer located in the first via can be reduced by the second insulating layer, and the risk of the first electrode breaking at the second via can be reduced.

[0044] At least one embodiment of this disclosure also provides another display panel, including a substrate, a plurality of sub-pixels, an inorganic layer, and a first insulating layer. The plurality of sub-pixels are located on the substrate, each sub-pixel including a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer along a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. The sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel driving circuit. The first insulating layer is located between the inorganic layer and the pixel driving circuit. The inorganic layer includes a plurality of connection vias, and the first insulating layer includes a plurality of first vias. At least a portion of the inner wall of the first vias is covered by the inorganic layer, such that at least a portion of the connection vias is located within the first vias. The pixel driving circuit includes a conductive structure. The first electrode of the sub-pixel is connected to the conductive structure through the connection vias. The surface of the inorganic layer located at the first vias, away from the substrate, has a slope angle with the conductive structure, the slope angle being less than 90 degrees.

[0045] Another display panel provided by at least one embodiment of this disclosure allows the portion of the inorganic layer located in the first via to have a small step, which is beneficial for the surface of the inorganic layer to adhere well to the first electrode, thereby reducing the risk of the first electrode breaking at the first via and thus helping to ensure the connection effect between the first electrode and the conductive structure of the pixel driving circuit.

[0046] At least one embodiment of this disclosure also provides a display device, which includes a display panel provided in at least one embodiment of this disclosure.

[0047] The display panel and display device provided in the embodiments of this disclosure are described below with reference to the accompanying drawings.

[0048] Figure 1 is a partial plan view of a display panel provided in at least one embodiment of the present disclosure; Figure 2 is a cross-sectional view of the display panel shown in Figure 1 along line A-A'.

[0049] As shown in Figures 1 and 2, the display panel includes a substrate BS and a plurality of sub-pixels 10 located on the substrate BS. Each sub-pixel 10 includes a light-emitting functional layer 130 and a first electrode 110 and a second electrode 120 located on both sides of the light-emitting functional layer 130 along a direction perpendicular to the substrate BS (i.e., the Z direction as shown in Figure 2). The first electrode 110 is located between at least a portion of the light-emitting functional layer 130 and the substrate BS.

[0050] As shown in Figure 2, the light-emitting functional layer 130 includes multiple film layers. For example, the light-emitting functional layer 130 may include a light-emitting layer for emitting light and a charge-generating layer 133. The charge-generating layer 133 has strong conductivity, which enables the light-emitting functional layer 130 to have advantages such as long lifespan, low power consumption, and high brightness. For example, the light-emitting functional layer 130 may be a film layer in an organic light-emitting element. For example, the light-emitting functional layer 130 may include a first light-emitting layer (EML) 131, a charge-generating layer (CGL) 133, and a second light-emitting layer (EML) 132 stacked together, with the charge-generating layer 133 located between the first light-emitting layer 131 and the second light-emitting layer 132.

[0051] It should be noted that the light-emitting functional layer 130 shown in Figure 2 may also include other film layers, such as a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), etc., and the embodiments disclosed herein do not limit this. For example, the hole injection layer, hole transport layer, electron transport layer, electron injection layer, charge generation layer 133, and second electrode 120 are all common film layers of multiple sub-pixels 10, and can be referred to as common layers. In addition, the thickness of each film layer shown in Figure 2 is only for clear illustration of each film layer and does not represent the actual size.

[0052] For example, as shown in FIG2, sub-pixel 10 may include a tandem light-emitting element, such as a Tandem OLED, but embodiments of this disclosure are not limited thereto.

[0053] As shown in Figure 2, the side of the first electrode 110 facing the substrate BS is also provided with other structures 01, such as a pixel driving circuit 140 electrically connected to the first electrode 110 of the sub-pixel 10, signal lines, and various insulating layers, for example, a passivation layer, a buffer layer, a gate insulating layer, an interlayer insulating layer, etc., which are not limited in the embodiments of this disclosure. The pixel driving circuit 140 is located between the first electrode 110 and the substrate BS and is configured to drive the light-emitting functional layer 130 of the sub-pixel 10 to emit light. For example, the pixel driving circuit 140 may include multiple transistors and at least one capacitor (not shown in the figure). The first electrode 110 can be electrically connected to the pixel driving circuit 240 through a connection via N0 to drive the light-emitting functional layer 130 to emit light.

[0054] As shown in Figure 2, the display panel also includes an inorganic layer 200, which is located between the first electrode 110 and the pixel driving circuit 140. For example, the first electrode 110 is in contact with the inorganic layer 200. At least a portion of the inorganic layer 200 is configured to isolate at least one layer of the light-emitting functional layer 130 of adjacent sub-pixels 10, thereby reducing the risk of crosstalk between adjacent sub-pixels 10. For the isolation principle of the inorganic layer 200 on the light-emitting functional layer 130, please refer to the relevant description in the following embodiments.

[0055] As shown in Figure 2, the inorganic layer 200 includes multiple connection vias N0, and the pixel driving circuit 140 includes a conductive structure 1410. The first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through the connection vias N0. For example, the multiple connection vias N0 correspond one-to-one with multiple sub-pixels 10. For example, the pixel driving circuit 140 may include a thin-film transistor, and the conductive structure 1410 may be the source or drain of the thin-film transistor, but is not limited thereto. For example, the conductive structure 1410 may also be a structure in the pixel driving circuit 140 connected to the thin-film transistor, and the embodiments of this disclosure do not limit this.

[0056] As shown in Figures 1 and 2, the plurality of sub-pixels 10 includes a first sub-pixel 101 and a second sub-pixel 102. The luminous efficiency of the first sub-pixel 101 is greater than that of the second sub-pixel 102, and the minimum inner diameter of the connection via N0 corresponding to the first electrode 110 of the first sub-pixel 101 is not less than 3.5 micrometers. For example, the luminous efficiency of the sub-pixel 10 can be the luminous efficiency of the material of the light-emitting functional layer of the sub-pixel 10 (e.g., the material of the light-emitting layer). For example, under the same driving voltage, the brightness of the first sub-pixel 101 is greater than that of the second sub-pixel 102, and the first sub-pixel 101 is easier to turn on than the second sub-pixel 102. For example, when achieving the same brightness, the driving voltage required for the first sub-pixel 101 is less than that required for the second sub-pixel 102. The first sub-pixel 101 is more prone to display defects than the second sub-pixel 102. For example, the connection via corresponding to the sub-pixel refers to a via used to connect the first electrode of the sub-pixel to a conductive structure in the pixel driving circuit.

[0057] In at least one embodiment of the present disclosure, the first electrode of a sub-pixel is connected to a conductive structure via a connecting via. The minimum inner diameter of the connecting via corresponding to the first sub-pixel with high luminous efficiency is not less than 3.5 micrometers. This increases the contact area between the first electrode of the first sub-pixel and the conductive structure in the pixel driving circuit, thereby reducing the corresponding contact resistance. For example, the contact resistance can be made less than 8 ohms. This makes the transmission current of the first sub-pixel more stable, thus improving the risk of uneven screen display during low grayscale driving.

[0058] Figure 3 is an equivalent diagram of a pixel driving circuit provided in an embodiment of this disclosure.

[0059] For example, as shown in Figure 3, the pixel driving circuit 140 includes a threshold compensation transistor T2, a driving transistor T3, a data writing transistor T4, a first reset transistor T7, a second reset transistor T1, a first light-emitting control transistor T6, a second light-emitting control transistor T5, and a storage capacitor C. For example, the display panel also includes a reset power signal line, a scan signal line, a power signal line, a reset control signal line, a light-emitting control signal line, and a data line.

[0060] For example, as shown in Figure 3, the first terminal of the threshold compensation transistor T2 is electrically connected to the first terminal of the driving transistor T3, and the second terminal of the threshold compensation transistor T2 is electrically connected to the gate of the driving transistor T3. The first terminal of the first reset control transistor T7 is electrically connected to the reset power supply signal line to receive the reset signal Vinit, and the second terminal of the first reset control transistor T7 is electrically connected to the first electrode of the light-emitting element 100 (i.e., node S2). The first terminal of the data writing transistor T4 is electrically connected to the second terminal of the driving transistor T3, and the second terminal of the data writing transistor T4 is electrically connected to the data line to receive the data signal Data. The gate of the data writing transistor T4 is electrically connected to the scan signal line to receive the scan signal Gate. The first terminal of the storage capacitor C is electrically connected to the power supply signal line, and the second terminal of the storage capacitor C is electrically connected to the gate of the driving transistor T3. The gate of the threshold compensation transistor T2 is electrically connected to the scan signal line to receive the compensation control signal; the gate of the first reset transistor T7 is electrically connected to the reset control signal line to receive the reset control signal Reset(N+1). The first terminal of the second reset transistor T1 is electrically connected to the reset power supply signal line to receive the reset signal Vinit. The second terminal of the second reset transistor T1 is electrically connected to the gate of the driving transistor T3. The gate of the second reset transistor T1 is electrically connected to the reset control signal line to receive the reset control signal Reset(N). The gate of the first light-emitting control transistor T6 is electrically connected to the light-emitting control signal line to receive the light-emitting control signal EM. The first terminal of the first light-emitting control transistor T6 is electrically connected to the first terminal of the driving transistor T3. The second terminal of the first light-emitting control transistor T6 is electrically connected to the first electrode of the light-emitting element 100. The first terminal of the second light-emitting control transistor T5 is electrically connected to the power supply signal line to receive the first power supply signal VDD. The second terminal of the second light-emitting control transistor T5 is electrically connected to the second terminal of the driving transistor T3. The gate of the second light-emitting control transistor T5 is electrically connected to the light-emitting control signal line to receive the light-emitting control signal EM. The second electrode of the light-emitting element 100 is connected to the voltage terminal VSS. The aforementioned power supply signal line refers to the signal line for outputting the voltage signal VDD, which can be connected to a voltage source to output a constant voltage signal, such as a positive voltage signal.

[0061] For example, as shown in Figure 3, the scan signal and the compensation control signal can be the same. That is, the gate of the data writing transistor T4 and the gate of the threshold compensation transistor T2 can be electrically connected to the same signal line to receive the same signal, reducing the number of signal lines. Alternatively, the gate of the data writing transistor T4 and the gate of the threshold compensation transistor T2 can be electrically connected to different signal lines. That is, the gate of the data writing transistor T4 is electrically connected to the first scan signal line, and the gate of the threshold compensation transistor T2 is electrically connected to the second scan signal line. The signals transmitted by the first scan signal line and the second scan signal line can be the same or different, thereby allowing the gate of the data writing transistor T4 and the threshold compensation transistor T2 to be controlled separately, increasing the flexibility of the pixel circuit control.

[0062] For example, as shown in Figure 3, when the pixel driving circuit is working, in the first stage of screen display, the second reset transistor T1 is turned on to initialize the voltage of node S1; in the second stage of screen display, data is stored in node S1 through data writing transistor T4, driving transistor T3 and threshold compensation transistor T2; in the third light emission stage, the second light emission control transistor T5, driving transistor T3 and first light emission control transistor T6 are all turned on, and the light emission element 100 is forward-biased to emit light.

[0063] It should be noted that, in the embodiments of this disclosure, in addition to the 7T1C (i.e., seven transistors and one capacitor) structure shown in FIG3, each pixel circuit can also be a structure including other numbers of transistors, such as a 7T2C structure, a 6T1C structure, a 6T2C structure, or a 9T2C structure. This disclosure does not limit the specific type of pixel circuit. For example, the pixel driving circuit shown in FIG3 can correspond to the pixel driving circuit 140 in FIG2. For example, the first electrode of the light-emitting element 100 in the pixel driving circuit can be an anode, and the second electrode of the light-emitting element 100 can be a cathode.

[0064] Figure 4 is a schematic diagram of the connection via corresponding to the first sub-pixel in a display panel provided in at least one embodiment of the present disclosure; Figure 5 is a schematic diagram of the connection via corresponding to the second sub-pixel in a display panel provided in at least one embodiment of the present disclosure.

[0065] For example, as shown in Figures 4 and 5, the minimum inner diameter of the connecting via N0 corresponding to the first sub-pixel 101 is the first inner diameter R1, and the minimum inner diameter of the connecting via N0 corresponding to the second sub-pixel 102 is the second inner diameter R2. The first inner diameter R1 is larger than the second inner diameter R2. For example, the inner diameter of each sub-pixel can be uniform or non-uniform.

[0066] By making the first inner diameter of the first sub-pixel with higher luminous efficiency larger, the contact area between the first electrode of the first sub-pixel and the conductive structure in the pixel driving circuit can be increased, thereby reducing the corresponding contact resistance. This reduces the risk of uneven image display when the first sub-pixel is driven at low grayscale, making the display effect of sub-pixels with different luminous efficiencies more uniform.

[0067] For example, as shown in Figure 2, the multiple sub-pixels 10 in the display panel also include a third sub-pixel 103. For example, the multiple sub-pixels 10 are arranged as multiple first sub-pixel groups 0010 and multiple second sub-pixel groups 0020 alternately arranged along a first arrangement direction X. The first sub-pixel group 0010 includes second sub-pixels 102 and third sub-pixels 103 alternately arranged along a second arrangement direction Y, and the second sub-pixel group 0020 includes first sub-pixels 101 arranged along the second arrangement direction Y. For example, the first sub-pixels 101, second sub-pixels 102, and third sub-pixels 103 emit different colors. The first arrangement direction X intersects the second arrangement direction Y and is parallel to the substrate BS.

[0068] For example, as shown in Figure 2, the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 are configured to emit different colors of light. For example, the first sub-pixel 101 is configured to emit green light, the second sub-pixel 102 is configured to emit blue light, and the third sub-pixel 103 is configured to emit red light. For example, the emission colors of the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 can be interchanged, and the embodiments of this disclosure do not limit the emission color of each sub-pixel 10.

[0069] For example, as shown in Figure 2, the luminous efficiency of both the first sub-pixel 101 and the third sub-pixel 103 is greater than that of the second sub-pixel 102. For example, the luminous efficiency of the first sub-pixel 101 and the third sub-pixel 103 can be substantially the same. For example, the materials of the light-emitting functional layer 130 of the first sub-pixel 101 and the third sub-pixel 103 can be substantially the same, but the embodiments of this disclosure are not limited thereto. For example, the minimum inner diameter of the connecting via N0 corresponding to the third sub-pixel 103 is the third inner diameter (not shown in the figure). For example, the third inner diameter can be substantially the same as the first inner diameter R1, and the third inner diameter is greater than the second inner diameter R2.

[0070] By making the inner diameter of the connecting vias corresponding to the first and third sub-pixels with higher luminous efficiency larger, the contact area between the first electrode of the first and third sub-pixels and the conductive structure in the pixel driving circuit can be increased, thereby reducing the corresponding contact resistance and thus reducing the risk of uneven image display during low grayscale driving.

[0071] For example, as shown in Figure 2, the luminous efficiency of the third sub-pixel 103 can be less than that of the first sub-pixel 101, but greater than that of the second sub-pixel 102. For example, the third inner diameter R3 is less than the first inner diameter R1, and the third inner diameter R3 is greater than the second inner diameter R2. For example, the minimum inner diameter of the connecting via N0 corresponding to each sub-pixel 10 can be determined based on the luminous efficiency of that sub-pixel 10. For example, when the luminous efficiency of the sub-pixel 10 is high, the minimum inner diameter of the connecting via N0 corresponding to that sub-pixel 10 can be larger; when the luminous efficiency of the sub-pixel 10 is low, the minimum inner diameter of the connecting via N0 corresponding to that sub-pixel 10 can be smaller.

[0072] Since subpixels with higher luminous efficiency are easier to turn on, they are at higher risk of uneven display. This setting allows for flexible control of the inner diameter of the corresponding vias based on the luminous efficiency of the subpixels. This ensures the stability of the transmission current of the subpixels and reduces the risk of uneven display when driving at low grayscale levels, while also reducing the layout space occupied by the vias.

[0073] For example, as shown in Figures 2 and 4, both the first inner diameter R1 and the third inner diameter R3 are greater than 3.5 micrometers. Alternatively, both the first inner diameter R1 and the third inner diameter R3 can be 3.5 micrometers. Or, the first inner diameter R1 can be larger than the third inner diameter R3. This results in a smaller contact resistance between the first electrode 110 of the first sub-pixel 101 and the first electrode 110 of the third sub-pixel 103 and the conductive structure 1410 of the corresponding pixel driving circuit 140, thus ensuring the stability of the transmitted current.

[0074] For example, as shown in Figures 2 and 5, the second inner diameter R2 can be 2.4 to 3.1 micrometers, such as 2.5 micrometers, 2.8 micrometers, 3.0 micrometers, 3.1 micrometers, or other values ​​within the range of 2.4 to 3.1 micrometers. This reduces the risk of uneven image display due to lower luminous efficiency of the second sub-pixel 102, while ensuring stable transmission current and minimizing the layout space occupied by the corresponding via N0. For example, the maximum inner diameter of each via in this embodiment can be less than 10 micrometers, but is not limited to this.

[0075] For example, as shown in Figures 1 and 2, the minimum inner diameter of the via N0 corresponding to each sub-pixel 10 in the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103 is not less than 3.5 micrometers. That is, the minimum inner diameter of the via N0 corresponding to sub-pixels 10 with different luminous efficiencies is relatively large. For example, the ratio of the minimum inner diameter of the via N0 corresponding to sub-pixels 10 with different luminous efficiencies (e.g., the first sub-pixel 101, the second sub-pixel 102, and the third sub-pixel 103) is 0.95 to 1.05, such as 0.98, 0.99, 1.00, 1.02, 1.04, or other values ​​from 0.95 to 1.05. The embodiments of this disclosure do not limit this.

[0076] This design helps to minimize the contact resistance between the first electrode of sub-pixels with different luminous efficiencies and the conductive structure, for example, to less than 8 ohms. This effectively improves the overall display effect of the display panel and reduces the display defect rate. In addition, it simplifies the manufacturing process of the connecting vias and helps to ensure the uniformity of the manufacturing process.

[0077] For example, as shown in FIG2, the display panel further includes a pixel defining layer 400. At least a portion of the pixel defining layer 400 is located between the light-emitting functional layer 130 and the first electrode 110. The pixel defining layer 400 includes a pixel opening 410 and a pixel defining portion 450 located between adjacent pixel openings 410. The pixel opening 410 exposes at least a portion of the first electrode 110 to define the light-emitting area of ​​the sub-pixel 30. The light-emitting functional layer 130 is disposed in contact with the first electrode 110 through the pixel opening 410. For example, the first electrode 110 and the second electrode 120 located on both sides of the light-emitting functional layer 130 can drive the light-emitting functional layer 130 located between them to emit light. For example, the light-emitting area of ​​the sub-pixel 10 refers to the area where the sub-pixel 10 effectively emits light, and the shape of the light-emitting area refers to a two-dimensional shape. For example, the shape of the light-emitting area may be the same as the shape of the orthographic projection of the portion of the first electrode 110 exposed by the pixel opening 210 onto the substrate BS.

[0078] For example, as shown in FIG2, the display panel further includes a first insulating layer 300. The first insulating layer 300 is located between the inorganic layer 200 and the substrate BS, and the first insulating layer 300 is in contact with the inorganic layer 200. For example, the inorganic layer 200 includes a plurality of inorganic structures 240, and the first insulating layer 300 includes a plurality of first insulating structures 310. The inorganic structure 240 includes a protrusion 260 that protrudes relative to the edge of the first insulating structure 310. For example, the inorganic structure 240 includes a portion overlapping with the light-emitting area of ​​the sub-pixel 10, and a portion located outside the light-emitting area of ​​the sub-pixel 10. For example, the first electrode 110 is located on the inorganic structure 240 and is in contact with the inorganic structure 240. For example, the orthographic projection of the first electrode 110 on the substrate BS falls within the orthographic projection of the inorganic structure 240 on the substrate BS. Thus, the inorganic structure 240 can make the first electrode 110 have good flatness, so that the light emission effect of the sub-pixel 10 is good.

[0079] For example, as shown in FIG2, the pixel defining layer 400 further includes defining openings 420 located between adjacent sub-pixels 10 in at least a portion of the sub-pixels 10. For example, the orthographic projection of the defining openings 420 on the substrate BS is generally annular or strip-shaped and surrounds the light-emitting area of ​​the sub-pixel 10. The light-emitting functional layer 130 includes a plurality of film layers, and at least a portion of the protrusions 260 of at least a portion of each inorganic structure 240 in the inorganic structure 240 is exposed by the defining openings 420 to serve as partitions 2610, the partitions 2610 being configured to block at least one layer of the light-emitting functional layer 130. For example, the partitions 2610 are the portions of the protrusions 260 of the inorganic structure 240 exposed by the defining openings 420.

[0080] For example, as shown in FIG2, at least a portion of the protrusions 260 of the inorganic structure 240 may not be exposed by the defined opening 420. For example, all protrusions 260 of a portion of the inorganic structure 240 include portions exposed by the defined opening 420, and all protrusions 260 of a portion of the inorganic structure 240 are covered by the pixel defining portion 450. For example, multiple inorganic structures 240 may be arranged at intervals. For example, adjacent inorganic structures 240 may have a connecting structure to connect adjacent inorganic structures 240 to each other. For example, multiple inorganic structures 240 may be a single integrated structure, and the embodiments of this disclosure do not limit the structural form of multiple inorganic structures 240. For example, at least a portion of the protrusion 260 of the inorganic structure 240 corresponding to one of the adjacent sub-pixels 10 (e.g., the inorganic structure 240 corresponding to the second sub-pixel 102 shown in FIG2) is exposed by the defined opening 420.

[0081] By setting the aforementioned partition, at least one layer of the light-emitting functional layer between adjacent sub-pixels can be isolated, thereby reducing the risk of crosstalk between adjacent sub-pixels.

[0082] For example, as shown in Figures 2 and 4, the first insulating layer 300 includes a plurality of first vias N1, at least a portion of the inner wall of each first via N1 being covered by the inorganic layer 200, such that at least a portion of the connecting via N0 is located within the first via N1. For example, the minimum inner diameter of the first via N1 is larger than the minimum inner diameter of the connecting via N0. For example, the minimum inner diameter of the first via N1 is larger than the maximum inner diameter of the connecting via N0. For example, the inner wall of the first via N1 is completely covered by the inorganic layer 200. For example, the orthographic projection of the connecting via N0 onto the substrate BS falls within the orthographic projection of the first via N1 onto the substrate BS. Therefore, the risk of etching at least a portion of the first insulating layer located on the side of the inorganic layer 200 closest to the substrate BS during the patterning process of the inorganic layer 200, thereby forming an "undercut" structure and isolating the first electrode 110, can be reduced. For example, the portion of the first electrode 110 located in the connecting via N0 does not contact the inner wall of the first via N1, thereby simplifying the structure of the connecting via N0 and making it easy to connect the first electrode 110 to the conductive structure 1410.

[0083] For example, Table 1 shows the test results for test sub-pixels corresponding to connection vias with different inner diameters. Figures 6 to 8 are schematic diagrams of the display effects of different display devices.

[0084] For example, as shown in Table 1, the test sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel with different luminous efficiencies. For example, the inner diameter of the connecting vias corresponding to each sub-pixel in the test sub-pixels is basically uniform. For example, when the inner diameter of the connecting via corresponding to the test sub-pixel is 3.1 micrometers, the contact resistance between the first electrode of the test sub-pixel and the conductive structure in the pixel driving circuit is 28 ohms. When the inner diameter of the connecting via corresponding to the test sub-pixel increases from 3.1 micrometers to 3.4 micrometers, the contact resistance between the first electrode and the conductive structure in the pixel driving circuit remains relatively large, ranging from 8 to 28 ohms. Figures 6 and 7 show the display effect of the display device when the inner diameter of the connecting via corresponding to the test sub-pixels in Table 1 is one of 3.1 to 3.4 micrometers. As can be seen from Figures 6 and 7, obvious stripes appear in both display devices, and the brightness of the displayed image is uneven.

[0085] For example, as shown in Table 1, when the inner diameter of the connecting via corresponding to the test sub-pixel increases to 3.5 micrometers, the contact resistance between the first electrode of the test sub-pixel and the conductive structure in the pixel driving circuit is 4.9 ohms. For example, Figure 8 shows the display effect of a display device with an inner diameter of 3.5 micrometers for the connecting via corresponding to the test sub-pixel in Table 1. As can be seen from Figure 8, the brightness of the displayed image is uniform, and no obvious stripes are observed.

[0086] Based on the test results above, it is evident that the luminous efficiency of each test sub-pixel differs, resulting in varying difficulties in activating them. Furthermore, sub-pixels with higher luminous efficiency are more prone to display defects compared to those with lower luminous efficiency. Consequently, when the inner diameter of the connecting via corresponding to a test sub-pixel is small, the display state of the test sub-pixel (e.g., a sub-pixel with higher luminous efficiency) is more likely to exhibit defects. Setting the inner diameter of the connecting via to 3.5 micrometers helps reduce the contact resistance between the first electrode and the conductive structure in the pixel driving circuit, and can significantly improve the brightness uniformity of the displayed image.

[0087] Table 1

[0088] Figure 9 is a schematic diagram of a connection via corresponding to a sub-pixel in another display panel provided by at least one embodiment of the present disclosure.

[0089] Currently, the inorganic layer in some display panels is typically quite thick, for example, 300 to 1500 angstroms, while the first electrode is relatively thin, for example, about 1000 angstroms. At the same time, the slope angle between the surface of the inorganic layer located in the anode hole and the conductive structure is close to 90 degrees. Therefore, the first electrode is very prone to breakage at the anode hole.

[0090] Based on this, referring to Figures 2 and 9, the portion of the inorganic layer 200 located in the first via N1, away from the substrate BS, has a first slope angle β1 with the conductive structure 1410, and this first slope angle can be less than 90 degrees. For example, the portion of the inorganic layer 200 located in the first via N1, away from the substrate BS, can be an arc surface, thereby giving the portion of the inorganic layer 200 located in the first via N1 a smaller step difference. This facilitates good adhesion between the surface of the inorganic layer 200 and the first electrode 110, reducing the risk of breakage of the first electrode 110 at the first via N1, and thus ensuring the connection effect between the first electrode 110 and the conductive structure 1410 of the pixel driving circuit 140. For example, the inorganic layer 200 can be processed using gas etching methods such as carbon tetrachloride or sulfur tetrafluoride to form the aforementioned slope angle.

[0091] For example, as shown in Figure 9, the first slope angle β1 can be 10 to 80 degrees, such as at least one of 20 to 50 degrees, 30 to 60 degrees, 40 to 70 degrees, and 80 to 90 degrees, thereby facilitating a smooth and seamless transition of the portion of the inorganic layer 200 located in the first via N1 away from the substrate BS, thereby reducing the risk of the first electrode 110 breaking at the first via N1.

[0092] Figure 10 is a schematic diagram of a connection via corresponding to a sub-pixel in a display panel provided by at least one embodiment of the present disclosure.

[0093] For example, referring to Figures 2 and 10, the display panel may further include a second insulating layer 500, which is located between the inorganic layer 200 and the pixel defining layer 400. For example, at least a portion of the inorganic layer 200 is covered by the second insulating layer 500. For example, the second insulating layer 500 includes a plurality of second vias N2, with at least a portion of the inner wall of the connecting via N0 covered by the second insulating layer 500, such that at least a portion of the first via N2 is located within the connecting via N0, and the first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through the first via N2. For example, the portion of the inorganic layer 200 located within the first via N1 is completely covered by the second insulating layer 500 to reduce the risk of positional misalignment between the second insulating layer 500 and the inorganic layer 200. For example, the maximum inner diameter of the second via N2 is smaller than the minimum inner diameter of the connecting via N0. The orthographic projection of the second via N2 on the substrate BS falls into the orthographic projection of the connecting via N0 on the substrate BS, and the orthographic projection of the connecting via N0 on the substrate BS falls into the orthographic projection of the first via N1 on the substrate BS.

[0094] For example, the second insulating layer may include multiple second insulating structures. For example, each of the multiple second insulating structures corresponds one-to-one with a multiple sub-pixels. For example, the orthographic projection area of ​​the second insulating structure on the substrate is smaller than the orthographic projection area of ​​the inorganic structure on the substrate, and the orthographic projection of the second insulating structure on the substrate falls within the orthographic projection of the inorganic structure on the substrate. For example, the orthographic projection of the second insulating structure on the substrate falls within the orthographic projection of the first insulating structure on the substrate.

[0095] By providing a second insulating layer on the inorganic layer, and making the portion of the inorganic layer located in the first via covered by the second insulating layer, the step effect caused by the portion of the inorganic layer located in the first via can be reduced by the second insulating layer, and the risk of the first electrode breaking at the second via is lower; in addition, the first electrode is disposed on the second insulating structure, so that the second insulating structure can make the first electrode have good flatness.

[0096] For example, as shown in FIG10, the surface of the inorganic layer 200 located in the first via N1, away from the substrate BS, has a first slope angle β1 with respect to the conductive structure 1410. The surface of the second insulating layer 500 located in the connecting via N0, away from the substrate BS, has a second slope angle β2 with respect to the conductive structure 1410, and the second slope angle β2 is smaller than the first slope angle β1. For example, the inner wall of the first via N1 has a third slope angle β3 with respect to the conductive structure 1410. For example, the first slope angle β1 can be smaller than the third slope angle β3, and the second slope angle β2 can be smaller than the first slope angle β1. This allows the step of the first insulating layer 300 at the first via N1, the step of the portion of the inorganic layer 200 located in the first via N1, and the step of the portion of the second insulating layer 500 located in the connecting via N0 to gradually decrease in sequence. This facilitates a smooth transition of the first electrode 110 on the surface of the second insulating layer 500 away from the substrate BS and in the second via N2, effectively reducing the risk of breakage of the first electrode 110.

[0097] For example, as shown in Figure 10, both the first insulating layer 300 and the second insulating layer 500 are organic layers, which may include, for example, organic materials such as polyimide, but are not limited thereto. This arrangement allows both the first and second insulating layers to have leveling properties, which helps to reduce the impact of the step difference in the portion of the inorganic layer 200 located in the first via N1.

[0098] For example, as shown in Figure 10, the minimum inner diameter of the second via N2 is not less than 3 micrometers, which helps to increase the contact area between the first electrode 110 and the conductive structure 1410 in the pixel driving circuit 140 and reduce the corresponding contact resistance. For example, the contact resistance can be made less than 8 ohms, which helps to ensure a good connection between the first electrode 110 and the conductive structure 1410.

[0099] For example, as shown in Figure 10, the average thickness of the first insulating layer 300 and the second insulating layer 500 can be 0.5 to 3.0 micrometers, such as 1.0 micrometer, 1.5 micrometer, 2.0 micrometer, 2.5 micrometer, or other values ​​within the range of 0.5 to 3.0 micrometers. For example, the average thickness of the first insulating layer 300 can be substantially the same as the average thickness of the second insulating layer 500. Alternatively, the average thickness of the first insulating layer 300 can be less than the average thickness of the second insulating layer 500. This configuration allows both the first insulating layer 300 and the second insulating layer 500 to have relatively small thicknesses, which is beneficial for achieving a thinner and lighter display panel design.

[0100] At least one embodiment of this disclosure also provides another display panel, the display panel including a substrate, a plurality of sub-pixels, an inorganic layer, a first insulating layer, and a second insulating layer. The plurality of sub-pixels are located on the substrate, and each sub-pixel includes a light-emitting functional layer, and a first electrode and a second electrode located on both sides of the light-emitting functional layer along a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. The sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. The inorganic layer is located between the first electrode and the pixel driving circuit. The first insulating layer is located between the inorganic layer and the pixel driving circuit. The second insulating layer is located between the inorganic layer and at least a portion of the light-emitting functional layer. The inorganic layer includes a plurality of connection vias. The first insulating layer includes a plurality of first vias. The second insulating layer includes a plurality of second vias. At least a portion of the inner wall of the first via is covered by the inorganic layer, such that at least a portion of the connection via is located within the first via. At least a portion of the inner wall of the connection via is covered by the second insulating layer, such that at least a portion of the second via is located within the connection via. The pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

[0101] In at least one embodiment of the present disclosure, in the display panel, at least a portion of the connecting via is located within the first via, and at least a portion of the second via is located within the connecting via. Thus, the first via, the connecting via, and the second via form a via configuration, thereby enabling a good connection between the first electrode and the conductive structure in the pixel driving circuit. Simultaneously, by covering at least a portion of the inner wall of the connecting via with a second insulating layer, the impact of the step difference due to the portion of the inorganic layer located in the first via can be reduced by the second insulating layer, and the risk of the first electrode breaking at the second via can be reduced.

[0102] As shown in FIG1, the display panel includes a substrate BS and a plurality of sub-pixels 10 located on the substrate BS. The sub-pixels 10 include a light-emitting functional layer 130, and a first electrode 110 and a second electrode 120 located on both sides of the light-emitting functional layer 130 along a direction perpendicular to the substrate BS (i.e., the Z direction shown in FIG2). The first electrode 110 is located between at least a portion of the light-emitting functional layer 130 and the substrate BS.

[0103] For example, as shown in Figure 2, the light-emitting functional layer 130 includes multiple film layers. For example, the light-emitting functional layer 130 may include a light-emitting layer for emitting light and a charge-generating layer 133. The charge-generating layer 133 has strong conductivity, which enables the light-emitting functional layer 130 to have advantages such as long lifespan, low power consumption, and high brightness. For example, the light-emitting functional layer 130 can be a film layer in an organic light-emitting element. For example, the light-emitting functional layer 130 may include a first light-emitting layer (EML) 131, a charge-generating layer (CGL) 133, and a second light-emitting layer (EML) 132 stacked together, with the charge-generating layer 133 located between the first light-emitting layer 131 and the second light-emitting layer 132.

[0104] For example, the light-emitting functional layer 130 shown in FIG2 may also include other film layers, such as a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), etc., and the embodiments of this disclosure are not limited thereto. For example, the hole injection layer, hole transport layer, electron transport layer, electron injection layer, charge generation layer 133, and second electrode 120 are all common film layers of multiple sub-pixels 10, and can be referred to as common layers. In addition, the thickness of each film layer shown in FIG2 is only for clear illustration of each film layer and does not represent the actual size.

[0105] For example, as shown in FIG2, sub-pixel 10 may include a tandem light-emitting element, such as a Tandem OLED, but embodiments of this disclosure are not limited thereto.

[0106] As shown in Figure 2, the side of the first electrode 110 facing the substrate BS is also provided with other structures 01, such as a pixel driving circuit 140 electrically connected to the first electrode 110 of the sub-pixel 10, signal lines, and various insulating layers, for example, a passivation layer, a buffer layer, a gate insulating layer, an interlayer insulating layer, etc., which are not limited in the embodiments of this disclosure. The pixel driving circuit 140 is located between the first electrode 110 and the substrate BS and is configured to drive the light-emitting functional layer 130 of the sub-pixel 10 to emit light. For example, the pixel driving circuit 140 may include multiple transistors and at least one capacitor (not shown in the figure). The first electrode 110 can be electrically connected to the pixel driving circuit 240 through a connection via N0 to drive the light-emitting functional layer 130 to emit light.

[0107] As shown in Figure 2, the display panel further includes an inorganic layer 200 located between the first electrode 110 and the pixel driving circuit 140. For example, the first electrode 110 is in contact with the inorganic layer 200. The display panel also includes a first insulating layer 300 located between the inorganic layer 200 and the pixel driving circuit 140, and the first insulating layer 300 is in contact with the inorganic layer 200. For example, the inorganic layer 200 is at least partially configured to block at least one layer of the light-emitting functional layer 130 of adjacent sub-pixels 10, thereby reducing the risk of crosstalk between adjacent sub-pixels 10.

[0108] As shown in Figures 2 and 10, the inorganic layer 200 includes a plurality of connection vias N0, and the first insulating layer 300 includes a plurality of first vias N1. At least a portion of the inner wall of the first via N1 is covered by the inorganic layer 200, such that at least a portion of the connection via N0 is located within the first via N1. For example, the minimum inner diameter of the first via N1 is greater than the minimum inner diameter of the connection via N0.

[0109] As shown in Figures 2 and 10, the display panel may further include a second insulating layer 500, which is located between the inorganic layer 200 and the pixel defining layer 400. For example, the second insulating layer 500 includes a plurality of second vias N2, at least a portion of the inner wall of the connecting via N0 being covered by the second insulating layer 500, such that at least a portion of the first via N2 is located within the connecting via N0.

[0110] For example, as shown in FIG2, the pixel driving circuit 140 includes a conductive structure 1410, and the first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through a second via N2. For example, a plurality of second vias N2 correspond one-to-one with a plurality of sub-pixels 10. For example, the pixel driving circuit 140 may include a thin-film transistor, and the conductive structure 1410 may be the source or drain of the thin-film transistor, but is not limited thereto. For example, the conductive structure 1410 may also be a structure in the pixel driving circuit 140 connected to the thin-film transistor, and the embodiments of this disclosure are not limited thereto.

[0111] In at least one embodiment of the present disclosure, in the display panel, at least a portion of the connecting via is located within the first via, and at least a portion of the second via is located within the connecting via. Thus, the first via, the connecting via, and the second via form a via configuration, thereby enabling a good connection between the first electrode and the conductive structure in the pixel driving circuit. Simultaneously, by covering at least a portion of the inner wall of the connecting via with a second insulating layer, the impact of the step difference due to the portion of the inorganic layer located in the first via can be reduced by the second insulating layer, and the risk of the first electrode breaking at the second via can be reduced.

[0112] For example, as shown in Figure 10, the inorganic layer 200 completely covers the inner wall of the first via N1, and the second insulating layer 500 completely covers the inner wall of the connecting via N0. For example, the portion of the inorganic layer 200 located in the first via N1 is completely covered by the second insulating layer 500 to reduce the risk of positional misalignment between the second insulating layer 500 and the inorganic layer 200. For example, the orthographic projection of the second via N2 on the substrate BS falls within the orthographic projection of the connecting via N0 on the substrate BS, and the orthographic projection of the connecting via N0 on the substrate BS falls within the orthographic projection of the first via N1 on the substrate BS. For example, the portion of the first electrode 110 located in the second via N2 does not contact either the connecting via N0 or the first via N1, thereby simplifying the fabrication process of the second via N2.

[0113] For example, as shown in Figure 10, the minimum inner diameter of the second via N2 is not less than 3 micrometers, which helps to increase the contact area between the first electrode 110 and the conductive structure 1410 in the pixel driving circuit 140, and reduce the corresponding contact resistance. For example, the contact resistance between the first electrode 110 and the conductive structure 1410 in the pixel driving circuit 140 can be made smaller, for example, less than 8 ohms, which helps to ensure a good connection between the first electrode 110 and the conductive structure 1410.

[0114] For example, as shown in Figure 10, both the first insulating layer 300 and the second insulating layer 500 are organic layers. For example, they may include organic materials or other organic materials, but are not limited to these. This arrangement allows both the first and second insulating layers to have leveling properties, which helps to reduce the impact of the step difference in the portion of the inorganic layer 200 located in the first via N1.

[0115] For example, as shown in FIG2, the display panel further includes a pixel defining layer 400. At least a portion of the pixel defining layer 400 is located between the light-emitting functional layer 130 and the first electrode 110. The pixel defining layer 400 includes a pixel opening 410 and a pixel defining portion 450 located between adjacent pixel openings 410. The pixel opening 410 exposes at least a portion of the first electrode 110 to define the light-emitting area of ​​the sub-pixel 30. The light-emitting functional layer 130 is disposed in contact with the first electrode 110 through the pixel opening 410. For example, the first electrode 110 and the second electrode 120 located on both sides of the light-emitting functional layer 130 can drive the light-emitting functional layer 130 located between them to emit light. For example, the light-emitting area of ​​the sub-pixel 10 refers to the area where the sub-pixel 10 effectively emits light, and the shape of the light-emitting area refers to a two-dimensional shape. For example, the shape of the light-emitting area may be the same as the shape of the orthographic projection of the portion of the first electrode 110 exposed by the pixel opening 210 onto the substrate BS.

[0116] For example, as shown in FIG2, the inorganic structure 240 includes a protrusion 260 that protrudes relative to the edge of the first insulating structure 310. For example, the inorganic structure 240 includes a portion overlapping the light-emitting area of ​​the sub-pixel 10, and a portion located outside the light-emitting area of ​​the sub-pixel 10. For example, the first electrode 110 is located on and in contact with the inorganic structure 240. For example, the orthographic projection of the first electrode 110 on the substrate BS falls within the orthographic projection of the inorganic structure 240 on the substrate BS. Therefore, the inorganic structure 240 allows the first electrode 110 to have good flatness, resulting in good light emission performance of the sub-pixel 10.

[0117] For example, as shown in FIG2, the pixel defining layer 400 further includes defining openings 420 located between adjacent sub-pixels 10 in at least a portion of the sub-pixels 10. For example, the orthographic projection of the defining openings 420 on the substrate BS is generally annular or strip-shaped and surrounds the light-emitting area of ​​the sub-pixel 10. For example, the light-emitting functional layer 130 includes a plurality of film layers, and at least a portion of the protrusions 260 of at least a portion of each inorganic structure 240 in the inorganic structure 240 is exposed by the defining openings 420 to serve as partitions 2610, the partitions 2610 being configured to block at least one layer of the light-emitting functional layer 130. For example, the partitions 2610 are the portions of the protrusions 260 of the inorganic structure 240 exposed by the defining openings 420.

[0118] For example, as shown in FIG2, at least a portion of the protrusions 260 of the inorganic structure 240 may not be exposed by the defined opening 420. For example, all protrusions 260 of a portion of the inorganic structure 240 include portions exposed by the defined opening 420, and all protrusions 260 of a portion of the inorganic structure 240 are covered by the pixel defining portion 450. For example, multiple inorganic structures 240 may be arranged at intervals. For example, adjacent inorganic structures 240 may have a connecting structure to connect adjacent inorganic structures 240 to each other. For example, multiple inorganic structures 240 may be a single integrated structure, and the embodiments of this disclosure do not limit the structural form of multiple inorganic structures 240. For example, at least a portion of the protrusion 260 of the inorganic structure 240 corresponding to one of the adjacent sub-pixels 10 (e.g., the inorganic structure 240 corresponding to the second sub-pixel 102 shown in FIG2) is exposed by the defined opening 420.

[0119] By setting the aforementioned partition, at least one layer of the light-emitting functional layer between adjacent sub-pixels can be isolated, thereby reducing the risk of crosstalk between adjacent sub-pixels. For other structures in the display panel, please refer to the relevant descriptions in the foregoing embodiments, which will not be repeated here.

[0120] Currently, the inorganic layer in some display panels is typically quite thick, for example, 300 to 1500 angstroms, while the first electrode is relatively thin, for example, about 1000 angstroms. At the same time, the slope angle between the surface of the inorganic layer located in the anode hole and the conductive structure is close to 90 degrees. Therefore, the first electrode is very prone to breakage at the anode hole.

[0121] As shown in Figures 1 and 2, at least one embodiment of this disclosure also provides another display panel, which includes a substrate BS and a plurality of sub-pixels 10 located on the substrate BS. Each sub-pixel 10 includes a light-emitting functional layer 130, and a first electrode 110 and a second electrode 120 located on both sides of the light-emitting functional layer 130 along a direction perpendicular to the substrate BS. The first electrode 110 is located between the light-emitting functional layer 130 and the substrate BS.

[0122] For example, as shown in Figure 2, the light-emitting functional layer 130 includes multiple film layers. For example, the light-emitting functional layer 130 may include a light-emitting layer for emitting light and a charge-generating layer 133. The charge-generating layer 133 has strong conductivity, which enables the light-emitting functional layer 130 to have advantages such as long lifespan, low power consumption, and high brightness. For example, the light-emitting functional layer 130 can be a film layer in an organic light-emitting element. For example, the light-emitting functional layer 130 may include a first light-emitting layer (EML) 131, a charge-generating layer (CGL) 133, and a second light-emitting layer (EML) 132 stacked together, with the charge-generating layer 133 located between the first light-emitting layer 131 and the second light-emitting layer 132.

[0123] For example, the light-emitting functional layer 130 shown in FIG2 may also include other film layers, such as a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL), etc., and the embodiments of this disclosure are not limited thereto. For example, the hole injection layer, hole transport layer, electron transport layer, electron injection layer, charge generation layer 133, and second electrode 120 are all common film layers of multiple sub-pixels 10, and can be referred to as common layers. In addition, the thickness of each film layer shown in FIG2 is only for clear illustration of each film layer and does not represent the actual size.

[0124] For example, as shown in FIG2, sub-pixel 10 may include a tandem light-emitting element, such as a Tandem OLED, but embodiments of this disclosure are not limited thereto.

[0125] As shown in Figure 2, other structures 01 are also provided on the side of the first electrode 110 facing the substrate BS, such as a pixel driving circuit 140 electrically connected to the first electrode 110 of the sub-pixel 10, signal lines, and various insulating layers, for example, a passivation layer, a buffer layer, a gate insulating layer, an interlayer insulating layer, etc., which are not limited in the embodiments of this disclosure. The pixel driving circuit 140 is located between the first electrode 110 and the substrate BS and is configured to drive the light-emitting functional layer 130 of the sub-pixel 10 to emit light. For example, the pixel driving circuit 140 may include multiple transistors and at least one capacitor (not shown in the figure).

[0126] As shown in Figure 2, the display panel also includes an inorganic layer 200, which is located between the first electrode 110 and the pixel driving circuit 140. For example, the first electrode 110 is in contact with the inorganic layer 200. The inorganic layer 200 is at least partially configured to isolate at least one layer of the light-emitting functional layer 130 of adjacent sub-pixels 10, thereby reducing the risk of crosstalk between adjacent sub-pixels 10. For the isolation principle of the inorganic layer 200 on the light-emitting functional layer 130, please refer to the relevant description in the foregoing embodiments.

[0127] As shown in Figures 2 and 9, the display panel also includes a first insulating layer 300. The first insulating layer 300 is located between the inorganic layer 200 and the pixel driving circuit 140. The inorganic layer 200 includes a plurality of connection vias N0, and the first insulating layer 300 includes a plurality of first vias N1. At least a portion of the inner wall of the first vias N1 is covered by the inorganic layer 200, such that at least a portion of the connection vias N0 is located within the first vias N1. The pixel driving circuit 140 includes a conductive structure 1410. The first electrode 110 of the sub-pixel 10 is connected to the conductive structure 1410 through the connection vias N0 to drive the light-emitting functional layer 130 to emit light. For example, the first electrode 110 and the second electrode 120 located on both sides of the light-emitting functional layer 130 can drive the light-emitting functional layer 130 located between them to emit light.

[0128] As shown in Figures 2 and 9, the portion of the inorganic layer 200 located in the first via N1, away from the substrate BS, has a first slope angle β1 between itself and the conductive structure 1410, and the first slope angle can be less than 90 degrees.

[0129] For example, as shown in Figures 2 and 9, the surface of the inorganic layer 200 located in the first via N1, away from the substrate BS, can be an arc surface. This allows the portion of the inorganic layer 200 located in the first via N1 to have a smaller step, which facilitates good adhesion between the surface of the inorganic layer 200 and the first electrode 110. This reduces the risk of breakage of the first electrode 110 at the first via N1, and further helps ensure the connection effect between the first electrode 110 and the conductive structure 1410 of the pixel driving circuit 140. For example, the inorganic layer 200 can be processed using gas etching methods such as carbon tetrachloride or sulfur tetrafluoride to form the aforementioned slope angle.

[0130] For example, as shown in Figure 9, the first slope angle β1 can be 10 to 80 degrees, such as at least one of 20 to 50 degrees, 30 to 60 degrees, 40 to 70 degrees, and 80 to 90 degrees. This facilitates a smooth and seamless transition of the portion of the inorganic layer 200 located in the first via N1 away from the substrate BS within the first via N1, thereby reducing the risk of breakage of the first electrode 110 at the first via N1. For other structures in the display panel, please refer to the relevant descriptions in the foregoing embodiments; they will not be repeated here.

[0131] Figure 11 is a schematic block diagram of a display device provided in at least one embodiment of the present disclosure.

[0132] As shown in Figure 11, at least one embodiment of this disclosure provides a display device, which includes any of the display panels described above. Therefore, the technical effects of the aforementioned display panels can also be reflected in this display device, and will not be elaborated further here.

[0133] For example, the display device also includes a cover plate located on the light-emitting side of the display panel.

[0134] For example, the display device can be an organic light-emitting diode display device or other display device, as well as any product or component with display function, such as a television, digital camera, mobile phone, watch, tablet computer, laptop computer, or navigator that includes the display device. This embodiment is not limited to this.

[0135] The following points need to be explained:

[0136] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure, and other structures can be referred to the general design.

[0137] (2) Where there is no conflict, features of the same embodiment and different embodiments of this disclosure may be combined with each other.

[0138] The above description is merely an exemplary embodiment of this disclosure and is not intended to limit the scope of protection of this disclosure, which is determined by the appended claims.

Claims

1. A display panel, comprising: Substrate; Multiple sub-pixels are located on the substrate. Each sub-pixel includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. Each sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. An inorganic layer is located between the first electrode and the pixel driving circuit. The inorganic layer includes multiple connection vias, the pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the connection vias. The plurality of sub-pixels includes a first sub-pixel and a second sub-pixel, wherein the luminous efficiency of the first sub-pixel is greater than that of the second sub-pixel, and the minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel is not less than 3.5 micrometers.

2. The display panel according to claim 1, wherein, The minimum inner diameter of the connecting via corresponding to the first electrode of the first sub-pixel is the first inner diameter, and the minimum inner diameter of the connecting via corresponding to the first electrode of the second sub-pixel is the second inner diameter, wherein the first inner diameter is greater than the second inner diameter.

3. The display panel according to claim 2, wherein, The plurality of sub-pixels also includes a third sub-pixel, wherein the luminous efficiency of the third sub-pixel is greater than that of the second sub-pixel. The minimum inner diameter of the connecting via corresponding to the first electrode of the third sub-pixel is the third inner diameter, which is not greater than the first inner diameter and is greater than the second inner diameter.

4. The display panel according to claim 3, wherein, The first inner diameter and the third inner diameter are both greater than 3.5 micrometers, and the second inner diameter is 2.4 to 3.1 micrometers.

5. The display panel according to claim 1, wherein, The plurality of sub-pixels includes at least two sub-pixels with different luminous efficiencies, and the minimum inner diameter of the connecting via corresponding to the first electrode of each sub-pixel is not less than 3.5 micrometers.

6. The display panel according to claim 5, wherein, The ratio of the minimum inner diameter of the connecting via corresponding to the first electrode of sub-pixels with different luminous efficiencies is 0.95 to 1.

05.

7. The display panel according to any one of claims 1-6, further comprising: A first insulating layer is located between the inorganic layer and the substrate and is in contact with the inorganic layer; A pixel defining layer, at least a portion of which is located between the light-emitting functional layer and the first electrode, the pixel defining layer including pixel openings and pixel defining portions located between adjacent pixel openings, the pixel openings exposing at least a portion of the first electrode, and the light-emitting functional layer being disposed in contact with the first electrode through the pixel openings. The inorganic layer includes a plurality of inorganic structures, the first insulating layer includes a plurality of first insulating structures, the inorganic structure includes a protrusion protruding relative to the edge of the first insulating structure, the light-emitting functional layer includes a plurality of film layers, and the pixel defining layer further includes a defining opening located between adjacent sub-pixels in at least a portion of the sub-pixels, at least a portion of the protrusion of each of the inorganic structures in at least a portion of the inorganic structure is exposed by the defining opening to serve as a partition, the partition being configured to partition at least one of the light-emitting functional layers; The first insulating layer includes a plurality of first vias, at least a portion of the inner wall of the first vias being covered by the inorganic layer, such that at least a portion of the connecting vias is located within the first vias.

8. The display panel according to claim 7, wherein, The portion of the inorganic layer located in the first via has a first slope angle between its surface away from the substrate and the conductive structure, the first slope angle being less than 90 degrees.

9. The display panel according to claim 8, wherein the first slope angle is 10 to 80 degrees.

10. The display panel according to any one of claims 7-9, further comprising: A second insulating layer is located between the inorganic layer and the pixel defining layer; The second insulating layer includes a plurality of second vias, and at least a portion of the inner wall of the connecting via is covered by the second insulating layer, such that at least a portion of the second via is located in the connecting via, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

11. The display panel according to claim 10, wherein, The inorganic layer, located in the first via, has a first slope angle between its surface away from the substrate and the conductive structure; the second insulating layer, located in the connecting via, has a second slope angle between its surface away from the substrate and the conductive structure; the second slope angle is smaller than the first slope angle.

12. The display panel according to claim 10 or 11, wherein, The average thickness of the first insulating layer and the second insulating layer is 0.5 to 3 micrometers.

13. The display panel according to any one of claims 10-12, wherein, The minimum inner diameter of the second via is greater than 3 micrometers.

14. The display panel according to any one of claims 10-13, wherein, Both the first insulating layer and the second insulating layer are organic layers.

15. A display panel, comprising: Substrate; Multiple sub-pixels are located on the substrate. Each sub-pixel includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. Each sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. An inorganic layer is located between the first electrode and the pixel driving circuit; A first insulating layer is located between the inorganic layer and the pixel driving circuit; The second insulating layer is located between at least a portion of the inorganic layer and the light-emitting functional layer. The inorganic layer includes multiple connection vias, the first insulating layer includes multiple first vias, and the second insulating layer includes multiple second vias. At least a portion of the inner wall of the first via is covered by the inorganic layer, such that at least a portion of the connection via is located within the first via. At least a portion of the inner wall of the connection via is covered by the second insulating layer, such that at least a portion of the second via is located within the connection via. The pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the second via.

16. The display panel according to claim 15, wherein, The inorganic layer completely covers the inner wall of the first via, and the second insulating layer completely covers the inner wall of the connecting via.

17. The display panel according to claim 15 or 16, wherein, The minimum inner diameter of the second via is not less than 3 micrometers.

18. The display panel according to any one of claims 15-17, wherein, The display panel further includes a pixel defining layer, at least a portion of which is located between the light-emitting functional layer and the first electrode. The pixel defining layer includes pixel openings and pixel defining portions located between adjacent pixel openings. The pixel openings expose at least a portion of the first electrode, and the light-emitting functional layer is disposed in contact with the first electrode through the pixel openings. The inorganic layer includes a plurality of inorganic structures, the first insulating layer includes a plurality of first insulating structures, the inorganic structure includes a protrusion protruding relative to the edge of the first insulating structure, the light-emitting functional layer includes a plurality of film layers, the pixel defining layer further includes a defining opening located between adjacent sub-pixels in at least a portion of the sub-pixels, at least a portion of the protrusion of each of the inorganic structures in at least a portion of the inorganic structure is exposed by the defining opening to serve as a partition, the partition is configured to partition at least one of the light-emitting functional layers, and both the first insulating layer and the second insulating layer include organic materials.

19. A display panel, comprising: Substrate; Multiple sub-pixels are located on the substrate. Each sub-pixel includes a light-emitting functional layer and a first electrode and a second electrode located on both sides of the light-emitting functional layer in a direction perpendicular to the substrate. The first electrode is located between at least a portion of the light-emitting functional layer and the substrate. Each sub-pixel also includes a pixel driving circuit configured to drive the light-emitting functional layer of the sub-pixel to emit light. An inorganic layer is located between the first electrode and the pixel driving circuit; A first insulating layer is located between the inorganic layer and the pixel driving circuit. The inorganic layer includes multiple connection vias, and the first insulating layer includes multiple first vias. At least a portion of the inner wall of each first via is covered by the inorganic layer, such that at least a portion of the connection via is located within the first via. The pixel driving circuit includes a conductive structure, and the first electrode of the sub-pixel is connected to the conductive structure through the connection vias. The inorganic layer has a slope angle, less than 90 degrees, between the surface of the portion of the inorganic layer located away from the substrate and the conductive structure.

20. The display panel according to claim 19, wherein, The slope angle is 10 to 80 degrees.

21. A display device comprising a display panel as described in any one of claims 1-20.

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