Inverter and method for controlling output current of inverter

Abstract

The present application provides an inverter and a method for controlling the output current of an inverter. The inverter comprises a direct-current input, a first bridge arm, a second bridge arm, a transformer, a third bridge arm, an alternating-current output, and a controller. When an output voltage amplitude of the inverter is greater than a preset voltage threshold, a control unit in the controller outputs a target feedforward control parameter to a signal generator on the basis of an input voltage of the direct-current input, an output voltage of the alternating-current output, an output current, and a reference output current. The target feedforward control parameter comprises at least one of switch frequencies of a first switch and a second switch in each bridge arm and a dead time between the first switch and the second switch in each bridge arm. The signal generator in the controller outputs a control signal to the first switch and the second switch in each bridge arm on the basis of the target feedforward control parameter, so that the output current of the inverter is reduced from being greater than or equal to a preset current threshold to being less than the preset current threshold, thereby preventing hardware of the inverter from being damaged.

Description

Inverter and Inverter Output Current Control Method

[0001] This application claims priority to Chinese Patent Application No. 202411223646.6, filed on September 2, 2024, entitled "Inverter and Method for Controlling Output Current of Inverter", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of photovoltaic power generation technology, and in particular to an inverter and a method for controlling the output current of the inverter. Background Technology

[0003] With the rapid development of distributed photovoltaic (PV) power generation systems, micro PV inverters have a broader application prospect due to their advantages such as modularity, high efficiency, flexible configuration, and high security. Typically, the DC input of a micro PV inverter is used to connect to PV modules, while its AC output is used to connect to the power grid. Specifically, the micro PV inverter converts the DC output from the PV modules into AC power and supplies it to the grid; in this mode, it operates in grid-connected mode. According to the grid connection requirements of micro PV inverters, they need to adapt to different types of grid disturbances to ensure stable AC output, such as high-voltage ride-through, low-voltage ride-through, surges, and grid phase jumps. However, when grid disturbances occur, they can cause sudden changes in grid voltage amplitude, leading to overcurrent in the micro PV inverter's output current, potentially exceeding the hardware's capacity and causing damage to the inverter's hardware. Summary of the Invention

[0004] This application provides an inverter and an inverter output current control method. When the power grid is disturbed, the inverter output current can be quickly controlled to be reduced to less than a preset current threshold, thereby avoiding the risk of overcurrent or even exceeding the inverter's hardware capacity, thus preventing damage to the inverter hardware and improving the inverter's safety and service life.

[0005] In a first aspect, embodiments of this application provide an inverter for energy conversion between photovoltaic modules and the power grid. The inverter includes a DC input, a first arm, a second arm, a transformer, a third arm, an AC output, and a controller. The transformer includes a primary winding and a secondary winding. The DC input is connected to the photovoltaic modules to receive the DC power output from them. The first and second arms are connected in parallel to the DC input. The primary winding is connected between the midpoints of the first and second arms. The third arm is connected between the secondary winding and the AC output. The AC output is connected to the power grid to supply AC power. Each of the first, second, and third arms includes a first switch and a second switch connected in series. The controller includes a control unit and a signal generator. When a disturbance occurs in the power grid, the grid voltage amplitude increases. Since the inverter's output voltage amplitude is the same as the grid voltage amplitude, the inverter's output voltage amplitude also increases, such as when it exceeds a preset voltage threshold. At this point, the control unit outputs target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, the output current, and the reference output current. These target feedforward control parameters include at least one of the switching frequencies of the first and second switches in each bridge arm, and the dead time between the first and second switches in each bridge arm. It should be understood that the dead time between the first and second switches in each bridge arm can be the dead time between the first and second switches in the first bridge arm, the dead time between the first and second switches in the second bridge arm, or the dead time between the first and second switches in the third bridge arm. Further, the signal generator outputs control signals to the first and second switches in each bridge arm based on the target feedforward control parameters, causing the inverter's output current to decrease from being greater than or equal to a preset current threshold to being less than a preset current threshold. It should be understood that the first and second switches in each bridge arm will close or open upon receiving the control signal, thereby ensuring that the inverter's output current remains consistent with the reference output current and decreases to less than the preset current threshold. By implementing the embodiments of this application, when a disturbance occurs in the power grid, the output current of the inverter can be quickly controlled to be reduced to less than a preset current threshold, thereby avoiding risks such as overcurrent of the inverter output current or even exceeding the hardware tolerance of the inverter, thus preventing damage to the inverter hardware and improving the safety and service life of the inverter.

[0006] In conjunction with the first aspect, in one possible implementation, when the target feedforward control parameters include the switching frequency and dead time, and the control unit includes a feedforward control parameter output unit, a compensation parameter output unit, and an adder, the feedforward control parameter output unit is used to output the dead time in the target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, and the reference output current, and to output the switching frequency to be compensated to the adder. Further, the compensation parameter output unit is used to output a switching frequency compensation value to the adder based on the output current of the AC output and the reference output current. Even further, the adder is used to output the switching frequency in the target feedforward control parameters to the signal generator based on the switching frequency to be compensated and the switching frequency compensation value.

[0007] Optionally, when the target feedforward control parameters include at least one of switching frequency, dead time, and phase difference (i.e., inner phase shift angle) between the first switch in the first bridge arm and the second switch in the second bridge arm, and the phase difference (i.e., outer phase shift angle) between the first switch in the first bridge arm and the first switch in the third bridge arm, the feedforward control parameter output unit is used to output at least one of the switching frequency, dead time, and phase difference (i.e., inner phase shift angle) in the target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, and the reference output current, and to output the phase difference to be compensated to the adder. Further, the compensation parameter output unit is used to output a phase difference compensation value to the adder based on the output current of the AC output and the reference output current. Even further, the adder is used to output the phase difference (i.e., outer phase shift angle) in the target feedforward control parameters to the signal generator based on the phase difference to be compensated and the phase difference compensation value.

[0008] By implementing the embodiments of this application, the switching frequency or phase difference to be compensated can be compensated, and the compensated switching frequency or phase difference can be output, thereby improving the accuracy of the switching frequency or phase difference (i.e., the outward phase angle) in the target feedforward control parameters, and thus realizing high-precision control of the inverter's output current.

[0009] In conjunction with the first aspect, in one possible implementation, the aforementioned target feedforward control parameters further include at least one of the phase difference between the first switch in the first bridge arm and the second switch in the second bridge arm, and the phase difference between the first switch in the first bridge arm and the first switch in the third bridge arm. By implementing the embodiments of this application, the number and type of specific control parameters in the target feedforward control parameters can be adjusted according to the actual application scenario, resulting in greater control flexibility.

[0010] In conjunction with the first aspect, in one possible implementation, when the feedforward control parameter output unit includes a first firmware, a second firmware, a memory, and a selector, the first firmware is used to output a target address index to the selector based on the input voltage of the DC input. The second firmware is used to output a target index group to the memory based on the input voltage, the output voltage of the AC output, and the reference output current. The memory stores n lookup tables, each lookup table including multiple sets of feedforward control parameters, each set of feedforward control parameters corresponding to an index group, and the index groups corresponding to the i-th set of feedforward control parameters in each lookup table are the same. Further, the memory is used to output n sets of feedforward control parameters to the selector based on the target index group. The n sets of feedforward control parameters are feedforward control parameters corresponding to the target index groups in the n lookup tables, and each set of feedforward control parameters in the n sets of feedforward control parameters corresponds to an address index. Even further, the selector is used to select the feedforward control parameter corresponding to the target address index from the n sets of feedforward control parameters, and based on the feedforward control parameter corresponding to the target address index, output the dead time in the target feedforward control parameters to the signal generator, and output the switching frequency to be compensated to the adder. By implementing the embodiments of this application, a fast response to sudden changes in the voltage amplitude of the power grid can be achieved through algorithm-hardened first and second firmware, as well as hardware such as memory and selectors, thereby improving the execution speed of the feedforward control parameter output unit.

[0011] In conjunction with the first aspect, in one possible implementation, where the feedforward control parameter output unit further includes a first register and a second register, the selector is used to output the dead time in the target feedforward control parameters to the first register based on the feedforward control parameters corresponding to the target address index, and to output the switching frequency to be compensated to the second register. Further, the first register is used to store the dead time in the target feedforward control parameters and output it to the signal generator. The second register is used to store the switching frequency to be compensated and output it to the adder. It should be understood that the switching frequency and the switching frequency to be compensated in the embodiments of this application can be replaced by phase difference (i.e., outward phase shift angle) and phase difference to be compensated, respectively, and will not be elaborated further here. Implementing the embodiments of this application allows for the storage and rapid output of a set of feedforward control parameters selected by the selector through hardware such as the first register and the second register, thereby supporting high-speed querying by the signal generator and the adder, and improving the execution speed of the feedforward control parameter output unit.

[0012] In conjunction with the first aspect, in one possible implementation, the first register is used to output the currently stored dead time of the target feedforward control parameters to the signal generator when no output from the selector is received after storing the dead time of the target feedforward control parameters. That is, before the selector outputs a new dead time of the target feedforward control parameters, the first register outputs the currently stored dead time of the target feedforward control parameters to the signal generator, thereby avoiding interruption of signal generation due to the inability to continuously output the dead time of the target feedforward control parameters, thus ensuring the continuity of the signal generator's output control signal and enhancing its applicability. The second register is used to output the currently stored switching frequency to be compensated to the adder when storing the switching frequency to be compensated and no output from the selector is received. That is, before the selector outputs a new switching frequency to be compensated, the second register outputs the currently stored switching frequency to be compensated to the adder, thereby avoiding interruption of signal generation due to the inability to continuously output the switching frequency to be compensated, thus ensuring the continuity of the signal generator's output control signal and enhancing its applicability.

[0013] It should be understood that the switching frequency and the switching frequency to be compensated in the embodiments of this application can be replaced by the phase difference (i.e., the outward phase shift angle) and the phase difference to be compensated, respectively, and will not be described in detail here.

[0014] In conjunction with the first aspect, in one possible implementation, the aforementioned target address index is positively correlated with the difference between the input voltage and the lower limit of the DC input voltage. Implementing the embodiments of this application allows for the rapid selection of the corresponding feedforward control parameters via the target address index, thereby improving the execution speed of the feedforward control parameter output unit.

[0015] In conjunction with the first aspect, in one possible implementation, the aforementioned target index group includes an index corresponding to the voltage gain of the output current control method and an index corresponding to the reference output current. The voltage gain is positively correlated with the output voltage and negatively correlated with the input voltage. Implementing the embodiments of this application allows for the rapid retrieval of the corresponding n sets of feedforward control parameters through the target index group, thereby improving the execution speed of the feedforward control parameter output unit.

[0016] In conjunction with the first aspect, in one possible implementation, when the control unit includes a first analog-to-digital converter (ADC) and a second ADC, the first ADC is used to acquire the input voltage in the form of an analog signal from the DC input and output the input voltage in the form of a digital signal to the first firmware and the second firmware. The second ADC is used to acquire the output voltage in the form of an analog signal from the AC output and output the output voltage in the form of a digital signal to the second firmware. Each of the first and second ADCs has a voltage sampling frequency greater than a preset frequency threshold, meaning both are high-speed ADCs. Implementing this embodiment allows for timely detection of voltage amplitude changes during grid disturbances using high-speed ADCs, improving the inverter's response speed to grid disturbances and enabling rapid control of the inverter's output current in the event of sudden voltage amplitude changes in the grid. Furthermore, it avoids deviations in current control due to the inability to detect voltage changes during grid disturbances in a timely manner, thus improving the accuracy of the inverter's output current control.

[0017] In conjunction with the first aspect, in one possible implementation, where the control unit further includes a third analog-to-digital converter (ADC), the third ADC is used to acquire the output current in analog signal form of the AC output and output the output current in digital signal form of the AC output to the compensation parameter output unit. Wherein, the number of binary bits of the output current in digital signal form of the AC output from the third ADC is greater than a preset bit threshold, i.e., the third ADC is a high-precision ADC. Implementing the embodiments of this application allows for real-time output of the output current in digital signal form via a high-precision ADC, reducing signal distortion and errors in the output current, thereby improving the measurement accuracy and stability of the controller. Furthermore, it enables high-precision control of the inverter's output current under steady-state conditions, thereby controlling the total harmonic distortion (THD) of the output current within the required range, thus broadening its applicability.

[0018] Secondly, embodiments of this application provide an output current control method for an inverter. The inverter includes a DC input, a first bridge arm, a second bridge arm, a transformer, a third bridge arm, and an AC output. The transformer includes a primary winding and a secondary winding. The DC input is used to connect to photovoltaic modules. The first and second bridge arms are connected in parallel and then connected to the DC input. The primary winding is connected between the midpoints of the first and second bridge arms. The third bridge arm is connected between the secondary winding and the AC output, which is used to connect to the power grid. Each of the first, second, and third bridge arms includes a first switch and a second switch connected in series. This method can be executed by a controller located inside or outside the inverter. The controller includes a control unit and a signal generator. In this method, when the output voltage amplitude of the inverter exceeds a preset voltage threshold, the controller, through the control unit, outputs target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, the output current, and a reference output current. The target feedforward control parameters include at least one of the switching frequencies of the first and second switches in each bridge arm, and the dead time between the first and second switches in each bridge arm. Further, the controller outputs control signals to the first and second switches in each bridge arm based on the target feedforward control parameters via a signal generator, causing the inverter's output current to decrease from greater than or equal to a preset current threshold to less than the preset current threshold. Implementing this embodiment allows for rapid control of the inverter's output current to decrease to less than the preset current threshold when grid disturbances occur, thereby avoiding risks such as overcurrent or exceeding the inverter's hardware tolerance, thus preventing hardware damage and improving the inverter's safety and lifespan.

[0019] In conjunction with the second aspect, in one possible implementation, when the target feedforward control parameters include the switching frequency and dead time, and the control unit includes a feedforward control parameter output unit, a compensation parameter output unit, and an adder, the controller, through the feedforward control parameter output unit, outputs the dead time from the target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, and the reference output current, and outputs the switching frequency to be compensated to the adder. Further, the controller, through the compensation parameter output unit, outputs a switching frequency compensation value to the adder based on the output current of the AC output and the reference output current. Even further, the controller, through the adder, outputs the switching frequency from the target feedforward control parameters to the signal generator based on the switching frequency to be compensated and the switching frequency compensation value.

[0020] Optionally, when the target feedforward control parameters include at least one of the following: switching frequency, dead time, and phase difference (i.e., inner phase shift angle) between the first switch in the first bridge arm and the second switch in the second bridge arm, and phase difference (i.e., outer phase shift angle) between the first switch in the first bridge arm and the first switch in the third bridge arm, the controller, through the feedforward control parameter output unit, outputs at least one of the switching frequency, dead time, and phase difference (i.e., inner phase shift angle) from the target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, and the reference output current, and outputs the phase difference to be compensated to the adder. Further, the controller, through the compensation parameter output unit, outputs a phase difference compensation value to the adder based on the output current of the AC output and the reference output current. Even further, the controller, through the adder, outputs the phase difference (i.e., outer phase shift angle) from the target feedforward control parameters to the signal generator based on the phase difference to be compensated and the phase difference compensation value.

[0021] By implementing the embodiments of this application, the switching frequency or phase difference to be compensated can be compensated, and the compensated switching frequency or phase difference can be output, thereby improving the accuracy of the switching frequency or phase difference (i.e., the outward phase angle) in the target feedforward control parameters, and thus realizing high-precision control of the inverter's output current.

[0022] In conjunction with the second aspect, in one possible implementation, the aforementioned target feedforward control parameters further include at least one of the phase difference between the first switch in the first bridge arm and the second switch in the second bridge arm, and the phase difference between the first switch in the first bridge arm and the first switch in the third bridge arm. By implementing the embodiments of this application, the number and type of specific control parameters in the target feedforward control parameters can be adjusted according to the actual application scenario, resulting in greater control flexibility.

[0023] In conjunction with the second aspect, in one possible implementation, when the feedforward control parameter output unit includes a first firmware, a second firmware, a memory, and a selector, the controller outputs a target address index to the selector based on the DC input voltage via the first firmware, and outputs a target index group to the memory based on the input voltage, the AC output voltage, and the reference output current via the second firmware. The memory stores n lookup tables, each containing multiple sets of feedforward control parameters, each set of feedforward control parameters corresponding to an index group, and the i-th set of feedforward control parameters in each lookup table corresponds to the same index group. Further, the controller outputs n sets of feedforward control parameters to the selector based on the target index group via the memory. These n sets of feedforward control parameters are feedforward control parameters corresponding to the target index groups in the n lookup tables, and each set of feedforward control parameters corresponds to an address index. Even further, the controller selects the feedforward control parameter corresponding to the target address index from the n sets of feedforward control parameters via the selector, and based on the feedforward control parameter corresponding to the target address index, outputs the dead time in the target feedforward control parameters to the signal generator and the switching frequency to be compensated to the adder. By implementing the embodiments of this application, a fast response to sudden changes in the voltage amplitude of the power grid can be achieved through algorithm-hardened first and second firmware, as well as hardware such as memory and selectors, thereby improving the execution speed of the feedforward control parameter output unit.

[0024] In conjunction with the second aspect, in one possible implementation, where the feedforward control parameter output unit further includes a first register and a second register, the controller, based on the feedforward control parameters corresponding to the target address index, outputs the dead time of the target feedforward control parameters to the first register and the switching frequency to be compensated to the second register. Further, the controller stores the dead time of the target feedforward control parameters in the first register and outputs it to the signal generator, and stores the switching frequency to be compensated in the second register and outputs it to the adder. It should be understood that the switching frequency and the switching frequency to be compensated in this embodiment can be replaced by phase difference (i.e., outward phase shift angle) and the phase difference to be compensated, respectively, and will not be elaborated further here. Implementing this embodiment allows for the storage and rapid output of a set of feedforward control parameters selected by the selector through hardware such as the first and second registers, thereby supporting high-speed lookup by the signal generator and adder, and improving the execution speed of the feedforward control parameter output unit.

[0025] In conjunction with the second aspect, in one possible implementation, the controller, after storing the dead time in the target feedforward control parameters through the first register and without receiving output from the selector, outputs the currently stored dead time in the target feedforward control parameters to the signal generator. That is, before the selector outputs a new dead time in the target feedforward control parameters, the controller outputs the currently stored dead time in the target feedforward control parameters to the signal generator through the first register. This avoids the signal generator experiencing interruption due to the inability to continuously output the dead time in the target feedforward control parameters, thus ensuring the continuity of the signal generator's output control signal and enhancing its applicability. The controller can also, after storing the switching frequency to be compensated through the second register and without receiving output from the selector, output the currently stored switching frequency to be compensated to the adder. In other words, before the selector outputs a new switching frequency to be compensated, the currently stored switching frequency to be compensated is output to the adder through the second register. This avoids the signal generator from being interrupted due to the inability to continuously output the switching frequency to be compensated, thus ensuring the continuity of the signal generator's output control signal and making it more versatile.

[0026] It should be understood that the switching frequency and the switching frequency to be compensated in the embodiments of this application can be replaced by the phase difference (i.e., the outward phase shift angle) and the phase difference to be compensated, respectively, and will not be described in detail here.

[0027] In conjunction with the second aspect, in one possible implementation, the aforementioned target address index is positively correlated with the difference between the input voltage and the lower limit of the DC input voltage. Implementing the embodiments of this application allows for the rapid selection of the corresponding feedforward control parameters via the target address index, thereby improving the execution speed of the feedforward control parameter output unit.

[0028] In conjunction with the second aspect, in one possible implementation, the aforementioned target index group includes an index corresponding to the voltage gain of the output current control method and an index corresponding to the reference output current. The voltage gain is positively correlated with the output voltage and negatively correlated with the input voltage. Implementing the embodiments of this application allows for the rapid retrieval of the corresponding n sets of feedforward control parameters through the target index group, thereby improving the execution speed of the feedforward control parameter output unit.

[0029] In conjunction with the second aspect, in one possible implementation, when the control unit includes a first analog-to-digital converter (ADC) and a second ADC, the controller acquires the input voltage in the form of an analog signal from the DC input via the first ADC and outputs the input voltage in the form of a digital signal to both the first and second firmware. The controller also acquires the output voltage in the form of an analog signal from the AC output via the second ADC and outputs the output voltage in the form of a digital signal to the second firmware. Each of the first and second ADCs has a voltage sampling frequency greater than a preset frequency threshold, meaning both are high-speed ADCs. Implementing this embodiment allows for timely detection of voltage amplitude changes during grid disturbances via high-speed ADCs, improving the inverter's response speed to grid disturbances and enabling rapid control of the inverter's output current in the event of sudden voltage amplitude changes in the grid. Furthermore, it avoids deviations in current control due to the inability to detect voltage changes during grid disturbances in a timely manner, thus improving the accuracy of the inverter's output current control.

[0030] In conjunction with the second aspect, in one possible implementation, where the control unit further includes a third analog-to-digital converter (ADC), the controller acquires the output current in analog signal form from the AC output via the third ADC and outputs the output current in digital signal form from the AC output to the compensation parameter output unit. Wherein, the number of binary bits in the digital signal form of the AC output output from the third ADC is greater than a preset bit threshold, indicating that the third ADC is a high-precision ADC. Implementing this embodiment allows for real-time acquisition of the output current via a high-precision ADC, reducing signal distortion and errors in the output current, thereby improving the measurement accuracy and stability of the controller. Furthermore, it enables high-precision control of the inverter's output current under steady-state conditions, thereby keeping the total harmonic distortion (THDi) of the output current within the required range, thus broadening its applicability.

[0031] It should be understood that the implementations and beneficial effects of the above-mentioned aspects of this application can be referenced from each other. Attached Figure Description

[0032] Figure 1 is a schematic diagram of the structure of the photovoltaic power generation system provided in an embodiment of this application;

[0033] Figure 2 is a circuit diagram of an inverter provided in an embodiment of this application;

[0034] Figure 3 is a structural schematic diagram of a controller provided in an embodiment of this application;

[0035] Figure 4 is another structural schematic diagram of the controller provided in an embodiment of this application;

[0036] Figure 5 is a schematic diagram of the structure of multiple lookup tables in the memory provided in an embodiment of this application;

[0037] Figure 6 is a schematic diagram of the storage space of each type of control parameter in the lookup table provided in the embodiments of this application;

[0038] Figure 7 is another structural schematic diagram of the controller provided in an embodiment of this application;

[0039] Figure 8 is another structural schematic diagram of the controller provided in an embodiment of this application;

[0040] Figure 9A is another structural schematic diagram of the controller provided in an embodiment of this application;

[0041] Figure 9B is another structural schematic diagram of the controller provided in an embodiment of this application;

[0042] Figure 10 is a waveform diagram of the control signal provided in an embodiment of this application;

[0043] Figure 11 shows the dead time T provided in the embodiments of this application. dp1 A schematic diagram of the change curve;

[0044] Figures 12A to 12C are another circuit diagram of the inverter provided in the embodiments of this application;

[0045] Figure 13 is a flowchart illustrating the inverter output current control method provided in an embodiment of this application. Detailed Implementation

[0046] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0047] The implementation of the technical solution of this application will be further described in detail below with reference to the accompanying drawings.

[0048] Referring to Figure 1, which is a schematic diagram of the photovoltaic power generation system provided in an embodiment of this application, the photovoltaic power generation system includes inverters 11a to 11n. Each inverter 11a to 11n can be connected to one or more photovoltaic modules. This embodiment does not limit the number of photovoltaic modules connected to each inverter. For example, the input terminal of inverter 11a is used to connect to photovoltaic modules 10a, ..., and the input terminal of inverter 11n is used to connect to photovoltaic modules 10n. The output terminals of inverters 11a to 11n are all used to connect to the power grid 12. When the photovoltaic power generation system supplies power to the power grid 12, each inverter is used to invert the DC power output from its connected photovoltaic modules into AC power and supply power to the power grid 12.

[0049] The circuit structure and working principle of the inverter provided in this application will be illustrated below with reference to Figures 2 to 12C.

[0050] Referring to Figure 2, which is a circuit diagram of an inverter provided in an embodiment of this application, the inverter 2 is used to connect between the photovoltaic module 3 and the power grid 4 for energy conversion. Specifically, the inverter 2 is used to convert the direct current output by the photovoltaic module 3 into alternating current and supply power to the power grid 4.

[0051] The inverter 2 described above includes a DC input in, a first bridge arm 20, a second bridge arm 21, a transformer 22, a third bridge arm 23, an AC output out, and a controller 24. The first bridge arm 20 and the second bridge arm 21 form a primary-side DC / AC full-bridge circuit, the transformer 22 forms a boost circuit, and the third bridge arm 23 forms a secondary-side half-bridge circuit. The transformer 22 (such as a high-frequency transformer) includes a primary winding Z1 and a secondary winding Z2, with the primary winding Z1 connected to the secondary winding Z2 via a magnetic core. The DC input in is used to connect to the photovoltaic module 3 to receive the DC power output from the photovoltaic module 3. The first bridge arm 20 and the second bridge arm 21 are connected in parallel to the DC input in. The primary winding Z1 is connected between the midpoint of the first bridge arm 20 and the midpoint of the second bridge arm 21. The third bridge arm 23 is connected between the secondary winding Z2 and the AC output out. The AC output out is used to connect to the power grid 4 to supply AC power to the grid 4.

[0052] Each of the aforementioned first bridge arm 20, second bridge arm 21, and third bridge arm 23 includes a first switch and a second switch connected in series. Specifically, the first bridge arm 20 includes a first switch S1 and a second switch S2 connected in series; the second bridge arm 21 includes a first switch S3 and a second switch S4 connected in series; and the third bridge arm 23 includes a first switch S5 and a second switch S6 connected in series. The first switch S5 can be a bidirectional switch composed of sub-switches S51 and S52 connected in series, and the second switch S6 can be a bidirectional switch composed of sub-switches S61 and S62 connected in series. Optionally, the first switch S5 can be composed of sub-switches S51 and S52 with a common-source structure connected in series, and the second switch S6 can be composed of sub-switches S61 and S62 with a common-source structure connected in series. It should be understood that the above are merely examples, and the embodiments of this application do not limit the specific structure of the first switch S5 and the second switch S6.

[0053] When a disturbance occurs in grid 4, the voltage amplitude of grid 4 will increase. Since the output voltage amplitude of inverter 2 is the same as that of grid 4, the output voltage amplitude of inverter 2 will also increase accordingly. If the output voltage amplitude of inverter 2 rises above a preset voltage threshold, according to I=U / R, the output current of inverter 2 will also increase as the output voltage amplitude of inverter 2 rises. If the output current of inverter 2 rises above or equal to a preset current threshold, it will exceed the hardware capacity of inverter 2 and cause hardware damage. Therefore, when a disturbance occurs in grid 4, controller 24 will quickly control the output current of inverter 2 to decrease from above or equal to the preset current threshold to below the preset current threshold.

[0054] In its specific implementation, the controller 24 includes a control unit 240 and a signal generator 241. The control unit 240 is used to, when the output voltage amplitude of the inverter 2 exceeds a preset voltage threshold, generate a signal based on the input voltage V of the DC input in. dc AC output voltage V g Output current I g and reference output current I ref The target feedforward control parameters are output to the signal generator 241. The preset voltage threshold can be a pre-set value or a value determined by the internal components of the inverter 2. The aforementioned input voltage V... dc Output voltage V g Output current I g and reference output current I ref All parameters are in digital signal form. The target feedforward control parameters include the switching frequency f of the first and second switches in each bridge arm. sAnd at least one (i.e., one or more) of the following: the dead time between the first and second switches in each bridge arm. The switching frequency f of the first and second switches in each bridge arm. s All are the same, that is, the switching frequency f of all switches in inverter 2 is the same. s Consistent. The dead time between the first switch and the second switch in each bridge arm can be the dead time T between the first switch S1 and the second switch S2 in the first bridge arm 20. dp1 The dead time T between the first switch S3 and the second switch S4 in the second bridge arm 21 dp2 The dead time T between the first switch S5 and the second switch S6 in the third bridge arm 23 ds In other words, the target feedforward control parameters include the switching frequency f. s Dead time T dp1 Dead time T dp2 and dead zone time T ds At least one of them.

[0055] Furthermore, the signal generator 241 outputs control signals to the first and second switches in each bridge arm based on the target feedforward control parameters, so that the output current of the inverter 2 is reduced from greater than or equal to a preset current threshold to less than a preset current threshold. It should be understood that the first and second switches in each bridge arm will close or open upon receiving the control signal, thereby causing the output current of the inverter 2 to be different from the reference output current I. ref Maintain a consistent current and reduce it to below a preset current threshold. The preset current threshold can be a pre-set value or a value determined by the hardware capacity of inverter 2.

[0056] By implementing the embodiments of this application, when the power grid 4 is disturbed, the output current of the inverter 2 can be quickly controlled to be reduced to less than the preset current threshold, thereby avoiding the risk of overcurrent of the inverter 2 or even exceeding the hardware bearing capacity of the inverter 2, thus avoiding damage to the hardware of the inverter 2 and improving the safety and service life of the inverter 2.

[0057] It is understandable that the above reference output current I ref This can be a preset value or a value determined by the internal components of inverter 2. For example, the reference output current I... ref It can be the product of the output current amplitude and the output voltage phase of inverter 2. The output current amplitude of inverter 2 can be the quotient of the output power and the output voltage amplitude of inverter 2. The output power of inverter 2 is the same as the output power of photovoltaic module 3, and the output voltage phase of inverter 2 is the same as the voltage phase of the power grid 4.

[0058] In some feasible implementations, the aforementioned target feedforward control parameters further include at least one of the phase difference ph1 between the first switch S1 in the first bridge arm 20 and the second switch S4 in the second bridge arm 21, and the phase difference ph2 between the first switch S1 in the first bridge arm 20 and the first switch S5 in the third bridge arm 23. That is, the target feedforward control parameters include the switching frequency f. s Dead time T dp1 Dead time T dp2 Dead time T ds At least one of phase difference ph1 and phase difference ph2. Phase difference ph1 can be called the inner phase shift angle, and phase difference ph2 can be called the outer phase shift angle. It is understood that the number of control parameters in the target feedforward control parameters is greater than or equal to one. The number and type of control parameters in the target feedforward control parameters can be determined by the actual application scenario and are not limited here.

[0059] Referring to Figure 3, which is a schematic diagram of the controller provided in an embodiment of this application, the control unit 240 shown in Figure 2 includes a feedforward control parameter output unit 2401, a compensation parameter output unit 2402, and an adder 2403.

[0060] When the control unit 240 is to compensate the switching frequency f s Compensation is performed, and the target feedforward control parameters include the switching frequency f. s When considering dead time, the aforementioned feedforward control parameter output unit 2401 is used to output parameters based on the input voltage V. dc Output voltage V g and reference output current I ref The dead time in the target feedforward control parameters is output to the signal generator 241, and the switching frequency f to be compensated is output to the adder 2403. s '。 Wherein, the input voltage V dc This can be understood as the input voltage and output voltage V of inverter 2. g The output voltage of inverter 2 can be understood. The dead time in the target feedforward control parameters includes the dead time T. dp1 Dead time T dp2 and dead zone time T ds At least one of them. The above-mentioned compensation parameter output unit 2402 is used for output current I. g and reference output current I ref Output switching frequency compensation value Δf to adder 2403 s The adder 2403 described above is used based on the switching frequency f to be compensated. s 'and switching frequency compensation value △f s The switching frequency f in the target feedforward control parameters is output to the signal generator 241.s Among them, the switching frequency f s The switching frequency f to be compensated s 'Compensation value Δf with switching frequency s sum.

[0061] It is understood that when the target feedforward control parameters also include at least one of phase difference ph1 and phase difference ph2, the aforementioned feedforward control parameter output unit 2401 will not only output the dead time in the target feedforward control parameters to the signal generator 241, but also output at least one of the phase difference ph1 and phase difference ph2 in the target feedforward control parameters to the signal generator 241.

[0062] Optionally, when the control unit 240 compensates for the phase difference ph2' to be compensated, and the target feedforward control parameters include the switching frequency f s When at least one of the following conditions is met (dead time, phase difference ph1, and phase difference ph2), the feedforward control parameter output unit 2401 is used to output parameters based on the input voltage V. dc Output voltage V g and reference output current I ref The switching frequency f in the target feedforward control parameters is output to the signal generator 241. s At least one of dead time and phase difference ph1 is used to output the phase difference ph2' to be compensated to adder 2403. The dead time in the target feedforward control parameters includes dead time T. dp1 Dead time T dp2 and dead zone time T ds At least one of them. The above-mentioned compensation parameter output unit 2402 is used for output current I. g and reference output current I ref The adder 2403 outputs a phase difference compensation value Δph2 to the adder 2403. The adder 2403 is used to output the phase difference ph2 in the target feedforward control parameters to the signal generator 241 based on the phase difference ph2' to be compensated and the phase difference compensation value Δph2. Here, the phase difference ph2 is the sum of the phase difference ph2' to be compensated and the phase difference compensation value Δph2.

[0063] When the control unit 240 outputs the target feedforward control parameters, the signal generator 241 outputs control signals to the first and second switches in each bridge arm based on the target feedforward control parameters, so that the output current of the inverter 2 is reduced to less than a preset current threshold. For example, the control signal can be a pulse width modulation (PWM) signal.

[0064] By implementing the embodiments of this application, the switching frequency f to be compensated can be... sCompensate for the phase difference ph2 to be compensated, and output the compensated switching frequency f. s Or a phase difference ph2, thereby increasing the switching frequency f in the target feedforward control parameters. s The accuracy of the phase difference ph2 is used to achieve high-precision control of the output current of inverter 2.

[0065] In some feasible implementations, the feedforward control parameter output unit 2401 can be implemented by a combination of algorithm-hardened firmware and hardware, or by pure hardware, or by pure software.

[0066] In some feasible implementations, the compensation parameter output unit 2402 can be implemented purely in software, purely in hardware, or a combination of both. When the compensation parameter output unit 2402 is implemented purely in software, its current closed-loop control strategy can be stored in the control interrupt of the controller 24 for code execution, and the execution frequency of the current closed-loop control strategy (e.g., less than or equal to 100kHz) is lower than the execution frequency of the hardware feedforward control strategy of the feedforward control parameter output unit 2401 (e.g., greater than or equal to 1MHz). The hardware feedforward control strategy refers to the strategy based on the input voltage V. dc Output voltage V g and reference output current I ref The output target feedforward control parameters, excluding the switching frequency f s Or control strategies based on parameters other than the phase difference ph2. Current closed-loop control strategy refers to a control strategy based on the output current I. g and reference output current I ref Output switching frequency compensation value Δf s Or a control strategy for the phase difference compensation value Δph2.

[0067] Referring to Figure 4, which is another structural schematic diagram of the controller provided in an embodiment of this application, as shown in Figure 4, the feedforward control parameter output unit 2401 shown in Figure 3 above includes a first firmware 24010, a second firmware 24011, a memory 24012, and a selector 24013.

[0068] The first firmware 24010 and the second firmware 24011 can be device drivers stored internally in the controller 24.

[0069] The memory 24012 can be random access memory (RAM) or other memory whose contents can be quickly and easily rewritten. The memory 24012 stores lookup tables LUT1 to LUTn. Each lookup table includes multiple sets of feedforward control parameters. Each set of feedforward control parameters corresponds to an index group. The index group corresponding to the i-th set of feedforward control parameters in each lookup table is the same, where i is an integer greater than or equal to 1 and less than or equal to n. Each set of feedforward control parameters is based on the main circuit parameters of inverter 2, the voltage gain m, and the reference output current I. ref The calculated optimal parameters. For example, the main circuit parameters include the turns ratio of transformer 22, the inductance value of resonant inductor L1, the capacitance value of resonant capacitor C1, the capacitance value of resonant capacitor C2, and the parameters of other circuit components.

[0070] For example, the structural diagram of the above lookup tables LUT1 to LUTn can be shown in Figure 5. The number n of lookup tables LUT1 to LUTn can be determined by the upper limit value V of the input voltage of the DC input in. dcmax and the lower limit of the input voltage V dcmin The decision, of which V dcmax and V dcmin The DC voltage operating range of inverter 2 (V dcmax V dcmin The number n of lookup tables LUT1 to LUTn can be determined by the following formula (1): n = (V dcmax -V dcmin ) / V step , formula (1)

[0071] In formula (1), V step This is used to represent the preset voltage step size of inverter 2. This preset voltage step size can be a pre-set value or a value determined by the internal components of inverter 2. For example, lookup table LUT1 includes the input voltage of DC input in at (V... dcmin V dcmin +V step Multiple sets of feedforward control parameters are included in the lookup table LUTn, which includes the input voltage of the DC input in within (V). dcmax -V step V dcmax Multiple sets of feedforward control parameters within )

[0072] Taking lookup table LUT1 as an example, when the target feedforward control parameters include the switching frequency f s and dead time (e.g., dead time T) dp1 Dead time Tdp2 and dead zone time T ds When looking up at least one of the following multi-degree-of-freedom control parameters, each set of feedforward control parameters in table LUT1 includes the switching frequency f. s1 And dead time. Among them, one control parameter in the target feedforward control parameters corresponds to one degree of freedom, and the dead time in each set of feedforward control parameters includes the dead time T between the first switch S1 and the second switch S2. dp11 Dead time T between the first switch S3 and the second switch S4 dp21 and the dead time T between the first switch S5 and the second switch S6 ds1 At least one of them. And when the target feedforward control parameters include phase difference ph1, phase difference ph2, and switching frequency f... s Dead time T dp1 Dead time T dp2 and dead zone time T ds When using multi-degree-of-freedom control parameters, each set of feedforward control parameters includes the phase difference ph11 between the first switch S1 and the second switch S4, the phase difference ph21 between the first switch S1 and the first switch S5, and the switching frequency f. s1 Dead time T dp11 Dead time T dp21 and dead zone time T ds1 .

[0073] The storage space size for each type of control parameter in the lookup table LUT1 is determined by the voltage gain m of inverter 2 and the reference output current I. ref And the control accuracy of inverter 2 is also determined. For example, the storage space for each type of control parameter can be as shown in Figure 6, and the storage space size for each type of control parameter can be a 5×5 storage space, that is, the number of each type of control parameter can be 25 (i.e., 5×5). At this time, the lookup table LUT1 includes 25 sets of feedforward control parameters.

[0074] It should be understood that the specific structure of other lookup tables LUTn in lookup tables LUT1 to LUTn can be found in the above description of the specific structure of lookup table LUT1, and will not be repeated here.

[0075] The selector 24013 described above is a multi-channel selector, meaning that selector 24013 includes multiple data input ports. The number of data input ports is consistent with the number of lookup tables LUT1 to LUTn, and a set of feedforward control parameters found in each lookup table according to the index group is output to the corresponding data input port of each lookup table.

[0076] Referring to Figure 7, which is another structural schematic diagram of the controller provided in this application embodiment, the control unit 240 shown in Figure 4 further includes a first analog-to-digital converter (ADC) 2404 and a second ADC 2405. The voltage sampling frequency of each of the first ADC 2404 and the second ADC 2405 is greater than a preset frequency threshold. For example, the preset frequency threshold can be 1MHz or other values. That is, both the first ADC 2404 and the second ADC 2405 are high-speed ADCs. For example, both the first ADC 2404 and the second ADC 2405 are error ADCs or pipelined ADCs. When a disturbance occurs in the power grid 4, the first ADC 2404 is used to acquire the input voltage in analog signal form of the DC input in and output the input voltage V in digital signal form to the first firmware 24010 and the second firmware 24011. dc The second analog-to-digital converter 2405 is used to acquire the output voltage in analog signal form from the AC output OUT, and output the output voltage V in digital signal form to the second firmware 24011. g By implementing the embodiments of this application, the voltage amplitude change of the power grid 4 during disturbances can be detected in a timely manner through a high-speed analog-to-digital converter, thereby improving the response speed of the inverter 2 when the power grid 4 experiences disturbances. This enables rapid control of the output current of the inverter 2 in the event of sudden changes in the voltage amplitude of the power grid 4. Furthermore, it avoids deviations in current control caused by the inability to detect voltage changes during disturbances in the power grid 4 in a timely manner, thus improving the accuracy of the output current control of the inverter 2.

[0077] When a disturbance occurs in power grid 4, and the control unit 240 switches at the frequency f to be compensated... s When performing compensation, the specific implementation method of the hardware feedforward control strategy executed by the above-mentioned feedforward control parameter output unit 2401 is as follows.

[0078] The aforementioned first firmware 24010 is used for input voltage V dc Output the target address index x to selector 24013, such as outputting the target address index x to the address input port of selector 24013. The target address index x is related to the input voltage V. dc and the lower limit of the input voltage V of the DC input in dcmin The difference between them is positively correlated. For example, the target address index x can be determined by the following formula (2). x = floor[(V dc -V dcmin )*n / (V dcmax -V dcmin )], formula (2)

[0079] The aforementioned second firmware 24011 is used for input voltage V dc Output voltage V g and reference output current I ref Output the target index group to memory 24012. The target index group includes the index corresponding to the voltage gain m of inverter 2 and the reference output current I. ref The corresponding index, the index corresponding to the voltage gain m, can be understood as the horizontal axis index of the feedforward control parameter, and the reference output current I. ref The corresponding index can be understood as the ordinate index of the feedforward control parameters. This voltage gain m is related to the output voltage V. g Positive correlation, voltage gain m is related to input voltage V dc Negative correlation. For example, the voltage gain m can be determined by the following formula (3): m = V g / (2yV dc ), formula (3)

[0080] In formula (3), y is used to represent the ratio of the number of turns of the primary winding Z1 to the number of turns of the secondary winding Z2, that is, the turns ratio of transformer 22.

[0081] The aforementioned memory 24012 is used to output n sets of feedforward control parameters to the selector 24013 based on the target index group. The n sets of feedforward control parameters are the feedforward control parameters corresponding to the target index group in lookup tables LUT1 to LUTn. Each of the n sets of feedforward control parameters corresponds to an address index, which is the index corresponding to a data input port of the selector 24013.

[0082] The selector 24013 is used to select the feedforward control parameter corresponding to the target address index x from n sets of feedforward control parameters, and based on the feedforward control parameter corresponding to the target address index x, outputs the dead time in the target feedforward control parameter to the signal generator 241, and outputs the switching frequency f to be compensated to the adder 2403. s It should be understood that the dead time in the target feedforward control parameters specifically refers to the dead time in the feedforward control parameters corresponding to the target address index x, and the switching frequency f to be compensated. s Specifically, the switching frequency f in the feedforward control parameters corresponding to the target address index x. s1 By implementing the embodiments of this application, a fast response to sudden voltage amplitude changes in the power grid 4 can be achieved through hardware such as the algorithm-hardened first firmware 24010 and second firmware 24011, as well as the memory 24012 and selector 24013, thereby improving the execution speed of the feedforward control parameter output unit 2401.

[0083] It is understood that when the target feedforward control parameters also include at least one of phase difference ph1 and phase difference ph2, the selector 24013 will not only output the dead time in the target feedforward control parameters to the signal generator 241, but also output at least one of the phase difference ph1 and phase difference ph2 in the target feedforward control parameters to the signal generator 241.

[0084] As shown in Figure 8, the feedforward control parameter output unit 2401 shown in Figure 7 further includes a first register 24014 and a second register 24015, which can also be referred to as feedforward registers. The selector 24013 is also used to output the dead time of the target feedforward control parameters to the first register 24014 based on the feedforward control parameters corresponding to the target address index x, and to output the switching frequency f to be compensated to the second register 24015. s Furthermore, the first register 24014 is used to store the dead time in the target feedforward control parameters and output it to the signal generator 241. The second register 24015 is used to store the dead time in the target feedforward control parameters and output it to the signal generator 241. s The parameters are stored and output to adder 2403. By implementing the embodiments of this application, a set of feedforward control parameters selected by selector 24013 can be stored and quickly output through hardware such as first register 24014 and second register 24015, thereby supporting high-speed querying of signal generator 241 and adder 2403, and improving the execution speed of feedforward control parameter output unit 2401.

[0085] Furthermore, the first register 24014 is also used to output the currently stored dead time in the target feedforward control parameters to the signal generator 241 when the dead time is stored and no output is received from the selector 24013. That is, before the selector 24013 outputs a new dead time in the target feedforward control parameters, the first register 24014 will output the currently stored dead time to the signal generator 241, thus avoiding interruption of signal generation in the signal generator 241 due to the inability to continuously output the dead time in the target feedforward control parameters. This ensures the continuity of the control signal output by the signal generator 241 and enhances its applicability. When the selector 24013 has already output a new dead time in the target feedforward control parameters, the first register 24014 will store the new dead time in the target feedforward control parameters and output it to the signal generator 241. The second register 24015 is also used to... s After storage, and if no output is received from selector 24013, the currently stored switching frequency f to be compensated will be stored. sThe output is given to adder 2403. That is, the next output from selector 24013 will be a new switching frequency f to be compensated. s Previously, the second register 24015 would store the currently stored switching frequency f to be compensated. s The output is fed to adder 2403, thus avoiding the inability to continuously output the switching frequency f to be compensated. s This causes a signal generator 241 to experience a waveform interruption, thus ensuring the continuity of the control signal output by the signal generator 241 and making it more versatile. Meanwhile, the selector 24013 has already output a new switching frequency f to be compensated. s In the case of ', the second register 24015 will store the new switching frequency f to be compensated. s And output it to adder 2403.

[0086] It is understood that when the target feedforward control parameters also include at least one of phase difference ph1 and phase difference ph2, the first register 24014 will not only output the dead time in the target feedforward control parameters to the signal generator 241, but also output at least one of the phase difference ph1 and phase difference ph2 in the target feedforward control parameters to the signal generator 241.

[0087] It is understandable that when a disturbance occurs in the power grid 4, and the control unit 240 compensates for the phase difference ph2' to be compensated, the dead time in the target feedforward control parameter of the hardware feedforward control strategy executed by the aforementioned feedforward control parameter output unit 2401 can be replaced with the switching frequency f in the target feedforward control parameter. s The switching frequency f is described by at least one of the following: dead time, phase difference ph1, and the switching frequency f. s and the switching frequency f to be compensated s The description is as follows: 'Replace them with phase difference ph2 and phase difference to be compensated ph2 respectively', which will not be elaborated here.

[0088] Referring to Figure 9A, which is another structural schematic diagram of the controller provided in an embodiment of this application, as shown in Figure 9A, the control unit 240 shown in Figure 8 further includes a third analog-to-digital converter 2406. The third analog-to-digital converter 2406 outputs an output current I in the form of a digital signal. gThe number of binary bits is greater than a preset bit threshold. For example, the preset bit threshold can be 9 bits or other bit lengths. In this case, the third analog-to-digital converter 2406 is a high-precision analog-to-digital converter. Optionally, the voltage sampling frequency of the third analog-to-digital converter 2406 is less than or equal to a preset frequency threshold. In this case, the third analog-to-digital converter 2406 is a low-speed, high-precision analog-to-digital converter. For example, the third analog-to-digital converter 2406 can be a successive approximation register analog-to-digital converter, a Σ-Δ analog-to-digital converter, or other high-precision analog-to-digital converter. When a disturbance occurs in the power grid 4, the third analog-to-digital converter 2406 is used to acquire the output current in analog signal form of the AC output and output the output current I in digital signal form to the compensation parameter output unit 2402. g By implementing the embodiments of this application, an output current I in digital signal form can be output in real time via a high-precision analog-to-digital converter. g This reduces the output current I. g This reduces signal distortion and errors, thereby improving the measurement accuracy and stability of the controller 24. Furthermore, it enables high-precision control of the inverter 2's output current under steady-state conditions, thus keeping the total harmonic distortion (THDi) of the output current within the required range, thus broadening its applicability.

[0089] Optionally, as shown in Figure 9B, the control unit 240 shown in Figure 8 further includes a fourth analog-to-digital converter 2407 and an output current estimation unit 2408, wherein the output current estimation unit 2408 can be implemented by combinational logic circuits or software. When a disturbance occurs in the power grid 4, the fourth analog-to-digital converter 2407 is used to acquire the resonant current in analog signal form flowing through the resonant inductor L1, and outputs the resonant current I in digital signal form to the output current estimation unit 2408. r The fourth analog-to-digital converter 2407 has a voltage sampling frequency greater than a preset frequency threshold, meaning it is a high-speed analog-to-digital converter. Furthermore, the output current estimation unit 2408 is used to estimate the resonant current I. r The preset control signal and the main circuit parameters of inverter 2 are restored to obtain the output current I in digital signal form. g It outputs a digital signal of current I to the compensation parameter output unit 2402. g At this time, the output current I g This can be understood as an estimated value of the output current. The preset control signal refers to the pre-set control signals for the first and second switches in each bridge arm. The main circuit parameters include the turns ratio of transformer 22, the inductance value of resonant inductor L1, the capacitance value of resonant capacitor C1, the capacitance value of resonant capacitor C2, and the parameters of other circuit components.

[0090] When a disturbance occurs in power grid 4, and the control unit 240 switches at the frequency f to be compensated... sWhen performing compensation, the specific implementation method of the current closed-loop control strategy executed by the above-mentioned compensation parameter output unit 2402 is as follows.

[0091] As shown in Figures 9A and 9B above, the compensation parameter output unit 2402 includes a subtractor 24021 and a current controller 24022. For example, the current controller 24022 can be a proportional-resonant (PR) controller, a repetitive controller, or a proportional-integral (PI) controller. Upon receiving the output current I... g Then, the subtractor 24021 is used based on the output current I g and reference output current I ref Output current I to current controller 24022 g With reference output current I ref The difference between them. For example, during the positive half-cycle when the voltage of grid 4 is greater than zero, the output current I... g With reference output current I ref The difference between them is the reference output current I. ref Subtract output current I g The difference was then obtained. During the negative half-cycle when the voltage of grid 4 is less than zero, the output current I... g With reference output current I ref The difference between them is the output current I. g Subtract the reference output current I ref The difference is then obtained. Further, the current controller 24022 is used to control the output current I... g With reference output current I ref The difference between them is converted into a switching frequency compensation value Δf s Output switching frequency compensation value Δf to adder 2403 s Furthermore, the adder 2403 is used based on the switching frequency f to be compensated. s 'and switching frequency compensation value △f s The switching frequency f in the target feedforward control parameters is output to the signal generator 241. s .

[0092] It is understandable that when a disturbance occurs in the power grid 4, and the control unit 240 compensates for the phase difference ph2' to be compensated, the control unit 240 can adjust the switching frequency f to be compensated. s During compensation, the switching frequency compensation value Δf in the current closed-loop control strategy executed by the compensation parameter output unit 2402 is... s Switching frequency f s and the switching frequency f to be compensated sThe description is as follows: 'Replace them with the phase difference compensation value Δph2, phase difference ph2, and phase difference to be compensated ph2 respectively', which will not be elaborated here.

[0093] After obtaining the target feedforward control parameters, the signal generator 241 uses pulse width modulation (PWM) to generate control signals for the first and second switches in each bridge arm based on the target feedforward control parameters, and outputs the control signals to the first and second switches in each bridge arm, thereby reducing the output current of the inverter 2 to less than a preset current threshold. The PWM method can also be replaced with other waveform generation methods, which are not limited here.

[0094] For example, during the positive half-cycle when the voltage of grid 4 is greater than zero, and the target feedforward control parameters include phase difference ph1, phase difference ph2, and switching frequency f. s Dead time T dp1 Dead time T dp2 and dead zone time T ds In this case, the waveform diagram of the control signal can be shown in Figure 10. Here, the phase difference ph1 is the phase difference between the falling edge of the first switch S1 and the falling edge of the second switch S4, and the phase difference ph2 is the phase difference between the falling edge of the first switch S1 and the falling edge of the sub-switch S51 in the first switch S5. The switching frequency f... s Let T be the switching frequency of each of the following switches: first switch S1, second switch S2, first switch S3, second switch S4, sub-switches S51 and S52, and sub-switches S61 and S62, and let T be the switching period of each switch. s (i.e., 1 / f) s Dead time T dp1 Dead time T is the time between the falling edge of the first switch S1 and the rising edge of the second switch S2, or the time between the rising edge of the first switch S1 and the falling edge of the second switch S2. dp2 Dead time T is the time between the rising edge of the first switch S3 and the falling edge of the second switch S4, or the time between the falling edge of the first switch S3 and the rising edge of the second switch S4. ds The dead time T is the time between the rising edge of sub-switch S51 in the first switch S5 and the falling edge of sub-switch S61 in the second switch S6, or the time between the falling edge of sub-switch S51 in the first switch S5 and the rising edge of sub-switch S61 in the second switch S6. During this time, both sub-switch S52 in the first switch S5 and sub-switch S62 in the second switch S6 are normally on. It can be understood that during the negative half-cycle when the voltage of power grid 4 is less than zero, the dead time T... dsThen it is replaced by the time between the rising edge of sub-switch S52 in the first switch S5 and the falling edge of sub-switch S62 in the second switch S6, or the time between the falling edge of sub-switch S52 in the first switch S5 and the rising edge of sub-switch S62 in the second switch S6. In this case, both sub-switch S51 in the first switch S5 and sub-switch S61 in the second switch S6 are normally open.

[0095] By implementing the embodiments of this application, the output current of inverter 2 can be quickly controlled in the event of sudden changes in the voltage amplitude of the power grid 4, and high-precision control of the output current of inverter 2 can also be achieved under steady-state conditions, making it more applicable.

[0096] The dead time T in the target feedforward control parameters dp1 Taking this as an example, during the positive half-cycle (i.e., half a power frequency cycle) when the voltage of grid 4 is greater than zero, and the voltage gain m of inverter 2 is less than 1, the dead time T dp1 The variation curve can be illustrated in Figure 11. Under ideal conditions, the dead time T dp1 The change curve is curve a, while in reality, the dead time T dp1 The change curve is curve b, and the dead time T dp1 The time interval between changes is Δt. It can be understood that the dead time T... dp1 The time interval Δt between changes in the feedforward control parameter output unit is consistent with the time interval during which the feedforward control parameter output unit 2401 executes the hardware feedforward control strategy. For example, when the execution frequency of the hardware feedforward control strategy by the feedforward control parameter output unit 2401 is 1MHz, the time interval Δt (i.e., the execution time step) during which the feedforward control parameter output unit 2401 executes the hardware feedforward control strategy is 1μs. Therefore, the time interval during which the feedforward control parameter output unit 2401 executes the hardware feedforward control strategy is very short. Thus, this embodiment of the application can achieve rapid control of the inverter 2's output current in the event of a sudden change in the voltage amplitude of the power grid 4.

[0097] In some feasible implementations, the inverter 2 described above can be a single-stage inverter or other inverters with similar circuit structures. For example, when the inverter 2 is a single-stage resonant dual active bridge (DAB) micro-inverter, the circuit structure of the inverter 2 can be as shown in Figures 12A to 12C. As shown in Figure 12A, the inverter 2 shown in Figure 2 includes a resonant circuit composed of a resonant inductor L1, a resonant capacitor C1, and a resonant capacitor C2. The resonant inductor L1 is connected between one end of the secondary winding Z2 and the midpoint of the third bridge arm 23. The resonant capacitors C1 and C2 are connected in series to the AC output out, and the other end of the secondary winding Z2 is connected to the series connection point of the resonant capacitors C1 and C2. Optionally, the resonant circuit shown in Figure 12A can be replaced by the resonant circuit shown in Figure 12B, specifically including a resonant inductor L3 and a resonant capacitor C4. In this circuit, the resonant inductor L3 is connected between one end of the secondary winding Z2 and the midpoint of the third bridge arm 23, and the resonant capacitor C4 is connected between the other end of the secondary winding Z2 and one end of the second switch S6, excluding the midpoint of the third bridge arm 23. Optionally, the resonant circuit shown in Figure 12A can be replaced by the resonant circuit shown in Figure 12C, specifically including the resonant inductor L4 and the resonant capacitor C5. In this circuit, the resonant inductor L4 is connected between one end of the secondary winding Z2 and the series connection point of sub-switches S51 and S52, and the resonant capacitor C5 is connected between the other end of the secondary winding Z2 and the series connection point of sub-switches S61 and S62. It is understood that the above are merely examples, and the embodiments of this application do not limit the specific structure and connection positions of the resonant circuit.

[0098] As shown in Figures 12A to 12C above, the inverter 2 shown in Figure 2 also includes an input filter circuit 25, an output filter circuit 26, a resolution circuit 27, and a drive circuit 28. The input filter circuit 25 includes an electromagnetic interference (EMI) filter circuit 251 and a DC filter circuit composed of inductor L2 and capacitor C3. Both the EMI filter circuit 251 and the DC filter circuit are used to filter the input voltage of the inverter 2. The EMI filter circuit also prevents external electromagnetic noise from interfering with the operation of the controller 24 and the power grid 4. The output filter circuit 26 includes an AC filter circuit and an EMI filter circuit. Both the AC filter circuit and the EMI filter circuit are used to filter the series voltage of resonant capacitors C1 and C2 to obtain the output voltage and supply power to the power grid 4. The inverter 2 shown in Figure 2 also includes a resolution circuit 27 and a drive circuit 28. The controller 24, the resolution circuit 27, and the drive circuit 28 can constitute the control system 29 in the inverter 2. The parsing circuit 27 is used to demodulate the control signal and output it to the drive circuit 28. The drive circuit 28 is used to amplify and isolate the demodulated control signal and output it to the first and second switches in each bridge arm to turn the switches on or off, thereby reducing the output current of the inverter 2 to less than the preset current threshold.

[0099] The inverter 2 provided in this application can achieve rapid control of the output current of the inverter 2 in the event of sudden changes in the voltage amplitude of the power grid 4, and can also achieve high-precision control of the output current of the inverter 2 under steady-state conditions, making it more versatile.

[0100] Referring to Figure 13, which is a flowchart illustrating the output current control method for an inverter provided in an embodiment of this application, the inverter includes a DC input, a first bridge arm, a second bridge arm, a transformer, a third bridge arm, and an AC output. The transformer includes a primary winding and a secondary winding. The DC input is used to connect to photovoltaic modules. The first and second bridge arms are connected in parallel to the DC input. The primary winding is connected between the midpoints of the first and second bridge arms. The third bridge arm is connected between the secondary winding and the AC output, which is used to connect to the power grid. Each of the first, second, and third bridge arms includes a first switch and a second switch connected in series. The output current control method can be executed by a controller inside or outside the inverter. The controller includes a control unit and a signal generator. The output current control method specifically includes steps S101 and S102.

[0101] In step S101, when the output voltage amplitude of the inverter is greater than the preset voltage threshold, the controller outputs the target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, the output current, and the reference output current.

[0102] In step S101, the target feedforward control parameters include at least one of the switching frequencies of the first and second switches in each bridge arm, and the dead time between the first and second switches in each bridge arm.

[0103] The aforementioned target feedforward control parameters also include at least one of the phase difference (i.e., the inner phase shift angle) between the first switch in the first bridge arm and the second switch in the second bridge arm, and the phase difference (i.e., the outer phase shift angle) between the first switch in the first bridge arm and the first switch in the third bridge arm. It is understood that the number of control parameters in the target feedforward control parameters is greater than or equal to one, and this application embodiment does not limit the specific control parameters in the target feedforward control parameters.

[0104] In a control unit comprising a first analog-to-digital converter (ADC) and a second ADC, the controller acquires the input voltage in analog signal form from the DC input via the first ADC and outputs the input voltage in digital signal form to both the first and second firmware. The controller also acquires the output voltage in analog signal form from the AC output via the second ADC and outputs the output voltage in digital signal form to the second firmware. Each of the first and second ADCs has a voltage sampling frequency greater than a preset frequency threshold, meaning both are high-speed ADCs. Implementing this embodiment allows for timely detection of voltage amplitude changes during grid disturbances via high-speed ADCs, improving the inverter's response speed to grid disturbances and enabling rapid control of the inverter's output current in the event of sudden voltage amplitude changes in the grid. Furthermore, it avoids deviations in current control due to the inability to detect voltage changes during grid disturbances in a timely manner, thus improving the accuracy of the inverter's output current control.

[0105] When the target feedforward control parameters include switching frequency and dead time, and the control unit includes a feedforward control parameter output unit, a compensation parameter output unit, and an adder, the controller, through the feedforward control parameter output unit, outputs the dead time from the target feedforward control parameters to the signal generator based on the DC input voltage, the AC output voltage, and the reference output current, and outputs the switching frequency to be compensated to the adder. Further, the controller, through the compensation parameter output unit, outputs a switching frequency compensation value to the adder based on the AC output current and the reference output current. Even further, the controller, through the adder, outputs the switching frequency from the target feedforward control parameters to the signal generator based on the switching frequency to be compensated and the switching frequency compensation value.

[0106] Optionally, when the target feedforward control parameters include at least one of switching frequency, dead time, and phase difference (i.e., inner phase shift angle), and the phase difference (i.e., outer phase shift angle) between the first switch in the first bridge arm and the first switch in the third bridge arm, the controller, through the feedforward control parameter output unit, outputs at least one of the switching frequency, dead time, and phase difference (i.e., inner phase shift angle) from the target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, and the reference output current, and outputs the phase difference to be compensated to the adder. Further, the controller, through the compensation parameter output unit, outputs a phase difference compensation value to the adder based on the output current of the AC output and the reference output current. Even further, the controller, through the adder, outputs the phase difference (i.e., outer phase shift angle) from the target feedforward control parameters to the signal generator based on the phase difference to be compensated and the phase difference compensation value.

[0107] By implementing the embodiments of this application, the switching frequency or phase difference to be compensated can be compensated, and the compensated switching frequency or phase difference can be output, thereby improving the accuracy of the switching frequency or phase difference (i.e., the outward phase angle) in the target feedforward control parameters, and thus realizing high-precision control of the inverter's output current.

[0108] When a disturbance occurs in the power grid, the controller implements the hardware feedforward control strategy through the feedforward control parameter output unit as follows.

[0109] In the case where the feedforward control parameter output unit includes a first firmware, a second firmware, a memory, and a selector, the controller outputs a target address index to the selector based on the DC input voltage using the first firmware, and outputs a target index group to the memory based on the input voltage, the AC output voltage, and the reference output current using the second firmware. The target address index is positively correlated with the difference between the input voltage and the lower limit of the DC input voltage. This target index group includes an index corresponding to the voltage gain of the output current control method and an index corresponding to the reference output current, where the voltage gain is positively correlated with the output voltage and negatively correlated with the input voltage. The memory stores n lookup tables, each containing multiple sets of feedforward control parameters. Each set of feedforward control parameters corresponds to an index group, and the index groups corresponding to the i-th set of feedforward control parameters in each lookup table are identical. Further, the controller outputs n sets of feedforward control parameters to the selector based on the target index group through the memory. These n sets of feedforward control parameters are the feedforward control parameters corresponding to the target index groups in the n lookup tables, and each set of feedforward control parameters corresponds to an address index. Furthermore, the controller selects the feedforward control parameter corresponding to the target address index from n sets of feedforward control parameters via a selector, and based on the feedforward control parameter corresponding to the target address index, outputs the dead time in the target feedforward control parameters to the signal generator and the switching frequency to be compensated to the adder. Implementing the embodiments of this application, a fast response to sudden changes in the voltage amplitude of the power grid can be achieved through algorithm-hardened first and second firmware, as well as hardware such as memory and selectors, thereby improving the execution speed of the feedforward control parameter output unit.

[0110] In the case where the feedforward control parameter output unit also includes a first register and a second register, the controller, based on the feedforward control parameters corresponding to the target address index, outputs the dead time of the target feedforward control parameters to the first register and the switching frequency to be compensated to the second register. Further, the controller stores the dead time of the target feedforward control parameters in the first register and outputs it to the signal generator, and stores the switching frequency to be compensated in the second register and outputs it to the adder. Implementing this embodiment allows for the storage and rapid output of a set of feedforward control parameters selected by the selector through hardware such as the first and second registers, thereby supporting high-speed lookup by the signal generator and adder, and improving the execution speed of the feedforward control parameter output unit.

[0111] Furthermore, after storing the dead time in the target feedforward control parameters through the first register, the controller outputs the currently stored dead time to the signal generator when no output is received from the selector. In other words, before the selector outputs a new dead time in the target feedforward control parameters, the dead time is output to the signal generator through the first register, thus avoiding interruptions in signal generation due to the inability to continuously output the dead time in the target feedforward control parameters. This ensures the continuity of the signal generator's output control signal and enhances its applicability. The controller can also store the switching frequency to be compensated through the second register and output the currently stored frequency to be compensated to the adder when no output is received from the selector. In other words, before the selector outputs a new switching frequency to be compensated, the currently stored frequency is output to the adder through the second register, thus avoiding interruptions in signal generation due to the inability to continuously output the switching frequency to be compensated. This ensures the continuity of the signal generator's output control signal and enhances its applicability.

[0112] When the control unit also includes a third analog-to-digital converter (ADC), the controller acquires the output current in analog signal form from the AC output through the third ADC and outputs the output current in digital signal form from the AC output to the compensation parameter output unit. The third ADC outputs a digital signal of the AC output with a binary number of bits greater than a preset threshold, indicating that the third ADC is a high-precision ADC. Implementing this embodiment allows for real-time acquisition of the output current via a high-precision ADC, reducing signal distortion and errors in the output current, thereby improving the measurement accuracy and stability of the controller. Furthermore, it enables high-precision control of the inverter's output current under steady-state conditions, keeping the total harmonic distortion (THDi) of the output current within the required range, thus broadening its applicability.

[0113] When a disturbance occurs in the power grid, the controller implements the current closed-loop control strategy through the compensation parameter output unit as follows.

[0114] When the compensation parameter output unit includes a subtractor and a current controller, the controller, based on the AC output current and the reference output current, outputs the difference between the AC output current and the reference output current to the current controller via the subtractor. Further, the controller, through the current controller, converts the difference between the AC output current and the reference output current into a switching frequency compensation value and outputs this value to the adder. Still further, the controller, based on the switching frequency to be compensated and the compensation value, outputs the switching frequency in the target feedforward control parameters to the signal generator via the adder.

[0115] In step S102, the controller outputs control signals to the first and second switches in each bridge arm based on the target feedforward control parameters through the signal generator, so as to reduce the output current of the inverter from greater than or equal to the preset current threshold to less than the preset current threshold.

[0116] The controller uses a signal generator to generate control signals for the first and second switches in each bridge arm using pulse width modulation based on the target feedforward control parameters, and outputs the control signals to the first and second switches in each bridge arm, thereby making the inverter's output current consistent with the reference output current and reducing it to less than a preset current threshold.

[0117] It should be noted that for the additional operations performed by the controller in the inverter output current control method provided in this application and their corresponding beneficial effects, please refer to the implementation methods and corresponding beneficial effects of all functional modules in the controller 24 in the embodiments corresponding to Figures 2 to 12C above, which will not be repeated here.

[0118] The output current control method provided in this application can achieve rapid control of the inverter's output current under sudden changes in grid voltage amplitude, and can also achieve high-precision control of the inverter's output current under steady-state conditions, making it more versatile.

[0119] It should be noted that the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0120] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An inverter for connecting between photovoltaic modules and the power grid for energy conversion, characterized in that, The inverter includes a DC input, a first bridge arm, a second bridge arm, a transformer, a third bridge arm, an AC output, and a controller. The transformer includes a primary winding and a secondary winding. The DC input is used to connect to the photovoltaic module. The first bridge arm and the second bridge arm are connected in parallel and then connected to the DC input. The primary winding is connected between the midpoint of the first bridge arm and the midpoint of the second bridge arm. The third bridge arm is connected between the secondary winding and the AC output. The AC output is used to connect to the power grid. Each of the first bridge arm, the second bridge arm, and the third bridge arm includes a first switch and a second switch connected in series. The controller includes a control unit and a signal generator; The control unit is configured to output target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, the output current, and the reference output current when the output voltage amplitude of the inverter is greater than a preset voltage threshold; wherein, the target feedforward control parameters include at least one of the switching frequencies of the first and second switches in each bridge arm and the dead time between the first and second switches in each bridge arm; The signal generator is used to output control signals to the first and second switches in each bridge arm based on the target feedforward control parameters, so as to reduce the output current of the inverter from greater than or equal to a preset current threshold to less than the preset current threshold.

2. The inverter according to claim 1, characterized in that, The target feedforward control parameters include the switching frequency and the dead time; The control unit includes a feedforward control parameter output unit, a compensation parameter output unit, and an adder; The feedforward control parameter output unit is used to output the dead time in the target feedforward control parameters to the signal generator based on the input voltage, the output voltage, and the reference output current, and to output the switching frequency to be compensated to the adder. The compensation parameter output unit is used to output a switching frequency compensation value to the adder based on the output current of the AC output and the reference output current; The adder is used to output the switching frequency in the target feedforward control parameters to the signal generator based on the switching frequency to be compensated and the switching frequency compensation value.

3. The inverter according to claim 1 or 2, characterized in that, The target feedforward control parameters also include at least one of the phase difference between the first switch in the first bridge arm and the second switch in the second bridge arm, and the phase difference between the first switch in the first bridge arm and the first switch in the third bridge arm.

4. The inverter according to claim 2, characterized in that, The feedforward control parameter output unit includes a first firmware, a second firmware, a memory, and a selector; the memory stores n lookup tables, each lookup table includes multiple sets of feedforward control parameters, each set of feedforward control parameters corresponds to an index group, and the index groups corresponding to the i-th set of feedforward control parameters in each lookup table are the same. The first firmware is used to output a target address index to the selector based on the input voltage; the second firmware is used to output a target index group to the memory based on the input voltage, the output voltage, and the reference output current. The memory is used to output n sets of feedforward control parameters to the selector based on the target index group; wherein, the n sets of feedforward control parameters are feedforward control parameters corresponding to the target index group in the n lookup tables, and each set of feedforward control parameters corresponds to an address index; The selector is used to select the feedforward control parameter corresponding to the target address index from the n sets of feedforward control parameters, and based on the feedforward control parameter corresponding to the target address index, output the dead time in the target feedforward control parameter to the signal generator, and output the switching frequency to be compensated to the adder.

5. The inverter according to claim 4, characterized in that, The feedforward control parameter output unit also includes a first register and a second register; The selector is also used to output the dead time in the target feedforward control parameters to the first register based on the feedforward control parameters corresponding to the target address index, and to output the switching frequency to be compensated to the second register. The first register is used to store the dead time in the target feedforward control parameters and output it to the signal generator; the second register is used to store the switching frequency to be compensated and output it to the adder.

6. The inverter according to claim 5, characterized in that, The first register is further configured to output the dead time in the currently stored target feedforward control parameters to the signal generator after storing the dead time in the target feedforward control parameters and without receiving the output of the selector; The second register is also used to output the currently stored switching frequency to be compensated to the adder after storing the frequency to be compensated and without receiving the output of the selector.

7. The inverter according to any one of claims 4-6, characterized in that, The target address index is positively correlated with the difference between the input voltage and the lower limit of the DC input voltage.

8. The inverter according to any one of claims 4-7, characterized in that, The target index group includes an index corresponding to the voltage gain of the inverter and an index corresponding to the reference output current, wherein the voltage gain is positively correlated with the output voltage and negatively correlated with the input voltage.

9. The inverter according to any one of claims 4-8, characterized in that, The control unit further includes a first analog-to-digital converter and a second analog-to-digital converter; The first analog-to-digital converter is used to acquire the input voltage in the form of an analog signal of the DC input, and output the input voltage in the form of a digital signal to the first firmware and the second firmware; The second analog-to-digital converter is used to acquire the output voltage in the form of an analog signal of the AC output, and output the output voltage in the form of a digital signal to the second firmware; Wherein, the voltage sampling frequency of each of the first analog-to-digital converter and the second analog-to-digital converter is greater than a preset frequency threshold.

10. The inverter according to any one of claims 4-9, characterized in that, The control unit also includes a third analog-to-digital converter; The third analog-to-digital converter is used to acquire the output current in the form of an analog signal of the AC output and output the output current in the form of a digital signal of the AC output to the compensation parameter output unit; Wherein, the third analog-to-digital converter outputs the digital signal of the AC output current with a binary number of bits greater than a preset bit threshold.

11. A method for controlling the output current of an inverter, characterized in that, The inverter includes a DC input, a first bridge arm, a second bridge arm, a transformer, a third bridge arm, and an AC output. The transformer includes a primary winding and a secondary winding. The DC input is used to connect to photovoltaic modules. The first and second bridge arms are connected in parallel and then connected to the DC input. The primary winding is connected between the midpoint of the first bridge arm and the midpoint of the second bridge arm. The third bridge arm is connected between the secondary winding and the AC output. The AC output is used to connect to the power grid. Each of the first, second, and third bridge arms includes a first switch and a second switch connected in series. The method includes: When the output voltage amplitude of the inverter is greater than a preset voltage threshold, the control unit outputs target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, the output current, and the reference output current; wherein, the target feedforward control parameters include at least one of the switching frequencies of the first and second switches in each bridge arm and the dead time between the first and second switches in each bridge arm; The signal generator outputs control signals to the first and second switches in each bridge arm based on the target feedforward control parameters, so that the output current of the inverter is reduced from greater than or equal to a preset current threshold to less than the preset current threshold.

12. The output current control method according to claim 11, characterized in that, The target feedforward control parameters include the switching frequency and the dead time; the control unit includes a feedforward control parameter output unit, a compensation parameter output unit, and an adder; The step of the control unit outputting target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage and current of the AC output, and the reference output current includes: The feedforward control parameter output unit outputs the dead time in the target feedforward control parameters to the signal generator based on the input voltage of the DC input, the output voltage of the AC output, and the reference output current, and outputs the switching frequency to be compensated to the adder. The compensation parameter output unit outputs a switching frequency compensation value to the adder based on the output current of the AC output and the reference output current. The adder outputs the switching frequency from the target feedforward control parameters to the signal generator based on the switching frequency to be compensated and the switching frequency compensation value.

13. The output current control method according to claim 11 or 12, characterized in that, The target feedforward control parameters also include at least one of the phase difference between the first switch in the first bridge arm and the second switch in the second bridge arm, and the phase difference between the first switch in the first bridge arm and the first switch in the third bridge arm.

14. The output current control method according to claim 12, characterized in that, The feedforward control parameter output unit includes a first firmware, a second firmware, a memory, and a selector; the step of outputting the dead time of the target feedforward control parameters to the signal generator and the switching frequency to be compensated to the adder based on the input voltage of the DC input, the output voltage of the AC output, and the reference output current by the feedforward control parameter output unit includes: The first firmware outputs a target address index to the selector based on the input voltage of the DC input, and the second firmware outputs a target index group to the memory based on the input voltage, the output voltage of the AC output, and the reference output current; wherein, the memory stores n lookup tables, each lookup table includes multiple sets of feedforward control parameters, each set of feedforward control parameters corresponds to an index group, and the index group corresponding to the i-th set of feedforward control parameters in each lookup table is the same; The memory outputs n sets of feedforward control parameters to the selector based on the target index group; wherein, the n sets of feedforward control parameters are feedforward control parameters corresponding to the target index group in the n lookup tables, and each set of feedforward control parameters corresponds to an address index; The selector selects the feedforward control parameter corresponding to the target address index from the n sets of feedforward control parameters, and based on the feedforward control parameter corresponding to the target address index, outputs the dead time in the target feedforward control parameter to the signal generator and outputs the switching frequency to be compensated to the adder.

15. The output current control method according to claim 14, characterized in that, The feedforward control parameter output unit further includes a first register and a second register; the step of selecting the feedforward control parameter corresponding to the target address index from the n sets of feedforward control parameters through the selector, and based on the feedforward control parameter corresponding to the target address index, outputting the dead time in the target feedforward control parameter to the signal generator, and outputting the switching frequency to be compensated to the adder, includes: The selector outputs the dead time from the target feedforward control parameters to the first register based on the feedforward control parameters corresponding to the target address index, and outputs the switching frequency to be compensated to the second register. The dead time in the target feedforward control parameters is stored in the first register and output to the signal generator. The switching frequency to be compensated is stored in the second register and output to the adder.

16. The output current control method according to claim 15, characterized in that, The method further includes: After storing the dead time in the target feedforward control parameters through the first register, and without receiving the output of the selector, the dead time in the currently stored target feedforward control parameters is output to the signal generator. After storing the switching frequency to be compensated in the second register, and without receiving the output of the selector, the currently stored switching frequency to be compensated is output to the adder.

17. The output current control method according to any one of claims 14-16, characterized in that, The target address index is positively correlated with the difference between the input voltage and the lower limit of the DC input voltage.

18. The output current control method according to any one of claims 14-17, characterized in that, The target index group includes an index corresponding to the voltage gain of the output current control method and an index corresponding to the reference output current, wherein the voltage gain is positively correlated with the output voltage and negatively correlated with the input voltage.

19. The output current control method according to any one of claims 14-18, characterized in that, The control unit further includes a first analog-to-digital converter and a second analog-to-digital converter; the method further includes: The first analog-to-digital converter acquires the input voltage in the form of an analog signal of the DC input and outputs the input voltage in the form of a digital signal to the first firmware and the second firmware. The second analog-to-digital converter acquires the output voltage in analog signal form of the AC output and outputs the output voltage in digital signal form to the second firmware; Wherein, the voltage sampling frequency of each of the first analog-to-digital converter and the second analog-to-digital converter is greater than a preset frequency threshold.

20. The output current control method according to any one of claims 14-19, characterized in that, The control unit also includes a third analog-to-digital converter; The method further includes: The third analog-to-digital converter acquires the output current in the form of an analog signal of the AC output and outputs the output current in the form of a digital signal of the AC output to the compensation parameter output unit; wherein, the number of binary bits of the output current in the form of a digital signal of the AC output by the third analog-to-digital converter is greater than a preset number of bits threshold.

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