Converter with partial power processing

Abstract

The present disclosure relates to a converter comprising a first and second converter circuit and a series connection of a first and second capacitor unit. Each converter circuit comprises a first, second, third, fourth and fifth terminal; a power converter comprising a first, second and third terminal, an inductor, and a series connection of a first and second semiconductor switch unit; a first decoupling unit connected between the second terminal of the converter circuit and the third terminal of the power converter, and a second decoupling unit connected between the fourth terminal of the converter circuit and the third terminal of the power converter. The first, third and fifth terminal of the converter circuit are connected with the first terminal of the power converter, the second terminal of the power converter and the second terminal of the converter circuit, respectively.

Description

[0001] CONVERTER WITH PARTIAL POWER PROCESSING

[0002] TECHNICAL FIELD

[0003] The present disclosure relates to a converter comprising a first and second converter circuit.

[0004] BACKGROUND

[0005] Solar energy may be translated into electrical energy by solar photovoltaic (PV) panels, e.g. PV arrays. The electrical energy translated from solar energy is in the form of direct current (DC) energy. Eventually, the DC electric energy is delivered to alternating current (AC) power systems by means of power electronic conversion systems. Consumption and loads may use the electrical energy in the form of AC energy. Examples of loads may comprise home appliances, industry motors, etc.

[0006] SUMMARY

[0007] A power converter system for converting DC power to AC power may comprise two stages. A first stage may comprise or be a DC-to-DC power converter stage. That is, one level of DC voltage or current may be converted to a lower or greater level of DC voltage or current. For example, a DC voltage or current may be converted to a lower or greater DC voltage or current (i.e. voltage or current of lower or higher level), respectively. The second stage may comprise or be a DC-to-AC power converter stage, which may be referred to as inverter stage. That is, DC power may be converted to AC power. F or example, a DC voltage or current may be converted to an AC voltage or current, respectively. Optionally, the power converter system may be bidirectional. In this case, the second stage may be configured to be an AC-to-DC power converter stage. That is, AC power may be converted to DC power.

[0008] In case a PV system, such as a PV array or PV panel, are electrically connected to a DC-to-DC power converter stage, the DC- to-DC converter stage may be configured to boost an input DC voltage provided by the PV array or panel to a value higher at the output of the DC-to-DC converter stage. The terms “solar PV” and, thus, “solar PV system” may be used as synonyms for the terms “PV” and “PV system”, respectively.

[0009] In view of the above, this disclosure aims to provide a converter for a DC-to-DC conversion that is improved with regard to at least one of costs and size. An objective of this disclosure is to provide such a converter that allows guaranteeing a maximum energy being harvested from a PV system, when the converter is directly connected with the PV system for converting the DC voltage provided by the PV system.

[0010] These and other objectives are achieved by the solution of this disclosure as described in the independent claims. Advantageous implementations are further defined in the dependent claims.

[0011] Herein, the terms “electrically connect” and “connect” are used as synonyms. The term “controlled semiconductor switch” may be used as a synonym for the term “controllable semiconductor switch”. The term “controllable semiconductor switch” means a semiconductor switch comprising a control terminal, such as a transistor, a thyristor, triac etc. The controllable semiconductor switch may be controlled via the control terminal to switch between the conducting state (i.e. on-state) and the non-conducting state (i.e. off-state). Herein, controllable semiconductor switches may be power semiconductor transistors, such as insulated- gate bipolar transistors (IGBTs) or metal-oxide-semiconductor field-effect transistors (MOSFETs). Using MOSFET instead of IGBTS for the controllable semiconductor switches has the following advantages: The operation speed of a MOSFET is faster than the operation speed of a similar rated IGBT. Power losses of a MOSFET are lower than power losses of a similar rated IGBT. IGBTs and MOSFETs allow to switch high current and voltages.

[0012] Herein, controllable semiconductor switches may be transistors. A controllable semiconductor switch being a transistor may be an insulated-gate bipolar transistor (IGBT), a field-effect transistor (FET), a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar junction transistors (BJT) or a junction gate field-effect transistor (JFET). Optionally, a controllable semiconductor switch may be a semiconductor switch with a diode associated to it. For example, a controllable semiconductor switch may be a transistor, such as a IGBT, with a diode connected in anti-parallel to the transistor. That is, in case a controllable semiconductor switch is a transistor, optionally a diode is connected in anti-parallel to the transistor. For example, a controllable semiconductor switch may be a transistor, such as a MOSFET, comprising an intrinsic body diode.

[0013] A first aspect of this disclosure provides a converter comprising a first and second converter circuit, and a series connection of a first and second capacitor unit. Each converter circuit of the first and second converter circuit comprises a first, second, third, fourth and fifth terminal, the first and second terminal being terminals for receiving a DC voltage. Each converter circuit of the first and second converter circuit comprises a power converter comprising a first, second and third terminal, an inductor, a series connection of a first and second semiconductor switch unit, at least one of the first and second semiconductor switch unit comprising one or more controllable semiconductor switches. Each converter circuit of the first and second converter circuit comprises a first decoupling unit being electrically connected between the second terminal of the converter circuit and the third terminal of the power converter. Each converter circuit of the first and second converter circuit comprises a second decoupling unit being electrically connected between the fourth terminal of the converter circuit and the third terminal of the power converter. The first terminal, third terminal and fifth terminal of the converter circuit are electrically connected with the first terminal of the power converter, the second terminal of the power converter and the second terminal of the converter circuit, respectively. The inductor of the power converter is electrically connected between the first terminal of the power converter and a node between the first and second semiconductor switch unit and the series connection of the first and second semiconductor switch unit is electrically connected between the second and third terminal of the power converter. The third terminal, fourth terminal and fifth terminal of the first converter circuit are electrically connected with a first end of the series connection of the first and second capacitor unit, a node between the first and second capacitor unit and a second end of the series connection of the first and second capacitor unit, respectively. The third terminal, fourth terminal and fifth terminal of the second converter circuit are electrically connected with the second end of the series connection of the first and second capacitor unit, the node between the first and second capacitor unit and the first end of the series connection of the first and second capacitor unit, respectively.

[0014] The converter allows, due to its structure, a partial power processing for power conversion. In a partial power processing, a majority of the power from the source (feeding the converter) is directed to the load side (which provides power to a load when the load is connected to the converter) without any switching, while a small portion of the power is processed by means of the first converter circuit and second converter circuit of the converter. The converter may be referred to as partial power processing (PPP) converter, i.e. a converter having a PPP topology. Especially, the converter allows due to its structure providing the benefits of the PPP concept, such as a reduction in voltage rating of the controllable semiconductor switches, reduction in size of the magnetics (e.g. inductors) and a low power rating of the converter, as well as a fully voltage controllability access of the DC voltages receivable by the first and second terminals of the first and second converter circuit.

[0015] The PPP concept providable by the converter of the first aspect due to its structure has many advantages such as a reduction in power rating (i.e. watt rating) of the converter and a reduction in volt rating of the controllable semiconductor switches in comparison to a converter configured for a full power processing (FPP). This allows using low voltage and / or low current semiconductor switches as the controllable semiconductor switches and, thus, allows decreasing costs of the converter and allows increasing the switching frequency, with which the controllable semiconductor switches can be switched. Increasing the switching frequency allows reducing the size of the passive components, such as inductors and capacitors, of the converter. This allows reducing the size of the converter.

[0016] The term “converter device” and “converter module” may be used as a synonym for the term “converter”. The components of the converter may be arranged in a housing of the converter.

[0017] The converter may be a DC-to-DC converter. Optionally, the converter may be a DC-to-DC converter stage that feeds an DC- to-AC converter stage (i.e. an inverter stage). The converter may be configured to boost DC voltage(s) received at the first and second terminals of the first and second converter circuit of the converter, i.e. convert a received DC voltage to a voltage of higher level. The converter of the first aspect being a DC-to-DC converter stage and a DC-to-AC converter stage being fed by the converter may interface a PV system and a grid. That is, they may be used to convert the DC voltage / direct current provided by the PV system to an AC voltage / altemating current for the grid. The term “DC link capacitor unit” may be used for referring to a capacitor unit. The first capacitor unit and second capacitor unit may form a DC link.

[0018] The first and second terminal of the first converter circuit may be configured to be electrically connected with a first electrical energy source (e.g. first voltage source) and the first and second terminal of the second converter circuit may be configured to be electrically connected with a second electrical energy source (e.g. second voltage source). The first and second electrical energy source may be a first and second PV system, the PV system comprising or being one or more PV panels and / or PV arrays. The first and second electrical energy source may comprise or be a first and second battery system, optionally being rechargeable. Herein, a battery system may comprise or be one or more batteries, optional one or more rechargeable batteries. The terms “battery energy storage system (BESS)” and “battery energy storage (BES)” may be used as a synonym for the terms “battery system” and “battery”, respectively. The converter of the first aspect allows providing a low loss a maximum power point tracking (MPPT) operation. This allows an increase of an extraction of energy from electrical energy sources, e.g. solar PV energy from PV systems, that may be connected to the first and second terminal of the first and second converter circuit of the converter.

[0019] The first and second semiconductor switch unit of a power converter, such as the power converter of the first or second converter circuit, may form a semiconductor switch circuit. Each of the first and second capacitor unit may be one or more capacitors. In case of multiple capacitors, they may be connected in series and / or in parallel.

[0020] In an implementation form of the first aspect, the converter comprises one or more additional first converter circuits, wherein the third terminal, fourth terminal and fifth terminal of each additional first converter circuit are electrically connected with the first end of the series connection of the first and second capacitor unit, the node between the first and second capacitor unit and the second end of the series connection of the first and second capacitor unit, respectively. In addition or alternatively, the converter comprises one or more additional second converter circuits, wherein the third terminal, fourth terminal and fifth terminal of each additional second converter circuit are electrically connected with the second end of the series connection of the first and second capacitor unit, the node between the first and second capacitor unit and the first end of the series connection of the first and second capacitor unit, respectively.

[0021] This allows, connecting additional electrical energy sources (e.g. voltage sources) to the converter. Therefore, the converter may be used for more than two electrical energy sources in order to provide a voltage and / or current conversion for the multiple electrical energy sources. Each of the optional one or more additional first converter circuits may be implemented like the first converter circuit. Thus, the description of the first converter circuit is correspondingly valid for the one or more additional first converter circuits. Each of the optional one or more additional second converter circuits may be implemented like the second converter circuit. Thus, the description of the second converter circuit is correspondingly valid for the one or more additional second converter circuits.

[0022] In an implementation form of the first aspect, the first terminal and second terminal of the first converter circuit is configured to be electrically connected with a positive and negative terminal of a first DC source, respectively, and the first terminal and second terminal of the second converter circuit is configured to be electrically connected with a negative and positive terminal of a second DC source, respectively.

[0023] The first and second DC source may be a first and second PV system, the PV system comprising or being one or more PV panels and / or PV arrays. The first and second DC source may comprise or be a first and second battery system, optionally being rechargeable.

[0024] In an implementation form of the first aspect, the converter comprises a first, second, third and fourth terminal for receiving DC voltages. The first terminal, second terminal, third terminal and fourth terminal of the converter are electrically connected with the first terminal of the first converter circuit, the second terminal of the first converter circuit, the second terminal of the second converter circuit and the first terminal of the second converter circuit, respectively.

[0025] The first and second terminal of the converter may be configured to be electrically connected with the first electrical energy source (e.g. first voltage source) and the third and fourth terminal of the converter may be configured to be electrically connected with the second electrical energy source (e.g. second voltage source).

[0026] In an implementation form of the first aspect, the converter is unidirectional and each of the first, second, third and fourth terminal of the converter is an input terminal. Alternatively, the converter may be bidirectional.

[0027] In case the converter is bidirectional, rechargeable batteries may be connected to the converter. For example a first rechargeable battery system may be connected to the first and second terminal of the converter and a second rechargeable battery system may be connected to the third and fourth terminal of the converter. This allows converting by the converter a DC voltage provided by the first and second battery system to a voltage of lower or higher level and charging by the converter the first and second rechargeable battery system. Optionally, in case the converter is unidirectional or bidirectional, PV systems may be connected to the converter. A PV system may comprise or be one or more PV panels and / or PV arrays. For example a first PV system may be connected to the first and second terminal of the converter and a second PV system may be connected to the third and fourth terminal of the converter. In case of the converter being bidirectional, the converter may be used for luminescent PV panels capturing.

[0028] In an implementation form of the first aspect, the converter comprises a fifth and sixth terminal that are configured to be electrically connected with an electrical load or with one of an electrical load and electrical energy source. The fifth terminal is electrically connected with the first end of the series connection of the first and second capacitor unit, and the sixth terminal is electrically connected with the second end of the series connection of the first and second capacitor unit.

[0029] The fifth and sixth terminal of the converter being configured to be electrically connected with one of an electrical load and electrical energy source allows the converter to be bidirectional.

[0030] In an implementation form of the first aspect, the first semiconductor switch unit of the power converter of the first converter circuit comprises or is one of a controllable semiconductor switch and a diode, the cathode of the diode being electrically connected with the second terminal of the power converter of the first converter circuit. The second semiconductor switch unit of the power converter of the first converter circuit may comprise or be a controllable semiconductor switch. The first semiconductor switch unit of the power converter of the second converter circuit may comprise or be one of a controllable semiconductor switch and a diode, the anode of the diode being electrically connected with the second terminal of the power converter of the second converter circuit. The second semiconductor switch unit of the power converter of the second converter circuit may comprise or be a controllable semiconductor switch.

[0031] This allows the power converter of the first and second converter circuit to have a boost topology. For example, the power converter of the first converter circuit may be a symmetrical boost converter (in case of the first semiconductor switch unit being the controllable semiconductor switch) or a boost converter (in case of the first semiconductor switch unit being the diode). For example, the power converter of the second converter circuit may be a symmetrical boost converter (in case of the first semiconductor switch unit being the controllable semiconductor switch) or a boost converter (in case of the first semiconductor switch unit being the diode).

[0032] In an implementation form of the first aspect, the first semiconductor switch unit of the power converter of the first converter circuit comprises or is a series connection of two controllable semiconductor switches or two diodes, the cathode of a second diode of the two diodes being electrically connected with the second terminal of the power converter of the first converter circuit and the cathode of a first diode of the two diodes being electrically connected with the anode of the second diode. The second semiconductor switch unit of the power converter of the first converter circuit may comprise or be a series connection of two controllable semiconductor switches. A capacitor may electrically connect a node between the two controllable semiconductor switches or the two diodes, respectively, of the first semiconductor switch unit of the power converter of the first converter circuit and a node between the two controllable semiconductor switches of the second semiconductor switch unit of the power converter of the first converter circuit. The first semiconductor switch unit of the power converter of the second converter circuit may comprise or be a series connection of two controllable semiconductor switches or two diodes, the anode of a second diode of the two diodes being electrically connected with the second terminal of the power converter of the second converter circuit and the anode of a first diode of the two diodes being electrically connected with the cathode of the second diode. The second semiconductor switch unit of the power converter of the second converter circuit may comprise or be a series connection of two controllable semiconductor switches. A capacitor may electrically connect a node between the two controllable semiconductor switches or the two diodes, respectively, of the first semiconductor switch unit of the power converter of the second converter circuit and a node between the two controllable semiconductor switches of the second semiconductor switch unit of the power converter of the second converter circuit.

[0033] This allows the power converter of the first and second converter circuit to have a boost topology. For example, the power converter of the first converter circuit may be a symmetrical three level boost converter (in case of the first semiconductor switch unit being the series connection of two controllable semiconductor switches) or a three level boost converter (in case of the first semiconductor switch unit being the series connection of two diodes). For example, the power converter of the second converter circuit may be a symmetrical three level boost converter (in case of the first semiconductor switch unit being the series connection of two controllable semiconductor switches) or a three level boost converter (in case of the first semiconductor switch unit being the series connection of two diodes).

[0034] In an implementation form of the first aspect, the first decoupling unit of the first converter circuit comprises or is a controllable semiconductor switch or a diode, the cathode of the diode being electrically connected with the third terminal of the power converter of the first converter circuit; and the first decoupling unit of the second converter circuit comprises or is a controllable semiconductor switch or a diode, the anode of the diode being electrically connected with the third terminal of the power converter of the second converter circuit. In an implementation form of the first aspect, the second decoupling unit of the first converter circuit comprises or is a controllable semiconductor switch or a diode, the anode of the diode being electrically connected with the third terminal of the power converter of the first converter circuit; and the second decoupling unit of the second converter circuit comprises or is a controllable semiconductor switch or a diode, the cathode of the diode being electrically connected with the third terminal of the power converter of the second converter circuit.

[0035] In an implementation form of the first aspect, the converter comprises a control unit configured to control a voltage conversion by the power converter of the first and second converter circuit by controlling the one or more controllable semiconductor switches of the power converter of the first and second converter circuit.

[0036] Herein, controlling the controllable semiconductor switches means controlling switching of the controllable semiconductor switches. Controlling the one or more controllable semiconductor switches of the power converter of the first and second converter circuit means controlling the one or more controllable semiconductor switch of the power converter of the first converter circuit and the one or more controllable semiconductor switch of the power converter of the second converter circuit. The passage “the power converter of the first and second converter circuit” means “the power converter of the first converter circuit and the power converter of the second power converter”. This is correspondingly valid for other elements that are comprised by the first and second converter circuit. The control unit may be configured to control the controllable semiconductor switches of the converter, such as the controllable semiconductor switches of the power converters and optionally on or more other optional controllable semiconductor switches of other parts of the converter, such as the first decoupling unit and / or second decoupling unit of the first converter circuit and / or second converter circuit.

[0037] The control unit may comprise or correspond to a processor, microprocessor, controller, microcontroller, field programmable gate array (FPGA), application specific integrated circuit (ASIC) or any combination of the aforementioned components.

[0038] The control unit may be configured to control the one or more controllable semiconductor switches of the power converter of the first and second converter circuit by performing a maximum power point tracking (MPPT) algorithm.

[0039] Performing the MPPT algorithm for controlling the controllable semiconductor switches of the first and second converter circuit allows harvesting a maximum energy from electrical energy sources, e.g. voltage sources, that may be connected with the first and second terminal of the first and second converter circuit, e.g. with the first, second, third and fourth terminal of the converter. Such electrical sources may be PV systems, such as PV panel(s) and / or PV array(s). In this case, performing the MPPT algorithm for controlling the controllable semiconductor switches of the first and second converter circuit allows ensuring that the PV systems produce the maximum available energy.

[0040] The present disclosure is not limited to a specific type of MPPT algorithm. Thus, any known MPPT algorithm may be used.

[0041] The converter may be a MPPT-DC-to-DC converter. Especially, the first converter circuit and the second converter circuit may be MPPT converter circuits. The converter may be configured to employ the MPPT algorithm to draw the most power possible from a photovoltaic (PV) system. The maximum power point (MPP) is the operating point at which a PV system may generate its maximum power. The converter may be configured to increase its output voltage above a PV voltage provided by the PV system.

[0042] In an implementation form of the first aspect, the control unit is configured to, when a first voltage applied between the first and second terminal of the first converter circuit and a second voltage applied between the first and second terminal of the second converter circuit is greater than a voltage across the second capacitor unit and a voltage across the first capacitor unit, respectively, to control charging of the inductor of the power converter of each converter circuit of the first and second converter circuit by controlling the one or more semiconductor switches of the power converter of the converter circuit such that a current path is provided between the first and second terminal of the converter circuit via the inductor and second semiconductor switch unit of the power converter of the converter circuit, and the second decoupling unit of the converter circuit.

[0043] Herein, the term “electrical current path” may be used as a synonym for the term “current path”.

[0044] This allows a charging of the inductor of the power converter of each converter circuit (i.e. a charging control mode) while ensuring PPP. Since this charging control mode is possible while each of the first voltage applied between the first and second terminal of the first converter circuit and the second voltage applied between the first and second terminal of the second converter circuit is greater than half a DC link voltage across the series connection of the first and second capacitor unit, this contributes to the full voltage controllability access, provided by the converter, of the input voltage (being the first and second voltage). The series connection of the first and second capacitor unit may be referred to as DC link.

[0045] In an implementation form of the first aspect, the control unit is configured to, when a first voltage applied between the first and second terminal of the first converter circuit and a second voltage applied between the first and second terminal of the second converter circuit is greater than a voltage across the second capacitor unit and a voltage across the first capacitor unit, respectively, to control discharging of the inductor of the power converter of each converter circuit of the first and second converter circuit by controlling the one or more semiconductor switches of the power converter of the converter circuit such that a current path is provided between the first and second terminal of the converter circuit via the inductor and the first semiconductor switch unit of the power converter of the converter circuit.

[0046] This allows a discharging of the inductor of the power converter of each converter circuit (i.e. a discharging control mode) while ensuring PPP. Since this discharging control mode is possible while each of the first voltage applied between the first and second terminal of the first converter circuit and the second voltage applied between the first and second terminal of the second converter circuit is greater than half the DC link voltage across the series connection of the first and second capacitor unit, this contributes to the full voltage controllability access, provided by the converter, of the input voltage (being the first and second voltage).

[0047] In an implementation form of the first aspect, the control unit is configured to, when a first voltage applied between the first and second terminal of the first converter circuit and a second voltage applied between the first and second terminal of the second converter circuit is smaller than a voltage across the second capacitor unit and a voltage across the first capacitor unit, respectively, to control charging of the inductor of the power converter of each converter circuit of the first and second converter circuit by controlling the one or more semiconductor switches of the power converter of the converter circuit such that a current path is provided between the first and second terminal of the converter circuit via the inductor and second semiconductor switch unit of the power converter of the converter circuit, and the first decoupling unit of the converter circuit.

[0048] This allows a charging of the inductor of the power converter of each converter circuit (i.e. the charging control mode) while ensuring PPP. Since this charging control mode is possible while each of the first voltage applied between the first and second terminal of the first converter circuit and the second voltage applied between the first and second terminal of the second converter circuit is smaller than half the DC link voltage across the series connection of the first and second capacitor unit, this contributes to the full voltage controllability access, provided by the converter, of the input voltage (being the first and second voltage). In an implementation form of the first aspect, the control unit is configured to, when a first voltage applied between the first and second terminal of the first converter circuit and a second voltage applied between the first and second terminal of the second converter circuit is smaller than a voltage across the second capacitor unit and a voltage across the first capacitor unit, respectively, to control discharging of the inductor of the power converter of each converter circuit of the first and second converter circuit by controlling the one or more semiconductor switches of the power converter of the converter circuit such that a current path is provided between the first and second terminal of the converter circuit via the inductor and second semiconductor switch unit of the power converter of the converter circuit, and the second decoupling unit of the converter circuit.

[0049] This allows a discharging of the inductor of the power converter of each converter circuit (i.e. the discharging control mode) while ensuring PPP. Since this discharging control mode is possible while each of the first voltage applied between the first and second terminal of the first converter circuit and the second voltage applied between the first and second terminal of the second converter circuit is smaller than half the DC link voltage across the series connection of the first and second capacitor unit, this contributes to the full voltage controllability access, provided by the converter, of the input voltage (being the first and second voltage).

[0050] In order to achieve the converter according to the first aspect of the disclosure, some or all of the implementation forms and optional features of the first aspect, as described above, may be combined with each other.

[0051] All steps which are performed by the various entities described in the present application as well as the functionalities described to be performed by the various entities are intended to mean that the respective entity is adapted to or configured to perform the respective steps and functionalities. Even if, in the following description of specific embodiments, a specific functionality or step to be performed by external entities is not reflected in the description of a specific detailed element of that entity which performs that specific step or functionality, it should be clear for a skilled person that these methods and functionalities can be implemented in respective software or hardware elements, or any kind of combination thereof.

[0052] BRIEF DESCRIPTION OF DRAWINGS

[0053] The above described aspects and implementation forms will be explained in the following description of specific embodiments in relation to the enclosed drawings, in which

[0054] FIG. 1 shows an example of a converter of this disclosure;

[0055] FIG. 2 (a) shows examples of electrical energy sources electrically connectable with the converter of FIG. 1;

[0056] FIG. 2 (b) shows examples of decoupling units for implementing the first decoupling unit of the first and second converter circuit of the converter of FIG. 1;

[0057] FIG. 2 (c) shows examples of decoupling units for implementing the second decoupling unit of the first and second converter circuit of the converter of FIG. 1;

[0058] FIG. 2 (d) shows examples of implementation forms of the first and second semiconductor switch unit of the power converter of the first converter circuit of the converter of FIG. 1; FIG. 2 (e) shows examples of implementation forms of the first and second semiconductor switch unit of the power converter of the second converter circuit of the converter of FIG. 1 ;

[0059] FIG. 3 shows an example of an implementation form of the converter of FIG. 1 ;

[0060] FIG. 4 shows an example of an implementation form of the converter of FIG. 1 ;

[0061] FIG. 5 (a) shows an example of a first control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by a control unit during a first condition of voltages being applied to the converter;

[0062] FIG. 5 (b) shows an example of a second control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by the control unit during the first condition of voltages being applied to the converter;

[0063] FIG. 6 (a) shows an example of the first control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by the control unit during a second condition of voltages being applied to the converter;

[0064] FIG. 6 (b) shows an example of the second control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by the control unit during the second condition of voltages being applied to the converter;

[0065] FIG. 7 shows an example of an implementation form of the converter of FIG. 1 ;

[0066] Same elements shown in the FIGs. (FIGs.) are labeled with the same reference sign, and may be implemented likewise.

[0067] DETAILED DESCRIPTION OF EMBODIMENTS

[0068] FIG. 1 shows an example of a converter of this disclosure. The converter of FIG. 1 is an example of the converter of the first aspect. Thus, the description of the converter of the first aspect is correspondingly valid for the converter of FIG. 1.

[0069] The converter 100 of FIG. 1 comprises a first converter circuit la and a second converter circuit lb, and a series connection of a first capacitor unit Cl and a second capacitor unit C2. Each converter circuit of the first and second converter circuit la, lb comprises a first terminal T1 , second terminal T2, third terminal T3, fourth terminal T4 and fifth terminal T5, wherein the first and second terminal Tl, T2 are terminals for receiving a DC voltage. For example, as shown in FIG. 1, the first and second terminal Tl, T2 of the first converter circuit la may receive a DC voltage from a first electrical energy source 200a (e.g. being a first voltage source). For this, the first and second terminal Tl, T2 of the first converter circuit la may be configured to be electrically connected with the first electrical energy source 200a. For example, as shown in FIG. 1 , the first and second terminal Tl, T2 of the second converter circuit lb may receive a DC voltage from a second electrical energy source 200b (e.g. being a second voltage source). For this, the first and second terminal Tl, T2 of the second converter circuit lb may be configured to be electrically connected with the second electrical energy source 200b. FIG. 2 (a) shows examples of implementation forms of the first and second electrical energy sources 200a, 200b.

[0070] As shown in FIG. 1, each converter circuit of the first and second converter circuit la, lb comprises a power converter 2a, 2b. The power converter 2a of the first converter circuit la comprises a first terminal X, second terminal Y and third terminal Z, an inductor L 1 , a series connection of a first semiconductor switch unit 31a and second semiconductor switch unit 32a, wherein at least one of the first and second semiconductor switch unit 31a, 32a comprises one or more controllable semiconductor switches. The first and second semiconductor switch unit 31a, 32a may form a semiconductor switch circuit 3a. FIG. 2 (d) shows examples of implementation forms of the first and second semiconductor switch unit 31a, 32a of the power converter 2a of the first converter circuit la. The power converter 2b of the second converter circuit lb comprises a first terminal X, second terminal Y and third terminal Z, an inductor L2, a series connection of a first semiconductor switch unit 31b and second semiconductor switch unit 32b, wherein at least one of the first and second semiconductor switch unit 31b, 32b comprises one or more controllable semiconductor switches. The first and second semiconductor switch unit 31b, 32b may form a semiconductor switch circuit 3b. FIG. 2 (e) shows examples of implementation forms of the first and second semiconductor switch unit 31b, 32b of the power converter 2b of the second converter circuit lb.

[0071] As shown in FIG. 1, the first converter circuit la comprises a first decoupling unit 4a being electrically connected between the second terminal T2 of the first converter circuit la and the third terminal Z of the power converter 2a of the first converter circuit la. The second converter circuit lb comprises a first decoupling unit 4b being electrically connected between the second terminal T2 of the second converter circuit lb and the third terminal Z of the power converter 2b of the second converter circuit lb. FIG. 2 (b) shows examples of implementation forms of the first decoupling unit 4a of the first converter circuit la and the first decoupling unit 4b of the second converter circuit lb. The first converter circuit la comprises a second decoupling unit 5a being electrically connected between the fourth terminal T4 of the first converter circuit la and the third terminal Z of the power converter 2a of the first converter circuit la. The second converter circuit lb comprises a second decoupling unit 5b being electrically connected between the fourth terminal T4 of the second converter circuit lb and the third terminal Z of the power converter 2b of the second converter circuit lb. FIG. 2 (c) shows examples of implementation forms of the second decoupling unit 5a of the first converter circuit la and the second decoupling unit 5b of the second converter circuit lb.

[0072] As shown in FIG. 1, the first terminal Tl, third terminal T3 and fifth terminal T5 of the first converter circuit la are electrically connected with the first terminal X of the power converter 2a, the second terminal Y of the power converter 2a and the second terminal T2 of the first converter circuit 1 a, respectively . The inductor L 1 of the power converter 2a of the first converter circuit la is electrically connected between the first terminal X of the power converter 2a and a node N1 between the first and second semiconductor switch unit 31a, 32a and the series connection of the first and second semiconductor switch unit 31a, 32a is electrically connected between the second terminal Y and third terminal Z of the power converter 2a. The first terminal Tl, third terminal T3 and fifth terminal T5 of the second converter circuit lb are electrically connected with the first terminal X of the power converter 2b, the second terminal Y of the power converter 2b and the second terminal T2 of the second converter circuit lb, respectively. The inductor L 1 of the power converter 2b of the second converter circuit lb is electrically connected between the first terminal X of the power converter 2b and a node N1 between the first and second semiconductor switch unit 31b, 32b and the series connection of the first and second semiconductor switch unit 31b, 32b is electrically connected between the second terminal Y and third terminal Z of the power converter 2b.

[0073] As shown in FIG. 1 , the third terminal T3, fourth terminal T4 and fifth terminal T5 of the first converter circuit la are electrically connected with a first end of the series connection of the first and second capacitor unit Cl, C2, a node N2 between the first capacitor unit Cl and second capacitor unit C2 and a second end of the series connection of the first and second capacitor unit Cl, C2, respectively. The third terminal T3, fourth terminal T4 and fifth terminal T5 of the second converter circuit lb are electrically connected with the second end of the series connection of the first and second capacitor unit Cl, C2, the node N2 between the first capacitor unit Cl and second capacitor unit C2 and the first end of the series connection of the first and second capacitor unit Cl, C2, respectively.

[0074] The components of the converter 100 may be arranged in a housing of the converter 100. As shown in FIG. 1, the first terminal T1 and second terminal T2 of the first converter circuit la may be configured to be electrically connected with a positive and negative terminal of the first electrical energy source 200a e.g. being a first DC source, respectively, and the first terminal T1 and second terminal T2 of the second converter circuit lb may be configured to be electrically connected with a negative and positive terminal of the second electrical energy source 200b e.g. being a second DC source, respectively.

[0075] As shown in FIG. 1, the converter 100 may comprise a first terminal Al, second terminal A2, third terminal A3 and a fourth terminal A4 for receiving DC voltages. The first terminal Al , second terminal A2, third terminal A3 and fourth terminal A4 of the converter 100 are electrically connected with the first terminal T1 of the first converter circuit la, the second terminal T2 of the first converter circuit la, the second terminal T2 of the second converter circuit lb and the first terminal T1 of the second converter circuit lb, respectively. Thus, the first terminal Al and second terminal A2 of the converter 100 may be configured to be electrically connected with the first electrical energy source 200a (e.g. first voltage source) and the third terminal A3 and fourth terminal A4 of the converter 100 may be configured to be electrically connected with the second electrical energy source 200b (e.g. second voltage source).

[0076] The converter 100 may be unidirectional and each of the first, second, third and fourth terminal Al, A2, A3 and A4 of the converter 100 may be an input terminal. An example of an implementation form of the converter 100 being unidirectional is shown in FIG 4. As shown in FIG. 1, the converter 100 may comprise a fifth terminal A5 and sixth terminal A6 that are configured to be electrically connected with an electrical load 300. The fifth terminal A5 of the converter 100 is electrically connected with the first end of the series connection of the first and second capacitor unit Cl, C2 and, thus, with the third terminal T3 of the first converter circuit la and the fifth terminal T5 of the second converter circuit lb. The sixth terminal A6 of the converter 100 is electrically connected with the second end of the series connection of the first and second capacitor unit Cl, C2 and, thus, with the fifth terminal T5 of the first converter circuit la and the third terminal T3 of the second converter circuit lb.

[0077] For example, the converter 100 may be a DC-to-DC converter and the load 300 may be an DC-to-AC converter. In this case, the first and second electrical energy sources 200a, 200b may be PV systems, such as PV panel(s) and / or PV array(s). The converter 100 being a DC-to-DC converter and the load 300 being a DC-to-AC converter may be used for converting DC power, e.g. DC voltage and / or direct current, provided by the first and second electrical energy sources 200a, 200b, e.g. PV systems, to AC power, e.g. AC voltage and / or alternating current, and provide the AC power to the grid. Optionally, the load 300 may be a DC load.

[0078] Alternatively, the converter 100 may be bidirectional. An example of an implementation form of the converter 100 being bidirectional is shown in FIG 7. In this case, the first and second electrical energy sources 200a, 200b may be rechargeable battery energy storage systems (BESS) and the load 300 may be configured to use electrical energy from the BESS 200a, 200b (power flow from the terminals Al , A2, A3, A4 to the terminals A5, A6 of the converter 100) and charge the BESS 200a, 200b with electrical energy (power flow from the terminals A5, A6 to the terminals Al , A2, A3, A4 of the converter 100). Thus, the converter 100 being bidirectional supports discharging and charging of BESS 200a, 200b. The fifth and sixth terminal A5, A6 may be configured to be electrically connected with one of an electrical load (e.g. for power flow from the terminals Al, A2, A3, A4 to the terminals A5, A6 of the converter 100) and an electrical energy source (e.g. for power flow from the terminals A5, A6 to the terminals Al, A2, A3, A4 of the converter 100).

[0079] The converter 100 may comprise a control unit (not shown in FIG. 1) configured to control a voltage conversion by the power converter 2a of the first converter circuit la and the power converter 2b of the second converter circuit lb by controlling the one or more controllable semiconductor switches of the power converter 2a of the first converter circuit 1 a and the one or more controllable semiconductor switches the power converter 2b of the second converter circuit lb. The control unit may be configured to control the one or more controllable semiconductor switches of the power converter 2a of the first converter circuit la and the one or more controllable semiconductor switches the power converter 2b of the second converter circuit lb by performing a maximum power point tracking (MPPT) algorithm.

[0080] The control unit of the converter 100 may comprise or correspond to a processor, microprocessor, controller, microcontroller, field programmable gate array (FPGA), application specific integrated circuit (ASIC) or any combination of the aforementioned components. The control unit is configured to provide control signals, such as pulse width modulated (PWM) signals, to the one or more controllable semiconductor switches of the power converter 2a of the first converter circuit 1 a and the one or more controllable semiconductor switches of the power converter 2b of the second converter circuit lb, especially to the control terminal of the controllable semiconductor switches. This is correspondingly valid for one or more optional other controllable semiconductor switches of the converter that the control unit may be configured to control. Further information on how the control unit of the converter 100 may be configured to control switching of the controllable semiconductor switches of the converter 100 is described with regard to FIGs. 5 (a), 5 (b), 6 (a) and 6 (b).

[0081] As shown in FIG. 1, a capacitor unit of the first capacitor unit Cl and second capacitor unit C2 may comprise or be a capacitor. For example, as shown in FIG. 1, each of the first and second capacitor unit Cl, C2 may comprise or be a capacitor. Alternatively, a capacitor unit of the first capacitor unit Cl and second capacitor unit C2 may comprise or be multiple capacitors (e.g. two or more capacitors) electrically connected in series and / or in parallel. Optionally, each of the first capacitor unit Cl and second capacitor units C2 may comprise or be multiple capacitors (e.g. two or more capacitors) electrically connected in series and / or in parallel.

[0082] The first and second converter circuit la, lb may be implemented the same way. Optionally, at least one of the power converter la, first decoupling unit 4a and second decoupling unit 5a of the first converter circuit la may be implemented differently compared to the second converter circuit lb. As outlined already above, examples of implementation forms of parts of the converter 100 are shown in FIGs. 2 (b), 2 (c), 2 (d) and 2 (e) and examples of implementation forms of the converter 100 are shown in FIGs. 3, 4 and 7.

[0083] The first converter circuit la and the second converter circuit lb may be MPPT converter circuits.

[0084] For further information on the converter 100 reference is made to FIGs. 2 (a), 2 (b), 2 (c), 2 (d), 2 (e), 3, 4, 5 (a), 5 (b), 6 (a), 6 (b) and 7.

[0085] FIG. 2 (a) shows examples of electrical energy sources electrically connectable with the converter of FIG. 1. As shown in FIG. 2 (a), an electrical energy source of the first electrical energy source 200a and second electrical energy source 200b may be a PV system 201 , such as PV panel(s) and / or PV array(s), or a BESS 202, which is optionally rechargeable. In case the converter 100 is bidirectional, each of the first and second electrical energy source 200a, 200b may be a rechargeable BESS 202.

[0086] FIG. 2 (b) shows examples of decoupling units for implementing the first decoupling unit of the first and second converter circuit of the converter of FIG. 1. A first decoupling unit of the first decoupling unit 4a of the first converter circuit la and the first decoupling unit 4b of the second converter circuit lb may be a diode 41 or a controllable semiconductor switch 42, such as a transistor. As indicated in FIG. 2 (b), the controllable semiconductor switch 42 may be a semiconductor switch, such as a transistor, with a diode associated to it. For example, the controllable semiconductor switch 42 may be a transistor, such as a IGBT, with a diode connected in anti-parallel to the transistor or be a transistor, such as a MOSFET, comprising an intrinsic body diode. This is only by way of example and, thus, any other type of controllable semiconductor switches may be used. Optionally, the first decoupling unit 4a of the first converter circuit la and the first decoupling unit 4b of the second converter circuit lb may be implemented the same way.

[0087] FIG. 2 (c) shows examples of decoupling units for implementing the second decoupling unit of the first and second converter circuit of the converter of FIG. 1. A second decoupling unit of the second decoupling unit 5a of the first converter circuit la and the second decoupling unit 5b of the second converter circuit lb may be a diode 51 or a controllable semiconductor switch 52, such as a transistor. As indicated in FIG. 2 (c), the controllable semiconductor switch 52 may be a semiconductor switch, such as a transistor, with a diode associated to it. For example, the controllable semiconductor switch 52 may be a transistor, such as a IGBT, with a diode connected in anti-parallel to the transistor or be a transistor, such as a MOSFET, comprising an intrinsic body diode. This is only by way of example and, thus, any other type of controllable semiconductor switches may be used. Optionally, the second decoupling unit 5a of the first converter circuit la and the second decoupling unit 5b of the second converter circuit lb may be implemented the same way.

[0088] FIG. 2 (d) shows examples of implementation forms of the first and second semiconductor switch unit of the power converter of the first converter circuit of the converter of FIG. 1. As indicated in FIG. 2 (d) the first semiconductor switch unit 31a and the second semiconductor switch unit 32a may form the semiconductor switch circuit 3a.

[0089] According to a first optional implementation form (i) of FIG. 2 (d), the first semiconductor switch unit 31a of the power converter 2a of the first converter circuit 1 a is a diode Dll, wherein the cathode of the diode D 11 is electrically connected with the second terminal Y of the power converter 2a of the first converter circuit 1 a. According to a second optional implementation form (ii) of FIG. 2 (d), the first semiconductor switch unit 31a of the power converter 2a of the first converter circuit la is a controllable semiconductor switch Si l. In both implementation forms (i) and (ii) of FIG. 2 (d), the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la is a controllable semiconductor switch S21.

[0090] According to a third optional implementation form (iii) of FIG. 2 (d), the first semiconductor switch unit 31a of the power converter 2a of the first converter circuit la is a series connection of two diodes Dl l and DI 2, wherein the cathode of a second diode D12 of the two diodes DI 1, D12 is electrically connected with the second terminal Y of the power converter 2a of the first converter circuit 1 a and the cathode of a first diode D 11 of the two diodes D 11 , D 12 is electrically connected with the anode of the second diode D12. According to a fourth optional implementation form (iv) of FIG. 2 (d), the first semiconductor switch unit 31a of the power converter 2a of the first converter circuit la is a series connection of two controllable semiconductor switches SI 1, SI 2. In both implementation forms (iii) and (iv) of FIG. 2 (d), the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la is a series connection of two controllable semiconductor switches S21, S22. Further, in both implementation forms (iii) and (iv) of FIG. 2 (d), a capacitor C3 may electrically connect a node N3 between the two diodes Dll, D12 (in case of the implementation form (iii)) or two controllable semiconductor switches Sll, S12 (in case of the implementation form (iv)) of the first semiconductor switch unit 31 a of the power converter 2a of the first converter circuit la and a node N4 between the two controllable semiconductor switches S21, S22 of the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la.

[0091] FIG. 2 (e) shows examples of implementation forms of the first and second semiconductor switch unit of the power converter of the second converter circuit of the converter of FIG. 1. As indicated in FIG. 2 (e) the first semiconductor switch unit 31b and the second semiconductor switch unit 32b may form the semiconductor switch circuit 3b.

[0092] According to a first optional implementation form (i) of FIG. 2 (e), the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb is a diode Dll, wherein the anode of the diode DI 1 is electrically connected with the second terminal Y of the power converter 2b of the second converter circuit lb. According to a second optional implementation form (ii) of FIG. 2 (e), the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb is a controllable semiconductor switch Sil. In both implementation forms (i) and (ii) of FIG. 2 (e), the second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb is a controllable semiconductor switch S21.

[0093] According to a third optional implementation form (iii) of FIG. 2 (e), the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb is a series connection of two diodes Dl l and D12, wherein the anode of a second diode D12 of the two diodes Dl l, D12 is electrically connected with the second terminal Y of the power converter 2b of the second converter circuit 1 b and the anode of a first diode D 11 of the two diodes D 11 , D 12 is electrically connected with the cathode of the second diode D12. According to a fourth optional implementation form (iv) of FIG. 2 (e), the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb is a series connection of two controllable semiconductor switches Si l, S12. In both implementation forms (iii) and (iv) of FIG. 2 (e), the second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb is a series connection of two controllable semiconductor switches S21, S22. Further, in both implementation forms (iii) and (iv) of FIG. 2 (e), a capacitor C3 may electrically connect a node N3 between the two diodes Dl l, D12 (in case of the implementation form (iii)) or two controllable semiconductor switches Sil, S12 of the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb and a node N4 between the two controllable semiconductor switches S21, S22 of the second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb.

[0094] The implementation form (i) of FIGs. 2 (d) and 2 (e) shows a semiconductor switch circuit 3a, 3b that makes the power converter 2a, 2b a boost converter, especially a two level boost converter. The implementation form (ii) of FIGs. 2 (d) and 2 (e) shows a semiconductor switch circuit 3a, 3b that makes the power converter 2a, 2b a symmetrical boost converter, especially a symmetrical two level boost converter. The implementation form (iii) of FIGs. 2 (d) and 2 (e) shows a semiconductor switch circuit 3a, 3b that makes the power converter 2a, 2b a three level boost converter. The implementation form (iv) of FIGs. 2 (d) and 2 (e) shows a semiconductor switch circuit 3a, 3b that makes the power converter 2a, 2b a symmetrical three level boost converter.

[0095] In FIGs. 2 (d) and 2 (e), the controllable semiconductor switches are shown as a semiconductor switch with a diode associated to it. This is only by way of example and, thus, any other type of controllable semiconductor switches may be used. Optionally, at least one of the controllable semiconductor switches of the converter 100 may be implemented differently compared to the rest of the controllable semiconductor switches of the converter 100.

[0096] FIG. 3 shows an example of an implementation form of the converter of FIG. 1. The converter 100 of FIG. 3 corresponds to the converter 100 of FIG. 1. Thus, the description of the converter 100 of FIG. 1 is correspondingly valid for the converter 100 of FIG. 3 and in the following mainly a difference, especially an optional feature, of the converter 100 of FIG. 3 with regard to the converter 100 of FIG. 1 is described.

[0097] As shown in FIG. 3, the converter 100 comprises one or more additional first converter circuits la’, wherein the third terminal T3, fourth terminal T4 and fifth terminal T5 of each additional first converter circuit la’ are electrically connected with the first end of the series connection of the first capacitor unit Cl and second capacitor unit C2, the node N2 between the first and second capacitor unit Cl, C2 and the second end of the series connection of the first capacitor unit Cl and second capacitor unit C2, respectively. According to FIG. 3 one additional first converter circuit la’ is shown. This is only by way of example and, thus, more than one additional first converter circuit la’ may be provided. The converter 100 comprises one or more additional second converter circuits lb’, wherein the third terminal T3, fourth terminal T4 and fifth terminal T5 of each additional second converter circuit lb’ are electrically connected with the second end of the series connection of the first capacitor unit Cl and second capacitor unit C2, the node N2 between the first and second capacitor unit Cl, C2 and the first end of the series connection of the first capacitor unit Cl and second capacitor unit C2, respectively. According to FIG. 3 one additional second converter circuit lb’ is shown. This is only by way of example and, thus, more than one additional second converter circuit lb’may be provided.

[0098] Providing additional first and second converter circuits) la’, lb’ allows connecting additional electrical energy sources 200c, 200d to the converter 100. For example, an additional electrical energy source 200c may be connected with the first and second terminal Tl, T2 of the additional first converter circuit la’ and an additional electrical energy source 200d may be connected with the first and second terminal Tl, T2 of the additional second converter circuit lb’. For each additional first converter circuit la’ and additional second converter circuit lb’ the converter 100 may comprise corresponding terminals that are connected with the first and second terminal Tl, T2 of the additional first and second converter circuit la’, lb’ as described with regard to the first, second, third and fourth terminal Tl, T2, T3, T4 of the converter 100 and the first and second terminal Tl, T2 of the first and second converter circuit la, lb.

[0099] The one or more additional first converter circuits la’ are implemented in line with the first converter circuit la. Thus, a description of the first converter circuit la, such as a description of the structure and control of the first converter circuit la, is correspondingly valid for the one or more additional first converter circuits la’. The one or more additional second converter circuit lb’ are implemented in line with the second converter circuit lb. Thus, a description of the second converter circuit lb, such as a description of the structure and control of the second converter circuit lb, is correspondingly valid for the one or more additional second converter circuits lb’ . The description with regard to the sources 200a, 200b is correspondingly valid for the sources 200c, 200d.

[0100] The implementation form of FIG. 3 allows connecting multiple 2n electrical energy sources, such as PV systems and / or BESS to the converter 100, wherein n is an integer that is greater than one (n > 1). The number of converter circuits la, lb, la’, lb’ equals to the number of electrical energy sources that may be connected to the converter 100. In case n equals 1 (n = 1), the converter 100 corresponds to the implementation form of FIG. 1 for two electrical energy sources.

[0101] FIG. 4 shows an example of an implementation form of the converter of FIG. 1. The description of the converter 100 of FIG. 1 is correspondingly valid for the converter 100 of FIG. 4. The implementation of the controllable semiconductor switches of the converter 100 of FIG. 4 is only by way of example and, thus, may be implemented by a different controllable semiconductor switch type.

[0102] As shown in FIG. 4, the first and second semiconductor switch unit 31a, 32a of the power converter 2a of the first converter circuit la is implemented in line with the implementation form (i) of Figure 2 (d) and the first and second semiconductor switch unit 31b, 32b of the power converter 2b of the second converter circuit lb is implemented in line with the implementation form (i) of Figure 2 (e). Each of the first decoupling unit 4a of the first converter circuit la and the first decoupling unit 4b of the second converter circuit lb is implemented by a controllable semiconductor switch unit 42. The description of FIG. 2 (b) is valid for this controllable semiconductor switch unit 42. Each of the second decoupling unit 5a of the first converter circuit la and the second decoupling unit 5b of the second converter circuit lb is implemented by a diode 5a. The description of FIG. 2 (c) is valid for this diode 5a. As outlined already above, the converter 100 of FIG. 4 is an example of a unidirectional converter.

[0103] FIG. 5 (a) shows an example of a first control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by a control unit during a first condition of voltages being applied to the converter. For the first condition of voltages applied to the converter 100, it is assumed that a first voltage applied by the first electrical energy source 200a between the first and second terminal Tl, T2 of the first converter circuit la is greater than a voltage across the first capacitor unit Cl, and a second voltage applied by the second electrical energy source 200b between the first and second terminal Tl , T2 of the second converter circuit lb is greater than a voltage across the second capacitor unit C2. In other words, for the first condition of voltages applied to the converter 100, it is assumed that each of the electrical energy sources 200a, 200b provides a voltage to the converter 100 that is greater than half the voltage across the series connection of the first and second capacitor unit Cl, C2 (i.e. half the DC link voltage across the DC link formed by the series connection of the first and second capacitor unit Cl, C2). The first control mode is assumed to be a charging control mode. That is, during this mode the control unit controls the converter 100, especially its controllable semiconductor switches, such that the inductor LI of the power converter 2a of the first converter circuit la and the inductor L2 of the power converter 2b of the second converter circuit lb are being charged (e.g. with electrical energy provided from the first and second electrical energy source 200a, 200b).

[0104] The control unit is configured to, in case of the first condition of voltages applied to the converter 100, control charging of the inductor L 1 of the power converter 2a of the first converter circuit 1 a by controlling the semiconductor switch S21 of the power converter 2a such that a current path is provided between the first terminal Tl and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la, and the second decoupling unit 5a of the first converter circuit la. This is correspondingly valid, in case of the power converter 2a being differently implemented. In this case, the control unit is configured to, in case of the first condition of voltages applied to the converter 100, control charging of the inductor LI of the power converter 2a of the first converter circuit 1 a by controlling the one or more semiconductor switches of the power converter 2a such that a current path is provided between the first terminal Tl and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit 1 a, and the second decoupling unit 5a of the first converter circuit la. In case the first decoupling unit 4a of the first converter circuit 1 is a controllable semiconductor switch 42 (which is the case in the example of Figure 5 (a)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal Tl and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la, and the second decoupling unit 5a of the first converter circuit la. Accordingly, in case the second decoupling unit 5a of the first converter circuit la is a controllable semiconductor switch 52 (which is not the case in the example of Figure 5 (a)), the control unit is configured to control the controllable semiconductor switch 52 such that the current path is provided between the first terminal Tl and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the second decoupling unit 5 a of the first converter circuit la.

[0105] The control unit is configured to, in case of the first condition of voltages applied to the converter 100, control charging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the semiconductor switch S21 of the power converter 2b such that a current path is provided between the first terminal Tl and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb, and the second decoupling unit 5b of the second converter circuit lb. This is correspondingly valid, in case of the power converter 2b being differently implemented. In this case, the control unit is configured to, in case of the first condition of voltages applied to the converter 100, control charging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the one or more semiconductor switches of the power converter 2b such that a current path is provided between the first terminal Tl and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the second decoupling unit 5b of the second converter circuit lb. In case the first decoupling unit 4b of the second converter circuit lb is a controllable semiconductor switch 42 (which is the case in the example of Figure 5 (a)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the second decoupling unit 5b of the second converter circuit lb. Accordingly, in case the second decoupling unit 5b of the second converter circuit lb is a controllable semiconductor switch 52 (which is not the case in the example of Figure 5 (a)), the control unit is configured to control the controllable semiconductor switch 52 such that the current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the second decoupling unit 5b of the second converter circuit lb.

[0106] Therefore, for causing charging of the inductor LI, L2 of the first and second converter circuit la, lb in the first condition of voltages applied to the converter 100 the control unit may control the controllable semiconductor switch S21 of the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the controllable semiconductor switch S21 of the second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb to be in the conducting state and the controllable semiconductor switch 42 of the first decoupling unit 4a, 4b of the first and second converter circuit la, lb to be in the non-conducting state.

[0107] As shown in FIG. 5 (a), during the first condition of voltages applied to the converter 100, the first control mode allows a current II to flow from the first terminal T1 of the first converter circuit la via the inductor LI and the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la, the second decoupling unit 5a of the first converter circuit la and the second capacitor unit C2 to the second terminal T2 of the first converter circuit la. During the first condition of voltages applied to the converter 100, the first control mode allows a current 12 to flow from the second terminal T2 of the second converter circuit lb via the first capacitor unit Cl, the second decoupling unit 5b of the second converter circuit lb and the second semiconductor switch unit 32b and the inductor L2 of the power converter 2b of the second converter circuit lb to the first terminal T1 of the second converter circuit lb.

[0108] FIG. 5 (b) shows an example of a second control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by the control unit during the first condition of voltages being applied to the converter.

[0109] The second control mode is assumed to be a discharging control mode. That is, during this mode the control unit controls the converter 100, especially its controllable semiconductor switches, such that the inductor LI of the power converter 2a of the first converter circuit la and the inductor L2 of the power converter 2b of the second converter circuit lb are being discharged.

[0110] The control unit is configured to, in case of the first condition of voltages applied to the converter 100, control discharging of the inductor LI of the power converter 2a of the first converter circuit la by controlling the semiconductor switch S21 of the power converter 2a such that a current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and the first semiconductor switch unit 31a of the power converter 2a of the first converter circuit la. This is correspondingly valid, in case of the power converter 2a being differently implemented. In this case, the control unit is configured to, in case of the first condition of voltages applied to the converter 100, control discharging of the inductor LI of the power converter 2a of the first converter circuit la by controlling the one or more semiconductor switches of the power converter 2a such that a current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit 1 a via the inductor L 1 and the first semiconductor switch unit 31 a of the power converter 2a of the first converter circuit la. In case the first decoupling unit 4a of the first converter circuit 1 is a controllable semiconductor switch 42 (which is the case in the example of Figure 5 (b)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and the first semiconductor switch unit 31a of the power converter 2a of the first converter circuit la. Accordingly, in case the second decoupling unit 5a of the first converter circuit la is a controllable semiconductor switch 52 (which is not the case in the example of Figure 5 (b)), the control unit is configured to control the controllable semiconductor switch 52 such that the current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit 1 a via the inductor L 1 and the first semiconductor switch unit 31 a of the power converter 2a of the first converter circuit la.

[0111] The control unit is configured to, in case of the first condition of voltages applied to the converter 100, control discharging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the semiconductor switch S21 of the power converter 2b such that a current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb. This is correspondingly valid, in case of the power converter 2b being differently implemented. In this case, the control unit is configured to, in case of the first condition of voltages applied to the converter 100, control discharging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the one or more semiconductor switches of the power converter 2b such that a current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb. In case the first decoupling unit 4b of the second converter circuit lb is a controllable semiconductor switch 42 (which is the case in the example of Figure 5 (b)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and the first semiconductor switch unit 3 lb of the power converter 2b of the second converter circuit lb. Accordingly, in case the second decoupling unit 5a of the second converter circuit lb is a controllable semiconductor switch 52 (which is not the case in the example of Figure 5 (b)), the control unit is configured to control the controllable semiconductor switch 52 such that the current path is provided between the first terminal T 1 and second terminal T2 of the second converter circuit lb via the inductor L2 and the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb.

[0112] Therefore, for causing discharging of the inductor LI, L2 of the first and second converter circuit la, lb in the first condition of voltages applied to the converter 100 the control unit may control the controllable semiconductor switch S21 of the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la, the controllable semiconductor switch S21 of the second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the controllable semiconductor switch 42 of the first decoupling unit 4a, 4b of the first and second converter circuit la, lb to be in the non-conducting state.

[0113] As shown in FIG. 5 (b), during the first condition of voltages applied to the converter 100, the second control mode allows a current II to flow from the first terminal T1 of the first converter circuit la via the inductor LI and the first semiconductor switch unit 31a of the power converter 2a of the first converter circuit la, the first capacitor unit Cl and the second capacitor unit C2 to the second terminal T2 of the first converter circuit la. During the first condition of voltages applied to the converter 100, the second control mode allows a current 12 to flow from the second terminal T2 of the second converter circuit lb via the first capacitor unit Cl, the second capacitor unit C2 and the first semiconductor switch unit 31b and the inductor L2 of the power converter 2b of the second converter circuit lb to the first terminal T1 of the second converter circuit lb.

[0114] As may be observed from FIGs. 5 (a) and 5 (b), in the charging control mode during the first condition of voltages applied to the converter 100 the inductor LI and L2 of the first and second converter circuit la, lb is charged to an input voltage provided by the first and second electrical energy source 200a, 200b minus half the DC link voltage across the series connection of the first and second capacitor unit C 1 , C2. Thus, during the first condition of voltages applied to the converter 100 the input voltage provided by the first and second electrical energy source 200a, 200b minus half the DC link voltage is being processed, which represents the partial power processing (PPP) characteristic of the converter 100. When the first condition of voltages applied to the converter 100 is present, during both the charging control mode and the discharging control mode, the controllable semiconductor switch 42 of the first decoupling unit 4a, 4b of the first and second converter circuit la, lb remains in the nonconducting state and, thus, does not contribute to any electrical losses.

[0115] FIG. 6 (a) shows an example of the first control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by the control unit during a second condition of voltages being applied to the converter.

[0116] For the second condition of voltages applied to the converter 100, it is assumed that a first voltage applied by the first electrical energy source 200a between the first and second terminal T1 , T2 of the first converter circuit la is smaller than a voltage across the first capacitor unit Cl, and a second voltage applied by the second electrical energy source 200b between the first and second terminal T1 , T2 of the second converter circuit lb is smaller than a voltage across the second capacitor unit C2. In other words, for the second condition of voltages applied to the converter 100, it is assumed that each of the electrical energy sources 200a, 200b provides a voltage to the converter 100 that is smaller than half the voltage across the series connection of the first and second capacitor unit Cl, C2 (i.e. half the DC link voltage across the DC link formed by the series connection of the first and second capacitor unit Cl, C2).

[0117] The control unit is configured to, in case of the second condition of voltages applied to the converter 100, control charging of the inductor LI of the power converter 2a of the first converter circuit la by controlling the semiconductor switch S21 of the power converter 2a such that a current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the first decoupling unit 4a of the first converter circuit la. This is correspondingly valid, in case of the power converter 2a being differently implemented. In this case, the control unit is configured to, in case of the second condition of voltages applied to the converter 100, control charging of the inductor LI of the power converter 2a of the first converter circuit la by controlling the one or more semiconductor switches of the power converter 2a such that a current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the first decoupling unit 4a of the first converter circuit la. In case the first decoupling unit 4a of the first converter circuit 1 is a controllable semiconductor switch 42 (which is the case in the example of Figure 6 (a)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the first decoupling unit 4a of the first converter circuit la. Accordingly, in case the second decoupling unit 5a of the first converter circuit la is a controllable semiconductor switch 52 (which is not the case in the example of Figure 6 (a)), the control unit is configured to control the controllable semiconductor switch 52 such that a current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the first decoupling unit 4a of the first converter circuit la.

[0118] The control unit is configured to, in case of the second condition of voltages applied to the converter 100, control charging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the semiconductor switch S21 of the power converter 2b such that a current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the first decoupling unit 4b of the second converter circuit lb. This is correspondingly valid, in case of the power converter 2b being differently implemented. In this case, the control unit is configured to, in case of the second condition of voltages applied to the converter 100, control charging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the one or more semiconductor switches of the power converter 2b such that a current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the first decoupling unit 4b of the second converter circuit lb. In case the first decoupling unit 4b of the second converter circuit lb is a controllable semiconductor switch 42 (which is the case in the example of Figure 6 (a)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the first decoupling unit 4b of the second converter circuit lb. Accordingly, in case the second decoupling unit 5a of the second converter circuit lb is a controllable semiconductor switch 52 (which is not the case in the example of Figure 6 (a)), the control unit is configured to control the controllable semiconductor switch 52 such that a current path is provided between the first terminal T 1 and second terminal T2 of the second converter circuit 1 b via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the first decoupling unit 4b of the second converter circuit lb.

[0119] Therefore, for causing charging of the inductor LI, L2 of the first and second converter circuit la, lb in the second condition of voltages applied to the converter 100 the control unit may control the controllable semiconductor switch S21 of the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la, the controllable semiconductor switch S21 of the second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the controllable semiconductor switch 42 of the first decoupling unit 4a of the first and second converter circuit la, lb to be in the conducting state.

[0120] As shown in FIG. 6 (a), during the second condition of voltages applied to the converter 100, the first control mode allows a current II to flow from the first terminal T1 of the first converter circuit la via the inductor LI and the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the first decoupling unit 4a of the first converter circuit la to the second terminal T2 of the first converter circuit la. During the second condition of voltages applied to the converter 100, the first control mode allows a current 12 to flow from the second terminal T2 of the second converter circuit lb via the first decoupling unit 4b of the second converter circuit 1 b and the second semiconductor switch unit 32b and the inductor L2 of the power converter 2b of the second converter circuit lb to the first terminal T1 of the second converter circuit lb.

[0121] FIG. 6 (b) shows an example of the second control mode when the controllable semiconductor switches of the converter of FIG. 4 are controlled by the control unit during the second condition of voltages being applied to the converter.

[0122] The control unit is configured to, in case of the second condition of voltages applied to the converter 100, control discharging of the inductor LI of the power converter 2a of the first converter circuit la by controlling the semiconductor switch S21 of the power converter 2a such that a current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the second decoupling unit 5a of the first converter circuit la. This is correspondingly valid, in case of the power converter 2a being differently implemented. In this case, the control unit is configured to, in case of the second condition of voltages applied to the converter 100, control discharging of the inductor LI of the power converter 2a of the first converter circuit la by controlling the one or more semiconductor switches of the power converter 2a such that a current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the second decoupling unit 5a of the first converter circuit la. In case the first decoupling unit 4a of the first converter circuit 1 is a controllable semiconductor switch 42 (which is the case in the example of Figure 6 (b)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the second decoupling unit 5a of the first converter circuit la. Accordingly, in case the second decoupling unit 5a of the first converter circuit la is a controllable semiconductor switch 52 (which is not the case in the example of Figure 6 (b)), the control unit is configured to control the controllable semiconductor switch 52 such that the current path is provided between the first terminal T1 and second terminal T2 of the first converter circuit la via the inductor LI and second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la and the second decoupling unit 5a of the first converter circuit la.

[0123] The control unit is configured to, in case of the second condition of voltages applied to the converter 100, control discharging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the semiconductor switch S21 of the power converter 2b such that a current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the second decoupling unit 5b of the second converter circuit lb. This is correspondingly valid, in case of the power converter 2b being differently implemented. In this case, the control unit is configured to, in case of the second condition of voltages applied to the converter 100, control discharging of the inductor L2 of the power converter 2b of the second converter circuit lb by controlling the one or more semiconductor switches of the power converter 2b such that a current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the second decoupling unit 5b of the second converter circuit lb. In case the first decoupling unit 4b of the second converter circuit lb is a controllable semiconductor switch 42 (which is the case in the example of Figure 6 (b)), the control unit is configured to control the controllable semiconductor switch 42 such that the current path is provided between the first terminal T 1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the second decoupling unit 5b of the second converter circuit lb. Accordingly, in case the second decoupling unit 5b of the second converter circuit lb is a controllable semiconductor switch 52 (which is not the case in the example of Figure 6 (b)), the control unit is configured to control the controllable semiconductor switch 52 such that the current path is provided between the first terminal T1 and second terminal T2 of the second converter circuit lb via the inductor L2 and second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb and the second decoupling unit 5b of the second converter circuit lb.

[0124] Therefore, for causing discharging of the inductor LI, L2 of the first and second converter circuit la, lb in the second condition of voltages applied to the converter 100 the control unit may control the controllable semiconductor switch S21 of the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la, the controllable semiconductor switch S21 of the second semiconductor switch unit 32b of the power converter 2b of the second converter circuit lb to be in the conducting state and the controllable semiconductor switch 42 of the first decoupling unit 4a, 4b of the first and second converter circuit la, lb to be in the non-conducting state.

[0125] As shown in FIG. 6 (b), during the second condition of voltages applied to the converter 100, the second control mode allows a current II to flow from the first terminal T1 of the first converter circuit la via the inductor LI and the second semiconductor switch unit 32a of the power converter 2a of the first converter circuit la, the second decoupling unit 5a of the first converter circuit la and the second capacitor unit C2 to the second terminal T2 of the first converter circuit la. During the second condition of voltages applied to the converter 100, the second control mode allows a current 12 to flow from the second terminal T2 of the second converter circuit lb via the first capacitor unit Cl, the second decoupling unit 5b of the second converter circuit lb and the second semiconductor switch unit 32b and the inductor L2 of the power converter 2b of the second converter circuit lb to the first terminal T1 of the second converter circuit lb. As may be observed from FIGs. 6 (a) and 6 (b), in the charging control mode during the second condition of voltages applied to the converter 100 the inductor LI and L2 of the first and second converter circuit la, lb is charged to the input voltage provided by the first and second electrical energy source 200a, 200b and in the discharging control mode during the second condition of voltages applied to the converter 100 the charged inductor LI and L2 of the first and second converter circuit la, lb is discharged to half the DC link voltage across the series connection of the first and second capacitor unit Cl, C2. Thus, during the second condition of voltages applied to the converter 100 the power processed by the converter 100 is half the DC link voltage minus the input voltage provided by the first and second electrical energy source 200a, 200b, which represents the partial power processing (PPP) characteristic of the converter 100. When the second condition of voltages applied to the converter 100 is present, during both the charging control mode and the discharging control mode, the second decoupling unit 5a, 5b of the first and second converter circuit la, lb remains in the non-conducting state and, thus, does not contribute to any electrical losses. When the second condition of voltages applied to the converter 100 is present, during both the charging control mode and the discharging control mode, the second semiconductor switch unit 32a, 32b of the first and second converter circuit la, lb remains in the conducting state and, thus, does not contribute to switching losses

[0126] As shown using the example of FIGs. 5 (a), 5(b), 6 (a) and 6 (b), the topology of the converter of this disclosure, e.g. the converter 100 of FIG. 1, allows controlling the whole input voltage provided by the first and second electrical energy source 200a, 200b while allowing PPP. This is advantageous compared to other PPP converter topologies that are merely operable when the input voltage is greater than half the DC link voltage. Due to the PPP topology of the converter 100 the volt rating of the controllable semiconductor switches is half in comparison to a full power processing (FPP) topology. Hence the switching frequency may be increased further which will result in the reduction of inductance and, thus, magnetic size will be reduced. This allows reducing the size of the converter 100. The volt-second of the inductors LI and L2 of the converter 100 is half in comparison to a FPP topology if both operated at the same frequency. Hence, the converter 100 allows keeping the volt-second to half when the input voltage provided by the electrical energy sources 200a, 200b is greater or smaller than half the DC link voltage across the series connection of the first and second capacitor unit C 1 , C2.

[0127] Optionally, the control unit is configured to, in case the input voltage provided by the first and second electrical energy storage 200a, 200b is equal to half the DC link voltage across the first and second capacitor unit Cl, C2, control the controllable semiconductor switch S21 of the second semiconductor switch unit 32a, 32b of the first and second converter circuit la, lb to be in the conducting state such that the input voltage provided by the first and second electrical energy storage 200a, 200b is supplied to half of the DC link. In other words, the control unit may configured to, in case the input voltage provided by the first and second electrical energy storage 200a, 200b is equal to half the DC link voltage across the first and second capacitor unit C 1 , C2, control the controllable semiconductor switches of the converter 100 such that the semiconductor switch unit 32a, 32b of the first and second converter circuit la, lb is in the conducting state and, thus, the input voltage provided by the first and second electrical energy storage 200a, 200b is supplied to half of the DC link.

[0128] FIG. 7 shows an example of an implementation form of the converter of FIG. 1. The converter of 100 of FIG. 7 corresponds to the converter of FIG. 4 and, thus, the description of FIGs. 4, 5 (a), 5 (b), 6 (a) and 6 (b) is correspondingly valid and in the following mainly differences between the converter 100 of Figure 7 and the converter 100 of FIG. 4 are described.

[0129] As shown in FIG. 7, the first and second semiconductor switch unit 31a, 32a of the power converter 2a of the first converter circuit la is implemented in line with the implementation form (ii) of Figure 2 (d) and the first and second semiconductor switch unit 31b, 32b of the power converter 2b of the second converter circuit lb is implemented in line with the implementation form (ii) of Figure 2 (e). That is, compared to the converter 100 of FIG. 4, the diode DI 1 of the first semiconductor switch unit 31 a of the power converter 2a of the first converter circuit 1 a is replaced with a controllable semiconductor switch Sil and the diode Dl l of the first semiconductor switch unit 31b of the power converter 2b of the second converter circuit lb is replaced with a controllable semiconductor switch Si l. This makes the converter 100 of FIG. 7 bidirectional. As a result the electrical energy sources 200a, 200b may be PV systems 201a, 201b, such as PV panel(s) and / or PV array(s), or rechargeable BESS 202a, 202b. In case of the electrical energy sources 200a, 200b being rechargeable BESS 202a, 202b the converter 100 of FIG. 7 may charge and discharge the BESS 202a, 202b. In case the electrical energy sources 200a, 200b being PV systems 201a, 201b, the converter 100 allows condition monitoring of the PV systems through photo-luminescence. The converter 100 allows energizing the PV systems e.g. at night and high-resolution photos of the luminescent PV systems may be captured. Postprocessing of these images allows identifying PV cell defects or degradations of the PV systems.

[0130] The implementation form of the converter 100 of FIG. 7 provides the same advantages as described with regard to the implementation form of the converter 100 of FIG. 4.

[0131] The converter of this disclosure may be used in PV applications as an MPPT converter. The converter of this disclosure may be used as a bidirectional topology for charging and discharging of batteries. The converter of this disclosure may be for luminescent PV panels capturing.

[0132] The present disclosure has been described in conjunction with various embodiments as examples as well as implementations. However, other variations can be understood and effected by those persons skilled in the art and practicing the claimed matter, from the studies of the drawings, this disclosure and the independent claims. In the claims as well as in the description the word “comprising” does not exclude other elements or steps and the indefinite article “a” or “an” does not exclude a plurality. A single element or other unit may fulfill the functions of several entities or items recited in the claims. The mere fact that certain measures are recited in the mutual different dependent claims does not indicate that a combination of these measures cannot be used in an advantageous implementation.

Claims

CLAIMS1. A converter (100) comprising a first and second converter circuit (la, lb), and a series connection of a first and second capacitor unit (C 1 , C2); wherein each converter circuit of the first and second converter circuit (la, lb) comprises a first, second, third, fourth and fifth terminal (T1 , T2, T3, T4, T5), the first and second terminal (T1 , T2) being terminals for receiving a DC voltage, a power converter (2a; 2b) comprising a first, second and third terminal (X, Y, Z), an inductor (LI; L2), a series connection of a first and second semiconductor switch unit (31a, 32a; 31b, 32b), at least one of the first and second semiconductor switch unit (31a, 32a; 31b, 32b) comprising one or more controllable semiconductor switches, a first decoupling unit (4a; 4b) being electrically connected between the second terminal (T2) of the converter circuit (la; lb) and the third terminal (Z) of the power converter (2a; 2b), and a second decoupling unit (5a; 5b) being electrically connected between the fourth terminal (T4) of the converter circuit (la; lb) and the third terminal (Z) of the power converter (2a; 2b), wherein the first terminal (Tl), third terminal (T3) and fifth terminal (T5) of the converter circuit (la; lb) are electrically connected with the first terminal (X) of the power converter (2a; 2b), the second terminal (Y) of the power converter (2a; 2b) and the second terminal (T2) of the converter circuit (la; lb), respectively, and the inductor (LI; L2) of the power converter (2a; 2b) is electrically connected between the first terminal (X) of the power converter (2a; 2b) and a node (N1 ) between the first and second semiconductor switch unit (31a, 32a; 31b, 32b) and the series connection of the first and second semiconductor switch unit (31a, 32a; 31b, 32b) is electrically connected between the second and third terminal (Y, Z) of the power converter (2a; 2b); the third terminal (T3), fourth terminal (T4) and fifth terminal (T5) of the first converter circuit (la) are electrically connected with a first end of the series connection of the first and second capacitor unit (C 1 , C2), a node (N2) between the first and second capacitor unit (C 1 , C2) and a second end of the series connection of the first and second capacitor unit (Cl, C2), respectively; and the third terminal (T3), fourth terminal (T4) and fifth terminal (T5) of the second converter circuit (lb) are electrically connected with the second end of the series connection of the first and second capacitor unit (C 1 , C2), the node (N2) between the first and second capacitor unit (C 1 , C2) and the first end of the series connection of the first and second capacitor unit (Cl, C2), respectively.

2. The converter (100) according to claim 1, comprising one or more additional first converter circuits (la, la’), wherein the third terminal (T3), fourth terminal (T4) and fifth terminal (T5) of each additional first converter circuit (la’) are electrically connected with the first end of the series connection of the first and second capacitor unit (Cl, C2), the node (N2) between the first and second capacitor unit (Cl, C2) and the second end of the series connection of the first and second capacitor unit (Cl, C2), respectively; and / or one or more additional second converter circuits (lb, lb’), wherein the third terminal (T3), fourth terminal (T4) and fifth terminal (T5) of each additional second converter circuit (lb’) are electrically connected with the second end of the series connection of the first and second capacitor unit (Cl, C2), the node (N2) between the first and second capacitor unit (Cl, C2) and the first end of the series connection of the first and second capacitor unit (Cl, C2), respectively.

243. The converter (100) according to any one of the previous claims, wherein the first terminal (Tl) and second terminal (T2) of the first converter circuit (la) is configured to be electrically connected with a positive and negative terminal of a first DC source (200a), respectively, and the first terminal (Tl) and second terminal (T2) of the second converter circuit (lb) is configured to be electrically connected with a negative and positive terminal of a second DC source (200b), respectively.

4. The converter (100) according to any one of the previous claims, comprising a first, second, third and fourth terminal (Al, A2, A3, A4) for receiving DC voltages, wherein the first terminal (Al), second terminal (A2), third terminal (A3) and fourth terminal (A4) of the converter (100) are electrically connected with the first terminal (Tl) of the first converter circuit (la), the second terminal (T2) of the first converter circuit (la), the second terminal (T2) of the second converter circuit (lb) and the first terminal (Tl) of the second converter circuit (lb), respectively.

5. The converter (100) according to claim 4, wherein the converter (100) is unidirectional and each of the first, second, third and fourth terminal (Al, A2, A3, A4) of the converter (100) is an input terminal, or the converter (100) is bidirectional.

6. The converter (100) according to any one of the previous claims, wherein the converter (100) comprises a fifth and sixth terminal (T5, T6) that are configured to be electrically connected with an electrical load (300) or with one of an electrical load (300) and electrical energy source, the fifth terminal (A5) is electrically connected with the first end of the series connection of the first and second capacitor unit (Cl, C2), and the sixth terminal (A6) is electrically connected with the second end of the series connection of the first and second capacitor unit (Cl, C2).

7. The converter (100) according to any one of the previous claims, wherein the first semiconductor switch unit (31a) of the power converter (2a) of the first converter circuit (la) comprises or is one of a controllable semiconductor switch (Si l) and a diode (Dll), the cathode of the diode (Dl l) being electrically connected with the second terminal (Y) of the power converter (2a) of the first converter circuit ( 1 a), and the second semiconductor switch unit (32a) of the power converter (2a) of the first converter circuit (la) comprises or is a controllable semiconductor switch (S21); and the first semiconductor switch unit (3 lb) of the power converter (2b) of the second converter circuit (lb) comprises or is one of a controllable semiconductor switch (Si l) and a diode (Dll), the anode of the diode (Dl l) being electrically connected with the second terminal (Y) of the power converter (2b) of the second converter circuit (lb), and the second semiconductor switch unit (32b) of the power converter (2b) of the second converter circuit (lb) comprises or is a controllable semiconductor switch (S21).

8. The converter (100) according to any one of the previous claims, wherein the first semiconductor switch unit (31a) of the power converter (2a) of the first converter circuit (la) comprises or is a series connection of two controllable semiconductor switches (Si l, S12) or two diodes (Dl l, D12), the cathode of a second diode (DI 2) of the two diodes (DI 1, DI 2) being electrically connected with the second terminal (Y) of the power converter (2a) of the first converter circuit (la) and the cathode of a first diode (DI 1) of the two diodes(Dl l, D12) being electrically connected with the anode of the second diode (D12), and the second semiconductor switch unit (32a) of the power converter (2a) of the first converter circuit (la) comprises or is a series connection of two controllable semiconductor switches (S21, S22), a capacitor (C3) electrically connecting a node (N3) between the two controllable semiconductor switches (Si l, S12) or the two diodes (Dl l, D12), respectively, of the first semiconductor switch unit (31 a) of the power converter (2a) of the first converter circuit (la) and a node (N4) between the two controllable semiconductor switches (S21, S22) of the second semiconductor switch unit (32a) of the power converter (2a) of the first converter circuit (la); and the first semiconductor switch unit (3 lb) of the power converter (2b) of the second converter circuit (3b) comprises or is a series connection of two controllable semiconductor switches (Si l, S12) or two diodes (Dll, D12), the anode of a second diode (D12) of the two diodes (DI 1, D12) being electrically connected with the second terminal (Y) of the power converter (2b) of the second converter circuit (lb) and the anode of a first diode (D 11 ) of the two diodes (Dll, D12) being electrically connected with the cathode of the second diode (D12), and the second semiconductor switch unit (32b) of the power converter (2b) of the second converter circuit (lb) comprises or is a series connection of two controllable semiconductor switches (S21, S22), a capacitor (C3) electrically connecting a node (N3) between the two controllable semiconductor switches (Si l, S12) or the two diodes (Dl l, D12), respectively, of the first semiconductor switch unit (31b) of the power converter (2b) of the second converter circuit (lb) and a node (N4) between the two controllable semiconductor switches (S21, S22) of the second semiconductor switch unit (32b) of the power converter (2b) of the second converter circuit (lb).

9. The converter (100) according to any one of the previous claims, wherein the first decoupling unit (4a) of the first converter circuit (la) comprises or is a controllable semiconductor switch (42) or a diode (41 ), the cathode of the diode (41) being electrically connected with the third terminal (Z) of the power converter (2a) of the first converter circuit (la); and the first decoupling unit (4b) of the second converter circuit (lb) comprises or is a controllable semiconductor switch (42) or a diode (41 ), the anode of the diode (41) being electrically connected with the third terminal (Z) of the power converter (2b) of the second converter circuit (lb).

10. The converter (100) according to any one of the previous claims, wherein the second decoupling unit (5a) of the first converter circuit (la) comprises or is a controllable semiconductor switch (52) or a diode (51 ), the anode of the diode (51) being electrically connected with the third terminal (Z) of the power converter (2a) of the first converter circuit (la); and the second decoupling unit (5b) of the second converter circuit (lb) comprises or is a controllable semiconductor switch (52) or a diode (51), the cathode of the diode (51) being electrically connected with the third terminal (Z) of the power converter (2b) of the second converter circuit (lb).

11. The converter (100) according to any one of the previous claims, wherein the converter (100) comprises a control unit configured to control a voltage conversion by the power converter (2a; 2b) of the first and second converter circuit (la, lb) by controlling the one or more controllable semiconductor switches of the power converter (2a; 2b) of the first and second converter circuit (la, lb).

12. The converter (100) according to claim 11, wherein the control unit is configured to, when a first voltage applied between the first and second terminal (Tl, T2) of the first converter circuit (la) and a second voltage applied between the first and second terminal (Tl, T2) of the second converter circuit (lb) is greater than a voltage across the second capacitor unit (C2) and a voltage across the first capacitor unit (C 1 ), respectively, to control charging of the inductor (L 1 ; L2) of the power converter (2a; 2b) of eachconverter circuit of the first and second converter circuit (la, lb) by controlling the one or more semiconductor switches of the power converter (2a; 2b) of the converter circuit (la; lb) such that a current path is provided between the first and second terminal (Tl, T2) of the converter circuit (la; lb) via the inductor (L 1 ; L2) and second semiconductor switch unit (32a; 32b) of the power converter (2a; 2b) of the converter circuit (la; lb), and the second decoupling unit (5a; 5b) of the converter circuit (la; lb).

13. The converter (100) according to claim 11 or 12, wherein the control unit is configured to, when a first voltage applied between the first and second terminal (Tl, T2) of the first converter circuit (la) and a second voltage applied between the first and second terminal (Tl, T2) of the second converter circuit (lb) is greater than a voltage across the second capacitor unit (C2) and a voltage across the first capacitor unit (Cl), respectively, to control discharging of the inductor (LI; L2) of the power converter (2a; 2b) of each converter circuit of the first and second converter circuit (la, lb) by controlling the one or more semiconductor switches of the power converter (2a; 2b) of the converter circuit (la; lb) such that a current path is provided between the first and second terminal (Tl, T2) of the converter circuit (la; lb) via the inductor (LI; L2) and the first semiconductor switch unit (31a; 31b) of the power converter (2a; 2b) of the converter circuit (la; lb).

14. The converter (100) according to any one of claims 11 to 13, wherein the control unit is configured to, when a first voltage applied between the first and second terminal (Tl, T2) of the first converter circuit (la) and a second voltage applied between the first and second terminal (Tl, T2) of the second converter circuit (lb) is smaller than a voltage across the second capacitor unit (C2) and a voltage across the first capacitor unit (C 1 ), respectively, to control charging of the inductor (L 1 ; L2) of the power converter (2a; 2b) of each converter circuit of the first and second converter circuit (la, lb) by controlling the one or more semiconductor switches of the power converter (2a; 2b) of the converter circuit (la; lb) such that a current path is provided between the first and second terminal (Tl, T2) of the converter circuit (la; lb) via the inductor (L 1 ; L2) and second semiconductor switch unit (32a; 32b) of the power converter (2a; 2b) of the converter circuit (la; lb), and the first decoupling unit (4a; 4b) of the converter circuit (la; lb).

15. The converter (100) according to any one of claims 11 to 14, wherein the control unit is configured to, when a first voltage applied between the first and second terminal (Tl, T2) of the first converter circuit (la) and a second voltage applied between the first and second terminal (Tl, T2) of the second converter circuit (lb) is smaller than a voltage across the second capacitor unit (C2) and a voltage across the first capacitor unit (Cl), respectively, to control discharging of the inductor (LI; L2) of the power converter (2a; 2b) of each converter circuit of the first and second converter circuit (la, lb) by controlling the one or more semiconductor switches of the power converter (2a; 2b) of the converter circuit (la; lb) such that a current path is provided between the first and second terminal (Tl, T2) of the converter circuit (la; lb) via the inductor (L 1 ; L2) and second semiconductor switch unit (32a; 32b) of the power converter (2a; 2b) of the converter circuit (la; lb), and the second decoupling unit (5a; 5b) of the converter circuit (la; lb).27

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