Package structure, electronic device system, and photoelectric fusion device

Abstract

The purpose of the present invention is to provide a technique for making it possible to shorten the transmission distance of electric signals and achieve high-speed communication and a highly integrated or high-speed semiconductor chip.　For this purpose, a package structure (1) according to the present invention is characterized in that: a chamber (52) surrounded by a package substrate (10), a frame body (34), and a top plate (38) is disposed over the package substrate (10); the frame body (34) is provided with an inlet (34i) and / or outlet (34o) for a cooling liquid; semiconductor chips (50) and photoelectric conversion elements (28) are disposed in the chamber (52); and the photoelectric conversion elements (28) are connected to an optical waveguide circuit (36) formed on the top plate (38).

Description

Package structure, electronic device system and photonics-electronics convergence device

[0001] The present invention relates to a package structure, an electronic device system, and an optoelectronic convergence device that are compatible with high-speed communication and optical communication.

[0002] In recent years, the spread of the Internet and mobile communications has led to a dramatic increase in both communication speed and volume. In response to this, data centers and other facilities that use optical communications have been developed. To enable even faster and larger-capacity communications, communication signals are becoming increasingly higher frequency, and the optical communications concept is underway to apply optical communications to connections between servers and semiconductor packages within server racks, and even to connections between semiconductor chips.

[0003] Following the trend toward optical communication, development is currently underway on a package structure in which multiple semiconductor chips are mounted on a single package substrate, with optical communication connectors and photoelectric conversion elements located on the edge of the package substrate, and the optical signal is converted from an optical signal to an electrical signal within the substrate before being transmitted to the semiconductor chip. In order to keep up with the increasing frequency of electrical signals, efforts have been made to develop insulating materials for package substrates with low dielectric loss tangents to suppress signal attenuation as they pass through the substrate. However, material development alone is no longer sufficient to meet the demands for high-speed and large-capacity communication, which have accelerated significantly in recent years, and limitations are becoming apparent.

[0004] Therefore, to avoid the effects of attenuation in insulating materials, it is necessary to place the photoelectric conversion element close to the semiconductor chip. Also, as multiple semiconductor chips are mounted on the same package substrate and package substrates continue to grow in size, the layout of the photoelectric conversion element must also be considered. Furthermore, as logic semiconductor chips become more highly integrated and faster, power consumption increases, and the thermal effects caused by heat generation and cooling efficiency become issues.

[0005] Many methods have been studied for cooling semiconductor chips. Among these, the liquid cooling method described in Patent Document 1 is highly efficient and is considered to be an effective cooling method for future packages. Specifically, Patent Document 1 aims to "provide a mounting structure for semiconductor devices and electronic components that can suppress temperature increases associated with heat generation in semiconductor devices and electronic components that consume large amounts of power, thereby enabling stable operation." It discloses the following as an invention for a mounting structure for semiconductor devices and electronic components: "The mounting structure includes an interposer 10, a semiconductor device 11 mounted on a surface 10a of the interposer 10, and a cover 12 that is intimately attached to and fixed to the surface 10a of the interposer 10 so as to enclose the semiconductor device 11 and forms an internal space S together with the interposer 10. The cover 12 has an inlet 13 for introducing a heat-absorbing fluid L from the outside into the internal space S and an outlet 14 for discharging the fluid L from the internal space S to the outside. The internal space S is a closed space except for the inlet 13 and the outlet 14."

[0006] JP 2012-138473 A

[0007] There are many challenges to incorporating optical communications into semiconductor packages. First, because high-frequency electrical signals inside a semiconductor package are significantly affected by attenuation over the transmission distance, it is necessary to place the photoelectric conversion element near the semiconductor chip to shorten the transmission distance. However, because the photoelectric conversion element, a laser, is sensitive to heat, cooling of the photoelectric conversion element must also be considered. Other issues include how to connect the optical signal from the optical communications cable to the photoelectric conversion element near the semiconductor chip, for example, how to ensure the optical transmission path to the photoelectric conversion element, the connection method, and optical axis alignment accuracy without interfering with the cooling of the photoelectric conversion element.

[0008] Regarding semiconductor chip cooling, the liquid cooling method described in Patent Document 1 is highly efficient and is considered to be an effective cooling method for future packages. In particular, a method in which a sealed space is created on the package substrate using a cooling chamber equipped with an inlet and outlet, and the semiconductor chip inside is cooled by a liquid flow is considered to be able to achieve stable cooling against heat generation from the semiconductor chip. However, because the sealed space inside the cooling chamber is filled with cooling liquid, it is not easy to connect optical communication to the inside of the cooling chamber while maintaining the sealed state, and it has been difficult to place a photoelectric conversion element inside the cooling chamber.

[0009] Therefore, an object of the present invention is to provide a technology that can shorten the transmission distance of electrical signals and realize high-speed communication and high integration or high speed of semiconductor chips.

[0010] In order to solve the above problems, one representative package structure of the present invention is characterized in that a chamber including a package substrate, a frame, and a top plate is arranged on a package substrate, the frame having an inlet and / or an outlet for a coolant, a semiconductor chip and a photoelectric conversion element are arranged in the chamber, and the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

[0011] According to the present invention, it is possible to provide a technology that can shorten the transmission distance of an electrical signal, and realize high-speed communication and high integration or high speed of a semiconductor chip. Problems, configurations, and effects other than those described above will become clear from the description of the following embodiments of the invention.

[0012] FIG. 1 is a cross-sectional view of an example of a package structure. FIG. 2 is an enlarged view of a photoelectric conversion element portion of the package structure. FIG. 3 is a cross-sectional view of an example of a package structure. FIG. 4 is a schematic view of a Θ shift. FIG. 5 is a schematic view of a magnification shift. FIG. 6 is a view showing a case where a core material and a clad material are arranged on a glass substrate that will become a top plate. FIG. 7 is a view showing a case where a resist is formed. FIG. 8 is a view showing a case where etching is performed. FIG. 9 is a view showing a case where the resist is peeled off. FIG. 10 is a view showing a case where an unnecessary portion of a metal film is removed. FIG. 11 is a view showing a case where the resist is removed. FIG. 12 is a view showing a case where a resist pattern is formed on a glass substrate that will become a top plate. FIG. 13 is a view showing a case where a groove is formed by dry etching. FIG. 14 is a view showing a case where a resist pattern is formed on a portion of a glass substrate that will become a top plate where a light output portion of an optical waveguide circuit will be formed. FIG. 15 is a view showing a case where a groove is formed by dry etching. FIG. 16 is a view showing a case where a laser modified portion is formed on a glass substrate that will become a top plate. FIG. 17 is a diagram showing a case where wet etching is performed on a glass substrate that will become a top plate. FIG. 18 is a diagram showing a cross-sectional image of the depth of incidence of a pulsed laser when forming multiple laser-modified portions. FIG. 19 is a diagram showing a top view of the laser-modified portion of FIG. 18. FIG. 20 is a diagram showing a cross-sectional image of the laser-modified portion of FIG. 18 after etching has been performed. FIG. 21 is a diagram showing a top view after etching. FIG. 22 is a diagram showing a case where a metal film is formed on a glass substrate that will become a top plate. FIG. 23 is a diagram showing a case where unnecessary portions of an aluminum film are removed. FIG. 24 is a diagram showing a case where a core material is disposed on a glass substrate that will become a top plate. FIG. 25 is a diagram showing a case where a clad material and a resist pattern are disposed on a glass substrate that will become a top plate. FIG. 26 is a diagram showing a case where an embedding resin is disposed. FIG. 27 is a diagram showing an example of a coolant circulation system. FIG. 28 is an enlarged view of a chamber. FIG. 29 is a cross-sectional view of an example of a package structure. FIG. 30 is an enlarged view of a photoelectric conversion element portion of the package structure.FIG. 31 is a diagram showing a case where a core material and a clad material are arranged on a glass substrate that serves as a top plate. FIG. 32 is a diagram showing a case where a resin material is introduced into a through-hole. FIG. 33 is a diagram showing a case where a resist pattern is formed. FIG. 34 is a diagram showing a case where a mirror shape is formed by etching. FIG. 35 is a diagram showing a case where the resist pattern is removed. FIG. 36 is a cross-sectional view of an example of a package structure. FIG. 37 is a diagram showing a case where a metal film is formed. FIG. 38 is a diagram showing a case where a resist pattern is formed. FIG. 39 is a diagram showing a case where a resin is arranged. FIG. 40 is a diagram showing a case where a resist pattern is formed. FIG. 41 is a diagram showing a case where etching is performed. FIG. 42 is a diagram showing a case where the resist is peeled off. FIG. 43 is a diagram showing a case where an unnecessary portion of the metal film is removed. FIG. 44 is a diagram showing a case where a resin is arranged. FIG. 45 is a cross-sectional view of an example of a package structure. FIG. 46 is a cross-sectional view of an example of a package structure. FIG. 47 is a diagram showing an image of the top surface of the package structure. FIG. 48 is a diagram showing a method for aligning a photoelectric conversion element. FIG. 49 is an enlarged view of a photoelectric conversion element and an optical waveguide circuit. FIG. 50 is a cross-sectional view of an example of a package structure. FIG. 51 is a cross-sectional view of an example of a package structure. FIG. 52 is a view showing a location where a photoelectric conversion element is arranged in an optical waveguide circuit. FIG. 53 is a view showing an aa' cross-section of FIG. 52 when a photoelectric conversion element is arranged in an optical waveguide circuit. FIG. 54 is a view showing a bb' cross-section of FIG. 52 when a photoelectric conversion element is arranged in an optical waveguide circuit. FIG. 55 is a cross-sectional view of an example of a package structure. FIG. 56 is a view showing a location where a photoelectric conversion element is arranged in an optical waveguide circuit. FIG. 57 is a view showing a cc' cross-section of FIG. 56 when an electric conversion element is arranged in an optical waveguide circuit. FIG. 58 is a cross-sectional view of an example of a package structure. FIG. 59 is a cross-sectional view of an example of a package structure. FIG. 60 is an enlarged view of a photoelectric conversion element portion of the package structure. FIG. 61 is a view showing a case where a functional layer, a core material, and a clad material are arranged on a glass substrate that serves as a top plate. FIG. 62 is an enlarged view of the photoelectric conversion element portion of the package structure.Fig. 63 is an enlarged view of a photoelectric conversion element portion of the package structure. Fig. 64 is an enlarged view of a photoelectric conversion element portion of the package structure. Fig. 65 is an enlarged view of a photoelectric conversion element portion of the package structure. Fig. 66 is a cross-sectional view of an example of a package structure.

[0013] Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the present invention is not limited to these embodiments. In addition, in the description of the drawings, identical parts are denoted by the same reference numerals. When there are multiple components having the same or similar functions, they may be described by using the same reference numerals with different subscripts. Furthermore, when it is not necessary to distinguish between these multiple components, the subscripts may be omitted. In order to facilitate understanding of the invention, the position, size, shape, range, number, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, number, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, number, etc. disclosed in the drawings.

[0014] In this disclosure, a package structure containing a semiconductor chip, a photoelectric conversion element, etc. will be described, but since the package structure functions as an electronic device, it can also be called, for example, a "photoelectric hybrid device."

[0015] [First Embodiment] (Configuration) The configuration of a first embodiment of the present invention will be described with reference to Figures 1 and 2. Figure 1 is a cross-sectional view of an example package structure 1. In the package structure 1, a chamber 52 including the package substrate 10, a frame 34, and a top plate 38 is disposed on a package substrate 10. The frame 34 has a coolant inlet 34i and / or outlet 34o. A semiconductor chip 50 and a photoelectric conversion element 28 are disposed within the chamber 52, and the photoelectric conversion element 28 is connected to an optical waveguide circuit 36 ​​formed on the top plate 38. Specifically, the package structure 1 has a chamber structure surrounded by the package substrate 10, the top plate 38, and the frame 34. The chamber 52 is filled with coolant, and the semiconductor chip 50 is cooled by the coolant.

[0016] In the first embodiment, the package substrate 10 is a rigid substrate with a low CTE close to that of a silicon chip (semiconductor chip 50), sufficient thickness, and a low thermal conductivity. The package substrate 10 includes, for example, a first wiring layer 10a, a low-stretch copper clad laminate (CCL) 10b, and a second wiring layer 10c. The first wiring layer 10a and the second wiring layer 10c are electrically connected via electrodes 10d. The first wiring layer 10a and the second wiring layer 10c have wiring with a predetermined shape in the xy plane. The semiconductor chip 50 disposed on the first wiring layer 10a is electrically connected to a terminal 18 disposed on the second wiring layer 10c. The capacitor 20 is disposed on the second wiring layer 10c and provides a decoupling function to prevent AC noise from being applied to the terminal 18, for example. The configuration of the package substrate 10 is not limited to the above-described configuration. The material and configuration of the package substrate 10 can be selected according to the package structure 1.

[0017] The package structure 1 also includes an interposer 12 disposed on a package substrate 10, and the semiconductor chip 50 and the photoelectric conversion element 28 are mounted on the interposer 12, which is made of silicon or glass. Specifically, the interposer 12, which is made of silicon or glass, is disposed on the package substrate 10, and the package substrate 10 and the interposer 12 are electrically connected via solder bumps 14. An underfill 16 is filled between the package substrate 10 and the interposer 12.

[0018] Furthermore, multiple semiconductor chips 50 are mounted on the interposer 12, and the semiconductor chips 50 and the interposer 12 are electrically connected via solder bumps 24. An underfill 26 is filled between the semiconductor chips 50 and the interposer 12. The capacitor 22 is disposed on the surface of the interposer 12 in the negative z-axis direction, and exhibits a decoupling function similar to the capacitor 20, for example.

[0019] The semiconductor chip 50 has connection terminals on both the surface facing the interposer 12 (the surface in the negative z-axis direction) and the surface opposite the surface facing the interposer 12 (the surface in the negative z-axis direction). The photoelectric conversion element 28 is arranged so as to connect to the connection terminals arranged on the surface opposite the interposer 12 side. The photoelectric conversion element 28 and the semiconductor chip 50 are electrically connected via solder bumps 30. An underfill 32 is filled between the photoelectric conversion element 28 and the semiconductor chip 50.

[0020] The connection terminals on the surface of the semiconductor chip 50 facing the interposer 12 (the surface on the negative z-axis direction) are mainly supplied with power via the package substrate 10 and the interposer 12. The connection terminals on the surface of the semiconductor chip 50 opposite the interposer 12 side (the surface on the positive z-axis direction) include connection terminals for electrical signals and power supply terminals to the photoelectric conversion element 28.

[0021] In recent years, for the purpose of efficient power supply, designs have been increasingly adopted in which the power supply circuit and signal circuit within a semiconductor chip are separated by the transistor formation surface, and this embodiment, in which the electrical signal from the photoelectric conversion element 28 is connected from the opposite surface of the package substrate 10, can also be applied to such semiconductor chips.

[0022] The frame 34 is disposed on the package substrate 10 so as to surround the interposer 12. The top plate 38 has an optical waveguide circuit 36 ​​formed on its surface in the negative z-axis direction, and is disposed on the frame 34 so that the optical waveguide circuit 36 ​​faces the negative z-axis direction. A connector 40 is disposed on the optical waveguide circuit 36, and an optical signal input from an optical cable 42 propagates (connects) to the optical waveguide circuit 36. The following description will primarily focus on a case where an optical signal is input to the package structure 1 from the optical cable 42 and converted into an electrical signal by the photoelectric conversion element 28, but the present disclosure is not limited to this case. Alternatively, the electrical signal may be converted into an optical signal by the photoelectric conversion element, and the optical signal may be output to the outside from the optical cable 42.

[0023] The frame body 34 and the package substrate 10, and the frame body 34 and the top plate 38 are fixed together with an adhesive 44. Grooves are formed in the frame body 34 in the portion that contacts the package substrate 10 and the portion that contacts the top plate 38, increasing the area over which the adhesive 44 comes into contact with the frame body 34. The top plate 38 and the photoelectric conversion element 28 are fixed together with a resin 46.

[0024] The space defined by the package substrate 10, the frame 34, and the top plate 38 forms a chamber 52. The frame 34 is formed with a coolant inlet 34i and outlet 34o, and coolant can be introduced into the chamber 52 in the direction from arrow A1 to arrow A2 to cool the semiconductor chip 50 and the photoelectric conversion element 28. A temperature sensor 54 is disposed near the outlet 34o of the frame 34, and the temperature of the chamber 52 can be determined by detecting the temperature of the temperature sensor 54. While the description has been given of a case in which coolant flows from the inlet 34i to the outlet 34o of the chamber 52, the present disclosure is not limited to the above case. For example, coolant may be discharged from the inlet 34i, or coolant may be introduced into the chamber 52 from the outlet 34o. Furthermore, while the description has been given of a case in which the inlet and outlet are provided separately, the chamber 52 may have a single opening, which functions as both an inlet and an outlet.

[0025] (Connection Structure Between the Photoelectric Conversion Element 28 and the Top Plate 38) Next, referring to FIG. 2, the connection structure between the photoelectric conversion element 28 and the top plate 38 will be described. FIG. 2 is an enlarged view of the photoelectric conversion element 28 portion of the package structure 1. FIG. 2 illustrates, for example, the configuration (including the optical waveguide circuit 36, the top plate 38, etc.) of the portion including the photoelectric conversion element 28 located on the positive x-axis direction of the two photoelectric conversion elements 28 shown in FIG. 1. Note that the configuration of the portion including the photoelectric conversion element 28 located on the negative x-axis direction has a similar configuration to the configuration of the portion including the photoelectric conversion element 28 located on the positive x-axis direction, although the orientation may not match. Therefore, one portion will be described and the other portion will not be described. Regarding other configurations and configurations included in other embodiments, a representative configuration will be described unless otherwise specified, and other descriptions may be omitted. The photoelectric conversion element 28 has an optical signal input section 28i on the surface opposite the semiconductor chip 50. The optical waveguide circuit 36 ​​also has a light output portion 36o from which an optical signal propagated within the core material (core) 360 is output. By aligning the optical axes of the light output portion 36o of the optical waveguide circuit 36 ​​and the input portion 28i of the photoelectric conversion element 28, the optical signal can be transmitted from the optical waveguide circuit 36 ​​to the photoelectric conversion element 28 with reduced loss. For ease of understanding, a case in which an optical signal propagates from the optical waveguide circuit 36 ​​to the input portion 28i of the photoelectric conversion element 28 (e.g., a case in which the photoelectric conversion element converts an optical signal into an electrical signal like a photodiode) will be described, but the present disclosure is not limited to this case. The present disclosure can also be applied to a case in which an optical signal output from the photoelectric conversion element 28 propagates through the optical waveguide circuit 36, propagates from the package structure 1 through the optical cable 422, and is output to the outside of the package structure 1. In this case, the light output portion 36o of the optical waveguide circuit 36 ​​functions as a light receiving portion, and the input portion 28i of the photoelectric conversion element 28 also functions as an output portion.

[0026] Furthermore, the connection portion between the optical waveguide circuit 36 ​​and the photoelectric conversion element 28 is formed of a resin with a refractive index equivalent to that of the material (core material 360) forming the core of the optical waveguide circuit 36. Specifically, the input portion 28i of the photoelectric conversion element 28 and the light output portion 36o of the optical waveguide circuit 36 ​​(connection portion) are connected by a resin 46, which is transparent and has a refractive index equivalent to that of the core material 360 of the optical waveguide circuit 36. The reason for the connection portion having a refractive index equivalent to that of the core material 360 is to reduce optical signal loss due to differences in refractive index distribution. Possible causes of optical loss include reflection and scattering of optical signals at the interface between the optical waveguide circuit 36 ​​and the connection portion (resin 46) and at the interface between the connection portion (resin 46) and the photoelectric conversion element 28. The connection portion (resin 46) having an equivalent refractive index can also be expressed as, for example, that the difference between the refractive index of resin 46 and the refractive index of core material 360 is smaller than the difference between the refractive index of the cladding material that forms optical waveguide circuit 36 ​​and the refractive index of core material 360. In the following description, expressions such as resin having an equivalent refractive index to that of the core material may be used in some cases, but unless otherwise specified, this has the same meaning as above.

[0027] (Alignment) In the package structure 1, the optical waveguide circuit 36 ​​is a first optical waveguide circuit formed near the surface of the top plate 38 that is bonded to the frame 34, and the top plate 38 is formed of a light-transmitting material. Specifically, in the first embodiment, in the manufacturing process of the package structure 1, the optical waveguide circuit 36 ​​is formed on a transparent substrate (made of a light-transmitting material) such as glass that serves as the top plate 38, and direct alignment is performed while viewing (visually checking) the input portion 28i of the photoelectric conversion element 28 and the light output portion 36o of the optical waveguide circuit 36 ​​through this transparent top plate 38. In order to improve the alignment accuracy (hereinafter also referred to as "optical axis alignment accuracy"), it is important that the multiple semiconductor chips 50 and the photoelectric conversion elements 28 mounted thereon are precisely aligned.

[0028] The core size of the optical waveguide circuit 36 ​​(the width of the core material 360 in a cross section parallel to the yz plane in FIG. 2) is typically several μm, and the requirement for precision in optical axis alignment is becoming stricter. As package sizes are also increasing, the impact of misalignment of the photoelectric conversion element 28 cannot be ignored. In this embodiment, solder bumps are used to connect the connection terminals of the semiconductor chip 50 and the photoelectric conversion element 28, and self-alignment during reflow of BGA (Ball Grid Array) mounting makes it possible to ensure high placement precision.

[0029] To achieve high placement accuracy through self-alignment, it is first necessary to have high accuracy in the pattern of the interposer 12. To achieve this, it is preferable to form the pattern using equipment with high alignment accuracy when manufacturing the interposer 12, and it is also preferable to use silicon or glass, which have high flatness, as the material for the interposer 12.

[0030] Furthermore, the top plate 38 is made of glass having the same CTE as the interposer 12, so that the misalignment between the interposer 12 and the top plate 38 does not increase due to expansion and contraction caused by heat.

[0031] In this embodiment, the semiconductor chip 50 is mounted on the package substrate 10 using the interposer 12, but a glass core substrate may be used instead of the package substrate 10 and the interposer 12. The glass core substrate is flat and can be manufactured using semiconductor front-end manufacturing equipment, and it can ensure the same rigidity as the package substrate 10 with a thickness about half that of the package substrate 10. Therefore, by using a glass core substrate as the package substrate, it is possible to prevent the package substrate from becoming bulky.

[0032] [Modification of First Embodiment] The configuration of a modification of the first embodiment will be described with reference to Figures 3 to 5. In the following description, components that are the same as or equivalent to those in the first embodiment described above will be denoted by the same reference numerals, and their description will be simplified or omitted.

[0033] FIG. 3 is a cross-sectional view of an example of a package structure 1a. In the package structure 1a, semiconductor chips 501 and 502 are disposed on an interposer 12. A photoelectric conversion element 281 is disposed on the semiconductor chip 501, and a photoelectric conversion element 282 is disposed on the semiconductor chip 502. A memory chip 561 is disposed on the interposer 12 adjacent to the semiconductor chip 501, and a memory chip 562 is disposed on the interposer 12 adjacent to the semiconductor chip 502. The semiconductor chips 501 and 502 and the memory chips 561 and 562 are electrically connected to the interposer 12 via solder bumps 24. Underfill 26 is filled between the semiconductor chips 501 and 502 and between the memory chips 561 and 562 and the interposer 12. The memory chip 561 is electrically connected to the semiconductor chip 501 via the interposer 12, and the memory chip 562 is electrically connected to the semiconductor chip 502 via the interposer 12.

[0034] As for the arrangement (layout) of the photoelectric conversion element 28 and the semiconductor chip 50 that facilitates alignment during manufacturing, by arranging the photoelectric conversion elements 281 and 282 together in the central part of the chamber 52 as shown in Figure 3, the distance d from the center cp of the top plate 38 (or package substrate 10) to the photoelectric conversion element 281 (for example, the distance from the center cp of the top plate 38 to the light receiving portion 201i of the photoelectric conversion element 281) is reduced, and the effects of Θ misalignment during alignment and magnification misalignment due to differences in CTE between the top plate 38 and the package substrate 10 can be suppressed.

[0035] The Θ deviation and the magnification deviation will be described with reference to FIGS. 4 and 5. FIG. 4 is a diagram illustrating the Θ deviation. FIG. 4 illustrates a case where photoelectric conversion elements 28a to 28c are arranged on a semiconductor chip 50. When the center cp of the top plate 38 is used as a reference, the photoelectric conversion elements 28a to 28c are arranged at different positions. The distance between the photoelectric conversion element 28a and the center cp of the top plate 38 is da, the distance between the photoelectric conversion element 28b and the center of the top plate 38 is db, and the distance between the photoelectric conversion element 28c and the center of the top plate 38 is dc. Note that the distance from the center is the length obtained by projecting the distance between the center cp of the top plate 38 and the center of the photoelectric conversion element 28 in the x-axis direction. Furthermore, although the case of the distance between the center of the top plate 38 and the center of the photoelectric conversion element 28 is described, the present disclosure is not limited to this case. The present disclosure can also be applied to the distance between the center of the top plate 38 and the input section 28 i of the photoelectric conversion element 28 .

[0036] The dashed line indicates the case where a Θ shift occurs between photoelectric conversion element 28a and photoelectric conversion element 28c. The Θ shift changes the position of photoelectric conversion element 28a to photoelectric conversion element 28c, and therefore the distance between the center of photoelectric conversion element 28 and the center cp of top plate 38 also changes. When a Θ shift occurs, the distance between photoelectric conversion element 28a and the center cp of top plate 38 is defined as daΘ, the distance between photoelectric conversion element 28b and the center cp of top plate 38 is defined as dbΘ, and the distance between photoelectric conversion element 28c and the center cp of top plate 38 is defined as dcΘ. As is clear from FIG. 4 , the difference between daΘ and da is smaller than the difference between dbΘ and db, and is also smaller than the difference between dcΘ and dc. Therefore, if the photoelectric conversion element is positioned close to the center cp of top plate 38, the effect of the Θ shift can be reduced even if a Θ shift occurs.

[0037] 5 is a diagram showing a schematic diagram of the deviation of magnification. Similar to FIG. 4, FIG. 5 shows a case where photoelectric conversion elements 28a to 28c are arranged on a semiconductor chip 50.

[0038] The dashed line indicates the case where a deviation in magnification occurs from photoelectric conversion element 28a to photoelectric conversion element 28c. The deviation in magnification changes the positions of photoelectric conversion element 28a to photoelectric conversion element 28c, and therefore the distance between the center of photoelectric conversion element 28 and the center cp of top plate 38 changes. When a Θ deviation occurs, the distance between photoelectric conversion element 28a and the center cp of top plate 38 is defined as daM, the distance between photoelectric conversion element 28b and the center cp of top plate 38 is defined as dbM, and the distance between photoelectric conversion element 28c and the center cp of top plate 38 is defined as dcM. As is clear from FIG. 5 , the difference between daM and da is smaller than the difference between dbM and db, and is also smaller than the difference between dcM and dc. Therefore, when the photoelectric conversion element is positioned close to the center cp of top plate 38, the impact of the deviation in magnification can be reduced even if deviation in magnification occurs.

[0039] (First Method for Forming Optical Waveguide Circuit) A method for forming an optical waveguide circuit 36 ​​on a glass top plate 38 will be described with reference to Figures 6 to 11. Figures 6 to 11 are enlarged views of a portion near the light exit portion 36o in Figure 2, for example. Figure 6 is a view showing a case where a core material and a clad material are arranged on a glass substrate that serves as the top plate.

[0040] First, as shown in FIG. 6 , a first layer of clad material 362 is formed on a glass substrate (hereinafter, sometimes simply referred to as the “glass substrate 38”) that will become the top plate 38, and a core material 360 is formed on the clad material 362. Then, a core pattern, which is a core having a predetermined shape extending in the x- and y-plane directions, is formed by photolithography, and a second layer of clad material is formed on the core material and clad material on which the core pattern is formed. As a result, as shown in FIG. 6 , the core material 360 and the clad material 362 are formed on the glass substrate that will become the top plate 38. Note that the glass substrate will become the top plate 38 in the package structure 1. The shape (e.g., thickness) of the top plate 38 of the package structure 1 may differ at the stage of forming the optical waveguide circuit 36. However, to indicate the relationship with the top plate 38 of the package structure 1, expressions such as “glass substrate that will become the top plate 38,” “top plate 38,” and “glass substrate” may be used.

[0041] There are many methods for forming the core pattern, but in the example of this embodiment, a photosensitive resin is used as the core material 361 and the core pattern is formed by photolithography.

[0042] Next, a mirror is formed on the light output portion 36o of the optical waveguide circuit 36. FIG. 7 shows the case where a resist is formed. FIG. 8 shows the case where etching is performed. The mirror is formed by forming a second layer of cladding material 362 as shown in FIG. 6, then applying resist 364 as shown in FIG. 7, and forming a pattern that is inclined in the thickness direction (inclined by an angle θr from the z-axis direction) by gradation exposure in the portion that will become the light output portion 36o of the optical waveguide circuit 36. Then, as shown in FIG. 8, the resist 364, cladding material 362, and core material 360 are etched by anisotropic dry etching while maintaining the inclined pattern of the resist 364. Arrow A3 pointing in the z-axis direction indicates the irradiation of radicals used for etching. If the etching rates of the resist 364 and the cladding material 362 are the same, a resist 364 film with an inclination of θr of 45° as shown in FIG. 7 may be formed. Furthermore, if the etching rate of the clad material 362 is lower than that of the resist 364, the tilt angle θr of the resist 364 is made larger than 45°, and if the etching rate of the clad material 362 is higher than that of the resist 364, the tilt angle θr of the resist 364 is made smaller than 45°, and the angle θc of the clad material is adjusted to 45°.

[0043] FIG. 9 shows the case where the resist has been stripped. After the process of FIG. 8, the resist 364 is stripped, and as shown in FIG. 9, a metal film 366 such as aluminum (Al) is sputter-deposited as a reflective film (mirror). It is preferable to sputter at an angle, as indicated by arrow A4, to avoid adhesion to the wall surface 360s where the core is exposed. In this case, by positioning the optical waveguide circuit 36 ​​so that it faces the same direction as the mirrors in other locations, it is possible to process the entire surface at once by sputtering. Furthermore, a smoothing treatment may be performed on the cladding material 362 before sputtering, if necessary, to smooth the mirror surface. The smoothing treatment may be selected depending on the material of the cladding material 362, such as heat treatment or chemical treatment.

[0044] Next, FIG. 10 is a diagram showing the case where unnecessary portions of the metal film are removed. As shown in FIG. 10, unnecessary portions of the metal film 366 are etched away using a resist pattern 368, which is a resist film having a predetermined shape, as a mask. In this manner, a mirror portion 370 is formed from the metal film 366. Finally, FIG. 11 is a diagram showing the case where the resist is removed. The resist pattern 368 is removed, and the light output portion 36o is completed as shown in FIG. 11.

[0045] In order to facilitate connection with the photoelectric conversion element 28, the recess in the mirror portion 370 may be filled in advance with a resin having a refractive index equivalent to that of the core material 360.

[0046] (Second Method of Forming Optical Waveguide Circuit (First Groove Forming Method)) Another method of forming an optical waveguide circuit will be described with reference to FIGS. 12 to 21. As a means of forming the optical waveguide circuit 36 ​​on the top plate 38, there is a method in which the glass substrate that will become the top plate 38 is used as a cladding layer, and grooves are formed in the glass substrate to be used as the core of the optical waveguide. After the grooves are formed, a reflective film for the light output section and a core material are filled, and the cladding layer is formed to form the optical waveguide circuit. First, the groove forming method will be described. In this first groove forming method, a core material is formed on the glass substrate by anisotropic dry etching using a resist as a mask. This will be described with reference to FIGS. 12 to 15. Note that in the following FIGS. 12 to 21, the coordinate directions are set so that an optical waveguide circuit corresponding to the optical waveguide circuit 36 ​​in FIG. 2 is formed.

[0047] 12 and 13 are conceptual diagrams of a cross section in the direction of cutting the core of the optical waveguide. FIG. 12 illustrates the formation of a resist pattern 480 on a glass substrate that will become the top plate 38. FIG. 13 illustrates the formation of a groove by dry etching. The method for forming the groove can be appropriately determined. For example, as shown in FIG. 12, one method involves first patterning the glass substrate that will become the top plate 38 using a resist pattern 480 to match the core pattern of the optical waveguide circuit 36, exposing the glass substrate. Next, as shown in FIG. 13, anisotropic dry etching is performed on the glass substrate using the resist pattern 480 as a mask. Arrow 5A in FIG. 13 indicates the etching radicals being irradiated.

[0048] 14 and 15 are conceptual diagrams of a cross section along an optical waveguide. FIG. 14 illustrates the formation of a resist pattern on a portion of a glass substrate serving as a top plate where the light output portion of the optical waveguide circuit will be formed, and FIG. 15 illustrates the formation of a groove by dry etching. Here, in the case of patterning the light output portion 36o of the optical waveguide circuit 36, as shown in FIG. 14, the resist pattern 480a is tilted in the depth direction (z-axis direction) by gradation exposure so that the wall angle θp of the end of the core pattern corresponding to the light output portion 36o of the optical waveguide circuit 36 ​​is θp = 45°. Arrow A6 indicates the gradation exposure. Next, as shown in FIG. 15, dry etching is performed to etch the resist pattern 480. This delays the etching of the glass substrate in the portion where the resist pattern 480 is formed compared to the etching of the glass substrate in the portion where the resist pattern 480 is not formed, thereby creating a slope on the glass substrate. 15, the dashed line indicates the resist pattern 480 before dry etching, and the resist pattern 480a indicates the shape of the resist pattern after dry etching. Arrow A7 indicates the state in which radicals used in dry etching are irradiated.

[0049] Thereafter, the resist pattern 480 is removed, thereby forming grooves in the glass substrate that will become the top plate 38 .

[0050] (Second Method of Forming Optical Waveguides (Second Groove Forming Method)) The second groove forming method will be described with reference to FIGS. 16 to 21. In this second groove forming method, a modified portion is formed on the surface of a glass substrate that will become the top plate 38 using a pulsed laser, and a core material is formed on the glass substrate by wet etching starting from the modified portion. The description will be made with reference to FIGS. 16 to 21. FIGS. 16 and 17 are conceptual diagrams of a cross section in the direction in which the core of the optical waveguide is cut, and FIG. 16 is a diagram showing a case in which a laser modified portion is formed on the glass substrate that will become the top plate. Also, FIG. 17 is a diagram showing a case in which wet etching is performed on the glass substrate that will become the top plate. In the second groove forming method for forming grooves on a glass substrate, as shown in FIG. 16, the focus of a pulsed laser is set to a portion close to the surface layer of the glass substrate that will become the top plate 38, and the pulsed laser is irradiated to the portion where the core pattern of the optical waveguide circuit 36 ​​will be formed, thereby modifying the glass. Laser modified portion 38m indicates the modified portion of the glass substrate. As shown in FIG. 17, a groove 38e is formed by wet etching using a hydrofluoric acid solution, starting from the laser modified portion 38m.

[0051] 18 to 21 are diagrams showing the formation of a core pattern in a portion of a glass substrate serving as a top plate where the light output portion of an optical waveguide circuit is formed. FIG. 18 is an image of a cross section along the optical waveguide, showing a cross-sectional image of the depth of incidence of a pulsed laser when forming a laser-modified portion. FIG. 19 is a top view of the laser-modified portion of FIG. 18. In FIG. 19, the laser-modified portion 38m is shown as a line, but this shows an image of the area where multiple pulsed lasers are incident according to the size of the core pattern. FIG. 20 is a cross-sectional image of the laser-modified portion of FIG. 18 after etching. FIG. 21 is a top view of the portion after etching. As shown in FIG. 18, the portion corresponding to the mirror of the light output portion of the optical waveguide can be formed into a 45° oblique shape as shown in FIG. 20 by adjusting the output of the pulsed laser and changing the depth of the laser-modified portion 38m. Furthermore, by changing the shape of the laser modified portion 38m when viewed in the xy plane as shown in FIG. 19, the flat area of ​​the inclined portion that contacts the mirror can be widened as shown in FIG.

[0052] (Second method for forming an optical waveguide (method for forming a reflective film and a cladding material)) A method for forming a reflective film and a cladding material will be described with reference to Figures 22 to 26. After grooves are formed in a glass substrate using the two groove formation methods described above, a metal material that will become a reflective film is deposited over the entire surface. Figure 22 is a diagram showing the formation of a metal film on a glass substrate that will become a top plate. In Figure 22, an aluminum film 366a is formed by sputtering. Arrow 8A indicates sputtering using aluminum.

[0053] Fig. 23 is a diagram showing the case where unnecessary portions of the aluminum film 366a are removed. After the sputtering shown in Fig. 22, only the portion corresponding to the light output portion 36o of the optical waveguide circuit 36 ​​is covered with a resist pattern 364a, and the aluminum film 366a in other portions is etched, and the resist pattern 364a is removed.

[0054] Next, Fig. 24 shows the case where a core material is placed on a glass substrate that will become the top plate. As shown in Fig. 24, a resin film that has a refractive index different from that of the glass substrate and will become core material 360a is formed so as to fill the grooves in the glass substrate, and the surface is polished to leave core material 360a only in the grooves of the glass substrate.

[0055] 25 is a diagram showing a case where a clad material and a resist pattern are arranged on a glass substrate that serves as a top plate. As shown in Fig. 25, a resin film that serves as a clad material 362a and has the same refractive index as the glass substrate is formed thereon, a resist pattern 368a is formed so as to expose the portion that corresponds to the light output portion 36o of the optical waveguide circuit 36, and the clad material 362a is then etched.

[0056] Fig. 26 is a diagram showing the case where an embedding resin is placed. After the resist pattern 368a is peeled off, in order to connect to the photoelectric conversion element 28 as shown in Fig. 26, it is also possible to embed the etched portion in advance with a resin (embedding resin 380) having the same refractive index as the core material.

[0057] Also, instead of the resin clad material 362a, a glass film or the like with an opening pre-arranged therein may be attached to the portion corresponding to the light output portion 36o of the optical waveguide circuit 36.

[0058] (Method of Adhering Top Plate and Frame) A method of adhering the top plate 38 and the frame 34 will be described with reference to FIG. 1 . In the package structure 1, the adhesive 44 that adheres the frame 34 and the top plate 38 is a photosensitive curing resin. In a specific method of adhering the top plate 38 and the frame 34 in this embodiment, a photocuring resin is used for the adhesive 44 that adheres the top plate 38 and the frame 34 and for the resin 46 that connects the optical waveguide circuit 36 ​​and the photoelectric conversion element 28, and the photocuring resin is placed on the frame 34 and the photoelectric conversion element 28. After placement, the top plate 38 is placed over the package substrate 10 (the top plate 38 is moved closer to the package substrate 10 from the positive z-axis direction). When placing the top plate 38, the top plate 38 is aligned while aiming at the optical waveguide circuit 36 ​​and the photoelectric conversion element 28 from above (the positive z-axis direction), and the top plate 38 is then placed over the frame 34 and the photoelectric conversion element 28. Subsequently, light is irradiated to harden the adhesive 44 and the resin 46. In this manner, it is possible to employ a method for simultaneously fixing the optical axis position and bonding the top plate 38 and the frame 34.

[0059] The adhesive 44 between the frame 34 and the top plate 38 is made of the same material as the resin 46 that connects the optical waveguide circuit 36 ​​and the photoelectric conversion element 28, and is not specifically designed for bonding purposes, particularly for the purpose of alignment. If the bonding between the frame 34 and the top plate 38 is insufficient, there is a risk of separation or leakage of the coolant 48 due to pressure generated by increases or decreases in the flow of the coolant or heat generation.

[0060] Therefore, a groove structure is formed on the adhesive surface of the frame 34 where it is bonded to the top plate 38, increasing the contact area between the frame 34 and the adhesive 44, thereby creating a structure that can withstand stress in the shear direction. The area of ​​the outlet 34o of the coolant is also made larger than the area of ​​the inlet 34i (cross-sectional area of ​​the zy plane), preventing the internal pressure of the chamber 52 from increasing even if the flow rate of the coolant fluctuates. The flow rate of the coolant is controlled by circulating the coolant through suction from the outlet 34o side, thereby further suppressing the increase in internal pressure.

[0061] A temperature sensor 54 is attached to the frame 34 to measure the temperature of the chamber 52 or the temperature of the coolant, and the flow rate of the coolant can be controlled based on the measured temperature to maintain a constant temperature range.

[0062] (Coolant Circulation System) A coolant circulation system will be described with reference to FIGS. 27 and 28 . The package structure 1 can also be applied to a circulation system that introduces coolant into the package structure 1. For example, a circulation system 100 that introduces coolant into the package structure 1 includes a pump 102 connected to the outlet 34o that discharges coolant from the chamber 52 and generates a liquid flow toward the inlet 34i, and a controller 106 that monitors the temperature of the chamber 52 and controls the flow rate and the temperature of the coolant in accordance with the monitored temperature. The outlet 34o can have a larger cross-sectional area for the liquid flow than the inlet 34i. In the circulation system 100, the coolant flowing out of the chamber 52 is cooled by passing through a chiller or a radiator and then flows back to the chamber 52.

[0063] FIG. 27 is a diagram showing an example of a coolant circulation system. FIG. 27 shows a system in which the flow rate of the coolant and the temperature of the chiller are adjusted by a controller. Specifically, the circulation system 100 includes a packaging structure 1, a pump 102, a chiller 104, and a controller 106. The pump 102 is disposed on the outlet 34o side of the chamber 52 of the packaging structure 1 and discharges the coolant from the chamber 52. The chiller 104 cools the coolant discharged by the pump 102. The coolant whose temperature has been adjusted by the chiller 104 is introduced into the chamber 52 from the inlet 34i of the chamber 52.

[0064] Note that Figure 28 is an enlarged view of the chamber. The outlet 34o has a larger cross-sectional area with respect to the liquid flow than the inlet 34i. Figure 28 shows a case where the chamber 52 has one outlet 34o and three inlets 34i. Note that even if the number of semiconductor chips or the like contained in the chamber 52 increases and the chamber 52 needs to be made larger, by sloping the wall of the chamber 52 on the outlet 34o side, as shown in Figure 28, it is possible to reduce the resistance to the liquid flow, thereby suppressing the internal pressure and facilitating temperature control of the chamber 52.

[0065] Second Embodiment (Configuration) The configuration of a second embodiment of the present invention is shown with reference to Figures 29 and 30. Figure 29 is a cross-sectional view of an example package structure 1b. In package structure 1b, optical waveguide circuit 36b is a second optical waveguide circuit formed near the surface of top plate 38 opposite the surface that contacts frame 34. Top plate 38 is formed of a light-transmitting material and has through-holes 601 (or 602) penetrating both surfaces thereof. Through-hole 601 (or 602) is filled with a resin having a refractive index equivalent to that of the material forming the core of the second optical waveguide circuit. Photoelectric conversion element 281 (or 282) is connected to the second optical waveguide circuit via through-hole 601 (or 602). In the following description, components that are the same as or equivalent to those in the first embodiment described above are designated by the same reference numerals, and their description will be simplified or omitted.

[0066] In the package structure 1 of the first embodiment, the surface of the top plate 38 on which the optical waveguide circuit 36 ​​is formed is the inner surface of the chamber 52, whereas in the package structure 1b of the second embodiment, the optical waveguide circuit 36b forms the outer surface of the chamber 52, which is different from the first embodiment.

[0067] In the package structure 1 of the first embodiment, the optical waveguide circuit 36 ​​is bonded to the frame 34, and there is a risk of deformation of the optical waveguide circuit 36 ​​due to stress caused by pressure or heat within the chamber 52. In contrast, in the package structure 1b of the second embodiment, the optical waveguide circuit 36b is not in contact with the frame 34 and is disposed away from the chamber 52, eliminating this risk. Furthermore, because the optical waveguide circuit 36b is outside the chamber 52, subsequent formation or modification of the optical waveguide circuit 36a is also possible.

[0068] Optical signals are transmitted from the optical waveguide circuit 36b formed on the outside of the top plate 38 to the photoelectric conversion element 281 through a through hole 601 formed in the top plate 38, which is a glass substrate. The through hole 601 is filled with a transparent resin that has a refractive index different from that of glass, and the resin between the top plate 38 and the photoelectric conversion element 281 has approximately the same refractive index as the resin filled in the through hole 601. The relationship between the photoelectric conversion element 282 and the through hole 602 is also the same as the relationship between the photoelectric conversion element 281 and the through hole 601.

[0069] The through holes 601 and 602 in the glass substrate are formed by forming an altered layer (laser modified portion, micro-destructed layer) in the depth direction of the glass substrate that will become the top plate 38 with a pulsed laser, and then penetrating and etching with a diluted hydrofluoric acid solution. The size of the formed through holes 601 and 602 can be, for example, several μm to several tens of μm in diameter (when viewed in the xy plane direction).

[0070] The shape of the through holes 601 and 602 in the x-axis direction can also be adjusted from an X-shape to a straight shape by adjusting the concentration of the diluted hydrofluoric acid solution and the intensity of the pulse laser depending on the depth of the glass substrate that becomes the top plate 38.

[0071] A transparent resin with a higher refractive index than that of glass is filled into the formed through holes 601 and 602 and used as a waveguide for optical signals. For example, by filling the holes with epoxy resin with a refractive index that differs by about 0.2% to 6% from the refractive index of the glass substrate that will become the top plate 38, optical signals can be transmitted with little loss.

[0072] In the second embodiment, the mirrors that guide the optical signals from the optical waveguide circuit 36b formed in the top plate 38 to the through holes 601 and 602 in the top plate 38 can be made relatively easily compared to the first embodiment.

[0073] For example, in the first embodiment, when bending light 90 degrees from the optical waveguide circuit 36 ​​and outputting it, a 45-degree inclined surface is created, the surface of the inclined surface is covered with a metal film to form a mirror, and then filled with resin having a refractive index equivalent to that of the core. On the other hand, in the second embodiment, the portion to be bent 90 degrees is filled with resin having a refractive index equivalent to that of the core, and then the filled resin is scraped to create a 45-degree inclined surface. The surface opposite the surface facing the core is left air, forming a mirror, eliminating the need for a metal film covering. Figure 30 is an enlarged view of the photoelectric conversion element 281 portion of the package structure 1b. Figure 30 also shows a cross-sectional view of the connection between the photoelectric conversion element 28 and the optical waveguide circuit 36b. As shown in Figure 30, a 45-degree inclined surface is formed in the light output portion 36bo. The photoelectric conversion element 282 has a similar configuration to the photoelectric conversion element 281, and therefore will not be described here.

[0074] (Method of Fabricating a Mirror) A method of fabricating a mirror will be described with reference to FIGS. 31 to 35. FIGS. 31 to 35 are enlarged views of the vicinity of the light output portion 36o in FIG. 30, for example. FIG. 31 is a view showing a case where a core material and a clad material are disposed on a glass substrate that will become the top plate. A specific method of fabricating a mirror for the optical waveguide circuit 36b begins by forming a first layer of clad material, a core material, and a second layer of clad material on the glass substrate that will become the top plate 38, as shown in FIG. 31. Before arranging the clad material and the core material, a through hole 601 is formed in the glass substrate, and the through hole 601 is filled with a resin 60r. The resin 60r has a refractive index equivalent to that of the core material 360 of the optical waveguide circuit 36b. The clad material 362b is removed from the end portion of the core material 360b of the optical waveguide circuit 36b so that the through hole 601 on the surface of the top plate 38 is exposed. To expose the through hole 60, for example, etching is performed. Resist pattern 364b disposed on clad material 362b has a shape that exposes through-hole 60, and arrow A9 indicates the state in which radicals used for etching are irradiated.

[0075] 32 is a diagram showing the case where a resin material is introduced into the through-holes. After removing the resist pattern 364b as shown in FIG. 32, the portion where the cladding material 362b has been removed is filled with a resin 60r, and the surface of the resin 60r is polished so that it coincides with the surface of the cladding material 362b.

[0076] Next, Fig. 33 shows the formation of a resist pattern. As shown in Fig. 33, a photosensitive resist layer is placed on the cladding material 362b and resin 60r formed in Fig. 32, and a resist pattern 368b is formed on the embedded resin by gradation exposure to form a shape identical to the mirror shape. Arrow A10 indicates gradation exposure.

[0077] 34 is a diagram showing the case where a mirror shape is formed by etching. As shown in Fig. 34, the underlying resin 60r is etched together with the resist pattern 368b by anisotropic dry etching, and the shape of the resist pattern 368b is transferred to the resin 60r above the through-hole 601. Arrow A11 indicates the state in which radicals used for etching are irradiated.

[0078] Next, Fig. 35 is a diagram showing the case where the resist pattern is removed. As shown in Fig. 35, the resist pattern 368b is removed, the mirror is completed, and the light exit portion 36bo of the optical waveguide circuit 36b is formed.

[0079] [First Modification of Second Embodiment] (Configuration) The configuration of the first modification of the second embodiment will be described with reference to Fig. 36. In the following description, components that are the same as or equivalent to those in the above-described embodiment and modifications will be denoted by the same reference numerals, and their description will be simplified or omitted.

[0080] Fig. 36 is a cross-sectional view of an example of a package structure 1c, showing the configuration of a modified example of the second embodiment in which optical waveguide circuits are formed on both sides of the top plate. In package structure 1c, top plate 38 includes, as optical waveguide circuits, a first optical waveguide circuit (optical waveguide circuit 36c2) formed near the surface of top plate 38 that comes into contact with frame 34, and a second optical waveguide circuit (optical waveguide circuit 36c1) formed near the surface of top plate 38 opposite to the surface that comes into contact with frame 34. Top plate 38 is formed of a light-transmitting member, and has through holes 601 and 602 that pass through both surfaces thereof. Through holes 601 and 602 are filled with resin having refractive indexes equivalent to those of the material that forms the core of the first optical waveguide circuit and the material that forms the core of the second optical waveguide circuit. Photoelectric conversion elements 281 and 282 are connected to the first optical waveguide circuit, and the first optical waveguide circuit is connected to the second optical waveguide circuit via the through holes. Package structure 1c differs from the package structures of the above-described embodiments and modified examples mainly in that optical waveguide circuits (optical waveguide circuit 36c1 arranged on the positive z-axis direction side and optical waveguide circuit 36c2 arranged on the negative z-axis direction side) are arranged on both sides of top plate 38.

[0081] With regard to the package structure 1b of the second embodiment shown in FIG. 29 , if the distance (distance in the z-axis direction) between the top plate 38 and the photoelectric conversion element 28b in the chamber 52 is large, the optical signal passing through the through holes 601 and 602 may be diffused. In such a case, as shown in FIG. 36 , optical waveguide circuits 36c1 and 36c2 are formed on both sides of the top plate 38, and mirrors of a predetermined shape are formed on the optical waveguide circuits 361 and 362, so that the light beam of the optical signal can efficiently reach the photoelectric conversion elements 281 and 282. In the case of FIG. 36 , the optical signal incident from the optical cable 421 travels through the optical waveguide circuit 36c1 in the negative x-axis direction, changes direction to the negative z-axis direction at a predetermined position, and enters the through hole 601. The optical signal emitted from the through hole 601 travels through the optical waveguide circuit 36c2 in the positive x-axis direction, changes direction to the negative z-axis direction at a predetermined position, and enters the photoelectric conversion element 281. Furthermore, an optical signal incident from optical cable 422 travels in the positive x-axis direction through optical waveguide circuit 36c1, changes direction to the negative z-axis direction at a predetermined position, and enters through-hole 601. An optical signal emitted from through-hole 601 travels in the positive x-axis direction through optical waveguide circuit 36c2, changes direction to the negative z-axis direction at a predetermined position, and enters photoelectric conversion element 282.

[0082] (Method of Fabricating a Mirror) A method of fabricating a mirror will be described with reference to FIGS. 37 to 44. For ease of understanding, FIGS. 37 to 44 illustrate the case where the optical waveguide extends in the x-axis direction, but this does not imply that the present disclosure is limited to this case. The mirror of the optical waveguide circuit 36c2 in the chamber 52 in the first modified example of the second embodiment requires the use of a metal film. FIG. 37 illustrates the formation of a metal film. FIG. 38 illustrates the formation of a resist pattern. FIG. 39 illustrates the placement of a resin. A specific fabrication method similar to that described in the second embodiment can be applied. For example, for the portion with the through hole, after the shape shown in FIG. 35 (core material 360c2 and clad material 362c2) is formed, a metal film 366c is formed by sputtering as shown in FIG. 37. Arrow A12 indicates sputtering of the metal film. Next, as shown in FIG. 38, a resist pattern 364c2 is formed only in the portion where the metal film 366c is to remain, and unnecessary portions of the metal film 366c2 are removed. Next, after removing the resist pattern 364c2, a resin 60c2r is embedded as shown in FIG. 39 to prevent corrosion of the metal film 366c.

[0083] 39, the embedded resin 60c2r should preferably have a refractive index equivalent to that of the core material 360c2 of the optical waveguide circuit 36c2, in order to match the mirror for transmitting an optical signal from the optical waveguide circuit 36c2 to the photoelectric conversion element 28. In FIG. 39, the embedded resin 60cr is polished to match this, so that the surface of the embedded resin 60c2r (the surface in the negative z-axis direction) is aligned with the surface of the cladding material 362c2.

[0084] On the other hand, when transmitting an optical signal from the optical waveguide circuit 36c1 to the photoelectric conversion element 28 arranged in the negative z-axis direction, the mirror in this case is oriented in the opposite direction to the light output portion 36c2o of the optical waveguide circuit 36c2 shown in FIG. 39. Furthermore, taking into account the distance from the photoelectric conversion element 28, the mirror shape is formed to focus light onto the photoelectric conversion element 28. FIG. 40 is a diagram showing the formation of a resist pattern. Specifically, a cladding material 362c1 and a core material 360c1 are formed in advance on a glass substrate that will become the top plate 38, and an opening is formed in the location that will become the light output portion 36c1o and filled with resin 60c1r. Next, as shown in FIG. 40, the resist pattern 368c1 in the location where the mirror will be formed is subjected to gradation exposure (arrow A13) using a direct writing exposure machine to form a concave shape. Next, FIG. 41 is a diagram showing the etching process. 41, the resist pattern 368c1 and the embedded resin are etched by anisotropic etching to form a concave mirror shape, and a light output portion 36c1o that emits an optical signal in the negative z-axis direction is formed. Arrow A14 indicates the state in which radicals used in etching are irradiated.

[0085] Next, the resist pattern 368c1 is removed, and sputtering is performed from an oblique direction (arrow A15) so that the metal sputter film does not adhere to the vertical portions, as in the case of the metal film sputtering shown in Figure 9. Figure 42 shows the case where the resist is peeled off. As shown in Figure 42, the metal film 366c1 does not adhere to the vertical surfaces (surfaces facing the x-axis direction) of the optical waveguide circuit 36c1 and the sloped surface of the mirror (portion of resin 60c1r) that contacts the vertical surfaces.

[0086] 43 is a diagram showing a case where unnecessary portions of the metal film 366c1 are removed. As shown in Fig. 43, a resist pattern 369c1 is formed only in the portions where the metal film 366c1 is to remain, and the unnecessary portions of the metal film 366c1 are removed.

[0087] Next, Fig. 44 shows the case where resin is placed. After removing the resist pattern 369c1, as shown in Fig. 44, resin 366c1r having a refractive index equivalent to that of the core of the optical waveguide circuit 36c1 is embedded, and the surface is polished to be the same as that of the clad layer.

[0088] To reduce costs, a large number of through-holes filled with resins having different refractive indices may be formed in the top plate 38 in advance, and the optical waveguide circuits may be formed by selecting the through-holes to be used. This allows for versatility and facilitates mass production. The refractive indices of the cores of the optical waveguide circuits 36c1 and 36c2 and the refractive indices of the resins filled in the through-holes 601 and 602 (the refractive indices of the resins 60c1r and 60c2r) may be the same, but the present disclosure is not limited to this. The refractive indices of the resins 60c1r and 60c2r may also be different.

[0089] [Second Modification of Second Embodiment] (Configuration) The configuration of a second modification of the second embodiment of the present invention will be described with reference to Fig. 45. Fig. 45 is a cross-sectional view of an example of a package structure 1d. In the following description, components that are the same as or equivalent to those in the above-described embodiments and modifications are designated by the same reference numerals, and their description will be simplified or omitted.

[0090] In the package structure 1d, the top plate 38 is formed of a light-transmitting member, the optical waveguide circuit 36d is a third optical waveguide circuit formed in the vicinity of the surface of the top plate 38 opposite to the surface that contacts the frame body 34, and an electrical wiring layer 62 is formed on the third optical waveguide circuit, the electrical wiring layer 62 is electrically connected to the package substrate 10 by wire wiring 64 or a flexible substrate, and has a first opening (opening 62o1) that exposes the third optical waveguide circuit. The top plate 38 has through holes 601 and 602 formed therethrough, which are filled with a resin having a refractive index equivalent to that of a material forming the core of the third optical waveguide circuit, and the optical component 611 (or 612) and the photoelectric conversion element 281 (or 282) are connected via the through hole 601 (or 602) and the third optical waveguide circuit. The package structure 1d of the second modification of the second embodiment differs from the first modification of the second embodiment in that the optical switch devices 611 and 612 are arranged on the optical waveguide circuit 36.

[0091] By mounting optical switch devices 611 and 612, which are optical components, on the top of the top plate 38 (on the positive z-axis side) for the multiple semiconductor chips 501 and 502 in the chamber 52, efficient distribution of optical signals becomes possible.

[0092] Specifically, the optical switch device 611 can switch whether or not an optical signal incident from the optical cable 42 is incident on the photoelectric conversion element 282. In addition, the optical switch device 612 can switch whether or not an optical signal incident from the optical cable 42 is incident on the photoelectric conversion element 281.

[0093] Generally, chiplets, which mount multiple semiconductor chips within a package, are effective in shortening development time and cutting costs, and the number of semiconductor chips mounted on them is increasing. However, there is also a demand for faster information transfer between semiconductor chips, and optical communication is also required for communication between the mounted semiconductor chips. In order to efficiently utilize the optical waveguide circuits that form this communication network, a switch device is needed to distribute the communication.

[0094] In a second modification of the second embodiment, an electrical wiring layer 62 is formed on top of an optical waveguide circuit 36d formed on the outside of the top plate 38, and an opening 62o1 is formed in the electrical wiring layer 62 as an input / output port for optical signals, allowing connection of optical signals between the optical switch devices 611 and 612 and the optical waveguide circuit 36d. The electrical wiring layer 62 is disposed on the optical waveguide circuit 36d using, for example, solder. Although the opening 62o1 is formed in the above description, the opening 62o1 does not necessarily have to be left as an open space. Filling and curing a resin with a refractive index equivalent to that of the core material 360 that forms the core between the optical switch device, the opening 62o1, and the electrical wiring layer 62 reduces connection loss of optical signals and improves the electrical connection reliability of the optical switch device.

[0095] The power source for the optical switch devices 611 and 612 is supplied from the package substrate 10 to the electrical wiring layer 62 via wire wiring 64. Power can also be supplied via a flexible substrate or the like instead of wire wiring.

[0096] This structure prevents the circuitry of the optical waveguide circuit 36d from becoming complicated, and enables efficient communication between the semiconductor chips 501 and 502 in the package. Furthermore, optical communications from the outside can also be directly distributed to the semiconductor chips 501 and 502 in the package by the optical switch devices 611 and 612.

[0097] Note that by placing components on the surface of the top plate 38 outside the chamber 52, it becomes necessary to form a mirror that transmits an optical signal in the opposite direction to the direction in which the mirror of the optical waveguide circuit 36d transmits the optical signal to the through holes 601 and 602. For this reason, the mirror of the top plate 38 outside the chamber 52 is formed in the same manner as the mirrors of the optical waveguide circuits 36c1 and 36c2 inside the chamber 52 in the first modified example of the second embodiment.

[0098] Furthermore, when the electrical wiring layer 62 is placed on the third optical waveguide circuit (optical waveguide circuit 36d), it has a second opening (opening 62o2) that exposes one or more of the following locations: the location where the frame 34 and the top plate 38 are bonded; the locations where the photoelectric conversion elements 281 and 282 are disposed; and the locations where the alignment marks are disposed. When bonding the top plate 38 and the frame 34, alignment is performed while checking the positions of the photoelectric conversion elements 281 and 282 and the optical waveguide circuit 36d, the positions of the through-holes 601 and 602, and the position of the frame 34 through the transparent top plate 38 and the opening 62o2 so that the optical signal connection portions of the photoelectric conversion elements 281 and 282 coincide with the positions of the through-holes 601 and 602. After alignment, the photocurable adhesive between the frame 34 and the top plate 38 is fixed with ultraviolet light. Although the opening 62o2 of the electrical wiring layer 62 has a shape that exposes the area where the frame body 34 and the top plate 38 are bonded and the area where the photoelectric conversion elements 281 and 282 are arranged, the present disclosure is not limited to this case. For example, if alignment marks for positioning are arranged on the package substrate 10, the opening may expose one or more of the areas where the frame body 34 and the top plate 38 are bonded, the areas where the photoelectric conversion elements 281 and 282 are arranged, and the areas where the alignment marks are arranged. Specifically, the opening 62o2 may expose the area where the frame body 34 and the top plate 38 are bonded and the areas where the photoelectric conversion elements 281 and 282 are arranged. Alternatively, if alignment marks are used, the opening may expose the areas where the alignment marks are arranged. An alignment mark may or may not be arranged. Furthermore, there may be one alignment mark or two or more alignment marks. The area where the frame 34 and the top plate 38 are bonded may be entirely or partially exposed.

[0099] As a modification of package structure 1d, an optical waveguide circuit (fourth optical waveguide circuit) can also be disposed inside top plate 38 (inside chamber 52). In this case, top plate 38 further includes a fourth optical waveguide circuit formed near the surface of top plate 38 that contacts frame 34, and the fourth optical waveguide circuit is connected to the third optical waveguide circuit (optical waveguide circuit 36d) via through holes 601 and 602, and optical component 611 (or 612) and photoelectric conversion element 281 (or 282) are connected via through hole 601 (or 602), the third optical waveguide circuit, and the fourth optical waveguide circuit.

[0100] [Third Embodiment] (Configuration) The configuration of a third embodiment of the present invention will be described with reference to FIGS. 46 and 47 . FIG. 46 is a cross-sectional view of an example of a package structure 1d. The package structure 1e differs from the first and second embodiments in that a chamber 80 is disposed on a package substrate 10, and a chamber 52 is formed between the chamber 80 and the package substrate 10. Coolant flows into the chamber 52 through an inlet 80i of the chamber 80 and flows out through an outlet 80o of the chamber 80. In the following description, components that are the same or equivalent to those in the above-described embodiments and modifications are designated by the same reference numerals, and their description will be simplified or omitted. The "chamber" functions as both a top plate and a frame, and therefore can also be referred to as a "top plate" and a "frame."

[0101] In the third embodiment, an optical waveguide circuit 36e is formed on a package substrate 10, and the photoelectric conversion elements 281 and 282 are bonded so that the optical signal output portion of the optical waveguide circuit 36e is aligned with the optical input portions of the photoelectric conversion elements 281 and 282. A resin 46e used as an adhesive has a refractive index equivalent to that of the optical waveguide circuit 36e.

[0102] Memory chips 701 and 702 are arranged near the center of package substrate 10, and semiconductor chip 501, which serves as a processor, is arranged between photoelectric conversion element 281 and memory chip 701. Furthermore, semiconductor chip 502 is arranged between photoelectric conversion element 282 and memory chip 702. The layer of optical waveguide circuit 36e has been removed from the area where memory chips 701 and 702 and semiconductor chips 501 and 502 are arranged, and memory chips 701 and 702 and semiconductor chips 501 and 502 are electrically connected to package substrate 10 by solder bumps 71 for power supply. Furthermore, underfill 72 is filled between package substrate 10, memory chips 701 and 702, and semiconductor chips 501 and 502.

[0103] By limiting the terminals on the substrate surface (surface on the package substrate 10 side) of the semiconductor chips 501 and 502 and the memory chips 701 and 702 to terminals for power supply only, the distribution of the power supply voltage can be made constant, enabling stable operation.

[0104] An optical signal passes through the optical waveguide circuit 36e and is transmitted to the semiconductor chips 501 and 502 via the photoelectric conversion element 281 (or 282). An example of the path of the optical waveguide circuit 36e is shown in FIG. 47 as a top view of the package substrate 10. FIG. 47 is a diagram showing an image of the top surface of the package structure 1e. The connector 40 receives an optical signal input from outside the package structure 1e. The optical signal passes through the optical waveguide circuit 36eL and is transmitted to the photoelectric conversion element 28L in the chamber 52. The photoelectric conversion element 28L in FIG. 47 corresponds to the photoelectric conversion element 281 in FIG. 46, and the optical waveguide circuit 36eL in FIG. 47 corresponds to the optical waveguide circuit 36e in FIG. 46.

[0105] Returning to the description of FIG. 46 , the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 are disposed on the package substrate 10, and a bridge substrate 731 (or 734) is further provided in the chamber 52, connecting the semiconductor chip 501 (or 502) and the photoelectric conversion element 281 (or 282) from the side opposite the side of the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 that contacts the package substrate 10. The bridge substrate can also connect multiple components (e.g., semiconductor chips) together, in addition to the semiconductor chips and the photoelectric conversion elements. Specifically, the photoelectric conversion elements 281 and 282 and the semiconductor chips 501 and 502, the semiconductor chips 501 and 502, and the memory chips 701 and 702 exchange electrical signals through the bridge substrates 731 to 734, which are connected to electrical connection terminals disposed on the side opposite the package substrate 10. For example, power is supplied to the semiconductor chips 501 and 502 and the memory chips 701 and 702 from the package substrate 10, and power is supplied to the photoelectric conversion element 281 (or 282) to the semiconductor chip 501 (or 502) via the bridge substrate 731 (or 734). The semiconductor chip 501 (or 502) transmits and receives electrical signals to and from the memory chip 701 (or 702) through the bridge substrate 731 (or 734). The components on the bridge substrates 731 to 734 are electrically connected by solder bumps. An underfill 75 is filled between the bridge substrates 731 to 734 and the components on the bridge substrates 731 to 734. The connection of multiple semiconductor chips using a bridge substrate is not limited to the case where all of the multiple semiconductor chips are connected; a specific set of semiconductor chips from the multiple semiconductor chips may also be connected. Two semiconductor chips may be connected using one bridge substrate, or two or more bridge substrates.

[0106] A chamber section 80 surrounding a chamber 52 for cooling the semiconductor chips 501 and 502, the memory chips 701 and 702, and the photoelectric conversion elements 281 and 282 is bonded to the package substrate 10. A temperature sensor 81 is disposed in the chamber section 80, and a stable temperature can be obtained by measuring the temperature of the chamber 52 and controlling the flow of the coolant. As with the first embodiment shown in FIG. 28 , the outlet 80o of the coolant is larger than the inlet 80i, preventing a large increase in pressure within the chamber 52. All connection terminals are covered with underfill.

[0107] (Alignment) To align the photoelectric conversion elements 281 and 282 with the optical waveguide circuit 36e, a photocurable resin 46e is used as an adhesive, and the photoelectric conversion elements 281 and 282 with the resin 46e attached are aligned using a high-precision mounter. The photoelectric conversion elements 281 and 282 are then mounted on the optical waveguide circuit 36e and temporarily fixed by irradiating them with light, and finally cured by heat. This method enables high-precision alignment.

[0108] (Other Alignment Methods) As another method, FIG. 48 shows a method for aligning the photoelectric conversion elements. FIG. 48 shows an enlarged view of a portion of the optical waveguide circuit 36e including the light output portion 36eo. As an alignment method, first, as shown in FIG. 48, a metal film 76 having different wettability with respect to the cladding material of the optical waveguide circuit 36b and the resin 46e serving as an adhesive for the photoelectric conversion elements 281 and 282 is formed on the optical waveguide circuit 36e by metal sputtering, photolithography, and etching processes, in accordance with the size and arrangement of the photoelectric conversion elements 281 and 282. The photoelectric conversion elements are placed on the metal film 76 with liquid resin 46e sandwiched between them. The surface tension of the resin 46e allows the photoelectric conversion elements to be moved to the correct position by the self-alignment effect, and the photoelectric conversion elements are then fixed by thermal curing. FIG. 49 shows an enlarged view of the photoelectric conversion elements 28 and the optical waveguide circuit 36e. When this method is used, a metal film 76 is disposed between the photoelectric conversion element 28 and the optical waveguide circuit 36e.

[0109] In one specific example of this method, the aluminum film used to form the mirror is left as a metal film 76 that is sized to fit the photoelectric conversion element 28. Subsequently, a difference in wettability is created by CF4 / O2 plasma treatment, and the photoelectric conversion element 28 is positioned using resin 46e as a hydrophilic adhesive, allowing the photoelectric conversion element 28 to be positioned in the optical waveguide circuit 36e at a predetermined position due to the self-alignment effect. In such a case, there is no need to use a high-precision mounter for alignment, and the resin 46e does not need to be a photocurable resin.

[0110] (Effects of Bridge Substrates) The bridge substrates 731 to 734 have the effect of shortening the transmission distance of electrical signals, and in addition, compared to embedding electrical wiring in the package substrate 10, they have a simpler structure, reducing manufacturing costs, and can increase the yield rate because they are connected after the chips are mounted. Regarding how to deal with misalignment when mounting the semiconductor chips 501 and 502, the yield rate can be improved by preparing bridge substrates that anticipate misalignment and selecting one that matches the misalignment.

[0111] Furthermore, the bridge substrates 731 to 734 are smaller than the semiconductor chips 501 and 502 or the photoelectric conversion elements 281 and 282, and can achieve a sufficient cooling effect without interfering with the cooling of the semiconductor chips 501 and 502 or the photoelectric conversion elements 281 and 282.

[0112] Conventionally, using a bridge substrate on the side of a semiconductor chip opposite the package substrate posed the risk of breakage due to the effects of warping caused by heat in the package substrate, which reduced reliability. In this embodiment, liquid cooling is used, and the temperature can be kept constant by the liquid flow, so there is little thermal fluctuation and the risk of breakage due to the package substrate can be reduced.

[0113] [Modification of the Third Embodiment] A modification of the third embodiment will be described with reference to FIG. 50 . When applying a bridge substrate such as that of the third embodiment to a structure that uses a conventional cooling mechanism such as a heat dissipation fin instead of a chamber structure, the risk of breakage can be reduced by making the CTE of the lid material disposed between the semiconductor chips equal to the CTE of the Si or glass used in the package substrate 10. FIG. 50 is a cross-sectional view of an example of a package structure 1f. As shown in FIG. 50 , a recess is formed in the lid 90, and the lid 90 is bonded to the semiconductor chips 501 and 502, etc., using solder bumps or a paste 91 with good thermal conductivity. The lid 90 can be made of, for example, ceramic.

[0114] The package substrate 10 and the semiconductor chip 501, the package substrate 10 and the memory chip 701, the package substrate 10 and the semiconductor chip 502, and the package substrate 10 and the memory chip 702 are connected by solder bumps 93. In addition, underfill 94 is filled between the package substrate 10 and the semiconductor chip 501, the package substrate 10 and the memory chip 701, the package substrate 10 and the semiconductor chip 502, and the package substrate 10 and the memory chip 702.

[0115] Furthermore, the bridge substrate 735 and the memory chip 701, the bridge substrate 735 and the memory chip 701, the bridge substrate 736 and the memory chip 702, and the bridge substrate 736 and the memory chip 702 are connected by solder bumps 95. Furthermore, underfill 96 is filled between the bridge substrate 735 and the memory chip 701, the bridge substrate 735 and the memory chip 701, the bridge substrate 736 and the memory chip 702, and the bridge substrate 736 and the memory chip 702. Furthermore, the lid 90 and the heat dissipation fins 92 are bonded together by paste 97.

[0116] The lid 90 is formed of a material with a small CTE and high thermal conductivity, such as ceramic. The lid 90 fixes the semiconductor chips 501 and 502 between the heat dissipation fins 92 and the semiconductor chips 501 and 502, thereby suppressing stress on the bridge substrates 735 and 736. In particular, silicon carbide (SiC), aluminum nitride (AlN), silicon nitride (Si3N4), and the like have a CTE similar to that of the semiconductor chip and high thermal conductivity, and therefore can be used as materials for the lid 90.

[0117] In FIG. 50, it is assumed that an organic package substrate 10 with a small CTE is used, but if a glass core substrate or a ceramic substrate is used instead of the package substrate 10, higher reliability can be obtained.

[0118] The bridge substrate and lid system shown in Figure 50 can be used to shorten the transmission distance of electrical signals in conventional packages and is also effective in improving the yield rate. If the lid is used to cool the photoelectric conversion element, it is also possible to add a mechanism to forcibly cool the lid.

[0119] [Fourth Embodiment] The configuration of a fourth embodiment of the present invention will be described with reference to Figure 51. Figure 51 is a cross-sectional view of an example of a package structure 1g. The package structure 1g includes an interposer 200 disposed on a package substrate 10, a chamber portion 80 disposed on the interposer 200, semiconductor chips 501 and 502 and photoelectric conversion elements 281 and 282 mounted on the interposer 200, and the interposer 200 is formed of silicon or glass. In the following description, components that are the same as or equivalent to those in the above-described embodiments and modifications are designated by the same reference numerals, and their description will be simplified or omitted.

[0120] In the fourth embodiment, an interposer 200 having an optical waveguide circuit 36b formed thereon is mounted on a package substrate 10. Wiring layers are formed on both sides of the interposer 200, and electrical connection terminals (electrical terminals, connection terminals) are formed on the wiring layer 202 on the package substrate 10 side. The electrical connection terminals of the wiring layer 202 are electrically connected to the package substrate 10 via solder bumps 204. TGVs (Through Glass Vias) 203 are also formed in the interposer 200, and the wiring layer 202 on the package substrate 10 side is electrically connected to the wiring layer 201 on the opposite side via an electrical conduction layer formed in the TGV 203. Electrical connection terminals are also formed on the wiring layer 201, and the electrical connection terminals of the wiring layer 201 are electrically connected to the semiconductor chips 501 and 502 via solder bumps 71.

[0121] An underfill 205 is filled between the interposer 200 and the package substrate 10. A capacitor 206 is disposed on the package substrate 10 side of the interposer 200. The interposer 200 is made of silicon or glass.

[0122] The optical waveguide circuit 36g is formed on the wiring layer 201 of the interposer 200. In addition, photoelectric conversion elements 281 and 282 are bonded onto the optical waveguide circuit 36g, and are arranged so that the optical signal output portion 36go of the optical waveguide circuit 36g is aligned with the optical input portions of the photoelectric conversion elements 281 and 282. The resin 46g used as the adhesive has a refractive index equivalent to that of the optical waveguide circuit 36g.

[0123] The arrangement of the photoelectric conversion elements 281 and 282, the semiconductor chips 501 and 502, and the memory chips 701 and 702 is the same as in the third embodiment. The memory chips 701 and 702 and the semiconductor chips 501 and 502 are arranged in the center of the package substrate 10 (or the interposer 200). In addition, the optical waveguide circuit 36g is removed (openings are formed) in the areas where the memory chips 701 and 702 and the semiconductor chips 501 and 502 are arranged, and the memory chips 701 and 702 and the semiconductor chips 501 and 502 are electrically connected to the interposer 200.

[0124] In this embodiment, the photoelectric conversion element 281 and the semiconductor chip 501 are connected by a bridge substrate 731, and the semiconductor chip 501 and the memory chip 701 are connected by the wiring layer 201 of the interposer 200. Similarly, the photoelectric conversion element 282 and the semiconductor chip 502 are connected by a bridge substrate 734, and the semiconductor chip 502 and the memory chip 702 are connected by the wiring layer 201 of the interposer 200.

[0125] The interposer 200 allows finer wiring to be formed than the package substrate 10, and is compatible with multi-channel communication such as HBM (High Bandwidth Memory) standardized by JEDEC.

[0126] (Alignment) The alignment method will be described with reference to FIGS. 52 to 54 . FIG. 52 is a diagram showing the location where the photoelectric conversion element 282 is arranged in the optical waveguide circuit 36b. FIG. 53 is a diagram showing a cross section taken along the line aa′ in FIG. 52 when the photoelectric conversion element 282 is arranged in the optical waveguide circuit 36g. FIG. 54 is a diagram showing a cross section taken along the line bb′ in FIG. 52 when the photoelectric conversion element 282 is arranged in the optical waveguide circuit 36g. FIG. 52 shows the optical waveguide circuit 36g arranged on the wiring layer 201 of the interposer 200. Here, region R1 indicates the location where the photoelectric conversion element 282 is arranged. Region R2 indicates the location of the optical waveguide circuit 36g where the interposer 200 is exposed. The light output portion 36go of the optical waveguide circuit 36g outputs an optical signal toward the photoelectric conversion element 282. 53, the light output portion 36go is located at a position corresponding to the light receiving portion of the photoelectric conversion element 282. Also, as shown in Fig. 54, in the portion corresponding to the region R1, a resin 46g is filled as an adhesive in the z-axis direction.

[0127] The alignment of the photoelectric conversion elements 281 and 282 with the optical waveguide circuit 36g is the same as in the third embodiment, but by partially exposing glass (if the interposer 200 is formed from glass) in a region R1 of the same size as the photoelectric conversion element 282, as shown in Figure 52, it is possible to create a difference in wettability and produce a self-alignment effect.

[0128] A chamber section 80 for cooling the semiconductor chips 501 and 502 and the photoelectric conversion elements 281 and 282 is bonded to the interposer 200. By measuring the temperature of the chamber 52 with a temperature sensor 81 and controlling the liquid flow, it is possible to set a stable temperature inside the chamber 52. Furthermore, by making the outlet 80o of the cooling liquid larger than the inlet 80i, it is possible to prevent a large increase in the pressure inside the chamber 52. Furthermore, the photoelectric conversion elements 281 and 282, the semiconductor chips 501 and 502, the bridge substrates 731 and 734, and the wiring layer 101 have connection terminals (electrical connection terminals), and all of the connection terminals are covered with underfill.

[0129] [Fifth Embodiment] The configuration of a fifth embodiment of the present invention will be described with reference to Fig. 55. Fig. 55 is a cross-sectional view of an example of a package structure 1h. In the following description, components that are the same as or equivalent to those in the above-described embodiments and modifications will be designated by the same reference numerals, and their description will be simplified or omitted.

[0130] In the package structure 1g of the fourth embodiment shown in Figure 51, the photoelectric conversion element and the semiconductor chip are connected by a bridge substrate, whereas the package structure 1h of the fifth embodiment differs in that electrical signals are transmitted through the wiring layer 201h of the interposer 200.

[0131] Fig. 56 is a diagram showing a location in the optical waveguide circuit 36h where the photoelectric conversion element 282 is arranged. Fig. 57 is a diagram showing a cc' cross section of Fig. 56 when the photoelectric conversion element 282 is arranged in the optical waveguide circuit 36h.

[0132] 56, an electrode 2010 is formed on the wiring layer 201h. The optical waveguide circuit 36h has a shape that does not interfere with the location where the electrode 2010 is formed.

[0133] 57 , the electrode 2010 is connected to an electrode 280, which is an electrical signal terminal of the photoelectric conversion element 282, through a solder bump 2011. Furthermore, the light output portion 36ho of the optical waveguide circuit 36h is disposed so as to correspond to the input portion 282i of the photoelectric conversion element 282. The resin 46h filled between the photoelectric conversion element 282 and the wiring layer 201h (interposer 200) has a refractive index equivalent to that of the core material (core) 360h of the optical waveguide circuit 36h.

[0134] Since the interposer 200 allows for the formation of fine wiring, the photoelectric conversion element 281 and the semiconductor chip 501 (or the photoelectric conversion element 282 and the semiconductor chip 502) can be placed close enough to each other, which not only shortens the transmission distance of the transmitted signal but also makes it possible to reduce the signal frequency by increasing the number of channels.

[0135] In this embodiment, the input section 282i of the photoelectric conversion element 282 and the electrode 280 serving as a terminal for an electrical signal are arranged on the same plane (a plane parallel to the xy plane).

[0136] When the electrode 280 as the terminal for the electrical signal and the input portion 282i for the optical signal are arranged on different surfaces as in the previous embodiments, it is possible to make a modified example in which the number of optical channels is increased by arraying (arraying optical waveguides), but depending on the number of optical communication channels, the margin of area for arranging the photoelectric conversion elements, etc., it may be more advantageous in terms of manufacturing costs to select the cases shown in Figures 55 to 57. Also, the cooling effect of this embodiment is higher than that of the modified examples.

[0137] [Sixth Embodiment] The configuration of a sixth embodiment of the present invention will be described with reference to Fig. 58. Fig. 58 is a cross-sectional view of an example of a package structure 1i. In the package structure 1i, the top plate 38 is formed of glass, and the package substrate is a glass core substrate 300. In the following description, components that are the same as or equivalent to those in the above-described embodiments and modifications are designated by the same reference numerals, and their description will be simplified or omitted.

[0138] Regarding the connection of optical signals, the package structure 1i of the sixth embodiment is configured to transmit optical signals to the photoelectric conversion elements 281 and 282 through the top plate 38 on which the optical waveguide circuit 36 ​​shown in the first embodiment (package structure 1 in FIG. 1 and package structure 1a in FIG. 3) and the second embodiment (package structure 1b in FIG. 29, package structure 1c in FIG. 36, package structure 1d in FIG. 45) is formed. Regarding the connection of the photoelectric conversion elements and the semiconductor chip, the package structure 1i is configured to connect electrical signals using the bridge substrate shown in the third embodiment (package structure 1e in FIG. 46 and package structure 1f in FIG. 50), the fourth embodiment (package structure 1g in FIG. 51), and the fifth embodiment (package structure 1h in FIG. 55).

[0139] Specifically, the semiconductor chip 501 and the memory chip 561 are connected via a bridge substrate 737, and the semiconductor chip 502 and the memory chip 562 are connected via a bridge substrate 738. The bridge substrates 737 and 738 are disposed within the chamber 52. The package structure 1i uses a glass core substrate 300. In the glass core substrate 300, wiring layers 300a and 300c are formed on a glass core 300b, and the wiring layers 300a and 300c are electrically connected via a through electrode 300d.

[0140] In the first embodiment (package structure 1 in FIG. 1 and package structure 1a in FIG. 3), the semiconductor chip and memory chip are mounted on a Si or glass interposer 12, which suppresses the effects of thermal fluctuations, making it possible to use a bridge substrate. However, to achieve higher reliability, in the sixth embodiment, the package substrate is a glass core substrate 300, which further suppresses the effects of thermal fluctuations, and a chamber 52 is formed on the glass core substrate 300. The glass core substrate 300, the semiconductor chips 501 and 502, the memory chips 561 and 562, and the glass top plate 38 all have similar CTEs, are less susceptible to thermal distortion, and have high rigidity, resulting in high reliability.

[0141] Furthermore, since the semiconductor chip 501 and the memory chip 561 are connected by the bridge substrate 737 (the semiconductor chip 502 and the memory chip 562 are connected by the bridge substrate 738), there is an advantage in that an interposer is not required and there is no need to form fine wiring on the glass core substrate 300, which is the package substrate. Note that instead of the glass core substrate 300, it is also possible to use a ceramic substrate in which ceramic is applied to the glass core 300b.

[0142] [Actions and Effects] In the present disclosure, as a method for introducing optical communication into a package structure, a cooling chamber is formed by a frame body and a top plate, an optical waveguide circuit and a connector for an optical cable from the outside are arranged on the top plate, an optical signal is connected from the optical fiber to the optical waveguide circuit, and an optical connection is made from the optical waveguide circuit on the top plate to a photoelectric conversion element in the chamber (first embodiment (package structure 1 in FIG. 1 , package structure 1a in FIG. 3 ), second embodiment (package structure 1b in FIG. 29 , package structure 1c in FIG. 36 , package structure 1d in FIG. 45 ), sixth embodiment (package structure 1i in FIG. 58 )).

[0143] In this structure, by using a glass substrate for the package substrate or interposer and a glass substrate for the top plate, the effects of thermal expansion can be suppressed, improving the placement accuracy of the semiconductor chip, photoelectric conversion element (circuit), and optical waveguide circuit, and also resolving the issue of optical axis alignment accuracy.

[0144] Furthermore, by three-dimensionally mounting semiconductor chips such as processors and photoelectric conversion elements as chip-on-chips, it is possible to shorten the transmission distance of electrical signals.

[0145] Because the photoelectric conversion element is smaller than the processor's semiconductor chip, even if the photoelectric conversion element is placed together with the semiconductor chip in the chamber, the surface of the semiconductor chip can be in direct contact with the coolant, and sufficient cooling efficiency can be ensured even when the connection terminals of the photoelectric conversion element and semiconductor chip are covered with underfill.

[0146] As another method, a wiring board on which an optical waveguide circuit is formed is connected to a package substrate, a photoelectric conversion element is positioned so as to align with the optical input / output portion of the optical waveguide circuit, and a semiconductor chip is mounted adjacent to the photoelectric conversion element (third embodiment (package structure 1e in FIG. 46), fourth embodiment (package structure 1g in FIG. 51), fifth embodiment (package structure 1h in FIG. 55)).

[0147] This method improves the accuracy of optical axis alignment by mounting the photoelectric conversion elements individually and directly onto the optical waveguide circuit. While some recent mounting equipment is capable of mounting with an alignment accuracy of a few microns, it is also possible to apply a method of aligning the optical axis with high accuracy using self-alignment. The self-alignment method involves forming an optical waveguide circuit on a glass substrate, partially exposing the glass where the photoelectric conversion element will be mounted, and then using the surface tension of the adhesive resin to create a self-alignment effect, which is then cured.

[0148] Furthermore, the transmission distance of electrical signals can be shortened by using a bridge substrate that connects adjacent semiconductor chips and photoelectric conversion elements to the connection terminals on the side opposite the package substrate of the semiconductor chip and photoelectric conversion element so that the connection spans the semiconductor chip and the photoelectric conversion element. Furthermore, by stabilizing the temperature of the package using liquid cooling, high reliability can be ensured even when the bridge substrate connection is on the side opposite the package substrate of the semiconductor chip.

[0149] As described above, the present disclosure enables a reduction in the transmission distance of electrical signals, and enables high-speed communication and high integration or high speed of semiconductor chips. Furthermore, by combining liquid flow cooling with an optical waveguide circuit arrangement, it is possible to arrange heat-sensitive photoelectric conversion elements in the vicinity of semiconductor chips. Furthermore, it is possible to reduce the transmission distance of electrical signals after photoelectric conversion, enabling efficient communication of high-frequency signals.

[0150] In particular, a structure in which an optical waveguide circuit is placed on the top plate of the liquid-cooled chamber allows signals to be exchanged from the top, on the opposite side of the package substrate, and is compatible with a variety of semiconductor chip arrangements and stacking structures. This allows for more efficient design with fewer restrictions on the optical waveguide circuit. Furthermore, a structure that uses a bridge structure to connect the semiconductor chip and photoelectric conversion element on the opposite side of the package substrate can improve yield rates by connecting the semiconductor chip and other components after they have been mounted on the package substrate.

[0151] [Seventh Embodiment] (Configuration) The configuration of a seventh embodiment of the present invention will be described with reference to Figures 59 and 60. Figure 59 is a cross-sectional view of an example of a package structure 1j. The package structure 1j of the seventh embodiment differs from the package structure 1 of the first embodiment in that a functional layer 400 is disposed between the optical waveguide circuit 36 ​​and the top plate 38, and a functional layer 500 is disposed on the surface of the optical waveguide circuit 36 ​​opposite to the surface facing the top plate 38 (the surface facing the chamber 52). In the following description, components that are the same as or equivalent to those in the above-described embodiments and modifications are designated by the same reference numerals, and their description will be simplified or omitted.

[0152] 59, the functional layer 400 is disposed, for example, on the entire surface of the top plate 38. Similarly, the functional layer 500 is disposed, for example, on the entire surface of the optical waveguide circuit 36.

[0153] 60 is an enlarged view of the package structure 1j showing the photoelectric conversion element 28. The functional layer 500 has an opening 500o through which an optical signal output from the light output portion 36o of the optical waveguide circuit 36 ​​passes.

[0154] (Functional Layer) The functional layer 400 is formed of a material (for example, a resin material) that has a light-absorbing function or an adhesive function.

[0155] For example, if the functional layer 400 is formed of a material that absorbs the wavelength of the optical signal used in the optical waveguide circuit 36, it is possible to prevent light from entering the optical waveguide circuit 36 ​​from outside the package structure 1j, thereby preventing a decrease in communication quality. By limiting the wavelengths absorbed by the functional layer 400, it is possible to minimize the effects on the alignment (bonding and fixing of the top plate 38 and the frame 34) of the input / output unit 36o of the optical waveguide circuit 36 ​​and the input / output unit 28i of the photoelectric conversion element 28, as well as on the hardening of the adhesive 44. Furthermore, if the functional layer 400 is formed of a material that enhances adhesion between the top plate 38 and the optical waveguide circuit 36, it is possible to improve the structural reliability of the package structure 1j.

[0156] The functional layer 500 is formed of, for example, a material having adhesive properties, flexibility, and impact resistance, or a member having resistance to coolant (for example, a resin material).

[0157] For example, if the functional layer 500 is formed of a material that has wettability that allows the adhesive 44 to adhere to the frame 34, the airtightness of the chamber 52 can be improved and the structural reliability of the package structure 1j can be improved. Furthermore, if the functional layer 500 is formed of a flexible and impact-resistant material, stress and impact with the frame 34 can be reduced, and peeling between the functional layer 400 and the top plate 38 and peeling at the interfaces of each layer can be suppressed, thereby improving reliability. Furthermore, if the functional layer 500 is formed of a coolant-resistant material, direct contact with the coolant is prevented from the optical waveguide circuit 36, preventing corrosion and chemical damage and improving durability.

[0158] (Forming Method in the Case Where a Functional Layer is Present) Modifications of the first method for forming an optical waveguide circuit in the first embodiment (FIGS. 6 to 11) will be described.

[0159] FIG. 61 shows a case where a functional layer, a core material 360, and a clad material 362 are arranged on a glass substrate that serves as a top plate. A functional layer 400 is first formed on the top plate 38. If the functional layer 400 does not transmit the alignment light used to bond and secure the top plate 38 to the frame 34, or the light used to harden the adhesive 44, openings must be formed to allow the introduction of alignment light and light used to harden the adhesive 44 when bonding the top plate 38 to the frame 34. If the functional layer 400 is made of a photosensitive material, the material is applied to the top plate 38 and exposed to light, taking into account the locations where the openings will be formed. Development and hardening are then performed to form the functional layer 400 with openings. On the other hand, if the functional layer 400 is made of a non-photosensitive material, the material is applied to the top plate 38 and hardened. A resist is applied, exposed to light, and developed, taking into account the locations where the openings will be formed. Etching is performed to remove the material in the locations where the openings will be formed. The resist is then removed to form the functional layer 400 with openings.

[0160] Next, Figure 62 is a diagram showing the case where a resist for forming a mirror is formed. Resist 364 is applied onto a functional layer 500 formed on a clad material 362. The functional layer 500 and clad material 362 are subjected to the same processes as those shown in Figures 8 to 11 to form a mirror. On the other hand, if the functional layer 500 is formed from a photosensitive material, an opening 500o in the mirror formation portion as shown in Figure 60 may be formed by a coating, exposure, and development process after the core and clad mirrors are formed.

[0161] [Modification of Seventh Embodiment] The configuration of a modification of the seventh embodiment will be described with reference to Figures 63 to 65. Figures 63 to 65 are enlarged views showing a portion of the package structure that includes the photoelectric conversion element 28. In the following description, components that are the same as or equivalent to those in the seventh embodiment described above will be assigned the same reference numerals, and their description will be simplified or omitted.

[0162] The arrangement of the functional layer is not limited to that of the seventh embodiment, and other arrangements are also possible. Fig. 63 shows a case in which the functional layer 400 is omitted from the package structure 1j. Fig. 64 shows a case in which the functional layer 500 is omitted from the package structure 1j. As shown in Figs. 63 and 64, the functional layer can be formed either between the top plate 38 and the optical waveguide circuit 36 ​​or on the chamber 52 side of the optical waveguide circuit 36.

[0163] 65 shows a case where functional layers 401 and 501 are further added to package structure 1j. For example, it is conceivable that functional layer 401 has the function of ensuring adhesion to top plate 38, functional layer 400 has the function of absorbing light, substrate 500 has the function of absorbing light, and substrate 501 has the function of being resistant to coolant. As a result, it is possible to reduce the risk of failure of the package structure and improve reliability and durability.

[0164] Although the above embodiment shows a case where two functional layers are disposed on each side of the optical waveguide circuit 36, the present disclosure is not limited to this case. For example, if sufficient adhesion can be ensured between the top plate 38 and the frame 34, the functional layer 401 may be omitted.

[0165] Furthermore, if a functional layer can be omitted, it need not be arranged, or a number of functional layers other than two may be arranged. For example, with reference to FIG. 65 , the following combinations of functional layers may be used. (First Pattern) The functional layer 401 has the function of ensuring adhesion between the top plate 38 and the optical waveguide circuit 36, the functional layer 400 has the function of absorbing light, and the functional layer 500 has the function of providing coolant resistance. The functional layer 501 is not arranged. (Second Pattern) The functional layer 401 is not arranged. The functional layer 400 has the function of ensuring adhesion between the top plate 38 and the optical waveguide circuit 36, and the functional layer 500 has the function of absorbing light. The functional layer 501 is not arranged. (Third Pattern) The functional layer 401 is not arranged. The functional layer 400 has the function of absorbing light, and the functional layer 500 has the function of providing coolant resistance. The functional layer 501 is not arranged. (Fourth Pattern) The functional layers 401 and 400 are not disposed. The functional layer 500 is provided with a light absorbing function. The functional layer 501 is not disposed.

[0166] In addition, although the functional layer has been described as having any one of a light absorbing function, an adhesive function, a stress and shock absorbing function, and a coolant resistance, other functions may be imparted to the functional layer. Furthermore, the functions imparted to the functional layer on one side and the functional layer on the other side of the optical waveguide circuit 36 ​​are not limited to those described above, and can be set as appropriate.

[0167] The configuration in which functional layers are disposed between the top plate 38 and the optical waveguide circuit 36 ​​and on the chamber 52 side of the optical waveguide circuit 36 ​​as in the seventh embodiment can also be applied to the first embodiment (package structure 1 in FIG. 1 and package structure 1a in FIG. 3) and the sixth embodiment (package structure 1i in FIG. 58). Even when the optical waveguide circuit is formed outside the package structure as in the second embodiment (package structure 1b in FIG. 29, package structure 1c in FIG. 36, and package structure 1d in FIG. 45), functional layers can be disposed between the optical waveguide circuit and the top plate and on the side of the optical waveguide circuit opposite to the top plate side.

[0168] Eighth Embodiment (Configuration) The configuration of an eighth embodiment of the present invention will be described with reference to Fig. 66. Fig. 66 is a cross-sectional view of an example of a package structure 1k. The package structure 1k of the eighth embodiment differs from the package structure 1e of the third embodiment in that a functional layer 600 is disposed between the optical waveguide circuit 36e and the package substrate 10, and a functional layer 700 is disposed on the surface of the optical waveguide circuit 36e facing the chamber 52. In the following description, components that are the same as or equivalent to those in the above-described embodiments and modifications are designated by the same reference numerals, and their description will be simplified or omitted.

[0169] The functional layer 600 has a size similar to that of the optical waveguide circuit 36e, and the functional layer 700 also has a size similar to that of the optical waveguide circuit 36e.

[0170] (Functional Layer) The functional layer 600 is formed of, for example, a material having an adhesive function (for example, a resin material). When the functional layer 600 is formed of a material that enhances the adhesiveness between the package substrate 10 and the optical waveguide circuit 36e, the structural reliability of the package structure 1k can be improved.

[0171] Furthermore, the functional layer 700 is formed from, for example, a material having adhesive properties, or a material having flexibility and impact resistance, or a material having resistance to coolant, or a material that absorbs the wavelength of the optical signal used in the optical waveguide circuit 36e, or a material that can withstand deterioration factors from the external environment (for example, a resin material).

[0172] For example, if the functional layer 700 is formed of a material that has wettability that allows the resin 46e to adhere to the photoelectric conversion element 281, the photoelectric conversion element 281 can be fixed to the package substrate 10, improving the stability of optical signal connection and the structural reliability of the package structure 1k. Furthermore, if the functional layer 700 is formed of a material that adheres the chamber portion 80, the airtightness of the chamber 80 can be improved and the structural reliability of the package structure 1j can be improved. Furthermore, if the functional layer 700 is formed of a flexible and impact-resistant material, stress and impact with the chamber portion 80 can be reduced, preventing peeling between the functional layer 600 and the package substrate 10 and peeling at the interfaces between the layers, thereby improving reliability. Furthermore, if the functional layer 700 is formed of a coolant-resistant material, direct contact with the coolant is avoided, preventing corrosion and chemical damage and improving durability. Furthermore, if the functional layer 700 is formed of a material that absorbs the wavelength of the optical signal used in the optical waveguide circuit 36 ​​e, it is possible to prevent light from entering the optical waveguide circuit 36 ​​e from the outside of the package structure 1 k and thereby prevent a decrease in communication quality. Furthermore, if the functional layer 700 is formed of a material that can withstand deterioration factors from the external environment (such as friction, outside air, and light), it is possible to protect the optical waveguide circuit 36 ​​e from deterioration factors from the external environment and improve reliability.

[0173] (Formation Method When Functional Layer Is Included) The functional layer 600 is formed before the semiconductor chips 501 and 502, memory chips 701 and 702, photoelectric conversion elements 281 and 282, etc. are arranged on the package substrate 10. When the functional layer 600 is formed of a photosensitive material, the material is applied to the package substrate 10 and exposed to light, taking into account the area where the optical waveguide circuit 36e will be formed. After development and curing, the functional layer 600 is formed with openings corresponding to the areas where the semiconductor chips 501 and 502, memory chips 701 and 702, etc. will be arranged. On the other hand, when the functional layer 600 is formed of a material that is not photosensitive, the material is applied to the package substrate 10 and cured. A resist is applied, exposed to light, and developed, taking into account the area where the optical waveguide circuit 36e will be formed. Etching is performed to remove the material in the area where the opening will be formed. The resist is then removed, forming the functional layer 400 with an opening. Note that the openings in the optical waveguide circuit 36e and the openings in the functional layer 400 may be formed simultaneously by etching.

[0174] The functional layer 700 is formed after the optical waveguide circuit 36e is disposed. When the functional layer 700 is formed from a photosensitive material, the material is applied to the package substrate 10, the optical waveguide circuit 36e, and its opening, and exposed to light, taking into account the area where the optical waveguide circuit 36e will be formed. The material is developed and hardened to form the functional layer 700. The opening in the functional layer 700 at the light output portion 36eo of the optical waveguide circuit 36e is formed so as not to interfere with the alignment of the optical waveguide circuit 36e with the photoelectric conversion elements 281 and 282. On the other hand, when the functional layer 700 is formed from a material that is not photosensitive, the material is applied to the package substrate 10, the optical waveguide circuit 36e, and its opening, and then hardened. A resist is applied, and the material is exposed to light, taking into account the area where the optical waveguide circuit 36e will be formed and the light output portion 36eo of the optical waveguide circuit 36e, and then developed. Unnecessary portions of the material applied to the package substrate 10 are removed by etching. The resist is removed to form the functional layer 700 having an opening. Alternatively, before forming the opening in the optical waveguide circuit 36e, the functional layer 700 may be formed on the optical waveguide circuit 36e, a resist may be applied thereon, exposed and developed, and the optical waveguide circuit 36e and the functional film 700 may be simultaneously etched to form openings in areas where the semiconductor chips 501 and 502, the memory chips 701 and 702, etc. are to be arranged, openings for forming a mirror for the light output portion 36eo of the optical waveguide circuit 36e, or openings that are structures for aligning the optical waveguide circuit 36e with the photoelectric conversion elements 281 and 282.

[0175] The other steps are the same as those for forming the package structure 1e in FIG.

[0176] Although the above description illustrates a case in which one functional layer is disposed on each side of the optical waveguide circuit 36e, the present disclosure is not limited to this case. For example, the number of functional layers may be two or more, and the number of functional layers disposed between the optical waveguide circuit 36e and the package substrate 10 may be different from the number of functional layers disposed on the surface of the optical waveguide circuit 36e facing the chamber 52. Furthermore, the above description illustrates a case in which the functional layer has the same size as the optical waveguide circuit 36e in the yz plane, but the size of the functional layer may be set as appropriate.

[0177] In addition, although the functional layer has been described as having any of the functions of absorbing light, adhering, buffering stress and impact, being resistant to coolant, absorbing light of the wavelength of the optical signal, and enduring deterioration factors from the external environment (abrasion, outside air, light, etc.), other functions may also be imparted to the functional layer. Furthermore, the functions imparted to the functional layer on one side and the functional layer on the other side of the optical waveguide circuit 36e are not limited to those described above and can be set as appropriate.

[0178] In addition, the configuration in which a functional layer is disposed between the package substrate 10 and the optical waveguide circuit 36e and on the chamber 52 side of the optical waveguide circuit 36e, as in the eighth embodiment, can also be applied to the third embodiment (package structure 1e in Figure 46), the fourth embodiment (package structure 1g in Figure 51), and the fifth embodiment (package structure 1h in Figure 55).

[0179] Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and various modifications are possible within the scope of the gist of the present invention.

[0180] The following are some possible aspects of the present invention, but the present invention is not limited to these. (Aspect 1) A package structure comprising: a package substrate; a chamber including the package substrate, a frame, and a top plate; the frame having an inlet and / or an outlet for a coolant; a semiconductor chip and a photoelectric conversion element disposed in the chamber; and the photoelectric conversion element connected to an optical waveguide circuit formed on the top plate. (Aspect 2) The package structure according to Aspect 1, wherein the optical waveguide circuit is a first optical waveguide circuit formed near the surface of the top plate that contacts the frame; and the top plate is formed of a light-transmitting material. (Aspect 3) The package structure according to Aspect 1 or Aspect 2, characterized in that the optical waveguide circuit is a second optical waveguide circuit formed near the surface of the top plate opposite to the surface that contacts the frame body, the top plate is formed of a light-transmitting material and has through holes formed therethrough that penetrate both surfaces, the through holes are filled with a resin having a refractive index equivalent to that of a material that forms a core of the second optical waveguide circuit, and the photoelectric conversion element is connected to the second optical waveguide circuit via the through holes. (Aspect 4) The package structure according to any one of Aspects 1 to 3, wherein the top plate includes, as the optical waveguide circuits, a first optical waveguide circuit formed near a surface of the top plate that contacts the frame and a second optical waveguide circuit formed near a surface of the top plate opposite to the surface that contacts the frame, the top plate is formed of a light-transmitting member and has through holes formed therethrough, the through holes are filled with a resin having a refractive index equivalent to that of a material forming a core of the first optical waveguide circuit and a material forming a core of the second optical waveguide circuit, the photoelectric conversion element is connected to the first optical waveguide circuit, and the first optical waveguide circuit is connected to the second optical waveguide circuit via the through hole. (Aspect 5) The package structure according to any one of Aspects 1 to 4, wherein an adhesive that bonds the frame and the top plate is a photosensitive curing resin.(Aspect 6) A package structure according to any one of Aspects 1 to 5, characterized in that the connection portion between the first optical waveguide circuit and the photoelectric conversion element is formed from a resin having a refractive index equivalent to that of a material forming a core of the first optical waveguide circuit. (Aspect 7) The package structure according to any one of Aspects 1 to 6, wherein the top plate is formed of a light-transmitting member, the optical waveguide circuit is a third optical waveguide circuit formed near a surface of the top plate opposite to the surface that contacts the frame, an electrical wiring layer is formed on the third optical waveguide circuit, the electrical wiring layer is electrically connected to the package substrate by wire wiring or a flexible substrate and has a first opening that exposes the third optical waveguide circuit, an optical component is mounted on the electrical wiring layer and is electrically connected to the electrical wiring layer and connects to the third optical waveguide circuit exposed in the first opening of the electrical wiring layer, the top plate has through holes formed therethrough from both sides, the through holes are filled with a resin having a refractive index equivalent to that of a material forming a core of the third optical waveguide circuit, and the optical component and the photoelectric conversion element are connected via the through holes and the third optical waveguide circuit. (Aspect 8) The package structure according to any one of Aspects 1 to 7, wherein the optical component is an optical switch device. (Aspect 9) The package structure according to any one of Aspects 1 to 8, wherein the top plate further includes a fourth optical waveguide circuit formed near a surface of the top plate that contacts the frame, the fourth optical waveguide circuit being connected to the third optical waveguide circuit via the through hole, and the optical component and the photoelectric conversion element being connected via the through hole, the third optical waveguide circuit, and the fourth optical waveguide circuit. (Aspect 10) The package structure according to any one of Aspects 1 to 9, wherein the electrical wiring layer, when placed on the third optical waveguide circuit, has a second opening that exposes one or more of a location where the frame and the top plate are bonded, a location where the photoelectric conversion element is disposed, and a location where an alignment mark is disposed.(Aspect 11) The package structure according to any one of Aspects 1 to 10, wherein the package structure includes an interposer disposed on the package substrate, the semiconductor chip and the photoelectric conversion element are mounted on the interposer, the top plate is formed of glass, and the interposer is formed of silicon or glass. (Aspect 12) The package structure according to any one of Aspects 1 to 10, wherein the top plate is formed of glass, and the package substrate is a glass core substrate. (Aspect 13) The package structure according to any one of Aspects 1 to 12, wherein the semiconductor chip and the photoelectric conversion element are disposed on the package substrate, and further comprising, within the chamber, a bridge substrate connecting the semiconductor chip and the photoelectric conversion element from a side of the semiconductor chip and the photoelectric conversion element opposite to a side of the semiconductor chip and the photoelectric conversion element that contacts the package substrate. (Aspect 14) The package structure according to any one of Aspects 1 to 13, wherein the semiconductor chips are a plurality of semiconductor chips arranged on the package substrate, and further comprising a bridge substrate in the chamber that connects the plurality of semiconductor chips to each other from a side of each of the semiconductor chips opposite to a side that contacts the package substrate. (Aspect 15) A circulation system that introduces a coolant into the package structure according to any one of Aspects 1 to 14, comprising: a pump connected to the outlet that discharges the coolant from the chamber and generates a liquid flow toward the inlet; and a controller that monitors the temperature of the chamber and controls the flow rate of the liquid flow and the temperature of the coolant in accordance with the monitored temperature, wherein the outlet has a cross-sectional area with respect to the liquid flow that is larger than that of the inlet. (Aspect 16) An optoelectronic integrated device characterized in that a chamber including a package substrate, a frame, and a top plate is arranged on a package substrate, the frame having an inlet and / or an outlet for a coolant, a semiconductor chip and a photoelectric conversion element are arranged in the chamber, and the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate.

[0181] The present disclosure also includes the following first aspect. [First Aspect (Optical Waveguide on Substrate)] (Aspect 1A) A package structure characterized by having an optical waveguide circuit formed on a package substrate, a cooling chamber equipped with a coolant inlet and outlet, and containing a semiconductor chip and a photoelectric conversion element. (Aspect 2A) The photoelectric conversion element has an optical connection portion arranged on one side and an electrical connection terminal arranged on the opposite side, and is attached adjacent to the semiconductor chip with the optical connection portion facing the package substrate to optically connect to the optical waveguide, the semiconductor chip also having an electrical connection terminal on the opposite side from the package substrate while electrically connected to the electrical terminal of the package substrate, and the adjacent photoelectric conversion element and semiconductor chip are connected by a bridge substrate at the electrical terminals on the side opposite the package substrate. (Aspect 3A) A cooling method described in Aspect 1A or Aspect 2A, characterized by monitoring the temperature of the chamber or the liquid within the chamber and controlling the flow and temperature of the supplied coolant to stabilize the internal temperature. (Aspect 4A) The package structure according to any one of Aspects 1A to 3A, wherein the adhesive that bonds the photoelectric conversion element to the package substrate has a refractive index equivalent to that of the core of the optical waveguide after curing. (Aspect 5A) The package structure according to any one of Aspects 1A to 4A, wherein a metal film is formed on the surface of the package substrate to which the photoelectric conversion element is attached in an area equivalent in size to the photoelectric conversion element, excluding the optical connection portion, and a cured adhesive is sandwiched between the metal film and the photoelectric conversion element. (Aspect 6A) The package structure according to any one of Aspects 1A to 5A, wherein multiple semiconductor chips electrically connected to the same substrate are electrically connected on the side opposite the substrate by a bridge substrate.

[0182] The present disclosure also includes the following second aspect. [Second Aspect (Optical Waveguide on Substrate)] (Aspect 1B) A package structure characterized by an optical waveguide circuit formed on a package substrate with a glass core, a cooling chamber equipped with a coolant inlet and outlet, and containing a semiconductor chip and a photoelectric conversion element. (Aspect 2B) The photoelectric conversion element has an optical connection portion arranged on one side and an electrical connection terminal arranged on the opposite side, and is attached adjacent to the semiconductor chip with the optical connection portion facing the package substrate to optically connect to the optical waveguide, the semiconductor chip also having an electrical connection terminal on the opposite side from the package substrate while electrically connected to the electrical terminal of the package substrate, and adjacent photoelectric conversion elements and semiconductor chips are connected by a bridge substrate at the electrical terminals on the side opposite the package substrate. (Aspect 3B) A cooling method according to Aspect 1B or Aspect 2B, characterized by monitoring the temperature of the chamber or the liquid within the chamber and controlling the flow and temperature of the supplied coolant to stabilize the internal temperature. (Aspect 4B) The package structure according to any one of Aspects 1B to 3B, wherein the adhesive that bonds the photoelectric conversion element to the package substrate has a refractive index equivalent to that of the core of the optical waveguide after curing. (Aspect 5B) The package structure according to any one of Aspects 1B to 4B, wherein a metal film is formed on the surface of the package substrate to which the photoelectric conversion element is attached in an area equivalent in size to the photoelectric conversion element, excluding the optical connection portion, and a cured adhesive is sandwiched between the metal film and the photoelectric conversion element. (Aspect 6B) The package structure according to any one of Aspects 1B to 5B, wherein multiple semiconductor chips electrically connected to the same substrate are electrically connected on the surface opposite the substrate by a bridge substrate.

[0183] The present disclosure also includes the following third aspect. [Third Aspect] (Aspect 1C) A package structure comprising: a chamber having an inlet and an outlet for a coolant disposed on a package substrate or an interposer; the chamber contains a semiconductor chip and a photoelectric conversion element; and an optical signal connected to the photoelectric conversion element is connected through an optical waveguide circuit formed on the package substrate or interposer. (Aspect 2C) The package structure according to Aspect 1C, wherein the photoelectric conversion element has an optical connection portion disposed on one side and an electrical connection terminal disposed on the opposite side, the optical connection portion facing the package substrate for optical connection to the optical waveguide and adjacent to the semiconductor chip; the semiconductor chip has an electrical connection terminal on the opposite side to the package substrate while being electrically connected to the electrical terminal of the package substrate or interposer; and the electrical terminals on the side opposite to the package substrate of the adjacent photoelectric conversion element and semiconductor chip are connected by a bridge substrate. (Aspect 3C) The package structure according to Aspect 1C or Aspect 2C, characterized in that there is no optical waveguide circuit layer on the surface of the package substrate or interposer that overlaps the semiconductor chip. (Aspect 4C) The package structure according to any one of Aspects 1C to 3C, characterized in that a metal film equivalent to that of the photoelectric conversion element is formed on the surface of the optical waveguide layer on which the photoelectric conversion element is to be installed, and the photoelectric conversion element is installed on the metal film with a transparent resin having a refractive index equivalent to that of the optical waveguide core sandwiched therebetween. (Aspect 5C) The package structure according to any one of Aspects 1C to 4C, characterized in that the core of the package substrate or interposer on which the photoelectric conversion element is to be installed is made of a glass material, and portions of the optical waveguide layer and the electrical wiring layer at the location where the photoelectric conversion element is to be installed are removed evenly relative to the arrangement of the photoelectric conversion element to expose the glass surface, and the photoelectric conversion element is installed on top of that with a transparent resin having a refractive index equivalent to that of the optical waveguide core sandwiched therebetween.(Aspect 6C) A package structure characterized in that multiple semiconductor chips are contained within a chamber equipped with an inlet and outlet for a cooling liquid, which is installed on a package substrate or an interposer, and each of the semiconductor chips is arranged adjacent to each other while electrically connected to the electrical terminals of the package substrate or interposer, each of the semiconductor chips also has an electrical connection terminal on the opposite side of the package substrate, and adjacent semiconductor chips are electrically connected to each other by a bridge substrate that connects to the electrical terminals on the opposite side of the package substrate.

[0184] REFERENCE SIGNS LIST 1, 1a to 1k...Package structure, 10...Package substrate, 12, 200...Interposer, 16, 26, 28, 28a, 28b, 28c, 281, 282, 28L...Photoelectric conversion element, 34...Frame body, 36, 36a, 36b, 36c, 36c1, 36c2, 36d, 36e, 36g, 36h, 36eL, 361, 362...Optical waveguide circuit, 38...Top plate, 50, 501, 502...Semiconductor chip, 52...Chamber, 300...Glass core substrate, 611, 612...Optical component, 731 to 738...Bridge substrate, 80...Chamber portion, 400, 401, 500, 501...Functional layer

Claims

1. A package structure characterized in that a chamber surrounded by the package substrate, a frame, and a top plate is placed on a package substrate, a connector for introducing an optical signal is placed on the top plate and outside the chamber, the frame has an inlet and / or an outlet for a coolant, a semiconductor chip and a photoelectric conversion element are placed within the chamber, and the photoelectric conversion element is connected to an optical waveguide circuit formed on the top plate and for propagating the optical signal introduced from the connector.

2. The package structure according to claim 1, wherein the optical waveguide circuit is a first optical waveguide circuit formed on the surface of the top plate that contacts the frame, and the top plate is made of a light-transmitting material.

3. The package structure according to claim 1, wherein the optical waveguide circuit is a second optical waveguide circuit formed in the vicinity of the surface of the top plate opposite to the surface that contacts the frame body, the top plate is formed of a light-transmitting material and has through holes formed therethrough that penetrate both surfaces, the through holes are filled with a resin having a refractive index equivalent to that of a material that forms the core of the second optical waveguide circuit, and the photoelectric conversion element is connected to the second optical waveguide circuit via the through holes.

4. The package structure according to claim 1, wherein the top plate is provided with, as the optical waveguide circuits, a first optical waveguide circuit formed near the surface of the top plate that contacts the frame body and a second optical waveguide circuit formed near the surface of the top plate opposite to the surface that contacts the frame body, the top plate is formed of a light-transmitting member and has through holes formed therethrough that pass through both sides thereof, the through holes are filled with a resin having a refractive index equivalent to that of a member that forms a core of the first optical waveguide circuit and a member that forms a core of the second optical waveguide circuit, the photoelectric conversion element is connected to the first optical waveguide circuit, and the first optical waveguide circuit is connected to the second optical waveguide circuit via the through holes.

5. The package structure according to claim 2, wherein the adhesive for bonding the frame and the top plate is a photosensitive curing resin.

6. The package structure according to claim 2, wherein the connection portion between the first optical waveguide circuit and the photoelectric conversion element is formed from a resin having a refractive index equivalent to that of the material forming the core of the first optical waveguide circuit.

7. The package structure according to claim 1, wherein the top plate is formed of a translucent material, the optical waveguide circuit is a third optical waveguide circuit formed near the surface of the top plate opposite to the surface that contacts the frame body, an electrical wiring layer is formed on the third optical waveguide circuit, the electrical wiring layer is electrically connected to the package substrate by wire wiring or a flexible substrate, and has a first opening that exposes the third optical waveguide circuit, an optical component is mounted on the electrical wiring layer, the optical component is electrically connected to the electrical wiring layer, and connects to the third optical waveguide circuit exposed in the first opening of the electrical wiring layer, the top plate has through holes formed through both sides, and the through holes are filled with resin having a refractive index equivalent to that of a material that forms a core of the third optical waveguide circuit, and the optical component and the photoelectric conversion element are connected via the through holes and the third optical waveguide circuit.

8. The package structure according to claim 7, wherein the optical component is an optical switch device.

9. The package structure described in claim 7, wherein the top plate further comprises a fourth optical waveguide circuit formed near the surface of the top plate that contacts the frame body, the fourth optical waveguide circuit being connected to the third optical waveguide circuit via the through hole, and the optical component and the photoelectric conversion element being connected via the through hole, the third optical waveguide circuit, and the fourth optical waveguide circuit.

10. The package structure described in claim 7, characterized in that the electrical wiring layer has a second opening that, when placed on the third optical waveguide circuit, exposes one or more of the following locations: the location where the frame body and the top plate are bonded, the location where the photoelectric conversion element is placed, and the location where the alignment mark is placed.

11. The package structure described in claim 1, characterized in that the package structure includes an interposer arranged on the package substrate, the semiconductor chip and the photoelectric conversion element are mounted on the interposer, the top plate is formed of glass, and the interposer is formed of silicon or glass.

12. The package structure according to claim 1, wherein the top plate is made of glass, and the package substrate is a glass core substrate.

13. The package structure described in claim 1, characterized in that the semiconductor chip and the photoelectric conversion element are arranged on the package substrate, and further comprising a bridge substrate that connects the semiconductor chip and the photoelectric conversion element from the side opposite to the side of the semiconductor chip and the photoelectric conversion element that contacts the package substrate within the chamber.

14. The package structure described in claim 1, characterized in that the semiconductor chips are a plurality of semiconductor chips arranged on the package substrate, and further comprising a bridge substrate that connects the plurality of semiconductor chips to each other within the chamber from the side opposite to the side of the plurality of semiconductor chips that contacts the package substrate.

15. An electronic device system comprising the package structure of claim 1 and a circulation system for introducing a coolant into the package structure, wherein the circulation system comprises: a pump connected to the outlet for discharging the coolant from the chamber and generating a liquid flow toward the inlet; and a controller for monitoring the temperature of the chamber and controlling the flow rate of the liquid flow and the temperature of the coolant in accordance with the monitored temperature; and wherein the outlet has a larger cross-sectional area for the liquid flow than the inlet.

16. An optoelectronic integrated device comprising: a package substrate; a chamber surrounded by the package substrate, a frame, and a top plate; a connector for introducing an optical signal to the outside of the chamber on the top plate; the frame having an inlet and / or an outlet for a coolant; a semiconductor chip and an optoelectronic conversion element disposed within the chamber; and the optoelectronic conversion element connected to an optical waveguide circuit formed on the top plate and for propagating the optical signal introduced from the connector.

17. The package structure according to any one of claims 1 to 14, wherein a functional layer is disposed between the optical waveguide circuit and the top plate.

18. A package structure according to any one of claims 1 to 14, characterized in that a functional layer is disposed on the surface of the optical waveguide circuit opposite to the surface facing the top plate.

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