Semiconductor composite device and composite component

Abstract

A semiconductor composite device 10 comprises a load 20 including a semiconductor element, an inductor array 40 electrically connected to the load 20, a multi-terminal capacitor 70 having a first terminal 71 electrically connected to the load 20 and the inductor array 40 and a second terminal 72 electrically connected to ground GND, and a wiring board 60 having a first mounting surface 61, a second mounting surface 62 on the opposite side to the first mounting surface 61, and wiring layers 63, 64 electrically connected to the load 20, the inductor array 40 and the multi-terminal capacitor 70, wherein: the inductor array 40 includes a plurality of inductor wirings 44a to 44d each having a first terminal end portion 45 and a second terminal end portion 46; the multi-terminal capacitor 70 has a total of three or more first terminals 71 and second terminals 72; and the plurality of second terminal end portions 46 of the plurality of inductor wirings 44a to 44d are electrically connected to the first terminal 71 of the multi-terminal capacitor 70.

Description

Semiconductor composite devices and composite parts

[0001] The present invention relates to a semiconductor composite device and a composite part.

[0002] Patent document 1 describes an inductor-embedded substrate having a core substrate in which an opening and a first through hole are formed, a magnetic resin filled in the opening and having a second through hole, a first through-hole conductor made of a metal film formed in the first through-hole, and a second through-hole conductor made of a metal film formed in the second through-hole, wherein the magnetic resin contains magnetic particles and resin, and the metal film of the second through-hole conductor is in contact with the cut surface of the magnetic particles.

[0003] Japanese Patent Application Laid-Open No. 2021-086856

[0004] In the inductor-embedded substrate described in Patent Document 1, a first conductor layer (connection pattern) and a second conductor layer (connection pattern) connected via a second through-hole conductor formed in a magnetic resin are arranged in a helical shape (spiral shape along an axis parallel to the front and back surfaces of the core substrate) and form an inductor together with the second through-hole conductor.

[0005] However, there are cases where sufficient inductance cannot be ensured simply by passing the conductor pattern back and forth through the through hole. Also, the inductor-embedded board described in Patent Document 1 does not have an optimal power supply design that includes the capacitor, so there is a risk that the performance of the capacitor and the inductor may be reduced when the inductor is connected to the capacitor.

[0006] The present invention has been made to solve the above problems, and has as its object to provide a semiconductor composite device and composite part that can achieve high performance, miniaturization, and low parasitic components.

[0007] The semiconductor composite device of the present invention comprises: a load including a semiconductor element; an inductor array electrically connected to the load; a multi-terminal capacitor having a first terminal electrically connected to the load and the inductor array and a second terminal electrically connected to ground; and a wiring substrate having a first mounting surface, a second mounting surface opposite the first mounting surface, and a wiring layer electrically connected to the load, the inductor array, and the multi-terminal capacitor, wherein the inductor array includes a plurality of inductor wirings each having a first termination portion and a second termination portion, and the multi-terminal capacitor has a total of three or more of the first terminals and the second terminals, and the plurality of second termination portions of the plurality of inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor.

[0008] The composite component of the present invention comprises an inductor array and a multi-terminal capacitor having a first terminal electrically connected to the inductor array and a second terminal electrically connected to ground, wherein the inductor array includes a plurality of inductor wirings each having a first termination portion and a second termination portion, the multi-terminal capacitor has a total of three or more of the first terminals and second terminals, and the second termination portions of the plurality of inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor.

[0009] According to the present invention, it is possible to provide a semiconductor composite device and a composite part that can achieve high performance, miniaturization, and low parasitic components.

[0010] FIG. 1 is a block diagram showing a semiconductor composite device according to a first embodiment of the present invention. FIG. 2 is a cross-sectional view schematically showing the semiconductor composite device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view schematically showing a first variation of the semiconductor composite device according to the first embodiment of the present invention. FIG. 4 is a cross-sectional view schematically showing a second variation of the semiconductor composite device according to the first embodiment of the present invention. FIG. 5 is a cross-sectional view schematically showing a third variation of the semiconductor composite device according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view schematically showing a fourth variation of the semiconductor composite device according to the first embodiment of the present invention. FIG. 7 is a block diagram showing a semiconductor composite device according to a second embodiment of the present invention. FIG. 8 is a cross-sectional view schematically showing a semiconductor composite device according to the second embodiment of the present invention. FIG. 9 is a cross-sectional view schematically showing a first variation of the semiconductor composite device according to the second embodiment of the present invention. FIG. 10 is a cross-sectional view schematically showing a second variation of the semiconductor composite device according to the second embodiment of the present invention. FIG. 11 is a cross-sectional view schematically showing a third variation of the semiconductor composite device according to the second embodiment of the present invention. FIG. 12 is a block diagram showing a fourth variation of the semiconductor composite device according to the second embodiment of the present invention. FIG. 13 is a block diagram showing a fifth variation of the semiconductor composite device according to the second embodiment of the present invention. FIG. 14A is a cross-sectional view schematically showing a semiconductor composite device according to a third embodiment of the present invention. FIG. 14B is a cross-sectional view schematically showing a first modified example of the semiconductor composite device according to the third embodiment of the present invention. FIG. 14C is a cross-sectional view schematically showing a second modified example of the semiconductor composite device according to the third embodiment of the present invention. FIG. 14D is a cross-sectional view schematically showing a third modified example of the semiconductor composite device according to the third embodiment of the present invention. FIG. 15A is a cross-sectional view schematically showing a semiconductor composite device according to a fourth embodiment of the present invention. FIG. 15B is a cross-sectional view schematically showing a first modified example of the semiconductor composite device according to the fourth embodiment of the present invention. FIG. 15C is a cross-sectional view schematically showing a second modified example of the semiconductor composite device according to the fourth embodiment of the present invention. FIG. 16 is a cross-sectional view schematically showing a third modified example of the semiconductor composite device according to the fourth embodiment of the present invention. FIG. 17 is a cross-sectional view schematically showing a semiconductor composite device according to a fifth embodiment of the present invention. FIG. 18 is a perspective view schematically showing an example of an inductor array applicable to the present invention. FIG. 19 is a perspective view showing an internal conductor of the inductor array shown in FIG. 18 .FIG. 20 is a perspective exploded schematic view of the inductor array shown in FIG. 18. Note that FIG. 20 shows only the conductors. FIG. 21 is a perspective view schematically showing another example of an inductor array applicable to the present invention. FIG. 22 is a perspective view showing the internal conductors of the inductor array shown in FIG. 21. FIG. 23 is a perspective exploded schematic view of the inductor array shown in FIG. 21. Note that FIG. 23 shows only the conductors. FIG. 24 is a cross-sectional view schematically showing an example of an electrolytic capacitor applicable to the multi-terminal capacitor in the present invention, showing an example of a first terminal electrically connected to an anode and its periphery. FIG. 25 is a cross-sectional view schematically showing an example of an electrolytic capacitor applicable to the multi-terminal capacitor in the present invention, showing an example of a second terminal electrically connected to a cathode and its periphery.

[0011] The semiconductor composite device and composite part of the present invention will be described below. Note that the present invention is not limited to the following configurations and may be modified as appropriate within the scope of the present invention. Furthermore, a combination of multiple individual preferred configurations described below also constitutes the present invention.

[0012] The following embodiments are merely examples, and it goes without saying that partial substitution or combination of the configurations shown in different embodiments is possible. From the second embodiment onwards, descriptions of matters common to the first embodiment will be omitted, and differences will be mainly described. In particular, similar effects resulting from similar configurations will not be mentioned one after the other for each embodiment.

[0013] In the following description, when there is no need to particularly distinguish between the embodiments, they will simply be referred to as "the semiconductor composite device of the present invention" or "the composite component of the present invention."

[0014] In this specification, terms indicating the relationship between elements (e.g., "perpendicular," "parallel," "orthogonal," etc.) and terms indicating the shape of elements are not expressions that only express a strict meaning, but are expressions that also include a range of substantial equivalence, for example, a difference of about a few percent.

[0015] The drawings shown below are schematic diagrams, and the dimensions, aspect ratio, scale, etc. may differ from those of the actual product.

[0016] First Embodiment FIG. 1 is a block diagram showing a semiconductor composite apparatus according to a first embodiment of the present invention.

[0017] As shown in FIG. 1, the composite semiconductor device 10 according to the first embodiment includes a load 20, an inductor array 40, a multi-terminal capacitor 70, and a power supply 30.

[0018] The inductor array 40 is connected between the power source 30 and the load 20 and is electrically connected to the power source 30 and the load 20. That is, the power source 30 is electrically connected to the load 20 via the inductor array 40. The multi-terminal capacitor 70 is connected between the load 20 and the inductor array 40 and is electrically connected to the load 20 and the inductor array 40.

[0019] The load 20 includes a semiconductor element (not shown), and may be, for example, a semiconductor integrated circuit (IC) such as a logic operation circuit or a memory circuit.

[0020] The power supply 30 is a component that adjusts the DC voltage supplied from an external source to a predetermined voltage level suitable for the load 20, and is configured by a semiconductor integrated circuit (IC) that includes a switching element such as a semiconductor switching element and a control circuit that controls the switching element. Examples of the control circuit include an error amplifier that detects the difference between a reference voltage and an output voltage, a gate driver that drives the switching element, and an oscillation circuit that oscillates at a switching frequency.

[0021] Here, the power supply 30 includes two switching elements SW1 and SW2.

[0022] The inductor array 40 includes a plurality of inductor wirings, two in this example, 44a and 44b, each having a first termination 45 and a second termination 46. The inductor wirings 44a and 44b function as inductors L1 and L2, respectively. The inductor L1 is connected between the switching element SW1 and the load 20, and the inductor L2 is connected between the switching element SW2 and the load 20.

[0023] The inductor array 40 constitutes a coupled inductor or a multi-phase inductor. Specifically, the coupled inductor or the multi-phase inductor is constituted by inductors L1 and L2. By forming a single inductor array by configuring a coupled inductor or a multi-phase inductor using multiple inductor wirings, higher performance can be achieved in a limited space, leading to a more compact system.

[0024] The multi-terminal capacitor 70 is connected between the load 20 and the inductor array 40, and has a plurality of first terminals 71 electrically connected to the load 20 and the inductor array 40, and a plurality of second terminals 72 electrically connected to the ground GND. The multi-terminal capacitor 70 has a total of three or more first terminals 71 and second terminals 72.

[0025] Each first terminal 71 of the multi-terminal capacitor 70 corresponds to a hot terminal, and each second terminal 72 of the multi-terminal capacitor 70 corresponds to a cold terminal.

[0026] The multi-terminal capacitor 70 here includes one capacitor section 73. The capacitor section 73 functions as a capacitor C. The capacitor C is electrically connected to the inductors L1 and L2 and the load 20.

[0027] The second termination portions 46 of the inductor wirings 44 a and 44 b are electrically connected to the first terminals 71 of the multi-terminal capacitor 70. More specifically, the second termination portions 46 of the inductor wirings 44 a and 44 b are electrically connected to the first terminals 71 that are connected to the capacitor portions 73 of the multi-terminal capacitor 70.

[0028] The inductor array 40 also has a common second terminal 42 electrically connected to the second termination portions 46 of the inductor wirings 44 a and 44 b, and the common second terminal 42 of the inductor array 40 is electrically connected to a first terminal 71 of the multi-terminal capacitor 70. In detail, the second terminal 42 is electrically connected to the second termination portions 46 of the inductor wirings 44 a and 44 b, and is also electrically connected to the first terminal 71 which is connected to a capacitor portion 73 of the multi-terminal capacitor 70.

[0029] The inductor array 40 also has a plurality of first terminals 41a and 41b electrically connected to a plurality of first termination portions 45 of the plurality of inductor wirings 44a and 44b, respectively. That is, there is a one-to-one correspondence between the inductor wirings and the first terminals. The first terminals 41a and 41b are electrically connected to the power supply 30. More specifically, the first terminals 41a and 41b are electrically connected to the switching elements SW1 and SW2, respectively.

[0030] The first terminals 41a and 41b of the inductor array 40 correspond to In terminals, and the second terminal 42 of the inductor array 40 corresponds to Out terminals.

[0031] The power supply 30, the inductor array 40, and the multi-terminal capacitor 70 form a voltage control device (voltage regulator (VR)), in particular a chopper-type step-down switching regulator. The inductor array 40 and the multi-terminal capacitor 70 function as a ripple filter for the step-down switching regulator. For example, the switching regulator steps down an externally input DC voltage of 5 V to 1 V and supplies the voltage to the load 20.

[0032] Here, a single-channel power supply is configured, with switching elements SW1 and SW2, inductors L1 and L2, and a capacitor C forming one channel.

[0033] For the sake of simplicity, the multi-terminal capacitor 70 shown here is only a voltage smoothing capacitor (output capacitor) corresponding to the switching frequency of the switching element, but it may also include capacitors for decoupling purposes, such as noise suppression or short-circuiting high frequencies, that are shunt-connected to the output line, and these may be connected in parallel.

[0034] As described above, the semiconductor composite device 10 includes an inductor array 40 and a multi-terminal capacitor 70. The inductor array 40 includes a plurality of inductor wirings 44a and 44b, each having a first termination 45 and a second termination 46. The multi-terminal capacitor 70 has a total of three or more terminals, including a plurality of first terminals 71 electrically connected to the load 20 and the inductor array 40 and a plurality of second terminals 72 electrically connected to ground GND. The second terminations 46 of the plurality of inductor wirings 44a and 44b are electrically connected to the first terminal 71 of the multi-terminal capacitor 70, thereby reducing unnecessary routing of wiring. As a result, a high-performance, compact, and low-parasitic-component semiconductor composite device can be realized.

[0035] Furthermore, in the semiconductor composite device 10, the inductor array 40 has a common second terminal 42 electrically connected to the second terminations 46 of the inductor wirings 44a and 44b, and the common second terminal 42 of the inductor array 40 is electrically connected to the first terminal 71 of the multi-terminal capacitor 70. By grouping the second terminations of the inductor wirings 44a and 44b together in this manner, the volume of the inductor wirings 44a and 44b in the inductor array 40 can be increased. This can improve the performance of each inductor L1 and L2. Specifically, the DC resistance can be reduced and the inductance can be improved.

[0036] However, the inductor array 40 may have a plurality of second terminals electrically connected to the second termination portions 46 of the inductor wirings 44 a and 44 b, respectively. That is, the inductor wirings and the second terminals may correspond one-to-one.

[0037] FIG. 2 is a cross-sectional view schematically showing the semiconductor composite device according to the first embodiment of the present invention.

[0038] As shown in FIG. 2, the composite semiconductor device 10 according to the first embodiment further includes a wiring board 60 in addition to the load 20, the inductor array 40, the multi-terminal capacitor 70, and the power supply 30.

[0039] The wiring board 60 is a motherboard having a first mounting surface 61 and a second mounting surface 62 opposite to the first mounting surface 61, and the load 20 and the switching elements SW1 and SW2 of the power supply 30 are arranged on the first mounting surface 61 side. Here, the load 20 and the switching elements SW1 and SW2 are mounted on the first mounting surface 61.

[0040] A first wiring layer 63 and a second wiring layer 64 are formed on the first mounting surface 61 and the second mounting surface 62, respectively. The first wiring layer 63 and the second wiring layer 64 include terminals such as lands and pads for mounting components such as the load 20, the inductor array 40, the multi-terminal capacitor 70, and the power supply 30, as well as wiring for connecting them. The first wiring layer 63 and the second wiring layer 64 are provided on both sides of a core substrate (core layer) 65, which may include, for example, glass cloth, and the inductor array 40 and the multi-terminal capacitor 70 are embedded in a cavity penetrating the core substrate 65. The load 20, the inductor array 40, the multi-terminal capacitor 70, and the power supply 30 are electrically connected to each other via the first wiring layer 63 and / or the second wiring layer 64.

[0041] In this way, since the inductor array 40 and the multi-terminal capacitor 70 are built into the wiring board 60, particularly the core board 65, the semiconductor composite device 10 can be made smaller in size in the thickness direction.

[0042] In the semiconductor composite device of the present invention, the direction perpendicular to the first mounting surface of the wiring board is defined as the thickness direction, and the direction parallel to the first mounting surface of the wiring board is defined as the in-plane direction. Also, in the composite component of the present invention, the direction perpendicular to the first main surface of the composite component is defined as the thickness direction, and the direction parallel to the first main surface of the composite component is defined as the in-plane direction.

[0043] FIG. 3 is a cross-sectional view schematically showing a first modification of the semiconductor composite device according to the first embodiment of the present invention.

[0044] 2 and 3, the inductor wiring is not shown.

[0045] 2 and 3, in the semiconductor composite device 10 according to the first embodiment, the inductor array 40 and the multi-terminal capacitor 70 are arranged side by side in the in-plane direction, and the second terminations of the inductor wiring included in the inductor array 40 are electrically connected to the first terminals 71 of the multi-terminal capacitor 70 via only one of the first wiring layer 63 (see FIG. 3) or the second wiring layer 64 (see FIG. 2) of the wiring substrate 60. This makes it possible to more effectively reduce unnecessary routing of wiring.

[0046] 2, the second terminations of the inductor wiring included in the inductor array 40 may be electrically connected to the first terminals 71 of the multi-terminal capacitor 70 only via the second wiring layer 64 of the wiring substrate 60. This allows the first terminals and second terminals of the inductor array 40 to be arranged separately on the first mounting surface 61 side and the second mounting surface 62 side, respectively, ensuring good insulation. Furthermore, the resistance of the first through-hole portion (described later) of the first terminal 71 of the multi-terminal capacitor 70 is added in series to the capacitor C, ensuring good characteristics of the capacitor C.

[0047] More specifically, the inductor array 40 and the multi-terminal capacitor 70 are built into the wiring board 60, the inductor array 40 has second terminals 42 electrically connected to multiple second termination ends of the multiple inductor wires, the second terminals 42 of the inductor array 40 are arranged on the second mounting surface 62 side of the wiring board 60, each first terminal 71 of the multi-terminal capacitor 70 has a first external electrode portion 74 on the first mounting surface 61 side of the wiring board 60, a second external electrode portion 75 on the second mounting surface 62 side of the wiring board 60, and a first through-hole portion 76 electrically connected to the first external electrode portion 74 and the second external electrode portion 75, and the second terminal 42 of the inductor array 40 may be electrically connected to the second external electrode portion 75 of any of the first terminals 71 of the multi-terminal capacitor 70 (which may be at least one first terminal 71) via only the second wiring layer 64 of the wiring board 60.

[0048] In this case, each first terminal 41a and 41b of the inductor array 40 is provided on the surface of the inductor array 40 facing the first mounting surface 61, and the second terminal 42 of the inductor array 40 is provided on the surface of the inductor array 40 facing the second mounting surface 62.

[0049] 3, the second terminations of the inductor wirings included in the inductor array 40 may be electrically connected to the first terminals 71 of the multi-terminal capacitor 70 only via the first wiring layer 63 of the wiring substrate 60. This allows the resistance value of the first through-hole portion 76 of the first terminal 71 of the multi-terminal capacitor 70 to be reduced.

[0050] More specifically, the inductor array 40 and the multi-terminal capacitor 70 are built into the wiring board 60, the inductor array 40 has second terminals 42 electrically connected to multiple second termination ends of the multiple inductor wires, the second terminals 42 of the inductor array 40 are arranged on the first mounting surface 61 side of the wiring board 60, each first terminal 71 of the multi-terminal capacitor 70 has a first external electrode portion 74 on the first mounting surface 61 side of the wiring board 60, a second external electrode portion 75 on the second mounting surface 62 side of the wiring board 60, and a first through-hole portion 76 electrically connected to the first external electrode portion 74 and the second external electrode portion 75, and the second terminal 42 of the inductor array 40 may be electrically connected to the first external electrode portion 74 of any of the first terminals 71 of the multi-terminal capacitor 70 (which may be at least one first terminal 71) via only the first wiring layer 63 of the wiring board 60.

[0051] In this case, the first terminals 41 a and 41 b of the inductor array 40 and the second terminal 42 of the inductor array 40 are provided on the surface of the inductor array 40 on the first mounting surface 61 side.

[0052] In addition, in both the cases of Figures 2 and 3, each first terminal 71 of the multi-terminal capacitor 70 may have the first external electrode portion 74 electrically connected to the power supply input terminal of the load 20 via the first wiring layer 63 of the wiring substrate 60.

[0053] As shown in Figures 2 and 3, each second terminal 72 of the multi-terminal capacitor 70 may have a third external electrode portion 77 on the first mounting surface 61 side of the wiring board 60, a fourth external electrode portion 78 on the second mounting surface 62 side of the wiring board 60, and a second through-hole portion 79 electrically connected to the third external electrode portion 77 and the fourth external electrode portion 78.

[0054] In both the cases of FIG. 2 and FIG. 3, each of the first through-hole portions 76 and each of the second through-hole portions 79 penetrates the multi-terminal capacitor 70 in the thickness direction.

[0055] 2 and 3, each second terminal 72 of the multi-terminal capacitor 70 may have the third external electrode portion 77 electrically connected to the ground connection terminal of the load 20 via the first wiring layer 63 of the wiring board 60, and the fourth external electrode portion 78 electrically connected to the ground wiring via the second wiring layer 64 of the wiring board 60.

[0056] Furthermore, the multi-terminal capacitor 70 has one capacitor portion 73 arranged in the in-plane direction (planar arrangement).

[0057] The specific type of the multi-terminal capacitor 70 is not particularly limited, but preferably includes at least one of an electrolytic capacitor and a thin film capacitor. As the electrolytic capacitor, a solid electrolytic capacitor is preferable.

[0058] The electrolytic capacitor is preferably an electrolytic capacitor having a base material of a metal such as aluminum, and more preferably an electrolytic capacitor having a base material of aluminum or an aluminum alloy (aluminum electrolytic capacitor).

[0059] The thin film capacitor may be, for example, a silicon capacitor or a ceramic capacitor, or may be a thin film capacitor having a trench structure.

[0060] Silicon capacitors include, for example, silicon nitride (SiN), silicon dioxide (SiO ２ A thin film capacitor using hydrogen fluoride (HF) or the like can be used. A ceramic capacitor using barium titanate, for example, can be used as the ceramic capacitor.

[0061] FIG. 4 is a cross-sectional view schematically showing a second modification of the semiconductor composite device according to the first embodiment of the present invention.

[0062] As shown in FIG. 4 , in the composite semiconductor device 10 , the power supply 30 may be disposed on the second mounting surface 62 side of the wiring board 60 or may be mounted on the second mounting surface 62 .

[0063] Furthermore, when viewed from the first mounting surface 61 of the wiring board 60, at least a portion of the load 20 may overlap with the power supply 30, and the inductor array 40 and the multi-terminal capacitor 70 may be arranged on the same layer between the load 20 and the power supply 30, and their heights may be the same.

[0064] FIG. 5 is a cross-sectional view schematically showing a third modification of the semiconductor composite device according to the first embodiment of the present invention.

[0065] 5 , the semiconductor composite device 10 may include a semiconductor package 22 including a load 20 and a semiconductor package substrate 21 on which the load 20 is mounted, and the semiconductor package 22 may not include an inductor array 40 or a multi-terminal capacitor 70. The semiconductor package substrate 21 may be mounted on a first mounting surface 61 of a wiring board 60.

[0066] The semiconductor composite device 10 may also include a power supply module 32 including a power supply 30 and a power supply module substrate 31 on which the power supply 30 is mounted, and the power supply module substrate 31 may have an inductor array 40 and a multi-terminal capacitor 70 built in. The power supply module substrate 31 may then be mounted on the second mounting surface 62 of the wiring substrate 60.

[0067] FIG. 6 is a cross-sectional view schematically showing a fourth modified example of the semiconductor composite device according to the first embodiment of the present invention.

[0068] 6 , the semiconductor composite device 10 may include a semiconductor package 22 including a load 20 and a semiconductor package substrate 21 on which the load 20 is mounted, and the semiconductor package substrate 21 may include an inductor array 40 and a multi-terminal capacitor 70. The semiconductor package substrate 21 may then be mounted on a first mounting surface 61 of a wiring board 60.

[0069] The semiconductor composite device 10 may also include a power supply module 32 including a power supply 30 and a power supply module substrate 31 on which the power supply 30 is mounted, and the power supply module substrate 31 may not include the inductor array 40 and the multi-terminal capacitor 70. The power supply module substrate 31 may then be mounted on the second mounting surface 62 of the wiring substrate 60.

[0070] Second Embodiment FIG. 7 is a block diagram showing a semiconductor composite apparatus according to a second embodiment of the present invention.

[0071] As shown in FIG. 7, the semiconductor composite device 10A according to the second embodiment includes a load 20, an inductor array 40, a multi-terminal capacitor 70, and a power supply 30, similar to the semiconductor composite device 10 according to the first embodiment.

[0072] In this embodiment, the power supply 30 includes four switching elements SW1 to SW4.

[0073] The inductor array 40 also includes a plurality of inductor wirings (four in this example) 44a-44d, each having a first termination 45 and a second termination 46. The inductor wirings 44a-44d function as inductors L1-L4, respectively. The inductor L1 is connected between the switching element SW1 and the load 20, the inductor L2 is connected between the switching element SW2 and the load 20, the inductor L3 is connected between the switching element SW3 and the load 20, and the inductor L4 is connected between the switching element SW4 and the load 20.

[0074] The inductor array 40 forms a coupled inductor or a multi-phase inductor. Specifically, the inductors L1 and L2 form a coupled inductor or a multi-phase inductor, and the inductors L3 and L4 form a coupled inductor or a multi-phase inductor.

[0075] As in the first embodiment, the multi-terminal capacitor 70 is connected between the load 20 and the inductor array 40, and has a plurality of first terminals 71 electrically connected to the load 20 and the inductor array 40, and a plurality of second terminals 72 electrically connected to the ground GND. The multi-terminal capacitor 70 has a total of three or more first terminals 71 and second terminals 72.

[0076] The multi-terminal capacitor 70 is a capacitor array including a plurality of, here, two, capacitor sections 73a and 73b. The capacitor sections 73a and 73b function as capacitors C1 and C2, respectively. The capacitor C1 is electrically connected to the inductors L1 and L2 and the load 20, and the capacitor C2 is electrically connected to the inductors L3 and L4 and the load 20.

[0077] The second termination portions 46 of the inductor wirings 44a to 44d are electrically connected to a first terminal 71 of the multi-terminal capacitor 70. In particular, the second termination portions 46 of the inductor wirings 44a and 44b are electrically connected to the first terminal 71 connected to the capacitor portion 73a of the multi-terminal capacitor 70, and the second termination portions 46 of the inductor wirings 44c and 44d are electrically connected to the first terminal 71 connected to the capacitor portion 73b of the multi-terminal capacitor 70.

[0078] The inductor array 40 also has common second terminals 42a and 42b electrically connected to the second termination portions 46 of the inductor wirings 44a to 44d, and the common second terminals 42a and 42b of the inductor array 40 are electrically connected to the first terminal 71 of the multi-terminal capacitor 70. In particular, the second terminal 42a is electrically connected to the second termination portions 46 of the inductor wirings 44a and 44b, and is also electrically connected to the first terminal 71 connected to the capacitor portion 73a of the multi-terminal capacitor 70. The second terminal 42b is electrically connected to the second termination portions 46 of the inductor wirings 44c and 44d, and is also electrically connected to the first terminal 71 connected to the capacitor portion 73b of the multi-terminal capacitor 70.

[0079] The inductor array 40 also has a plurality of first terminals 41a to 41d electrically connected to the plurality of first termination portions 45 of the plurality of inductor wirings 44a to 44d, respectively. That is, there is a one-to-one correspondence between the inductor wirings and the first terminals. The first terminals 41a to 41d are electrically connected to the power supply 30. More specifically, the first terminals 41a to 41d are electrically connected to the switching elements SW1 to SW4, respectively.

[0080] In this embodiment, a multi-channel power supply is configured, with a first channel being configured by switching elements SW1 and SW2, inductors L1 and L2, and capacitor C1, and a second channel being configured by switching elements SW3 and SW4, inductors L3 and L4, and capacitor C2.

[0081] For the sake of simplicity, the multi-terminal capacitor 70 shown in FIG. 7 only illustrates a voltage smoothing capacitor (output capacitor) corresponding to the switching frequency of the switching element, but it may also include capacitors for decoupling purposes, such as noise suppression or short-circuiting high frequencies, that are shunt-connected to the output line, and these may be connected in parallel.

[0082] As described above, the semiconductor composite device 10A includes an inductor array 40 and a multi-terminal capacitor 70. The inductor array 40 includes a plurality of inductor wirings 44a-44d, each having a first termination 45 and a second termination 46. The multi-terminal capacitor 70 has a total of three or more terminals, including a plurality of first terminals 71 electrically connected to the load 20 and the inductor array 40 and a plurality of second terminals 72 electrically connected to ground GND. The second terminations 46 of the plurality of inductor wirings 44a-44d are electrically connected to the first terminal 71 of the multi-terminal capacitor 70. Therefore, as in the first embodiment, it is possible to reduce unnecessary routing of wiring. As a result, a high-performance, compact, and low-parasitic-component semiconductor composite device can be realized.

[0083] Furthermore, in the semiconductor composite device 10A, the inductor array 40 has common second terminals 42a and 42b electrically connected to the second terminations 46 of the inductor wirings 44a to 44d, and the common second terminals 42a and 42b of the inductor array 40 are electrically connected to the first terminal 71 of the multi-terminal capacitor 70. By grouping the second terminations of the inductor wirings together in this manner, the volume of the inductor wirings 44a to 44d in the inductor array 40 can be increased. This can improve the performance of each inductor L1 to L4. Specifically, the DC resistance can be reduced and the inductance can be improved.

[0084] However, the inductor array 40 may have a plurality of second terminals electrically connected to the second termination portions 46 of the inductor wirings 44a to 44d, respectively. That is, the inductor wirings and the second terminals may correspond one-to-one.

[0085] FIG. 8 is a cross-sectional view schematically showing a semiconductor composite device according to a second embodiment of the present invention.

[0086] As shown in FIG. 8, the semiconductor composite device 10A according to the second embodiment, like the semiconductor composite device 10 according to the first embodiment, further includes a wiring board 60 in addition to the load 20, the inductor array 40, the multi-terminal capacitor 70, and the power supply 30.

[0087] The wiring board 60 is a motherboard having a first mounting surface 61 and a second mounting surface 62 opposite to the first mounting surface 61, and the load 20 and the switching elements SW1 to SW4 of the power supply 30 are arranged on the first mounting surface 61 side. Here, the load 20 and the switching elements SW1 to SW4 are mounted on the first mounting surface 61.

[0088] As in the first embodiment, a first wiring layer 63 and a second wiring layer 64 are formed as wiring layers on the first mounting surface 61 and the second mounting surface 62, respectively. The inductor array 40 and the multi-terminal capacitor 70 are embedded in a cavity that penetrates the core substrate 65. The load 20, the inductor array 40, the multi-terminal capacitor 70, and the power supply 30 are electrically connected to one another via the first wiring layer 63 and / or the second wiring layer 64.

[0089] FIG. 9 is a cross-sectional view schematically showing a first modification of the semiconductor composite device according to the second embodiment of the present invention.

[0090] 8 and 9, the inductor wiring, the switching elements SW3 and SW4, and the first and second terminals of the inductor array 40 electrically connected to the switching elements SW3 and SW4 are not shown.

[0091] 8 and 9, in the semiconductor composite device 10A according to the second embodiment, similarly to the semiconductor composite device 10 according to the first embodiment, the inductor array 40 and the multi-terminal capacitor 70 are arranged side by side in the in-plane direction, and the second termination ends of the inductor wirings included in the inductor array 40 are electrically connected to the first terminals 71 of the multi-terminal capacitor 70 via only one of the first wiring layer 63 (see FIG. 9) or the second wiring layer 64 (see FIG. 8) of the wiring substrate 60. This makes it possible to more effectively reduce unnecessary routing of wiring.

[0092] 8, the second terminations of the inductor wiring included in the inductor array 40 may be electrically connected to the first terminals 71 of the multi-terminal capacitor 70 only via the second wiring layer 64 of the wiring substrate 60. This allows the first terminals and second terminals of the inductor array 40 to be arranged separately on the first mounting surface 61 side and the second mounting surface 62 side, respectively, ensuring good insulation. Furthermore, the resistance of the first through-hole portion (described later) of the first terminal 71 of the multi-terminal capacitor 70 is added in series to the capacitors C1 and C2, ensuring good characteristics of the capacitors C1 and C2.

[0093] More specifically, the inductor array 40 and the multi-terminal capacitor 70 are built into the wiring board 60, the inductor array 40 has second terminals 42a and 42b electrically connected to multiple second termination ends of the multiple inductor wires, each second terminal 42a, 42b of the inductor array 40 is arranged on the second mounting surface 62 side of the wiring board 60, each first terminal 71 of the multi-terminal capacitor 70 has a first external electrode portion 74 on the first mounting surface 61 side of the wiring board 60, a second external electrode portion 75 on the second mounting surface 62 side of the wiring board 60, and a first through-hole portion 76 electrically connected to the first external electrode portion 74 and the second external electrode portion 75, and each second terminal 42a, 42b of the inductor array 40 may be electrically connected to the second external electrode portion 75 of any of the first terminals 71 of the multi-terminal capacitor 70 (which may be at least one first terminal 71) via only the second wiring layer 64 of the wiring board 60.

[0094] In this case, each first terminal 41a to 41d of the inductor array 40 is provided on the surface of the inductor array 40 facing the first mounting surface 61, and each second terminal 42a, 42b of the inductor array 40 is provided on the surface of the inductor array 40 facing the second mounting surface 62.

[0095] 9 , the second terminations of the inductor wirings included in the inductor array 40 may be electrically connected to the first terminals 71 of the multi-terminal capacitor 70 only via the first wiring layer 63 of the wiring substrate 60. This allows the resistance value of the first through-hole portion 76 of the first terminal 71 of the multi-terminal capacitor 70 to be reduced.

[0096] More specifically, the inductor array 40 and the multi-terminal capacitor 70 are built into the wiring board 60, the inductor array 40 has second terminals 42a and 42b electrically connected to multiple second termination ends of the multiple inductor wires, each second terminal 42a, 42b of the inductor array 40 is arranged on the first mounting surface 61 side of the wiring board 60, each first terminal 71 of the multi-terminal capacitor 70 has a first external electrode portion 74 on the first mounting surface 61 side of the wiring board 60, a second external electrode portion 75 on the second mounting surface 62 side of the wiring board 60, and a first through-hole portion 76 electrically connected to the first external electrode portion 74 and the second external electrode portion 75, and each second terminal 42a, 42b of the inductor array 40 may be electrically connected to the first external electrode portion 74 of any of the first terminals 71 of the multi-terminal capacitor 70 (which may be at least one first terminal 71) via only the first wiring layer 63 of the wiring board 60.

[0097] In this case, the first terminals 41a to 41d of the inductor array 40 and the second terminals 42a and 42b of the inductor array 40 are provided on the surface of the inductor array 40 on the first mounting surface 61 side.

[0098] In addition, in both the cases of Figures 8 and 9, each first terminal 71 of the multi-terminal capacitor 70 may have the first external electrode portion 74 electrically connected to the power supply input terminal of the load 20 via the first wiring layer 63 of the wiring substrate 60.

[0099] 8 and 9, the first terminal 71 on the left side of the multi-terminal capacitor 70 may be electrically connected to the second terminal 42a of the inductor array 40, i.e., inductors L1 and L2 (see FIG. 7), and the first terminal 71 on the right side of the multi-terminal capacitor 70 may be connected to the second terminal 42b (not shown) of the inductor array 40, i.e., inductors L3 and L4 (see FIG. 7).

[0100] As shown in Figures 8 and 9, each second terminal 72 of the multi-terminal capacitor 70 may have a third external electrode portion 77 on the first mounting surface 61 side of the wiring board 60, a fourth external electrode portion 78 on the second mounting surface 62 side of the wiring board 60, and a second through-hole portion 79 electrically connected to the third external electrode portion 77 and the fourth external electrode portion 78.

[0101] In both the cases of FIG. 8 and FIG. 9, each of the first through-hole portions 76 and each of the second through-hole portions 79 penetrates the multi-terminal capacitor 70 in the thickness direction.

[0102] In addition, in both cases of Figures 8 and 9, each second terminal 72 of the multi-terminal capacitor 70 may have the third external electrode portion 77 electrically connected to the ground connection terminal of the load 20 via the first wiring layer 63 of the wiring board 60, and the fourth external electrode portion 78 electrically connected to the ground wiring via the second wiring layer 64 of the wiring board 60.

[0103] Furthermore, the multi-terminal capacitor 70 has a plurality of capacitor portions 73a and 73b arranged in the in-plane direction (planar arrangement).

[0104] 10 and 11 are cross-sectional views schematically showing a second modified example of the semiconductor composite device according to the second embodiment of the present invention, respectively.

[0105] As shown in Figures 10 and 11, the semiconductor composite device 10A may include multiple, for example, two, inductor arrays 40. In this case, the configuration (first channel) associated with inductors L1 and L2 and the configuration (second channel) associated with inductors L3 and L4 shown in Figure 7 may be provided in separate inductor arrays 40. Alternatively, the number of channels of the multi-channel power supply may be increased by providing inductors L1 to L4 in each inductor array 40 as shown in Figure 7. When the number of channels of the multi-channel power supply is increased, the number of capacitor portions, first terminals, and second terminals of the multi-terminal capacitor 70 may also be increased accordingly.

[0106] 12 and 13 are block diagrams showing a fourth and fifth modified example of the semiconductor composite apparatus according to the second embodiment of the present invention.

[0107] 12, the multi-terminal capacitor 70 may be a capacitor array including four capacitor units 73a to 73d that function as capacitors C1 to C4, respectively. The capacitors C1 and C2 are electrically connected to inductors L1 and L2 and the load 20. The common second terminal 42a of the inductor array 40 may be electrically connected to the first terminals 71 of the capacitor units 73a and 73b. The capacitors C3 and C4 are electrically connected to inductors L3 and L4 and the load 20. The common second terminal 42b of the inductor array 40 may be electrically connected to the first terminals 71 of the capacitor units 73c and 73d.

[0108] 13, the capacitor sections 73a to 73d (capacitors C1 to C4) of the multi-terminal capacitor 70 may be electrically connected to the inductors L1 to L4 and the load 20. Alternatively, the inductors L1 to L4 may be electrically connected to a common second terminal 42, and the second terminal 42 may be electrically connected to the first terminals 71 of the capacitor sections 73a to 73d. In this manner, the inductor array 40 may have a common second terminal 42 electrically connected to the second end portions of all of the inductor wirings included in the inductor array 40.

[0109] As shown in FIGS. 12 and 13, the wiring once integrated by the inductor array 40 may be divided again by a multi-terminal capacitor 70 (capacitor array).

[0110] Third Embodiment FIG. 14A is a cross-sectional view schematically showing a semiconductor composite device according to a third embodiment of the present invention.

[0111] 14A , the semiconductor composite device 10B according to the third embodiment, like the semiconductor composite device 10A according to the second embodiment (particularly Modifications 2 and 3), includes a load 20, a plurality of inductor arrays 40 (two in this case), a multi-terminal capacitor 70, and a wiring board 60, but the inductor arrays 40 and the multi-terminal capacitors 70 are arranged side by side in the thickness direction, which allows the semiconductor composite device 10A to be miniaturized in the in-plane direction.

[0112] Each inductor array 40 has one or more second terminals (Out terminals) 42 electrically connected to a plurality of second terminations (none of which are shown in FIG. 14A ) of the plurality of inductor wirings, and the one or more second terminals 42 of each inductor array 40 are arranged so as to overlap the multi-terminal capacitor 70 in the thickness direction. This makes it possible to effectively reduce the dimensions of the semiconductor composite device 10B in the in-plane direction.

[0113] FIG. 14B is a cross-sectional view schematically showing Modification 1 of the semiconductor composite device according to the third embodiment of the present invention.

[0114] 14B, one or more second terminals 42 of each inductor array 40 may be arranged so as not to overlap the multi-terminal capacitor 70 in the thickness direction. This distributes the points through which the most current flows, which is advantageous for heat dissipation.

[0115] Furthermore, the multi-terminal capacitor 70 is built into the wiring board 60, particularly the core board 65, but each inductor array 40 is mounted on the second mounting surface 62 of the wiring board 60. In other words, each inductor array 40 is not built into the wiring board 60, but is mounted on the mounting surface opposite to the mounting surface on which the load 20 is mounted.

[0116] FIG. 14C is a cross-sectional view schematically showing Modification 2 of the semiconductor composite device according to the third embodiment of the present invention.

[0117] As shown in FIG. 14C , each inductor array 40 may be mounted on the first mounting surface 61 of the wiring board 60 instead of the second mounting surface 62 .

[0118] In Figure 14C, each inductor array 40 is connected to the multi-terminal capacitor 70 via the first wiring layer 63 on the first mounting surface 61 side of the wiring board 60, but each inductor array 40 may also be connected to the multi-terminal capacitor 70 via a through-hole portion or the like inside the wiring board 60.

[0119] 14A, the area of ​​the multi-terminal capacitor 70 in the in-plane direction may be larger than the area of ​​each inductor array 40 in the in-plane direction, thereby reducing the impedance.

[0120] FIG. 14D is a cross-sectional view schematically showing Modification 3 of the semiconductor composite device according to the third embodiment of the present invention.

[0121] Conversely, as shown in Figure 14D, the area of ​​the multi-terminal capacitor 70 in the in-plane direction may be smaller than the area of ​​each inductor array 40 in the in-plane direction. Generally, the energy density of an inductor is smaller than the energy density of a capacitor, but by making the area of ​​each inductor array 40 larger than the area of ​​the multi-terminal capacitor 70 in this way, the energy density that can be handled by the system can be increased. When a current of I [A] flows through an inductor with a self-inductance of L [H], the energy U [J] stored in the inductor is expressed as U = 1 / 2 × LI ２ It is expressed as:

[0122] Furthermore, in this embodiment, similar to the semiconductor composite device 10 of the first embodiment, the inductor array 40 may be one rather than multiple, and the multi-terminal capacitor 70 may include one capacitor portion rather than multiple capacitor portions 73a and 73b.

[0123] Fourth Embodiment FIG. 15A is a cross-sectional view schematically showing a semiconductor composite device according to a fourth embodiment of the present invention.

[0124] As shown in FIG. 15 , the semiconductor composite device 10C according to the fourth embodiment includes a load 20, a plurality of inductor arrays 40 (two in this case), a multi-terminal capacitor 70, and a wiring board 60, similar to the semiconductor composite device 10A according to the second embodiment (particularly Modifications 2 and 3). However, the inductor array 40 and the multi-terminal capacitor 70 are integrated to form a single component (an integrated passive device (IPD)) 90, and the single component 90 is built into the wiring board 60.

[0125] Each inductor array 40 is disposed on the opposite side of the multi-terminal capacitor 70 from the load 20 .

[0126] Furthermore, in this embodiment, similar to the semiconductor composite device 10 of the first embodiment, the inductor array 40 may be one rather than multiple, and the multi-terminal capacitor 70 may include one capacitor portion rather than multiple capacitor portions 73a and 73b.

[0127] As such, the semiconductor composite device 10C includes a composite component 50, which, similar to the first embodiment, includes an inductor array 40 and a multi-terminal capacitor 70 having a first terminal (hot terminal) 71 electrically connected to the inductor array 40 and a second terminal (cold terminal) 72 electrically connected to ground, wherein the inductor array 40 includes a plurality of inductor wirings each having a first termination portion and a second termination portion, and the multi-terminal capacitor 70 has a total of three or more first terminals 71 and second terminals 72, and the second termination portions of the plurality of inductor wirings of the inductor array 40 are electrically connected to the first terminal 71 of the multi-terminal capacitor 70.

[0128] As in the first or second embodiment, in the composite component 50, the inductor array 40 has a common second terminal (Out terminal) 42 electrically connected to multiple second termination ends of multiple inductor wirings, and the common second terminal 42 of the inductor array 40 may be electrically connected to the first terminal 71 of the multi-terminal capacitor 70.

[0129] Furthermore, in the composite component 50, the inductor array 40 may have a plurality of first terminals (In terminals) 41 electrically connected to a plurality of first end portions of a plurality of inductor wirings, respectively.

[0130] In the composite component 50, the inductor array 40 may also constitute a coupled inductor or a multi-phase inductor.

[0131] Furthermore, the composite component 50 may have a first main surface 51 and a second main surface 52 opposite the first main surface 51, the first terminal 71 of the multi-terminal capacitor 70 may have a first external electrode portion 74 on the first main surface 51 side, a second external electrode portion 75 on the second main surface 52 side, and a first through-hole portion 76 electrically connected to the first external electrode portion 74 and the second external electrode portion 75, and the second terminal 72 of the multi-terminal capacitor 70 may have a third external electrode portion 77 on the first main surface 51 side, a fourth external electrode portion 78 on the second main surface 52 side, and a second through-hole portion 79 electrically connected to the third external electrode portion 77 and the fourth external electrode portion 78.

[0132] Furthermore, in composite component 50, first through-hole portion 76 and second through-hole portion 79 may penetrate multi-terminal capacitor 70 in the thickness direction, which is a direction perpendicular to first main surface 51. In this manner, composite component 50 may be disposed such that first main surface 51 is parallel to first mounting surface 61 of wiring board 60.

[0133] Furthermore, in the composite part 50, the area of ​​the multi-terminal capacitor 70 in the in-plane direction may be larger than the area of ​​each inductor array 40 in the in-plane direction.

[0134] FIG. 15B is a cross-sectional view schematically showing Modification 1 of the semiconductor composite device according to the fourth embodiment of the present invention.

[0135] Furthermore, as shown in FIG. 15B, in the composite part 50, the area of ​​the multi-terminal capacitor 70 in the in-plane direction may be smaller than the area of ​​each inductor array 40 in the in-plane direction.

[0136] In addition, in the composite part 50, the inductor array 40 and the multi-terminal capacitor 70 may be arranged side by side in the thickness direction.

[0137] Furthermore, in the composite component 50, the inductor array 40 has one or more second terminals 42 electrically connected to multiple second termination ends of the multiple inductor wirings, and the one or more second terminals 42 of the inductor array 40 may be arranged so as to overlap the multi-terminal capacitor 70 in the thickness direction.

[0138] FIG. 15C is a cross-sectional view schematically showing Modification 2 of the semiconductor composite device according to the fourth embodiment of the present invention.

[0139] Also, as shown in FIG. 15C, in the composite component 50, the inductor array 40 has one or more second terminals 42 electrically connected to multiple second termination ends of multiple inductor wirings, and the one or more second terminals 42 of the inductor array 40 may be arranged so as not to overlap the multi-terminal capacitor 70 in the thickness direction.

[0140] FIG. 16 is a cross-sectional view schematically showing a third modification of the semiconductor composite device according to the fourth embodiment of the present invention.

[0141] As shown in FIG. 16 , in a semiconductor composite device 10C, the power supply 30 may be disposed on the second mounting surface 62 side of the wiring board 60 or may be mounted on the second mounting surface 62 .

[0142] Fifth Embodiment FIG. 17 is a cross-sectional view schematically showing a semiconductor composite device according to a fifth embodiment of the present invention.

[0143] 17 , the semiconductor composite device 10D according to the fifth embodiment includes a load 20, an inductor array 40, a multi-terminal capacitor 70, and a wiring board 60, similar to the semiconductor composite device 10 according to the first embodiment, but the inductor array 40 and the multi-terminal capacitor 70 are arranged side by side in the thickness direction and are built into the wiring board 60, particularly the core substrate 65. This allows the semiconductor composite device 10C to be miniaturized in the thickness direction and in the in-plane direction.

[0144] The semiconductor composite device 10D may further include a discrete component 91 such as a multi-layer ceramic capacitor (MLCC) embedded in the wiring substrate 60, particularly the core substrate 65. The discrete component 91 and the multi-terminal capacitor 70 may be arranged side by side in the thickness direction, and the discrete component 91 and the inductor array 40 may be arranged side by side in the in-plane direction. The multi-terminal capacitor 70, the discrete component 91, and the inductor array 40 may each have a different size in the in-plane direction.

[0145] FIG. 18 is a perspective view schematically showing an example of an inductor array applicable to the present invention.

[0146] An inductor array 101A shown in FIG. 18 comprises an element body 110 containing a magnetic material, and first terminals 121a to 121d and second terminals 122a and 122b provided on the element body 110.

[0147] The base body 110 has a first main surface 111a and a second main surface 111b that face each other in the height direction, a first side surface 111c and a second side surface 111d that face each other in the length direction perpendicular to the height direction, and a third side surface 111e and a fourth side surface 111f that face each other in the width direction perpendicular to the height and length directions.

[0148] As described above, the element body 110 has a substantially rectangular parallelepiped outer shape, but the corners and ridges may be rounded. A corner is a portion where three faces of the element body 110 intersect, and a ridge is a portion where two faces of the element body 110 intersect.

[0149] The first terminals 121a to 121d and the second terminals 122a and 122b may all be provided on the first main surface 111a (see Figure 18), or the first terminals 121a to 121d may be provided on the first main surface 111a and the second terminals 122a and 122b may be provided on the second main surface 111b.

[0150] FIG. 19 is a perspective view showing the inner conductors of the inductor array shown in FIG.

[0151] 19, the inductor array 101A includes a plurality of inductor wirings 130a to 130d, four in this example, within the element body 110. Each of the inductor wirings 130a to 130d is wound parallel to the first main surface 111a, with the inductor wirings 130a and 130b overlapping in the height direction, and the inductor wirings 130c and 130d overlapping in the height direction.

[0152] Fig. 20 is a perspective exploded schematic view of the inductor array shown in Fig. 18. However, Fig. 20 shows only the conductors.

[0153] As shown in FIG. 20, each of the inductor wirings 130a to 130d has a first termination portion 131 and a second termination portion 132, and the first termination portion 131 and the second termination portion 132 of the inductor wiring 130a are electrically connected to the first terminal 121a and the second terminal 122a, respectively; the first termination portion 131 and the second termination portion 132 of the inductor wiring 130b are electrically connected to the first terminal 121b and the second terminal 122a, respectively; the first termination portion 131 and the second termination portion 132 of the inductor wiring 130c are electrically connected to the first terminal 121c and the second terminal 122b, respectively; and the first termination portion 131 and the second termination portion 132 of the inductor wiring 130d are electrically connected to the first terminal 121d and the second terminal 122b, respectively.

[0154] More specifically, the first terminal end 131 of the inductor wiring 130a is connected to the first terminal 121a via the via 141a and the columnar wiring 142a, and the second terminal end 132 of the inductor wiring 130a is connected to the second terminal 122a via the via 141b and the columnar wiring 142b. The first terminal end 131 of the inductor wiring 130b is connected to the first terminal 121b via the via 141c, the floating island pad 143a, the via 141d, and the columnar wiring 142c, and the second terminal end 132 of the inductor wiring 130b is connected to the second terminal 122a via the via 141e, the second terminal end 132 of the inductor wiring 130a, the via 141b, and the columnar wiring 142b. The first terminal end 131 of the inductor wiring 130c is connected to the first terminal 121c via the via 141f and the columnar wiring 142d, and the second terminal end 132 of the inductor wiring 130c is connected to the second terminal 122b via the via 141g and the columnar wiring 142e. The first terminal end 131 of the inductor wiring 130d is connected to the first terminal 121d via the via 141h, the floating island pad 143b, the via 141j, and the columnar wiring 142f, and the second terminal end 132 of the inductor wiring 130d is connected to the second terminal 122b via the via 141k, the second terminal end 132 of the inductor wiring 130c, the via 141g, and the columnar wiring 142e.

[0155] Therefore, the inductor array 101A has a plurality of first terminals 121a to 121d electrically connected to a plurality of first termination portions 131 of a plurality of inductor wirings 130a to 130d, respectively, and common second terminals 122a and 122b electrically connected to a plurality of second termination portions 132 of the plurality of inductor wirings 130a to 130d. By grouping the second termination portions 132 together in this way, the volume of the magnetic material increases, improving inductance acquisition efficiency.

[0156] 18 to 20, the area of ​​each of the second terminals 122a and 122b is larger than the area of ​​each of the first terminals 121a to 121d. In the inductor array 101A, the amount of current flowing through the second terminals 122a and 122b is large because the wiring on the output side is grouped together, but by enlarging the second terminals 122a and 122b in this way, the inductor array 101A can be made smaller and its electromigration resistance can be improved.

[0157] FIG. 21 is a perspective view schematically showing another example of an inductor array applicable to the present invention.

[0158] An inductor array 101B shown in FIG. 21 includes an element body 110 containing a magnetic material, and first terminals 121a and 121b and a second terminal 122 provided on the element body 110.

[0159] The base body 110 has a first main surface 111a and a second main surface 111b that face each other in the height direction, a first side surface 111c and a second side surface 111d that face each other in the length direction perpendicular to the height direction, and a third side surface 111e and a fourth side surface 111f that face each other in the width direction perpendicular to the height and length directions.

[0160] As described above, the element body 110 has a substantially rectangular parallelepiped outer shape, but the corners and ridges may be rounded. A corner is a portion where three faces of the element body 110 intersect, and a ridge is a portion where two faces of the element body 110 intersect.

[0161] The first terminals 121a and 121b and the second terminal 122 may all be provided on the first main surface 111a (see Figure 21), or the first terminals 121a and 121b may be provided on the first main surface 111a and the second terminal 122 may be provided on the second main surface 111b.

[0162] FIG. 22 is a perspective view showing the inner conductors of the inductor array shown in FIG.

[0163] 22, the inductor array 101B includes a plurality of inductor wirings, two in this case, 130a and 130b, within the element body 110. Each of the inductor wirings 130a and 130b is wound parallel to the first main surface 111a, and the inductor wirings 130a and 130b overlap in the height direction.

[0164] That is, the inductor array 101B has only one of the two configurations obtained by dividing the inductor array 101A shown in FIGS.

[0165] Fig. 23 is a perspective exploded schematic view of the inductor array shown in Fig. 21. However, Fig. 23 shows only the conductors.

[0166] As shown in Figure 23, each inductor wiring 130a and 130b has a first termination portion 131 and a second termination portion 132, and the first termination portion 131 and the second termination portion 132 of the inductor wiring 130a are electrically connected to the first terminal 121a and the second terminal 122, respectively, and the first termination portion 131 and the second termination portion 132 of the inductor wiring 130b are electrically connected to the first terminal 121b and the second terminal 122, respectively.

[0167] More specifically, the first terminal end 131 of the inductor wiring 130a is connected to the first terminal 121a via the via 141a and the columnar wiring 142a, and the second terminal end 132 of the inductor wiring 130a is connected to the second terminal 122 via the via 141b and the columnar wiring 142b. The first terminal end 131 of the inductor wiring 130b is connected to the first terminal 121b via the via 141c, the floating island pad 143a, the via 141d, and the columnar wiring 142c, and the second terminal end 132 of the inductor wiring 130b is connected to the second terminal 122 via the via 141e, the second terminal end 132 of the inductor wiring 130a, the via 141b, and the columnar wiring 142b.

[0168] Therefore, the inductor array 101B has a plurality of first terminals 121a and 121b electrically connected to a plurality of first termination portions 131 of the plurality of inductor wirings 130a and 130b, respectively, and a common second terminal 122 electrically connected to a plurality of second termination portions 132 of the plurality of inductor wirings 130a and 130b. Therefore, similar to the inductor array 101A shown in Figures 18 to 20, the inductance acquisition efficiency is improved.

[0169] Furthermore, as shown in Figures 21 to 23, the area of ​​the second terminal 122 is larger than the area of ​​each of the first terminals 121a and 121b, so similar to the inductor array 101A shown in Figures 18 to 20, the inductor array 101B can be made smaller and its electromigration resistance can be improved.

[0170] The inductor arrays shown in Figures 18 to 23 can be fabricated, for example, by the following method. Specifically, a conductor layer including a conductor pattern and a sacrificial conductor formed around the conductor pattern via a permanent resist is formed on a base substrate by photolithography and electrolytic plating, with an insulating layer and vias interposed between them. Subsequently, the columnar electrodes are patterned, and the columnar electrodes are protected with resist. The sacrificial conductor is then etched and removed to form a space that serves as a magnetic path. Next, the protective resist on the columnar electrodes is removed, and a magnetic layer is formed by pressing and hardening a magnetic material to fill the remaining conductor pattern stack and the columnar electrodes. The magnetic layer is then ground to expose the columnar electrodes. The base substrate is then removed, and a magnetic material is pressed and hardened to cover the exposed surface, forming a magnetic layer. The magnetic layer is then ground to control its thickness. After that, first and second terminals are patterned on the surface where the columnar electrodes are exposed, and the resulting product is then singulated to fabricate the inductor arrays shown in Figures 18 to 23.

[0171] 24 is a cross-sectional view schematically illustrating an example of an electrolytic capacitor applicable as a multi-terminal capacitor in the present invention, showing an example of a first terminal electrically connected to an anode and its periphery. FIG. 25 is a cross-sectional view schematically illustrating an example of an electrolytic capacitor applicable as a multi-terminal capacitor in the present invention, showing an example of a second terminal electrically connected to a cathode and its periphery.

[0172] 24 and 25 includes a capacitor section 230 having an anode plate 251 having porous layers 253 on both main surfaces of a core section 252, a dielectric layer (not shown) provided on the surface of the porous layer 253, and a cathode layer 254 provided on the surface of the dielectric layer. When the cathode layer 254 has a solid electrolyte layer 254A, the electrolytic capacitor 201 constitutes a solid electrolytic capacitor.

[0173] The anode plate 251 is preferably in the form of a flat plate, and more preferably in the form of a foil. Thus, in this specification, "plate-like" also includes "foil-like". The anode plate 251 is preferably made of a metal, and particularly preferably made of a valve metal. Examples of valve metals include simple metals such as aluminum, tantalum, niobium, titanium, and zirconium, and alloys containing at least one of these simple metals. Of these, aluminum or an aluminum alloy is preferred.

[0174] The dielectric layer is provided on the surface of the porous layer 253. More specifically, the dielectric layer is provided along the surface (outline) of each hole present in the porous layer 253. The dielectric layer is preferably made of an oxide film of the above-mentioned valve metal.

[0175] The cathode layer 254 is provided on the surface of the dielectric layer. As shown in Figures 24 and 25, the cathode layer 254 preferably has a solid electrolyte layer 254A provided on the surface of the dielectric layer and a conductor layer 254B provided on the surface of the solid electrolyte layer 254A.

[0176] Examples of materials constituting the solid electrolyte layer 254A include conductive polymers such as polypyrroles, polythiophenes, and polyanilines. Among these, polythiophenes are preferred, and poly(3,4-ethylenedioxythiophene) (PEDOT) is particularly preferred. The conductive polymer may also contain a dopant such as polystyrene sulfonate (PSS).

[0177] The conductor layer 254B may include, for example, a carbon layer provided on the surface of the solid electrolyte layer 254A and a copper layer provided on the surface of the carbon layer.

[0178] The capacitor section 230 shown in FIGS. 24 and 25 is provided with an insulating layer 260 that seals the capacitor section 230 , a first terminal 210 , and a second terminal 220 .

[0179] The insulating layer 260 is provided on the surface of the capacitor section 230. Examples of the constituent material of the insulating layer 260 include a resin material such as epoxy, phenol, or polyimide, or a mixed material of a resin material such as epoxy, phenol, or polyimide with an inorganic filler such as silica or alumina.

[0180] The first terminal 210 has a first external electrode portion 211, a second external electrode portion 212, and a first through-hole portion 213 electrically connected to the first external electrode portion 211 and the second external electrode portion 212, and the second terminal 220 has a third external electrode portion 221, a fourth external electrode portion 222, and a second through-hole portion 223 electrically connected to the third external electrode portion 221 and the fourth external electrode portion 222.

[0181] The first through-hole portion 213 is made of a low-resistance metal such as copper, gold, or silver, and is directly connected to the end face of the anode plate 251 in the in-plane direction over its entire periphery, thereby being electrically connected to the anode plate 251. The center of the first through-hole portion 213 may be a resin-filled portion 214 made of a material containing resin.

[0182] The first external electrode portion 211 and the second external electrode portion 212 are made of a low-resistance metal such as copper, gold, or silver, and are provided at one and the other ends of the first through-hole portion 213 in the thickness direction, respectively.

[0183] The second through-hole portion 223 is made of a low-resistance metal such as copper, gold, or silver, and is electrically connected to the cathode layer 254. The center of the second through-hole portion 223 may be a resin-filled portion 224 made of a material containing resin.

[0184] The third external electrode portion 221 and the fourth external electrode portion 222 are made of a low-resistance metal such as copper, gold, or silver, and are provided at one and the other ends of the second through-hole portion 223 in the thickness direction, respectively.

[0185] 25 , via conductors 270 are provided so as to penetrate insulating layer 260 in the thickness direction and connect to third external electrode portion 221, fourth external electrode portion 222, and cathode layer 254. Therefore, in the example shown in FIG. 25 , second terminal 220 is electrically connected to cathode layer 254 through via conductors 270.

[0186] In the above embodiment, an example has been described in which the semiconductor composite device of the present invention is applied to a chopper-type step-down switching regulator. However, the features of each embodiment can also be applied to other semiconductor composite devices that systematize power transmission lines including step-up / step-down circuits.

[0187] In the semiconductor composite device of the present invention, the multi-terminal capacitor may also be used as an interposer for a load, an inductor array, or a power supply.

[0188] The present specification discloses the following:

[0189] <1> A semiconductor composite device comprising: a load including a semiconductor element; an inductor array electrically connected to the load; a multi-terminal capacitor having a first terminal electrically connected to the load and the inductor array and a second terminal electrically connected to ground; and a wiring substrate having a first mounting surface, a second mounting surface opposite the first mounting surface, and a wiring layer electrically connected to the load, the inductor array, and the multi-terminal capacitor, wherein the inductor array includes a plurality of inductor wirings each having a first termination portion and a second termination portion, the multi-terminal capacitor has a total of three or more of the first terminals and the second terminals, and the plurality of second termination portions of the plurality of inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor.

[0190] <2> The semiconductor composite device described in <1>, wherein the inductor array has a common second terminal electrically connected to the second terminations of the inductor wirings, and the common second terminal of the inductor array is electrically connected to the first terminal of the multi-terminal capacitor.

[0191] <3> The semiconductor composite device according to <2>, wherein the inductor array includes a magnetic material.

[0192] <4> The semiconductor composite device described in <2> or <3>, wherein the inductor array has a plurality of first terminals electrically connected to a plurality of first termination portions of the plurality of inductor wirings, respectively, and the area of ​​the common second terminal of the inductor array is larger than the area of ​​each of the plurality of first terminals of the inductor array.

[0193] <5> The semiconductor composite device according to any one of <2> to <4>, wherein the inductor array forms a coupled inductor or a multi-phase inductor.

[0194] <6> The semiconductor composite device according to any one of <1> to <5>, wherein the wiring board has a first wiring layer on the first mounting surface side and a second wiring layer on the second mounting surface side, the inductor array and the multi-terminal capacitor are juxtaposed in an in-plane direction that is a direction parallel to the first mounting surface, and the plurality of second termination ends of the plurality of inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor via only one of the first wiring layer or the second wiring layer of the wiring board.

[0195] <7> The semiconductor composite device described in <6>, wherein the load is arranged on the first mounting surface side of the wiring board, and the second termination ends of the inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor only via the second wiring layer of the wiring board.

[0196] <8> The semiconductor composite device according to <7>, wherein the inductor array and the multi-terminal capacitor are built into the wiring board, the inductor array has one or more second terminals electrically connected to the plurality of second termination portions of the plurality of inductor wires, the one or more second terminals of the inductor array are arranged on the second mounting surface side of the wiring board, the first terminal of the multi-terminal capacitor has a first external electrode portion on the first mounting surface side of the wiring board, a second external electrode portion on the second mounting surface side of the wiring board, and a through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the one or more second terminals of the inductor array are electrically connected to the second external electrode portion of the first terminal of the multi-terminal capacitor only via the second wiring layer of the wiring board.

[0197] <9> The semiconductor composite device described in <6>, wherein the load is arranged on the first mounting surface side of the wiring board, and the second terminations of the inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor only via the first wiring layer of the wiring board.

[0198] <10> The semiconductor composite device according to <9>, wherein the inductor array and the multi-terminal capacitor are built into the wiring board, the inductor array has one or more second terminals electrically connected to the plurality of second termination ends of the plurality of inductor wires, the one or more second terminals of the inductor array are arranged on the first mounting surface side of the wiring board, the first terminal of the multi-terminal capacitor has a first external electrode portion on the first mounting surface side of the wiring board, a second external electrode portion on the second mounting surface side of the wiring board, and a through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the one or more second terminals of the inductor array are electrically connected to the first external electrode portion of the first terminal of the multi-terminal capacitor only via the first wiring layer of the wiring board.

[0199] <11> The semiconductor composite device according to any one of <1> to <10>, wherein the inductor array and the multi-terminal capacitor are built into the wiring substrate.

[0200] <12> The composite semiconductor device according to <11>, wherein the wiring board has a core substrate including a glass cloth, and the inductor array and the multi-terminal capacitor are embedded in the core substrate.

[0201] <13> The semiconductor composite device according to any one of <1> to <12>, wherein the load is mounted on the first mounting surface of the wiring board.

[0202] <14> The semiconductor composite device according to any one of <1> to <13>, wherein the first terminal of the multi-terminal capacitor has a first external electrode portion on the first mounting surface side of the wiring board, a second external electrode portion on the second mounting surface side of the wiring board, and a first through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the second terminal of the multi-terminal capacitor has a third external electrode portion on the first mounting surface side of the wiring board, a fourth external electrode portion on the second mounting surface side of the wiring board, and a second through-hole portion electrically connected to the third external electrode portion and the fourth external electrode portion.

[0203] <15> The semiconductor composite device according to <14>, wherein the first through-hole portion and the second through-hole portion penetrate the multi-terminal capacitor in a thickness direction that is a direction perpendicular to the first mounting surface.

[0204] <16> The semiconductor composite device according to any one of <1> to <15>, further comprising a power supply electrically connected to the load via the inductor array, wherein a plurality of first terminations of the plurality of inductor wirings are electrically connected to the power supply.

[0205] <17> The semiconductor composite device according to any one of <1> to <16>, wherein the inductor array and the multi-terminal capacitor are integrated to form a single component.

[0206] <18> The semiconductor composite device according to <17>, wherein the single component is built into the wiring board.

[0207] <19> The semiconductor composite device according to any one of <1> to <18>, wherein an area of ​​the multi-terminal capacitor in an in-plane direction parallel to the first mounting surface is larger than an area of ​​the inductor array in the in-plane direction.

[0208] <20> The semiconductor composite device according to any one of <1> to <18>, wherein an area of ​​the multi-terminal capacitor in an in-plane direction parallel to the first mounting surface is smaller than an area of ​​the inductor array in the in-plane direction.

[0209] <21> The semiconductor composite device according to any one of <1> to <5> and <11> to <20>, wherein the inductor array and the multi-terminal capacitor are juxtaposed in a thickness direction that is a direction perpendicular to the first mounting surface.

[0210] <22> The semiconductor composite device described in <21>, wherein the inductor array has one or more second terminals electrically connected to the plurality of second termination ends of the plurality of inductor wirings, and the one or more second terminals of the inductor array are arranged so as to overlap the multi-terminal capacitor in the thickness direction.

[0211] <23> The semiconductor composite device described in <21>, wherein the inductor array has one or more second terminals electrically connected to the plurality of second termination ends of the plurality of inductor wirings, and the one or more second terminals of the inductor array are arranged so as not to overlap the multi-terminal capacitor in the thickness direction.

[0212] <24> The semiconductor composite device according to <21>, wherein the multi-terminal capacitor is built into the wiring board, and the inductor array is mounted on the first mounting surface or the second mounting surface of the wiring board.

[0213] <25> A composite component comprising: an inductor array; and a multi-terminal capacitor having a first terminal electrically connected to the inductor array and a second terminal electrically connected to ground, wherein the inductor array includes a plurality of inductor wirings each having a first termination portion and a second termination portion, the multi-terminal capacitor has a total of three or more of the first terminals and the second terminals, and the second termination portions of the plurality of inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor.

[0214] <26> The composite component according to <25>, wherein the inductor array has a common second terminal electrically connected to the second terminations of the inductor wirings, and the common second terminal of the inductor array is electrically connected to the first terminal of the multi-terminal capacitor.

[0215] <27> The composite part according to <26>, wherein the inductor array includes a magnetic material.

[0216] <28> The composite part according to <26> or <27>, wherein the inductor array has a plurality of first terminals electrically connected to a plurality of first termination ends of the plurality of inductor wirings, respectively, and the area of ​​the common second terminal of the inductor array is larger than the area of ​​each of the plurality of first terminals of the inductor array.

[0217] <29> The composite part according to any one of <26> to <28>, wherein the inductor array forms a coupled inductor or a multi-phase inductor.

[0218] <30> The composite part according to any one of <25> to <29>, wherein the composite part has a first main surface and a second main surface opposite to the first main surface, the first terminal of the multi-terminal capacitor has a first external electrode portion on the first main surface side, a second external electrode portion on the second main surface side, and a first through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the second terminal of the multi-terminal capacitor has a third external electrode portion on the first main surface side, a fourth external electrode portion on the second main surface side, and a second through-hole portion electrically connected to the third external electrode portion and the fourth external electrode portion.

[0219] <31> The composite part according to <30>, wherein the first through-hole portion and the second through-hole portion penetrate the multi-terminal capacitor in a thickness direction that is a direction perpendicular to the first main surface.

[0220] <32> The composite part according to any one of <25> to <31>, wherein the composite part has a first main surface and a second main surface opposite to the first main surface, and an area of ​​the multi-terminal capacitor in an in-plane direction that is a direction parallel to the first main surface is larger than an area of ​​the inductor array in the in-plane direction.

[0221] <33> The composite part according to any one of <25> to <31>, wherein the composite part has a first main surface and a second main surface opposite to the first main surface, and an area of ​​the multi-terminal capacitor in an in-plane direction parallel to the first main surface is smaller than an area of ​​the inductor array in the in-plane direction.

[0222] <34> The composite part according to any one of <25> to <33>, wherein the composite part has a first main surface and a second main surface opposite to the first main surface, and the inductor array and the multi-terminal capacitor are juxtaposed in a thickness direction that is a direction perpendicular to the first main surface.

[0223] <35> The composite component described in <34>, wherein the inductor array has one or more second terminals electrically connected to the second termination ends of the inductor wirings, and the one or more second terminals of the inductor array are arranged to overlap the multi-terminal capacitor in the thickness direction.

[0224] <36> The composite component described in <34>, wherein the inductor array has one or more second terminals electrically connected to the second terminations of the inductor wirings, and the one or more second terminals of the inductor array are arranged so as not to overlap the multi-terminal capacitor in the thickness direction.

[0225] 10, 10A, 10B, 10C, 10D Composite semiconductor device 20 Load 21 Semiconductor package substrate 22 Semiconductor package 30 Power supply 31 Power supply module substrate 32 Power supply module 40 Inductor array 41, 41a to 41d, 121a to 121d First terminal of inductor array 42, 42a, 42b, 122, 122a, 122b Second terminal of inductor array 44a to 44d, 130a to 130d Inductor wiring 45, 131 First termination portion 46, 132 Second termination portion 50 Composite component 51 First main surface of composite component 52 Second main surface of composite component 60 Wiring substrate 61 First mounting surface 62 Second mounting surface 63 First wiring layer 64 Second wiring layer 65 Core substrate (core layer) 70 Multi-terminal capacitor 71 First terminal of multi-terminal capacitor 72 Second terminal of multi-terminal capacitor 73, 73a to 73d Capacitor section 74, 211 First external electrode section 75, 212 Second external electrode section 76, 213 First through-hole section 77, 221 Third external electrode section 78, 222 Fourth external electrode section 79, 223 Second through-hole section 90 Single component 91 Discrete component 101A, 101B Inductor array 110 Element body 111a First main surface of element body 111b Second main surface of element body 111c First side surface of element body 111d Second side surface of element body 111e Third side surface of element body 111f Fourth side surface of element body 141a to 141k Vias 142a to 142f Pillar-shaped wiring 143a, 143b Floating island pad 201 Electrolytic capacitor 210 First terminal of electrolytic capacitor 214, 224 Resin-filled portion 220 Second terminal of electrolytic capacitor 230 Capacitor portion 251 Anode plate 252 Core portion 253 Porous layer 254 Cathode layer 254A Solid electrolyte layer 254B Conductor layer 260 Insulating layer 270 Via conductor L1 to L4 Inductors C1 to C4 Capacitors SW1 to SW4 Switching elements GND Ground

Claims

1. A semiconductor composite device comprising: a load including a semiconductor element; an inductor array electrically connected to the load; a multi-terminal capacitor having a first terminal electrically connected to the load and the inductor array and a second terminal electrically connected to ground; and a wiring substrate having a first mounting surface, a second mounting surface opposite the first mounting surface, and a wiring layer electrically connected to the load, the inductor array, and the multi-terminal capacitor, wherein the inductor array includes a plurality of inductor wirings each having a first termination portion and a second termination portion, the multi-terminal capacitor has a total of three or more first terminals and second terminals, and the plurality of second termination portions of the plurality of inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor.

2. The semiconductor composite device according to claim 1, wherein the inductor array has a common second terminal electrically connected to the second terminations of the inductor wirings, and the common second terminal of the inductor array is electrically connected to the first terminal of the multi-terminal capacitor.

3. The semiconductor composite device according to claim 2, wherein the inductor array has a magnetic material.

4. A semiconductor composite device as described in claim 2 or 3, wherein the inductor array has a plurality of first terminals electrically connected to a plurality of first termination ends of the plurality of inductor wirings, respectively, and the area of ​​the common second terminal of the inductor array is larger than the area of ​​each of the plurality of first terminals of the inductor array.

5. The semiconductor composite device according to any one of claims 2 to 4, wherein the inductor array constitutes a coupled inductor or a multi-phase inductor.

6. The semiconductor composite device according to any one of claims 1 to 5, wherein the wiring board has a first wiring layer on the first mounting surface side and a second wiring layer on the second mounting surface side, the inductor array and the multi-terminal capacitor are juxtaposed in an in-plane direction that is a direction parallel to the first mounting surface, and the multiple second termination ends of the multiple inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor via only one of the first wiring layer or the second wiring layer of the wiring board.

7. The semiconductor composite device according to claim 6, wherein the load is arranged on the first mounting surface side of the wiring board, and the second terminations of the inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor only via the second wiring layer of the wiring board.

8. The semiconductor composite device according to claim 7, wherein the inductor array and the multi-terminal capacitor are built into the wiring board, the inductor array has one or more second terminals electrically connected to the plurality of second terminations of the plurality of inductor wirings, the one or more second terminals of the inductor array are arranged on the second mounting surface side of the wiring board, the first terminal of the multi-terminal capacitor has a first external electrode portion on the first mounting surface side of the wiring board, a second external electrode portion on the second mounting surface side of the wiring board, and a through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the one or more second terminals of the inductor array are electrically connected to the second external electrode portion of the first terminal of the multi-terminal capacitor only through the second wiring layer of the wiring board.

9. The semiconductor composite device according to claim 6, wherein the load is arranged on the first mounting surface side of the wiring board, and the second terminations of the inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor only via the first wiring layer of the wiring board.

10. The semiconductor composite device according to claim 9, wherein the inductor array and the multi-terminal capacitor are built into the wiring board, the inductor array has one or more second terminals electrically connected to the plurality of second terminations of the plurality of inductor wirings, the one or more second terminals of the inductor array are arranged on the first mounting surface side of the wiring board, the first terminal of the multi-terminal capacitor has a first external electrode portion on the first mounting surface side of the wiring board, a second external electrode portion on the second mounting surface side of the wiring board, and a through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the one or more second terminals of the inductor array are electrically connected to the first external electrode portion of the first terminal of the multi-terminal capacitor only through the first wiring layer of the wiring board.

11. The semiconductor composite device according to any one of claims 1 to 10, wherein the inductor array and the multi-terminal capacitor are built into the wiring substrate.

12. The semiconductor composite device according to claim 11, wherein the wiring board has a core substrate including a glass cloth, and the inductor array and the multi-terminal capacitor are embedded in the core substrate.

13. The composite semiconductor device according to any one of claims 1 to 12, wherein the load is mounted on the first mounting surface of the wiring board.

14. The semiconductor composite device according to any one of claims 1 to 13, wherein the first terminal of the multi-terminal capacitor has a first external electrode portion on the first mounting surface side of the wiring board, a second external electrode portion on the second mounting surface side of the wiring board, and a first through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the second terminal of the multi-terminal capacitor has a third external electrode portion on the first mounting surface side of the wiring board, a fourth external electrode portion on the second mounting surface side of the wiring board, and a second through-hole portion electrically connected to the third external electrode portion and the fourth external electrode portion.

15. The semiconductor composite device according to claim 14, wherein the first through-hole portion and the second through-hole portion penetrate the multi-terminal capacitor in a thickness direction that is a direction perpendicular to the first mounting surface.

16. The semiconductor composite device according to any one of claims 1 to 15, further comprising a power supply electrically connected to the load via the inductor array, wherein a plurality of first terminations of the plurality of inductor wirings are electrically connected to the power supply.

17. The semiconductor composite device according to any one of claims 1 to 16, wherein the inductor array and the multi-terminal capacitor are integrated to form a single component.

18. The semiconductor composite device according to claim 17, wherein the single component is built into the wiring board.

19. A semiconductor composite device according to any one of claims 1 to 18, wherein the area of ​​the multi-terminal capacitor in an in-plane direction parallel to the first mounting surface is larger than the area of ​​the inductor array in the in-plane direction.

20. A semiconductor composite device according to any one of claims 1 to 18, wherein the area of ​​the multi-terminal capacitor in an in-plane direction parallel to the first mounting surface is smaller than the area of ​​the inductor array in the in-plane direction.

21. The semiconductor composite apparatus according to any one of claims 1 to 5, 11 to 20, wherein the inductor array and the multi-terminal capacitor are arranged side by side in the thickness direction which is perpendicular to the first mounting surface.

22. The semiconductor composite device described in claim 21, wherein the inductor array has one or more second terminals electrically connected to the second terminations of the inductor wirings, and the one or more second terminals of the inductor array are arranged so as to overlap the multi-terminal capacitor in the thickness direction.

23. The semiconductor composite device described in claim 21, wherein the inductor array has one or more second terminals electrically connected to the plurality of second termination ends of the plurality of inductor wirings, and the one or more second terminals of the inductor array are arranged so as not to overlap the multi-terminal capacitor in the thickness direction.

24. The semiconductor composite device according to claim 21, wherein the multi-terminal capacitor is built into the wiring board, and the inductor array is mounted on the first mounting surface or the second mounting surface of the wiring board.

25. A composite component comprising: an inductor array; and a multi-terminal capacitor having a first terminal electrically connected to the inductor array and a second terminal electrically connected to ground, wherein the inductor array includes a plurality of inductor wirings each having a first termination portion and a second termination portion, the multi-terminal capacitor has a total of three or more of the first terminals and second terminals, and the second termination portions of the plurality of inductor wirings are electrically connected to the first terminal of the multi-terminal capacitor.

26. The composite component according to claim 25, wherein the inductor array has a common second terminal electrically connected to the plurality of second terminations of the plurality of inductor wirings, and the common second terminal of the inductor array is electrically connected to the first terminal of the multi-terminal capacitor.

27. The composite part of claim 26, wherein the inductor array comprises a magnetic material.

28. A composite part as described in claim 26 or 27, wherein the inductor array has a plurality of first terminals electrically connected to a plurality of first termination ends of the plurality of inductor wirings, respectively, and the area of ​​the common second terminal of the inductor array is larger than the area of ​​each of the plurality of first terminals of the inductor array.

29. A composite part according to any one of claims 26 to 28, wherein the inductor array comprises a coupled inductor or a multi-phase inductor.

30. A composite part as claimed in any one of claims 25 to 29, wherein the composite part has a first main surface and a second main surface opposite the first main surface, the first terminal of the multi-terminal capacitor has a first external electrode portion on the first main surface side, a second external electrode portion on the second main surface side, and a first through-hole portion electrically connected to the first external electrode portion and the second external electrode portion, and the second terminal of the multi-terminal capacitor has a third external electrode portion on the first main surface side, a fourth external electrode portion on the second main surface side, and a second through-hole portion electrically connected to the third external electrode portion and the fourth external electrode portion.

31. The composite part according to claim 30, wherein the first through-hole portion and the second through-hole portion penetrate the multi-terminal capacitor in a thickness direction that is a direction perpendicular to the first main surface.

32. The composite part according to any one of claims 25 to 31, wherein the composite part has a first main surface and a second main surface opposite the first main surface, and the area of ​​the multi-terminal capacitor in an in-plane direction parallel to the first main surface is larger than the area of ​​the inductor array in the in-plane direction.

33. The composite part according to any one of claims 25 to 31, wherein the composite part has a first main surface and a second main surface opposite the first main surface, and the area of ​​the multi-terminal capacitor in an in-plane direction parallel to the first main surface is smaller than the area of ​​the inductor array in the in-plane direction.

34. The composite part according to any one of claims 25 to 33, wherein the composite part has a first main surface and a second main surface opposite the first main surface, and the inductor array and the multi-terminal capacitor are juxtaposed in a thickness direction that is a direction perpendicular to the first main surface.

35. The composite part according to claim 34, wherein the inductor array has one or more second terminals electrically connected to the second terminations of the inductor wirings, and the one or more second terminals of the inductor array are arranged so as to overlap the multi-terminal capacitor in the thickness direction.

36. The composite part according to claim 34, wherein the inductor array has one or more second terminals electrically connected to the second terminations of the inductor wirings, and the one or more second terminals of the inductor array are arranged so as not to overlap the multi-terminal capacitor in the thickness direction.

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