Cycle-by-cycle control method

Abstract

A power electronic arrangement for a reluctance machine, comprising: a first auxiliary converter operable to deliver a bias voltage during a first and third portion of an electrical cycle, the first auxiliary converter comprising: a first voltage source associated with a first phase winding; a second voltage source associated with a second phase winding; and a second auxiliary converter operable to deliver a bias voltage during a second and fourth portion of the electrical cycle, the second auxiliary converter comprising: a third voltage source associated with the second phase winding; and a fourth voltage source associated with a third phase winding, wherein, during the first and third portions of the electrical cycle, when a current in the first phase winding is larger than a current in the second phase winding, the first voltage source is configured to extract power from a circulating current loop and the second voltage source is configured to inject power into the circulating current loop, and when the current in the second phase winding is larger than the current in the first phase winding, the first voltage source is configured to inject power into the circulating current loop and the second voltage source is configured to extract power from the circulating current loop; and wherein, during the second and fourth portions of the electrical cycle, when a current in the second phase winding is larger than a current in the third phase winding, the third voltage source is configured to extract power from the circulating current loop and the fourth voltage source is configured to inject power into the circulating current loop, and when the current in the third phase winding is larger than the current in the second phase winding, the third voltage source is configured to inject power into the circulating current loop and the fourth voltage source is configured to extract power from the circulating current loop.

Description

CYCLE-BY-CYCLE CONTROL METHOD FIELD OF THE INVENTION

[0001] The present disclosure relates to a power converter and a method of control for said power converter. In particular, the disclosure relates to a power converter suitable for a switched reluctance machine (SRM), the switched reluctance machine acting as either a motor or a generator, and a method of controlling said power converter using a cycle-by-cycle control method. The power converter and associated control methods described herein can also be applied to other types of electrical machines, electrical loads, or electrical sources. BACKGROUND

[0002] A switched reluctance machine (SRM) may be driven using an asymmetric bridge power converter. An asymmetric bridge power converter uses two active switches and two diodes per phase. Each asymmetric bridge provides excitation of one electrical phase of the SRM with a unidirectional current by application of three possible voltage states. The asymmetric bridge has the advantage of requiring a low number of semiconductor devices in order to function, however commercially available power modules are typically available only in multiples of a fully populated half-bridge format, where each device position comprises an active switch and an anti-parallel diode.

[0003] A power electronic converter typically used to drive a three-phase machine uses six switches and six diodes to deliver three balanced currents which are typically sinusoidal with an offset of 120° between phases. Such a power electronic converter supports a maximum total load VA of 3^^^^^^. For an arrangement using fully populated half-bridge devices to implement an asymmetric bridge power converter using commercially available modules, the total supported maximum load VA is also 3^^^^^^. However, this means that the increased number of power semiconductors are being used poorly compared to a conventional three-phase inverter and consequently, the total installed VA rating of an asymmetric bridge power converter implemented using fully populated half bridges will be twice that of a conventional three-phase inverter.

[0004] It is in this context that the teachings of the present disclosure have been devised. SUMMARY OF THE INVENTION

[0005] There is provided a power electronic arrangement for driving a switched reluctance machine, comprising: a plurality of phase arms, each phase arm comprising a phase winding, wherein the plurality of phase arms are connected in series to form a ring; and a main inverter having a plurality of inverter bridge legs, wherein a quantity of the plurality of bridge legs is equal to a quantity of the plurality of phase arms, wherein each of the plurality of bridge legs is connected at a switched node to two of the plurality of phase arms, and each of the plurality phase arms is connected to two of the plurality of bridge legs, and wherein at least one of the phase arms comprises at least one voltage source connected in series with a respective phase winding.

[0006] There is further provided a method of controlling the power electronic arrangement as described in embodiments and examples herein, comprising: controlling the at least one voltage source to provide a circulating bias current in the plurality of phase arms; and controlling the plurality of inverter bridge legs to provide a plurality of currents at a respective switched node.

[0007] There is further provided a power electronic arrangement for a reluctance machine, comprising: a first auxiliary converter operable to deliver a bias voltage during a first and third portion of an electrical cycle, the first auxiliary converter comprising: a first voltage source associated with a first phase winding; a second voltage source associated with a second phase winding; and a second auxiliary converter operable to deliver a bias voltage during a second and fourth portion of the electrical cycle, the second auxiliary converter comprising: a third voltage source associated with the second phase winding; and a fourth voltage source associated with a third phase winding, wherein, during the first and third portions of the electrical cycle, when a current in the first phase winding is larger than a current in the second phase winding, the first voltage source is configured to extract power from a circulating current loop and the second voltage source is configured to inject power into the circulating current loop, and when the current in the second phase winding is larger than the current in the first phase winding, the first voltage source is configured to inject power into the circulating current loop and the second voltage source is configured to extract power from the circulating current loop; and wherein, during the second and fourth portions of the electrical cycle, when a current in the second phase winding is larger than a current in the third phase winding, the third voltage source is configured to extract power from the circulating current loop and the fourth voltage source is configured to inject power into the circulating current loop, and when the current in the third phase winding is larger than the current in the second phase winding, the third voltage source is configured to inject power into the circulating current loop and the fourth voltage source is configured to extract power from the circulating current loop

[0008] There is further provided a switched reluctance machine comprising: a stator; a rotor; a housing; and the power electronic arrangement as described in embodiments and examples herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] Further details, aspects and embodiments of the invention will be described, by way of example only, with reference to the drawings. In the drawings, like reference numbers are used to identify like or functionally similar elements. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.

[0010] FIG. 1 shows an asymmetric bridge power converter for driving an SRM, in accordance with various examples and embodiments of the present disclosure; FIG. 2 shows an example of an asymmetric bridge implemented using commercially available power modules, whereby two fully populated half-bridge legs are required per phase, in accordance with various examples and embodiments of the present disclosure; FIG.3 shows an example of a power electronic converter typically used to drive a three- phase machine, in accordance with various examples and embodiments of the present disclosure; FIG.4 shows an alternative arrangement comprising asymmetric bridge legs at each end of a series string of phase windings, in accordance with various examples and embodiments of the present disclosure; FIG. 5 shows an arrangement using a controllable voltage source in series with phase windings to form a ring, in accordance with various examples and embodiments of the present disclosure; FIG.6 shows an example of a power converter for driving a three-phase SRM, comprising a main inverter and an auxiliary converter implementing two voltage sources, in accordance with various examples and embodiments of the present disclosure; FIG.7 shows an example of a power converter for driving a three-phase SRM, comprising a main inverter implemented by a combination of an IGBT and an antiparallel diode, and an auxiliary converter implemented using an asymmetric configuration, in accordance with various examples and embodiments of the present disclosure;FIG.8 shows a generic arrangement for a power converter for driving a three-phase SRM, having two series voltage sources, in accordance with various examples and embodiments of the present disclosure; FIG. 9 shows an example of a generic arrangement for a power converter for driving a three-phase SRM, comprising a main inverter, and four voltage sources implemented by two dual-source auxiliary converters, in accordance with various examples and embodiments of the present disclosure; FIG. 10 shows an example of a generic arrangement for a power converter for driving a three-phase SRM, comprising a main inverter, and two voltages in series with each of the phase windings, in accordance with various examples and embodiments of the present disclosure; FIG. 11 shows an example of an arrangement for a power converter implementing the generic arrangement shown in FIG.10, comprising a main inverter and three auxiliary converters, each of the three auxiliary converters implementing two voltage sources, in accordance with various examples and embodiments of the present disclosure; FIG. 12 shows a plot depicting a typical relationship between relative contributions of each component and a motor fundamental electrical frequency; FIG.13 shows an implementation of a control scheme for maintaining an average motor phase current at a demanded level of bias current, while simultaneously keeping a dc-link voltage of an auxiliary converter close to a preferred value; FIG. 14A shows sample phase currents for continuous conduction operation, in accordance with various examples and embodiments of the present disclosure; FIG. 14B shows the ratio of the modulus of the pairwise phase current differences to maximum phase current for phase current pairs (1,2) and (2,3), in accordance with various examples and embodiments of the present disclosure; FIG. 15 shows a number of example transition functions, in accordance with various examples and embodiments of the present disclosure; FIG.16A shows the auxiliary converter source voltages for two pairs of voltage sources with an abrupt change in source pair, in accordance with various examples and embodiments of the present disclosure; FIG.16B shows the auxiliary converter source voltages for two pairs of voltage sources with a smooth change in source pair, in accordance with various examples and embodiments of the present disclosure;FIG. 17A shows the auxiliary converter source powers for two pairs of voltage sources with an abrupt change in source pair, in accordance with various examples and embodiments of the present disclosure; FIG. 17B shows the auxiliary converter source powers for two pairs of voltage sources with a smooth change in source pair, in accordance with various examples and embodiments of the present disclosure; FIG. 18A and FIG. 18B show motor phase currents and auxiliary source voltages for an example excitation case, in accordance with various examples and embodiments of the present disclosure; FIG.19 shows the auxiliary converter individual source powers, total source power, and total resistive loss as a function of electrical angle, for the example excitation case of FIG.18A and FIG.18B, in accordance with various examples and embodiments of the present disclosure; FIG. 20 shows the Fourier series components for four source voltages and their sum, showing the first eighteen components; FIG. 21 shows the Fourier series power amplitudes for sources ^^and ^^^, carrying currents ^^and ^^, respectively; FIG. 22 shows the alignment of the auxiliary converter nodal voltages for the various permutations of sign and magnitude of voltage sources ^^and ^^; FIG.23 shows the individual source voltages for four voltage sources implemented as per the arrangement of FIG.9, together with the resulting total bias voltage given by the sum of the four sources, for an excitation case on the edge of continuous conduction, in accordance with various examples and embodiments of the present disclosure; FIG.24A and FIG.24B show the nodal voltages for the two auxiliary converters together with the phase currents and difference currents, for the excitation case of FIG.23, in accordance with various examples and embodiments of the present disclosure; FIG.25 shows the individual source voltages, together with the resulting total bias voltage given by the sum of the four sources, for an excitation case in deep continuous conduction, in accordance with various examples and embodiments of the present disclosure; FIG.26A and FIG.26B show the nodal voltages for the two auxiliary converters together with the phase currents and difference currents, for the excitation case of FIG.25, in accordance with various examples and embodiments of the present disclosure;FIG. 27 shows a combined control block diagram for a pair of auxiliary converters, in accordance with various examples and embodiments of the present disclosure; FIG.28 shows an example per-cycle average change in dc-link voltage; FIG.29 shows a peak dc-link voltage variation during each PWM cycle; FIG. 30 shows a block diagram illustrating generation of main inverter nodal voltage demands from motor phase voltage demands, in accordance with various examples and embodiments of the present disclosure; FIG.31 shows an example of a control block diagram for three voltage source pairs when operated in combination with a three-phase machine and a three-phase inverter, in accordance with various examples and embodiments of the present disclosure. DETAILED DESCRIPTION

[0011] In the following description, for purposes of explanation, numerous specific details of certain examples are set forth. Reference in the specification to “an example” or similar language means that a particular feature, structure, or characteristic described in connection with the example is included in at least that example, but not necessarily in other examples.

[0012] FIG.1 shows an asymmetric bridge power converter for driving an SRM. The asymmetric bridge of FIG.1 is arranged to drive an SRM having three phases. A first phase comprises a first phase winding 1 electrically coupled to a first bridge leg A and a second bridge leg B. First bridge leg A comprises a first active switch Q1 and a first diode D1, whilst second bridge leg B comprises a second active switch Q2 and a second diode D2. A second phase comprises a second phase winding 2 electrically coupled to a first bridge leg C and a second bridge leg D. First bridge leg C comprises a first active switch Q3 and a first diode D3, whilst second bridge leg D comprises a second active switch Q4 and a second diode D4. A third phase comprises a third phase winding 3 electrically coupled to a first bridge leg E and a second bridge leg F. First bridge leg E comprises a first active switch Q5 and a first diode D5, whilst second bridge leg F comprises a second active switch Q6 and a second diode D6.

[0013] The active switches Q1 to Q6 in FIG. 1 are shown as insulated-gate bipolar transistors (IGBTs), but those skilled in the art will appreciate that alternative functionally equivalent semiconductor devices can be utilized in place of the IGBTs or diodes. For example, any type of power field effect transistor (FET), bipolar junction transistor (BJT) or gate turn-off (GTO) thyristor could be used. The semiconductor device used may be fabricated from a range of semiconductor materials.

[0014] Operation of the circuit of FIG.1 will be described by reference to the first phase. During a magnetisation mode, when the first phase winding 1 needs to establish a magnetic field, active switches Q1 and Q2 are switched on. Current ^^flows through switch Q1, through phase winding 1 from leg A to leg B, and through switch Q2. The voltageacross phase winding 1 will be equal to +^^^. In a freewheeling mode, only one of Q1 or Q2 is switched on. For example, if Q1 is switched on and Q2 is switched off, then current ^^will flow through switch Q1, through phase winding 1 from leg A to leg B, and through diode D2. The voltageacross phase winding 1 will drop to zero. During a demagnetisation mode, when the first phase winding 1 no longer needs to establish a magnetic field, both of Q1 and Q2 are switched off. Current ^^flows through diode D1, through phase winding 1 from leg A to leg B, and through diode D2. The voltageacross phase winding 1 will be equal to −^^^.

[0015] Each asymmetric bridge provides excitation of one electrical phase with a unidirectional current by application of three possible voltage states: +^^^, 0, −^^^. The asymmetric bridge has the advantage of requiring a low number of semiconductor devices in order to function. Using the asymmetric bridge power converter, each phase can be controlled independently. However, commercially available power modules are typically available only in multiples of a fully populated half-bridge format, where each device position comprises an active switch and an anti-parallel diode.

[0016] FIG. 2 shows an example of an asymmetric bridge implemented using commercially available power modules, whereby two fully populated half-bridge legs are required per phase. A first phase comprises a first phase winding 1 electrically coupled to a first bridge leg A and a second bridge leg B. Bridge leg A comprises first and second active switches Q1, Q2 as well as first and second diodes D1, D2. Bridge leg B comprises third and fourth active switches Q3, Q4 as well as third and fourth diodes D3, D4. A second phase comprises four active switches Q5 to Q8, and four diodes D5 to D8. A third phase comprises four active switches Q9 to Q12, and four diodes D9 to D12.

[0017] FIG.3 shows an example of a power electronic converter typically used to drive a three- phase machine. A total of six switches, Q1 to Q6, and six diodes, D1 to D6, are used to deliver three balanced currents which are typically sinusoidal with an offset of 120° between phases. Ifthe phase voltages are also sinusoidal, then the maximum peak volage across each phase is ^^^ ∙√3⁄ 2 , where ^^^ is the dc-link voltage. The peak bridge leg currents, given by the differencebetween the phase currents, are √3⁄ 2 times the individual peak phase currents. Accordingly, thetotal load VA supported by the three-phase inverter for a given dc-link voltage ^^^and a switch current rating ^^^is equal to 3^^^^^^.

[0018] For the arrangement of FIG.2, which uses double the number of power semiconductors compared to the arrangement of FIG.3, the maximum peak voltage available across each phase is equal to the dc-link voltage, and the maximum peak phase current is equal to the switchcurrent, and therefore the total load VA supported by the arrangement of FIG. 2 is also equal to3^^^^^^. Therefore, the power semiconductors are utilised poorly in the arrangement of FIG. 2compared to that of the arrangement of FIG.3.

[0019] Although the current and voltage waveforms applied to an SRM are not typically sinusoidal, the total installed VA rating of the power semiconductors in the arrangement of FIG. 2 can be expected to be much higher than that of the arrangement of FIG. 3, and therefore the use of commercially available power-switching modules to implement the arrangement of FIG. 2 is unlikely to be cost-effective.

[0020] FIG.4 shows an alternative arrangement comprising asymmetric bridge legs at each end of a series string of phase windings. A plurality of phase windings 1, 2 and 3, are connected in series, with a fully populated bridge leg at each intermediate node. Specifically, bridge leg B is connected at the node common to phase winding 1 and phase winding 2, and bridge leg C is connected at the node common to phase winding 2 and phase winding 3. At the ends of the string, asymmetric bridge legs A and D are connected to phase winding 1 and phase winding 3 respectively. The asymmetric bridge legs A and D at either end of the series string of phase windings carry the full phase current (i.e. the dc-component plus the ac-component), whilst the bridge legs B and C at the intermediate nodes carry only the ac-component of the current. If implemented using fully-populated half-bridge legs in each of the positions (i.e. four half-bridge legs for the example of FIG. 4), then the arrangement of FIG. 4 offers a more cost-effective alternative to the arrangement of FIG.2, but still falls short of the potential cost-savings possible with the arrangement of FIG.3.

[0021] FIG. 5 shows an arrangement using a controllable voltage source in series with phase windings to form a phase ring PR. A controllable voltage source ^^is connected in series with a first phase winding 1, a second phase winding 2, and a third phase winding 3. Voltage source ^^delivers current ^^ through the series of phase windings 1, 2 and 3. The dc-component of current^^is controlled to provide a substantially constant circulating current. The ac-components ^^^,^^^ and ^^^ are controlled by a three-phase inverter formed of six switches Q1 to Q6. The dc-component of current ^^circulates around the phase ring PR, but does not flow through theswitches, Q1 to Q6, of the bridge arrangement, thus reducing the required current rating of the switches Q1 to Q6 and / or reducing losses in the switches.

[0022] The sum of the voltages around the ring PR must be zero. Therefore: ^^ = ^^ + ^^ + ^^

[0023] If ^^ is defined as a stiff dc voltage source, then the sum of voltages+ ^^ + ^^ mustalso be a fixed voltage, thus removing one degree of freedom from the currents ^^^, ^^^and ^^^.Considering just the ac-component of the voltages ^^ + ^^ + ^^, the sum of these ac-components must be zero, in the same manner as for a conventional three-phase bridge with a delta-connected load. If the three voltages and currents form a balanced, but not necessarily sinusoidal, three-phase set, then the resulting ac voltages cannot contain any triplen harmonics of the fundamental, thus limiting the range of voltage waveforms that may be applied.

[0024] Full flexibility of the arrangement of FIG. 5 can be guaranteed only if ^^also has a controlled ac-component with a voltage bandwidth equivalent to that of the bridge legs. The amplitude of the ac-component, consisting only of the triplen harmonics, can be expected to be smaller than that of the bridge legs. Additionally, ^^must be equal to ^^, and therefore the voltage source ^^must be capable of absorbing the ac-component of the phase current ^^. As such, for the arrangement of FIG.5 to control the three phase currents,^^and ^^, with full flexibility of control, voltage source ^^would be required to be a wide-band voltage source with an ac- capability equal to that of the bridge legs, and a dc-capability equal to the average phase current required by the SRM. Voltage source ^^would also need to be electrically isolated from the dc- link, thus increasing the complexity of the arrangement with respect to powering the voltage source.

[0025] The arrangement of FIG.5 makes use of a series voltage source ^^added to a three-phase inverter having three bridge legs. By adding said series voltage source ^^, a dc or slowly varying current may be superimposed on the ac current waveform delivered by the three-phase inverter. The arrangement of FIG.5 therefore makes better use of commercially available ‘off-the-shelf’ inverter hardware. If the voltage source ^^is considered to be capable of synthesising an arbitrary voltage waveform having wide bandwidth, then the resulting converter arrangement has four independently controllable voltage nodes, and can therefore control three independent currents. The arrangement of FIG.5 is therefore equivalent in operation to the asymmetric series arrangement of FIG.4, but with the added benefit of interphase current cancellation in all three bridge legs.

[0026] With the arrangement of FIG.4, the number of bridge legs can be reduced to one more than the number of phases. For example, an arrangement for a three-phase SRM can be implemented using four bridge legs. However, the outermost bridge legs in the series string of phase windings of this arrangement do not benefit from the inter-phase current cancellation, and thus the losses for this series arrangement are greater than for an unbroken ring arrangement, such as shown in FIG.5.

[0027] The series voltage source ^^of the arrangement of FIG.5 requires an external source of power. Providing an external source of power is inconvenient in applications where the only readily available source of significant power is that associated with the main inverter, which is typically a high voltage ac or dc source. For example, a typical electric vehicle dc bus will be in the range of 200 V to 1000 V, whereas the voltage source required to deliver the dc current will typically be less than 10% of this voltage. When the requirement for isolation is also taken into account, a power electronic solution will typically involve an isolated dc-dc converter with a power rating of 10% to 20% of the rated power of the motor (dependent on peak-dc losses, which may be up to 20 kW on a 100 kW peak rated traction motor). In a typical three-phase application the additional cost of a galvanically-isolated series voltage source may easily exceed the cost of the asymmetric series arrangement utilising an additional bridge leg.

[0028] Compared to a conventional asymmetric bridge arrangement implemented using fully populated commercially-available half-bridge modules, a ring or series topology offers a more cost-effective converter solution for driving SRMs. However, the ring and series arrangements of FIG.4 and FIG.5 have drawbacks as discussed above.

[0029] It is in this context that the described embodiments of FIG. 6 to FIG. 11 have been devised. In particular, there is provided herein a power electronic arrangement comprising a main inverter and one or more voltage sources, said one or more voltage sources implemented by one or more auxiliary converters. The one or more voltage sources are connected in series with the phases to form a ring. Arrangements are also described herein that make use of more than one voltage source in a phase arm. Accordingly, the total number of series voltage sources can be between one voltage source and twice the number of voltage sources as there are bridge legs in the main inverter.

[0030] The auxiliary converters are operable to drive a circulating bias current through the SRM phase windings, with said bias current being combined with currents supplied by the main inverter in order to regulate the net current supplied to each phase winding. In the case of steady- state excitation, the bias current comprises a dc-component along with selected harmonics ofthe SRM excitation current. In a more general case of varying excitation due to changes in desired SRM phase winding currents, an average value of the bias current will follow that of the desired SRM phase winding currents.

[0031] The various embodiments provided herein have an advantage in that the power to drive the circulating bias current in the one or more series voltage sources is derived directly from the ac-components of the phase currents synthesised by the main inverter. These synthesised currents may be the SRM excitation currents themselves, or may be a current injected into the phase winding having a different frequency spectrum to that of the SRM excitation currents. The one or more series voltage sources that support the circulating bias current are synthesised using the same auxiliary converter as is used to provide the power to drive the circulating bias current. Therefore, no additional power source is required, and thus there is no requirement for the voltage source(s) to be galvanically isolated from the main inverter.

[0032] Additionally, the series voltage source(s) may be integrated into or onto the SRM without having to provide a separate or additional power connection. The series voltage source(s) may be co-packaged with the main inverter. The series voltage sources may be packaged separately from the main inverter and / or the SRM.

[0033] A power electronic arrangement as described herein may be used to drive a switched reluctance machine (SRM). The power electronic arrangement may comprise a plurality of phase arms. The term “phase arm” as used herein describes a phase winding, optionally in series with one or more voltage sources, wherein a phase arm is connected between two bridge legs. The plurality of phase arms may be connected in series so as to form a ring, wherein a flow of current around the phase arms is enabled.

[0034] The power electronic arrangement may further comprise a main inverter. The main inverter may comprise a plurality of inverter bridge legs. The quantity of the plurality of inverter bridge legs may be equal to a quantity of phase arms. For example, for a power electronic arrangement configured to drive a two-phase SRM the main inverter may have two bridge legs. For a power electronic arrangement configured to drive a three-phase SRM, the main inverter may have three bridge legs. Each of the bridge legs may be connected at a switched node to two of the plurality of phase arms, in such a way that each of the phase arms is connected to two of the plurality of bridge legs. This is to say, each of the phase arms is connected to exactly two bridge legs, and each bridge leg is connected to exactly two phase arms.

[0035] At least one of the phase arms may comprise at least one voltage source connected in series with the respective phase winding. In some examples, a phase arm may comprise a singlevoltage source in series with the respective phase winding. In some examples, a phase arm may comprise two voltage sources in series with the respective phase winding. In some examples only one of the phase arms may comprise one or two voltage sources in series with the respective phase winding. In some examples a plurality of the phase arms may comprise one or two voltage sources in series with the respective phase winding.

[0036] In some examples the at least one voltage source connected in series with a respective phase winding may be operable to provide a voltage which supports a circulating bias current in the plurality of phase arms. The circulating bias current may be a bias current with a dc- component. In some examples the circulating bias current may comprise harmonics of the SRM excitation current. The circulating bias current may be combined with currents supplied by the main inverter to regulate a net current supplied to each phase winding. In some examples the circulating bias may be controlled independently of currents provided by the main inverter.

[0037] In some examples the at least one voltage source may be operable to provide a voltage having components at a fundamental electrical frequency of the SRM. In some examples the at least one voltage source may be operable to provide a voltage having components at one or more harmonics of the fundamental electrical frequency of the SRM. In some examples the at least one voltage source may be operable to provide a voltage having components at a frequency different from the fundamental electrical frequency of the SRM. In some examples the at least one voltage source may be operable to provide a voltage having components at a frequency different from the harmonics of the fundamental electrical frequency of the SRM.

[0038] In some examples the at least one voltage source may be implemented by means of an auxiliary converter. In some examples two voltage sources in series, connected to a common bridge leg, may be implemented by means of an auxiliary converter having three half-bridge legs, the three half-bridge legs having a common dc-link. In some examples a single voltage source may be implemented by means of an auxiliary converter having two half-bridge legs, the two half- bridge legs having a common dc-link. In some examples a plurality of voltage sources may be implemented by means of a plurality of auxiliary converters. In some examples each of the plurality of auxiliary converters may have a separate local dc-link. In examples, the dc-link may be provided by means of one or more capacitors.

[0039] In some examples a first terminal of a first voltage source and a first terminal of a second voltage source may be electrically coupled to a common switched node of a bridge leg of the main inverter. A second terminal of the first voltage source may be connected to a first phase winding. A second terminal of the second voltage source may be connected to a second phasewinding. In some examples a first terminal of a voltage source may be electrically coupled to a switched node of a bridge leg of the main inverter. A second terminal of the voltage source may be connected to a first phase winding.

[0040] In some examples a voltage rating of a plurality of switches which comprise the half- bridge legs of the auxiliary converter(s) may be less than a voltage rating of a plurality of switches which comprise the main inverter bridge legs. In some examples a current rating of a plurality of switches which comprise the main inverter bridge legs is less than a current rating of a plurality of switches which comprise the half-bridge legs of the auxiliary converter(s).

[0041] A power electronic arrangement as disclosed herein may be controlled by a method that includes steps of controlling at least one voltage source to provide a circulating bias current in the plurality of phase arms, and controlling the plurality of inverter bridge legs to provide a plurality of currents at a respective switched node of the bridge legs. Controlling at least one voltage source may comprise switching one or more active switch devices of one or more auxiliary converters. In some examples switching one or more active switch devices of one or more auxiliary converters may comprise using a pulse-width-modulation (PWM) technique to generate a desired voltage at the voltage source, or to provide a desired circulating bias current. Controlling the plurality of inverter bridge legs may comprise switching one or more active switch devices of the main inverter. In some examples switching one or more active switch devices of the main inverter may comprise using a pulse-width-modulation (PWM) technique to provide one or more desired currents.

[0042] In examples controlling the circulating bias current and / or controlling the plurality of currents provided by the main inverter may be operable to regulate a current flowing in one or more phase arms of a plurality of phase arms. In some examples the electrical power used by a voltage source of the at least one voltage source(s) to provide the circulating bias current may be derived from a current flowing in said voltage source. In some examples said electrical power may be derived from one or more ac-components of the plurality of currents provided by the main inverter. In examples there may be no additional or external power source connected to the auxiliary converter to generate the one or more voltage sources. In some examples the one or more voltage sources may not be galvanically isolated from the main inverter.

[0043] The plurality of currents provided by the main inverter may comprise components at a fundamental electrical frequency of the SRM. The plurality of currents provided by the main inverter may comprise components at harmonics of the fundamental electrical frequency of theSRM. The plurality of currents provided by the main inverter may comprise components at frequencies different from a harmonic spectrum of the excitation currents of the SRM.

[0044] Controlling the power electronic arrangement may comprise measuring an average phase current for one or more of the phase arms. In some examples the at least one voltage source may be controlled to maintain a measured average phase current at a value equal to a specified circulating bias current. Controlling the power electronic arrangement may comprise controlling the at least one voltage source to maintain a dc-link voltage of the auxiliary converter at a value substantially the same as a specified value, or within a threshold of a specified value.

[0045] The power electronic arrangement of various embodiments herein may be used as part of a switched reluctance machine comprising a stator, a rotor, and a housing. In some examples one or both of the at least one voltage source and the main inverter may be integrated within said housing. In some examples one or both of the at least one voltage source and the main inverter may be housed separately from the housing of the SRM. In some examples the at least one voltage source and the main inverter may be integrated in a single package.

[0046] FIG.6 shows an example of a power converter for driving a three-phase SRM, comprising a main inverter and an auxiliary converter implementing two voltage sources.

[0047] The main inverter comprises bridge legs A, B and C, said bridge legs formed from switches Q1 to Q6. The auxiliary converter comprises bridge legs S, T and U, said bridge legsformed from switches Q7 to Q12. The auxiliary converter comprises a local dc-link capacitor,^^^^. A first phase winding 1 is electrically coupled between bridge leg A and bridge leg B of themain inverter. A second phase winding 2 is electrically coupled between bridge leg A of the main inverter and bridge leg S of the auxiliary converter. A third phase winding 3 is electrically coupled between bridge leg U of the auxiliary converter and bridge leg A of the main inverter. Bridge leg C of the main inverter is electrically coupled to bridge leg T of the auxiliary converter, such thatvoltage ^^ = ^^.

[0048] The combination of a phase winding and synthesised voltage source in series may be referred to as a phase arm. A first phase arm may comprise the first phase winding 1. The first phase arm is connected between legs A and B of the main inverter. A second phase arm may comprise the second phase winding 2 in series with the voltage source ^^. The second phase arm is connected between legs B and C of the main inverter. A third phase arm may comprise the third phase winding 3 in series with the voltage source ^^. The third phase arm is connected between legs C and A of the main inverter. The voltages, ^^^^, ^^^^and ^^^^, in the first, second and third phase arms, respectively, are therefore:^^^^ = ^^ − ^^ = ^^^^^^ = ^^ − ^^ = ^^ − ^^^^^^ = ^^ − ^^ = ^^ − ^^

[0049] Each inverter phase arm therefore supports one phase winding voltage,^^or ^^, and in addition the second and third phase arms, respectively, support voltages −^^and −^^.

[0050] The auxiliary converter is operable to synthesise a voltage to support a circulating biascurrent through the phase windings. The auxiliary converter comprises a local dc-link capacitor,^^^^. The local dc-link capacitor ^^^^ extracts power from the ac currents synthesised by themain inverter and converts it into power that supports the circulating bias current through the phase windings.

[0051] Additionally, the auxiliary converter is operable to synthesise an alternating voltage that interacts with the ac-components of the current through the phase windings. Voltages ^^and ^^are generated by switching of bridge legs S, T and U of the auxiliary converter. Voltages ^^and ^^are defined as: ^^ = ^^ − ^^and, ^^ = ^^ − ^^

[0052] Each of ^^and ^^can take on three possible voltage states: +^^^^, 0, −^^^^. The voltage of each of ^^and ^^will depend upon the state of the switches in adjacent bridge legs. The voltages of ^^and ^^according to various switch states are as follows: Q7 Q8 Q9 Q10 Q11 Q12^^^ off on off on on off+^^^^0 off on on off on off 0 +^^^^off on off on off on 0 0 off on on off off on−^^^^ +^^^^on off off on on off +^^^^−^^^^on off on off on off 0 0 on off off on off on 0−^^^^on off on off off on −^^^^0

[0053] A time averaged intermediate voltage can be generated using the auxiliary converter by techniques such as pulse width modulation (PWM) of the switches at a suitable rate. In some examples, PWM may be performed in the range of 1 kHz to 100 kHz.

[0054] Since the voltages ^^and ^^are primarily associated with the development of the average or dc-bias component of the circulating current, their magnitudes will be of the order of the bias current multiplied by the sum of the phase resistances. Accordingly, ^^and ^^will be relatively small compared to the dc-link voltage, ^^^, of the main inverter. The value of the auxiliary inverter dc-link, ^^^^, can therefore be chosen to be much smaller than ^^^. In some examples, the value of the ^^^^is between 10% to 20% of ^^^. Accordingly, the use of low-voltage switching devices in the auxiliary converter is permitted for switches Q7 to Q12. Examples of suitable low-voltage switching devices may comprise silicon MOSFETs, GaN FETs, or similar.

[0055] In operation of the arrangement of FIG.6, the currents carried by the switches of the main inverter consist solely of the difference components of the phase current. This is to say: ^!"#$ = ^^ − ^^^!"#& = ^^ − ^^

[0056] If we break the phase currents down into the circulating bias current and the ac excitation components, where ^'is the average circulating bias current, andis the ac excitationcomponent consisting of the fundamental electrical frequency and the harmonics thereof, then^^ can be written as:^^ = ^' + (^̃thus showing that the difference currents carried by the main inverter phase legs do not include the circulating current. On the other hand, the currents carried by sources ^^and ^^do include the circulating currents, and are equal to the total respective phase currents ^^and ^^.

[0057] The average phase current of a typical SRM may be of a greater magnitude compared to the fundamental frequency component. For example, taking an offset sinewave current with a minimum of 100 A and a maximum of 700 A, the average value of said current is 400 A, whereas the alternating current amplitude is 300 A. Using the example arrangements of FIG.1 or FIG.2, each of the inverter bridge legs must be capable of carrying the combined current, which has anRMS value of 453 A. However, assuming a balanced three-phase excitation in the main inverter of the arrangement of FIG.6, the RMS current in each of the main inverter bridge legs would be that of the alternating difference current component alone, which has an RMS value of 367 A. Accordingly, using the arrangement of FIG.6, the average RMS current carried by any of the main inverter bridge legs will be lower than for arrangements such as those of FIG.1 or FIG.2, where the inverter bridge legs must carry the total phase current.

[0058] Accordingly, for implementations where the inverters employ identical switching devices, the losses in the main inverter of FIG.6 can be expected to be lower than those of the inverters of FIG.1, FIG.2 or FIG.4. This is due to (i) a smaller number of bridge legs, and (ii) lower losses in some or all of said bridge legs.

[0059] Although FIG. 6 shows the switching devices as MOSFETs, the semiconductor devices used to implement the main inverter and the auxiliary converter may be chosen in different ways according to desired operating parameters of the system.

[0060] FIG.7 shows an example of a power converter for driving a three-phase SRM, comprising a main inverter implemented by a combination of an IGBT and an antiparallel diode, and an auxiliary converter implemented using an asymmetric configuration. If individual phase winding currents are unidirectional, then some of the bridge legs of the auxiliary voltage source may be implemented using an asymmetric configuration, with bridge legs having one active switching device and one diode in each leg. According to the example shown in FIG.7, bridge legs S and U of the auxiliary converter are implemented with an asymmetric configuration, whilst bridge leg T of the auxiliary converter is implemented as a fully populated bridge leg.

[0061] Provided the currents ^^and ^^are greater than zero, each of ^^and ^^can take on three possible voltage states: +^^^^, 0, −^^^^. The voltage of each of ^^and ^^will depend upon the state of the switches in adjacent bridge legs. The voltages of ^^and ^^according to various switch states are as follows: D7 Q8 Q9 Q10 Q11 D12^^^ off on off on on off+^^^^0 off on on off on off 0 +^^^^off on off on off on 0 0 off on on off off on −^^^^+^^^^on off off on on off +^^^^−^^^^on off on off on off 0 0 on off off on off on 0−^^^^on off on off off on−^^^^0

[0062] The general operation of the arrangement of FIG. 7 is substantially the same as that of FIG.6, however supporting unidirectional phase winding currents only.

[0063] FIG.8 shows a generic arrangement for a power converter for driving a three-phase SRM, having two series voltage sources. This generic arrangement represents a genericised version of the arrangements shown in FIG. 6 and FIG. 7. In the example of FIG. 8, a first bridge leg A comprises first switching device Q1 and second switching device Q2. A second bridge leg B comprises first switching device Q3 and second switching device Q4. A third bridge leg C comprises first switching device Q5 and second switching device Q6. First phase winding 1 is electrically coupled between bridge leg A and bridge leg B. Second phase winding 2 is electrically coupled in series with voltage source ^^, between bridge leg B and bridge leg C. Third phase winding 3 is electrically coupled in series with voltage source ^^, between bridge leg C and bridge leg A. Voltage source ^^and voltage source ^^share a common connection at bridge leg C.

[0064] For each of the arrangements of FIG.6, FIG.7 and FIG.8, the two series voltage sources^^ and ^^ are not galvanically isolated from one another, having a point of common connection.The resulting auxiliary converter has a common dc-link, which allows for any ripple current components which arise to be compensated, either partially or fully, between the two series voltage sources ^^and ^^. Consequently, the amount of local energy storage and size of dc-link capacitor ^^^^associated with ^^^^may be minimised.

[0065] FIG. 9 shows an example of a generic arrangement for a power converter for driving a three-phase SRM, comprising a main inverter, and four voltage sources implemented by two dual-source auxiliary converters. In the example of FIG. 9, a first bridge leg A comprises first switching device Q1 and second switching device Q2. A second bridge leg B comprises first switching device Q3 and second switching device Q4. A third bridge leg C comprises first switching device Q5 and second switching device Q6. First phase winding 1 is electrically coupled in series with voltage source ^*, between bridge leg A and bridge leg B. Second phase winding 2 is electrically coupled in series with voltage sources ^^^and ^^^, between bridge leg B and bridge leg C. Third phase winding 3 is electrically coupled in series with voltage source ^^, between bridge leg C and bridge leg A. Voltage source ^^^and voltage source ^^share a commonconnection at bridge leg C. Voltage source ^*and voltage source ^^^share a common connection at bridge leg B.

[0066] As a result of having at least one voltage source per phase, the dc bias voltage may be divided equally between the phases and therefore the individual voltage sources can each have a lower rated voltage compared to embodiments utilising fewer voltage sources. Additionally, the ac-components of and additional voltages and / or currents synthesised by the main inverter may be balanced across the phases of the SRM, thus simplifying control and providing a straightforward route to minimising any additional alternating energy exchange with the dc-link of the main inverter.

[0067] FIG.10 shows an example of a generic arrangement for a power converter for driving a three-phase SRM, comprising a main inverter, and two voltages in series with each of the phase windings. In the example of FIG.10, a first bridge leg A comprises first switching device Q1 and second switching device Q2. A second bridge leg B comprises first switching device Q3 and second switching device Q4. A third bridge leg C comprises first switching device Q5 and secondswitching device Q6. First phase winding 1 is electrically coupled in series with voltage sources^*^ and ^*^, between bridge leg A and bridge leg B. Second phase winding 2 is electricallycoupled in series with voltage sources ^^^and ^^^, between bridge leg B and bridge leg C. Third phase winding 3 is electrically coupled in series with voltage sources ^^^and ^^^, between bridge leg C and bridge leg A. Voltage source ^^^and voltage source ^*^share a common connection at bridge leg A. Voltage source ^*^and voltage source ^^^share a common connection at bridge leg B. Voltage source ^^^and voltage source ^^^share a common connection at bridge leg C.

[0068] The arrangement of FIG.10 combines the advantages of the embodiments of FIG.6 and FIG.9. Specifically, each phase is supported by two voltage sources, with one voltage source on each side of the respective phase winding. Each bridge leg is therefore associated with a separate auxiliary converter, which can be implemented in the same manner as for the embodiment of FIG.6.

[0069] FIG. 11 shows an example of an arrangement for a power converter implementing the generic arrangement shown in FIG.10, comprising a main inverter and three auxiliary converters, each of the three auxiliary converters implementing two voltage sources. The main inverter comprises bridge legs A, B and C, said bridge legs formed from switches Q1 to Q6.

[0070] A first auxiliary converter comprises bridge legs S, T and U, said bridge legs formed from switches Q19 to Q24. The first auxiliary converter comprises a first local dc-link capacitor ^^^^^. A second auxiliary converter comprises bridge legs P, Q and R, said bridge legs formed fromswitches Q13 to Q18. The second auxiliary converter comprises a second local dc-link capacitor^^^^^. A third auxiliary converter comprises bridge legs L, M and N, said bridge legs formed fromswitches Q7 to Q12. The third auxiliary converter comprises a third local dc-link capacitor ^^^^^.

[0071] A first phase winding 1 is electrically coupled between bridge leg N of the third auxiliary converter and bridge leg P of the second auxiliary converter. A second phase winding 2 is electrically coupled between bridge leg R of the second auxiliary converter and bridge leg S of the first auxiliary converter. A third phase winding 3 is electrically coupled between bridge leg U of the first auxiliary converter and bridge leg L of the third auxiliary converter.

[0072] Bridge leg A of the main inverter is electrically coupled to bridge leg M of the third auxiliaryconverter, such that voltage ^^ = ^+. Bridge leg B of the main inverter is electrically coupled tobridge leg Q of the second auxiliary converter, such that voltage ^^ = ^^. Bridge leg C of the maininverter is electrically coupled to bridge leg T of the first auxiliary converter, such that voltage^^ = ^^.

[0073] A first phase arm may comprise the first phase winding 1 in series with voltage sources^*^ and ^*^. The first phase arm is connected between legs A and B of the main inverter. A secondphase arm may comprise the second phase winding 2 in series with voltage sources ^^^and ^^^. The second phase arm is connected between legs B and C of the main inverter. A third phase arm may comprise the third phase winding 3 in series with voltage sources ^^^and ^^^. The thirdphase arm is connected between legs C and A of the main inverter. The voltages, ^^^^, ^^^^ and^^^^, in the first, second and third phase arms, respectively, are therefore:^^^^ = ^^ − ^^ = ^^ − ^^^ − ^^^^^^^ = ^^ − ^^ = ^^ − ^^^ − ^^^

[0074] The first auxiliary converter is operable to synthesize an alternating voltage that interacts with the ac-components of the current through the phase windings. Voltages ^^^and ^^^are defined as: ^^^ = ^^ − ^^and, ^^^ = ^^ − ^^

[0075] The second auxiliary converter is operable to synthesize an alternating voltage thatinteracts with the ac-components of the current through the phase windings. Voltages ^^^ and^*^ are defined as:^^^ = ^, − ^^and,

[0076] The third auxiliary converter is operable to synthesize an alternating voltage that interacts with the ac-components of the current through the phase windings. Voltages ^*^and ^^^are defined as:and,

[0077] Each of ^^^, ^^^, ^^^, ^^^, ^*^and ^*^can take on three possible voltage states: +^^^^, 0, −^^^^. The voltage of each of ^^^, ^^^, ^^^, ^^^, ^*^and ^*^will depend upon the state of the switches in adjacent bridge legs in the respective auxiliary converter.

[0078] Advantageously, for arrangements according to the present disclosure, the switches of the main inverter can be sized to carry only the difference current, as opposed to the full phase currents. Under conditions of symmetrical excitation, each of the main inverter legs is subject to the same loading. Therefore, due to the absence of any dc current, both switch positions in each bridge leg will be subject to the same average loading, thus leading to equidistribution of losses across the main inverter switches. Accordingly, the function of the main inverter switches can be implemented using commercially available power switching modules comprising one or more fully populated half bridges having equal current rating. This contrasts with the inverter arrangements of FIG.1, FIG.2 or FIG.4, where the presence of a dc component in one or more of the bridge legs will lead to an asymmetric distribution of losses across the inverter switch positions.

[0079] The lower voltage devices in the auxiliary converter can be expected to be of a lower cost and generate lower losses when compared to the higher voltage devices of the main inverter. The overall cost of the main inverter and the auxiliary converter can therefore be expected to be lower than that of the inverter according to the arrangement of FIG.4, where the number of bridge legs must be one greater than the number of phases (e.g. four bridge legs for a three-phaseimplementation), and where at least two of the bridge legs must be rated for the full phase current. Additionally, the overall efficiency of the combined main inverter and auxiliary converter can be expected to be higher than that of the arrangement of FIG.4.

[0080] Those skilled in the art will recognise that there are many possible alternative arrangements which may use different numbers of SRM phases and / or different numbers of voltage sources. These alternative arrangements have the same advantages discussed in relation to the various specific embodiments described herein.

[0081] A method of control of the power electronic arrangements herein may comprise an operation making direct use of the motor excitation currents.

[0082] We begin by examining the case where the ac components of the auxiliary voltages are at the fundamental electrical frequency of the motor and its harmonics.

[0083] By applying Kirchoff’s voltage law around the loop comprising the phase arms, we observe that: ^^^^ + ^^^^ + ^^^^ = ^^ + ^^ + ^^ − ^^ − ^^ = 0

[0084] Each of the time-varying voltages ^^, ^^, ^^, ^^and ^^may be represented by a Fourier series:

[0085] Here j is an index representing one of the voltage sources, @ ∈ B1, 2, 3, E, FG, ^' is theaverage or dc component of the voltage and k represents the harmonic order of the ac terms. When applied to the voltages in the phase loop, both the dc and ac components of all voltages in the loop must sum to zero. In particular, where the dc components of the each of the phase voltages are equal to the dc-bias voltage ^', we have: 3^' − ^^' − ^^' = 0

[0086] And, writing the harmonic components of each voltage in the form ^H / 4+; / 4<=, we observe:^H^4 + ^H^4 + ^H^4 − ^H^4 − ^H^4 = 0

[0087] In a similar manner the phase currents ^^, ^^and ^^may also be represented by Fourier series:

[0088] Here ^'is the average or dc-bias component of the circulating current and its value is assumed to be the same for all phases (i.e. symmetrical excitation).

[0089] The total dc power delivered by the two sources must be equal to 3^'^'and in order to balance this, the same power, plus an amount to compensate for losses in the auxiliary converter, must be recovered from the main inverter. Expressing the power flow out of the sources in terms of their Fourier series components:

[0090] Of the power product terms between voltage and current, only those with the same harmonic order will produce a net non-zero power. For example, the first harmonic components of voltage and current produce a combined power:

[0091] This consists of two components: an oscillating term at twice the frequency of the first harmonic and a dc term:

[0092] The magnitude of the dc term is:

[0093] Given values of ^^^and ^^^, appropriate values for ^^^, ;^<^, ^^^, ;^<^may be chosen in order to balance the dc power 3^'^'. In particular, by choosing ;^<^such that ^^^is substantially in phase opposition with ^^^and similarly choosing ;^<^such that ^^^is substantially in phase opposition with ^^^, we can maximise the power extracted from the first harmonic ac current synthesised by the main inverter. A similar argument can be applied to higher harmonics of the synthesised current, the total power being the sum of all dc power components across all harmonics for which there is a corresponding harmonic component of voltages ^^and ^^.

[0094] The second condition is that of voltage balance: ^H^4 + ^H^4 + ^H^4 = ^H^4 + ^H^4

[0095] This implies that each harmonic component of phase loop voltage must individually sum to zero.

[0096] When the machine excitation currents are used to derive the power for the series voltage sources, the unmodified main inverter phase voltages and currents form a balanced three-phase ^Pset with a mutual phase displacement of 120° or^radians at the fundamental frequency. Thephases of each harmonic component of (^̃ and (^̃ may be written in terms of the phase of (^̃:; = ; + 9 ^P , ; = ; − 9 ^P and simila^I4 ^I4 ^ ^I4 ^I4 ^ rly for the voltages: ;^<4 = ;^<4 + 9 ^ , ;^<4 =; − 9 ^P^<4 ^ . In the absence of triplen harmonics, all the harmonic components will sum to zeroacross three phases and thus ^H + ^H + ^H = 0. Consequently, voltages ^H and ^H must^4 ^4 ^4 ^4 ^4also be balanced, which can only happen if they are of equal magnitude and in phase opposition(i.e. ; − ; = Q). Whilst this is a perfectly viable solution, it leaves oscillating power^<^ ^<^components which must be absorbed both by the dc-link capacitor of the auxiliary converter and main inverter. For example, considering only the dc and fundamental components of the phasecurrents with ^ = ^ and ; + ; = 0, the dc, first and second harmonic power^^ ^^ ^<^ ^<^components become: 02 J = 3^^ + ^ ^ cos; − ; = −J ≈ 0' ' ' ^^ ^^ ^<^ ^I^ !U^^30 2 J = − ^^ + 2^ ^ 567 ;^ ' ^^ ^^ ' ^<^20 2 J = ^ ^ 567 ; + ;8 =^ ^^ ^^ ^<^ ^I^

[0097] If we choose ; − ; = Q, ; = − can satisfy the equation for dc power J^<^ ^<^setting ^ ≈ . The magnitudes of the oscillating power components are of order ^^'may be relatively large, potentially leading to requirements for an unacceptably large dc-link capacitance in the auxiliary converter. Furthermore, if second and higher order current harmonics are considered, additional oscillating power components will be produced, adding to the stress imposed on the dc-link capacitor. This undesirable feature may be alleviated by the addition of higher harmonic voltage components to ^ and ^, the amplitudes and phases of^ ^which are chosen, along with those of the fundamental components, to suppress the amplitudes of selected oscillatory harmonic power components while preserving the requirement for dc power balance. For example, a correctly chosen combination of first, second and third harmoniccomponents may be used to substantially suppress the first and second harmonics of the oscillatory dc-link power in the auxiliary converter.

[0098] It will be appreciated that there are many possible combinations of ^^and ^^, utilising varying numbers of harmonics, that can be applied to deliver dc power to the auxiliary inverter while suppressing the dc-link power oscillations. However, these solutions will not, in general,satisfy the condition ^^ + ^^ + ^^ − ^^ − ^^ = 0 and where this is the case, compensatingvoltages must be added to the main inverter phase voltages, ^^^, ^^^and ^^^, such that: ^^ + ^^^ + ^^ + ^^^ + ^^ + ^^^ − ^^ − ^^ = 0

[0099] Separating the dc and ac components, the individual inverter phase voltages are given by: ^^^^ = ^H^ + ^' + ^H^^^^^^ = ^H^ + ^' + ^H^^ − ^^' − ^H^^^^^ = ^H^ + ^' + ^H^^ − ^^' − ^H^

[0100] From which: ^H^^4 + ^H^^4 + ^H^^4 − ^H^4 − ^H^4 = 0

[0101] There are many possible combinations of ^H^^4, ^H^^4and ^H^^4that satisfy the above equation but, as for the auxiliary converter dc-link, it is desirable to seek values that minimise the dc-link energy ripple induced in the main inverter. The contributions to the resulting dc-link power from each phase may be expressed as: ^^^^^^^^ = 8^H^ + ^' + ^H^^=8(̃^ + ^' + (^̃^=^^^^^^^^ = 8^H^ + ^' + ^H^^−^^' − ^H^=8(^̃ + ^' + (^̃^=

[0102] In the above, the terms (^̃^etc. are the currents induced in the machine windings by the compensation voltages ^H^^etc. The resulting dc-link power thus has a complex harmonic spectrum consisting of a range of intermodulation terms in addition to those associated with the original current pattern. Careful choice of the number of harmonic components, their amplitudes and phases across all three compensation voltages is required to ensure optimal suppression of the dc-link oscillatory power components.

[0103] Although illustrated here in the context of a preferred embodiment, those skilled in the art will appreciate that similar arguments can be applied to differing numbers and arrangementsof series voltage sources, the only constraints being those of zero net dc power and zero net phase loop voltage. However, it will be clear that configurations with a single series voltage source cannot benefit from the cancellation (full or partial) of the ac components that is possible with configurations consisting of multiple sources. In addition, suppression of the oscillatory components of dc-link power in the auxiliary converter is more challenging for arrangements where just one voltage source is associated with each bridge leg. This can be understood in terms of the reduced number of degrees of freedom available when choosing the compensating harmonic components of the individual voltage source ^^compared to two voltage sources ^^and ^^.

[0104] A further method of control of the power electronic arrangements herein may comprise an operation using added signal injection.

[0105] At low frequencies, the voltage drop across the resistance of the motor winding becomes comparable to, or larger than, those induced by the time varying magnetic flux. This, in turn, means that the required auxiliary converter voltages and the associated motor phase compensating voltages ^^^, ^^^and ^^^also become large compared to the motor excitation voltages, leading to distortion of the intended motor phase currents.

[0106] Under these conditions, an alternative method of transferring power from the main inverter to the auxiliary converter is to impose additional voltages of a frequency substantially higher than the motor fundamental electrical frequency onto the motor phase windings, which in turn, lead to additional “injected” currents that flow in the windings and hence in the auxiliary converter. The frequency of the injected currents must be high enough to ensure that any intermodulation products and associated torque disturbances are reduced to an acceptable level, which for typical implementations will mean a multiple of at least six times the motor fundamental electrical frequency. The resulting injected motor currents may be utilised by the auxiliary converter in the same manner as for operation with the motor fundamental frequency.

[0107] The analysis is similar to the fundamental frequency case, in which additional voltages^^^, ^^^ and ^^^ are applied to each of the motor phases and voltages ^^^ and ^^^ are the phasevoltages of the auxiliary converter. The requirement for net zero loop voltage is: ^^ + ^^^ + ^^ + ^^^ + ^^ + ^^^ − ^^^ − ^^^ = 0

[0108] Separating the dc and ac components, the individual inverter phase voltages are given by: ^^^^ = ^H^ + ^' + ^H^^^^^^ = ^H^ + ^' + ^H^^ − ^^^' − ^H^^^^^^ = ^H^ + ^' + ^H^^ − ^^^' − ^H^^

[0109] From which: ^H^^4 + ^H^^4 + ^H^^4 − ^H^^4 − ^H^^4 = 0where k is the harmonic order of the asynchronous voltage. The corresponding phase currents are: ^^^^ = (^̃ + ^' + (^̃^^^^^ = (^̃ + ^' + (^̃^^^^^ = (^̃ + ^' + (^̃^

[0110] And the phase power components are:^^^^^^^^ = 0^H^ + ^' + ^H^^ − ^^^' − ^H^^20(^̃ + ^' + (^̃^2

[0111] For the purposes of our analysis and in line with the requirements for acceptable disturbance to normal motor operation, we neglect any interaction between the motor excitation at the fundamental electrical frequency and the injected signal, specifically we neglect any intermodulation products between the phase voltages and currents of the intended motor excitation and the injected signals. Further, we assume that the motor excitation is of a sufficiently low frequency compared to the injected signal that the motor fundamental frequency voltages and currents can be considered as quasi-static quantities. With this simplification we can write: (^̃ + ^'~^^'(^̃ + ^'~^^'(^̃ + ^'~^^'

[0112] Where ^^'etc are time dependent but varying slowly compared to the asynchronous excitation. Finally, we assume that the dc-bias component of the loop voltage 3^'remainsconstant, supporting a constant dc bias current ^'and so ^^^'+ ^^^'= 3^'. Note that ^^^'and^^^' need not be the same, for example they may vary with the quasi-static currents ^^' and ^^'to maintain the same dc power in each source of the auxiliary converter:^^^'^^' = ^^^'^^'

[0113] The net quasi-static power delivered by the combined sources is thus: J= 6^ ^^'^^'^^^^ '^^' + ^^'

[0114] This must be balanced by the dc component of ac power absorbed by the sources, which must therefore also be time varying. Note that with this approach, the maximum quasi-staticpower delivered by the sources is attained when ^^' = ^^' = ^∗^' :

[0115] Because the effective impedance of the motor windings varies with angular position, the injected coil voltages, ^H^^, etc. that are required to support the ac currents, (^̃^, etc. will also vary with position, for example, ignoring the motional emf: ^H^^^~@:^`^0a2(̃^^^

[0116] A preferred approach is to equate the product of the ac components of the auxiliary voltages and the corresponding fundamental component of induced motor current for both sources in the auxiliary converter: ^^^^^^^^ = ^^^^^^^^^^^^^^^^ = ^^^^^^^^

[0117] We also set: ^^^^^^' = ^^^^^^'^^^^^^' = ^^^^^^'

[0118] Taking the first and second harmonics, the ac voltages ^H^^and ^H^^are: ^H^^ = ^^^^5670:1 + ;^^<^2 + ^^^^56702:1 + ;^^<^2

[0119] We choose the injected voltages so that: ^H^^ = ^^^^5670:1 + ;^^<^2 + ^^^^56702:1 + ;^^<^2^H^^ = ^^^^5670:1 + ;^^<^2^H^^ = ^^^^5670:1 + ;^^<^2

[0120] And the corresponding induced currents are: (^̃^ = ^^^^5670:1 + ;^^I^2 + ^^^^56702:1 + ;^^I^2

[0121] Note that there are intentionally no second harmonic currents associated with theauxiliary voltage sources. Setting ;^^<^ = −;^^<^, ;^^<^ = −;^^<^, ;^^I^ = −;^^I^ we arrive at thefollowing expressions for the dc, fundamental and second harmonic components of power in the dc-link of the auxiliary converter:

[0122] By choosing appropriate values for ^^^^, ;^^<^, ^^^^, ;^^<^, we can set each of the above power terms to zero, ensuring the correct balance of dc power and nulling the effect of the first and second harmonic powers on the dc-link of the auxiliary converter. The applied phase voltages can then be chosen, firstly to deliver the desired currents (^̃^and (^̃^in phases 2 and 3 and secondly to balance the loop voltages for the first and second harmonics. It will be appreciated that there are many alternative solutions that can satisfy the full set of constraints.

[0123] The signal injection method can conveniently be combined with methods for angular position detection during initialisation of the drive and at low speeds. Relevant methods are widely reported in academic literature. In addition, during start-up, the dc-link of the auxiliary converter will be fully discharged. Signal injection can be used to pre-charge the dc-link using the anti-parallel diodes of the auxiliary converter switches as an uncontrolled rectifier. Once the dc- link has charged to a pre-determined level, normal operation of the auxiliary converter can be initiated. This feature eliminates the need for any alternative pre-charge arrangement.

[0124] Although illustrated here in the context of the preferred embodiment, those skilled in the art will appreciate that similar arguments can be applied to differing numbers and arrangementsof series voltage sources, the only constraints being those of zero net dc power and zero net phase loop voltage. However, it will be clear that configurations with a single series voltage source cannot benefit from the cancellation (full or partial) of the ac components that is possible with configurations consisting of multiple sources. In addition, suppression of the oscillatory components of dc-link power in the auxiliary converter is more challenging for arrangements where just one voltage source is associated with each bridge leg. This can be understood in terms of the reduced number of degrees of freedom available when choosing the compensating harmonic components of the individual voltage source ^^compared to two voltage sources ^^and ^^.

[0125] A further method of control of the power electronic arrangements herein may comprise an operation with a combination of fundamental frequency excitation and injected signals.

[0126] It will be clear to those skilled in the art that it is possible to obtain the dc-power for the auxiliary converter using a combination of fundamental frequency and higher frequency injected voltages. This is of greatest application at intermediate frequencies, where there is a desire to reduce the added voltages at the motor fundamental electrical frequency to limit distortion but where pure signal injection would require unacceptably large auxiliary converter voltages. Separating the auxiliary converter voltages ^^and ^^into two components, ^^^, ^^^and ^^^, ^^^we observe that the dc components must satisfy:

[0127] While the ac components must satisfy:

[0128] Ignoring intermodulation products between the two sets of signals, we can separate the two parts and treat them as independent: 3d^^' − ^^^' − ^^^' = 0^H^^ + ^H^^ + ^H^^ − ^H^^ − ^H^^ = 0^H^^ + ^H^^ + ^H^^ − ^H^^ − ^H^^ = 0

[0129] In the above d^is a gain term, with a value in the range 0 to 1, which determines the relative contributions from the fundamental frequency and higher frequency injected voltages. It will be noted that under these conditions, the analysis presented above for each individual component is preserved with the value of ^'being replaced with d^^'in the case of auxiliaryconverter excitation at the motor fundamental electrical frequency and with 81 − d^=^' in thecase of auxiliary converter excitation with higher frequency signal injection. A typical relationship between the relative contributions of each component and the motor fundamental electrical frequency is shown in FIG.12.

[0130] A further method of control of the power electronic arrangements herein may comprise an control strategy for an auxiliary converter dc-link voltage.

[0131] The above analysis for dc power balance on the auxiliary converter dc-link relies on accurate knowledge of the dc-bias voltage drop ^'across each motor phase and ignores the impact of undetermined losses in the auxiliary converter. Key parameters, such as the magnitude of the circulating bias current ^'will change with operating point and the phase resistance will vary with temperature and from one set of coils to another. It is thus necessary to apply a control scheme that will firstly maintain the circulating bias current at the desired level and secondly, ensure that a net balance of electrical power is maintained in the auxiliary converter.

[0132] FIG. 13 illustrates one possible implementation of a control scheme whose aim is to maintain the average measured motor phase current^^ 0^^ + ^^ + ^^2 at the demanded level ^∗' ofthe circulating bias current, while simultaneously keeping the dc-link voltage of the auxiliary converter close to a preferred value. Although illustrated here in the context of the preferred embodiment, the control principle can be applied more generally to any number and arrangement of series voltage sources. Note that for multiple isolated series voltage sources, a single value of estimated bias voltage ^e'is applied to all

[0133] Control of the circulating bias current is implemented by determining a feedforward term based on the known dc current, ^', an estimated value of phase resistance, f', and any available estimate of losses in the auxiliary converter, together with a feedback term determined by the filtered error between the demanded circulating bias current and the average measured motor phase current. The resulting estimate of dc-bias voltage ^e'is subsequently used as a feedforward term as part of the dc-link voltage controller.

[0134] Control of the dc-link voltage of the auxiliary converter is achieved by varying thedemanded bias voltage drop ^∗' = ^e' + ^' in response to the filtered error between the desireddc-link voltage ^^∗^^and the actual value, ^^^^where ^'is a compensating voltage derived fromthe error − ^^^^. Using the analysis presented above, the dc-link of the auxiliary converterwill see a net input power, resulting from the combined fundamental frequency and additionally injected auxiliary converter ac voltages, equal to:

[0135] Note that for a given applied phase current pattern, the first term in the above expression is constant whilst the second term varies with the motor electrical angle.

[0136] The controllers, denoted by G and H in FIG.13, adjust ^'∗to ensure that the power derived from the currents synthesised by the main inverter balance the total power J^^^I^^drawn from the dc-link so that the dc-link voltage ^^^^is maintained near to constant at the desired value.

[0137] Those skilled in the art will appreciate that the controllers can be implemented in many ways, for example using a classical proportional-integral control scheme. Further, it will be clearthat with certain restrictions, the motor fundamental frequency method 0d^ = 12 and injectedsignal method 0d^ = 02 can be used in isolation.

[0138] The foregoing describes methods for auxiliary converter voltage and dc-link energy balancing based on a frequency component analysis considering complete cycles at the fundamental frequency of the relevant motor excitation and its harmonics. These methods may present challenges in resolving the simultaneous requirements of voltage support and energy balance for the auxiliary converter dc-link.

[0139] A control and modulation strategy for dual-voltage-source auxiliary converters, such as the arrangement of FIG.6, are described hereafter, which provide cycle-by-cycle control of thebridge legs in order to simultaneously regulate both the cycle average total series voltage, ^^ +^^, and the energy exchange with the local dc-link. This control strategy functions over the fullspeed range, including zero speed. The phase currents, ^^and ^^, must differ during the period when the series voltage source is active. state Q7 Q8 Q9 Q10 Q11 Q12^^^ α1 off on off on on off+^^^^0 α2 off on on off on off 0+^^^^α3 off on off on off on 0 0 α4 off on on off off on−^^^^ +^^^^α5 on off off on on off+^^^^ −^^^^α6 on off on off on off 0 0 α7 on off off on off on 0−^^^^α8 on off on off off on −^^^^0

[0140] The above table shows the eight possible states of the three-leg auxiliary converter of FIG. 6, with duty cycle states labelled α1 to α8, and the associated resulting voltages ^^and ^^, andthe current ^^^ flowing in the dc-link capacitor. The average per-cycle total voltage, ^^ + ^^, istherefore given by: ^g = 0;^ + ;h − ;i − ;j2^^^^

[0141] The average per-cycle power flow: J^^ = −^^^^ − ^^^^ = ^^^^80−;^ + ;^ − ;k + ;j2^^ + 0−;^ − ;h + ;i + ;k2^^=J^^ = ^^^^0−;^^^ + ;^0^^ − ^^2 − ;h^^ + ;i^^ + ;k0^^ − ^^2 + ;j^^2

[0142] In order to meet the per-cycle control conditions, the average voltage, ^g , must equal thetarget voltage, ^∗, and the average power flow into the dc-link must equal zero, or: −;^^^ + ;^0^^ − ^^2 − ;h^^ + ;i^^ + ;k0^^ − ^^2 + ;j^^ = 0

[0143] In practice, losses in the auxiliary converter will mean that the average influx of power must be greater than zero, or more generally equal to a target net power, J∗:

[0144] By using the expression for the average voltage in the expression for net power, obtains:

[0145] Or, alternatively:

[0146] From the above relationships, it is clear that the condition for net zero power cannot be met if the two currents ^^and ^^are equal, and, since the currents in any two phases will in general have at least two intersection points per cycle, it can be concluded that a single dual-source auxiliary converter cannot provide continuous support alone for the series votlage when using cycle-by-cycle control.

[0147] This limitation can be overcome by making use of additional energy storage in the dc-link, by adding an injected current, or by utilizing two dual-source auxiliary converters spanning all three phases. The use of additional energy storage in the dc-link may become impracticable at low frequencies, since the energy storage requirement varies in inverse proportion to the frequency. Signal injection into the motor phase windings, at a frequency higher than the motor electrical frequency, may be employed to increase the frequency and the amplitude of the difference current, however this may be at the expense of disturbing the motor current waveforms which can have an undesirable impact on motor performance.

[0148] Taking one pair of voltage sources, having phase currents ^^and ^^which differ by an amount that permits the requisite auxiliary converter supply power to be drawn from the phase currents, then ^+I-andcan be defined as: If |^^| < |^^|, then^+I- = ^^^^Ill = ^^ − ^^If |^^| < |^^|, then^+I- = ^^^^Ill = ^^ − ^^

[0149] The conditions for zero net dc-link energy exchange may then be generalised: −o<^+I- + o^^^Ill = 0

[0150] Or ∗ p∗alternatively, including a non-zero net energy exchange (where ^^ = Wqrs):

[0151] Where o = Wt= <su<v< Wqrs Wqrs and hence o^ may be expressed:o = o ^+I-^ < ^^Ill

[0152] Or, including a non-zero net power:

[0153] The relationships between o<, o^and the converter states are:

[0154] For |^^| > |^^| voltage source ^^, carrying current ^^, delivers a voltage:

[0155] Or including a non-zero net power: ∗^ = −^g ^+I-^ − J^^Ill ^^Ill

[0156] The power associated with ^^ is ^^^^ = ^^8^^Ill + ^+I-=, and so:

[0157] Voltage source ^^, carrying current ^^, delivers a voltage:

[0158] Or including a non-zero net power:

[0159] The power associated with ^^ is ^^^^ = ^^^+I-, and so:

[0160] For |^^| > |^^|, a voltage source ^^, carrying current ^^, delivers a voltage:^^ = −^g ^+I- − J∗^^Ill ^^Ill

[0161] while voltage source ^^, carrying current ^^, delivers a voltage:

[0162] In each case, ^^ + ^^ = ^g , and the net power associated with the voltage sources is −J∗.

[0163] Notably, by using the above-described strategy, power is always extracted from the phase carrying the highest current. By swapping the roles of ^^and ^^according to the phasecurrents enables minimising of the energy exchange with the dc-bus, provided that ^^Ill > ^+I-.

[0164] FIG.9 shows a possible arrangement in which two separate auxiliary converters are used to implement two pairs of voltage sources. Sources ^^and ^^^correspond to one auxiliary converter and sources ^^^and ^*correspond to the other auxiliary converter.

[0165] FIG. 14A shows sample phase currents for continuous conduction operation. FIG.14B shows the ratio of the modulus of the pairwise phase current differences to maximum phase current for phase current pairs (1,2) and (2,3). The pairwise phase current difference for each pair falls to zero twice per cycle but with a 120° offset between pairs. Notably, there is no angle for which the pairwise differences for both pairs are simultaneously zero, so by utilising two pairs of voltage sources, continuous support for the circulating bias current may be maintained over the full electrical cycle for all operational conditions.

[0166] The principle of operation for two pairs of voltage sources involves dividing the demandedbias voltage ^g between the two sources:^g^^ = 9^^g

[0167] Defining a variable 9^, where 9^lies in the range 0 to 1, and is chosen according to the pairwise phase current differences and minimum phase current for the phase current pairs. and

[0169] The sum of the powers delivered by the two voltage source pairs is: |J^U^| = ^g09^z^^ + 01 − 9^2z^^2

[0170] Given that 9^lies in the range 0 to 1, the value of 9^that minimises the total power will beequal to 1, if z^^ < z^^, and equal to 0 if z^^ > z^^. However, in practice it is beneficial to arrangefor a more gradual transition from one pair of voltage sources to the other, avoiding step changes and the likelihood of “hunting”.

[0171] There are many transition functions that may be used to define the value of 9^as a function of the source-pair powers z^^and z^^. In general, the transition function will approach 1 as the value of z^^becomes much greater than z^^and will approach 0 as the value of z^^becomes much greater than z . We may define the ratio { = ^|Z^^ ^[| and from this ratio define limitsto { where the transition function becomes 1 or 0: 9^0z^^, z^^2 = 1, { ≥ {^9^0z^^, z^^2 = 0, { ≤ {'

[0172] I is desirable to ensure symmetry in the transition function by setting { ={ =where ~ > 1 is a smoothing factor, and by setting the function 9 0z , z 2 = ^^ ^^ ^^ ^ when the twosourc^ < ^|Z < ~, there will be a varyinge-pair powers are equal. Thus, over the range^ ^[|contribution from both voltage source pairs. It is further desirable to ensure that the transition function is a smooth, monotonic function of the source-pair powers.

[0173] FIG. 15 shows a number of example transition functions which satisfy the above requirements. One such functional form, illustrated as function 1 in FIG.15, is:^,|Z

[0174] Where ^ and 5 are constants. Defining E = = , we can write:^ u^ ^u,[| |Z^2 0 2

[0175] With 9 E = 0 when E = and 9 E = 1 when E = . The corresponding values^^u^^u^ ^^ ^ and 5 may then be determined: ^ = and 5 = .^^^ ^^^

[0176] Further possible transition functions are illustrated in FIG.15, and may include the below functions 2 to 4:

[0177] The impact of said smoothing factor can be shown by the comparison of FIG. 16A and 17A with FIG.16B and 17B. FIG.16A shows the auxiliary converter source voltages for two pairs of voltage sources with an abrupt change in source pair. FIG.16B shows the auxiliary converter source voltages for two pairs of voltage sources with a smooth change in source pair. FIG.17A shows the auxiliary converter source powers for two pairs of voltage sources with an abrupt change in source pair. FIG. 17B shows the auxiliary converter source powers for two pairs of voltage sources with a smooth change in source pair. With a smoothing ratio of 1, the transition from one pair of sources to the other is abrupt, with corresponding step-like changes in both voltage and delivered power in the individual auxiliary converters and sources, as illustrated in FIG. 16A and 17A. With a smooth transition the peak voltages and powers are lower, but the average power increases slightly. In the example of FIG.16A, FIG.16B and FIG.17A, FIG.17B, the peak voltage drops by approximately 30%, but the average power increases by approximately 10%. The sum of the series voltage sources, on the other hand, remains the same irrespective of the smoothing ratio.

[0178] FIG. 18A and FIG. 18B show motor phase currents and auxiliary source voltages for an example excitation case. Each pair of voltage sources delivers bias voltages over two portions of the electrical cycle in keeping with the approach presented above. During these time intervals, the voltage source associated with the phase carrying the smaller of the two currents is biased to inject power into the circulating current loop while the voltage source carrying the larger of the two current is biased to extract power from loop, i.e. with opposite sign to the current. In effect, the ac component of the source voltage has a strong antiphase component with respect to the phase current. The total voltage provided by both source pairs is equal to the demanded voltage, irrespective of how it is distributed amongst the sources.

[0179] In addition, because the bias voltage is preferentially injected into the phase(s) carrying the lower levels of current, the total power delivered from the voltage sources is always lower than the instantaneous total power associated with the resistive voltage drops in the phase windings. FIG. 19 shows the auxiliary converter individual source powers, total source power, and total resistive loss as a function of electrical angle, for the example excitation case of FIG. 18A and FIG. 18B. This is advantageous in reducing the energy exchange with the dc-link capacitors, and hence also reduces current stress on the dc-link capacitors.

[0180] FIG.20 shows the Fourier series components for the four source voltages and their sum, showing the first eighteen components. The harmonic amplitudes of the individual source voltages vary roughly in inverse proportion to the harmonic order, as would be expected given the pulse-like nature of the waveforms. In contrast, the sum of the source voltages is dominated bythe dc component plus a 3rd order harmonic, which is related to the changing resistive losses over the electrical cycle. The phase currents are dominated by the dc and first harmonic components, with smaller but significant contributions from the second and third harmonics. FIG.21 shows the Fourier series power amplitudes for sources ^^and ^^^, carrying currents ^^and ^^, respectively. When taken as a product with the related voltage source, the resulting power spectrum for each voltage source is dominated by the dc and first harmonic, as illustrated in FIG. 21. The total power for the two voltage sources in each source pair will sum to zero or, more generally, whatever net power is needed to balance the auxiliary converter dc-link voltage.

[0181] The modified phase voltages that are required to support the phase currents differ from the unmodified phase voltages by the respective source voltages as follows: ^^^ = ^^ − ^^ = ^^ − ^*^^^ = ^^ − ^^ = ^^ − ^^^ − ^^^^^^ = ^^ − ^^ = ^^ − ^^

[0182] Assuming that the cycle-by-cycle energy conservation scheme works perfectly and that the losses in the auxiliary converters can be neglected, the total power delivered from the main inverter must remain unaltered and so there will be no resulting additional disturbance on the main inverter dc-link other than that occurring as a result of auxiliary converter switching during each control cycle. This inherent balancing of the overall input power represents a major advantage over methods that rely on balancing of the input power requirements across a limited number of harmonic components.

[0183] More generally, the transition function, f, may be expressed in terms of the powers delivered by any number of voltage source pairs: 9^^^ = ^0z^^, z^^, … , z-^^-, z--u^2^g^^ = 9^^^^g

[0184] In the case where every inverter leg is associated with a source pair, the final variable spans the first and last motor phase, so a more appropriate notation would be: 9^^^ = ^0z^^, z^^, … , z-^^-, z-^2

[0185] Definitions for the remaining source pairs are obtained by cyclic rotation of the source- pair power variables within the function definition, ensuring symmetry across the set of source pairs: 9^^^ = ^0z^^, z^h, … , z-^, z^^2^g^^ = 9^^^^g9^ / / u^ = ^8z / / u^, z / u^ / u^, … , z-^, … z / ^^ / =^g / / u^ = 9^ / / u^^g

[0186] A further requirement is that the sum of the contributions from the source pairs must be equal to 1: 9^^^ + 9^^^ + ⋯ + 9^ / / u^ + ⋯ + 9^-^ = 1

[0187] Furthermore, when all of the source-pair powers are equal, the contribution from eachsource must be equal,

[0188] For two source pairs, all the functions described above may be expressed in asymmetrical functional form and all satisfy the conditions ^0z^^, z^^2 + ^0z^^, z^^2 = 1 and^0z, z2 = ^ For three source pairs, one example of a suitable functional form is:9^^^0E2 = oE^ + ^E + 5

[0189] We define the values of E where the function 9^^^0E2attains the values of 1 and 0 as E^and E'from which we can determine the three unknown constants o, ^ and 5:

[0190] The symmetry condition may be applied to determine the corresponding functional forms for 9^^^0F2 and 9^^^0^2, where F and ^ are given by: F= ^0z 2 z^^z^^^^, z^^, z^^ =z^^z^^ + z^^z^^ + z^^z^^^ = ^0z z^^, z , z 2 = ^^z^^^^ ^^ z^^z^^ + z^^z^^ + z^^z^^

[0191] When 9^saturates at either 0 or 1, one of the two voltage source pairs is effectively inactive. Under these conditions the magnitude of the difference current for the inactive source pair may drop to a very low level, making it difficult to meet any net power demand that might berequired for dc-link voltage balancing purposes. A solution is to continue to utilise the voltage source pair but with the aim of balancing the dc-link power using one of the phase currents rather than from the difference current. The requisite net voltage required for this source pair can then be compensated by adding an equal but opposite voltage to the other source pair.

[0192] Consider the per cycle energy balance equation for a source pair: −o<^ ∗+I- + o^^^Ill = ^^

[0193] If ≪ |^+I-|, then the contribution to the net dc-link current ^^∗ is more easilyachieved by setting o^ = 0 and defining o< through −o<^+I- = ^^∗ , such that:

[0194] The voltage source, ^^or ^^,associated with the current ^+I-will thus deliver a voltage:

[0195] The other voltage source will be set to zero. As the inactive source pair will now deliver a non-zero net voltage, an equal voltage of the opposite sign must therefore be added to thedemand for the other pair of voltage sources. For example, if 9^ = 0, the voltage source pairs willsee voltage demands given by:

[0196] Each auxiliary converter utilises three bridge legs to synthesise two voltages, for example: ^^ = ^^ − ^^^^ = ^^ − ^^

[0197] With ^^and ^^defined, there is one additional degree of freedom governing the choice of the bridge leg nodal voltages. Thus, without loss of generality, we assume that the centre leg voltage ^^at node t, can be chosen arbitrarily, provided all of the nodal voltages of the auxiliary converter lie within the viable output voltage range of the auxiliary converter.

[0198] Also of consideration is the distribution of losses in the switches making up the three bridge legs. For the arrangement of FIG.6, legs s and u carry the motor phase currents −^^and ^^respectively, while leg t carries the difference current ^^ − ^^ (with the sign convention, positivecurrent flows out of the bridge leg). The highest inverter leg losses will be associated with either leg s or leg u depending on the larger of ^^and ^^and the distribution of losses between the upper and lower switch in that leg will be determined by the duty ratio applied to that leg. Thus, to avoid large differences between the losses in the upper and lower switches, the duty ratio of the leg carrying the larger of the two phase currents should be maintained as close to 50% as possible. In addition, where the difference currentis substantially greater than the minimum oftwo phase currents ^+I-, the magnitude of the differential voltage,between the legcarrying the larger of the two currents and leg t will be significantly smaller than the magnitude ofthe differential voltage, ^ between leg t and the third leg. Hence the duty ratio of legwill remain close to that of the leg carrying the larger phase current, while the duty ratio of the third leg, which carries the lower current ^+I-, will vary more widely.

[0199] Duty ratio offset control is applied to minimise asymmetrical losses in the converter legs carrying the larger phase current and the difference current. Ignoring the power lost in the auxiliary converter, we observe that the two voltage sources ^^and ^^must have opposite sign. We define the range of the nodal voltages, ^,, and magnitude of the smaller of the two voltage sources, ^+, in the converter by: ^, = max Mabs0^^2, abs8^^=N^ = min Mabs0^^2, abs

[0200] By choosing a nodal voltage of zero to be defined by a duty ratio of 50%, we can minimise the duty ratios associated with the legs of the smaller of the two voltage sources by setting onenode to − ^+^ 2 and the other node to + ^+^ 2. We denote the offset voltage of node t by ^U, withmagnitude^+^ 2 and sign determined by which voltage source carries the larger phase current.

[0201] FIG. 22 shows the alignment of the auxiliary converter nodal voltages for the variouspermutations of sign and magnitude of voltage sources ^^ and ^^. It is assumed that the signs of^^ and ^^ are opposite while the signs of ^^ and ^^ are the same. For |^^| < ^^^^, the range ^, =^^^^ and the offset voltage ^U = −^^^ 2. For |^^| > ^^^^, the range ^, = |^^| and the offset voltage^ = . In all cases, all nodal voltages must remain within the voltage range of theconverter, denoted by ±^!I+in FIG.22 and determined by the product of the dc-link voltage andthe maximum switch duty ratio: 2^!I+ = o+^^^^^^. A single condition covers all possiblepermutations:^

[0202] Should the range ^, exceed this limit, the offset ^U must be modified. For |^^| < ^^^^, theoffset sign8^^=8^^^^ − ^!I+= and for |^^| > ^^^^ ^U = −sign0^^20|^^| − ^!I+2.

[0203] Having established a mechanism for determining the optimum offset voltage for the centre leg of the auxiliary converter (node t in the example above), the nodal voltages and cycle- by-cycle PWM duty ratios of the other legs may easily be determined.

[0204] FIG.23 shows the individual source voltages for four voltage sources implemented as per the arrangement of FIG.9, together with the resulting total bias voltage given by the sum of the four sources, for an excitation case on the edge of continuous conduction. FIG.24A and FIG.24B show the nodal voltages for the two auxiliary converters together with the phase currents and difference currents, for the excitation case of FIG.23. FIG.24A shows sources ^*and ^^^, while FIG.24B shows sources ^^and ^^^. The algorithm for setting the centre leg nodal voltage results in duty ratios close to 50% for both the centre leg and the leg carrying the larger of the two phase currents. For this set of phase currents, the duty ratio is maintained well within the limits imposed by the PWM modulator and so no modification to the offset / centre leg voltage is required.

[0205] FIG.25 shows the individual source voltages, together with the resulting total bias voltage given by the sum of the four sources, for an excitation case in deep continuous conduction. FIG. 26A and FIG.26B show the nodal voltages for the two auxiliary converters together with the phase currents and difference currents, for the excitation case of FIG.25. FIG.26A shows sources ^*and ^^^, while FIG.26B shows sources ^^and ^^^.

[0206] The results of FIG.23, FIG.24A and FIG.24B can be contrasted with those of FIG.25, FIG. 26A, and FIG.26B, in which limiting of the duty ratio is clearly visible. In this case, the duty ratio of the centre leg, which carries the difference current, is pushed further away from 50% while the duty ratio of the leg carrying the larger of the two phase currents is held closer to 50%, thereby maintaining a near equal distribution of losses in the upper and lower switches.

[0207] FIG.27 shows a combined control block diagram for a pair of auxiliary converters. Each auxiliary converter is controlled, as described above, according to two inputs: the demanded voltage (^g^^or ^g^^) and the demanded net dc-link current (^^∗^^or ^^∗^^). The dc-link voltage of each converter is regulated to follow a demand voltage using a controller, H, which may be conveniently implemented as a conventional PI controller, generating the current demand ^^∗^^or ^^∗^^.

[0208] The auxiliary converter voltage demand is generated from the sum of the demanded motor phase voltages from the motor flux / current controller:

[0209] The overall bias voltage demand ^g is then split into the two converter channels: ^g^^ =9^^g and ^g^^ = 01 − 9^2^g, using the methodology described above, from which the individualvoltage source demands, ^^∗, ^^∗^ , ^^∗^andare determined.

[0210] FIG.28 shows the per-cycle average change in dc-link voltage, for an example having a dc-link capacitance of 250 µF and a nominal dc-link voltage of 70V. FIG.29 shows a peak dc-link voltage variation during each PWM cycle. The rms current flowing in the auxiliary converter dc- link capacitor is 67.5 A which can be compared to a current of 184 A rms in the main inverter dc- link capacitor. In principle, the cycle-to-cycle ripple should be zero, however, this assumes that the feedforward compensation method is perfect, an assumption that requires the phase currents to remain constant over the PWM period. This is not the case and the error between the assumed and actual currents leads to a non-zero net energy transfer between the main inverter and auxiliary converter, manifested as a voltage disturbance on the dc-link. In this implementation, the phase currents used to determine the applied voltages in any particular PWM period are determined as a time average determined from the model predicted currents and timings from the main inverter. The resulting dc-link voltage ripple has a maximum cycle-to- cycle amplitude of 0.2 V, or 3.5 mJ in energy terms, whereas the voltage ripple within one cycle has a much greater maximum amplitude of 2 V, or 35 mJ in energy terms, as shown in FIG.29. By way of comparison, the amplitude of the main inverter dc-link energy ripple is 0.7J. This shows that the dc-link energy compensation scheme for the auxiliary converter operates successfully with a maximum error of around 10%. The levels of voltage ripple on the dc-link capacitor may be reduced if the switching frequency of the auxiliary converter is increased, which may be a multiple of the main inverter switching frequency. This technique will reduce the maximum ripple amplitude within each main inverter PWM cycle but may have little effect on the cycle to cycle amplitude as this is primarily determined by errors between the predicted and actual phase currents.

[0211] Unknown disturbances, such as those described above, coupled with any quiescent current requirements will cause the dc-link voltage to deviate from its desired value and thus some form of closed-loop regulation is required, such as shown in FIG. 27. A convenient implementation involves a PI controller which operates on the dc-link voltage error to generate a current demand ^^∗for the associated auxiliary converter. The application of a PI controller canprovide a second order response that can be tuned according to the dc-link parameters. The high frequency disturbance resulting from the feed-forward action of the cycle-by-cycle dc-link energy compensation remains virtually unaffected.

[0212] FIG. 30 shows a block diagram illustrating generation of main inverter nodal voltage ∗demands from motor phase voltage demands. The auxiliary converter demand voltages, ^∗^, ^^^ ,^∗ and ^∗^^ *, are fed back to the main inverter bridge leg modulator to generate corrected motorphase voltage demands ^^∗^, ^^∗^and ^^∗^:^∗^ = ^∗ − ^∗ − ^∗^ ^ ^^ ^^

[0213] The sum of the modified phase voltages+ ^∗ ∗^^ + ^^^ is by definition equal to zero. Themotor phase voltage d^∗ ∗emands are then converted into the bridge leg voltage demands ^ , ^^and∗^ :^∗ ^ = −^^ U∗ ∗ ∗ ^ = ^ − ^^ ^^^∗∗ ∗ ^ = ^ − ^^ ^^^

[0214] The main inverter offset voltage ^ is determined by the following:U^ =

[0215] Where ^ is an offset correction that may be applied to equalise the thermal stress in theU^upper and lower switches of the main inverter bridge legs. The value of ^ is determined as partU^of the current / flux pattern optimisation process and is fed directly from a look-up table into the bridge leg modulator.

[0216] The above described methods can be extended for any number of source pairs by applying the same methods for determining multi-source transition functions. FIG.31 shows an example of a control block diagram for three voltage source pairs when operated in combination with a three-phase machine and a three-phase inverter, such as illustrated in FIG.10. g

[0217] The local control loops for each voltage source pair are fed with demand voltages ^ ,^^g g ^ , or ^ , determined using the corresponding transition functions. The main inverter phase^^ ^^voltages are determined in the manner outlined above for two source pairs, but with the addition ∗∗of the voltages ^ and ^ from the third voltage source pair:*^^^^∗^^ = ^∗^ − ^^∗^ − ^∗^^^∗^ = ^∗^ − ^∗ ∗^ ^^ − ^^^

[0218] Embodiments and examples of the present disclosure provide a power electronic arrangement for a reluctance machine, comprising: a first auxiliary converter operable to deliver a bias voltage during a first and third portion of an electrical cycle, the first auxiliary converter comprising: a first voltage source associated with a first phase winding; a second voltage source associated with a second phase winding; and a second auxiliary converter operable to deliver a bias voltage during a second and fourth portion of the electrical cycle, the second auxiliary converter comprising: a third voltage source associated with the second phase winding; and a fourth voltage source associated with a third phase winding, wherein, during the first and third portions of the electrical cycle, when a current in the first phase winding is larger than a current in the second phase winding, the first voltage source is configured to extract power from a circulating current loop and the second voltage source is configured to inject power into the circulating current loop, and when the current in the second phase winding is larger than the current in the first phase winding, the first voltage source is configured to inject power into the circulating current loop and the second voltage source is configured to extract power from the circulating current loop; and wherein, during the second and fourth portions of the electrical cycle, when a current in the second phase winding is larger than a current in the third phase winding, the third voltage source is configured to extract power from the circulating current loop and the fourth voltage source is configured to inject power into the circulating current loop, and when the current in the third phase winding is larger than the current in the second phase winding, the third voltage source is configured to inject power into the circulating current loop and the fourth voltage source is configured to extract power from the circulating current loop.

[0219] In some examples or embodiments, it is possible for the power flow to reverse under certain transient conditions. In these situations, power may be put back into the circuit from the auxiliary converter dc-link. This may happen in cases where the voltage source is required to deliver a voltage of opposite sign to the current.

[0220] In some examples or embodiments disclosed herein the first and second auxiliary converters are operable to support a circulating bias current in the circulating current loop through the first, second and third phase windings.

[0221] In some examples or embodiments disclosed herein a total power delivered from the first and second auxiliary converters is less than an instantaneous total power associated with thecirculating bias current in the circulating current loop through the first, second and third phase windings.

[0222] In some examples or embodiments disclosed herein first auxiliary converter comprises aleg common to the first and second voltage source, said leg configured to have an offset voltage,^U, given by the equation:^U = sign8^^=8^^^^ − ^!I+=for |^^| < ^^^^; and^U = −sign0^^20|^^| − ^!I+2for |^^| > ^^^^, where ^^ is the voltage of the first voltage source, ^^ is the voltage of the secondvoltage source, and ±^!I+is the maximum voltage of the auxiliary converter.

[0223] In some examples or embodiments disclosed herein the second auxiliary converter comprises a leg common to the third and fourth voltage source, said leg configured to have an offset voltage given by the equation: ^U = sign0^*20|^*| − ^!I+2for |^^| < |^*|; and^U =for |^^| > |^*|, where ^^ is the voltage of the third voltage source, ^* is the voltage of the fourthvoltage source, and ±^!I+is the maximum voltage of the auxiliary converter.

[0224] Although the examples and embodiments herein are given in the context of a switched reluctance machine, the power converter and associated control methods described herein can also be applied to other types of electrical machines, electrical loads, or electrical sources, where the applied excitation may consist of the combination of an alternating current and a direct current.

[0225] Embodiments and examples of the present disclosure provide a method for operating a power electronic arrangement for a reluctance machine, comprising: controlling, during a first and third portion of an electrical cycle, a first auxiliary converter to deliver a bias voltage, wherein controlling the first auxiliary converter comprises: when a current in a first phase winding is larger than a current in a second phase winding, configuring a first voltage source of the first auxiliary converter associated with the first phase winding to extract power from a circulating current loop and configuring a second voltage source of the first auxiliary converter associated with a second phase winding to inject power into the circulating current loop; and e controlling, during a secondand fourth portion of an electrical cycle, a second auxiliary converter to deliver a bias voltage, wherein controlling the second auxiliary converter comprises: when the current in the second phase winding is larger than a current in a third phase winding, configuring a third voltage source of the second auxiliary converter associated with the second phase winding to extract power from the circulating current loop and configuring a fourth voltage source of the second auxiliary converter associated with the third phase winding to inject power into the circulating current loop; and when the current in the third phase winding is larger than the current in the second phase winding, configuring the third voltage source to inject power into the circulating current loop and configuring the fourth voltage source to extract power from the circulating current loop.

[0226] Some examples or embodiments disclosed herein further comprise determining a transfer function to determine power delivered by each auxiliary converter during a crossover between adjacent portions of the electrical cycle; and controlling the first and second auxiliary converters based on the transfer function.

[0227] In some examples or embodiments disclosed herein the transfer function comprises a smoothing factor, the smoothing factor operable to determine a transition from one auxiliary converter to the other auxiliary converter.

[0228] In some examples or embodiments disclosed herein the first auxiliary converter comprises a first leg associated with the first voltage source, a third leg associated with the second voltage source, and a second leg associated with both the first and second voltage source, and wherein controlling the auxiliary converter comprises: determining a leg of the first and third legs carrying a larger phase current; determining a duty cycle of the determined leg based on a phase current in the determined leg, and a voltage of a voltage source associated with the determined leg, such that the duty cycle is maintained close to 50%; determining a duty cycle of the second leg based on a voltage of the first voltage source, a voltage of the second voltage source, and the duty cycle of the determined leg, such that the duty cycle is maintained close to 50%; determining a duty cycle of a remaining leg of the first and third legs based on a phase current in the remaining leg, a voltage of the voltage source associated with the remaining leg, and the duty cycles of the determined leg and the second leg.

[0229] In some examples or embodiments disclosed herein the second auxiliary converter comprises a first leg associated with the third voltage source, a third leg associated with the fourth voltage source, and a second leg associated with both the third and fourth voltage source, and wherein controlling the auxiliary converter comprises: determining a leg of the first and third legs carrying a larger phase current; determining a duty cycle of the determined leg based on aphase current in the determined leg, and a voltage of a voltage source associated with the determined leg, such that the duty cycle is maintained close to 50%; determining a duty cycle of the second leg based on a voltage of the third voltage source, a voltage of the fourth voltage source, and the duty cycle of the determined leg, such that the duty cycle is maintained close to 50%; determining a duty cycle of a remaining leg of the first and third legs based on a phase current in the remaining leg, a voltage of the voltage source associated with the remaining leg, and the duty cycles of the determined leg and the second leg.

[0230] Embodiments and examples of the present disclosure provide a power electronic arrangement for driving a switched reluctance machine, comprising: a plurality of phase arms, each phase arm comprising a phase winding, wherein the plurality of phase arms are connected in series to form a ring; and a main inverter having a plurality of inverter bridge legs, wherein a quantity of the plurality of bridge legs is equal to a quantity of the plurality of phase arms, wherein each of the plurality of bridge legs is connected at a switched node to two of the plurality of phase arms, and each of the plurality phase arms is connected to two of the plurality of bridge legs, and wherein at least one of the phase arms comprises at least one voltage source connected in series with a respective phase winding.

[0231] In some examples or embodiments disclosed herein the at least one voltage source is operable provide a voltage to support a circulating bias current in the plurality of phase arms.

[0232] In some examples or embodiments disclosed herein the circulating bias current is controlled independently of the main inverter.

[0233] In some examples or embodiments disclosed herein, the at least one voltage source is operable to provide a voltage having components at one or more frequencies, wherein the one or more frequencies include one or more of: a fundamental electrical frequency of the switched reluctance machine; a harmonic of the fundamental electrical frequency of the switched reluctance machine; and a frequency different from the fundamental electrical frequency of the switched reluctance machine or the harmonics of the fundamental electrical frequency of the switched reluctance machine.

[0234] In some examples or embodiments disclosed herein the at least one voltage source is provided by an auxiliary converter.

[0235] In some examples or embodiments disclosed herein the at least one voltage source comprises two voltage sources in series, and wherein the auxiliary converter comprises three half-bridge legs, the three half-bridge legs having a common direct current (DC) link.

[0236] In some examples or embodiments disclosed herein the two voltage sources comprise a first voltage source having a first terminal and a second terminal, and a second voltage source having a first terminal and a second terminal, wherein a first terminal of the first voltage source and a first terminal of the second voltage source are electrically coupled with the switched node of an inverter bridge leg of the main inverter, and wherein the second terminal of the first voltage source is electrically coupled to a first phase winding and the second terminal of the second voltage source is electrically coupled to a second phase winding.

[0237] In some examples or embodiments disclosed herein the at least one voltage source comprises a single voltage source, and wherein the auxiliary converter comprises two half-bridge legs, the two half-bridge legs having a common direct current (DC) link.

[0238] In some examples or embodiments disclosed herein the single voltage source comprises a first terminal and a second terminal, the first terminal electrically coupled to the switched node of an inverter bridge leg of the main inverter, and the second terminal electrically coupled to the respective phase winding.

[0239] In some examples or embodiments disclosed herein a voltage rating of a plurality of switches which comprise the half-bridge legs of the auxiliary converter is less than a voltage rating of a plurality of switches which comprise the plurality of main inverter bridge legs.

[0240] In some examples or embodiments disclosed herein a current rating of a plurality of switches which comprise the plurality of main inverter bridge legs is less than a current rating of a plurality of switches which comprise the half-bridge legs of the auxiliary converter.

[0241] Further embodiments and examples of the present disclosure provide a method of controlling the power electronic arrangement as described in embodiments and examples herein, comprising: controlling the at least one voltage source to provide a circulating bias current in the plurality of phase arms; and controlling the plurality of inverter bridge legs to provide a plurality of currents at a respective switched node.

[0242] In some examples or embodiments disclosed herein controlling the circulating bias current and controlling the plurality of currents provided by the main inverter is operable to regulate a current flowing in each phase arm of the plurality of phase arms.

[0243] In some examples or embodiments disclosed herein an electrical power used by a voltage source of the at least one voltage source to provide the circulating bias current is derived from a current flowing in said voltage source.

[0244] In some examples or embodiments disclosed herein an electrical power for the at least one voltage source is derived from one or more alternating current (AC) components of the plurality of currents provided by the main inverter.

[0245] In some examples or embodiments disclosed herein the plurality of currents provided by the main inverter comprise components at a fundamental electrical frequency of the switched reluctance machine and harmonics of said fundamental electrical frequency .

[0246] In some examples or embodiments disclosed herein the plurality of currents provided by the main inverter comprise components at frequencies different from a harmonic spectrum of the switched reluctance machine excitation currents.

[0247] Some examples or embodiments disclosed herein further comprise measuring an average phase current; and controlling the at least one voltage source to maintain the measured average phase current at a specified circulating bias current.

[0248] Some examples or embodiments disclosed herein further comprise controlling the at least one voltage source to maintain a DC link voltage of the auxiliary converter within a threshold of a specified value.

[0249] Further embodiments and examples of the present disclosure provide a switched reluctance machine comprising: a stator; a rotor; a housing; and the power electronic arrangement as described in embodiments and examples herein.

[0250] In some examples or embodiments disclosed herein the at least one voltage source is integrated within the housing of the switched reluctance machine.

[0251] In some examples or embodiments disclosed herein the at least one voltage source and the main inverter are integrated in a single package.

[0252] In some examples or embodiments disclosed herein the at least one voltage source is housed separately from the switched reluctance machine and the main inverter.

[0253] In some examples or embodiments disclosed herein the main inverter is integrated within the housing of the switched reluctance machine.

[0254] In some examples or embodiments disclosed herein the main inverter is housed separately from the switched reluctance machine.

[0255] All of the features disclosed in this specification (including any accompanying claims, abstract, and drawings) may be combined in any combination, except combinations where some features are mutually exclusive. Each feature disclosed in this specification, including anyaccompanying claims, abstract, and drawings, may be replaced by alternative features serving the same, equivalent, or similar purpose, unless expressly stated otherwise. Thus, unless expressly stated otherwise, each feature disclosed in one example of a generic series of equivalent or similar features.

[0256] The present teachings are not restricted to the details of any of the foregoing examples. Any novel combination of the features disclosed in this specification (including any accompanying claims, abstract, and drawings) may be envisaged. The claims should not be construed to cover merely the foregoing examples, but also any variants which fall within the scope of the claims.

Claims

CLAIMS 1. A power electronic arrangement for a reluctance machine, comprising: a first auxiliary converter operable to deliver a bias voltage during a first and third portion of an electrical cycle, the first auxiliary converter comprising: a first voltage source associated with a first phase winding; a second voltage source associated with a second phase winding; and a second auxiliary converter operable to deliver a bias voltage during a second and fourth portion of the electrical cycle, the second auxiliary converter comprising: a third voltage source associated with the second phase winding; and a fourth voltage source associated with a third phase winding, wherein, during the first and third portions of the electrical cycle, when a current in the first phase winding is larger than a current in the second phase winding, the first voltage source is configured to extract power from a circulating current loop and the second voltage source is configured to inject power into the circulating current loop, and when the current in the second phase winding is larger than the current in the first phase winding, the first voltage source is configured to inject power into the circulating current loop and the second voltage source is configured to extract power from the circulating current loop; and wherein, during the second and fourth portions of the electrical cycle, when a current in the second phase winding is larger than a current in the third phase winding, the third voltage source is configured to extract power from the circulating current loop and the fourth voltage source is configured to inject power into the circulating current loop, and when the current in the third phase winding is larger than the current in the second phase winding, the third voltage source is configured to inject power into the circulating current loop and the fourth voltage source is configured to extract power from the circulating current loop.

2. The power electronic arrangement of claim 1, wherein the first and second auxiliary converters are operable to support a circulating bias current in the circulating current loop through the first, second and third phase windings.

3. The power electronic arrangement of claim 1 or 2, wherein a total power delivered from the first and second auxiliary converters is less than an instantaneous total power associated with the circulating bias current in the circulating current loop through the first, second and third phase windings4. The power electronic arrangement of any of claims 1 to 3, the first auxiliary converter comprises a leg common to the first and second voltage source, said leg configured to have anoffset voltage, ^U, given by the equation:^U = sign8^^=8^^^^ − ^!I+=for |^^| < ^^^^; and^U = −sign0^^20|^^| − ^!I+2where ^^is the voltage of the first voltage source, ^^is the voltage of the second voltage source, and ±^!I+is the maximum voltage of the auxiliary converter.

5. The power electronic arrangement of any of claims 1 to 4, the second auxiliary converter comprises a leg common to the third and fourth voltage source, said leg configured to have anoffset voltage given by the equation:^U = sign0^*20|^*| − ^!I+2for |^^| < |^*|; andfor |^^| > |^*|,where ^^is the voltage of the third voltage source, ^*is the voltage of the fourth voltage source, and ±^!I+is the maximum voltage of the auxiliary converter.

6. A method for operating a power electronic arrangement for a reluctance machine, comprising: controlling, during a first and third portion of an electrical cycle, a first auxiliary converter to deliver a bias voltage, wherein controlling the first auxiliary converter comprises: when a current in a first phase winding is larger than a current in a second phase winding, configuring a first voltage source of the first auxiliary converter associated with the first phase winding to extract power from a circulating current loop and configuring a second voltage source of the first auxiliary converter associated with a second phase winding to inject power into the circulating current loop; and when the current in the second phase winding is larger than the current in the first phase winding, configuring the first voltage source to inject power into the circulating current loop and configuring the second voltage source to extract power from the circulating current loop; andcontrolling, during a second and fourth portion of an electrical cycle, a second auxiliary converter to deliver a bias voltage, wherein controlling the second auxiliary converter comprises: when the current in the second phase winding is larger than a current in a third phase winding, configuring a third voltage source of the second auxiliary converter associated with the second phase winding to extract power from the circulating current loop and configuring a fourth voltage source of the second auxiliary converter associated with the third phase winding to inject power into the circulating current loop; and when the current in the third phase winding is larger than the current in the second phase winding, configuring the third voltage source to inject power into the circulating current loop and configuring the fourth voltage source to extract power from the circulating current loop.

7. The method of claim 6, further comprising determining a transfer function to determine power delivered by each auxiliary converter during a crossover between adjacent portions of the electrical cycle; and controlling the first and second auxiliary converters based on the transfer function.

8. The method of claim 7, wherein the transfer function comprises a smoothing factor, the smoothing factor operable to determine a transition from one auxiliary converter to the other auxiliary converter.

9. The method of claim 6, wherein the first auxiliary converter comprises a first leg associated with the first voltage source, a third leg associated with the second voltage source, and a second leg associated with both the first and second voltage source, and wherein controlling the auxiliary converter comprises: determining a leg of the first and third legs carrying a larger phase current; determining a duty cycle of the determined leg based on a phase current in the determined leg, and a voltage of a voltage source associated with the determined leg, such that the duty cycle is maintained close to 50%; determining a duty cycle of the second leg based on a voltage of the first voltage source, a voltage of the second voltage source, and the duty cycle of the determined leg, such that the duty cycle is maintained close to 50%;determining a duty cycle of a remaining leg of the first and third legs based on a phase current in the remaining leg, a voltage of the voltage source associated with the remaining leg, and the duty cycles of the determined leg and the second leg.

10. The method of claim 6, wherein the second auxiliary converter comprises a first leg associated with the third voltage source, a third leg associated with the fourth voltage source, and a second leg associated with both the third and fourth voltage source, and wherein controlling the auxiliary converter comprises: determining a leg of the first and third legs carrying a larger phase current; determining a duty cycle of the determined leg based on a phase current in the determined leg, and a voltage of a voltage source associated with the determined leg, such that the duty cycle is maintained close to 50%; determining a duty cycle of the second leg based on a voltage of the third voltage source, a voltage of the fourth voltage source, and the duty cycle of the determined leg, such that the duty cycle is maintained close to 50%; determining a duty cycle of a remaining leg of the first and third legs based on a phase current in the remaining leg, a voltage of the voltage source associated with the remaining leg, and the duty cycles of the determined leg and the second leg.

Images