Electronic device and process simulation method using same

Abstract

An electronic device according to embodiments of the present disclosure may comprise: a memory including one or more storage media for storing at least one instruction; and at least one processor including a processing circuit for executing the at least one instruction. The at least one processor may generate a short-term current profile of each unit block, generate a current profile library by summing the short-term current profiles for each bias condition of multiple unit blocks, generate a lookup table including information on a block combination according to at least one operation scenario, configure a long-term dynamic voltage and frequency scaling (DVFS) envelope on the basis of a worst transient interval, extract a short-term voltage profile for the long-term DVFS envelope from the current profile library on the basis of the lookup table, generate a long-term voltage profile by temporally overlapping the short-term voltage profiles on the basis of the long-term DVFS envelope, and output a power noise log on the basis of the long-term voltage profile.

Description

Electronic device and process simulation method using the same

[0001] Various embodiments of the present disclosure relate to process simulation technology, and more specifically, to an electronic device that generates a long-term voltage profile based on a software operation scenario and outputs a power noise log based on the long-term voltage profile, and a process simulation method using the same.

[0002] Process simulation is performed to predict how a system will operate under various operating scenarios and to evaluate power consumption and noise stability in electronic circuit devices, including SoCs (System on Chip), under operating scenarios simulating the mounting of various electronic products (e.g., printed circuit boards, SoC packages, and multi-IC assemblies such as HBM, MCP, and SiP). In particular, in complex systems such as SoCs, Dynamic Voltage and Frequency Scaling (DVFS) technology is applied for system resource efficiency and low-power operation, and maintaining a balance between power consumption and system performance in DVFS technology is essential.

[0003] Generating power noise logs during the sign-off phase is a critical verification process for evaluating performance by considering the overall operation of the SoC, for example, after the placement and routing of all intellectual properties (IPs) have been completed and functional capabilities verified in process simulations. Power noise generated when power consumption fluctuates rapidly directly impacts system performance and can cause system instability. In particular, voltage or frequency fluctuations occurring in DVFS environments—which are employed to increase system efficiency—actually become factors that compromise power efficiency and destabilize the system; therefore, high technical expertise is required for performance optimization and feature implementation.

[0004] On the other hand, short-term current profiles have limitations in accurately modeling power noise fluctuations that may occur in long-term simulations. While short-term noise within a single IP block can serve as an indicator to verify design quality and decide on modifications, design quality can only be assessed when the major trends of long-term noise overlap with the short-term noise, particularly when multiple chips and packages are assembled using combinations of IPs, chip package wiring, or interposers such as HBM and MCP. For example, simply combining or overlapping existing short-term current profiles fails to adequately reflect the complex power fluctuations that may occur in long-term scenarios. In particular, since current fluctuations are highly complex during transient periods when the system rapidly switches between high-performance and low-power modes, using conventional methods presents a problem in predicting long-term power noise. Meanwhile, while it is necessary to consider both long-term noise trends and short-term noise peaks, in reality, performing a simulation that considers both requires large-scale computing resources or lengthy analysis times, making it inefficient to incorporate into the development process while reflecting design changes during the SoC design phase. In particular, for SoCs using DVFS or those composed of various types of blocks, the number of cases involving power noise during operation increases; since analyzing each of these power noises is also difficult, technologies to overcome this need to be considered.

[0005] Various embodiments of the present disclosure may provide an electronic device and a process simulation method that generates a short-term current profile and a short-term voltage profile according to a software operation scenario, and outputs a power noise log based on a long-term voltage profile generated using the short-term current profile and the short-term voltage profile.

[0006] An electronic device according to embodiments of the present disclosure may include a memory comprising one or more storage media for storing at least one instruction, and at least one processor comprising a processing circuit for executing said at least one instruction. The at least one processor generates a short-term current profile for each unit block, generates a library of said short-term current profiles according to the bias conditions of said unit blocks, generates a library containing current profile information according to a change in bias conditions for at least one operation scenario, i.e., one IP block, and generates a case list in the form of a lookup table based on a combination of IP blocks based on the operation scenario of the SoC. A long-term Dynamic Voltage and Frequency Scaling (DVFS) envelope is set based on the worst transient period with a large amount of current change from each case, and based on said lookup table, a short-term current profile of a block combination in which the current profiles of several blocks are summed from the current profile library is generated. At a certain moment of the above long-term DVFS envelope, a short-term voltage profile is extracted by combining operation blocks for this, and a short-term voltage profile is extracted up to another moment of the DVFS envelope where the bias changes to a different value. By superimposing the short-term voltage profiles in chronological order based on the above long-term DVFS envelope, a long-term voltage profile is generated, and a power noise log can be output based on the long-term voltage profile.

[0007] In one embodiment, the at least one processor can generate the short-term current profile by setting the bias condition including at least one of voltage, frequency, or temperature for each unit block and measuring the current change of each unit block according to the bias condition.

[0008] In one embodiment, the at least one processor can generate the current profile library corresponding to the at least one operation scenario of the block combination by summing the current profiles of the plurality of unit blocks according to the bias conditions.

[0009] In one embodiment, the lookup table may provide a current variation or a voltage variation of the block combination by including at least one operation scenario of the block combination, or the current profile according to the at least one operation scenario.

[0010] In one embodiment, the at least one processor can define a voltage range and a frequency range according to DVFS based on the maximum voltage and frequency fluctuations occurring during the transition of the at least one operation scenario.

[0011] In one embodiment, the at least one processor can analyze the worst transient period in which the maximum voltage and the frequency fluctuation occur, and set the long-term DVFS envelope based on the worst transient period.

[0012] In one embodiment, the at least one processor can generate the long-term voltage profile by extracting a plurality of short-term voltage profiles corresponding to the long-term DVFS envelope from the current profile library based on the at least one operation scenario stored in the lookup table, and arranging the short-term voltage profiles in the execution order of the block combination according to the at least one operation scenario.

[0013] In one embodiment, the at least one processor can simulate power noise fluctuations that may occur in each operation scenario based on the long-term voltage profile, and generate the power noise log based on the simulation.

[0014] In one embodiment, the power noise log may include voltage fluctuations, frequency fluctuations, toggling ratio fluctuations of circuit logic, and maximum or minimum values ​​of the power noise occurring in the at least one operation scenario.

[0015] In one embodiment, the at least one processor can evaluate the long-term power efficiency of the system using the long-term voltage profile and verify power integrity in a DVFS environment based on the power noise log.

[0016] According to various embodiments of the present disclosure, the process simulation method of the present disclosure may include: generating a short-term current profile of each unit block; generating a current profile library by summing the short-term current profiles according to bias conditions of a plurality of unit blocks; generating a lookup table including information on block combinations according to at least one operation scenario; setting a long-term Dynamic Voltage and Frequency Scaling (DVFS) envelope based on a worst transient interval; extracting a short-term voltage profile for the long-term DVFS envelope from the current profile library based on the lookup table; generating a long-term voltage profile by superimposing the short-term voltage profiles in chronological order based on the long-term DVFS envelope; and outputting a power noise log based on the long-term voltage profile.

[0017] In one embodiment, the operation of generating the short-term current profile may include the operation of setting the bias condition, which includes at least one of voltage, frequency, or temperature for each unit block, and the operation of generating the short-term current profile by measuring the current change of each unit block according to the bias condition.

[0018] In one embodiment, the operation of generating the current profile library may include the operation of generating the current profile library corresponding to at least one operation scenario of the block combination by summing the current profiles of the plurality of unit blocks according to the bias conditions.

[0019] In one embodiment, the lookup table may provide a current variation or a voltage variation of the block combination by including at least one operation scenario of the block combination, or the current profile according to the at least one operation scenario.

[0020] In one embodiment, the operation of setting the long-term DVFS envelope may include an operation of defining a voltage range and a frequency range according to the DVFS based on the maximum voltage and frequency fluctuations occurring during the transition of the at least one operation scenario.

[0021] In one embodiment, the operation of setting the long-term DVFS envelope may include the operation of analyzing the worst transient period in which the maximum voltage and the frequency fluctuation occur, and the operation of setting the long-term DVFS envelope based on the worst transient period.

[0022] In one embodiment, the operation of generating the long-term voltage profile may include the operation of extracting a plurality of short-term voltage profiles corresponding to the long-term DVFS envelope from the current profile library based on the at least one operation scenario stored in the lookup table, and the operation of generating the long-term voltage profile by arranging the short-term voltage profiles in the execution order of the block combination according to the at least one operation scenario.

[0023] In one embodiment, the operation of outputting the power noise log may include the operation of simulating power noise fluctuations that may occur in each operation scenario based on the long-term voltage profile, and the operation of generating the power noise log based on the simulation.

[0024] In one embodiment, the power noise log may include an operation including voltage fluctuations, frequency fluctuations, and a maximum or minimum value of the power noise occurring in the at least one operation scenario.

[0025] In one embodiment, the operation of outputting the power noise log may include an operation of evaluating the long-term power efficiency of the system using the long-term voltage profile, and an operation of verifying power integrity in a DVFS environment based on the power noise log.

[0026] According to one embodiment of the present disclosure, the electronic device of the present disclosure and the process simulation method using the same can construct a current profile library by summing the short-term current profiles of each unit block according to bias conditions, manage current and voltage fluctuations according to various operation scenarios through a lookup table, and set a long-term DVFS envelope by analyzing the worst transient section.

[0027] Accordingly, the electronic device of the present disclosure and the process simulation method using the same can predict power noise that may occur in each operation scenario by simulating the power consumption of the system according to long-term scenarios, and improve the long-term stability and efficiency of the system in a DVFS environment.

[0028] The effects obtainable from the exemplary embodiments of the present disclosure are not limited to those mentioned above, and other unmentioned effects can be clearly derived and understood by those skilled in the art to which the exemplary embodiments of the present disclosure belong from the description below. That is, unintended effects resulting from the implementation of the exemplary embodiments of the present disclosure can also be derived by those skilled in the art from the exemplary embodiments of the present disclosure.

[0029] FIG. 1 is a block diagram showing an electronic device in a network environment according to one embodiment.

[0030] FIG. 2 is a block diagram showing the configuration of an electronic device according to one embodiment.

[0031] FIG. 3 is an exemplary diagram showing the analysis of a Chip, Package, and PCB Power Delivery network of an electronic device according to one embodiment of the present disclosure.

[0032] FIG. 4 is a flowchart illustrating the operation of an electronic device according to one embodiment of the present disclosure.

[0033] FIG. 5 is an exemplary diagram showing the current profile of a unit block according to one embodiment of the present disclosure.

[0034] FIG. 6 is an exemplary diagram showing the current profile of a block combination according to one embodiment of the present disclosure.

[0035] FIG. 7 is an exemplary diagram showing a lookup table generated by an electronic device according to one embodiment of the present disclosure.

[0036] FIG. 8 is an exemplary diagram showing a long-term DVFS envelope according to one embodiment of the present disclosure.

[0037] FIGS. 9a to 9d are exemplary diagrams showing short-term voltage profiles for block combinations according to one embodiment of the present disclosure.

[0038] FIG. 10 is an exemplary diagram showing a long-term voltage profile generated by an electronic device according to one embodiment of the present disclosure.

[0039] Hereinafter, embodiments of the present disclosure are described in detail with reference to the drawings so that those skilled in the art can easily practice them. However, the present disclosure may be embodied in various different forms and is not limited to the embodiments described herein. In relation to the description of the drawings, the same or similar reference numerals may be used for identical or similar components. Furthermore, in the drawings and related descriptions, descriptions of well-known functions and configurations may be omitted for clarity and brevity.

[0040] Here, it will be understood that each block of the process flow diagrams and the combinations of the flowcharts can be executed by computer program instructions.

[0041] Additionally, each block may represent a module, segment, or part of code containing one or more executable instructions for executing a specified logical function(s). It should be noted that in various embodiments, the functions mentioned in the blocks may be performed out of the order mentioned. For example, two blocks shown in succession may actually perform functions substantially simultaneously, or the blocks may sometimes perform functions in reverse order according to the corresponding function.

[0042] Here, the term 'part' as used in this embodiment refers to software or hardware components such as FPGAs (Field Programmable Gate Arrays) or ASICs (Application Specific Integrated Circuits), and the 'part' performs certain roles. However, the meaning of 'part' is not limited to software or hardware. The 'part' may be configured to reside in an addressable storage medium or may be configured to operate one or more packet processing units. Thus, as an example, the 'part' includes components such as software components, object-oriented software components, class components, and task components, as well as processes, functions, attributes, procedures, subroutines, segments of program code, drivers, firmware, microcode, circuits, data, databases, data structures, tables, arrays, and variables. The functions provided within the components and 'parts' may be combined into a smaller number of components and 'parts' or further separated into additional components and 'parts'. In addition, the components and '~parts' may be implemented to utilize one or more Central Processing Units (CPUs) within the device or secure multimedia card. Furthermore, in one embodiment, the '~part' may include one or more packet processing devices.

[0043] According to one embodiment, the electronic device may be a device that includes a communication function. For example, the electronic device may include at least one of a smartphone, a tablet personal computer, a mobile phone, a video phone, an e-book reader, a desktop personal computer, a laptop personal computer, a netbook computer, a personal digital assistant (PDA), a portable multimedia player (PMP), an MP3 player, a mobile medical device, a camera, or a wearable device (e.g., a head-mounted device (HMD) such as electronic glasses, electronic clothing, an electronic bracelet, an electronic necklace, an electronic appcessory, an electronic tattoo, or a smart watch).

[0044] According to one embodiment, the electronic device may be a smart home appliance equipped with communication functions. The smart home appliance may include, for example, at least one of a television, a DVD (digital video disk) player, audio, a refrigerator, an air conditioner, a vacuum cleaner, an oven, a microwave oven, a washing machine, an air purifier, a set-top box, a TV box (e.g., Samsung HomeSync™, Apple TV™, or Google TV™), game consoles, an electronic dictionary, an electronic key, a camcorder, or a digital photo frame.

[0045] According to some embodiments, the electronic device may include at least one of various medical devices (e.g., MRA (magnetic resonance angiography), MRI (magnetic resonance imaging), CT (computed tomography), imaging devices, ultrasound devices, etc.), navigation devices, global positioning system receivers, EDR (event data recorder), FDR (flight data recorder), automotive infotainment devices, marine electronic equipment (e.g., marine navigation devices and gyrocompasses, etc.), avionics, security devices, vehicle head units, industrial or home robots, ATMs (automatic teller machines) of financial institutions, or POSs (point of sales) of stores.

[0046] According to one embodiment, the electronic device may include at least one of furniture or part of a building / structure including communication functions, an electronic board, an electronic signature receiving device, a projector, or various measuring instruments (e.g., water, electricity, gas, or radio wave measuring instruments, etc.). According to one embodiment, the electronic device may be a combination of one or more of the various devices described above. According to one embodiment, the electronic device may be a flexible device. According to one embodiment, it is obvious to those skilled in the art that the electronic device is not limited to the devices described above.

[0047] Hereinafter, electronic devices according to various embodiments will be examined with reference to the attached drawings. In the various embodiments, the term "user" may refer to a person using the electronic device or a device using the electronic device (e.g., an artificial intelligence electronic device).

[0048] FIG. 1 is a block diagram showing an electronic device (101) in a network environment (100) according to one embodiment.

[0049] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) through a first network (198) (e.g., a short-range wireless communication network) or with at least one of an electronic device (104) or a server (108) through a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) through a server (108). According to one embodiment, the electronic device (101) may include a processor (120), memory (130), input module (150), sound output module (155), display module (160), audio module (170), sensor module (176), interface (177), connection terminal (178), haptic module (179), camera module (180), power management module (188), battery (189), communication module (190), subscriber identification module (196), or antenna module (197). In some embodiments, at least one of these components (e.g., connection terminal (178)) may be omitted from the electronic device (101), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (176), camera module (180), or antenna module (197)) may be integrated into a single component (e.g., display module (160)).

[0050] The processor (120) can control at least one other component (e.g., a hardware or software component) of the electronic device (101) connected to the processor (120) by executing software (e.g., a program (140)), and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (120) can store commands or data received from other components (e.g., a sensor module (176) or a communication module (190)) in volatile memory (132), process the commands or data stored in volatile memory (132), and store the resulting data in non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., a central processing unit or an application processor) or an auxiliary processor (123) that can operate independently or together with it (e.g., a graphics processing unit, a neural processing unit (NPU), an image signal processor, a sensor hub processor, or a communication processor). For example, if the electronic device (101) includes a main processor (121) and an auxiliary processor (123), the auxiliary processor (123) may be configured to use lower power than the main processor (121) or to be specialized for a designated function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as part thereof.

[0051] The auxiliary processor (123) may control at least some of the functions or states associated with at least one component of the electronic device (101) (e.g., display module (160), sensor module (176), or communication module (190)) on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (123) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (180) or communication module (190)). According to one embodiment, the auxiliary processor (123) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. The above learning may be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or through a separate server (e.g., server (108)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0052] The memory (130) can store various data used by at least one component of the electronic device (101) (e.g., processor (120) or sensor module (176)). The data may include, for example, input data or output data for software (e.g., program (140)) and related commands. The memory (130) may include volatile memory (132) or non-volatile memory (134).

[0053] The program (140) may be stored as software in memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0054] The input module (150) can receive commands or data to be used for a component of the electronic device (101) (e.g., processor (120)) from outside the electronic device (101) (e.g., user). The input module (150) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0055] The sound output module (155) can output a sound signal to the outside of the electronic device (101). The sound output module (155) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0056] The display module (160) can visually provide information to an external (e.g., user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0057] The audio module (170) can convert sound into an electrical signal, or, for other examples, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150) or output sound through the sound output module (155) or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (101).

[0058] The sensor module (176) can detect the operating state of the electronic device (101) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (176) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0059] The interface (177) may support one or more specified protocols that can be used for the electronic device (101) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (102)). According to one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0060] The connection terminal (178) may include a connector through which the electronic device (101) can be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0061] The haptic module (179) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that can be perceived by the user through tactile or kinesthetic senses. According to one embodiment, the haptic module (179) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0062] The camera module (180) can capture still images and video. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0063] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0064] The battery (189) can supply power to at least one component of the electronic device (101). According to one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0065] The communication module (190) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may include one or more communication processors that operate independently of the processor (120) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (194) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (104) through a first network (198) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (199) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can identify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (196).

[0066] The wireless communication module (192) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (192) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (192) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), external electronic device (e.g., electronic device (104)), or network system (e.g., second network (199)). According to one embodiment, the wireless communication module (192) may support a Peak data rate (e.g., 20 Gbps or more) for eMBB realization, loss coverage (e.g., 164 dB or less) for mMTC realization, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for URLLC realization.

[0067] An antenna module (197) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (198) or a second network (199), may be selected from the plurality of antennas, for example, by a communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (197).

[0068] According to various embodiments, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0069] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0070] According to one embodiment, commands or data may be transmitted or received between an electronic device (101) and an external electronic device (104) through a server (108) connected to a second network (199). Each of the external electronic devices (102, or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations performed on the electronic device (101) may be performed on one or more of the external electronic devices (102, 104, or 108). For example, if the electronic device (101) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (101) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (101) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (104) or the server (108) may be included within a second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology.

[0071] FIG. 2 is a block diagram showing the configuration of an electronic device (200) according to one embodiment.

[0072] Referring to FIG. 2, the electronic device (200) may include a memory (210) and a processor (220). Additionally, according to an embodiment, the electronic device (200) may further include a communication unit (not shown).

[0073] The electronic device (200) of the present disclosure may be implemented as a display device capable of displaying images. For example, the electronic device (200) may include at least one of a TV, a computer, a smartphone, a tablet, a portable media player, a wearable device, a video wall, or a digital photo frame. Additionally, the electronic device may be implemented as various types of devices, such as image processing devices that do not have a display, such as a set-top box, home appliances such as a refrigerator or a washing machine, or information processing devices such as a computer main body. For convenience of explanation, the following description assumes that the electronic device is implemented as a TV, but the electronic device is not limited thereto and may be applied to various electronic devices other than a TV, such as a set-top box.

[0074] In one embodiment, the memory (210) is a storage medium used by the electronic device (200) and can store data such as at least one instruction or setting information corresponding to at least one program. The program may include an operating system (OS) program and various application programs.

[0075] In one embodiment, the memory (210) may include at least one type of storage medium among a flash memory type, a hard disk type, a multimedia card micro type, a card type memory (e.g., SD or XD memory, etc.), RAM (random access memory, RAM), SRAM (static random access memory), ROM (read only memory, ROM), EEPROM (electrically erasable programmable ROM), PROM (programmable ROM), magnetic memory, a magnetic disk, and an optical disk.

[0076] In one embodiment, the communication unit may include a wireless communication unit (e.g., a cellular communication module, a short-range wireless communication module, or a GNSS (global navigation satellite system) communication module) or a wired communication unit. The corresponding communication unit among these may communicate with at least one external device (e.g., a client device, a cloud server, an IPFS) through a network (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a wide-area communication network such as a computer network (e.g., a LAN or WAN)).

[0077] In one embodiment, the communication unit includes a communication circuit, and the communication circuit may include at least one hardware component (e.g., a modulator, a demodulator, an antenna, a transceiver) to support the transmission and / or reception of a signal between an electronic device (200) and an external electronic device. The communication unit may support 5G networks following 4G networks and next-generation communication technologies, for example, new radio access technology. NR access technology may support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low-latency (ultra-reliable and low-latency communications (URLLC)). For example, the communication unit may support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate. The communication unit can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beamforming, or large-scale antenna.

[0078] In one embodiment, the processor (220) includes a processing circuit and can execute software (e.g., a program) to control at least one other component (e.g., a hardware or software component) of an electronic device (200) connected to the processor (220) and can perform various data processing or operations.

[0079] In one embodiment, the processor (220) may store commands or data received from another component (e.g., a communication unit) in volatile memory as at least part of data processing or computation, process the commands or data stored in volatile memory, and store the result data in non-volatile memory.

[0080] In one embodiment, the processor (220) may include a main processor (e.g., a central processing unit or an application processor) or an auxiliary processor that can be operated independently or together with it (e.g., a graphics processing unit, a neural processing unit (NPU), or a communication processor).

[0081] The processor (220) can execute a program stored in storage. The processor (220) is implemented as at least one processor that loads at least a portion of a program from storage where the program is stored into memory (210) and executes the program loaded into memory (210). When the processor (220) of the present embodiment is implemented as a plurality of units, these processors may be separated or implemented as a plurality of modules within a single IC. For example, the processor (220) may include at least one of a CPU (Central Processing Unit), an AP (Application Processor), or a microprocessor.

[0082] FIG. 3 is an exemplary diagram showing the analysis of the Chip, Package, and PCB Power Delivery networks of an electronic device (200) according to one embodiment of the present disclosure.

[0083] Referring to Fig. 3, for the SoC to operate stably and efficiently, each functional block of the SoC must operate according to the designed algorithm, and each logic block must satisfy the electrical target performance.

[0084] SoCs have various operating scenarios, and the current profiles generated in each block may differ depending on the scenario. For example, in an SoC, on-chip power noise may occur due to the system's PDN characteristics based on the current profile.

[0085] As shown in Figure 3, depending on the on-chip power noise, each block within the SoC may fail to achieve target performance, leading to logic malfunctions or increased signal jitter, which can result in performance degradation. Additionally, there is a possibility that electromagnetic interference (EMI) issues may be induced within the SoC. Since these problems can impair the reliability and performance of the SoC system, modeling tools are being developed in the field of Electronic Design Automation (EDA) to model the PDN in 2D, 2.5D, or 3D, or to extract current profiles that reflect various operating scenarios of the SoC.

[0086] In particular, precisely modeling the current profile during the early stages of SoC design can be a key factor in managing on-chip power noise. For instance, current profiles and PDN models can accurately predict on-chip power noise that may occur in the SoC. Furthermore, current profiles and PDN models can be used to provide PDN design guidelines for reducing power noise. In other words, the power integrity of the system can be ensured through current profiles and PDN models.

[0087] The electronic device (200) provides a current profile modeling method that can be applied during the initial stage of SoC design, and through current profile modeling, it can evaluate the power integrity of the SoC system and derive an optimized design.

[0088] FIG. 4 is a flowchart showing the operation of an electronic device (200) according to one embodiment of the present disclosure.

[0089] Referring to FIG. 4, the electronic device (200) of the present disclosure can generate a short-term current profile and a short-term voltage profile based on a software operation scenario, and output a power noise log based on a long-term voltage profile generated using the short-term current profile and the short-term voltage profile.

[0090] For example, the electronic device (200) generates a short-term current profile for each unit block (e.g., IP block) (operation 410), generates a current profile library by summing the short-term current profiles for each bias condition of a plurality of unit blocks (operation 420), generates a lookup table containing information on block combinations according to at least one operation scenario (operation 430), sets a long-term Dynamic Voltage and Frequency Scaling (DVFS) envelope based on the worst transient period (operation 440), extracts a short-term voltage profile for the long-term DVFS envelope from the current profile library based on the lookup table (operation 450), and generates a long-term voltage profile by superimposing the short-term voltage profiles in chronological order based on the long-term DVFS envelope (operation 460). Based on the above long-term voltage profile, a power noise log can be output (operation 470).

[0091] In the following examples of operations, each operation may be performed sequentially, but is not necessarily performed sequentially. For example, the order of the operations may be changed, or at least two operations may be performed in parallel. For example, at least one of the operations may be omitted.

[0092] According to one example, in operation 410, the electronic device (200) can generate a short-term current profile of each unit block. A unit block may refer to an independent circuit or software module that performs a specific function within the electronic device (200). For example, the electronic device (200) can generate a short-term current profile based on a bias change of each unit block. Hereinafter, operation 410 of the electronic device (200) will be described in detail with reference to FIG. 5.

[0093] FIG. 5 is an exemplary diagram showing the current profile of a unit block according to one embodiment of the present disclosure.

[0094] Referring to FIG. 5, the electronic device (200) can generate a short-term current profile by setting a bias condition including at least one of voltage, frequency, or temperature for each unit block and measuring the current change of each unit block according to the bias condition.

[0095] The electronic device (200) can set bias conditions for each unit block. Here, the bias conditions may include parameters such as voltage, frequency, or temperature. By setting the bias conditions, the electronic device (200) can measure the current fluctuations generated by each unit block in a specific operating environment.

[0096] For example, the electronic device (200) can monitor the current generated in the operating state of a specific unit block by setting the voltage and frequency of the block. For example, the electronic device (200) can analyze the maximum power consumption scenario of the block by applying a high voltage and frequency in high-performance mode. For example, the electronic device (200) can measure the current fluctuation in the minimum power consumption state by applying a low voltage and frequency in low-power mode.

[0097] Additionally, the electronic device (200) can measure a current value that changes over time after setting the bias condition. By measuring the current value that changes over time, the electronic device (200) can generate a short-term current profile for each unit block. For example, the electronic device (200) can use the short-term current profile to precisely model the current consumption occurring in a specific time interval.

[0098] In one embodiment, the electronic device (200) may set additional bias conditions including temperature. For example, by measuring the current change occurring in a unit block under specific temperature conditions, the power consumption pattern according to the temperature rise can be identified.

[0099] The electronic device (200) can measure current fluctuations in real time according to the bias conditions of each unit block, and use the short-term current profile to sum the current profiles of multiple blocks or perform power analysis tailored to a specific operation scenario.

[0100] According to one example, in operation 420, the electronic device (200) can generate a current profile library by summing the short-term current profiles for each bias condition of a plurality of the unit blocks. Hereinafter, operation 420 of the electronic device (200) will be described in detail with reference to FIG. 6.

[0101] FIG. 6 is an exemplary diagram showing the current profile of a block combination according to one embodiment of the present disclosure.

[0102] Referring to FIG. 6, the electronic device (200) can generate a current profile library corresponding to at least one operation scenario of a block combination by summing the current profiles of a plurality of unit blocks according to bias conditions. A block combination may refer to a combination of a plurality of unit blocks. An operation scenario may refer to a software operation scenario including a data processing flow at the software level.

[0103] The electronic device (200) can generate a current profile library by summing the short-term current profiles generated in each unit block according to bias conditions. Here, the bias conditions may include parameters such as voltage, frequency, or temperature. The electronic device (200) can sum the current profiles of the corresponding block combinations by taking into account the current fluctuations of each unit block according to the bias conditions.

[0104] According to one example, the electronic device (200) can measure the current fluctuation of each unit block in high-performance mode and then sum the current fluctuations to generate a current profile in high-performance mode. The current profile represents the power consumption and current fluctuations that may occur in the system in high-performance mode. For example, the current fluctuation of each unit block can be measured in the same way in low-power mode and the current fluctuations can be summed to generate a current profile in low-power mode.

[0105] The electronic device (200) can sum various current profiles occurring in multiple operation scenarios and store them in the form of a library. The current profile library can be configured to quickly reference current consumption patterns corresponding to a specific operation scenario. For example, to check how the current fluctuates according to the interaction between blocks, the current profiles of each block can be summed to generate a block combination current profile.

[0106] The electronic device (200) can analyze the power consumption of the system by applying various bias conditions to a plurality of unit blocks and configuring the current profiles summed for each of the plurality of unit blocks into a library.

[0107] In one example, instead of configuring the current profiles summed by a plurality of unit blocks as a library (current profile library), the electronic device (200) may configure the short-term current profiles generated according to the bias change of each unit block as a library (current profile library).

[0108] According to one example, in operation 430, the electronic device (200) may generate a lookup table containing information about block combinations according to at least one operation scenario. At least one operation scenario may be an operation scenario of an SoC. Hereinafter, operation 430 of the electronic device (200) will be described in detail with reference to FIG. 7.

[0109] FIG. 7 is an exemplary diagram showing a lookup table generated by an electronic device (200) according to one embodiment of the present disclosure.

[0110] Referring to FIG. 7, the lookup table may provide current fluctuations or voltage fluctuations of the block combination by including at least one operation scenario of the block combination, or the current profile according to the at least one operation scenario.

[0111] The electronic device (200) can generate a lookup table containing information on block combinations according to each operation scenario. The lookup table provides information on how various blocks are combined and operated according to the system's operation scenario, and can function as an important database capable of predicting power consumption based on current and voltage fluctuations of each block.

[0112] For example, the electronic device (200) can define operation scenarios such as high-performance mode, low-power mode, or standby mode, and record combinations of blocks activated in each scenario and current and voltage fluctuations consumed by those blocks. The electronic device (200) can analyze current fluctuations of each block combination and use a lookup table to quickly identify expected power consumption patterns in at least one scenario.

[0113] Additionally, the lookup table may include data that can analyze how current and voltage fluctuate when a transition occurs between operation scenarios. For example, the lookup table can record current fluctuations of blocks that are activated when the system switches from low-power mode to high-performance mode and predict power changes based on current fluctuations.

[0114] The electronic device (200) can manage current and voltage fluctuations of block combinations by generating a lookup table that reflects how blocks are combined and operated according to various software operation scenarios. For example, the electronic device can analyze current and voltage profiles using the lookup table and optimize the power consumption of the system.

[0115] According to one example, in operation 440, the electronic device (200) can set a long-term DVFS envelope based on the worst transient period. For example, the electronic device (200) can analyze cases in which there exists a worst transient period in which maximum voltage, current fluctuation, and frequency fluctuation occur based on a lookup table, and set a long-term DVFS envelope of a first case (e.g., a representative case) based on the worst transient period. The representative case may be, for example, a case that the user wishes to extract among the analyzed cases. The worst transient period may be, for example, a transient period containing the maximum fluctuation of voltage, current, frequency, and clock among the various cases in the lookup table. Hereinafter, operation 440 of the electronic device (200) will be described in detail with reference to FIG. 8.

[0116] FIG. 8 is an exemplary diagram showing a long-term DVFS envelope according to one embodiment of the present disclosure.

[0117] Referring to FIG. 8, the electronic device (200) can define a voltage range and a frequency range according to DVFS based on the maximum voltage and frequency fluctuations that occur during the transition of at least one operation scenario.

[0118] The electronic device (200) can set a long-term DVFS envelope based on the worst transient period. The worst transient period represents the maximum voltage and frequency fluctuations that occur when the system switches between different operating modes (e.g., when switching from low-power mode to high-performance mode), and it is important to set a DVFS envelope to effectively manage said fluctuations.

[0119] For example, the electronic device (200) can monitor the rapid voltage drop and frequency change that occurs when the system switches from a high-performance mode to a low-power mode. The voltage and frequency fluctuations may be greatest during the transient period, and the maximum fluctuation range of the transient period may affect the power noise of the system. For example, the electronic device (200) can analyze the maximum fluctuation range and set a DVFS envelope based on the analysis.

[0120] Additionally, the electronic device (200) can define a voltage range based on voltage fluctuations that may occur during the worst transient period. For example, if the voltage rises or falls rapidly when the system switches between operation scenarios, safe upper and lower voltage limits can be set by taking into account the voltage fluctuations. The electronic device (200) can efficiently manage the power consumption of the system in a DVFS environment and prevent system instability caused by excessive voltage fluctuations.

[0121] Additionally, the electronic device (200) can monitor frequency fluctuations and set a frequency range. Since frequency fluctuations are closely related to the performance of the system, the electronic device (200) can define an optimal frequency range so that the system can maintain stability when the frequency changes rapidly.

[0122] The electronic device (200) can ensure voltage and frequency stability in a DVFS environment by analyzing the worst transient period that occurs when switching between system operation scenarios and setting a long-term DVFS envelope according to the analysis.

[0123] In one embodiment, the electronic device (200) can analyze the worst transient period in which the maximum voltage and the frequency fluctuation occur, and set the long-term DVFS envelope based on the worst transient period.

[0124] The above worst transient period may represent the point in time when voltage and frequency fluctuations occurring when the system switches between various operation scenarios are most maximized. If the voltage changes rapidly or the frequency is rapidly adjusted during the above period, the system may become unstable or excessive power consumption may occur. Therefore, the electronic device (200) can precisely analyze the worst transient period and set a long-term DVFS envelope that can guarantee the operational stability of the system.

[0125] In one embodiment, the electronic device (200) can set safe upper and lower voltage limits by considering the maximum voltage fluctuation in the worst transient period. For example, the electronic device (200) can analyze the pattern of voltage fluctuation that occurs when the system switches from high-performance mode to low-power mode. For example, the electronic device (200) can analyze the pattern of voltage fluctuation that occurs when the system switches from low-power mode to high-performance mode. For example, the electronic device (200) can adjust the DVFS envelope so that the voltage does not exceed the allowed range in a specific section.

[0126] Meanwhile, if the frequency fluctuates rapidly, it may be difficult for the system to maintain the desired performance level, and in particular, if the frequency fluctuates unstably during high-performance work, power efficiency may be reduced. The electronic device (200) can monitor the maximum frequency fluctuation occurring during the worst transient period and set a long-term DVFS envelope to set a stable frequency range so as to maintain the system's long-term performance and power efficiency.

[0127] According to one example, in operation 450, the electronic device (200) can extract a short-term voltage profile for the long-term DVFS envelope from the current profile library based on the lookup table. According to one embodiment, the electronic device (200) can generate (or obtain) a short-term current profile of a block combination in which the current profiles of a plurality of unit blocks are summed from the current profile library based on the lookup table. One point in time (or interval) of the long-term DVFS envelope corresponds to an environment having a fixed bias. Accordingly, the electronic device (200) can extract a short-term voltage profile of the unit blocks combined for that point in time (or interval) and extract a short-term voltage profile up to another point in time (or interval) of the long-term DVFS envelope where the bias changes to a different value. Hereinafter, operation 450 of the electronic device (200) will be described in detail with reference to FIGS. 9a to 9d.

[0128] FIGS. 9a to 9d are exemplary diagrams showing short-term voltage profiles for block combinations according to one embodiment of the present disclosure.

[0129] Referring to FIGS. 9a through 9d, the electronic device (200) can extract a plurality of short-term voltage profiles corresponding to the long-term DVFS envelope from the current profile library based on the at least one operation scenario stored in the lookup table.

[0130] The electronic device (200) can extract a short-term voltage profile corresponding to a long-term DVFS envelope from a current profile library based on a lookup table. In the above process, the electronic device (200) can precisely analyze the voltage fluctuations generated by a block combination under specific bias conditions according to each operation scenario and convert them into a short-term voltage profile.

[0131] For example, the electronic device (200) can extract a short-term voltage profile corresponding to a specific operating scenario by referring to current fluctuations that may occur while switching to a high-performance mode. The voltage profile reflects the voltage fluctuations required for the system to operate stably in high-performance mode and can be generated based on data stored in a current profile library.

[0132] Additionally, the electronic device (200) can finely analyze voltage fluctuations that may occur in each block combination in accordance with the long-term DVFS envelope. The electronic device (200) can predict voltage fluctuations that may occur during the process of the system switching between various operation scenarios and accurately extract a short-term voltage profile based on the prediction. For example, if the voltage rises rapidly when switching from a low-power mode to a high-performance mode, the electronic device (200) can manage voltage fluctuations in the long-term scenario by generating a short-term voltage profile that reflects the fluctuation.

[0133] That is, the electronic device (200) can establish a basis for generating a long-term voltage profile by referring to the operation scenario and current profile library stored in the lookup table and extracting a short-term voltage profile corresponding to the long-term DVFS envelope.

[0134] According to one example, in operation 460, the electronic device (200) can generate a long-term voltage profile by superimposing the short-term voltage profile in chronological order based on the long-term DVFS envelope. The long-term voltage profile may be, for example, a voltage profile that reflects the short-term voltage profile. Hereinafter, operation 460 of the electronic device (200) will be described in detail with reference to FIG. 10.

[0135] FIG. 10 is an exemplary diagram showing a long-term voltage profile generated by an electronic device (200) according to one embodiment of the present disclosure.

[0136] Referring to FIG. 10, the electronic device (200) can generate a long-term voltage profile by arranging the short-term voltage profile in the execution order of a block combination according to at least one operation scenario.

[0137] The electronic device (200) can generate a long-term voltage profile by superimposing a short-term voltage profile in chronological order based on a long-term DVFS envelope. For example, each short-term voltage profile is arranged according to the execution order of a block combination defined for an operation scenario and can accurately reflect the long-term voltage fluctuations of the system.

[0138] The electronic device (200) can analyze how each block interacts based on operation scenarios extracted from a lookup table and current and voltage fluctuation information in those scenarios. For example, the electronic device (200) can arrange voltage fluctuations occurring during the execution of at least one scenario in chronological order and construct a long-term voltage profile including transient periods that may occur during the transition between at least two scenarios.

[0139] Additionally, the electronic device (200) can model long-term voltage fluctuations by superimposing the short-term voltage profiles of each block. For example, it can accurately predict voltage fluctuations that occur while the system switches from a high-performance mode to a low-power mode and reflect said fluctuation pattern in the long-term voltage profile. Accordingly, the electronic device (200) can simulate long-term voltage fluctuations and evaluate the power integrity and stability of the system.

[0140] Accordingly, in operation 460, the electronic device (200) can generate a long-term voltage profile that reflects voltage fluctuations of a predetermined time (e.g., 1.0 μs or longer) of the system by arranging and overlapping each short-term voltage profile in chronological order according to the operation scenario. The long-term voltage profile can be used to generate a power noise log of the system and can be used to predict various power fluctuations that may occur in a DVFS environment.

[0141] According to one example, in operation 470, the electronic device (200) may output a power noise log based on the long-term voltage profile. For example, the electronic device (200) may simulate power noise fluctuations that may occur in each operation scenario based on the long-term voltage profile, and generate the power noise log based on the simulation. According to one embodiment, the power noise log may be a power noise log that reflects both short-term voltage fluctuations and long-term voltage ripples.

[0142] The electronic device (200) can output a power noise log based on a long-term voltage profile. For example, the power noise log may be log data that analyzes and records the magnitude of voltage fluctuations, frequency fluctuations, and power noise that the system may experience in various operating scenarios. The long-term voltage profile shows how the voltage fluctuations of the system change over time, and the electronic device (200) can use the long-term voltage profile to determine long-term power consumption patterns and the occurrence pattern of power noise.

[0143] For example, the electronic device (200) can simulate power noise fluctuations that may occur in each operation scenario. The electronic device (200) can calculate how much the voltage fluctuates according to at least one operation scenario based on voltage fluctuation data included in a long-term voltage profile. For example, the electronic device (200) can predict the maximum or minimum value of power noise that may occur in the section where the voltage fluctuates rapidly when the system switches from a high-performance mode to a low-power mode. The electronic device (200) can generate a power noise log using the simulation results. The power noise log can be used as an important reference material during the design or verification process of the electronic device (200).

[0144] Additionally, the electronic device (200) can evaluate long-term power efficiency using a long-term voltage profile. In particular, the electronic device (200) can optimize long-term power efficiency by analyzing how the system consumes power in a long-term scenario of 1.0 μs or more.

[0145] Additionally, the electronic device (200) can verify power integrity in a DVFS environment based on power noise logs. Although DVFS technology is an important technology for reducing power consumption in a system, large fluctuations in voltage and frequency can affect the stability of the system. The electronic device (200) can analyze power noise logs to identify power fluctuations occurring in the DVFS environment and problems caused by such fluctuations in advance, and ensure power integrity.

[0146] In one embodiment, the power noise log may include voltage fluctuations, frequency fluctuations, and maximum or minimum values ​​of the power noise occurring in the at least one operation scenario.

[0147] The electronic device (200) can precisely measure the maximum power noise generated while the system switches from a high-performance mode to a low-power mode, or vice versa, by using the maximum or minimum values ​​of voltage fluctuations, frequency fluctuations, and power noise generated in the operation scenario.

[0148] The electronic device (200) can predict the pattern of power fluctuations occurring in each operation scenario through the log data. For example, the electronic device (200) can record the maximum power noise that may occur in a corresponding section when the voltage fluctuates unstably due to rapid power consumption in the system in high-performance mode. As another example, the electronic device (200) may generate minimum power noise in low-power mode because power consumption is low, and the minimum power noise can also be recorded in the power noise log.

[0149] In one embodiment, the electronic device (200) can evaluate the long-term power efficiency of the system using the long-term voltage profile and verify power integrity in a DVFS environment based on the power noise log. Long-term power efficiency may refer to power efficiency measured or evaluated over a time interval of 1.0 μs or more. For example, the electronic device (200) can provide information that can improve the efficiency of the system by evaluating power fluctuations occurring in a long-term scenario.

[0150] For example, the electronic device (200) can evaluate long-term power efficiency by analyzing power consumption patterns that occur while the system performs high-performance tasks for a long time. For example, the electronic device (200) can derive a method to optimize power efficiency in a DVFS environment by evaluating how current and voltage fluctuate over a long period of time of 1.0 μs or more and how this affects the system's performance and power consumption.

[0151] Additionally, the electronic device (200) can verify power integrity in a DVFS environment based on power noise logs. Although DVFS technology is essential for reducing power consumption, there is a possibility that the system may become unstable when voltage and frequency fluctuations occur. The electronic device (200) can analyze the fluctuations in advance and establish a method to ensure power integrity through power noise logs. Therefore, the electronic device (200) enables the system to maintain stable power supply and integrity even in various operation scenarios.

[0152] In this way, the electronic device (200) and the process simulation method using it can construct a current profile library by summing the short-term current profiles of each unit block according to bias conditions, manage current and voltage fluctuations according to various operation scenarios through a lookup table, and set a long-term DVFS envelope by analyzing the worst transient period.

[0153] The electronic device (200) and the process simulation method using it can predict power noise that may occur in each operation scenario by simulating the power consumption of the system according to a long-term scenario, and improve the long-term stability and efficiency of the system in a DVFS environment.

[0154] However, as this has been explained above, a redundant explanation thereof will be omitted.

[0155] An electronic device according to embodiments of the present disclosure may include a memory for storing at least one instruction and at least one processor for executing at least one instruction. The at least one processor may generate a short-term current profile for each unit block (e.g., IP block), generate a library of the short-term current profiles for each bias condition of the unit block, generate a library containing current profile information according to a change in bias condition of at least one operation scenario, e.g., one IP block, and generate a case list in the form of a lookup table based on a combination of IP blocks based on the operation scenario of the SoC. A long-term Dynamic Voltage and Frequency Scaling (DVFS) envelope may be set based on the worst transient period with a large amount of current change from each case, and based on the lookup table, a short-term current profile of a block combination in which the current profiles of a plurality of unit blocks are summed from the current profile library may be generated. At a certain moment of the long-term DVFS envelope, a short-term voltage profile is extracted by combining operation blocks for this, and the short-term voltage profile can be extracted up to another moment of the long-term DVFS envelope where the bias changes to a different value. By superimposing the short-term voltage profiles in chronological order based on the long-term DVFS envelope, a long-term voltage profile is generated, and a power noise log can be output based on the long-term voltage profile.

[0156] The display device according to the various embodiments disclosed in this document may be a device of various forms. The display device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, or a consumer electronics device. The display device according to the embodiments of this document is not limited to the devices described above.

[0157] The various embodiments of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may each include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as "first," "second," or "first" or "second" may be used simply to distinguish said components from other said components and do not limit said components in any other aspect (e.g., importance or order). Where any (e.g., 1st) component is referred to as "coupled" or "connected" to another (e.g., 2nd) component, with or without the terms "functionally" or "communicationly," it means that said any component may be connected to said other component directly (e.g., via a wire), wirelessly, or through a third component.

[0158] The term “module” as used in the various embodiments of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to one embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0159] Various embodiments of this document may be implemented as software (e.g., a program) comprising one or more instructions stored in a storage medium (e.g., internal memory or external memory) readable by a machine (e.g., an electronic device). For example, a processor of the machine (e.g., an electronic device) may call at least one of the one or more instructions stored from the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, "non-transitory" simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and this term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily in the storage medium.

[0160] According to one embodiment, the method according to the various embodiments disclosed herein may be provided as included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online (e.g., download or upload) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0161] According to various embodiments, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to various embodiments, one or more of the components or operations of the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to various embodiments, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

In the electronic device (200), Memory (210) comprising one or more storage media for storing at least one instruction; and It includes at least one processor (220) including a processing circuit that executes at least one instruction, and The above at least one processor is, Generate a short-term current profile for each unit block, and A current profile library is generated by summing the short-term current profiles for each bias condition of a plurality of the above-mentioned unit blocks, and Create a lookup table containing information on block combinations according to at least one operation scenario, and Based on the worst transient period, set a voltage-based long-term DVFS (Dynamic Voltage and Frequency Scaling) envelope, and Based on the above lookup table, short-term voltage profiles for the long-term DVFS envelope are extracted from the current profile library, and A long-term voltage profile is generated by superimposing the short-term voltage profiles in chronological order based on the long-term DVFS envelope, and Outputting a power noise log based on the above long-term voltage profile, Electronic device. In paragraph 1, The above at least one processor is, Setting the bias conditions for each of the above unit blocks, including at least one of voltage, frequency, or temperature, and Generating the short-term current profile by measuring the current change of each unit block according to the above bias conditions or by circuit simulation, Electronic device. In paragraph 1 or 2, The above at least one processor is, By summing the current profiles of the plurality of unit blocks according to the bias conditions, a current profile library corresponding to at least one operation scenario of the block combination is generated. Electronic device. In any one of paragraphs 1 through 3, The above lookup table is, By including the at least one operation scenario of the block combination, or the current profile according to the at least one operation scenario, providing a current variation or voltage variation of the block combination. Electronic device. In any one of paragraphs 1 through 4, The above at least one processor is, Defining a voltage range and a frequency range according to DVFS based on the maximum voltage and frequency fluctuations occurring during the transition of at least one of the above-mentioned operation scenarios, Electronic device. In paragraph 5, The above at least one operation scenario corresponds to an operation scenario of a system on chip (SoC), and The above at least one processor is, Based on the above lookup table, analyze cases in which the worst transient section exists where the maximum voltage, current fluctuation, and frequency fluctuation occur, and Setting the above long-term DVFS envelope of the representative case based on the above worst transient period, Electronic device. In any one of paragraphs 1 through 6, The above at least one processor is, Based on the at least one operation scenario stored in the lookup table, a plurality of short-term voltage profiles corresponding to the long-term DVFS envelope are extracted from the current profile library, and Generating the long-term voltage profile by arranging the short-term voltage profile in the execution order of the block combination according to the at least one operation scenario, Electronic device. In any one of paragraphs 1 through 7, The above at least one processor is, Based on the above long-term voltage profile, simulate power noise fluctuations that may occur in each operation scenario, and Based on the above simulation, generating the power noise log, Electronic device. In paragraph 8, The above power noise log is, A voltage fluctuation, a frequency fluctuation, and a maximum or minimum value of the power noise occurring in at least one of the above operating scenarios, Electronic device. In Article 8 or 9, The above at least one processor is, The long-term power efficiency of the system is evaluated using the above long-term voltage profile, and Verifying power integrity in a DVFS environment based on the above power noise log, Electronic device. Operation of generating a short-term current profile of each unit block; An operation to generate a current profile library by summing the short-term current profiles for each bias condition of a plurality of the above-mentioned unit blocks; An operation to generate a lookup table containing information on block combinations according to at least one operation scenario; Operation of setting a voltage-based long-term DVFS (Dynamic Voltage and Frequency Scaling) envelope based on the worst transient period; Based on the above lookup table, the operation of extracting short-term voltage profiles for the long-term DVFS envelope from the current profile library; The operation of generating long-term voltage profiles by superimposing the short-term voltage profiles in chronological order based on the long-term DVFS envelope; and Operation of outputting a power noise log based on the above long-term voltage profile; including Process simulation method. In Paragraph 11, The operation of generating the above short-term current profile is, An operation of setting the bias condition including at least one of voltage, frequency, or temperature for each of the above unit blocks; and The operation of generating the short-term current profile by measuring the current change of each unit block according to the above bias condition or by circuit simulation; Process simulation method. In Article 11 or Article 12, The operation of generating the above current profile library is, The operation of generating a current profile library corresponding to at least one operation scenario of the block combination by summing the current profiles of the plurality of unit blocks according to the bias conditions; Process simulation method. In any one of paragraphs 11 through 13, The above lookup table is, By including the at least one operation scenario of the block combination, or the current profile according to the at least one operation scenario, providing a current variation or voltage variation of the block combination. Process simulation method. In any one of paragraphs 11 through 13, The operation of setting the above long-term DVFS envelope is, Operation defining a voltage range and a frequency range according to DVFS based on the maximum voltage and frequency fluctuations occurring during the transition of at least one operation scenario; Process simulation method.

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