Wearable electronic device for selecting power input from outside

Abstract

A wearable electronic device according to one embodiment of the present disclosure may comprise: a first PDIC, which identifies an on / off state of a second switch when first power is input through a first input interface, outputs a first signal for turning on a first switch when the second switch is turned off, and outputs a second signal for turning off the first switch when the second switch is turned on; a second PDIC, which identifies an on / off state of the first switch when second power is input through a second input interface, outputs a third signal for turning on the second switch when the first switch is turned off, and outputs a fourth signal for turning off the second switch when the first switch is turned on; and a circuit, which is connected to the first PDIC and the second PDIC, transmits the first signal to the second PDIC so that the second PDIC identifies whether the first switch is turned on, and transmits the third signal to the first PDIC so that the first PDIC identifies whether the second switch is turned on.

Description

A wearable electronic device that selects power input from an external source

[0001] Various embodiments of the present disclosure relate to a wearable electronic device that selects power input from an external source.

[0002] Driven by the remarkable recent advancements in information and communication technology and semiconductor technology, the distribution and use of various electronic devices, such as smartphones and tablet PCs, are increasing rapidly. These electronic devices can operate using power supplied by batteries.

[0003] A power management module of an electronic device (e.g., a PMIC (power management integrated circuit)) can transfer power supplied from a battery to various components within the electronic device (e.g., a processor, memory, or communication chip). The battery within the electronic device can be charged using power supplied by an external power source.

[0004] Typically, electronic devices are equipped with an internal battery and can receive power from the internal battery. Even if an electronic device includes an internal battery and can receive power from a power source other than the internal battery (e.g., another internal battery or an external power source), it prioritizes using the power from the internal battery to power on (e.g., booting a processor (e.g., an MCU (micro controller unit) or an AP (application processor)), and can select through the processor whether to supply power to the internal system of the electronic device using the internal battery power or to supply power using an external power source.

[0005] Electronic devices may receive power from an external source without having an internal battery. For example, wearable electronic devices such as AR (augment reality) electronic devices, VR (virtual reality) electronic devices, MR (mixed reality) electronic devices, and / or XR (extended reality) electronic devices may operate by receiving power from an external power source (e.g., an external battery or power outlet) without including an internal battery to avoid increased weight and bulky design caused by an internal battery.

[0006] Since a wearable electronic device can select a power source when the internal battery is discharged or when there is no internal battery and power is supplied from an external power source, it may not be able to select which of the multiple power sources to use to supply power to the internal system when the wearable electronic device receives power from multiple power sources through multiple paths before powering on or before the internal battery is charged to a bootable voltage.

[0007] A wearable electronic device according to one embodiment of the present disclosure may include a first input interface for receiving a first power, a second input interface for receiving a second power, a processor, a regulator that regulates the first power input through the first input interface to provide the regulated first power to the processor or regulates the second power input through the second input interface to provide the regulated second power to the processor, a first switch that connects the first input interface and the regulator when turned on and disconnects the first input interface and the regulator when turned off, and a second switch that connects the second input interface and the regulator when turned on and disconnects the second input interface and the regulator when turned off. The wearable electronic device may include a first PDIC that identifies whether the second switch is turned on or off when the first power is input through the first input interface, outputs a first signal to control the first switch to turn on if the second switch is off, and outputs a second signal to control the first switch to turn off if the second switch is on. The wearable electronic device may include a second PDIC that identifies whether the first switch is turned on or off when the second power is input through the second input interface, outputs a third signal to control the second switch to turn on if the first switch is off, and outputs a fourth signal to control the second switch to turn off if the first switch is on.The wearable electronic device may include a circuit connected to the first PDIC and the second PDIC, which transmits the first signal to the second PDIC to identify whether the first switch is turned on, and transmits the third signal to the first PDIC to identify whether the second switch is turned on.

[0008] A wearable electronic device according to one embodiment of the present disclosure may include a first input interface for receiving a first power, a second input interface for receiving a second power, a processor, and a regulator that regulates the first power input through the first input interface to provide the regulated first power to the processor, or regulates the second power input through the second input interface to provide the regulated second power to the processor. The wearable electronic device may include a first switch that connects the first input interface and the regulator when turned on and disconnects the first input interface and the regulator when turned off, and a second switch that connects the second input interface and the regulator when turned on and disconnects the second input interface and the regulator when turned off. The wearable electronic device may include a first PDIC that identifies whether the second switch is turned on or off when the first power is input through the first input interface, outputs a first signal to control the first switch to turn on if the second switch is off, and outputs a second signal to control the first switch to turn off if the second switch is on. The wearable electronic device may include a second PDIC that outputs a third signal to control the second switch to turn on through the second input interface. The wearable electronic device may include a circuit connected to the first PDIC and the second PDIC and transmitting the third signal to the first PDIC so that the first PDIC identifies whether the second switch is turned on.

[0009] FIG. 1 is a block diagram of an electronic device in a network environment according to one embodiment.

[0010] FIG. 2a is a drawing showing an electronic device according to one embodiment.

[0011] FIG. 2b is a diagram showing the structure of a display and an eye-tracking camera of an electronic device according to one embodiment.

[0012] FIG. 3a is a drawing showing the front view of a wearable electronic device according to one embodiment.

[0013] FIG. 3b is a drawing showing the rear side of a wearable electronic device according to one embodiment.

[0014] FIG. 4 is a block diagram of a wearable electronic device according to one embodiment.

[0015] FIG. 5a is a diagram illustrating the operation when a first power is received through a first input interface in a wearable electronic device according to one embodiment.

[0016] FIG. 5b is a diagram illustrating the operation when a second power is received through a second input interface in a wearable electronic device according to one embodiment.

[0017] FIG. 5c is a diagram showing the operation change of the first PDIC, the second PDIC, the first switch, and the second switch when a wearable electronic device according to one embodiment receives the first power through the first input interface before the second power through the second input interface in the default state.

[0018] FIG. 5d is a diagram showing the operation changes of the first PDIC, second PDIC, first switch, second switch, and power management circuit when the processor fails to boot in a third state of a wearable electronic device according to one embodiment.

[0019] FIG. 6 is a diagram showing the pins of a first PDIC according to one embodiment.

[0020] FIG. 7 is a flowchart showing the operation of the first PDIC according to one embodiment.

[0021] FIG. 8 is a drawing showing a wearable electronic device in which a second power input through the second input interface among a first input interface and a second input interface according to one embodiment has priority.

[0022] FIG. 9a is a diagram illustrating the operation when a first power is received through a first input interface in a wearable electronic device according to one embodiment.

[0023] FIG. 9b is a diagram illustrating the operation when a second power is received through a second input interface while a first power is being received through a first input interface in a wearable electronic device according to one embodiment.

[0024] Hereinafter, electronic devices according to various embodiments will be examined with reference to the attached drawings. In the various embodiments, the term "user" may refer to a person using the electronic device or a device using the electronic device (e.g., an artificial intelligence electronic device).

[0025] The terms used in this document are used merely to describe specific embodiments and are not intended to limit the scope of other embodiments. Singular expressions may include plural expressions unless the context clearly indicates otherwise. All terms used herein, including technical or scientific terms, may have the same meaning as generally understood by those skilled in the art of the present invention. Terms defined in commonly used dictionaries may be interpreted as having the same or similar meaning as they have in the context of the relevant technology, and are not to be interpreted in an ideal or overly formal sense unless explicitly defined in this document. In some cases, even terms defined in this document shall not be interpreted to exclude embodiments of the present invention.

[0026] FIG. 1 is a block diagram of an electronic device (101) in a network environment (100) according to one embodiment.

[0027] Referring to FIG. 1, in a network environment (100), an electronic device (101) may communicate with an electronic device (102) through a first network (198) (e.g., a short-range wireless communication network) or with at least one of an electronic device (104) or a server (108) through a second network (199) (e.g., a long-range wireless communication network). According to one embodiment, the electronic device (101) may communicate with the electronic device (104) through a server (108). According to one embodiment, the electronic device (101) may include a processor (120), memory (130), input module (150), sound output module (155), display module (160), audio module (170), sensor module (176), interface (177), connection terminal (178), haptic module (179), camera module (180), power management module (188), battery (189), communication module (190), subscriber identification module (196), or antenna module (197). In some embodiments, at least one of these components (e.g., connection terminal (178)) may be omitted from the electronic device (101), or one or more other components may be added. In some embodiments, some of these components (e.g., sensor module (176), camera module (180), or antenna module (197)) may be integrated into a single component (e.g., display module (160)).

[0028] The processor (120) can control at least one other component (e.g., hardware or software component) of the electronic device (101) connected to the processor (120) by executing software (e.g., program (140)), and can perform various data processing or operations. According to one embodiment, as at least part of the data processing or operations, the processor (120) can store commands or data received from other components (e.g., sensor module (176) or communication module (190)) in volatile memory (132), process the commands or data stored in volatile memory (132), and store the resulting data in non-volatile memory (134). According to one embodiment, the processor (120) may include a main processor (121) (e.g., central processing unit or application processor) or an auxiliary processor (123) that can operate independently or together with it (e.g., graphics processing unit, neural processing unit (NPU), image signal processor, sensor hub processor, or communication processor). For example, if the electronic device (101) includes a main processor (121) and an auxiliary processor (123), the auxiliary processor (123) may be configured to use less power than the main processor (121) or to be specialized for a designated function. The auxiliary processor (123) may be implemented separately from the main processor (121) or as part thereof.

[0029] The auxiliary processor (123) may control at least some of the functions or states associated with at least one component of the electronic device (101) (e.g., display module (160), sensor module (176), or communication module (190)) on behalf of the main processor (121) while the main processor (121) is in an inactive (e.g., sleep) state, or together with the main processor (121) while the main processor (121) is in an active (e.g., application execution) state. According to one embodiment, the auxiliary processor (123) (e.g., image signal processor or communication processor) may be implemented as part of another functionally related component (e.g., camera module (180) or communication module (190)). According to one embodiment, the auxiliary processor (123) (e.g., neural network processing unit) may include a hardware structure specialized for processing an artificial intelligence model. The artificial intelligence model may be generated through machine learning. Such learning may be performed, for example, on the electronic device (101) itself where the artificial intelligence model is executed, or through a separate server (e.g., server (108)). The learning algorithm may include, for example, supervised learning, unsupervised learning, semi-supervised learning, or reinforcement learning, but is not limited to the examples described above. The artificial intelligence model may include a plurality of artificial neural network layers.An artificial neural network may be a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), a deep Q-network, or a combination of two or more of the above, but is not limited to the examples described above. In addition to the hardware structure, the artificial intelligence model may include a software structure, either additionally or substantially.

[0030] The memory (130) can store various data used by at least one component of the electronic device (101) (e.g., processor (120) or sensor module (176)). The data may include, for example, input data or output data for software (e.g., program (140)) and related commands. The memory (130) may include volatile memory (132) or non-volatile memory (134).

[0031] The program (140) may be stored as software in memory (130) and may include, for example, an operating system (142), middleware (144), or an application (146).

[0032] The input module (150) can receive commands or data to be used for a component of the electronic device (101) (e.g., processor (120)) from outside the electronic device (101) (e.g., user). The input module (150) may include, for example, a microphone, a mouse, a keyboard, a key (e.g., a button), or a digital pen (e.g., a stylus pen).

[0033] The sound output module (155) can output a sound signal to the outside of the electronic device (101). The sound output module (155) may include, for example, a speaker or a receiver. The speaker may be used for general purposes, such as multimedia playback or recording playback. The receiver may be used to receive incoming calls. According to one embodiment, the receiver may be implemented separately from the speaker or as part thereof.

[0034] The display module (160) can visually provide information to an external (e.g., user) of the electronic device (101). The display module (160) may include, for example, a display, a holographic device, or a projector and a control circuit for controlling said device. According to one embodiment, the display module (160) may include a touch sensor configured to detect a touch, or a pressure sensor configured to measure the intensity of the force generated by said touch.

[0035] The audio module (170) can convert sound into an electrical signal or, conversely, convert an electrical signal into sound. According to one embodiment, the audio module (170) can acquire sound through the input module (150) or output sound through the sound output module (155) or an external electronic device (e.g., electronic device (102)) (e.g., speaker or headphones) connected directly or wirelessly to the electronic device (101).

[0036] The sensor module (176) can detect the operating state of the electronic device (101) (e.g., power or temperature) or the external environmental state (e.g., user state) and generate an electrical signal or data value corresponding to the detected state. According to one embodiment, the sensor module (176) may include, for example, a gesture sensor, a gyroscope sensor, a barometric pressure sensor, a magnetic sensor, an accelerometer sensor, a grip sensor, a proximity sensor, a color sensor, an IR (infrared) sensor, a biosensor, a temperature sensor, a humidity sensor, or an illuminance sensor.

[0037] The interface (177) may support one or more specified protocols that can be used for the electronic device (101) to be connected directly or wirelessly to an external electronic device (e.g., electronic device (102)). According to one embodiment, the interface (177) may include, for example, a high definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface, or an audio interface.

[0038] The connection terminal (178) may include a connector through which the electronic device (101) can be physically connected to an external electronic device (e.g., electronic device (102)). According to one embodiment, the connection terminal (178) may include, for example, an HDMI connector, a USB connector, an SD card connector, or an audio connector (e.g., a headphone connector).

[0039] The haptic module (179) can convert an electrical signal into a mechanical stimulus (e.g., vibration or movement) or an electrical stimulus that the user can perceive through tactile or kinesthetic senses. According to one embodiment, the haptic module (179) may include, for example, a motor, a piezoelectric element, or an electric stimulation device.

[0040] The camera module (180) can capture still images and video. According to one embodiment, the camera module (180) may include one or more lenses, image sensors, image signal processors, or flashes.

[0041] The power management module (188) can manage power supplied to the electronic device (101). According to one embodiment, the power management module (188) can be implemented, for example, as at least part of a power management integrated circuit (PMIC).

[0042] The battery (189) can supply power to at least one component of the electronic device (101). According to one embodiment, the battery (189) may include, for example, a non-rechargeable primary battery, a rechargeable secondary battery, or a fuel cell.

[0043] The communication module (190) can support the establishment of a direct (e.g., wired) communication channel or a wireless communication channel between an electronic device (101) and an external electronic device (e.g., electronic device (102), electronic device (104), or server (108)), and the performance of communication through the established communication channel. The communication module (190) may include one or more communication processors that operate independently of the processor (120) (e.g., application processor) and support direct (e.g., wired) communication or wireless communication. According to one embodiment, the communication module (190) may include a wireless communication module (192) (e.g., cellular communication module, short-range wireless communication module, or GNSS (global navigation satellite system) communication module) or a wired communication module (194) (e.g., LAN (local area network) communication module, or power line communication module). The corresponding communication module among these communication modules can communicate with an external electronic device (104) through a first network (198) (e.g., a short-range communication network such as Bluetooth, WiFi (wireless fidelity) direct, or IrDA (infrared data association)) or a second network (199) (e.g., a legacy cellular network, a 5G network, a next-generation communication network, the Internet, or a computer network (e.g., a LAN or WAN)). These various types of communication modules may be integrated into a single component (e.g., a single chip) or implemented as multiple separate components (e.g., multiple chips). The wireless communication module (192) can identify or authenticate the electronic device (101) within a communication network such as the first network (198) or the second network (199) using subscriber information (e.g., International Mobile Subscriber Identifier (IMSI)) stored in the subscriber identification module (196).

[0044] The wireless communication module (192) can support 5G networks and next-generation communication technologies following 4G networks, for example, new radio access technology. NR access technology can support high-speed transmission of high-capacity data (enhanced mobile broadband (eMBB)), minimization of terminal power and connection of multiple terminals (massive machine type communications (mMTC)), or high reliability and low latency (ultra-reliable and low-latency communications (URLLC)). The wireless communication module (192) can support a high-frequency band (e.g., mmWave band) to achieve a high data transmission rate, for example. The wireless communication module (192) can support various technologies for securing performance in the high-frequency band, such as beamforming, massive MIMO (multiple-input and multiple-output), full-dimensional MIMO (FD-MIMO), array antenna, analog beam-forming, or large-scale antenna. The wireless communication module (192) can support various requirements specified in the electronic device (101), external electronic device (e.g., electronic device (104)), or network system (e.g., second network (199)). According to one embodiment, the wireless communication module (192) can support a Peak data rate (e.g., 20 Gbps or more) for eMBB realization, loss coverage (e.g., 164 dB or less) for mMTC realization, or U-plane latency (e.g., downlink (DL) and uplink (UL) each 0.5 ms or less, or round trip 1 ms or less) for URLLC realization.

[0045] An antenna module (197) can transmit a signal or power to or from an external source (e.g., an external electronic device). According to one embodiment, the antenna module (197) may include an antenna comprising a radiator made of a conductor or a conductive pattern formed on a substrate (e.g., a PCB). According to one embodiment, the antenna module (197) may include a plurality of antennas (e.g., an array antenna). In this case, at least one antenna suitable for a communication method used in a communication network, such as a first network (198) or a second network (199), may be selected from the plurality of antennas, for example, by a communication module (190). A signal or power may be transmitted or received between the communication module (190) and an external electronic device through the selected at least one antenna. According to some embodiments, in addition to the radiator, other components (e.g., a radio frequency integrated circuit (RFIC)) may be additionally formed as part of the antenna module (197).

[0046] According to one embodiment, the antenna module (197) may form a mmWave antenna module. According to one embodiment, the mmWave antenna module may include a printed circuit board, an RFIC disposed on or adjacent to a first surface (e.g., bottom surface) of the printed circuit board and capable of supporting a specified high frequency band (e.g., mmWave band), and a plurality of antennas (e.g., array antennas) disposed on or adjacent to a second surface (e.g., top surface or side surface) of the printed circuit board and capable of transmitting or receiving a signal of the specified high frequency band.

[0047] At least some of the above components can be connected to each other via a communication method between peripheral devices (e.g., bus, GPIO (general purpose input and output), SPI (serial peripheral interface), or MIPI (mobile industry processor interface)) and exchange signals (e.g., commands or data) with each other.

[0048] According to one embodiment, commands or data may be transmitted or received between the electronic device (101) and an external electronic device (104) through a server (108) connected to a second network (199). Each of the external electronic devices (102, or 104) may be the same or a different type of device as the electronic device (101). According to one embodiment, all or part of the operations performed on the electronic device (101) may be performed on one or more of the external electronic devices (102, 104, or 108). For example, if the electronic device (101) needs to perform a function or service automatically or in response to a request from a user or another device, the electronic device (101) may request one or more external electronic devices to perform at least part of the function or service instead of performing the function or service itself or additionally. One or more external electronic devices that receive the above request may execute at least part of the requested function or service, or additional function or service related to the request, and transmit the result of the execution to the electronic device (101). The electronic device (101) may provide the result as is or additionally processed as at least part of the response to the request. For this purpose, for example, cloud computing, distributed computing, mobile edge computing (MEC), or client-server computing technology may be used. The electronic device (101) may provide ultra-low latency services using, for example, distributed computing or mobile edge computing. In another embodiment, the external electronic device (104) may include an Internet of Things (IoT) device. The server (108) may be an intelligent server using machine learning and / or neural networks. According to one embodiment, the external electronic device (104) or the server (108) may be included within a second network (199).The electronic device (101) can be applied to intelligent services (e.g., smart home, smart city, smart car, or healthcare) based on 5G communication technology and IoT-related technology. The electronic device according to one embodiment disclosed in this document may be a device of various forms. The electronic device may include, for example, a portable communication device (e.g., a smartphone), a computer device, a portable multimedia device, a portable medical device, a camera, a wearable device, a home appliance device, or an XR (extended reality) electronic device. The electronic device according to the embodiment of this document is not limited to the devices described above.

[0049] FIG. 2a is a drawing showing an electronic device according to one embodiment.

[0050] Referring to FIG. 2a, an electronic device (200) according to one embodiment (e.g., the electronic device (101) of FIG. 1) (or an XR (extended reality) electronic device or AR (augment reality) glasses) can perform XR functions or provide XR content.

[0051] An electronic device (200) according to one embodiment may include a frame (205), a first support member (201), a second support member (202), a first hinge member (203) connecting the frame (205) and the first support member (201), and / or a second hinge member (204) connecting the frame (205) and the second support member (202). According to one embodiment, the frame (205) may include at least one camera (e.g., a first camera (211-1, 211-2), a second camera (212-1, 212-2) and / or a third camera (213)), one or more light-emitting elements (214-1, 214-2), at least one display (e.g., a first display (251), a second display (252)), one or more sound input devices (262-1, 262-2, 262-3), or one or more transparent members (290-1, 290-2). An electronic device (200) according to one embodiment may include one or more first cameras (211-1, 211-2), one or more second cameras (212-1, 212-2), and / or one or more third cameras (213). Images acquired through one or more first cameras (211-1, 211-2) according to one embodiment may be used for detecting hand gestures by a user, tracking the user's head, and / or spatial recognition. One or more first cameras (211-1, 211-2) according to one embodiment may be GS (global shutter) cameras. One or more first cameras (211-1, 211-2) according to one embodiment may perform SLAM (simultaneous localization and mapping) operations through depth imaging. One or more first cameras (211-1, 211-2) according to one embodiment may perform spatial recognition for 6 DoF (degrees of freedom). Images acquired through one or more second cameras (212-1, 212-2) according to one embodiment may be used to detect and track the user's pupils.For example, images acquired through one or more second cameras (212-1, 212-2) may be used to track the user's gaze direction. One or more second cameras (212-1, 212-2) according to one embodiment may be GS cameras. One or more second cameras (212-1, 212-2) according to one embodiment may correspond to the left eye and the right eye, respectively, and the performance of one or more second cameras (212-1, 212-2) may be substantially identical. One or more third cameras (213) according to one embodiment may be high-resolution cameras. One or more third cameras (213) according to one embodiment may perform an auto-focusing (AF) function or a shake correction function. One or more third cameras (213) according to one embodiment may be GS cameras or RS (rolling shutter) cameras. An electronic device (200) according to one embodiment may include one or more light-emitting elements (214-1, 214-2). The light-emitting elements (214-1, 214-2) are different from the light source described below, which irradiates light onto the screen output area of ​​a display. The light-emitting elements (214-1, 214-2) according to one embodiment may irradiate light to facilitate pupil detection in detecting and tracking a user's pupil through one or more second cameras (212-1, 212-2). The light-emitting elements (214-1, 214-2) according to one embodiment may include LEDs. The light-emitting elements (214-1, 214-2) according to one embodiment may irradiate light in the infrared region. The light-emitting elements (214-1, 214-2) according to one embodiment may be attached around the frame (205) of the electronic device (200).A light-emitting element (214-1, 214-2) according to one embodiment is located around one or more first cameras (211-1, 211-2) and can assist gesture detection, head tracking, and / or spatial recognition by one or more first cameras (211-1, 211-2) when the electronic device (200) is used in a dark environment. A light-emitting element (214-1, 214-2) according to one embodiment is located around one or more third cameras (413) and can assist image acquisition by one or more third cameras (213) when the electronic device (200) is used in a dark environment. An electronic device (200) according to one embodiment may include a first display (251), a second display (252), one or more input optical members (253-1, 253-2), one or more transparent members (290-1, 290-2), and / or one or more screen display portions (254-1, 254-2) located in a frame (405). The first display (251) and the second display (252) according to one embodiment may include, for example, a liquid crystal display (LCD), a digital mirror device (DMD), a liquid crystal on silicon (LCoS), an organic light emitting diode (OLED), or a micro light emitting diode (micro LED). In the case where the first display (251) and the second display (252) according to one embodiment are composed of a liquid crystal display device, a digital mirror display device, or a silicon liquid crystal display device, the electronic device (200) may include a light source that irradiates light to the screen output area of ​​the display.In one embodiment, if the first display (251) and / or the second display (252) can generate light on their own, for example, by being composed of one of an organic light-emitting diode or a micro LED, the electronic device (200) can provide a good quality virtual image to the user without including a separate light source. In one embodiment, one or more transparent members (290-1, 290-2) may be positioned facing the user's eyes when the user wears the electronic device (200). In one embodiment, one or more transparent members (290-1, 290-2) may include at least one of a glass plate, a plastic plate, or a polymer. In one embodiment, the user can see the outside world through one or more transparent members (290-1, 290-2) when wearing the electronic device (200). According to one embodiment, one or more input optical members (253-1, 253-2) can guide light generated from the first display (251) and / or the second display (252) to the user's eye. According to one embodiment, an image based on the light generated from the first display (251) and the second display (252) is formed on one or more screen display portions (254-1, 254-2) on one or more transparent members (290-1, 290-2), and the user can view the image formed on the one or more screen display portions (254-1, 254-2). According to one embodiment, the electronic device (200) may include one or more optical waveguides (not shown). The optical waveguides can transmit light generated from the first display (251) and the second display (252) to the user's eye. The electronic device (200) may include one optical waveguide each corresponding to the left eye and the right eye. An optical waveguide according to one embodiment may include at least one of glass, plastic, or polymer.An optical waveguide according to one embodiment may include a nano-pattern formed on an internal or external surface, for example, a grating structure having a polygonal or curved shape. An optical waveguide according to one embodiment may include a free-form prism, in which case the optical waveguide may provide incident light to a user through a reflective mirror. An optical waveguide according to one embodiment may include at least one diffractive element (e.g., DOE (diffractive optical element), HOE (holographic optical element)) or a reflective element (e.g., a reflective mirror), and may guide display light emitted from a light source to the user's eye using at least one diffractive element or reflective element included in the optical waveguide. An diffractive element according to one embodiment may include an input / output optical member. An reflective element according to one embodiment may include a member that causes total internal reflection. An electronic device (200) according to one embodiment may include one or more sound input devices (262-1, 262-2, 262-3) (e.g., a microphone), and the one or more sound input devices (262-1, 262-2, 262-3) may receive sound from a user or sound generated in the vicinity of the electronic device (200). For example, the one or more sound input devices (262-1, 262-2, 262-3) may receive sound generated in the vicinity and transmit it to a processor (e.g., the processor (520) of FIG. 5). One or more support members (e.g., first support member (201), second support member (202)) according to one embodiment may include a PCB (e.g., first PCB (270-1) and second PCB (270-2)), one or more sound output devices (263-1, 263-2), and / or a plurality of interfaces (235-1, 235-2). The first PCB (270-1) and the second PCB (270-2) may transmit electrical signals to components included in the electronic device (200).According to one embodiment, the first PCB (270-1) and the second PCB (270-2) may be FPCBs. According to one embodiment, the first PCB (270-1) and the second PCB (270-2) may each include a first substrate, a second substrate, and an interposer disposed between the first substrate and the second substrate. According to one embodiment, the electronic device (200) may include interfaces (235-1, 235-2). The interfaces (235-1, 235-2) may include a first input interface (235-1) capable of receiving first power from an external source and a second input interface (235-1) capable of receiving second power from an external source. The first power and the second power may be received by the electronic device (200) and used as power to operate the remaining components of the electronic device (200). One or more sound output devices (263-1, 263-2) (e.g., speakers) according to one embodiment may output audio data to a user. For example, they may provide feedback on a user's command (or input) or provide information about a virtual object to the user through audio data. An electronic device (200) according to one embodiment may include one or more hinge portions (e.g., a first hinge portion (203), a second hinge portion (204)). For example, the first hinge portion (203) may allow a first support portion (201) to be coupled to a frame (205) and rotatable relative to the frame (205), and the second hinge portion (204) may allow a second support portion (202) to be coupled to a frame (205) and rotatable relative to the frame (205).

[0052] FIG. 2b is a diagram showing the structure of a display and an eye-tracking camera of an electronic device according to one embodiment.

[0053] Referring to FIG. 2b, an electronic device (200) according to one embodiment may include a display (221), an input optical member (222), a display optical waveguide (223), an output optical member (224), an eye-tracking camera (210), a first splitter (241), an eye-tracking optical waveguide (242), and / or a second splitter (243).

[0054] In an electronic device (200) according to one embodiment, the display (221) may be the first display (251) or the second display (252) shown in FIG. 2a. Light output from the display (221) passes through an input optical member (222) (e.g., input optical member (253-1, 253-2) of FIG. 2a) and is incident on a display optical waveguide (223), and may pass through the display optical waveguide (223) and be output through an output optical member (224). The light output from the output optical member (224) can be seen by the user's eye (230). According to one embodiment, light output from the display (221) is output through the output optical member (224), and the shape of an object is seen by the user's eye (230) by the light output through the output optical member (224), which may mean displaying an object on the display. Light output from a display (221) according to one embodiment is output through an output optical member (224), and controlling the display (221) so that the shape of an object is visible to the user's eye (230) by the light output through the output optical member (224) may mean controlling to display the object. Light (232) reflected from the user's eye (230) passes through a first splitter (241) and is incident on an eye-tracking optical waveguide (242), and may pass through the eye-tracking optical waveguide (242) and be output to an eye-tracking camera (210) through a second splitter (243). According to various embodiments, light (232) reflected from the user's eye (230) may be light output from the light-emitting elements (214-1, 214-2) of FIG. 2A and reflected from the user's eye (230). According to various embodiments, the eye-tracking camera (210) may be one or more second cameras (212-1, 212-2) as shown in FIG. 2a.

[0055] FIG. 3a is a drawing showing the front of a wearable electronic device according to one embodiment, and FIG. 3b is a drawing showing the rear of a wearable electronic device according to one embodiment.

[0056] Referring to FIGS. 3a and 3b, a wearable electronic device (300) according to one embodiment may be a body-worn device. For example, the wearable electronic device (300) may be a video see-through (VST) device or a head-mounting device (HMD) capable of providing images directly in front of the user's eyes. The wearable electronic device (300) of the present disclosure may have various types of appearances, not limited to the appearance shown in FIGS. 3a and 3b.

[0057] Referring to FIG. 3a and FIG. 3b, according to one embodiment, camera modules (311, 312, 313, 314, 315, 316) and / or a depth sensor (317) for acquiring information related to the surrounding environment of a wearable electronic device (300) may be disposed on a first surface (310) of a housing.

[0058] According to one embodiment, camera modules (311, 312) can acquire images related to the surrounding environment of the wearable electronic device (300). According to one embodiment, camera modules (313, 314, 315, 316) can acquire images while the wearable electronic device (300) is worn by a user. Camera modules (313, 314, 315, 316) can be used for hand detection, tracking, and user gesture (e.g., hand movements) recognition. Camera modules (313, 314, 315, 316) can be used for 3DoF, 6DoF head tracking, location (space, environment) recognition, and / or movement recognition. According to one embodiment, camera modules (311, 312) may be used for hand detection and tracking, and user gestures.

[0059] According to one embodiment, the depth sensor (317) may be configured to transmit a signal and receive a signal reflected from a subject, and may be used for determining the distance to an object, such as time of flight (TOF). In place of or additionally to the depth sensor (217), camera modules (213, 214, 215, 216) may determine the distance to an object.

[0060] According to one embodiment, a face recognition camera module (325, 326) and / or a display (321) (and / or a lens) may be disposed on the second surface (320) of the housing.

[0061] According to one embodiment, a face recognition camera module (325, 326) adjacent to a display (321) may be used to recognize a user's face or to recognize and / or track both of a user's eyes.

[0062] According to one embodiment, the display (321) (and / or lens) may be disposed on a second surface (320) of the wearable electronic device (300). According to one embodiment, the wearable electronic device (300) may not include camera modules (315, 316) among a plurality of camera modules (313, 314, 315, 316). Although not illustrated in FIG. 3a and 3b, the wearable electronic device (300) may further include at least one of the configurations illustrated in FIG. 2a and 2b.

[0063] A wearable electronic device (300) according to one embodiment may receive power from an external source without including an internal battery to avoid weight increase and a bulky design caused by an internal battery. For example, the wearable electronic device (300) may operate by receiving power from an external power source (e.g., an external battery or a power outlet) through a connection with an external power source using interfaces (305, 307) (e.g., a connector member). The interfaces (305, 307) of the wearable electronic device (300) according to one embodiment may include a first input interface (305) capable of receiving a first power from an external source and a second input interface (307) capable of receiving a second power from an external source. The first power and the second power may be received by the wearable electronic device (300) and used as power to operate the remaining components of the wearable electronic device (300). For example, cables (35, 37) for power supply can be connected to each of the interfaces (305, 307).

[0064] As described above, according to one embodiment, the wearable electronic device (300) may have a form factor for being worn on a user's head. For example, the wearable electronic device (300) may further include a strap and / or a wearing member for being secured on a part of the user's body. The wearable electronic device (300) may provide a user experience based on augmented reality, virtual reality, and / or mixed reality while being worn on the user's head.

[0065] FIG. 4 is a block diagram of a wearable electronic device according to one embodiment.

[0066] Referring to FIG. 4, a wearable electronic device (e.g., electronic device (101) of FIG. 1, electronic device (200) of FIG. 2a and FIG. 2b, or electronic device (300) of FIG. 3a and FIG. 3b) (401) according to one embodiment may include a first input interface (477), a first switch (411), a first overvoltage protection circuit (412), a second switch (413), a second overvoltage protection circuit (414), a first PDIC (power delivery integrated chip) (415), a second PDIC (416), a circuit (or power selection circuit) (417), a regulator (419), a processor (420), and / or memory (430). The electronic device (401) according to one embodiment may be configured to include various additional components or to exclude some of the above components, but is not limited thereto. An electronic device (401) according to one embodiment may further include all or part of the electronic device (101) shown in FIG. 1.

[0067] A first input interface (477) according to one embodiment may include a port for receiving power from an external source (e.g., an external electronic device (102) or an external power source or an external battery). For example, the first input interface (477) may include a USB port (e.g., a USB TYPE-C port) or a POGO connector (or a port including POGO pins).

[0068] According to one embodiment, the first switch (or first load switch) (411) may have one end connected to the first input interface (477) and the other end connected to the regulator (419). According to one embodiment, the first switch (411) may be turned on or off based on a control signal from the first PDIC (415). When the first switch (411) according to one embodiment is turned on, the first input interface (477) and the regulator (419) are electrically connected, and when it is turned off, the connection between the first input interface (477) and the regulator (419) may be disconnected.

[0069] A first overvoltage protection circuit (e.g., OVP (over voltage protection)) (412) according to one embodiment may be connected between a first input interface (477) and a first PDIC (415). A first overvoltage protection circuit (312) according to one embodiment may protect a wearable electronic device (401) (or the first PDIC (415)) by blocking power inflow when power is supplied through the first input interface (477) at a voltage (overvoltage) greater than a specified magnitude. A first overvoltage protection circuit (412) according to one embodiment may be omitted or its location changed depending on design modifications.

[0070] According to one embodiment, the second input interface (478) may include a port for receiving power from an external source (e.g., an external electronic device, an external power source, or an external battery). For example, the second input interface (478) may include a USB port (e.g., a USB TYPE-C port) or a POGO connector (or a port including POGO pins). The types of ports of the first input interface (477) and the second input interface (478) according to one embodiment may be the same or different.

[0071] According to one embodiment, the second switch (or second load switch) (413) may have one end connected to the second input interface (478) and the other end connected to the regulator (419). According to one embodiment, the second switch (413) may be turned on or off based on a control signal from the second PDIC (416). When the second switch (413) according to one embodiment is turned on, the second input interface (478) and the regulator (419) are electrically connected, and when it is turned off, the connection between the second input interface (478) and the regulator (419) may be disconnected.

[0072] A second overvoltage protection circuit (e.g., OVP) (414) according to one embodiment may be connected between a second input interface (478) and a second PDIC (416). The second overvoltage protection circuit (414) according to one embodiment may protect the electronic device (401) (or the second PDIC (416)) by blocking power inflow when power is supplied through the second input interface (478) at a voltage (overvoltage) greater than a specified size.

[0073] According to one embodiment, the first PDIC (415) can identify the voltage of the second pin (e.g., collision_prevent) (415-3) when the first power is input through the first input interface (477). According to one embodiment, the first PDIC (415) can detect the first power input through the first input interface (477) through the first pin (e.g., VBUS) (415-1). According to one embodiment, the first PDIC (415) can identify the input interface connected to the regulator (419) among the first input interface (477) and the second input interface (478) by identifying the signal input from the power selection circuit (417) through the second pin (415-3). According to one embodiment, the first PDIC (415) can control the first switch (411) to be turned off (or kept off) when the voltage of the second pin (415-3) is a first value (e.g., H, high) when a first power input is made through the first input interface (477). For example, the first value (e.g., H, high) may be about 4.5V to 4.7V.

[0074] According to one embodiment, the first PDIC (415) can control the first switch (411) to be turned on when the voltage of the second pin (415-3) is a second value (e.g., L, low) when the first power is input through the first input interface (477). For example, the second value (e.g., L, low) may be approximately 0V.

[0075] According to one embodiment, the first PDIC (415) can output a signal (e.g., voltage) having a first value (e.g., H, high) or a second value (e.g., L, low) to control the first switch (411) to be turned off or on through a third pin (e.g., VBUS_SW_CTRL) (415-5). According to one embodiment, the first PDIC (415) can control the first switch (411) to be turned on through a first signal having a first value (e.g., H, high) so that the first power input through the first input interface (477) is delivered to the regulator (419). According to one embodiment, the first PDIC (415) can control the first switch (411) to be turned off through a second signal (e.g., voltage) having a second value (e.g., L, low) so that the first power input through the first input interface (477) is not transmitted to the regulator (419). According to one embodiment, the first PDIC (415) can identify (or monitor or detect) the power (e.g., SYS) output by the regulator (419) through the fourth pin (e.g., VSYS) (415-7) after the first power input through the first input interface (477) is transmitted to the regulator (419). According to one embodiment, the first PDIC (415) can identify (or monitor or detect) whether the power output by the regulator (419) (e.g., SYS) is lower than or equal to a specified power (e.g., dropped) after the first power input through the first input interface (477) is transmitted to the regulator (419). The power output by the regulator (419) according to one embodiment (e.g., SYS) can be supplied to the processor (420) and used for booting operations. The power output by the regulator (419) (e.g., SYS) is used for booting operations of the processor (420), but if power is not used by the processor (320) based on a boot failure by the processor (420), the power output by the regulator (419) (e.g., SYS) can be lower than or equal to a specified power.

[0076] According to one embodiment, the first PDIC (415) can output a second signal having a second value to control the first switch (411) to be turned off through the third pin (415-5) when the booting of the processor (420) fails (e.g., when the power output by the regulator (419) (e.g., SYS) based on the booting failure of the processor (420) becomes less than a specified power, thereby preventing the first power input through the first input interface (477) from being delivered to the regulator (419). As a second signal having a second value for controlling the first switch (411) to be turned off is output by the first PDIC (415) according to one embodiment, the power selection circuit (417) can transmit a second signal (e.g., VBUS_SW_CTRL L) having a value (e.g., L, Low) indicating that the first switch (411) is turned off to the second pin (e.g., collision_prevent) (416-3) of the second PDIC (316).

[0077] According to one embodiment, the second PDIC (416) can identify the voltage of the second pin (416-3) when the second power is input through the second input interface (478). According to one embodiment, the second PDIC (416) can detect the second power input through the second input interface (478) through the first pin (e.g., VBUS) (416-1). According to one embodiment, the second PDIC (416) can identify the input interface connected to the regulator (419) among the first input interface (477) and the second input interface (478) by identifying the value of the signal input from the power selection circuit (417) through the second pin (416-3). According to one embodiment, the second PDIC (416) can control the second switch (413) to be turned off (or kept off) when the voltage of the second pin (416-3) is a first value (e.g., H, high) during a second power input through the second input interface (478). According to one embodiment, the second PDIC (416) can control the second switch (413) to be turned on when the voltage of the second pin (416-3) is a second value (e.g., L, low) during a second power input through the second input interface (478). According to one embodiment, the second PDIC (416) can output a signal (e.g., voltage) having a first value (e.g., H, high) or a second value (e.g., L, low) to control the second switch (413) to be turned off or on through the third pin (e.g., VBUS_SW_CTRL) (416-5). According to one embodiment, the second PDIC (416) can control the second switch (413) to turn on through a third signal having a first value (e.g., H, high) so that the second power input through the second input interface (478) is transmitted to the regulator (419).According to one embodiment, the second PDIC (416) can identify (or monitor or detect) the power (e.g., SYS) output by the regulator (419) through the fourth pin (e.g., VSYS) (416-7) after the second power input through the second input interface (478) is transmitted to the regulator (419). According to one embodiment, the second PDIC (416) can identify (or monitor or detect) whether the power (e.g., SYS) output by the regulator (419) is below a specified power (e.g., dropped). Power (e.g., SYS) output by the regulator (419) according to one embodiment is supplied to the processor (420) and used for booting operations, but when the processor (420) fails to boot, the processor (420) does not use power, and thus the power (e.g., SYS) output by the regulator (419) may become less than or equal to a specified power. According to one embodiment, the second PDIC (416) outputs a fourth signal having a second value (e.g., L, Low) to control the second switch (413) to be turned off through the third pin (416-5) when the power (e.g., SYS) output by the regulator (419) becomes less than or equal to a specified power based on the failure of the processor (420) to boot, thereby preventing the second power input through the second input interface (478) from being delivered to the regulator (419). As a fourth signal (e.g., voltage) having a second value is output by the second PDIC (416) according to one embodiment to control the second switch (413) to be turned off, the power selection circuit (417) can transmit the fourth signal having a second value to the second pin (415-3) of the first PDIC (415).

[0078] A power selection circuit (417) according to one embodiment may be connected to a first PDIC (415) and a second PDIC (416). A power selection circuit (417) according to one embodiment may include a first diode (41) and a second diode (43). According to one embodiment, the first diode (41) and the second diode (43) may each include a Schottky barrier diode. According to one embodiment, the anode terminal of the first diode (41) may be connected to the third pin (415-5) of the first PDIC (415), and the cathode terminal of the first diode (41) may be connected to the second pin (415-3) of the first PDIC (415), the second pin (416-3) of the second PDIC (416), and the cathode terminal of the second diode (43). According to one embodiment, the anode terminal of the second diode (43) can be connected to the third pin (416-5) of the second PDIC (416), and the cathode terminal of the second diode (43) can be connected to the second pin (416-3) of the second PDIC (416), the second pin (415-3) of the first PDIC (415), and the cathode terminal of the first diode (41). A power selection circuit (417) according to one embodiment may transmit a first signal or a second signal output from the third pin (415-5) of the first PDIC (415) to the second pin (415-3) of the first PDIC (415) and the second pin (416-3) of the second PDIC (416) so that the second PDIC (416) identifies whether the first switch (411) is turned on or off through the first signal or the second signal.A power selection circuit (417) according to one embodiment may transmit a third signal or a fourth signal output from the third pin (416-5) of the second PDIC (416) to the second pin (415-3) of the first PDIC (415) and the second pin (416-3) of the second PDIC (416) so that the first PDIC (415) identifies whether the second switch (413) is turned on or off through the third signal or the fourth signal.

[0079] According to one embodiment, when the first power is input to the first input interface (477) before the second input interface (478) among the first input interface (477) and the second input interface (478), the first signal from the third pin (415-5) of the first PDIC (415) may be received by the power selection circuit (417) before the second signal from the third pin (e.g., VBUS_SW_CTRL) of the second PDIC (416). When a first signal having a first value (e.g., H, high) from the third pin (415-5) of the first PDIC (415) is input to the power selection circuit (417) before a third signal having a first value (e.g., H, high) from the third pin (e.g., 415-6) of the second PDIC (416), the first signal is transmitted to the second pin (416-3) of the second PDIC (416) through the power selection circuit (417), so that the second switch (413) may not be turned on by the second PDIC (416) even if the second power is received through the second input interface (478).

[0080] According to one embodiment, when the second power is input to the second input interface (478) before the first input interface (477) among the first input interface (477) and the second input interface (478), the power selection circuit (417) may receive a third signal having a first value (e.g., H, high) from the third pin (416-5) of the second PDIC (416) before the first signal having a first value (e.g., H, high) from the third pin (e.g., 315-5) of the first PDIC (315). If the third signal from the third pin (416-5) of the second PDIC (416) is input to the power selection circuit (417) before the first signal from the third pin (e.g., 415-5) of the first PDIC (415), the third signal is transmitted to the second pin (415-3) of the first PDIC (415) through the power selection circuit (417), so that the first switch (411) may not be turned on by the first PDIC (415) even if the first power is subsequently received through the first input interface (477). In other words, the power that is input first between the first power input through the first input interface (477) and the second power input through the second input interface (478) can be transmitted to the regulator (419) by the power selection circuit (417).

[0081] A regulator (419) according to one embodiment may include a buck converter. A regulator (419) according to one embodiment may receive a first power input through a first input interface (411) when the first switch (411) is turned on, and may receive a second power input through a second input interface (413) when the second switch (413) is turned on. According to one embodiment, when a first power (or second power) is received, the regulator (419) converts (or regulates) the voltage (and / or current) of the first power (or second power) to a voltage (or current) suitable for the processor (420) (or the system (components included in the electronic device (401)) of the electronic device (401) and outputs the power (e.g., SYS) to which the voltage (or current) has been converted. According to one embodiment, a power management circuit (PMIC) may be further included between the regulator (419) and the processor (420). If the wearable electronic device (401) according to one embodiment further includes a PMIC, the regulator (419) reduces the voltage (and / or current) of the first power (or second power) to a specified voltage (and / or specified current) and transmits the first power (or second power) with reduced voltage and / or current to the PMIC, and the PMIC transmits the received power to a voltage suitable for the processor (420). Power can be supplied to the processor (420) by further adjusting the voltage and / or current.

[0082] A processor (420) according to one embodiment (e.g., processor (120) of FIG. 1) can perform booting using the power supplied by the regulator (419) when power (e.g., SYS) is supplied by the regulator (419). A processor (420) according to one embodiment may fail to complete the booting operation during booting if the amount of power (e.g., SYS) supplied by the regulator (419) is smaller than the amount of power required for booting the wearable electronic device (401). A processor (420) according to one embodiment can complete booting if the amount of power (e.g., SYS) supplied by the regulator (419) is appropriate, and once booting is complete, it can control at least one other component (e.g., hardware or software component) of the wearable electronic device (401) and perform various data processing or operations. A processor (420) according to one embodiment can perform overall control operations of the wearable electronic device (401). A processor (420) according to one embodiment can execute commands stored in memory (430) individually or collectively to enable an electronic device (401) to perform XR functions or provide XR content.

[0083] A memory (430) according to one embodiment (e.g., memory (130) of FIG. 1) may include one or more storage media for storing instructions (e.g., instructions). A memory (430) according to one embodiment may store various data used by at least one component (e.g., processor (420)) of an electronic device (401). The data may include, for example, software (e.g., software module or program (140)) and input data or output data for related instructions. For example, the memory (430) may store instructions that cause the wearable electronic device (401) to perform XR functions or provide XR content.

[0084] A wearable electronic device (101, 200, 300, or 401) according to one embodiment of the present disclosure comprises: a first input interface (477) for receiving a first power input; a second input interface (478) for receiving a second power input; a processor (120 or 420); a regulator (419) that regulates the first power input through the first input interface (477) to provide the regulated first power to the processor (120 or 420) or regulates the second power input through the second input interface (478) to provide the regulated second power to the processor (120 or 420); a first switch (411) that connects the first input interface (477) and the regulator (419) when turned on and disconnects the first input interface (477) and the regulator (419) when turned off; and when turned on, the second input interface (478) and the The device may include a second switch (413) that disconnects the second input interface (478) and the regulator (419) when the regulator (419) is connected and turned off. The wearable electronic device (101, 200, 300, or 401) may include a first PDIC (415) that identifies whether the second switch (413) is turned on or off when the first power is input through the first input interface (477), outputs a first signal to control the first switch (411) to turn on if the second switch (413) is off, and outputs a second signal to control the first switch (411) to turn off if the second switch (413) is on.The wearable electronic device (101, 200, 300, or 401) may include a second PDIC (416) that identifies whether the first switch (411) is turned on or off when the second power is input through the second input interface (477), outputs a third signal to control the second switch (413) to turn on if the first switch (411) is off, and outputs a fourth signal to control the second switch (413) to turn off if the first switch (411) is on. The wearable electronic device may include a circuit (417) connected to the first PDIC (415) and the second PDIC (416) and transmitting the first signal to the second PDIC (416) so that the second PDIC (416) identifies whether the first switch (411) is turned on through the first signal, and transmitting the third signal to the first PDIC (415) so that the first PDIC (415) identifies whether the second switch (413) is turned on.

[0085] According to one embodiment, the first signal and the third signal are signals having a voltage value of a first value, and the second signal and the fourth signal may be signals having a voltage value of a second value. According to one embodiment, the regulator (419) may include a buck converter.

[0086] According to one embodiment, the regulator (419) may be configured to supply the regulated first power to the processor (420) by regulating the voltage and / or current of the first power input through the first input interface (477) while the first input interface (477) and the regulator (419) are connected through the first switch (411).

[0087] According to one embodiment, the processor (420) may be configured to perform booting using the regulated first power.

[0088] According to one embodiment, the first PDIC (415) may be configured to output the second signal having the second value to turn off the first switch (411) so that the first input interface (477) and the regulator (419) are not connected when the booting of the processor (420) fails.

[0089] According to one embodiment, the second PDIC (416) may be configured to receive the second signal through the circuit (417) based on the failure of the booting of the processor (420) using the regulated first power, and to output a third signal to control the second switch (413) to turn on when the input of the second power is identified through the second input interface (478) upon receiving the second signal.

[0090] According to one embodiment, the first PDIC (415) may include a first pin (415-1) for detecting the input of the first power through the first input interface (477), a second pin (415-5) for outputting a first signal to turn on the first switch (411) so that the first input interface (477) and the regulator (419) are connected, or a second signal to turn off the first switch (411) so that the first input interface (477) and the regulator (419) are not connected, a third pin (415-3) for receiving a signal corresponding to the third signal or a signal corresponding to the fourth signal from the circuit (417), and a fourth pin (415-7) for detecting the amount of power of the power supplied to the processor (420).

[0091] According to one embodiment, the second pin (415-5) and the third pin (415-3) may be GPIO (general purpose input output) pins.

[0092] According to one embodiment, the regulator (419) may be configured to supply the regulated second power to the processor (420) by regulating the voltage and / or current of the second power input through the second input interface (478) while the regulator (419) and the second input interface (478) are connected through the second switch (413). The processor (420) may be configured to perform booting using the regulated second power.

[0093] According to one embodiment, the second PDIC (416) may be configured to output the fourth signal having the second value to turn off the second switch (413) so that the second input interface (478) and the regulator (419) are not connected when the booting of the processor (420) using the regulated second power fails.

[0094] According to one embodiment, the first PDIC (415) may be configured to receive the fourth signal through the circuit (417) based on the failure of the booting of the processor (420) using the regulated second power, and to output a first signal to control the first switch (411) to turn on when the input of the first power is identified through the first input interface (477) upon receiving the fourth signal.

[0095] According to one embodiment, the second PDIC (416) may include a first pin (416-1) for detecting the input of the second power through the second input interface (478), a second pin (416-5) for outputting a third signal to turn on the second switch (413) so that the second input interface (478) and the regulator (419) are connected, or a fourth signal to turn off the second switch (413) so that the second input interface (478) and the regulator (419) are not connected, a third pin (416-3) for receiving a signal corresponding to the first signal or a signal corresponding to the second signal from the circuit (417), and a fourth pin (416-7) for detecting the amount of the regulated second power supplied to the processor (420). The second pin (416-5) and the third pin (416-3) may be GPIO (general purpose input output) pins.

[0096] According to one embodiment, the electronic device (401) may include a first overvoltage blocking circuit (412) that blocks the input of the first power when the first power is an overvoltage, and a second overvoltage blocking circuit (414) that blocks the input of the second power when the second power is an overvoltage.

[0097] FIG. 5a is a diagram illustrating the operation when a first power is received through a first input interface in a wearable electronic device according to one embodiment.

[0098] Referring to FIG. 5a, when a first power is received through a first input interface (477) in an electronic device (401) according to one embodiment, the first power can be detected by the VBUS pin (415-1) of the first PDIC (415) through path ①. As the first power input through the first input interface (477) according to one embodiment is detected, the first PDIC (415) can control the first switch (411) to be turned on by outputting a first signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415). According to one embodiment, the first PDIC (415) can identify whether the value of the signal received at the COLLISION_PREVENT pin (415-3) of the first PDIC (415) is the first value (e.g., H, high) or the second value (e.g., L, low) based on a first signal output having a first value (e.g., H, high). According to one embodiment, when the second power is not received at the second input interface (478), the value of the signal output through the VBUS_SW_CTRL pin (416-5) of the second PDIC (416) may be a fourth signal having a second value (e.g., L, low), and the first signal having a first value (e.g., H, high) may be transmitted to the COLLISION_PREVENT pin (415-3) of the first PDIC (415) by the power selection circuit (417). According to one embodiment, the first PDIC (415) can identify that the second switch (413) is off based on the value of the signal received at the COLLISION_PREVENT pin (415-3) of the first PDIC (415) being a first value (e.g., H, high).According to one embodiment, the first PDIC (415) identifies that the first power through the first input interface (477) is received before the second power through the second input interface (478) by identifying that the second switch (413) is off, and can control the first switch (411) to be turned on by maintaining the output of a first signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415). As the first switch (411) is turned on, the first power can be transmitted to the regulator (419) through path ②. According to one embodiment, the power selection circuit (417) can transmit the first signal having a first value (e.g., H, high) to the COLLISION_PREVENT pin (416-3) of the second PDIC (416). According to one embodiment, the second PDIC (416) can identify whether the value of the signal received at the COLLISION_PREVENT pin (416-3) of the second PDIC (316) is a first value (e.g., H, high) or a second value (e.g., L, low) when the second power is received through the second input interface (478). According to one embodiment, the second PDIC (416) can maintain the output of a fourth signal having a second value (e.g., L, low) through the VBUS_SW_CTRL pin (416-5) of the second PDIC (416) based on the fact that the value of the signal received at the COLLISION_PREVENT pin (416-3) of the second PDIC (416) is a first value (e.g., H, high), thereby keeping the second switch (413) in an off state.

[0099] FIG. 5b is a diagram illustrating the operation when a second power is received through a second input interface in a wearable electronic device according to one embodiment.

[0100] Referring to FIG. 5b, when a second power is received through a second input interface (478) in an electronic device (401) according to one embodiment, the second power can be detected by the VBUS pin (416-1) of the second PDIC (416) through path ③. As the second power is detected through the second input interface (478), the second PDIC (416) according to one embodiment can control the second switch (413) to be turned on by outputting a third signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (416-5) of the second PDIC (416). According to one embodiment, the second PDIC (416) can identify whether the value of the signal received at the COLLISION_PREVENT pin (416-3) of the second PDIC (416) is the first value (e.g., H, high) or the second value (e.g., L, low) based on a third signal output having a first value (e.g., H, high). According to one embodiment, when the first power is not received at the first input interface (477), a second signal having a second value (e.g., L, low) can be output through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415), and the power selection circuit (417) can transmit the signal having the first value (e.g., H, high) to the COLLISION_PREVENT pin (416-3) of the second PDIC (416). According to one embodiment, the second PDIC (416) can identify that the first switch (411) is off based on the value of the signal received at the COLLISION_PREVENT pin (416-3) of the second PDIC (416) being a first value (e.g., H, high).According to one embodiment, the second PDIC (416) identifies that the second power through the second input interface (478) is received before the first power through the first input interface (477) by identifying that the first switch (411) is off, and maintains the output of a third signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (416-5) of the second PDIC (416) so that the second switch (413) is turned on. As the second switch (413) is turned on, the second power can be delivered to the regulator (419) through path ④. According to one embodiment, a signal having a first value (e.g., H, high) corresponding to the third signal can be delivered to the COLLISION_PREVENT pin (415-3) of the first PDIC (415) by the power selection circuit (417). According to one embodiment, the first PDIC (415) can identify whether the value of the signal received at the COLLISION_PREVENT pin (415-3) of the first PDIC (415) is a first value (e.g., H, high) or a second value (e.g., L, low) when the first power is received through the first input interface (477). According to one embodiment, the first PDIC (415) can control the first switch (411) to remain in an off state by maintaining the output of a second signal having a second value (e.g., L, low) through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415) based on the fact that the value of the signal received at the COLLISION_PREVENT pin (415-3) of the first PDIC (415) is a first value (e.g., H, high).

[0101] FIG. 5c is a diagram showing the operation change of the first PDIC, the second PDIC, the first switch, and the second switch when a wearable electronic device according to one embodiment receives the first power through the first input interface before the second power through the second input interface in the default state.

[0102] Referring to FIG. 5c, an electronic device (401) according to one embodiment may output a second signal having a second value (e.g., L, low) through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415) in a default state and receive a signal having a second value (e.g., L, low) through the COLLISION_PREVENT pin (415-3) of the first PDIC (415), and the first switch (411) may be off, and a fourth signal having a second value (e.g., L, low) may be output through the VBUS_SW_CTRL pin (416-5) of the second PDIC (316), and receive a signal having a second value (e.g., L, low) through the COLLISION_PREVENT pin (416-3) of the second PDIC (416), and the second switch (413) may be off.

[0103] In a default state according to one embodiment, when the first power through the first input interface (477) is received before the second power through the second input interface (478), the wearable electronic device (401) may be in a first state that outputs a first signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415).

[0104] According to one embodiment, as a first signal having a first value (e.g., H, high) is output through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415), the wearable electronic device (401) can be turned on by the first switch (411) and the first value (e.g., H, high) is transmitted to the COLLISION_PREVENT pin (415-3) of the first PDIC (415) by the power selection circuit (417), thereby becoming a second state.

[0105] According to one embodiment, when a signal having a first value (e.g., H, high) is received through the COLLISION_PREVENT pin (415-3) of the first PDIC (415), the wearable electronic device (401) may output a fourth signal having a second value (e.g., L, low) through the VBUS_SW_CTRL pin (416-5) of the second PDIC (416) and the second switch (413) may be in a third state that keeps the second switch (413) off.

[0106] FIG. 5d is a diagram showing the operation changes of the first PDIC, second PDIC, first switch, second switch, and power management circuit when the processor fails to boot in a third state of a wearable electronic device according to one embodiment.

[0107] Referring to FIG. 5d, in a third state according to one embodiment, the regulator (419) can provide power (e.g., SYS) to the processor (420) using the first power when the first switch (411) is turned on. The power (e.g., SYS) output by the regulator (419) according to one embodiment is supplied to the processor (420) and used for booting operations, but when the processor (420) fails to boot and the state becomes lower than the specified power (H->L), the electronic device (401) can operate in a fourth state.

[0108] In one embodiment, as the SYS of the first PDIC (415) becomes a state where the power is lower than or equal to a specified power (e.g., H->L), the first PDIC (415) can output a second signal having a second value (e.g., L, low) through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415) to turn off the first switch (411), and the wearable electronic device (401) can operate in a fifth state in which the second value (e.g., L, low) is transmitted to the COLLISION_PREVENT pin (416-3) of the second PDIC (416) by the power selection circuit (417) according to the output of the second signal. In the fifth state according to one embodiment, when the second power is input through the second input interface (478), the second PDIC (416) can output a third signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (416-5).

[0109] As a third signal having a first value (e.g., H, high) is output through the VBUS_SW_CTRL pin (416-5) of the second PDIC (416) according to one embodiment, the wearable electronic device (401) can operate in a sixth state in which the second switch (413) is turned on and a signal having a first value (e.g., H, high) is transmitted to the COLLISION_PREVENT pin (415-3) of the first PDIC (415) through the power selection circuit (417).

[0110] According to one embodiment, as a signal having a first value (e.g., H, high) is transmitted to the COLLISION_PREVENT pin (415-3) of the first PDIC (415) through the power selection circuit (417), the first PDIC (415) can identify the ON state of the second switch (413), and the wearable electronic device (401) can operate in a seventh state in which the first switch (411) is turned OFF by outputting a second signal having a second value (e.g., L, low) through the VBUS_SW_CTRL pin (415-5) of the first PDIC (415). According to one embodiment, the wearable electronic device (401) can be configured so that in the seventh state, the second power is supplied to the regulator (419) instead of the first power, thereby allowing the regulator (419) to supply power to the processor (420) through the second power.

[0111] FIG. 6 is a diagram showing the pins of a first PDIC according to one embodiment.

[0112] Referring to FIG. 6, a first PDIC (615) according to one embodiment (e.g., the first PDIC (415) of FIG. 4) may include a first pin (e.g., VBUS) (61), a second pin (e.g., collision_prevent) (63), a third pin (e.g., VBUS_SW_CTRL) (65), and / or a fourth pin (e.g., VSYS) (67).

[0113] According to one embodiment, the first PDIC (415) can detect the first power input through the first input interface (477) via the first pin (e.g., VBUS) (61).

[0114] According to one embodiment, the first PDIC (615) can identify whether the second switch (413) is turned on or off by identifying the value of a signal (e.g., a first value or a second value) input from the power selection circuit (417) through the second pin (e.g., collision_prevent) (63). According to one embodiment, the first PDIC (615) can control the first switch (411) to be turned off (or maintained in an off state) when the second switch (413) is turned on during the first power input through the first input interface (477).

[0115] According to one embodiment, the first PDIC (615) may output a first signal or a second signal having a value (a first value (e.g., H, high) or a second value (e.g., L, low)) to control the first switch (411) to be turned on or off through a third pin (e.g., VBUS_SW_CTRL) (65). According to one embodiment, the first PDIC (615) may control the first switch (411) to be turned on through a first signal having a first value (e.g., H, high) so that the first power input through the first input interface (477) is transmitted to the regulator (419). According to one embodiment, the first PDIC (615) may control the first switch (411) to be turned off through a second signal having a second value (e.g., L, low) so that the first power input through the first input interface (477) is not transmitted to the regulator (419).

[0116] According to one embodiment, the first PDIC (615) can identify (or monitor or detect) the power (e.g., SYS) output by the regulator (419) through the fourth pin (e.g., VSYS) (67) after the first power input through the first input interface (477) is transmitted to the regulator (419). According to one embodiment, the first PDIC (615) can identify (or monitor or detect) whether the power (e.g., SYS) output by the regulator (419) becomes less than or equal to a specified power (e.g., drops). Power (e.g., SYS) output by the regulator (419) according to one embodiment is supplied to the processor (420) and used for booting operations, but when the processor (420) fails to boot, the power may become less than the specified power as the processor (420) does not use power. According to one embodiment, the first PDIC (615) may control the first switch (411) to turn off via a first signal when the power (e.g., SYS) output by the regulator (419) falls less than the specified power based on the failure of the processor (420), thereby preventing the first power input through the first input interface (477) from being delivered to the regulator (419). The pins of the second PDIC (416) according to one embodiment may also include pins for performing operations identical or similar to the pins of the first PDIC (615). The pins and operation of the second PDIC (416) according to one embodiment will be understood by a person skilled in the art through the description of the pins and operation of the first PDIC (615).

[0117] FIG. 7 is a flowchart showing the operation of the first PDIC according to one embodiment.

[0118] Referring to FIG. 7, the first PDIC (415) of an electronic device according to one embodiment (e.g., electronic device (101) of FIG. 1, electronic device (200) of FIG. 2a and FIG. 2b, electronic device (300) of FIG. 3a and FIG. 3b, or electronic device (401) of FIG. 4) can perform at least one of 710 to 750 operations.

[0119] In operation 710, the first PDIC (415) according to one embodiment can identify whether power is input through the first pin (e.g., VBUS pin) (415-1 or 61). The first PDIC (415) according to one embodiment can detect the first power input through the first input interface (477) using the first pin (415-1 or 61).

[0120] In operation 720, the first PDIC (415) according to one embodiment can identify whether the value of the signal input from the power selection circuit (417) through the second pin (e.g., collision_prevent pin) (415-3 or 63) is a first value (e.g., H, high) (or a second value (e.g., L, low)) when power input is detected through the first pin (415-1 or 61).

[0121] In operation 725, according to one embodiment, the first PDIC (415) can identify that the second switch (413) is turned on and maintain the off state of the first switch (411) if the value of the signal input from the power selection circuit (417) through the second pin (415-3 or 63) is not the second value (e.g., L, low) (or the first value (e.g., H, high)).

[0122] In operation 730, according to one embodiment, the first PDIC (415) can turn on the first switch (411) by outputting a first signal having a first value (e.g., H, high) through a third pin (e.g., VBUS_SW_CTRL pin) (415-5 or 65) so that the first power input through the first input interface (477) can be delivered to the regulator (419) if the value of the signal input from the power selection circuit (417) through the second pin (415-3 or 63) is not a first value (e.g., L, low) (or if it is a second value (e.g., L, low).

[0123] In operation 740, the first PDIC (415) according to one embodiment can identify (or monitor or detect) whether the power (SYS) output from the power selection circuit (417) through the fourth pin (e.g., VSYS) (415-7 or 67) becomes below a specified power (e.g., drops). The power (e.g., SYS) output by the regulator (419) according to one embodiment is supplied to the processor (420) and used for booting operations, and may become below a specified power as the processor (420) does not use power when booting fails by the processor (420). The first PDIC (415) according to one embodiment may keep the first switch (411) on and terminate if the power (e.g., SYS) output by the regulator (419) does not become below a specified power based on the boot success of the processor (420).

[0124] In operation 750, the first PDIC (415) according to one embodiment may output a second signal having a second value (e.g., LOW) through a third pin (e.g., VBUS_SW_CTRL) (415-5 or 65) when the power (VSYS) output from the power selection circuit (417) is less than or equal to a specified power, thereby causing the first switch (411) to turn off. As the first switch (411) according to one embodiment is turned off, the second power is provided to the regulator (419) instead of the first power, so that the regulator (419) can provide power to the processor (420) through the second power.

[0125] FIG. 8 is a drawing showing a wearable electronic device in which a second power input through the second input interface among a first input interface and a second input interface according to one embodiment has priority.

[0126] Referring to FIG. 8, an electronic device (801) according to one embodiment (e.g., electronic device (101) of FIG. 1, electronic device (200) of FIG. 2a and FIG. 2b, or electronic device (300) of FIG. 3a and FIG. 3b) may include a first input interface (877), a first switch (811), a first overvoltage protection circuit (812), a second input interface (878), a second switch (813), a second overvoltage protection circuit (814), a first PDIC (815), a second PDIC (816), a circuit (or power selection circuit) (817), a regulator (819), a processor (820), and a memory (830). An electronic device (801) according to one embodiment may be configured to include various additional components or to exclude some of the above components, but is not limited thereto. An electronic device (801) according to one embodiment may further include all or part of the electronic device (101) illustrated in FIG. 1. A first input interface (877) according to one embodiment may include a port for receiving power (e.g., first power) from an external source (e.g., an external electronic device (102) or an external power source or an external battery). For example, the first input interface (877) may include a USB port (e.g., a USB TYPE-C port) or a POGO connector (or a port including POGO pins).

[0127] According to one embodiment, the first switch (or first load switch) (811) may have one end connected to the first input interface (877) and the other end connected to the regulator (819). According to one embodiment, the first switch (811) may be turned on or off based on a control signal from the first PDIC (815). When the first switch (811) according to one embodiment is turned on, the first input interface (877) and the regulator (819) are connected, and when it is turned off, the connection between the first input interface (877) and the regulator (819) may be disconnected.

[0128] A first overvoltage protection circuit (e.g., OVP) (812) according to one embodiment may be connected between a first input interface (877) and a first PDIC (815). The first overvoltage protection circuit (812) according to one embodiment may protect an electronic device (801) (or the first PDIC (815)) by blocking power inflow when power is supplied through the first input interface (877) at a voltage (overvoltage) greater than a specified magnitude. The first overvoltage protection circuit (812) according to one embodiment may be omitted or its location changed depending on design modifications. A second input interface (878) according to one embodiment may include a port for receiving power (e.g., second power) from an external source (e.g., an external electronic device, an external power source, or an external battery). For example, the second input interface (878) may include a USB port (e.g., a USB TYPE-C port) or a POGO connector (or a port including POGO pins). The types of ports of the first input interface (877) and the second input interface (878) according to one embodiment may be the same or different.

[0129] According to one embodiment, the second switch (or second load switch) (813) may have one end connected to the second input interface (878) and the other end connected to the regulator (819). According to one embodiment, the second switch (813) may be turned on or off based on a control signal from the second PDIC (816). When the second switch (813) according to one embodiment is turned on, the second input interface (878) and the power regulator (819) are connected, and when it is turned off, the connection between the second input interface (878) and the regulator (819) may be disconnected.

[0130] A second overvoltage protection circuit (e.g., OVP) (814) according to one embodiment may be connected between a second input interface (878) and a second PDIC (816). The second overvoltage protection circuit (814) according to one embodiment may protect the electronic device (801) (or the second PDIC (816)) by blocking power inflow when power is supplied through the second input interface (878) at a voltage (overvoltage) greater than a specified size.

[0131] According to one embodiment, the first PDIC (815) can identify whether the second switch (813) is turned on when the first power is input through the first input interface (877). According to one embodiment, the first PDIC (815) can detect the first power input through the first input interface (877) through the first pin (e.g., VBUS) (815-1). According to one embodiment, the first PDIC (815) can identify whether the second switch (813) is turned on or the second switch (813) is turned off by identifying whether the value of the signal input from the power selection circuit (817) through the second pin (e.g., collision_prevent) (815-3) is a first value (e.g., H, high) or a second value (e.g., L, low). According to one embodiment, the first PDIC (815) can control the first switch (811) to be turned off (or maintained in an off state) when the second switch (813) is turned on during the first power input through the first input interface (877). According to one embodiment, the first PDIC (815) can control the first switch (811) to be turned on when the second switch (813) is turned off during the first power input through the first input interface (877). According to one embodiment, the first PDIC (815) can output a signal having a first value (e.g., H, high) or a second value (e.g., L, low) to control the first switch (811) to be turned off or on through a third pin (e.g., VBUS_SW_CTRL) (815-5). According to one embodiment, the first PDIC (815) can control the first switch (811) to turn on through a first signal having a first value (e.g., H, high) so that the first power input through the first input interface (877) is transmitted to the regulator (819).According to one embodiment, the first PDIC (815) can control the first switch (811) to be turned off through a second signal having a second value (e.g., L, low), so that the first power input through the first input interface (877) is not transmitted to the regulator (819).

[0132] According to one embodiment, the second PDIC (816) can control the second switch (813) to be turned on preferentially regardless of whether the first switch (811) is turned on when the second power is input through the second input interface (878) with a high priority. According to one embodiment, the second PDIC (816) can output a third signal having a first value (e.g., H, high) to control the second switch (813) to be turned on through the third pin (e.g., VBUS_SW_CTRL) (816-3) of the second PDIC (816) when the second power is input through the second input interface (878). As the second switch (813) is turned on according to one embodiment, the second power input through the second input interface (878) can be delivered to the regulator (819).

[0133] A power selection circuit (817) according to one embodiment may be connected to a first PDIC (815) and a second PDIC (816). A power selection circuit (817) according to one embodiment may include a diode (81). A diode (81) according to one embodiment may include a Schottky barrier diode. An anode terminal of a diode (871) according to one embodiment may be connected to a third pin (e.g., VBUS_SW_CTRL) (816-5) of a second PDIC (816), and a cathode terminal of a diode (81) may be connected to a second pin (e.g., collision_prevent) (816-3) of a first PDIC (816). A power selection circuit (817) according to one embodiment may transmit a third signal having a first value (e.g., H, high) or a fourth signal having a second value (e.g., L, low) output from a third pin (e.g., VBUS_SW_CTRL) (816-5) of a first PDIC (816) to a second pin (e.g., collision_prevent) (815-3) of a first PDIC (815) so that the first PDIC (815) can identify whether the second switch (813) is turned on or off. In one embodiment, the power selection circuit (817) can, when the second power is received through the second input interface (878), transmit a third signal from the third pin (e.g., VBUS_SW_CTRL) (816-5) of the second PDIC (816) to the second pin (e.g., collision_prevent) (815-3) of the first PDIC (815) to first turn on the second switch (813) and prevent the first PDIC (815) from turning on the first switch (811).In other words, the power selection circuit (817) can ensure that the first power is delivered to the regulator (819) when the first power is first input to the first input interface (877) among the first input interface (877) and the second input interface (878), but can turn off the first switch (811) and turn on the second switch (813) so that the second power is preferentially supplied to the regulator (819) when the second power is input to the second input interface (878) while the first power is being supplied to the regulator (819).

[0134] A regulator (819) according to one embodiment can receive a first power input through a first input interface (811) when the first switch (811) is turned on, and can receive a second power input through a second input interface (813) when the second switch (813) is turned on. A regulator (819) according to one embodiment may include a buck converter. A regulator (819) according to one embodiment may, upon receiving a first power (or second power), convert (or regulate) the voltage (or current) of the first power (or second power) into a voltage (or current) suitable for the system (components included in the electronic device (801)) of the processor (820) (or electronic device (801)) and output the power (e.g., SYS) in which the voltage (or current) has been converted. A PMIC may be further included between the regulator (819) and the processor (820) according to one embodiment. In this case, the regulator (819) may mean an IF (interface) PMIC.

[0135] A processor (820) according to one embodiment (e.g., processor (120) of FIG. 1) can perform booting when power (e.g., SYS) is supplied by a regulator (819) to control at least one other component (e.g., hardware or software component) of an electronic device (801) and can perform various data processing or operations. A processor (820) according to one embodiment can perform overall control operations of the electronic device (801). A processor (820) according to one embodiment can execute commands stored in memory (830) individually or collectively to enable the wearable electronic device (801) to perform XR functions or provide XR content.

[0136] A memory (830) according to one embodiment (e.g., memory (130) of FIG. 1) may include one or more storage media for storing instructions (e.g., instructions). A memory (830) according to one embodiment may store various data used by at least one component (e.g., processor (820)) of an electronic device (801). The data may include, for example, software (e.g., software module or program (140)) and input or output data for related instructions. For example, the memory (830) may store instructions that cause the electronic device (801) to perform XR functions or provide XR content.

[0137] A wearable electronic device (801) according to one embodiment of the present disclosure comprises: a first input interface (877) for receiving a first power input; a second input interface (878) for receiving a second power input; a processor (820); a regulator (819) that regulates the first power input through the first input interface (877) to provide the regulated first power to the processor (820) or regulates the second power input through the second input interface (878) to provide the regulated second power to the processor (820); a first switch (811) that connects the first input interface (877) and the regulator (819) when turned on and disconnects the first input interface (877) and the regulator (819) when turned off; and a second input interface (878) and the regulator (819) that connects the second input interface (878) and the regulator (819) when turned off. It may include a second switch (813) for disconnecting. The wearable electronic device (801) may include a first PDIC (815) that identifies whether the second switch (813) is turned on or off when the first power is input through the first input interface (877), outputs a first signal to control the first switch (811) to turn on when the second switch (813) is off, and outputs a second signal to control the first switch (811) to turn off when the second switch (813) is on. The wearable electronic device (801) may include a second PDIC (816) that outputs a third signal to control the second switch (813) to turn on when the second power is input through the second input interface (878).The wearable electronic device (801) may include a circuit (817) connected to the first PDIC (815) and the second PDIC (816) and transmitting the third signal to the first PDIC (815) so that the first PDIC (815) identifies whether the second switch (813) is turned on.

[0138] According to one embodiment, the first signal and the third signal are signals having a voltage of a first value, and the second signal may be a signal having a voltage of a second value. According to one embodiment, the regulator (819) may include a buck converter.

[0139] According to one embodiment, the regulator (819) may be configured to supply the regulated first power to the processor (820) by regulating the voltage and / or current of the first power input through the first input interface (877) while the first input interface (877) and the regulator (819) are connected through the first switch (811). The processor (820) may be configured to operate using the regulated first power.

[0140] According to one embodiment, the regulator (819) is configured to supply the regulated second power to the processor (820) by regulating the voltage and / or current of the second power input through the second input interface (878) while the second input interface (878) and the regulator (819) are connected through the second switch (813), and the processor (820) may be configured to operate using the regulated second power.

[0141] The wearable electronic device (801) according to one embodiment may include a first overvoltage blocking circuit (812) that blocks the input of the first power when the first power is an overvoltage, and a second overvoltage blocking circuit (814) that blocks the input of the second power when the second power is an overvoltage.

[0142] FIG. 9a is a diagram illustrating the operation when a first power is received through a first input interface in a wearable electronic device in which the second input interface has priority among a first input interface and a second input interface according to one embodiment.

[0143] Referring to FIG. 9a, when a first power is first received through a first input interface (877) in an electronic device according to one embodiment (e.g., electronic device (801) of FIG. 8), the first power can be detected by the VBUS pin (815-1) of the first PDIC (815) through path ⑤. In accordance with one embodiment, the first PDIC (815) can control the first switch (811) to be turned on by outputting a first signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (815-5) of the first PDIC (815) as the first power input through the first input interface (877) is detected. In one embodiment, the power selection circuit (817) may not provide an additional signal to the COLLISION_PREVENT pin (815-3) of the first PDIC (815) when the second power is not input through the second interface (878), and the COLLISION_PREVENT pin (815-3) of the first PDIC (715) may maintain reception of a signal of the second value (e.g., L, low). In one embodiment, the first PDIC (815) may maintain the ON of the first switch (811) as the reception of the signal of the second value (e.g., L, low) of the COLLISION_PREVENT pin (815-3) of the first PDIC (815) is maintained, and allow the first power to be delivered to the regulator (819) through path ⑥.

[0144] FIG. 9b is a diagram for explaining the operation when a second power is received through a second input interface while a first power is being received through a first input interface in a wearable electronic device having priority among a first input interface and a second input interface according to one embodiment.

[0145] Referring to FIG. 9b, in a wearable electronic device (e.g., wearable electronic device (801) of FIG. 8) according to one embodiment, when a first power is received through a first input interface (877) and a second power is received through a second input interface (878), the second power can be detected by the VBUS pin (816-1) of the second PDIC (816) through path ⑦. In accordance with one embodiment, the second PDIC (816) can control the second switch (813) to be turned on by outputting a third signal having a first value (e.g., H, high) through the VBUS_SW_CTRL pin (816-5) of the second PDIC (816) as the second power is detected through the second input interface (878). As the second switch (813) according to one embodiment is turned on, the second power can be transmitted to the regulator (819) through path ⑧.

[0146] Based on a third signal having a first value (e.g., H, high) output through the VBUS_SW_CTRL pin (816-5) of the second PDIC (816) according to one embodiment, a signal having a first value (e.g., H, high) can be transmitted to the COLLISION_PREVENT pin (815-3) of the first PDIC (815) through the power selection circuit (817). The first PDIC (815) according to one embodiment can identify that the second switch (813) is turned on based on the signal having a first value (e.g., H, high) received at the COLLISION_PREVENT pin (815-3). According to one embodiment, the first PDIC (815) can control the first switch (813) to turn off by outputting a second signal having a second value (e.g., L, low) through the VBUS_SW_CTRL pin (815-5) of the first PDIC (815) as it identifies that the second switch (813) is turned on.

[0147] According to one embodiment of the present disclosure, an electronic device (electronic device (101) of FIG. 1, electronic device (200) of FIG. 2a and 2b, wearable electronic device (300) of FIG. 3a and 3b, wearable electronic device (401) of FIG. 4, or wearable electronic device (801) of FIG. 8) may select which of the multiple power sources to use to supply power to an internal system before power is turned on or before the internal battery is charged to a bootable voltage, in the case where there is no internal battery or the internal battery (e.g., battery (189) of FIG. 1 is discharged and power is supplied from multiple power sources through multiple paths via multiple input interfaces). According to one embodiment of the present disclosure, an electronic device (electronic device (101) of FIG. 1, electronic device (200) of FIG. 2a and 2b, wearable electronic device (300) of FIG. 3a and 3b, wearable electronic device (401) of FIG. 4, or FIG. The wearable electronic device (801) of 8 can power an internal system using one of a plurality of power sources before powering on (e.g., booting), and if the power supplied to the internal system during booting is too low to perform booting, it can select another power source to power the internal system.

[0148] One embodiment of this document and the terms used therein are not intended to limit the technical features described in this document to specific embodiments, and should be understood to include various modifications, equivalents, or substitutions of said embodiments. In connection with the description of the drawings, similar reference numerals may be used for similar or related components. The singular form of a noun corresponding to an item may include one or more of said items unless the relevant context clearly indicates otherwise. In this document, each of phrases such as "A or B," "at least one of A and B," "at least one of A or B," "A, B or C," "at least one of A, B and C," and "at least one of A, B, or C" may include any one of the items listed together in the corresponding phrase, or all possible combinations thereof. Terms such as “first,” “second,” or “first” or “second” may be used simply to distinguish a component from another component and do not limit the components in any other aspect (e.g., importance or order). Where any (e.g., first) component is referred to as “coupled” or “connected” to another (e.g., second) component, with or without the terms “functionally” or “communicationally,” it means that said component may be connected to said other component directly (e.g., wired), wirelessly, or through a third component.

[0149] The term "module" as used in an embodiment of this document may include a unit implemented in hardware, software, or firmware, and may be used interchangeably with terms such as logic, logic block, component, or circuit, for example. A module may be a component formed integrally, or a minimum unit of said component or a part thereof that performs one or more functions. For example, according to an embodiment, a module may be implemented in the form of an application-specific integrated circuit (ASIC).

[0150] One embodiment of the present document may be implemented as software (e.g., program (140)) comprising one or more instructions stored in a storage medium (e.g., internal memory (136) or external memory (138)) readable by a machine (e.g., electronic device (101) or electronic device (301)). For example, a processor (e.g., processor (420)) of the machine (e.g., electronic device (301)) may call at least one of the one or more instructions stored in the storage medium and execute it. This enables the machine to be operated to perform at least one function according to the at least one called instruction. The one or more instructions may include code generated by a compiler or code that can be executed by an interpreter. The storage medium readable by the machine may be provided in the form of a non-transitory storage medium. Here, 'non-temporary' simply means that the storage medium is a tangible device and does not contain a signal (e.g., electromagnetic waves), and the term does not distinguish between cases where data is stored semi-permanently and cases where it is stored temporarily.

[0151] According to one embodiment, the method according to one embodiment disclosed herein may be provided by being included in a computer program product. The computer program product may be traded between a seller and a buyer as a product. The computer program product may be distributed in the form of a device-readable storage medium (e.g., compact disc read-only memory (CD-ROM)), or distributed online (e.g., download or upload) through an application store (e.g., Play Store™) or directly between two user devices (e.g., smartphones). In the case of online distribution, at least a portion of the computer program product may be temporarily stored or temporarily created on a device-readable storage medium, such as the memory of a manufacturer's server, an application store's server, or a relay server.

[0152] According to one embodiment, each component (e.g., module or program) of the components described above may include a singular or multiple entities, and some of the multiple entities may be separated and placed in other components. According to one embodiment, one or more of the components or operations among the aforementioned components may be omitted, or one or more other components or operations may be added. Generally or additionally, multiple components (e.g., module or program) may be integrated into a single component. In this case, the integrated component may perform one or more functions of each of the multiple components in the same or similar manner as those performed by the corresponding component among the multiple components prior to integration. According to one embodiment, operations performed by the module, program, or other components may be executed sequentially, in parallel, iteratively, or heuristically, or one or more of the operations may be executed in a different order, omitted, or one or more other operations may be added.

Claims

1. In a wearable electronic device (101, 200, 300, 401), A first input interface (477) for receiving first power; A second input interface (478) for receiving second power; Processor(120, 420); A regulator (419) that regulates the first power input through the first input interface to provide the regulated first power to the processor, or regulates the second power input through the second input interface to provide the regulated second power to the processor; A first switch (411) that connects the first input interface and the regulator when turned on and disconnects the first input interface and the regulator when turned off; A second switch (413) that connects the second input interface and the regulator when turned on and disconnects the second input interface and the regulator when turned off; A first PDIC (415) that identifies whether the second switch is turned on or off when the first power is input through the first input interface, outputs a first signal to control the first switch to turn on if the second switch is off, and outputs a second signal to control the first switch to turn off if the second switch is on; A second PDIC (416) that identifies whether the first switch is turned on or off when the second power is input through the second input interface, outputs a third signal to control the second switch to turn on if the first switch is off, and outputs a fourth signal to control the second switch to turn off if the first switch is on; and A wearable electronic device comprising a circuit (417) connected to the first PDIC and the second PDIC, transmitting the first signal to the second PDIC to identify whether the first switch is turned on, and transmitting the third signal to the first PDIC to identify whether the second switch is turned on.

2. In Paragraph 1, The first signal and the third signal are signals having a voltage of a first value, and The electronic device wherein the second signal and the fourth signal are signals having a voltage of a second value.

3. In Paragraph 1 or 2, The above regulator is a wearable electronic device including a buck converter.

4. In any one of paragraphs 1 through 3, The regulator is configured to supply the regulated first power to the processor by regulating the voltage and / or current of the first power input through the first input interface while the first input interface and the regulator are connected through the first switch. The above processor is a wearable electronic device configured to perform booting using the above-mentioned regulated first power.

5. In any one of paragraphs 1 through 4, The above-mentioned first PDIC is, A wearable electronic device configured to output the second signal having the second value to turn off the first switch so that the first input interface and the regulator are not connected when the booting of the processor using the first regulated power fails.

6. In any one of paragraphs 1 through 5, The above second PDIC is, Receiving the second signal through the circuit based on the failure of the boot of the processor using the first regulated power, and A wearable electronic device configured to output the third signal to control the second switch to turn on when the input of the second power is identified through the second input interface upon reception of the second signal.

7. In any one of paragraphs 1 through 6, The above-mentioned first PDIC is, A first pin (415-1, 61) for detecting the input of the first power through the first input interface; A second pin (415-5, 65) that outputs a first signal to turn on the first switch so that the first input interface and the regulator are connected, or outputs a second signal to turn off the first switch so that the first input interface and the regulator are not connected; A third pin (415-3, 63) for receiving the third signal or the fourth signal from the above circuit; and A wearable electronic device comprising a fourth pin (415-7) for detecting the amount of power of the first regulated power supplied to the processor.

8. In any one of paragraphs 1 through 7, A wearable electronic device in which the second pin (415-5, 65) and the third pin (415-3, 63) are GPIO (general purpose input output) pins.

9. In any one of paragraphs 1 through 8, The regulator is configured to supply the regulated second power to the processor by regulating the voltage and / or current of the second power input through the second input interface while the regulator is connected to the second input interface through the second switch, and The above processor is a wearable electronic device configured to perform booting using the above-mentioned regulated second power.

10. In any one of paragraphs 1 through 9, The above second PDIC is, A wearable electronic device configured to output the fourth signal having the second value to turn off the second switch so that the second input interface and the buck converter are not connected when the booting of the processor using the above-mentioned regulated second power fails.

11. In any one of paragraphs 1 through 10, The above-mentioned first PDIC is, Receiving the fourth signal through the circuit based on the failure of the boot of the processor using the above-mentioned regulated second power, and A wearable electronic device configured to output a first signal to control the first switch to turn on when the input of the first power is identified through the first input interface upon reception of the fourth signal.

12. In any one of paragraphs 1 through 11, The above second PDIC is, A first pin (416-1) for detecting the input of the second power through the second input interface; A second pin (416-5) that outputs a third signal to turn on the second switch so that the second input interface and the regulator are connected, or outputs a fourth signal to turn off the second switch so that the second input interface and the regulator are not connected; A third pin (416-3) for receiving the first signal or the second signal from the above circuit; and A wearable electronic device comprising a fourth pin (416-7) for detecting the amount of power of the regulated second power supplied to the processor.

13. In any one of paragraphs 1 through 12, A wearable electronic device in which the second pin and the third pin are GPIO (general purpose input output) pins.

14. In any one of paragraphs 1 through 13, A first overvoltage cutoff circuit (412) that cuts off the input of the first power when the first power is an overvoltage; and A wearable electronic device further comprising a second overvoltage cutoff circuit (414) that blocks the input of the second power when the second power is the overvoltage.

15. In a wearable electronic device (801), A first input interface (877) for receiving first power; A second input interface (878) for receiving second power; Processor (820); A regulator (819) that regulates the first power input through the first input interface to provide the regulated first power to the processor, or regulates the second power input through the second input interface to provide the regulated second power to the processor; A first switch (811) that connects the first input interface and the regulator when turned on and disconnects the first input interface and the regulator when turned off; A second switch (813) that connects the second input interface and the regulator when turned on and disconnects the second input interface and the regulator when turned off; A first PDIC (815) that identifies whether the second switch is turned on or off when the first power is input through the first input interface, outputs a first signal to control the first switch to turn on if the second switch is off, and outputs a second signal to control the first switch to turn off if the second switch is on; A second PDIC (816) that outputs a third signal to control the second switch to turn on when the second power is input through the second input interface; and A wearable electronic device comprising a circuit (817) connected to the first PDIC and the second PDIC and transmitting the third signal to the first PDIC so that the first PDIC identifies whether the second switch is turned on.

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