Multilayer ceramic capacitor

Abstract

Provided is a multilayer ceramic capacitor capable of relaxing electric field concentration at an end section of an internal electrode and improving dielectric breakdown voltage.　A multilayer ceramic capacitor according to the present invention comprises: a laminated body including a first surface and a second surface facing each other in a lamination direction, a third surface and a fourth surface facing each other in a first direction orthogonal to the lamination direction, and a fifth surface and a sixth surface facing each other in a second direction orthogonal to the lamination direction and the first direction; a first external electrode disposed on the fifth surface; and a second external electrode disposed on the fifth surface. The laminated body has a first internal electrode having one end exposed on the fifth surface, and a second internal electrode having one end exposed on the fifth surface. Inside the laminated body, the amount of deviation between the end sections of the first internal electrode and the second internal electrode on the fifth surface side is greater than the amount of deviation between the end sections of the first internal electrode and the second internal electrode on the sixth surface side, and is 5.0-19.8 μｍ.

Description

Multilayer ceramic capacitor

[0001] This invention relates to a multilayer ceramic capacitor.

[0002] Conventionally, a multilayer ceramic capacitor having a plurality of stacked dielectric layers and a plurality of stacked internal electrode layers is known. In recent years, there has been a demand for higher capacitance and smaller size of such multilayer ceramic capacitors, and the dielectric layers have been made thinner. Also, a multilayer ceramic capacitor that can withstand a high applied voltage is required. However, if the dielectric layer becomes thinner or the applied voltage becomes higher, the breakdown voltage may decrease.

[0003] For example, in the multilayer ceramic capacitor described in Patent Document 1 and the like, the external electrodes are arranged only on one surface. With such a configuration, in the multilayer ceramic capacitor, the volume occupied by the external electrodes decreases, and accordingly, the number of stacked internal electrodes and the overlapping area can be increased. As a result, the capacitance efficiency of the multilayer ceramic capacitor can be improved.

[0004] Japanese Unexamined Patent Application Publication No. 2014 - 96551

[0005] However, when the internal electrode is drawn out to the lower surface, there is a risk that the ends of the internal electrodes overlapping on the lower surface side may easily short - circuit due to electric field concentration.

[0006] Therefore, the main object of this invention is to provide a multilayer ceramic capacitor that can relieve the electric field concentration at the ends of the internal electrodes and improve the breakdown voltage.

[0007] The multilayer ceramic capacitor according to this invention comprises a laminate having a first surface and a second surface facing each other in the lamination direction, a third surface and a fourth surface facing each other in a first direction perpendicular to the lamination direction, and a fifth surface and a sixth surface facing each other in a second direction perpendicular to the lamination direction and the first direction, a first external electrode disposed on the fifth surface, and a second external electrode disposed on the fifth surface, wherein the laminate has a first internal electrode with one end exposed on the fifth surface and a second internal electrode with one end exposed on the fifth surface, and within the laminate, the amount of displacement of the ends of the first internal electrode and the second internal electrode on the fifth surface side is greater than the amount of displacement of the ends of the first internal electrode and the second internal electrode on the sixth surface side, and is between 5.0 μm and 19.8 μm.

[0008] In the multilayer ceramic capacitor according to this invention, the displacement of the fifth-face-side ends of the first and second internal electrodes within the laminate is greater than the displacement of the sixth-face-side ends of the first and second internal electrodes, and is between 5.0 μm and 19.8 μm. Therefore, in a bottom electrode structure such as the multilayer ceramic capacitor of the present invention, electric field concentration at the ends of the internal electrodes can be mitigated, the dielectric breakdown voltage can be improved, and the reliability of the multilayer ceramic capacitor 10 can be improved.

[0009] According to this invention, it is possible to provide a multilayer ceramic capacitor that can alleviate electric field concentration at the ends of the internal electrodes and improve the dielectric breakdown voltage.

[0010] The above-mentioned objectives, other objectives, features, and advantages of this invention will become even clearer from the following description of embodiments for carrying out the invention, with reference to the drawings.

[0011] This is an external perspective view showing a multilayer ceramic capacitor according to an embodiment of the present invention. This is a schematic cross-sectional view along line II-II in Figure 1. This is a schematic cross-sectional view along line III-III in Figure 1. This is a schematic cross-sectional view along line IV-IV in Figure 1. This is a bottom view of the laminated structure of the multilayer ceramic capacitor according to the present invention.

[0012] 1. Multilayer Ceramic Capacitor A multilayer ceramic capacitor according to the first embodiment of this invention will be described. Figure 1 is an external perspective view showing a multilayer ceramic capacitor according to an embodiment of this invention. Figure 2 is a schematic cross-sectional view taken along line II-II in Figure 1. Figure 3 is a schematic cross-sectional view taken along line III-III in Figure 1. Figure 4 is a schematic cross-sectional view taken along line IV-IV in Figure 1. Figure 5 is a bottom view of the laminated structure of the multilayer ceramic capacitor according to this invention.

[0013] The multilayer ceramic capacitor 10 includes a rectangular parallelepiped-shaped laminate 12 and an external electrode 30.

[0014] The laminate 12 includes a plurality of stacked dielectric layers 14 and a plurality of internal electrodes 16. The laminate 12 has a first surface 12a and a second surface 12b opposite to the stacking direction x, a third surface 12c and a fourth surface 12d opposite to a first direction y perpendicular to the stacking direction x, and a fifth surface 12e and a sixth surface 12f opposite to a second direction z perpendicular to the stacking direction x and the first direction y. The first direction y is the direction connecting the third surface 12c and the fourth surface 12d, and the second direction z is the direction connecting the fifth surface 12e and the sixth surface 12f.

[0015] Furthermore, when two of the first to sixth surfaces 12a to 12f intersect to form a ridge and three of the surfaces intersect to form a corner, it is preferable that the ridges and corners are rounded.

[0016] The dielectric layer 14 can be formed from, for example, a dielectric material. As the dielectric material, for example, a dielectric ceramic containing components such as BaTiO3, CaTiO3, SrTiO3, or CaZrO3 can be used. When the above dielectric material is included as the main component, depending on the desired characteristics of the multilayer ceramic capacitor 10, a material may be used in which at least one of the following components, such as Mn compounds, Mg compounds, Fe compounds, Cr compounds, Co compounds, Ni compounds, Al compounds, and rare earth compounds, is added in a lower content than the main component.

[0017] The thickness of the dielectric layer 14 after firing is preferably 0.5 μm or more and 10 μm or less.

[0018] The laminate 12 includes an inner layer 18 in which a plurality of internal electrodes 16 face each other via a dielectric layer 14.

[0019] The laminate 12 has outer layers 20a and 20b arranged to sandwich the inner layer 18 in the stacking direction x. The outer layer 20a is located on the side of the first surface 12a and is formed from a plurality of dielectric layers 14 located between the first surface 12a and the outermost surface of the inner layer 18 on the side of the first surface 12a and the extension of that outermost surface. The outer layer 20b is located on the side of the second surface 12b and is formed from a plurality of dielectric layers 14 located between the second surface 12b and the outermost surface of the inner layer 18 on the side of the second surface 12b and the extension of that outermost surface.

[0020] Furthermore, the laminate 12 has first-direction-side outer layer portions 22a and 22b. The first-direction-side outer layer portion 22a is located on the third surface 12c side and includes a dielectric layer 14 located between the third surface 12c and the outermost surface of the inner layer portion 18 on the third surface 12c side. The first-direction-side outer layer portion 22b is located on the fourth surface 12d side and includes a dielectric layer 14 located between the fourth surface 12d and the outermost surface of the inner layer portion 18 on the fourth surface 12d side. Figures 2 and 3 show the range of the first direction y of the first-direction-side outer layer portions 22a and 22b. The width of the first direction y of the first-direction-side outer layer portions 22a and 22b is also called the L gap or end gap.

[0021] Furthermore, the laminate 12 has second direction-side outer layers 24a and 24b. The second direction-side outer layer 24a is located on the fifth surface 12e side and includes a dielectric layer 14 located between the fifth surface 12e and the outermost surface of the inner layer 18 on the fifth surface 12e side, as well as the first extraction region 28a and the second extraction region 28b, which will be described later. The second direction-side outer layer 24b is located on the sixth surface 12f side and includes a dielectric layer 14 located between the sixth surface 12f and the outermost surface of the inner layer 18 on the sixth surface 12f side. Figures 2 and 3 show the range of the second direction z of the second direction-side outer layers 24a and 24b. The width of the second direction z of these second direction-side outer layers 24a and 24b is also called the W gap or side gap.

[0022] The laminate 12 has a facing portion 18E. The facing portion 18E is the portion where the first facing region 26a of the first internal electrode 16a and the second facing region 26b of the second internal electrode 16b face each other. The facing portion 18E is configured as part of the inner layer 18. Figures 2 and 3 show the ranges of the first direction y and the second direction z of the facing portion 18E. The facing portion 18E is also called the capacitor effective portion.

[0023] In the multilayer ceramic capacitor 10, as shown in Figure 4, the internal electrodes 16 are alternately stacked within the laminate 12 via a dielectric layer 14.

[0024] As shown in Figures 2 to 4, the laminate 12 has a plurality of internal electrodes 16, consisting of a plurality of first internal electrodes 16a and a plurality of second internal electrodes 16b.

[0025] As shown in Figure 2, the first internal electrode 16a has a first opposing region 26a facing the first surface 12a and the second surface 12b, and is stacked in the direction connecting the first surface 12a and the second surface 12b. Also, as shown in Figure 3, the second internal electrode 16b has a second opposing region 26b facing the first surface 12a and the second surface 12b, and is stacked in the direction connecting the first surface 12a and the second surface 12b. Therefore, the first internal electrode 16a and the second internal electrode 16b are arranged perpendicular to the fifth surface 12e and the sixth surface 12f of the laminate 12. The first internal electrode 16a and the second internal electrode 16b are stacked alternately within the laminate 12, and are arranged so that the first opposing region 26a of the first internal electrode 16a and the second opposing region 26b of the second internal electrode 16b face each other.

[0026] The first internal electrode 16a is drawn out to the fifth surface 12e of the laminate 12 by the first extraction region 28a. The first extraction region 28a is drawn out toward the third surface 12c of the laminate 12. The second internal electrode 16b is drawn out to the fifth surface 12e of the laminate 12 by the second extraction region 28b. The second extraction region 28b is separated from the first extraction region 28a and drawn out toward the fourth surface 12d of the laminate 12. The first internal electrode 16a and the second internal electrode 16b are not exposed to the first surface 12a, the second surface 12b, the third surface 12c, the fourth surface 12d, and the sixth surface 12f of the laminate 12.

[0027] In the first extraction region 28a of the first internal electrode 16a, the amount of displacement in the first direction y of the end portion 28a1 on the fourth surface 12d side of the first internal electrode 16a is greater than the amount of displacement of the end portion 28a2 on the third surface 12c side of the first internal electrode 16a. The amount of displacement in the first direction y of the end portion 28a1 on the fourth surface 12d side in the first extraction region 28a of the first internal electrode 16a is 2.7 μm or more and 25.0 μm or less. More preferably, it is 4.9 μm or more and 20.5 μm or less. On the other hand, the amount of displacement of the end portion 28a2 on the third surface 12c side in the first extraction region 28a of the first internal electrode 16a is 1.0 μm or less.

[0028] Here, the amount of displacement in the first direction y of the end portion 28a1 on the fourth surface 12d side in the first extraction region 28a of the first internal electrode 16a is calculated by the dimensional difference along the first direction y between the end portion 28a1 on the fourth surface 12d side of the first internal electrode 16a that is closest to the fourth surface 12d and the end portion 28a1 on the fourth surface 12d side of the first internal electrode 16a that is furthest from the fourth surface 12d.

[0029] Furthermore, the amount of displacement of the end portion 28a2 on the third surface 12c side in the first extraction region 28a of the first internal electrode 16a is calculated by the dimensional difference along the first direction y between the end portion 28a2 on the third surface 12c side of the first internal electrode 16a that is closest to the third surface 12c side of the first extraction region 28a of the multiple first internal electrodes 16a, and the end portion 28a2 on the third surface 12c side of the first internal electrode 16a that is furthest from the third surface 12c side of the first extraction region 28a of the first internal electrode 16a.

[0030] In the second extraction region 28b of the second internal electrode 16b, the displacement of the end portion 28b1 on the third surface 12c side of the second internal electrode 16b is greater than the displacement of the end portion 28b2 on the fourth surface 12d side of the second internal electrode 16b. The displacement of the end portion 28b1 on the third surface 12c side in the second extraction region 28b of the second internal electrode 16b is 2.7 μm or more and 25.0 μm or less. More preferably, it is 4.9 μm or more and 20.5 μm or less. On the other hand, the displacement of the end portion 28b2 on the fourth surface 12d side in the second extraction region 28b of the second internal electrode 16b is 1.0 μm or less.

[0031] Here, the amount of displacement in the first direction y of the end portion 28b1 on the third surface 12c side in the second extraction region 28b of the second internal electrode 16b is calculated by the dimensional difference along the first direction y between the end portion 28b1 on the third surface 12c side of the second internal electrode 16b that is closest to the third surface 12c and the end portion 28b1 on the third surface 12c side of the second internal electrode 16b that is furthest from the third surface 12c.

[0032] Furthermore, the amount of displacement of the end portion 28b2 on the fourth surface 12d side in the second extraction region 28b of the second internal electrode 16b is calculated by the dimensional difference along the first direction y between the end portion 28b2 on the fourth surface 12d side of the second internal electrode 16b that is closest to the fourth surface 12d side in the second extraction region 28b of a plurality of second internal electrodes 16b, and the end portion 28b2 on the fourth surface 12d side of the second internal electrode 16b that is furthest from the fourth surface 12d side in the second extraction region 28b of the second internal electrode 16b.

[0033] Within the laminate 12, the amount of displacement in the second direction z of the ends 26a1 and 26b1 of the first internal electrode 16a and the second internal electrode 16b on the fifth surface 12e side is greater than the amount of displacement in the second direction z of the ends 26a2 and 26b2 of the first internal electrode 16a and the second internal electrode 16b on the sixth surface 12f side. The amount of displacement in the second direction z of the ends 26a1 and 26b1 of the first internal electrode 16a and the second internal electrode 16b on the fifth surface 12e side is between 5.0 μm and 19.8 μm. On the other hand, the amount of displacement in the second direction z of the ends 26a2 and 26b2 of the first internal electrode 16a and the second internal electrode 16b on the sixth surface 12f side is within 1.0 μm.

[0034] Here, the amount of displacement in the second direction z of the ends 26a1 and 26b1 of the first internal electrode 16a and the second internal electrode 16b on the fifth surface 12e side is calculated by the dimensional difference along the second direction z between the ends 26a1 and 26b1 of the first internal electrode 16a and the second internal electrode 16b that are closest to the fifth surface 12e, and the ends 26a1 and 26b1 of the first internal electrode 16a and the second internal electrode 16b that are furthest from the fifth surface 12e.

[0035] Furthermore, the amount of displacement of the ends 26a2, 26a2 of the first internal electrode 16a and the second internal electrode 16b on the sixth surface 12f side is calculated by the dimensional difference along the second direction z between the ends 26a2, 26a2 of the first internal electrode 16a and the second internal electrode 16b that are closest to the sixth surface 12f side among the multiple ends 26a2, 26b2 of the first internal electrode 16a and the second internal electrode 16b that are furthest from the sixth surface 12f side, and the ends 26a2, 26b2 of the first internal electrode 16a and the second internal electrode 16b that are furthest from the sixth surface 12f side.

[0036] In this way, by making the amount of displacement in the second direction z of the ends 26a1 and 26b1 on the fifth surface 12e side of the first internal electrode 16a and the second internal electrode 16b relatively large, and setting the amount of displacement to 5.0 μm or more and 19.8 μm or less, electric field concentration can be made less likely to occur in the region where electric field concentration is likely to occur in the bottom electrode structure, thereby improving the reliability of the multilayer ceramic capacitor 10.

[0037] Within the laminate 12, the linear coverage within 10.0 μm from the end of the first internal electrode 16a on the third surface 12c side is preferably 85.0% or more and 97.0% or less. Furthermore, within the laminate 12, the linear coverage within 10.0 μm from the end of the second internal electrode 16b on the fourth surface 12d side is preferably 85.0% or more and 97.0% or less.

[0038] Within the laminate 12, it is preferable that the coverage of the first internal electrode 16a 10.0 μm inward in the second direction z from the end 26a1 on the fifth surface 12e side is 50.0% or more and 80.0% or less. Similarly, within the laminate 12, it is preferable that the coverage of the second internal electrode 16b 10.0 μm inward in the second direction z from the end 26b1 on the fifth surface 12e side is 50.0% or more and 80.0% or less. This smooths out the height difference from the end 26a1 on the fifth surface 12e side of the first internal electrode 16a to the gap between the first internal electrode 16a and the second internal electrode 16b, thereby suppressing structural defects.

[0039] Within the laminate 12, the line coverage within 10 μm from the end of the first internal electrode 16a on the fourth surface 12d side, which is opposite the second internal electrode 16b and the first direction y, is preferably 85.0% or more and 97.0% or less. Furthermore, within the laminate 12, the line coverage within 10.0 μm from the end of the second internal electrode 16b on the third surface 12c side, which is opposite the first internal electrode 16a and the first direction y, is preferably 85.0% or more and 97.0% or less.

[0040] This smooths out the height difference from the end of the first internal electrode 16a on the fourth surface 12d side to the end of the first internal electrode 16a and the second internal electrode 16b on the third surface 12c side, and from there to the effective part of the first capacitor, thereby suppressing structural defects.

[0041] The amount of displacement of each internal electrode 16 can be measured as follows. First, polishing is performed from the fifth surface 12e so that the area to be measured is exposed, exposing surfaces parallel to the stacking direction x and the first direction y. Then, the surface is treated by etching or other methods to remove any sagging of the internal electrodes 16 that occurred during polishing. After that, using a digital microscope (Keyence Corporation: VHX-5000), the amount of displacement along the first direction y of the ends on the third surface 12c side and the ends on the fourth surface 12d side of each internal electrode 16 can be measured in a field of view where 30 layers of internal electrodes 16 are visible.

[0042] Furthermore, polishing is performed from the third surface 12c or the fourth surface 12d so that the area to be measured is exposed, and surfaces parallel to the stacking direction x and the second direction z are exposed. After that, the internal electrodes 16 are treated by etching or other processes to remove any sagging caused by polishing. Then, using a digital microscope (Keyence Corporation: VHX-5000), the amount of displacement along the second direction z of the ends on the fifth surface 12e side and the ends on the sixth surface 12f side of each internal electrode 16 can be measured in a field of view where 30 layers of internal electrodes 16 are visible.

[0043] Each line coverage can be measured as follows. First, perform polishing from the fifth surface 12e so that the area to be measured is exposed, and expose a surface parallel to the stacking direction x and the first direction y. Then, process the surface by an etching process or the like to process the sagging of the internal electrode 16 during polishing. Then, it can be measured with a digital microscope (manufactured by Keyence Corporation: VHX-5000) in a field of view where 30 layers of the internal electrode 16 can be seen.

[0044] Also, perform polishing from the third surface 12c or the fourth surface 12d so that the area to be measured is exposed, and expose a surface parallel to the stacking direction x and the second direction z. Then, process the surface by an etching process or the like to process the sagging of the internal electrode 16 during polishing. Then, it can be measured with a digital microscope (manufactured by Keyence Corporation: VHX-5000) in a field of view where 30 layers of the internal electrode 16 can be seen.

[0045] The internal electrode 16 preferably has Mg-Ni segregation at the end portion facing the third surface 12c, the end portion facing the fourth surface 12d, and the end portion facing the sixth surface 12f. Thereby, since the pores at the end portions of the internal electrode 16 generated by shrinkage during sintering of the internal electrode 16 can be filled with the Mg-Ni segregation, the moisture resistance can be improved.

[0046] As the materials of the first internal electrode 16a and the second internal electrode 16b, for example, metals such as Ni, Cu, Ag, Pd, Au, Sn, and alloys such as Ag-Pd alloy containing one of these metals can be used. The first internal electrode 16a and the second internal electrode 16b may further contain dielectric particles of the same composition system as the ceramics contained in the dielectric layer 14. The thickness of each of the first internal electrode 16a and the second internal electrode 16b is preferably 0.1 μm or more and 2.0 μm or less.

[0047] (External electrode) The external electrode 30 has a first external electrode 30a and a second external electrode 30b.

[0048] The first external electrode 30a is provided on the fifth surface 12e and is disposed on the side of the third surface 12c. The first external electrode 30a is connected to the first lead-out region 28a of the first internal electrode 16a.

[0049] The first external electrode 30a is disposed on the fifth surface 12e and extends and is disposed in the stacking direction x connecting the first surface 12a and the second surface 12b and the first direction y connecting the third surface 12c and the fourth surface 12d. The first external electrode 30a is disposed with a length equivalent to the length in the stacking direction x connecting the first surface 12a and the second surface 12b of the laminate 12. Note that the length of the first external electrode 30a in the stacking direction x connecting the first surface 12a and the second surface 12b is not particularly limited and may be disposed so as to wrap around the first surface 12a and the second surface 12b.

[0050] The second external electrode 30b is provided on the fifth surface 12e and is disposed on the side of the fourth surface 12d. The second external electrode 30b is connected to the second lead-out region 28b of the second internal electrode 16b.

[0051] The second external electrode 30b is disposed on the fifth surface 12e and extends and is disposed in the stacking direction x connecting the first surface 12a and the second surface 12b and the first direction y connecting the third surface 12c and the fourth surface 12d. The second external electrode 30b is disposed with a length equivalent to the length in the stacking direction x connecting the first surface 12a and the second surface 12b of the laminate 12. Note that the length of the second external electrode 30b in the stacking direction x connecting the first surface 12a and the second surface 12b is not particularly limited and may be disposed so as to wrap around the first surface 12a and the second surface 12b.

[0052] It is preferable that the first external electrode 30a and the second external electrode 30b each have a base electrode layer and a plating layer in order from the laminate 12 side.

[0053] The external electrode 30 includes a base electrode layer containing a metal component and a glass component, and a plating layer formed on the surface of the base electrode layer.

[0054] Within the laminate 12, the first opposing region 26a and the second opposing region 26b face each other via the dielectric layer 14, resulting in the generation of electrical properties (e.g., capacitance). Therefore, capacitance can be obtained between the first external electrode 30a, to which the first internal electrode 16a is connected, and the second external electrode 30b, to which the second internal electrode 16b is connected. Thus, a multilayer ceramic capacitor 10 with such a structure functions as a capacitor.

[0055] The base electrode layer includes at least one selected from a baked layer, a conductive resin layer, and the like. In this embodiment, the base electrode layer is formed solely from a baked layer. However, an embodiment in which the base electrode layer is formed from a conductive resin layer will also be described.

[0056] The base electrode layer includes at least one selected from a baked layer, a resin layer, a thin film layer, etc., but here we will describe a base electrode layer formed from a baked layer. The baked layer includes glass and metal. The metal of the baked layer includes at least one selected from, for example, Cu, Ni, Ag, Pd, Ag-Pd alloy, Au, etc. The baked layer may consist of multiple layers. The baked layer is formed by applying a conductive paste containing glass and metal to the laminate 12 and baking it. The baked layer may be baked simultaneously with the dielectric layer 14 and the internal electrode 16, or it may be baked after the dielectric layer 14 and the internal electrode 16 have been baked. The thickness of the thickest part of the baked layer is preferably 10 μm or more and 50 μm or less.

[0057] A resin layer containing conductive particles and a thermosetting resin may be formed on the surface of the baking layer. Alternatively, the resin layer may be formed directly on the laminate 12 without forming the baking layer. Furthermore, there may be multiple resin layers. The thickness of the thickest part of the resin layer is preferably 10 μm to 150 μm.

[0058] Furthermore, the thin film layer is formed by a thin film formation method such as sputtering or vapor deposition, and is a layer of 1 μm or less in thickness on which metal particles are deposited.

[0059] Furthermore, the plating layer preferably includes plating of one metal selected from, for example, Cu, Ni, Sn, Pb, Au, Ag, Pd, Bi, and Zn, or an alloy containing such metal. The plating layer may be formed by multiple layers. The plating layer preferably has a two-layer structure including a first plating layer provided on the surface of the baked layer and a second plating layer provided on the surface of the first plating layer.

[0060] It is preferable to use Ni for the first plating layer. If the internal electrode 16 contains Ni, it is preferable to use Cu, which has good bonding properties with Ni, as the first plating layer.

[0061] Furthermore, the second plating layer may be formed from multiple layers, preferably a two-layer structure of Ni plating and Sn plating. The Ni plating layer is used to prevent the underlying electrode layer from being corroded by solder when mounting the multilayer ceramic capacitor. The Sn plating layer is used to improve the wettability of the solder when mounting the multilayer ceramic capacitor, thereby facilitating mounting. The second plating layer is formed as needed, and the external electrode 30 may be a plating layer directly provided on the laminate 12 and directly connected to the internal electrode 16, i.e., composed of the first plating layer. However, a catalyst may be provided on the laminate 12 as a pretreatment. The second plating layer may also be provided as the outermost layer of the plating layers, or other plating layers may be provided on the surface of the second plating layer.

[0062] The thickness of each plating layer is preferably 1 μm to 10 μm. Furthermore, the plating layer is preferably free of glass. In addition, the metal content per unit volume of the plating layer is preferably 99% by volume or more. The plating layer is also columnar, having grown in grain along the thickness direction.

[0063] Furthermore, the external electrode 30 may be formed using only the plating layer without providing a base electrode layer. Although not shown in the figures, a structure in which a plating layer is provided without a base electrode layer will be described below.

[0064] The first external electrode 30a and the second external electrode 30b may each have no underlying electrode layer, and the plating layer may be formed directly on the surface of the laminate 12. That is, the multilayer ceramic capacitor 10 may have a structure that includes a plating layer electrically connected to the first internal electrode 16a or the second internal electrode 16b. In such a case, the plating layer may be formed after a catalyst is placed on the surface of the laminate 12 as a pretreatment.

[0065] The lengthwise dimension L of the multilayer ceramic capacitor 10 is defined as dimension L, the thicknesswise dimension T of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 30a, and the second external electrode 30b is defined as dimension T, and the widthwise dimension W of the multilayer ceramic capacitor 10 including the laminate 12, the first external electrode 30a, and the second external electrode 30b is defined as dimension W. The dimensions of the laminate 12 are not particularly limited, but it is preferable, however, that the L dimension in the first direction y is 0.38 mm or more and 3.50 mm or less, the W dimension in the second direction z is 0.18 mm or more and 2.80 mm or less, and the T dimension in the lamination direction x is 0.18 mm or more and 2.80 mm or less. The dimensions of the multilayer ceramic capacitor 10 can be measured using a microscope.

[0066] In the multilayer ceramic capacitor 10 shown in Figure 1, the amount of displacement in the second direction z of the ends 26a1 and 26b1 on the fifth surface 12e side of the first internal electrode 16a and the second internal electrode 16b is made relatively large, to 5.0 μm or more and 19.8 μm or less. This makes it less likely for electric field concentration to occur in the region where electric field concentration is likely to occur in the bottom electrode structure, thereby improving the reliability of the multilayer ceramic capacitor 10.

[0067] 2. Manufacturing Method of Multilayer Ceramic Capacitors Next, the manufacturing method of this multilayer ceramic capacitor will be described. The manufacturing method of the multilayer ceramic capacitor 10 will be described below.

[0068] First, prepare the ceramic green sheet and the conductive paste for the internal electrodes. The ceramic green sheet and the conductive paste for the internal electrodes contain a binder (e.g., a known organic binder) and a solvent (e.g., an organic solvent).

[0069] Next, a conductive paste for the internal electrodes is printed onto the ceramic green sheet in a predetermined pattern, for example, by gravure printing, to form the internal electrode pattern. In this way, an inner layer ceramic green sheet with the internal electrode pattern printed on it is produced. An outer layer ceramic green sheet without the internal electrode pattern printed on it is also produced.

[0070] Then, a predetermined number of ceramic green sheets for the outer layer, which do not have an internal electrode pattern printed on them, are stacked, and ceramic green sheets for the inner layer, which have an internal electrode pattern printed on them, are sequentially stacked on the surface of the inner layer, and a predetermined number of ceramic green sheets for the outer layer are stacked on the surface of the inner layer, thereby creating a laminated sheet.

[0071] The amount of displacement at this time is adjusted as needed to achieve the desired amount of displacement when printing the internal electrode pattern or when laminating the ceramic green sheet for the inner layer.

[0072] Next, the laminated sheets are pressed in the lamination direction using means such as a hydrostatic press to produce a laminated block.

[0073] Next, laminated chips are produced by cutting the laminated block to a predetermined size. After cutting, the internal electrode patterns are exposed on the third, fourth, and sixth surfaces of the laminated chip. Then, in order to form the third, fourth, and sixth surfaces of the laminated body after firing, side gaps are formed on the third, fourth, and sixth surfaces of the laminated chip so as to cover the exposed internal electrode patterns. This creates a region between the third, fourth, and sixth surfaces of the laminated chip and the internal electrode patterns. Afterwards, rounding may be formed on the corners and edges of the laminated chip where the side gap sheets have been formed by barrel polishing or the like.

[0074] Next, the laminated chips are fired to create the laminated body. The firing temperature depends on the ceramic and internal electrode materials, but it is preferably between 900°C and 1300°C.

[0075] Next, the external electrode 30 is formed. At this time, the first extraction region 28a of the first internal electrode 16a is exposed from the fifth surface 12e of the laminate 12. Then, the base electrode layer for the first external electrode 30a is formed so as to cover the first extraction region 28a of the first internal electrode 16a that is exposed from the fifth surface 12e of the laminate 12. Also, the second extraction region 28b of the second internal electrode 16b is exposed from the fifth surface 12e of the laminate 12. Then, the base electrode layer for the second external electrode 30b is formed so as to cover the second extraction region 28b of the second internal electrode 16b that is exposed from the fifth surface 12e of the laminate 12.

[0076] To form the base electrode layer for the first external electrode 30a, for example, conductive paste for external electrodes is applied to the exposed portion of the first extraction region 28a of the first internal electrode 16a, which is exposed from the fifth surface 12e of the laminate 12, and then baked. Similarly, to form the base electrode layer for the second external electrode 30b, for example, conductive paste for external electrodes is applied to the exposed portion of the second extraction region 28b of the second internal electrode 16b, which is exposed from the fifth surface 12e of the laminate 12, and then baked. At this time, the baking temperature is preferably 700°C or higher and 900°C or lower. If necessary, one or more plating films are formed on the surface of the base electrode layer to form the external electrode 30.

[0077] Furthermore, in order to form the base electrode layer of the first external electrode 30a, for example, plating may be applied to the exposed portion of the first draw-out region 28a of the first internal electrode 16a that is exposed from the fifth surface 12e of the laminate 12. Similarly, in order to form the base electrode layer of the second external electrode 30b, for example, plating may be applied to the exposed portion of the second draw-out region 28b of the second internal electrode 16b that is exposed from the fifth surface 12e of the laminate 12. When performing the plating process, either electrolytic plating or electroless plating may be used, but electroless plating has the disadvantage of requiring pretreatment with a catalyst or the like to improve the plating deposition rate, which complicates the process. Therefore, electrolytic plating is usually preferred. As for the plating method, barrel plating is preferred. When forming a surface conductor, the surface conductor pattern may be printed on the surface of the outermost layer ceramic green sheet in advance and fired simultaneously with the laminate, or the surface conductor may be printed on the main surface of the laminate after firing and then baked. Furthermore, if necessary, one or more plating films are formed on the surface of the base electrode layer to form the external electrode 30.

[0078] As described above, the multilayer ceramic capacitor 10 shown in Figure 1 is manufactured.

[0079] The effects of the multilayer ceramic capacitors obtained in the manner described above will also become clear from the following experimental examples.

[0080] 3. Experimental Examples Below, we will describe experimental examples conducted by the inventors to confirm the effects of this invention.

[0081] Next, in order to confirm the effect of the multilayer ceramic capacitor according to the present invention as described above, a multilayer ceramic capacitor was manufactured as a sample for the experiment, and an experiment was conducted to measure the dielectric breakdown voltage (BDV) of the multilayer ceramic capacitor.

[0082] (1) Specifications of the multilayer ceramic capacitors prepared as samples for the experimental example The specifications of the multilayer ceramic capacitors prepared for the above experiment are as follows: Dimensions of the multilayer ceramic capacitor in the first direction: 1.10 mm ± 10% Dimensions of the multilayer ceramic capacitor in the second direction: 0.60 mm ± 10% Dimensions of the multilayer ceramic capacitor in the stacking direction: 0.60 mm ± 10% Main component of the dielectric layer: BaTiO3 Material of the internal electrode: Ni Structure of the external electrode: Three-layer structure with Cu plating + Ni plating + Sn plating

[0083] (2) Method for measuring the displacement of the fifth face side of the first and second internal electrodes The dielectric breakdown voltage (BDV) was measured by varying the displacement of the fifth face side of the first and second internal electrodes. Each measured displacement is described below. For each sample from sample number 1-1 to sample number 1-5, the displacement of the fifth face side of the first and second internal electrodes was defined as the displacement in the second direction z of the end of the fifth face side of the first and second internal electrodes, when the displacement of the fourth face side of the first lead electrode of the first internal electrode and the displacement of the third face side of the second lead electrode of the second internal electrode were set to 2.7 μm or more and 25.0 μm or less. More specifically, the amount of displacement in the second direction z of the fifth-face side ends of the first and second internal electrodes was calculated by centering the displacement at half the central part of the first direction y, and observing 50 layers of the internal electrodes, using the difference in the second direction z between the fifth-face side end of the first internal electrode closest to the fifth surface and the fifth-face side end of the first internal electrode furthest from the fifth surface. The results of the displacement for each sample are shown in Table 1. The displacement amounts of the fifth-face side of the first and second internal electrodes were varied as shown in Table 1, and the sixth-face side ends of the first and second internal electrodes were adjusted to be ±5% of the displacement amounts of the fifth-face side of the first and second internal electrodes.

[0084] (3) Method of dielectric breakdown test A DC voltage was applied between the first and second external electrodes of the multilayer ceramic capacitor of each sample at a boosting rate of 50 V / sec, and the dielectric breakdown voltage when the multilayer ceramic capacitor of the sample was short-circuited was measured.

[0085] (4) Results The experimental results for each of the above-mentioned deviation amounts, including the measurement results of the dielectric breakdown voltage, are shown in Table 1.

[0086]

[0087] Table 1 shows that the dielectric breakdown voltage increases as the amount of displacement increases. Furthermore, Table 1 shows that when the displacement of the fifth surface side of the first and second internal electrodes was 5.0 μm or more, a dielectric breakdown voltage (BDV) of 55 V or more was obtained. On the other hand, Table 1 shows that in sample number 1-1, the displacement of the fifth surface side of the first and second internal electrodes in the second direction z was relatively small at 2.9 μm, resulting in a dielectric breakdown voltage (BDV) of less than 50 V. Additionally, Table 1 shows that in sample number 1-5, although the dielectric breakdown voltage (BDV) was relatively high, the large displacement of the fifth surface side of the first and second internal electrodes made it difficult to obtain the desired capacitance.

[0088] From these results, it was confirmed that the greater the displacement of the fifth surface side of the first and second internal electrodes, the higher the dielectric breakdown voltage (BDV) becomes.

[0089] As described above, embodiments of the present invention are disclosed in the above description, but the present invention is not limited thereto. That is, without departing from the scope of the technical idea and objectives of the present invention, various modifications can be made to the embodiments described above in terms of mechanism, shape, material, quantity, position or arrangement, etc., and these are included in the present invention.

[0090] 10 Multilayer ceramic capacitor 12 Laminate 12a First surface 12b Second surface 12c Third surface 12d Fourth surface 12e Fifth surface 12f Sixth surface 14 Dielectric layer 16 Internal electrode 16a First internal electrode 16b Second internal electrode 18 Inner layer 18E Opposing parts 20a, 20b Outer layer 22a, 22b Outer layer on the first direction side 24a, 24b Outer layer on the second direction side 26a First opposing region 26b Second opposing region 28a First extraction region 28b Second extraction region 30 External electrode 30a First external electrode 30b Second external electrode

Claims

1. A multilayer ceramic capacitor comprising: a laminate having a first surface and a second surface facing each other in the stacking direction, a third surface and a fourth surface facing each other in a first direction perpendicular to the stacking direction, and a fifth surface and a sixth surface facing each other in a second direction perpendicular to the stacking direction and the first direction; a first external electrode disposed on the fifth surface; and a second external electrode disposed on the fifth surface, wherein the laminate has a first internal electrode with one end exposed on the fifth surface, and a second internal electrode with one end exposed on the fifth surface, and within the laminate, the amount of displacement of the ends of the first internal electrode and the second internal electrode on the fifth surface side is greater than the amount of displacement of the ends of the first internal electrode and the second internal electrode on the sixth surface side, and is 5.0 μm or more and 19.8 μm or less.

2. The multilayer ceramic capacitor according to claim 1, wherein, within the laminate, the line coverage within 10.0 μm from the end of the third surface side of the first internal electrode is 85.0% or more and 97.0% or less.

3. The multilayer ceramic capacitor according to claim 2, wherein, within the laminate, the line coverage within 10.0 μm from the end of the fourth surface side of the second internal electrode is 85.0% or more and 97.0% or less.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein, within the laminate, the line coverage within 10.0 μm from the end of at least one of the first internal electrode and the second internal electrode on the fifth surface side is 50.0% or more and 80.0% or less.

5. The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein, within the laminate, the line coverage within 10.0 μm from the end of the fourth surface side of the first internal electrode facing the second internal electrode in the first direction is 85.0% or more and 97.0% or less.

6. The multilayer ceramic capacitor according to claim 5, wherein, within the laminate, the line coverage within 10.0 μm from the end of the third surface side of the second internal electrode, which is opposite the first internal electrode in the first direction, is 85.0% or more and 97.0% or less.

7. The multilayer ceramic capacitor according to any one of claims 1 to 6, wherein the first internal electrode includes a first opposing region which is a region facing the second internal electrode in the stacking direction, and a first lead-out region disposed between the first opposing region and the fifth surface, and the second internal electrode includes a second opposing region which is a region facing the first internal electrode in the stacking direction, and a second lead-out region disposed between the second opposing region and the fifth surface, and in the first lead-out region, the amount of displacement of the end of the first internal electrode on the fourth surface side is greater than the amount of displacement of the end of the first internal electrode on the third surface side, and is 2.7 μm or more and 25.0 μm or less.

8. In the second lead-out region, the amount of displacement of the end of the third surface side of the second internal electrode is greater than the amount of displacement of the end of the fourth surface side of the second internal electrode, and is 4.9 μm or more and 20.5 μm or less, according to claim 7.

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