Capacitor

Abstract

This capacitor comprises: a first capacitance part; a second capacitance part overlapping the first capacitance part; a connection conductor layer; and an insulating separation layer. A first dielectric layer of the first capacitance part is disposed across a main surface of a first silicon layer and an inside surface of each of a plurality of through trenches. A first conductor layer is disposed on the surface of the first dielectric layer. A second dielectric layer of the second capacitance part is disposed across a main surface of a second silicon layer and an inner surface of each of the plurality of trenches. A second conductor layer is disposed on the surface of the second dielectric layer. In the capacitor, the first silicon layer and the second silicon layer are electrically connected. The first conductor layer and the second conductor layer are connected by the connection conductor layer.

Description

Capacitor

[0001] This disclosure relates to a capacitor, and more particularly to a capacitor including a trench.

[0002] The capacitor disclosed in Patent Document 1 comprises a silicon substrate, a dielectric film, and a conductive layer. The silicon substrate has a first main surface and a second main surface facing each other, and a plurality of trenches are formed on the first main surface side. The dielectric film is formed along the bottom surface and inner surface of the plurality of trenches.

[0003] International Publication No. 2019 / 021817

[0004] A capacitor according to one aspect of the present disclosure comprises a first capacitance portion, a second capacitance portion, a connecting conductor layer, and an insulating isolation layer. The second capacitance portion overlaps the first capacitance portion. The connecting conductor layer is disposed between the first capacitance portion and the second capacitance portion. The first capacitance portion includes a first silicon layer, a first dielectric layer, and a first conductor layer. The first silicon layer has a plurality of through trenches. The first dielectric layer is disposed across the main surface of the first silicon layer and the inner surfaces of each of the plurality of through trenches. The first conductor layer is disposed on the surface of the first dielectric layer. The first conductor layer has a first columnar portion located inside each of the plurality of through trenches. The second capacitance portion includes a second silicon layer, a second dielectric layer, and a second conductor layer. The second silicon layer has a plurality of trenches. The second silicon layer overlaps the first silicon layer in the thickness direction of the first silicon layer. The second dielectric layer is arranged across the main surface of the second silicon layer and the inner surface of each of the plurality of trenches. The second conductive layer is arranged on the surface of the second dielectric layer. The second conductive layer has a second columnar portion located inside each of the plurality of trenches. The first silicon layer and the second silicon layer are electrically connected. The first conductive layer and the second conductive layer are connected by the connecting conductive layer. The insulating isolation layer is interposed between the first silicon layer and the connecting conductive layer, and between the second silicon layer and the connecting conductive layer.

[0005] A capacitor according to one aspect of the present disclosure comprises a first capacitance portion, a second capacitance portion, a first connecting conductor layer, a second connecting conductor layer, and an insulating isolation layer. The second capacitance portion overlaps the first capacitance portion. The first connecting conductor layer is disposed between the first capacitance portion and the second capacitance portion. The first capacitance portion includes a first silicon layer, a first metal layer, a first dielectric layer, and a first conductor layer. The first silicon layer has a plurality of through trenches. The first metal layer is disposed across the main surface of the first silicon layer and the inner surfaces of each of the plurality of through trenches. The first dielectric layer is disposed on the surface of the first metal layer. The first conductor layer is disposed on the surface of the first dielectric layer. The first conductor layer has a first columnar portion located inside each of the plurality of through trenches. The second capacitance portion includes a second silicon layer, a second metal layer, a second dielectric layer, and a second conductive layer. The second silicon layer has a plurality of trenches. The second silicon layer overlaps the first silicon layer in the thickness direction of the first silicon layer. The second metal layer is arranged across the main surface of the second silicon layer and the inner surfaces of each of the plurality of trenches. The second dielectric layer is arranged on the surface of the second metal layer. The second conductive layer is arranged on the surface of the second dielectric layer. The second conductive layer has a second columnar portion located inside each of the plurality of trenches. The first silicon layer and the second silicon layer are electrically connected. The first metal layer and the second metal layer are connected by the first connecting conductive layer. The first conductive layer and the second conductive layer are connected by the second connecting conductive layer. The insulating separation layer is interposed between the second connecting conductor layer and the first connecting conductor layer, and between the second connecting conductor layer and the second metal layer.

[0006] According to the capacitor of the above-described aspect of this disclosure, it is possible to increase the capacity while improving reliability.

[0007] Figure 1 is a schematic cross-sectional view of a capacitor according to Embodiment 1. Figure 2 is a plan view of a capacitor according to Embodiment 1. Figure 3 is a cross-sectional view illustrating the manufacturing method of a capacitor according to Embodiment 1. Figure 4 is a schematic cross-sectional view of a modified example of a capacitor according to Embodiment 1. Figure 5 is a schematic cross-sectional view of a capacitor according to Embodiment 2. Figure 6 is a plan view of a capacitor according to Embodiment 2.

[0008] In capacitors, increasing the trench depth can increase capacitance, and using metal as the conductive layer material can reduce ESR (Equivalent Series Resistance) compared to using polysilicon. However, this can lead to decreased mechanical strength and reduced reliability. Furthermore, increasing the trench depth in capacitors can reduce reliability during thermal cycling due to the difference in thermal expansion coefficients between silicon and the conductor (metal).

[0009] This disclosure provides a capacitor that can increase capacity while improving reliability.

[0010] The embodiments will be described below with reference to the drawings. The drawings referenced in the following embodiments are schematic, and the size and thickness of the components shown in the drawings do not necessarily reflect the actual dimensions, nor do the size ratios and thickness ratios between components necessarily reflect the actual dimensional ratios.

[0011] (Embodiment 1) (1) Capacitor Hereinafter, the capacitor 100 according to Embodiment 1 will be described with reference to Figures 1 and 2. Figure 1 is a cross-sectional view taken along the line X-X in Figure 2.

[0012] The capacitor 100 according to Embodiment 1 comprises a first capacitance portion 1, a second capacitance portion 2, a connecting conductor layer 3, and an insulating isolation layer 5. The second capacitance portion 2 overlaps the first capacitance portion 1. The connecting conductor layer 3 is disposed between the first capacitance portion 1 and the second capacitance portion 2. The first capacitance portion 1 includes a first silicon layer 10, a first dielectric layer 13, and a first conductor layer 14. The first silicon layer 10 has a plurality of through trenches 11. The first dielectric layer 13 is disposed across the main surface 101 of the first silicon layer 10 and the inner surface 110 of each of the plurality of through trenches 11. The first conductor layer 14 is disposed on the surface 131 of the first dielectric layer 13. The first conductor layer 14 has a first columnar portion 15 located inside each of the plurality of through trenches 11. The second capacitance section 2 includes a second silicon layer 20, a second dielectric layer 23, and a second conductive layer 24. The second silicon layer 20 has a plurality of trenches 21. The second silicon layer 20 overlaps the first silicon layer 10 in the thickness direction D1. The second dielectric layer 23 is arranged across the main surface 201 of the second silicon layer 20 and the inner surface 210 of each of the plurality of trenches 21. The second conductive layer 24 is arranged on the surface 231 of the second dielectric layer 23. The second conductive layer 24 has a second columnar portion 25 located inside each of the plurality of trenches 21. The first silicon layer 10 and the second silicon layer 20 are electrically connected. The first conductive layer 14 and the second conductive layer 24 are connected by a connecting conductive layer 3. The insulating isolation layer 5 is interposed between the first silicon layer 10 and the connecting conductor layer 3, and also between the second silicon layer 20 and the connecting conductor layer 3.

[0013] The above configuration makes it possible to increase capacity while improving reliability.

[0014] Furthermore, the capacitor 100 according to Embodiment 1 further comprises a first external connection electrode 6 and a second external connection electrode 7.

[0015] (2) Components of the Capacitor Hereinafter, each component of the capacitor 100 according to Embodiment 1 will be described with reference to Figures 1 and 2.

[0016] (2.1) First Capacitance Section As shown in Figure 1, the first capacitance section 1 includes a first silicon layer 10, a first dielectric layer 13, and a first conductive layer 14.

[0017] The first silicon layer 10 is a p-type silicon layer. The first silicon layer 10 contains, for example, boron as an impurity. The first silicon layer 10 may also contain indium instead of boron as an impurity.

[0018] The carrier concentration in the first silicon layer 10 is, for example, 1 × 10 １６ cm －３ The above 1 x 10 １９ cm －３ The following applies. Note that the first silicon layer 10 is not limited to a p-type silicon layer, but may also be an n-type silicon layer.

[0019] In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the first capacitance portion 1 is rectangular. The thickness of the first silicon layer 10 is, for example, 5 μm or more and 100 μm or less.

[0020] The multiple through trenches 11 in the first silicon layer 10 are through holes that penetrate the first silicon layer 10 in the thickness direction D1 of the first silicon layer 10. Each of the multiple through trenches 11 is formed along the thickness direction D1 of the first silicon layer 10. In a plan view from the thickness direction D1 of the first silicon layer 10, the opening shape of each of the multiple through trenches 11 is, for example, circular. The opening width of each of the multiple through trenches 11 on the main surface 101 of the first silicon layer 10 is, for example, 0.1 μm or more and 10 μm or less. The opening shape of each of the multiple through trenches 11 is not limited to a circular shape, but may be, for example, square. The length of each of the multiple through trenches 11 is greater than the opening width of the through trench 11.

[0021] In the first capacitance section 1, the region A1 containing the multiple through trenches 11 is rectangular in shape when viewed from the thickness direction D1 of the first silicon layer 10. Region A1 is not limited to a rectangular shape when viewed from the thickness direction D1 of the first silicon layer 10; for example, it may be a circular region or a polygonal region other than a rectangle.

[0022] The first dielectric layer 13 is arranged across the main surface 101 of the first silicon layer 10 and the inner surface 110 of each of the multiple through trenches 11. The first dielectric layer 13 has a shape that conforms to the main surface 101 of the first silicon layer 10 and the inner surface 110 of each of the multiple through trenches 11.

[0023] The thickness of the first dielectric layer 13 is, for example, 5 nm to 500 nm. The upper limit of the thickness of the first dielectric layer 13 is limited by the opening width of the through trench 11, the thickness of the first dielectric layer 13 within the through trench 11, and so on.

[0024] The first dielectric layer 13 is a multilayer film formed by stacking multiple dielectric films. More specifically, the first dielectric layer 13 includes, for example, a first dielectric film (e.g., a first silicon oxide film), a second dielectric film (e.g., a silicon nitride film) stacked on the first dielectric film, and a third dielectric film (e.g., a second silicon oxide film) stacked on the second dielectric film. The materials of the first silicon oxide film and the second silicon oxide film are, for example, silicon dioxide (SiO₂). ２ ) The composition of the first silicon oxide film and the second silicon oxide film is strictly SiO ２ It is not mandatory that the first silicon oxide film be a multilayer film. Furthermore, the composition of the first silicon oxide film and the composition of the second silicon oxide film may be different. The first dielectric layer 13 is not limited to a multilayer film, but may be a single dielectric film. When the first dielectric layer 13 is a single-layer dielectric film, the material of the dielectric film is, for example, silicon oxide. The material of the dielectric film is not limited to silicon oxide, but may be, for example, titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, tungsten oxide, niobium oxide, tantalum oxide, or aluminum oxide.

[0025] The first conductive layer 14 is located on the surface 131 of the first dielectric layer 13. More specifically, the first conductive layer 14 is laminated on the surface 131 of the first dielectric layer 13. The first conductive layer 14 has first columnar portions 15 located inside each of the plurality of through trenches 11. The first conductive layer 14 also includes layered portions 16 that connect the plurality of first columnar portions 15.

[0026] The first conductor layer 14 is, for example, a metal electrode layer. The material of the metal electrode layer includes, for example, at least one selected from the group consisting of copper, ruthenium, titanium, tantalum, tungsten, and aluminum. More specifically, the material of the metal electrode layer is copper, ruthenium, titanium, tantalum, tungsten, aluminum, or an alloy mainly composed of any of these metals, etc.

[0027] The thickness of the layered portion 16 of the first conductor layer 14 is thinner than the thickness of the first silicon layer 10. The thickness of the layered portion 16 of the first conductor layer 14 is, for example, larger than a value that is half of the opening width of each of the plurality of through trenches 11.

[0028] (2.2) Second capacitor portion As shown in FIG. 1, the second capacitor portion 2 includes a second silicon layer 20, a second dielectric layer 23, and a second conductor layer 24.

[0029] The second silicon layer 20 is a p-type silicon layer. The second silicon layer 20 contains, for example, boron as an impurity. The second silicon layer 20 may contain indium instead of boron as an impurity.

[0030] The carrier concentration of the second silicon layer 20 is, for example, 1×10 １６ cm －３ or more and 1×10 １９ cm －３ or less.

[0031] In Embodiment 1, the material of the second silicon layer 20 is the same as the material of the first silicon layer 10. "The material of the second silicon layer 20 is the same as the material of the first silicon layer 10" means that the silicon, which is the main component of the second silicon layer 20, is the same as the silicon, which is the main component of the first silicon layer 10, and the impurities contained in the second silicon layer 20 (e.g., boron or indium) are the same as the impurities contained in the first silicon layer 10 (e.g., boron or indium). In Embodiment 1, the carrier concentration of the second silicon layer 20 is the same as the carrier concentration of the first silicon layer 10. "The carrier concentration of the second silicon layer 20 is the same as the carrier concentration of the first silicon layer 10" means that the carrier concentration of the second silicon layer 20 is not limited to the case where it perfectly matches the carrier concentration of the first silicon layer 10, but rather it is sufficient if the carrier concentration of the second silicon layer 20 is within the range of 90% to 110% of the carrier concentration of the first silicon layer 10.

[0032] Furthermore, if the first silicon layer 10 is an n-type silicon layer, then the second silicon layer 20 is also an n-type silicon layer.

[0033] In a plan view from the thickness direction D1 of the second silicon layer 20, the outer edge of the second capacitance portion 2 is rectangular. The thickness of the second silicon layer 20 is, for example, 10 μm or more and 500 μm or less. The thickness direction of the second silicon layer 20 is parallel to the thickness direction D1 of the first silicon layer 10.

[0034] Multiple trenches 21 are formed on the main surface 201 of the second silicon layer 20. A portion of the main surface 201 of the second silicon layer 20 faces the first silicon layer 10. Each of the multiple trenches 21 is a hole whose depth in the thickness direction D1 of the first silicon layer 10 from the main surface 201 of the second silicon layer 20 is longer than the opening width of the trench 21 on the main surface 201 of the second silicon layer 20. The depth of the multiple trenches 21 is less than the thickness of the second silicon layer 20. The opening width of each of the multiple trenches 21 on the main surface 201 of the second silicon layer 20 is, for example, 0.1 μm or more and 10 μm or less. The depth of the multiple trenches 21 in the thickness direction D1 of the first silicon layer 10 is, for example, 5 μm or more and 100 μm or less. The multiple trenches 21 do not penetrate the second silicon layer 20.

[0035] In Embodiment 1, in the thickness direction D1 of the first silicon layer 10, the plurality of trenches 21 overlap the plurality of through trenches 11. The plurality of trenches 21 correspond one-to-one with the plurality of through trenches 11, and each of the plurality of trenches 21 overlaps the corresponding through trench 11.

[0036] The second dielectric layer 23 is disposed across the main surface 201 of the second silicon layer 20 and the inner surface 210 of each of the plurality of trenches 21. The second dielectric layer 23 has a shape along the main surface 201 of the second silicon layer 20 and the inner surface 210 of each of the plurality of trenches 21.

[0037] The thickness of the second dielectric layer 23 is, for example, 5 nm or more and 500 nm or less. The upper limit of the thickness of the second dielectric layer 23 is limited by the opening width of the trench 21, the thickness of the second dielectric layer 23 in the trench 21, and the like.

[0038] The second dielectric layer 23 is a multilayer film formed by laminating a plurality of dielectric films. More specifically, the second dielectric layer 23 includes, for example, a fourth dielectric film (for example, a third silicon oxide film), a fifth dielectric film (for example, a silicon nitride film) laminated on the fourth dielectric film, and a sixth dielectric film (for example, a fourth silicon oxide film) laminated on the fifth dielectric film. The material of each of the third silicon oxide film and the fourth silicon oxide film is, for example, silicon dioxide (SiO ２ ). It is not essential that the composition of each of the third silicon oxide film and the fourth silicon oxide film be exactly SiO ２ . Also, the composition of the third silicon oxide film and the composition of the fourth silicon oxide film may be different. The second dielectric layer 23 is not limited to a multilayer film and may be a single dielectric film. When the second dielectric layer 23 is a single dielectric film, the material of the dielectric film is, for example, silicon oxide. The material of the dielectric film is not limited to silicon oxide and may be, for example, titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, tungsten oxide, niobium oxide, tantalum oxide, or aluminum oxide.

[0039] The second conductive layer 24 is located on the surface 231 of the second dielectric layer 23. More specifically, the second conductive layer 24 is laminated on the surface 231 of the second dielectric layer 23. The second conductive layer 24 has second columnar portions 25 located inside each of the plurality of trenches 21. The second conductive layer 24 also includes layered portions 26 connecting the plurality of second columnar portions 25.

[0040] The second conductive layer 24 is, for example, a metal electrode layer. The material of the metal electrode layer includes, for example, at least one selected from the group consisting of copper, ruthenium, titanium, tantalum, tungsten, and aluminum. More specifically, the material of the metal electrode layer is copper, ruthenium, titanium, tantalum, tungsten, aluminum, or an alloy mainly composed of any of these metals.

[0041] The thickness of the layered portion 26 of the second conductive layer 24 is thinner than the thickness of the second silicon layer 20. The thickness of the layered portion 26 of the second conductive layer 24 is, for example, greater than half the opening width of each of the multiple trenches 21.

[0042] In Embodiment 1, the material of the second conductive layer 24 is the same as the material of the first conductive layer 14, but it may be different from the material of the first conductive layer 14.

[0043] (2.3) Connecting Conductive Layer As shown in Figure 1, the connecting conductive layer 3 is positioned between the first capacitance portion 1 and the second capacitance portion 2 in the thickness direction D1 of the first silicon layer 10.

[0044] The connecting conductive layer 3 is located between the first silicon layer 10 and the second silicon layer 20 and closes off a plurality of through trenches 11. The connecting conductive layer 3 is interposed between a plurality of first columnar portions 15 of the first conductive layer 14 and the layered portions 26 of the second conductive layer 24. The connecting conductive layer 3 connects the first conductive layer 14 and the second conductive layer 24.

[0045] The material of the connecting conductor layer 3 includes, for example, at least one selected from the group consisting of copper, ruthenium, titanium, tantalum, tungsten, and aluminum. More specifically, the material of the connecting conductor layer 3 is copper, ruthenium, titanium, tantalum, tungsten, aluminum, or an alloy mainly composed of any of these metals.

[0046] In a plan view from the thickness direction D1 of the first silicon layer 10, the connecting conductor layer 3 is smaller than the first silicon layer 10. In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the connecting conductor layer 3 is rectangular, but it may have a shape other than rectangular. In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the connecting conductor layer 3 is located inside the outer edge of the first silicon layer 10.

[0047] The thickness of the connecting conductor layer 3 is thinner than the thickness of the first silicon layer 10. The thickness of the connecting conductor layer 3 is, for example, greater than half the opening width of each of the multiple through-trenches 11.

[0048] In Embodiment 1, the material of the connecting conductor layer 3 is the same as the material of the first conductor layer 14 and the second conductor layer 24, but it may be different from the material of the first conductor layer 14 and the second conductor layer 24.

[0049] (2.4) Insulating Separation Layer As shown in Figure 1, the insulating separation layer 5 is interposed between the first silicon layer 10 and the connecting conductor layer 3, and between the second silicon layer 20 and the connecting conductor layer 3. The insulating separation layer 5 has electrical insulating properties. The insulating separation layer 5 electrically isolates the first silicon layer 10 from the connecting conductor layer 3, and electrically isolates the second silicon layer 20 from the connecting conductor layer 3. In Embodiment 1, the insulating separation layer 5 electrically isolates the first silicon layer 10 from the first conductor layer 14, and the insulating separation layer 5 electrically isolates the second silicon layer 20 from the second conductor layer 24.

[0050] In a plan view from the thickness direction D1 of the first silicon layer 10, the insulating separation layer 5 surrounds the connecting conductor layer 3 around its entire circumference. In a plan view from the thickness direction D1 of the first silicon layer 10, the insulating separation layer 5 is, for example, rectangular in shape.

[0051] The insulating isolation layer 5 is, for example, a multilayer film formed by stacking multiple dielectric films. More specifically, the insulating isolation layer 5 includes, for example, a fourth dielectric film (e.g., a silicon oxide film), a fifth dielectric film (e.g., a silicon nitride film) stacked on the fourth dielectric film, and a sixth dielectric film (e.g., a silicon oxide film) stacked on the fifth dielectric film. The material of each silicon oxide film is, for example, silicon dioxide (SiO₂). ２ ) The composition of each silicon oxide film is strictly SiO ２ It is not mandatory that the silicon oxide film constituting the fourth dielectric film be different from the silicon oxide film constituting the sixth dielectric film. The insulating separation layer 5 is not limited to a multilayer film, but may be a single dielectric film. When the insulating separation layer 5 is a single-layer dielectric film, the material of the dielectric film is, for example, silicon oxide. The material of the dielectric film is not limited to silicon oxide, but may be, for example, titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, tungsten oxide, niobium oxide, tantalum oxide, or aluminum oxide.

[0052] In Embodiment 1, the material of the insulating separation layer 5 is the same as the material of the first dielectric layer 13 and the second dielectric layer 23, but it may be different from the material of the first dielectric layer 13 and the second dielectric layer 23.

[0053] (2.5) First external connection electrode and second external connection electrode The first external connection electrode 6 is connected to the first silicon layer 10 as shown in Figure 1. More specifically, the first external connection electrode 6 is connected to the first silicon layer 10 through a contact hole 133 formed in the portion of the first dielectric layer 13 that overlaps with the main surface 101 of the first silicon layer 10. In the capacitor 100, the first external connection electrode 6 is electrically connected to the first silicon layer 10. "The first external connection electrode 6 is electrically connected to the first silicon layer 10" means that the first external connection electrode 6 and the first silicon layer 10 are in ohmic contact. In addition, the first external connection electrode 6 is electrically connected to the second silicon layer 20 via the first silicon layer 10.

[0054] In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the first external connection electrode 6 is, for example, square-shaped (see Figure 2), but is not limited to a square shape; for example, it may be circular. As shown in Figure 2, the first external connection electrode 6 does not overlap with the region A1 of the first capacitance portion 1 in a plan view from the thickness direction D1 of the first silicon layer 10.

[0055] The second external connection electrode 7 is connected to the first conductive layer 14. In the capacitor 100, the second external connection electrode 7 is electrically connected to the first conductive layer 14. As shown in Figure 2, the second external connection electrode 7 does not overlap with the region A1 of the first capacitance portion 1 in a plan view from the thickness direction D1 of the first silicon layer 10.

[0056] The materials of the first external connection electrode 6 and the second external connection electrode 7 include, for example, aluminum, but are not limited to aluminum; they may also include, for example, gold, platinum, ruthenium, etc. The material of the second external connection electrode 7 is the same as the material of the first external connection electrode 6, but may be a different material from the material of the first external connection electrode 6.

[0057] The thicknesses of the first external connection electrode 6 and the second external connection electrode 7 are, for example, 1 μm or more and 3 μm or less. The thickness of the second external connection electrode 7 is the same as the thickness of the first external connection electrode 6, but it may be a different thickness from the thickness of the first external connection electrode 6.

[0058] (3) Capacitor manufacturing method In the method for manufacturing the capacitor 100, for example, a first wafer containing a plurality of first capacitance portions 1 and a second wafer containing a plurality of second capacitance portions 2 are manufactured, and then, as shown in Figure 3, the first capacitance portions 1 and the second capacitance portions 2 are brought facing each other in the thickness direction D1 of the first silicon layer 10 via a connecting conductor layer 3 and an insulating separation layer 5, and the first capacitance portions 1 and the second capacitance portions 2 are joined together to manufacture the capacitor 100.

[0059] In manufacturing a first wafer containing multiple first capacitance portions 1, for example, a first silicon wafer that will be the basis for the first silicon layer 10 is prepared, and multiple through trenches 11 are formed in the areas on the first silicon wafer where each first capacitance portion 1 is to be formed using photolithography and etching techniques. Then, for example, a first dielectric layer 13 is formed by thermal oxidation and CVD, and then, for example, a connecting conductor layer 3 and an insulating isolation layer 5 are formed, and then a first conductor layer 14 is formed on the surface 131 of the first dielectric layer 13 by CVD (Chemical Vapor Deposition). Then, for example, a first external connection electrode 6 and a second external connection electrode 7 are formed using thin-film formation, photolithography, and etching techniques.

[0060] The connecting conductive layer 3 is formed in the first capacitance section 1 using, for example, a thin-film formation method, photolithography technology, and etching technology. The insulating isolation layer 5 is also formed in the first capacitance section 1 using, for example, a thin-film formation method, photolithography technology, and etching technology.

[0061] In manufacturing a second wafer containing multiple second capacitance portions 2, for example, a second silicon wafer that will serve as the basis for the second silicon layer 20 is prepared, and multiple trenches 21 are formed in the region of the second silicon wafer where each second capacitance portion 2 is to be formed using photolithography and etching techniques. Subsequently, a second dielectric layer 23 is formed by, for example, thermal oxidation and CVD, and then a second conductive layer 24 is formed on the surface 231 of the second dielectric layer 23 by CVD.

[0062] In the method for manufacturing the capacitor 100, a wafer containing multiple capacitors 100 is obtained by joining a first capacitance section 1 and a second capacitance section 2. Then, the wafer is cut using, for example, a dicing saw or a laser dicing device to obtain the multiple capacitors 100.

[0063] (4) Advantages In the capacitor 100 according to Embodiment 1, the first conductive layer 14 of the first capacitance section 1 has a first columnar portion 15 located inside each of the plurality of through trenches 11, and the second conductive layer 24 of the second capacitance section 2 has a second columnar portion 25 located inside each of the plurality of trenches 21. In addition, in the capacitor 100 according to Embodiment 1, the first silicon layer 10 of the first capacitance section 1 and the second silicon layer 20 of the second capacitance section 2 are electrically connected, and the first conductive layer 14 and the second conductive layer 24 are connected by a connecting conductive layer 3. The insulating isolation layer 5 is interposed between the first silicon layer 10 and the connecting conductive layer 3, and also interposed between the second silicon layer 20 and the connecting conductive layer 3.

[0064] The above configuration makes it possible to increase capacitance while improving reliability. More specifically, the capacitor 100 according to Embodiment 1 comprises a first capacitance section 1 and a second capacitance section 2 overlapping the first capacitance section 1. The first conductive layer 14 included in the first capacitance section 1 has a first columnar portion 15 located inside each of the plurality of through trenches 11, and the second conductive layer 24 included in the second capacitance section 2 has a second columnar portion 25 located inside each of the plurality of trenches 21. Thus, it is possible to increase capacitance while improving reliability.

[0065] Furthermore, in the capacitor 100 according to Embodiment 1, the first conductive layer 14, the second conductive layer 24, and the connecting conductive layer 3 are made of the same material.

[0066] The above configuration makes it possible to further improve reliability. Furthermore, with the above configuration, for example, it becomes possible to form the connecting conductor layer 3 in the same process as the first conductor layer 14 during manufacturing, thereby simplifying the manufacturing process.

[0067] Furthermore, in the capacitor 100 according to Embodiment 1, the first silicon layer 10 and the second silicon layer 20 are made of the same material. A part of the first silicon layer 10 and a part of the second silicon layer 20 are connected.

[0068] According to the above configuration, it is possible to improve the bonding strength between the first silicon layer 10 and the second silicon layer 20 compared to when the first silicon layer 10 and the second silicon layer 20 are bonded via a connecting conductor layer 3.

[0069] (5) Modified Examples Hereafter, a modified example of the capacitor 100 of Embodiment 1 will be described with reference to Figure 4. With respect to the modified example of the capacitor 100 of Embodiment 1, components that are the same as those in the capacitor 100 of Embodiment 1 will be denoted by the same reference numerals and their descriptions will be omitted as appropriate.

[0070] The modified capacitor 100 of Embodiment 1 differs from the capacitor 100 of Embodiment 1 in that, as shown in Figure 4, some of the multiple first columnar portions 15 are directly connected to the corresponding second columnar portions 25 among the multiple second columnar portions 25.

[0071] The capacitor 100 according to the modified example 1 of Embodiment 1 has the same effects as the capacitor 100 according to Embodiment 1.

[0072] (Embodiment 2) (1) Capacitor Hereinafter, the capacitor 100A according to Embodiment 2 will be described with reference to Figures 5 and 6. With respect to the capacitor 100A according to Embodiment 2, components that are the same as those of the capacitor 100 according to Embodiment 1 will be given the same reference numerals and their descriptions will be omitted as appropriate. Note that Figure 5 is a cross-sectional view taken along the line X-X in Figure 6.

[0073] The capacitor 100A according to Embodiment 2 comprises a first capacitance portion 1A, a second capacitance portion 2A, a first connecting conductor layer 3B, a second connecting conductor layer 3A, and an insulating separation layer 5A. The second capacitance portion 2A overlaps the first capacitance portion 1A. The first connecting conductor layer 3B is disposed between the first capacitance portion 1A and the second capacitance portion 2A. The second connecting conductor layer 3A is disposed between the first capacitance portion 1A and the second capacitance portion 2A. The first capacitance portion 1A includes a first silicon layer 10, a first metal layer 12, a first dielectric layer 13A, and a first conductor layer 14A. The first silicon layer 10 has a plurality of through trenches 11. The first metal layer 12 is disposed across the main surface 101 of the first silicon layer 10 and the inner surface 110 of each of the plurality of through trenches 11. The first dielectric layer 13A is located on the surface 121 of the first metal layer 12. The first conductive layer 14A is located on the surface 131A of the first dielectric layer 13A. The first conductive layer 14A has a first columnar portion 15 located inside each of the plurality of through trenches 11. The second capacitance portion 2A includes a second silicon layer 20, a second metal layer 22, a second dielectric layer 23A, and a second conductive layer 24A. The second silicon layer 20 has a plurality of trenches 21. The second silicon layer 20 overlaps the first silicon layer 10 in the thickness direction D1 of the first silicon layer 10. The second metal layer 22 is located across the main surface 201 of the second silicon layer 20 and the inner surface 210 of each of the plurality of trenches 21. The second dielectric layer 23A is located on the surface 221 of the second metal layer 22. The second conductive layer 24A is located on the surface 231A of the second dielectric layer 23A. The second conductive layer 24A has a second columnar portion 25A located inside each of the plurality of trenches 21. The first silicon layer 10 and the second silicon layer 20 are electrically connected. The first metal layer 12 and the second metal layer 22 are connected by the first connecting conductive layer 3B. The first conductive layer 14A and the second conductive layer 24A are connected by the second connecting conductive layer 3A. The insulating isolation layer 5 is interposed between the second connecting conductive layer 3A and the first connecting conductive layer 3B, and also between the second connecting conductive layer 3A and the second metal layer 22.

[0074] The above configuration makes it possible to increase capacity while improving reliability.

[0075] Furthermore, the capacitor 100A according to embodiment 2 further comprises a first external connection electrode 6 and a second external connection electrode 7.

[0076] (2) Components of the capacitor Hereinafter, each component of the capacitor 100A according to Embodiment 2 will be described with reference to Figures 5 and 6.

[0077] (2.1) First Capacitance Section As shown in Figure 5, the first capacitance section 1A includes a first silicon layer 10, a first metal layer 12, a first dielectric layer 13A, and a first conductor layer 14A.

[0078] In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the first capacitance portion 1A is rectangular.

[0079] In the first capacity section 1A, the region A1 containing the multiple through trenches 11 is rectangular in shape when viewed from the thickness direction D1 of the first silicon layer 10. Region A1 is not limited to a rectangular shape when viewed from the thickness direction D1 of the first silicon layer 10; for example, it may be a circular region or a polygonal region other than a rectangle.

[0080] The first metal layer 12 is arranged across the main surface 101 of the first silicon layer 10 and the inner surface 110 of each of the multiple through trenches 11. The first metal layer 12 has a shape that conforms to the main surface 101 of the first silicon layer 10 and the inner surface 110 of each of the multiple through trenches 11.

[0081] The thickness of the first metal layer 12 is, for example, 10 nm to 500 nm. The upper limit of the thickness of the first metal layer 12 is limited by the opening width of the through trench 11, the thickness of the first metal layer 12 within the through trench 11, and so on.

[0082] The first dielectric layer 13A is located on the surface 121 of the first metal layer 12. More specifically, the first dielectric layer 13A is laminated on the surface 121 of the first metal layer 12. The first dielectric layer 13A has a shape that aligns with the main surface 101 of the first silicon layer 10 and the inner surfaces 110 of each of the plurality of through trenches 11.

[0083] The thickness of the first dielectric layer 13A is, for example, 5 nm or more and 500 nm or less. The upper limit of the thickness of the first dielectric layer 13A is limited by the opening width of the through trench 11, the thickness of the first dielectric layer 13A within the through trench 11, and so on.

[0084] The first dielectric layer 13A is a multilayer film formed by stacking multiple dielectric films. More specifically, the first dielectric layer 13A includes, for example, a first dielectric film (e.g., a first silicon oxide film), a second dielectric film (e.g., a silicon nitride film) stacked on the first dielectric film, and a third dielectric film (e.g., a second silicon oxide film) stacked on the second dielectric film. The materials of the first silicon oxide film and the second silicon oxide film are, for example, silicon dioxide (SiO₂). ２ ) The composition of the first silicon oxide film and the second silicon oxide film is strictly SiO ２ It is not mandatory that the first silicon oxide film be a multilayer film. Furthermore, the composition of the first silicon oxide film and the composition of the second silicon oxide film may be different. The first dielectric layer 13A is not limited to a multilayer film, but may be a single dielectric film. When the first dielectric layer 13A is a single-layer dielectric film, the material of the dielectric film is, for example, silicon oxide. The material of the dielectric film is not limited to silicon oxide, but may be, for example, titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, tungsten oxide, niobium oxide, tantalum oxide, or aluminum oxide.

[0085] The first conductive layer 14A is located on the surface 131A of the first dielectric layer 13A. More specifically, the first conductive layer 14A is laminated on the surface 131A of the first dielectric layer 13A. The first conductive layer 14A has first columnar portions 15A located inside each of the plurality of through trenches 11. The first conductive layer 14A also includes layered portions 16A that connect the plurality of first columnar portions 15A.

[0086] The first conductive layer 14A is, for example, a metal electrode layer. The material of the metal electrode layer includes, for example, at least one selected from the group consisting of copper, ruthenium, titanium, tantalum, tungsten, and aluminum. More specifically, the material of the metal electrode layer is copper, ruthenium, titanium, tantalum, tungsten, aluminum, or an alloy mainly composed of any of these metals.

[0087] The thickness of the layered portion 16A of the first conductive layer 14A is thinner than the thickness of the first silicon layer 10. The thickness of the layered portion 16A of the first conductive layer 14A is greater than, for example, half the opening width of each of the multiple through trenches 11.

[0088] (2.2) Second Capacitance Section As shown in Figure 5, the second capacitance section 2A includes a second silicon layer 20, a second metal layer 22, a second dielectric layer 23A, and a second conductive layer 24A.

[0089] In a plan view from the thickness direction D1 of the second silicon layer 20, the outer edge of the second capacitance portion 2A is rectangular.

[0090] The second metal layer 22 is arranged across the main surface 201 of the second silicon layer 20 and the inner surface 210 of each of the multiple trenches 21. The second metal layer 22 has a shape that conforms to the main surface 201 of the second silicon layer 20 and the inner surface 210 of each of the multiple trenches 21.

[0091] The thickness of the second metal layer 22 is, for example, 10 nm to 500 nm. The upper limit of the thickness of the second metal layer 22 is limited by the opening width of the trench 21, the thickness of the second metal layer 22 within the trench 21, and so on.

[0092] The second dielectric layer 23A is located on the surface 221 of the second metal layer 22. More specifically, the second dielectric layer 23A is laminated on the surface 221 of the second metal layer 22. The second dielectric layer 23A has a shape that aligns with the main surface 201 of the second silicon layer 20 and the inner surface 210 of each of the plurality of trenches 21.

[0093] The thickness of the second dielectric layer 23A is, for example, 5 nm to 500 nm. The upper limit of the thickness of the second dielectric layer 23A is limited by the opening width of the trench 21, the thickness of the second dielectric layer 23A within the trench 21, and so on.

[0094] The second dielectric layer 23A is a multilayer film formed by stacking multiple dielectric films. More specifically, the second dielectric layer 23A includes, for example, a fourth dielectric film (e.g., a third silicon oxide film), a fifth dielectric film (e.g., a silicon nitride film) stacked on the fourth dielectric film, and a sixth dielectric film (e.g., a fourth silicon oxide film) stacked on the fifth dielectric film. The materials of the third silicon oxide film and the fourth silicon oxide film are, for example, silicon dioxide (SiO₂). ２ ) The composition of the third silicon oxide film and the fourth silicon oxide film is strictly SiO ２ It is not mandatory that the composition of the third silicon oxide film be different from that of the fourth silicon oxide film. The second dielectric layer 23 is not limited to a multilayer film, but may be a single dielectric film. If the second dielectric layer 23 is a single-layer dielectric film, the material of the dielectric film is, for example, silicon oxide. The material of the dielectric film is not limited to silicon oxide, but may be, for example, titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, tungsten oxide, niobium oxide, tantalum oxide, or aluminum oxide.

[0095] The second conductive layer 24A is located on the surface 231A of the second dielectric layer 23A. More specifically, the second conductive layer 24A is laminated on the surface 231A of the second dielectric layer 23A. The second conductive layer 24A has second columnar portions 25A located inside each of the plurality of trenches 21. The second conductive layer 24A also includes layered portions 26A that connect the plurality of second columnar portions 25A.

[0096] The second conductive layer 24A is, for example, a metal electrode layer. The material of the metal electrode layer includes, for example, at least one selected from the group consisting of copper, ruthenium, titanium, tantalum, tungsten, and aluminum. More specifically, the material of the metal electrode layer is copper, ruthenium, titanium, tantalum, tungsten, aluminum, or an alloy mainly composed of any of these metals.

[0097] The thickness of the layered portion 26A of the second conductive layer 24A is thinner than the thickness of the second silicon layer 20. The thickness of the layered portion 26A of the second conductive layer 24A is greater than, for example, half the opening width of each of the multiple trenches 21.

[0098] In Embodiment 2, the material of the second conductive layer 24A is the same as the material of the first conductive layer 14A, but it may be different from the material of the first conductive layer 14A.

[0099] (2.3) First connecting conductor layer and second connecting conductor layer As shown in Figure 5, the first connecting conductor layer 3B and the second connecting conductor layer 3A are arranged between the first capacitance portion 1A and the second capacitance portion 2A in the thickness direction D1 of the first silicon layer 10.

[0100] The first connecting conductive layer 3B is located between the first metal layer 12 and the second metal layer 22 in the thickness direction D1 of the first silicon layer 10, and connects the first metal layer 12 and the second metal layer 22.

[0101] The second connecting conductor layer 3A is located between the first silicon layer 10 and the second silicon layer 20 and closes off a plurality of through trenches 11. The second connecting conductor layer 3A is interposed between a plurality of first columnar portions 15A of the first conductor layer 14A and the layered portions 26A of the second conductor layer 24A. The second connecting conductor layer 3A connects the first conductor layer 14A and the second conductor layer 24A.

[0102] The materials of the first connecting conductor layer 3B and the second connecting conductor layer 3A each include, for example, at least one selected from the group consisting of copper, ruthenium, titanium, tantalum, tungsten, and aluminum. More specifically, the materials of the first connecting conductor layer 3B and the second connecting conductor layer 3A each include copper, ruthenium, titanium, tantalum, tungsten, aluminum, or alloys mainly composed of any of these metals.

[0103] In a plan view from the thickness direction D1 of the first silicon layer 10, the first connecting conductor layer 3B and the second connecting conductor layer 3A are smaller than the first silicon layer 10. In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edges of the first connecting conductor layer 3B and the second connecting conductor layer 3A are rectangular, but may have a shape other than rectangular. In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the first connecting conductor layer 3B is located inside the outer edge of the first silicon layer 10. In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the second connecting conductor layer 3A is located inside the outer edge of the first silicon layer 10 and the outer edge of the first connecting conductor layer 3B.

[0104] The thickness of the first connecting conductor layer 3B and the second connecting conductor layer 3A is thinner than the thickness of the first silicon layer 10. The thickness of the first connecting conductor layer 3B and the second connecting conductor layer 3A is greater than, for example, half the opening width of each of the multiple through trenches 11.

[0105] In Embodiment 2, the material of the first connecting conductor layer 3B is the same as the material of the first metal layer 12 and the second metal layer 22, but it may be different from the material of the first metal layer 12 and the second metal layer 22. The material of the second connecting conductor layer 3A is the same as the material of the first conductor layer 14A and the second conductor layer 24A, but it may be different from the material of the first conductor layer 14A and the second conductor layer 24A.

[0106] (2.4) Insulating Separation Layer As shown in Figure 5, the insulating separation layer 5A is interposed between the second connecting conductor layer 3A and the first connecting conductor layer 3B, and also between the second connecting conductor layer 3A and the second metal layer 22. The insulating separation layer 5A has electrical insulating properties. The insulating separation layer 5A electrically isolates the second connecting conductor layer 3A and the first connecting conductor layer 3B, and electrically isolates the second connecting conductor layer 3A and the second metal layer 22. In Embodiment 2, the insulating separation layer 5A electrically isolates the first metal layer 12 and the first conductor layer 14A, and the insulating separation layer 5A electrically isolates the second metal layer 22 and the second conductor layer 24A.

[0107] In a plan view from the thickness direction D1 of the first silicon layer 10, the insulating separation layer 5A surrounds the second connecting conductor layer 3A around its entire circumference and is interposed between the second connecting conductor layer 3A and the first connecting conductor layer 3B. In a plan view from the thickness direction D1 of the first silicon layer 10, the insulating separation layer 5A is, for example, rectangular in shape.

[0108] The insulating isolation layer 5A is, for example, a multilayer film formed by stacking multiple dielectric films. More specifically, the insulating isolation layer 5A includes, for example, a fourth dielectric film (e.g., a silicon oxide film), a fifth dielectric film (e.g., a silicon nitride film) stacked on the fourth dielectric film, and a sixth dielectric film (e.g., a silicon oxide film) stacked on the fifth dielectric film. The material of each silicon oxide film is, for example, silicon dioxide (SiO₂). ２ ) The composition of each silicon oxide film is strictly SiO ２ It is not mandatory that the silicon oxide film constituting the fourth dielectric film be different from the silicon oxide film constituting the sixth dielectric film. The insulating separation layer 5A is not limited to a multilayer film, but may be a single dielectric film. When the insulating separation layer 5 is a single-layer dielectric film, the material of the dielectric film is, for example, silicon oxide. The material of the dielectric film is not limited to silicon oxide, but may be, for example, titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, tungsten oxide, niobium oxide, tantalum oxide, or aluminum oxide.

[0109] In Embodiment 2, the material of the insulating separation layer 5A is the same as the material of the first dielectric layer 13A and the second dielectric layer 23A, but it may be different from the material of the first dielectric layer 13A and the second dielectric layer 23A.

[0110] (2.5) First external connection electrode and second external connection electrode The first external connection electrode 6 is connected to the first silicon layer 10 via the first metal layer 12, as shown in Figure 5. More specifically, the first external connection electrode 6 is connected to the first metal layer 12 through a contact hole 133A formed in the portion of the first dielectric layer 13A that overlaps with the main surface 101 of the first silicon layer 10. In the capacitor 100A, the first metal layer 12 is electrically connected to the first silicon layer 10. "The first metal layer 12 is electrically connected to the first silicon layer 10" means that the first metal layer 12 and the first silicon layer 10 are in ohmic contact. The first external connection electrode 6 is electrically connected to the second silicon layer 20 via the first metal layer 12 and the first silicon layer 10.

[0111] In a plan view from the thickness direction D1 of the first silicon layer 10, the outer edge of the first external connection electrode 6 is, for example, square-shaped (see Figure 6), but is not limited to a square shape; for example, it may be circular. As shown in Figure 6, the first external connection electrode 6 does not overlap with the region A1 of the first capacitance portion 1A in a plan view from the thickness direction D1 of the first silicon layer 10.

[0112] The second external connection electrode 7 is connected to the first conductive layer 14A. In the capacitor 100A, the second external connection electrode 7 is electrically connected to the first conductive layer 14A. As shown in Figure 6, the second external connection electrode 7 does not overlap with the region A1 of the first capacitance portion 1A in a plan view from the thickness direction D1 of the first silicon layer 10.

[0113] The materials of the first external connection electrode 6 and the second external connection electrode 7 include, for example, aluminum, but are not limited to aluminum; they may also include, for example, gold, platinum, ruthenium, etc. The material of the second external connection electrode 7 is the same as the material of the first external connection electrode 6, but may be a different material from the material of the first external connection electrode 6.

[0114] The thicknesses of the first external connection electrode 6 and the second external connection electrode 7 are, for example, 1 μm or more and 3 μm or less. The thickness of the second external connection electrode 7 is the same as the thickness of the first external connection electrode 6, but it may be a different thickness from the thickness of the first external connection electrode 6.

[0115] (3) Capacitor manufacturing method In the method for manufacturing the capacitor 100A, for example, a first wafer containing a plurality of first capacitance portions 1A and a second wafer containing a plurality of second capacitance portions 2A are manufactured, and then the first capacitance portion 1A and the second capacitance portion 2A are placed facing each other in the thickness direction D1 of the first silicon layer 10 via a first connecting conductor layer 3B, a second connecting conductor layer 3A and an insulating separation layer 5A, and the first capacitance portion 1A and the second capacitance portion 2A are joined together to manufacture the capacitor 100A.

[0116] In manufacturing a first wafer containing multiple first capacitance portions 1A, for example, a first silicon wafer that will be the basis for the first silicon layer 10 is prepared, and multiple through trenches 11 are formed in the areas on the first silicon wafer where each first capacitance portion 1A is to be formed using photolithography and etching techniques. Then, for example, a first metal layer 12 is formed by CVD, followed by a first dielectric layer 13A being formed by thermal oxidation and CVD, and then, for example, a first connecting conductor layer 3B, a second connecting conductor layer 3A, and an insulating separation layer 5 are formed, and then a first conductor layer 14A is formed on the surface 131A of the first dielectric layer 13A by CVD. Then, for example, a first external connecting electrode 6 and a second external connecting electrode 7 are formed using thin-film formation, photolithography, etching, etc.

[0117] The first connecting conductive layer 3B and the second connecting conductive layer 3A are formed in the first capacitance section 1A using, for example, a thin-film formation method, photolithography technology, and etching technology. The insulating isolation layer 5A is also formed in the first capacitance section 1A using, for example, a thin-film formation method, photolithography technology, and etching technology.

[0118] In manufacturing a second wafer containing multiple second capacitance portions 2A, for example, a second silicon wafer that will serve as the basis for the second silicon layer 20 is prepared, and multiple trenches 21 are formed in the region of the second silicon wafer where each second capacitance portion 2A is to be formed using photolithography and etching techniques. Then, for example, a second metal layer 22 is formed by CVD, followed by a second dielectric layer 23A being formed by thermal oxidation and CVD, and then a second conductive layer 24A is formed on the surface 231A of the second dielectric layer 23A by CVD.

[0119] In the method for manufacturing the capacitor 100A, a wafer containing multiple capacitors 100A is obtained by joining a first capacitance section 1A and a second capacitance section 2A. Then, the wafer is cut using, for example, a dicing saw or a laser dicing device to obtain multiple capacitors 100A.

[0120] (4) Advantages In the capacitor 100A according to Embodiment 2, the first conductive layer 14A of the first capacitance section 1A has a first columnar portion 15A located inside each of the plurality of through trenches 11, and the second conductive layer 24A of the second capacitance section 2A has a second columnar portion 25A located inside each of the plurality of trenches 21. In addition, in the capacitor 100 according to Embodiment 2, the first silicon layer 10 of the first capacitance section 1A and the second silicon layer 20 of the second capacitance section 2A are electrically connected, the first metal layer 12 and the second metal layer 22 are connected by a first connecting conductive layer 3B, and the first conductive layer 14A and the second conductive layer 24A are connected by a second connecting conductive layer 3A. The insulating isolation layer 5A is interposed between the second connecting conductive layer 3A and the first connecting conductive layer 3B, and between the second connecting conductive layer 3A and the second metal layer 22.

[0121] The above configuration makes it possible to increase capacitance while improving reliability. More specifically, the capacitor 100A according to Embodiment 2 comprises a first capacitance portion 1A and a second capacitance portion 2A overlapping the first capacitance portion 1A. The first conductive layer 14A included in the first capacitance portion 1A has a first columnar portion 15A located inside each of the plurality of through trenches 11, and the second conductive layer 24A included in the second capacitance portion 2A has a second columnar portion 25A located inside each of the plurality of trenches 21. Thus, it is possible to increase capacitance while improving reliability.

[0122] Furthermore, in the capacitor 100A according to Embodiment 2, the first metal layer 12, the second metal layer 22, the first conductive layer 14A, the second conductive layer 24A, the first connecting conductive layer 3B, and the second connecting conductive layer 3A are made of the same material.

[0123] The above configuration makes it possible to further improve reliability. Furthermore, with the above configuration, for example, it becomes possible to form the first connecting conductor layer 3B and the first metal layer 12 in the same process during manufacturing, and it also becomes possible to form the second connecting conductor layer 3A in the same process as the first conductor layer 14A, thereby simplifying the manufacturing process.

[0124] Furthermore, in the capacitor 100A according to Embodiment 2, the first silicon layer 10 and the second silicon layer 20 are made of the same material. A part of the first silicon layer 10 and a part of the second silicon layer 20 are connected.

[0125] According to the above configuration, it is possible to improve the bonding strength between the first silicon layer 10 and the second silicon layer 20 compared to when the first silicon layer 10 and the second silicon layer 20 are bonded via the second connecting conductor layer 3A.

[0126] (Other Modifications) Embodiments 1 and 2, etc. are merely one of many embodiments of the present disclosure. Embodiments 1 and 2, etc. can be modified in various ways depending on the design, etc., as long as the objectives of the present disclosure are achieved.

[0127] For example, in the capacitor 100 according to Embodiment 1, the first conductive layer 14 and the second conductive layer 24 may be seamlessly connected to the connecting conductive layer 3. Also, in the capacitor 100 according to Embodiment 1, the first silicon layer 10 and the second silicon layer 20 may be seamlessly connected.

[0128] (Modes) Based on the embodiments described above, the following modes are disclosed in this specification.

[0129] A capacitor (100) according to the first embodiment comprises a first capacitance portion (1), a second capacitance portion (2), a connecting conductor layer (3), and an insulating isolation layer (5). The second capacitance portion (2) overlaps the first capacitance portion (1). The connecting conductor layer (3) is disposed between the first capacitance portion (1) and the second capacitance portion (2). The first capacitance portion (1) includes a first silicon layer (10), a first dielectric layer (13), and a first conductor layer (14). The first silicon layer (10) has a plurality of through trenches (11). The first dielectric layer (13) is disposed across the main surface (101) of the first silicon layer (10) and the inner surfaces (110) of each of the plurality of through trenches (11). The first conductor layer (14) is disposed on the surface (131) of the first dielectric layer (13). The first conductive layer (14) has a first columnar portion (15) located inside each of the plurality of through trenches (11). The second capacitance portion (2) includes a second silicon layer (20), a second dielectric layer (23), and a second conductive layer (24). The second silicon layer (20) has a plurality of trenches (21). The second silicon layer (20) overlaps the first silicon layer (10) in the thickness direction (D1). The second dielectric layer (23) is arranged across the main surface (201) of the second silicon layer (20) and the inner surface (210) of each of the plurality of trenches (21). The second conductive layer (24) is arranged on the surface (231) of the second dielectric layer (23). The second conductive layer (24) has a second columnar portion (25) located inside each of the plurality of trenches (21). The first silicon layer (10) and the second silicon layer (20) are electrically connected. The first conductive layer (14) and the second conductive layer (24) are connected by a connecting conductive layer (3). The insulating isolation layer (5) is interposed between the first silicon layer (10) and the connecting conductive layer (3), and also between the second silicon layer (20) and the connecting conductive layer (3).

[0130] This embodiment makes it possible to increase capacity while improving reliability.

[0131] In the capacitor (100) according to the second embodiment, the first conductive layer (14), the second conductive layer (24), and the connecting conductive layer (3) are made of the same material as in the first embodiment.

[0132] This embodiment makes it possible to further improve reliability. Furthermore, the above configuration makes it possible to simplify the manufacturing process.

[0133] In the capacitor (100) according to the third embodiment, as in the first or second embodiment, the first silicon layer (10) and the second silicon layer (20) are made of the same material. A part of the first silicon layer (10) and a part of the second silicon layer (20) are connected.

[0134] According to this embodiment, it is possible to improve the bonding strength between the first silicon layer (10) and the second silicon layer (20) compared to when the first silicon layer (10) and the second silicon layer (20) are joined via a connecting conductor layer (3).

[0135] A capacitor (100A) according to a fourth embodiment includes a first capacitance portion (1A), a second capacitance portion (2A), a first connecting conductor layer (3B), a second connecting conductor layer (3A), and an insulating isolation layer (5A). The second capacitance portion (2A) overlaps the first capacitance portion (1A). The first connecting conductor layer (3B) is disposed between the first capacitance portion (1A) and the second capacitance portion (2A). The second connecting conductor layer (3A) is disposed between the first capacitance portion (1A) and the second capacitance portion (2A). The first capacitance portion (1A) includes a first silicon layer (10), a first metal layer (12), a first dielectric layer (13A), and a first conductor layer (14A). The first silicon layer (10) has a plurality of through trenches (11). The first metal layer (12) is arranged across the main surface (101) of the first silicon layer (10) and the inner surfaces (110) of each of the plurality of through trenches (11). The first dielectric layer (13A) is arranged on the surface (121) of the first metal layer (12). The first conductive layer (14A) is arranged on the surface (131A) of the first dielectric layer (13A). The first conductive layer (14A) has a first columnar portion (15A) located inside each of the plurality of through trenches (11). The second capacitance portion (2A) includes a second silicon layer (20), a second metal layer (22), a second dielectric layer (23A), and a second conductive layer (24A). The second silicon layer (20) has a plurality of trenches (21). The second silicon layer (20) overlaps the first silicon layer (10) in the thickness direction (D1). The second metal layer (22) is arranged across the main surface (201) of the second silicon layer (20) and the inner surfaces (210) of each of the multiple trenches (21). The second dielectric layer (23A) is arranged on the surface (221) of the second metal layer (22). The second conductive layer (24A) is arranged on the surface (231A) of the second dielectric layer (23A). The second conductive layer (24A) has a second columnar portion (25A) located inside each of the multiple trenches (21). The first silicon layer (10) and the second silicon layer (20) are electrically connected. The first metal layer (12) and the second metal layer (22) are connected by a first connecting conductive layer (3B). The first conductive layer (14A) and the second conductive layer (24A) are connected by a second connecting conductive layer (3A).The insulating separation layer (5A) is interposed between the second connecting conductor layer (3A) and the first connecting conductor layer (3B), and also between the second connecting conductor layer (3A) and the second metal layer (22).

[0136] This embodiment makes it possible to increase capacity while improving reliability.

[0137] In the capacitor (100A) according to the fifth embodiment, as in the fourth embodiment, the first metal layer (12), the second metal layer (22), the first conductive layer (14A), the second conductive layer (24A), the first connecting conductive layer (3B), and the second connecting conductive layer (3A) are made of the same material as each other.

[0138] This embodiment makes it possible to further improve reliability. Furthermore, with the above configuration, the first connecting conductor layer (3B) and the first metal layer (12) can be formed in the same process, and the second connecting conductor layer (3A) can be formed in the same process as the first conductor layer (14A), thereby simplifying the manufacturing process.

[0139] In the capacitor (100A) according to the sixth embodiment, as in the fourth or fifth embodiment, the first silicon layer (10) and the second silicon layer (20) are made of the same material. A portion of the first silicon layer (10) and a portion of the second silicon layer (20) are connected.

[0140] According to this embodiment, it is possible to improve the bonding strength between the first silicon layer (10) and the second silicon layer (20) compared to when the first silicon layer (10) and the second silicon layer (20) are bonded via the second connecting conductor layer (3A).

[0141] 100, 100A Capacitor 1, 1A First capacitance section 10 First silicon layer 101 Main surface 11 Through trench 110 Inner surface 12 First metal layer 121 Surface 13, 13A First dielectric layer 131, 131A Surface 14, 14A First conductor layer 15, 15A First columnar section 2, 2A Second capacitance section 20 Second silicon layer 201 Main surface 21 Trench 210 Inner surface 22 Second metal layer 221 Surface 23, 23A Second dielectric layer 231, 231A Surface 24, 24A Second conductor layer 25, 25A Second columnar section 3 Connecting conductor layer 3B First connecting conductor layer 3A Second connecting conductor layer 5, 5A Insulation isolation layer 6 First external connection electrode 7 Second external connection electrode D1 Thickness direction

Claims

1. The capacitor comprises a first capacitance portion, a second capacitance portion overlapping the first capacitance portion, a connecting conductor layer disposed between the first capacitance portion and the second capacitance portion, and an insulating isolation layer, wherein the first capacitance portion includes a first silicon layer having a plurality of through trenches, a first dielectric layer disposed across the main surface of the first silicon layer and the inner surfaces of each of the plurality of through trenches, and a first conductor layer disposed on the surface of the first dielectric layer and having a first columnar portion located inside each of the plurality of through trenches, the second capacitance portion includes a second silicon layer having a plurality of trenches and overlapping the first silicon layer in the thickness direction of the first silicon layer, a second dielectric layer disposed across the main surface of the second silicon layer and the inner surfaces of each of the plurality of trenches, and a second conductor layer disposed on the surface of the second dielectric layer and having a second columnar portion located inside each of the plurality of trenches, the first silicon layer and the second silicon layer are electrically connected, A capacitor wherein the first conductive layer and the second conductive layer are connected by the connecting conductive layer, and the insulating isolation layer is interposed between the first silicon layer and the connecting conductive layer, and between the second silicon layer and the connecting conductive layer.

2. The capacitor according to claim 1, wherein the first conductive layer, the second conductive layer, and the connecting conductive layer are made of the same material.

3. The capacitor according to claim 1 or 2, wherein the first silicon layer and the second silicon layer are made of the same material, and a portion of the first silicon layer and a portion of the second silicon layer are connected.

4. A capacitor comprises: a first capacitance portion; a second capacitance portion overlapping the first capacitance portion; a first connecting conductor layer disposed between the first capacitance portion and the second capacitance portion; a second connecting conductor layer disposed between the first capacitance portion and the second capacitance portion; and an insulating isolation layer, wherein the first capacitance portion includes: a first silicon layer having a plurality of through trenches; a first metal layer disposed across the main surface of the first silicon layer and the inner surfaces of each of the plurality of through trenches; a first dielectric layer disposed on the surface of the first metal layer; and a first conductor layer disposed on the surface of the first dielectric layer and having a first columnar portion located inside each of the plurality of through trenches, wherein the second capacitance portion includes: a second silicon layer having a plurality of trenches and overlapping the first silicon layer in the thickness direction of the first silicon layer; a second metal layer disposed across the main surface of the second silicon layer and the inner surfaces of each of the plurality of trenches; and a second dielectric layer disposed on the surface of the second metal layer. A capacitor comprising: a second conductive layer disposed on the surface of the second dielectric layer and having a second columnar portion located inside each of the plurality of trenches, wherein the first silicon layer and the second silicon layer are electrically connected, the first metal layer and the second metal layer are connected by the first connecting conductive layer, the first conductive layer and the second conductive layer are connected by the second connecting conductive layer, and the insulating isolation layer is interposed between the second connecting conductive layer and the first connecting conductive layer, and between the second connecting conductive layer and the second metal layer.

5. The capacitor according to claim 4, wherein the first metal layer, the second metal layer, the first conductive layer, the second conductive layer, the first connecting conductive layer, and the second connecting conductive layer are made of the same material.

6. The capacitor according to claim 4 or 5, wherein the first silicon layer and the second silicon layer are made of the same material, and a portion of the first silicon layer and a portion of the second silicon layer are connected.

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